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Peter Stuge wrote: |
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> wireless wrote: |
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>> Or for another (mythical) example: |
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>> We used 2 processors, one running a state machine for directly |
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>> reading an array of 20 bit D/A in sub microsecond fashion, and then |
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>> passed the data (like this) to another processor running RT_linux |
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>> (windRiver or embedded-gentoo)..... |
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> |
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> People plug FPGAs into HyperTransport (FSB used by AMD64) - does that |
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> count? |
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Yes. Any thing you can share is great. Timing/latency data, |
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issues, pseudo code, system architecture...... what decisions |
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where made and why..... |
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My focus is on the "low latency" aspect and what can be done |
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(how fast) directly under embedded linux (rt, rtai, xeno... |
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whatever tricks) control or by bypassing the rtos all together |
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and bringing in the data via another port/interface. why? |
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and also where folks have had to bypass the rtos because of |
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critical timing/bandwidth issues, or just simple to build |
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a system that is difficult to reverse engineer (FPGA |
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or SOC or asic).... |
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Again, I'm not after sensitive information, just performance |
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numbers and any technical details you can or are willing to |
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share. |
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tia, |
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James |