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On Thu, Dec 12, 2013 at 11:44 AM, Rick "Zero_Chaos" Farina |
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<zerochaos@g.o> wrote: |
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> We can try to help if you post your spec. |
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thank you for your reply. |
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Here is my spec file: http://bpaste.net/show/158113/ |
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And this is how it works after |
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catalyst -f generic_stage1_studio.spec http://bpaste.net/show/158115/ |
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My goal is to be able to run catalyst to produce stage1, stage2,stage3 |
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and then stage4 inn order to install |
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it on a intel i3. Like I mentioned before the build host is an amd: |
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processor : 3 |
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vendor_id : AuthenticAMD |
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cpu family : 18 |
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model : 1 |
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model name : AMD A8-3850 APU with Radeon(tm) HD Graphics |
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stepping : 0 |
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microcode : 0x3000027 |
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cpu MHz : 2900.000 |
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cache size : 1024 KB |
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physical id : 0 |
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siblings : 4 |
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core id : 3 |
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cpu cores : 4 |
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apicid : 3 |
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initial apicid : 3 |
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fpu : yes |
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fpu_exception : yes |
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cpuid level : 1 |
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wp : yes |
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flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge |
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mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext |
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fxsr_opt pdpe1gb rdtscp lm 3dnowext 3dnow constant_tsc rep_good nopl |
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nonstop_tsc extd_apicid pni cx16 popcnt lahf_lm cmp_legacy svm extapic |
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cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt |
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arat hw_pstate npt lbrv svm_lock nrip_save pausefilter |
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bogomips : 5800.30 |
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TLB size : 1536 4K pages |
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clflush size : 64 |
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cache_alignment : 64 |
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address sizes : 40 bits physical, 48 bits virtual |
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power management: ts ttp tm stc 100mhzsteps hwpstate |
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I realize that the road may be bumpy, but hey, I 've got a little bit |
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of patience here. |
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Thank you for any hints |
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Ben |
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-- |
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best regards |
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linforpros |