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commit: 47b90dedf06234195ea5eb701633396e0acb2687 |
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Author: Han Gao <rabenda.cn <AT> gmail <DOT> com> |
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AuthorDate: Wed Apr 27 16:15:35 2022 +0000 |
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Commit: Jakov Smolić <jsmolic <AT> gentoo <DOT> org> |
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CommitDate: Wed Apr 27 21:18:24 2022 +0000 |
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URL: https://gitweb.gentoo.org/repo/gentoo.git/commit/?id=47b90ded |
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|
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sci-libs/openblas: fix riscv detect |
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|
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Bug: https://bugs.gentoo.org/837806 |
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Signed-off-by: Han Gao <rabenda.cn <AT> gmail.com> |
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Signed-off-by: Jakov Smolić <jsmolic <AT> gentoo.org> |
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|
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.../openblas/files/openblas-0.3.20-fix-riscv.patch | 116 +++++++++++++++++++++ |
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sci-libs/openblas/openblas-0.3.20.ebuild | 1 + |
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2 files changed, 117 insertions(+) |
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|
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diff --git a/sci-libs/openblas/files/openblas-0.3.20-fix-riscv.patch b/sci-libs/openblas/files/openblas-0.3.20-fix-riscv.patch |
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new file mode 100644 |
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index 000000000000..9a14180cb85d |
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--- /dev/null |
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+++ b/sci-libs/openblas/files/openblas-0.3.20-fix-riscv.patch |
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@@ -0,0 +1,116 @@ |
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+Bug: https://bugs.gentoo.org/837806 |
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+From https://github.com/xianyi/OpenBLAS/pull/3613 |
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+ |
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+From 3fc52ebcfb80e01f753938fd314ca07b2c085767 Mon Sep 17 00:00:00 2001 |
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+From: Han Gao <gaohan@×××××××××.com> |
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+Date: Wed, 27 Apr 2022 01:34:55 +0800 |
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+Subject: [PATCH 1/2] Fix other arch build in detect. |
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+ |
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+When CORE is empty, use -march=loongson3a. Fix it. |
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+ |
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+Signed-off-by: Han Gao <gaohan@×××××××××.com> |
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+--- |
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+ Makefile.system | 2 +- |
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+ 1 file changed, 1 insertion(+), 1 deletion(-) |
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+ |
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+diff --git a/Makefile.system b/Makefile.system |
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+index ac60eae5b6..1104893b55 100644 |
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+--- a/Makefile.system |
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++++ b/Makefile.system |
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+@@ -847,7 +847,7 @@ CCOMMON_OPT += -mabi=32 |
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+ BINARY_DEFINED = 1 |
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+ endif |
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+ |
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+-ifeq ($(CORE), $(filter $(CORE),LOONGSON3R3 LOONGSON3R4)) |
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++ifneq (, $(filter $(CORE),LOONGSON3R3 LOONGSON3R4)) |
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+ CCOMMON_OPT += -march=loongson3a |
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+ FCOMMON_OPT += -march=loongson3a |
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+ endif |
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+ |
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+From 8123324c99ba69ce23b4028468313663001a76c6 Mon Sep 17 00:00:00 2001 |
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+From: Han Gao <gaohan@×××××××××.com> |
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+Date: Wed, 27 Apr 2022 02:29:43 +0800 |
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+Subject: [PATCH 2/2] Fix riscv64 arch detect |
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+ |
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+Signed-off-by: Han Gao <gaohan@×××××××××.com> |
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+--- |
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+ cpuid_riscv64.c | 18 +++++++++--------- |
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+ getarch.c | 4 ++-- |
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+ 2 files changed, 11 insertions(+), 11 deletions(-) |
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+ |
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+diff --git a/cpuid_riscv64.c b/cpuid_riscv64.c |
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+index 0eb50e0018..2aa4217816 100644 |
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+--- a/cpuid_riscv64.c |
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++++ b/cpuid_riscv64.c |
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+@@ -1,5 +1,5 @@ |
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+ /***************************************************************************** |
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+-Copyright (c) 2011-2014, The OpenBLAS Project |
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++Copyright (c) 2011-2022, The OpenBLAS Project |
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+ All rights reserved. |
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+ |
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+ Redistribution and use in source and binary forms, with or without |
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+@@ -13,9 +13,9 @@ modification, are permitted provided that the following conditions are |
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+ notice, this list of conditions and the following disclaimer in |
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+ the documentation and/or other materials provided with the |
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+ distribution. |
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+- 3. Neither the name of the OpenBLAS project nor the names of |
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+- its contributors may be used to endorse or promote products |
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+- derived from this software without specific prior written |
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++ 3. Neither the name of the OpenBLAS project nor the names of |
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++ its contributors may be used to endorse or promote products |
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++ derived from this software without specific prior written |
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+ permission. |
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+ |
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+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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+@@ -70,16 +70,16 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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+ /* or implied, of The University of Texas at Austin. */ |
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+ /*********************************************************************/ |
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+ |
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+-#define CPU_UNKNOWN 0 |
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+-#define CPU_C910V 1 |
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++#define CPU_GENERIC 0 |
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++#define CPU_C910V 1 |
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+ |
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+ static char *cpuname[] = { |
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+- "UNKOWN", |
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++ "RISCV64_GENERIC", |
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+ "C910V" |
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+ }; |
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+ |
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+ int detect(void){ |
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+- return CPU_UNKNOWN; |
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++ return CPU_GENERIC; |
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+ } |
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+ |
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+ char *get_corename(void){ |
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+@@ -98,7 +98,7 @@ void get_subdirname(void){ |
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+ } |
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+ |
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+ void get_cpuconfig(void){ |
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+- printf("#define UNKNOWN\n"); |
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++ printf("#define %s\n", cpuname[detect()]); |
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+ printf("#define L1_DATA_SIZE 65536\n"); |
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+ printf("#define L1_DATA_LINESIZE 32\n"); |
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+ printf("#define L2_SIZE 512488\n"); |
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+diff --git a/getarch.c b/getarch.c |
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+index 4af986fb3b..f4590769d9 100644 |
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+--- a/getarch.c |
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++++ b/getarch.c |
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+@@ -1731,7 +1731,7 @@ int main(int argc, char *argv[]){ |
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+ #ifdef FORCE |
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+ printf("CORE=%s\n", CORENAME); |
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+ #else |
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+-#if defined(INTEL_AMD) || defined(POWER) || defined(__mips__) || defined(__arm__) || defined(__aarch64__) || defined(ZARCH) || defined(sparc) || defined(__loongarch__) |
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++#if defined(INTEL_AMD) || defined(POWER) || defined(__mips__) || defined(__arm__) || defined(__aarch64__) || defined(ZARCH) || defined(sparc) || defined(__loongarch__) || defined(__riscv) |
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+ printf("CORE=%s\n", get_corename()); |
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+ #endif |
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+ #endif |
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+@@ -1879,7 +1879,7 @@ printf("ELF_VERSION=2\n"); |
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+ #ifdef FORCE |
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+ printf("#define CHAR_CORENAME \"%s\"\n", CORENAME); |
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+ #else |
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+-#if defined(INTEL_AMD) || defined(POWER) || defined(__mips__) || defined(__arm__) || defined(__aarch64__) || defined(ZARCH) || defined(sparc) || defined(__loongarch__) |
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++#if defined(INTEL_AMD) || defined(POWER) || defined(__mips__) || defined(__arm__) || defined(__aarch64__) || defined(ZARCH) || defined(sparc) || defined(__loongarch__) || defined(__riscv) |
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+ printf("#define CHAR_CORENAME \"%s\"\n", get_corename()); |
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+ #endif |
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+ #endif |
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|
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diff --git a/sci-libs/openblas/openblas-0.3.20.ebuild b/sci-libs/openblas/openblas-0.3.20.ebuild |
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index ed4ad9b91ed7..04d90c709e40 100644 |
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--- a/sci-libs/openblas/openblas-0.3.20.ebuild |
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+++ b/sci-libs/openblas/openblas-0.3.20.ebuild |
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@@ -27,6 +27,7 @@ BDEPEND="virtual/pkgconfig" |
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|
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PATCHES=( |
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"${FILESDIR}/${PN}-0.3.12-shared-blas-lapack.patch" |
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+ "${FILESDIR}/${PN}-0.3.20-fix-riscv.patch" |
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) |
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|
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pkg_pretend() { |