Gentoo Archives: gentoo-commits

From: Mike Pagano <mpagano@g.o>
To: gentoo-commits@l.g.o
Subject: [gentoo-commits] proj/linux-patches:5.10 commit in: /
Date: Wed, 15 Sep 2021 12:00:16
Message-Id: 1631707198.d91b8a390d38f10017cd604bd38bb38ae7753793.mpagano@gentoo
1 commit: d91b8a390d38f10017cd604bd38bb38ae7753793
2 Author: Mike Pagano <mpagano <AT> gentoo <DOT> org>
3 AuthorDate: Wed Sep 15 11:59:58 2021 +0000
4 Commit: Mike Pagano <mpagano <AT> gentoo <DOT> org>
5 CommitDate: Wed Sep 15 11:59:58 2021 +0000
6 URL: https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=d91b8a39
7
8 Linux patch 5.10.65
9
10 Signed-off-by: Mike Pagano <mpagano <AT> gentoo.org>
11
12 0000_README | 4 +
13 1064_linux-5.10.65.patch | 9178 ++++++++++++++++++++++++++++++++++++++++++++++
14 2 files changed, 9182 insertions(+)
15
16 diff --git a/0000_README b/0000_README
17 index 8ddd447..da11f46 100644
18 --- a/0000_README
19 +++ b/0000_README
20 @@ -299,6 +299,10 @@ Patch: 1063_linux-5.10.64.patch
21 From: http://www.kernel.org
22 Desc: Linux 5.10.64
23
24 +Patch: 1064_linux-5.10.65.patch
25 +From: http://www.kernel.org
26 +Desc: Linux 5.10.65
27 +
28 Patch: 1500_XATTR_USER_PREFIX.patch
29 From: https://bugs.gentoo.org/show_bug.cgi?id=470644
30 Desc: Support for namespace user.pax.* on tmpfs.
31
32 diff --git a/1064_linux-5.10.65.patch b/1064_linux-5.10.65.patch
33 new file mode 100644
34 index 0000000..756e792
35 --- /dev/null
36 +++ b/1064_linux-5.10.65.patch
37 @@ -0,0 +1,9178 @@
38 +diff --git a/Documentation/fault-injection/provoke-crashes.rst b/Documentation/fault-injection/provoke-crashes.rst
39 +index a20ba5d939320..18de17354206a 100644
40 +--- a/Documentation/fault-injection/provoke-crashes.rst
41 ++++ b/Documentation/fault-injection/provoke-crashes.rst
42 +@@ -29,7 +29,7 @@ recur_count
43 + cpoint_name
44 + Where in the kernel to trigger the action. It can be
45 + one of INT_HARDWARE_ENTRY, INT_HW_IRQ_EN, INT_TASKLET_ENTRY,
46 +- FS_DEVRW, MEM_SWAPOUT, TIMERADD, SCSI_DISPATCH_CMD,
47 ++ FS_DEVRW, MEM_SWAPOUT, TIMERADD, SCSI_QUEUE_RQ,
48 + IDE_CORE_CP, or DIRECT
49 +
50 + cpoint_type
51 +diff --git a/Makefile b/Makefile
52 +index 982aa1876aa04..91eb017f5296d 100644
53 +--- a/Makefile
54 ++++ b/Makefile
55 +@@ -1,7 +1,7 @@
56 + # SPDX-License-Identifier: GPL-2.0
57 + VERSION = 5
58 + PATCHLEVEL = 10
59 +-SUBLEVEL = 64
60 ++SUBLEVEL = 65
61 + EXTRAVERSION =
62 + NAME = Dare mighty things
63 +
64 +diff --git a/arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi b/arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi
65 +index 7028e21bdd980..910eacc8ad3bd 100644
66 +--- a/arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi
67 ++++ b/arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi
68 +@@ -208,12 +208,12 @@
69 + };
70 +
71 + pinctrl_hvi3c3_default: hvi3c3_default {
72 +- function = "HVI3C3";
73 ++ function = "I3C3";
74 + groups = "HVI3C3";
75 + };
76 +
77 + pinctrl_hvi3c4_default: hvi3c4_default {
78 +- function = "HVI3C4";
79 ++ function = "I3C4";
80 + groups = "HVI3C4";
81 + };
82 +
83 +diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts b/arch/arm/boot/dts/at91-sam9x60ek.dts
84 +index edca66c232c15..ebbc9b23aef1c 100644
85 +--- a/arch/arm/boot/dts/at91-sam9x60ek.dts
86 ++++ b/arch/arm/boot/dts/at91-sam9x60ek.dts
87 +@@ -92,6 +92,8 @@
88 +
89 + leds {
90 + compatible = "gpio-leds";
91 ++ pinctrl-names = "default";
92 ++ pinctrl-0 = <&pinctrl_gpio_leds>;
93 + status = "okay"; /* Conflict with pwm0. */
94 +
95 + red {
96 +@@ -537,6 +539,10 @@
97 + AT91_PIOA 19 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA19 DAT2 periph A with pullup */
98 + AT91_PIOA 20 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI)>; /* PA20 DAT3 periph A with pullup */
99 + };
100 ++ pinctrl_sdmmc0_cd: sdmmc0_cd {
101 ++ atmel,pins =
102 ++ <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
103 ++ };
104 + };
105 +
106 + sdmmc1 {
107 +@@ -569,6 +575,14 @@
108 + AT91_PIOD 16 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
109 + };
110 + };
111 ++
112 ++ leds {
113 ++ pinctrl_gpio_leds: gpio_leds {
114 ++ atmel,pins = <AT91_PIOB 11 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
115 ++ AT91_PIOB 12 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
116 ++ AT91_PIOB 13 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
117 ++ };
118 ++ };
119 + }; /* pinctrl */
120 +
121 + &pwm0 {
122 +@@ -580,7 +594,7 @@
123 + &sdmmc0 {
124 + bus-width = <4>;
125 + pinctrl-names = "default";
126 +- pinctrl-0 = <&pinctrl_sdmmc0_default>;
127 ++ pinctrl-0 = <&pinctrl_sdmmc0_default &pinctrl_sdmmc0_cd>;
128 + status = "okay";
129 + cd-gpios = <&pioA 23 GPIO_ACTIVE_LOW>;
130 + disable-wp;
131 +diff --git a/arch/arm/boot/dts/at91-sama5d3_xplained.dts b/arch/arm/boot/dts/at91-sama5d3_xplained.dts
132 +index 9c55a921263bd..cc55d1684322b 100644
133 +--- a/arch/arm/boot/dts/at91-sama5d3_xplained.dts
134 ++++ b/arch/arm/boot/dts/at91-sama5d3_xplained.dts
135 +@@ -57,6 +57,8 @@
136 + };
137 +
138 + spi0: spi@f0004000 {
139 ++ pinctrl-names = "default";
140 ++ pinctrl-0 = <&pinctrl_spi0_cs>;
141 + cs-gpios = <&pioD 13 0>, <0>, <0>, <&pioD 16 0>;
142 + status = "okay";
143 + };
144 +@@ -169,6 +171,8 @@
145 + };
146 +
147 + spi1: spi@f8008000 {
148 ++ pinctrl-names = "default";
149 ++ pinctrl-0 = <&pinctrl_spi1_cs>;
150 + cs-gpios = <&pioC 25 0>;
151 + status = "okay";
152 + };
153 +@@ -248,6 +252,26 @@
154 + <AT91_PIOE 3 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
155 + AT91_PIOE 4 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
156 + };
157 ++
158 ++ pinctrl_gpio_leds: gpio_leds_default {
159 ++ atmel,pins =
160 ++ <AT91_PIOE 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
161 ++ AT91_PIOE 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
162 ++ };
163 ++
164 ++ pinctrl_spi0_cs: spi0_cs_default {
165 ++ atmel,pins =
166 ++ <AT91_PIOD 13 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
167 ++ AT91_PIOD 16 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
168 ++ };
169 ++
170 ++ pinctrl_spi1_cs: spi1_cs_default {
171 ++ atmel,pins = <AT91_PIOC 25 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
172 ++ };
173 ++
174 ++ pinctrl_vcc_mmc0_reg_gpio: vcc_mmc0_reg_gpio_default {
175 ++ atmel,pins = <AT91_PIOE 2 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
176 ++ };
177 + };
178 + };
179 + };
180 +@@ -339,6 +363,8 @@
181 +
182 + vcc_mmc0_reg: fixedregulator_mmc0 {
183 + compatible = "regulator-fixed";
184 ++ pinctrl-names = "default";
185 ++ pinctrl-0 = <&pinctrl_vcc_mmc0_reg_gpio>;
186 + gpio = <&pioE 2 GPIO_ACTIVE_LOW>;
187 + regulator-name = "mmc0-card-supply";
188 + regulator-min-microvolt = <3300000>;
189 +@@ -362,6 +388,9 @@
190 +
191 + leds {
192 + compatible = "gpio-leds";
193 ++ pinctrl-names = "default";
194 ++ pinctrl-0 = <&pinctrl_gpio_leds>;
195 ++ status = "okay";
196 +
197 + d2 {
198 + label = "d2";
199 +diff --git a/arch/arm/boot/dts/at91-sama5d4_xplained.dts b/arch/arm/boot/dts/at91-sama5d4_xplained.dts
200 +index 0b3ad1b580b83..e42dae06b5826 100644
201 +--- a/arch/arm/boot/dts/at91-sama5d4_xplained.dts
202 ++++ b/arch/arm/boot/dts/at91-sama5d4_xplained.dts
203 +@@ -90,6 +90,8 @@
204 + };
205 +
206 + spi1: spi@fc018000 {
207 ++ pinctrl-names = "default";
208 ++ pinctrl-0 = <&pinctrl_spi0_cs>;
209 + cs-gpios = <&pioB 21 0>;
210 + status = "okay";
211 + };
212 +@@ -147,6 +149,19 @@
213 + atmel,pins =
214 + <AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
215 + };
216 ++ pinctrl_spi0_cs: spi0_cs_default {
217 ++ atmel,pins =
218 ++ <AT91_PIOB 21 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
219 ++ };
220 ++ pinctrl_gpio_leds: gpio_leds_default {
221 ++ atmel,pins =
222 ++ <AT91_PIOD 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
223 ++ AT91_PIOE 15 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
224 ++ };
225 ++ pinctrl_vcc_mmc1_reg: vcc_mmc1_reg {
226 ++ atmel,pins =
227 ++ <AT91_PIOE 4 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
228 ++ };
229 + };
230 + };
231 + };
232 +@@ -252,6 +267,8 @@
233 +
234 + leds {
235 + compatible = "gpio-leds";
236 ++ pinctrl-names = "default";
237 ++ pinctrl-0 = <&pinctrl_gpio_leds>;
238 + status = "okay";
239 +
240 + d8 {
241 +@@ -278,6 +295,8 @@
242 +
243 + vcc_mmc1_reg: fixedregulator_mmc1 {
244 + compatible = "regulator-fixed";
245 ++ pinctrl-names = "default";
246 ++ pinctrl-0 = <&pinctrl_vcc_mmc1_reg>;
247 + gpio = <&pioE 4 GPIO_ACTIVE_LOW>;
248 + regulator-name = "VDD MCI1";
249 + regulator-min-microvolt = <3300000>;
250 +diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi
251 +index 04688e8abce2c..740a6c816266c 100644
252 +--- a/arch/arm/boot/dts/meson8.dtsi
253 ++++ b/arch/arm/boot/dts/meson8.dtsi
254 +@@ -251,8 +251,13 @@
255 + "pp2", "ppmmu2", "pp4", "ppmmu4",
256 + "pp5", "ppmmu5", "pp6", "ppmmu6";
257 + resets = <&reset RESET_MALI>;
258 ++
259 + clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
260 + clock-names = "bus", "core";
261 ++
262 ++ assigned-clocks = <&clkc CLKID_MALI>;
263 ++ assigned-clock-rates = <318750000>;
264 ++
265 + operating-points-v2 = <&gpu_opp_table>;
266 + };
267 + };
268 +diff --git a/arch/arm/boot/dts/meson8b-ec100.dts b/arch/arm/boot/dts/meson8b-ec100.dts
269 +index ed06102a40140..c6824d26dbbf6 100644
270 +--- a/arch/arm/boot/dts/meson8b-ec100.dts
271 ++++ b/arch/arm/boot/dts/meson8b-ec100.dts
272 +@@ -153,7 +153,7 @@
273 + regulator-min-microvolt = <860000>;
274 + regulator-max-microvolt = <1140000>;
275 +
276 +- vin-supply = <&vcc_5v>;
277 ++ pwm-supply = <&vcc_5v>;
278 +
279 + pwms = <&pwm_cd 0 1148 0>;
280 + pwm-dutycycle-range = <100 0>;
281 +@@ -237,7 +237,7 @@
282 + regulator-min-microvolt = <860000>;
283 + regulator-max-microvolt = <1140000>;
284 +
285 +- vin-supply = <&vcc_5v>;
286 ++ pwm-supply = <&vcc_5v>;
287 +
288 + pwms = <&pwm_cd 1 1148 0>;
289 + pwm-dutycycle-range = <100 0>;
290 +diff --git a/arch/arm/boot/dts/meson8b-mxq.dts b/arch/arm/boot/dts/meson8b-mxq.dts
291 +index 33037ef62d0ad..b2edac1fce6dc 100644
292 +--- a/arch/arm/boot/dts/meson8b-mxq.dts
293 ++++ b/arch/arm/boot/dts/meson8b-mxq.dts
294 +@@ -39,6 +39,8 @@
295 + regulator-min-microvolt = <860000>;
296 + regulator-max-microvolt = <1140000>;
297 +
298 ++ pwm-supply = <&vcc_5v>;
299 ++
300 + pwms = <&pwm_cd 0 1148 0>;
301 + pwm-dutycycle-range = <100 0>;
302 +
303 +@@ -84,7 +86,7 @@
304 + regulator-min-microvolt = <860000>;
305 + regulator-max-microvolt = <1140000>;
306 +
307 +- vin-supply = <&vcc_5v>;
308 ++ pwm-supply = <&vcc_5v>;
309 +
310 + pwms = <&pwm_cd 1 1148 0>;
311 + pwm-dutycycle-range = <100 0>;
312 +diff --git a/arch/arm/boot/dts/meson8b-odroidc1.dts b/arch/arm/boot/dts/meson8b-odroidc1.dts
313 +index 5963566dbcc9d..73ce1c13da24c 100644
314 +--- a/arch/arm/boot/dts/meson8b-odroidc1.dts
315 ++++ b/arch/arm/boot/dts/meson8b-odroidc1.dts
316 +@@ -136,7 +136,7 @@
317 + regulator-min-microvolt = <860000>;
318 + regulator-max-microvolt = <1140000>;
319 +
320 +- vin-supply = <&p5v0>;
321 ++ pwm-supply = <&p5v0>;
322 +
323 + pwms = <&pwm_cd 0 12218 0>;
324 + pwm-dutycycle-range = <91 0>;
325 +@@ -168,7 +168,7 @@
326 + regulator-min-microvolt = <860000>;
327 + regulator-max-microvolt = <1140000>;
328 +
329 +- vin-supply = <&p5v0>;
330 ++ pwm-supply = <&p5v0>;
331 +
332 + pwms = <&pwm_cd 1 12218 0>;
333 + pwm-dutycycle-range = <91 0>;
334 +diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi
335 +index 7599e1a00ff51..48952a556648a 100644
336 +--- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
337 ++++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
338 +@@ -102,7 +102,7 @@
339 + #address-cells = <0>;
340 + interrupt-controller;
341 + reg = <0x11001000 0x1000>,
342 +- <0x11002000 0x1000>,
343 ++ <0x11002000 0x2000>,
344 + <0x11004000 0x2000>,
345 + <0x11006000 0x2000>;
346 + };
347 +diff --git a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts
348 +index bbd34ae12a53b..2e437f20da39b 100644
349 +--- a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts
350 ++++ b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts
351 +@@ -134,6 +134,23 @@
352 + pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;
353 + status = "okay";
354 + reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
355 ++ /*
356 ++ * U-Boot port for Turris Mox has a bug which always expects that "ranges" DT property
357 ++ * contains exactly 2 ranges with 3 (child) address cells, 2 (parent) address cells and
358 ++ * 2 size cells and also expects that the second range starts at 16 MB offset. If these
359 ++ * conditions are not met then U-Boot crashes during loading kernel DTB file. PCIe address
360 ++ * space is 128 MB long, so the best split between MEM and IO is to use fixed 16 MB window
361 ++ * for IO and the rest 112 MB (64+32+16) for MEM, despite that maximal IO size is just 64 kB.
362 ++ * This bug is not present in U-Boot ports for other Armada 3700 devices and is fixed in
363 ++ * U-Boot version 2021.07. See relevant U-Boot commits (the last one contains fix):
364 ++ * https://source.denx.de/u-boot/u-boot/-/commit/cb2ddb291ee6fcbddd6d8f4ff49089dfe580f5d7
365 ++ * https://source.denx.de/u-boot/u-boot/-/commit/c64ac3b3185aeb3846297ad7391fc6df8ecd73bf
366 ++ * https://source.denx.de/u-boot/u-boot/-/commit/4a82fca8e330157081fc132a591ebd99ba02ee33
367 ++ */
368 ++ #address-cells = <3>;
369 ++ #size-cells = <2>;
370 ++ ranges = <0x81000000 0 0xe8000000 0 0xe8000000 0 0x01000000 /* Port 0 IO */
371 ++ 0x82000000 0 0xe9000000 0 0xe9000000 0 0x07000000>; /* Port 0 MEM */
372 +
373 + /* enabled by U-Boot if PCIe module is present */
374 + status = "disabled";
375 +diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
376 +index 83d2d83f7692b..2a2015a153627 100644
377 +--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
378 ++++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
379 +@@ -487,8 +487,15 @@
380 + #interrupt-cells = <1>;
381 + msi-parent = <&pcie0>;
382 + msi-controller;
383 +- ranges = <0x82000000 0 0xe8000000 0 0xe8000000 0 0x1000000 /* Port 0 MEM */
384 +- 0x81000000 0 0xe9000000 0 0xe9000000 0 0x10000>; /* Port 0 IO*/
385 ++ /*
386 ++ * The 128 MiB address range [0xe8000000-0xf0000000] is
387 ++ * dedicated for PCIe and can be assigned to 8 windows
388 ++ * with size a power of two. Use one 64 KiB window for
389 ++ * IO at the end and the remaining seven windows
390 ++ * (totaling 127 MiB) for MEM.
391 ++ */
392 ++ ranges = <0x82000000 0 0xe8000000 0 0xe8000000 0 0x07f00000 /* Port 0 MEM */
393 ++ 0x81000000 0 0xefff0000 0 0xefff0000 0 0x00010000>; /* Port 0 IO */
394 + interrupt-map-mask = <0 0 0 7>;
395 + interrupt-map = <0 0 0 1 &pcie_intc 0>,
396 + <0 0 0 2 &pcie_intc 1>,
397 +diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi
398 +index e3773b05c403b..3c73dfc430afc 100644
399 +--- a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi
400 ++++ b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi
401 +@@ -55,7 +55,8 @@
402 + pinctrl-0 = <&avb_pins>;
403 + pinctrl-names = "default";
404 + phy-handle = <&phy0>;
405 +- phy-mode = "rgmii-id";
406 ++ rx-internal-delay-ps = <1800>;
407 ++ tx-internal-delay-ps = <2000>;
408 + status = "okay";
409 +
410 + phy0: ethernet-phy@0 {
411 +diff --git a/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi b/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi
412 +index b9e46aed53362..dde3a07bc417c 100644
413 +--- a/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi
414 ++++ b/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi
415 +@@ -19,7 +19,8 @@
416 + pinctrl-0 = <&avb_pins>;
417 + pinctrl-names = "default";
418 + phy-handle = <&phy0>;
419 +- phy-mode = "rgmii-txid";
420 ++ tx-internal-delay-ps = <2000>;
421 ++ rx-internal-delay-ps = <1800>;
422 + status = "okay";
423 +
424 + phy0: ethernet-phy@0 {
425 +diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
426 +index c58a0846db502..a5ebe574fbace 100644
427 +--- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
428 ++++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
429 +@@ -1131,6 +1131,8 @@
430 + power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
431 + resets = <&cpg 812>;
432 + phy-mode = "rgmii";
433 ++ rx-internal-delay-ps = <0>;
434 ++ tx-internal-delay-ps = <0>;
435 + iommus = <&ipmmu_ds0 16>;
436 + #address-cells = <1>;
437 + #size-cells = <0>;
438 +diff --git a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
439 +index 9ebf6e58ba31c..20003a41a706b 100644
440 +--- a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
441 ++++ b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
442 +@@ -1004,6 +1004,8 @@
443 + power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
444 + resets = <&cpg 812>;
445 + phy-mode = "rgmii";
446 ++ rx-internal-delay-ps = <0>;
447 ++ tx-internal-delay-ps = <0>;
448 + iommus = <&ipmmu_ds0 16>;
449 + #address-cells = <1>;
450 + #size-cells = <0>;
451 +diff --git a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
452 +index f27d9b2eb996b..e0e54342cd4c7 100644
453 +--- a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
454 ++++ b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
455 +@@ -960,6 +960,7 @@
456 + power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
457 + resets = <&cpg 812>;
458 + phy-mode = "rgmii";
459 ++ rx-internal-delay-ps = <0>;
460 + iommus = <&ipmmu_ds0 16>;
461 + #address-cells = <1>;
462 + #size-cells = <0>;
463 +diff --git a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
464 +index 708258696b4f4..2e6c12a46daf5 100644
465 +--- a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
466 ++++ b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
467 +@@ -1233,6 +1233,8 @@
468 + power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
469 + resets = <&cpg 812>;
470 + phy-mode = "rgmii";
471 ++ rx-internal-delay-ps = <0>;
472 ++ tx-internal-delay-ps = <0>;
473 + iommus = <&ipmmu_ds0 16>;
474 + #address-cells = <1>;
475 + #size-cells = <0>;
476 +diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
477 +index 8f471881b7a36..2e4bb7ecd5bde 100644
478 +--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
479 ++++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
480 +@@ -277,10 +277,6 @@
481 + interrupt-parent = <&gpio1>;
482 + interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
483 +
484 +- /* Depends on LVDS */
485 +- max-clock = <135000000>;
486 +- min-vrefresh = <50>;
487 +-
488 + adi,input-depth = <8>;
489 + adi,input-colorspace = "rgb";
490 + adi,input-clock = "1x";
491 +diff --git a/arch/m68k/Kconfig.cpu b/arch/m68k/Kconfig.cpu
492 +index 694c4fca9f5dc..c17205da47fe3 100644
493 +--- a/arch/m68k/Kconfig.cpu
494 ++++ b/arch/m68k/Kconfig.cpu
495 +@@ -25,6 +25,7 @@ config COLDFIRE
496 + bool "Coldfire CPU family support"
497 + select ARCH_HAVE_CUSTOM_GPIO_H
498 + select CPU_HAS_NO_BITFIELDS
499 ++ select CPU_HAS_NO_CAS
500 + select CPU_HAS_NO_MULDIV64
501 + select GENERIC_CSUM
502 + select GPIOLIB
503 +@@ -38,6 +39,7 @@ config M68000
504 + bool "MC68000"
505 + depends on !MMU
506 + select CPU_HAS_NO_BITFIELDS
507 ++ select CPU_HAS_NO_CAS
508 + select CPU_HAS_NO_MULDIV64
509 + select CPU_HAS_NO_UNALIGNED
510 + select GENERIC_CSUM
511 +@@ -53,6 +55,7 @@ config M68000
512 + config MCPU32
513 + bool
514 + select CPU_HAS_NO_BITFIELDS
515 ++ select CPU_HAS_NO_CAS
516 + select CPU_HAS_NO_UNALIGNED
517 + select CPU_NO_EFFICIENT_FFS
518 + help
519 +@@ -357,7 +360,7 @@ config ADVANCED
520 +
521 + config RMW_INSNS
522 + bool "Use read-modify-write instructions"
523 +- depends on ADVANCED
524 ++ depends on ADVANCED && !CPU_HAS_NO_CAS
525 + help
526 + This allows to use certain instructions that work with indivisible
527 + read-modify-write bus cycles. While this is faster than the
528 +@@ -411,6 +414,9 @@ config NODES_SHIFT
529 + config CPU_HAS_NO_BITFIELDS
530 + bool
531 +
532 ++config CPU_HAS_NO_CAS
533 ++ bool
534 ++
535 + config CPU_HAS_NO_MULDIV64
536 + bool
537 +
538 +diff --git a/arch/m68k/emu/nfeth.c b/arch/m68k/emu/nfeth.c
539 +index d2875e32abfca..79e55421cfb18 100644
540 +--- a/arch/m68k/emu/nfeth.c
541 ++++ b/arch/m68k/emu/nfeth.c
542 +@@ -254,8 +254,8 @@ static void __exit nfeth_cleanup(void)
543 +
544 + for (i = 0; i < MAX_UNIT; i++) {
545 + if (nfeth_dev[i]) {
546 +- unregister_netdev(nfeth_dev[0]);
547 +- free_netdev(nfeth_dev[0]);
548 ++ unregister_netdev(nfeth_dev[i]);
549 ++ free_netdev(nfeth_dev[i]);
550 + }
551 + }
552 + free_irq(nfEtherIRQ, nfeth_interrupt);
553 +diff --git a/arch/s390/include/asm/kvm_host.h b/arch/s390/include/asm/kvm_host.h
554 +index 463c24e26000f..171913b9a9250 100644
555 +--- a/arch/s390/include/asm/kvm_host.h
556 ++++ b/arch/s390/include/asm/kvm_host.h
557 +@@ -957,6 +957,7 @@ struct kvm_arch{
558 + atomic64_t cmma_dirty_pages;
559 + /* subset of available cpu features enabled by user space */
560 + DECLARE_BITMAP(cpu_feat, KVM_S390_VM_CPU_FEAT_NR_BITS);
561 ++ /* indexed by vcpu_idx */
562 + DECLARE_BITMAP(idle_mask, KVM_MAX_VCPUS);
563 + struct kvm_s390_gisa_interrupt gisa_int;
564 + struct kvm_s390_pv pv;
565 +diff --git a/arch/s390/kernel/debug.c b/arch/s390/kernel/debug.c
566 +index b6619ae9a3e0c..89fbfb3b1e01d 100644
567 +--- a/arch/s390/kernel/debug.c
568 ++++ b/arch/s390/kernel/debug.c
569 +@@ -24,6 +24,7 @@
570 + #include <linux/export.h>
571 + #include <linux/init.h>
572 + #include <linux/fs.h>
573 ++#include <linux/minmax.h>
574 + #include <linux/debugfs.h>
575 +
576 + #include <asm/debug.h>
577 +@@ -92,6 +93,8 @@ static int debug_hex_ascii_format_fn(debug_info_t *id, struct debug_view *view,
578 + char *out_buf, const char *in_buf);
579 + static int debug_sprintf_format_fn(debug_info_t *id, struct debug_view *view,
580 + char *out_buf, debug_sprintf_entry_t *curr_event);
581 ++static void debug_areas_swap(debug_info_t *a, debug_info_t *b);
582 ++static void debug_events_append(debug_info_t *dest, debug_info_t *src);
583 +
584 + /* globals */
585 +
586 +@@ -311,24 +314,6 @@ static debug_info_t *debug_info_create(const char *name, int pages_per_area,
587 + goto out;
588 +
589 + rc->mode = mode & ~S_IFMT;
590 +-
591 +- /* create root directory */
592 +- rc->debugfs_root_entry = debugfs_create_dir(rc->name,
593 +- debug_debugfs_root_entry);
594 +-
595 +- /* append new element to linked list */
596 +- if (!debug_area_first) {
597 +- /* first element in list */
598 +- debug_area_first = rc;
599 +- rc->prev = NULL;
600 +- } else {
601 +- /* append element to end of list */
602 +- debug_area_last->next = rc;
603 +- rc->prev = debug_area_last;
604 +- }
605 +- debug_area_last = rc;
606 +- rc->next = NULL;
607 +-
608 + refcount_set(&rc->ref_count, 1);
609 + out:
610 + return rc;
611 +@@ -388,27 +373,10 @@ static void debug_info_get(debug_info_t *db_info)
612 + */
613 + static void debug_info_put(debug_info_t *db_info)
614 + {
615 +- int i;
616 +-
617 + if (!db_info)
618 + return;
619 +- if (refcount_dec_and_test(&db_info->ref_count)) {
620 +- for (i = 0; i < DEBUG_MAX_VIEWS; i++) {
621 +- if (!db_info->views[i])
622 +- continue;
623 +- debugfs_remove(db_info->debugfs_entries[i]);
624 +- }
625 +- debugfs_remove(db_info->debugfs_root_entry);
626 +- if (db_info == debug_area_first)
627 +- debug_area_first = db_info->next;
628 +- if (db_info == debug_area_last)
629 +- debug_area_last = db_info->prev;
630 +- if (db_info->prev)
631 +- db_info->prev->next = db_info->next;
632 +- if (db_info->next)
633 +- db_info->next->prev = db_info->prev;
634 ++ if (refcount_dec_and_test(&db_info->ref_count))
635 + debug_info_free(db_info);
636 +- }
637 + }
638 +
639 + /*
640 +@@ -632,6 +600,31 @@ static int debug_close(struct inode *inode, struct file *file)
641 + return 0; /* success */
642 + }
643 +
644 ++/* Create debugfs entries and add to internal list. */
645 ++static void _debug_register(debug_info_t *id)
646 ++{
647 ++ /* create root directory */
648 ++ id->debugfs_root_entry = debugfs_create_dir(id->name,
649 ++ debug_debugfs_root_entry);
650 ++
651 ++ /* append new element to linked list */
652 ++ if (!debug_area_first) {
653 ++ /* first element in list */
654 ++ debug_area_first = id;
655 ++ id->prev = NULL;
656 ++ } else {
657 ++ /* append element to end of list */
658 ++ debug_area_last->next = id;
659 ++ id->prev = debug_area_last;
660 ++ }
661 ++ debug_area_last = id;
662 ++ id->next = NULL;
663 ++
664 ++ debug_register_view(id, &debug_level_view);
665 ++ debug_register_view(id, &debug_flush_view);
666 ++ debug_register_view(id, &debug_pages_view);
667 ++}
668 ++
669 + /**
670 + * debug_register_mode() - creates and initializes debug area.
671 + *
672 +@@ -661,19 +654,16 @@ debug_info_t *debug_register_mode(const char *name, int pages_per_area,
673 + if ((uid != 0) || (gid != 0))
674 + pr_warn("Root becomes the owner of all s390dbf files in sysfs\n");
675 + BUG_ON(!initialized);
676 +- mutex_lock(&debug_mutex);
677 +
678 + /* create new debug_info */
679 + rc = debug_info_create(name, pages_per_area, nr_areas, buf_size, mode);
680 +- if (!rc)
681 +- goto out;
682 +- debug_register_view(rc, &debug_level_view);
683 +- debug_register_view(rc, &debug_flush_view);
684 +- debug_register_view(rc, &debug_pages_view);
685 +-out:
686 +- if (!rc)
687 ++ if (rc) {
688 ++ mutex_lock(&debug_mutex);
689 ++ _debug_register(rc);
690 ++ mutex_unlock(&debug_mutex);
691 ++ } else {
692 + pr_err("Registering debug feature %s failed\n", name);
693 +- mutex_unlock(&debug_mutex);
694 ++ }
695 + return rc;
696 + }
697 + EXPORT_SYMBOL(debug_register_mode);
698 +@@ -702,6 +692,27 @@ debug_info_t *debug_register(const char *name, int pages_per_area,
699 + }
700 + EXPORT_SYMBOL(debug_register);
701 +
702 ++/* Remove debugfs entries and remove from internal list. */
703 ++static void _debug_unregister(debug_info_t *id)
704 ++{
705 ++ int i;
706 ++
707 ++ for (i = 0; i < DEBUG_MAX_VIEWS; i++) {
708 ++ if (!id->views[i])
709 ++ continue;
710 ++ debugfs_remove(id->debugfs_entries[i]);
711 ++ }
712 ++ debugfs_remove(id->debugfs_root_entry);
713 ++ if (id == debug_area_first)
714 ++ debug_area_first = id->next;
715 ++ if (id == debug_area_last)
716 ++ debug_area_last = id->prev;
717 ++ if (id->prev)
718 ++ id->prev->next = id->next;
719 ++ if (id->next)
720 ++ id->next->prev = id->prev;
721 ++}
722 ++
723 + /**
724 + * debug_unregister() - give back debug area.
725 + *
726 +@@ -715,8 +726,10 @@ void debug_unregister(debug_info_t *id)
727 + if (!id)
728 + return;
729 + mutex_lock(&debug_mutex);
730 +- debug_info_put(id);
731 ++ _debug_unregister(id);
732 + mutex_unlock(&debug_mutex);
733 ++
734 ++ debug_info_put(id);
735 + }
736 + EXPORT_SYMBOL(debug_unregister);
737 +
738 +@@ -726,35 +739,28 @@ EXPORT_SYMBOL(debug_unregister);
739 + */
740 + static int debug_set_size(debug_info_t *id, int nr_areas, int pages_per_area)
741 + {
742 +- debug_entry_t ***new_areas;
743 ++ debug_info_t *new_id;
744 + unsigned long flags;
745 +- int rc = 0;
746 +
747 + if (!id || (nr_areas <= 0) || (pages_per_area < 0))
748 + return -EINVAL;
749 +- if (pages_per_area > 0) {
750 +- new_areas = debug_areas_alloc(pages_per_area, nr_areas);
751 +- if (!new_areas) {
752 +- pr_info("Allocating memory for %i pages failed\n",
753 +- pages_per_area);
754 +- rc = -ENOMEM;
755 +- goto out;
756 +- }
757 +- } else {
758 +- new_areas = NULL;
759 ++
760 ++ new_id = debug_info_alloc("", pages_per_area, nr_areas, id->buf_size,
761 ++ id->level, ALL_AREAS);
762 ++ if (!new_id) {
763 ++ pr_info("Allocating memory for %i pages failed\n",
764 ++ pages_per_area);
765 ++ return -ENOMEM;
766 + }
767 ++
768 + spin_lock_irqsave(&id->lock, flags);
769 +- debug_areas_free(id);
770 +- id->areas = new_areas;
771 +- id->nr_areas = nr_areas;
772 +- id->pages_per_area = pages_per_area;
773 +- id->active_area = 0;
774 +- memset(id->active_entries, 0, sizeof(int)*id->nr_areas);
775 +- memset(id->active_pages, 0, sizeof(int)*id->nr_areas);
776 ++ debug_events_append(new_id, id);
777 ++ debug_areas_swap(new_id, id);
778 ++ debug_info_free(new_id);
779 + spin_unlock_irqrestore(&id->lock, flags);
780 + pr_info("%s: set new size (%i pages)\n", id->name, pages_per_area);
781 +-out:
782 +- return rc;
783 ++
784 ++ return 0;
785 + }
786 +
787 + /**
788 +@@ -821,6 +827,42 @@ static inline debug_entry_t *get_active_entry(debug_info_t *id)
789 + id->active_entries[id->active_area]);
790 + }
791 +
792 ++/* Swap debug areas of a and b. */
793 ++static void debug_areas_swap(debug_info_t *a, debug_info_t *b)
794 ++{
795 ++ swap(a->nr_areas, b->nr_areas);
796 ++ swap(a->pages_per_area, b->pages_per_area);
797 ++ swap(a->areas, b->areas);
798 ++ swap(a->active_area, b->active_area);
799 ++ swap(a->active_pages, b->active_pages);
800 ++ swap(a->active_entries, b->active_entries);
801 ++}
802 ++
803 ++/* Append all debug events in active area from source to destination log. */
804 ++static void debug_events_append(debug_info_t *dest, debug_info_t *src)
805 ++{
806 ++ debug_entry_t *from, *to, *last;
807 ++
808 ++ if (!src->areas || !dest->areas)
809 ++ return;
810 ++
811 ++ /* Loop over all entries in src, starting with oldest. */
812 ++ from = get_active_entry(src);
813 ++ last = from;
814 ++ do {
815 ++ if (from->clock != 0LL) {
816 ++ to = get_active_entry(dest);
817 ++ memset(to, 0, dest->entry_size);
818 ++ memcpy(to, from, min(src->entry_size,
819 ++ dest->entry_size));
820 ++ proceed_active_entry(dest);
821 ++ }
822 ++
823 ++ proceed_active_entry(src);
824 ++ from = get_active_entry(src);
825 ++ } while (from != last);
826 ++}
827 ++
828 + /*
829 + * debug_finish_entry:
830 + * - set timestamp, caller address, cpu number etc.
831 +diff --git a/arch/s390/kvm/interrupt.c b/arch/s390/kvm/interrupt.c
832 +index 2f177298c663b..2bb9996ff09b4 100644
833 +--- a/arch/s390/kvm/interrupt.c
834 ++++ b/arch/s390/kvm/interrupt.c
835 +@@ -419,13 +419,13 @@ static unsigned long deliverable_irqs(struct kvm_vcpu *vcpu)
836 + static void __set_cpu_idle(struct kvm_vcpu *vcpu)
837 + {
838 + kvm_s390_set_cpuflags(vcpu, CPUSTAT_WAIT);
839 +- set_bit(vcpu->vcpu_id, vcpu->kvm->arch.idle_mask);
840 ++ set_bit(kvm_vcpu_get_idx(vcpu), vcpu->kvm->arch.idle_mask);
841 + }
842 +
843 + static void __unset_cpu_idle(struct kvm_vcpu *vcpu)
844 + {
845 + kvm_s390_clear_cpuflags(vcpu, CPUSTAT_WAIT);
846 +- clear_bit(vcpu->vcpu_id, vcpu->kvm->arch.idle_mask);
847 ++ clear_bit(kvm_vcpu_get_idx(vcpu), vcpu->kvm->arch.idle_mask);
848 + }
849 +
850 + static void __reset_intercept_indicators(struct kvm_vcpu *vcpu)
851 +@@ -3050,18 +3050,18 @@ int kvm_s390_get_irq_state(struct kvm_vcpu *vcpu, __u8 __user *buf, int len)
852 +
853 + static void __airqs_kick_single_vcpu(struct kvm *kvm, u8 deliverable_mask)
854 + {
855 +- int vcpu_id, online_vcpus = atomic_read(&kvm->online_vcpus);
856 ++ int vcpu_idx, online_vcpus = atomic_read(&kvm->online_vcpus);
857 + struct kvm_s390_gisa_interrupt *gi = &kvm->arch.gisa_int;
858 + struct kvm_vcpu *vcpu;
859 +
860 +- for_each_set_bit(vcpu_id, kvm->arch.idle_mask, online_vcpus) {
861 +- vcpu = kvm_get_vcpu(kvm, vcpu_id);
862 ++ for_each_set_bit(vcpu_idx, kvm->arch.idle_mask, online_vcpus) {
863 ++ vcpu = kvm_get_vcpu(kvm, vcpu_idx);
864 + if (psw_ioint_disabled(vcpu))
865 + continue;
866 + deliverable_mask &= (u8)(vcpu->arch.sie_block->gcr[6] >> 24);
867 + if (deliverable_mask) {
868 + /* lately kicked but not yet running */
869 +- if (test_and_set_bit(vcpu_id, gi->kicked_mask))
870 ++ if (test_and_set_bit(vcpu_idx, gi->kicked_mask))
871 + return;
872 + kvm_s390_vcpu_wakeup(vcpu);
873 + return;
874 +diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c
875 +index f94b4f78d4dab..7f719b468b440 100644
876 +--- a/arch/s390/kvm/kvm-s390.c
877 ++++ b/arch/s390/kvm/kvm-s390.c
878 +@@ -4015,7 +4015,7 @@ static int vcpu_pre_run(struct kvm_vcpu *vcpu)
879 + kvm_s390_patch_guest_per_regs(vcpu);
880 + }
881 +
882 +- clear_bit(vcpu->vcpu_id, vcpu->kvm->arch.gisa_int.kicked_mask);
883 ++ clear_bit(kvm_vcpu_get_idx(vcpu), vcpu->kvm->arch.gisa_int.kicked_mask);
884 +
885 + vcpu->arch.sie_block->icptcode = 0;
886 + cpuflags = atomic_read(&vcpu->arch.sie_block->cpuflags);
887 +diff --git a/arch/s390/kvm/kvm-s390.h b/arch/s390/kvm/kvm-s390.h
888 +index 79dcd647b378d..2d134833bca69 100644
889 +--- a/arch/s390/kvm/kvm-s390.h
890 ++++ b/arch/s390/kvm/kvm-s390.h
891 +@@ -79,7 +79,7 @@ static inline int is_vcpu_stopped(struct kvm_vcpu *vcpu)
892 +
893 + static inline int is_vcpu_idle(struct kvm_vcpu *vcpu)
894 + {
895 +- return test_bit(vcpu->vcpu_id, vcpu->kvm->arch.idle_mask);
896 ++ return test_bit(kvm_vcpu_get_idx(vcpu), vcpu->kvm->arch.idle_mask);
897 + }
898 +
899 + static inline int kvm_is_ucontrol(struct kvm *kvm)
900 +diff --git a/arch/s390/mm/kasan_init.c b/arch/s390/mm/kasan_init.c
901 +index 5646b39c728a9..e9a9b7b616bc1 100644
902 +--- a/arch/s390/mm/kasan_init.c
903 ++++ b/arch/s390/mm/kasan_init.c
904 +@@ -108,6 +108,9 @@ static void __init kasan_early_vmemmap_populate(unsigned long address,
905 + sgt_prot &= ~_SEGMENT_ENTRY_NOEXEC;
906 + }
907 +
908 ++ /*
909 ++ * The first 1MB of 1:1 mapping is mapped with 4KB pages
910 ++ */
911 + while (address < end) {
912 + pg_dir = pgd_offset_k(address);
913 + if (pgd_none(*pg_dir)) {
914 +@@ -165,30 +168,26 @@ static void __init kasan_early_vmemmap_populate(unsigned long address,
915 +
916 + pm_dir = pmd_offset(pu_dir, address);
917 + if (pmd_none(*pm_dir)) {
918 +- if (mode == POPULATE_ZERO_SHADOW &&
919 +- IS_ALIGNED(address, PMD_SIZE) &&
920 ++ if (IS_ALIGNED(address, PMD_SIZE) &&
921 + end - address >= PMD_SIZE) {
922 +- pmd_populate(&init_mm, pm_dir,
923 +- kasan_early_shadow_pte);
924 +- address = (address + PMD_SIZE) & PMD_MASK;
925 +- continue;
926 +- }
927 +- /* the first megabyte of 1:1 is mapped with 4k pages */
928 +- if (has_edat && address && end - address >= PMD_SIZE &&
929 +- mode != POPULATE_ZERO_SHADOW) {
930 +- void *page;
931 +-
932 +- if (mode == POPULATE_ONE2ONE) {
933 +- page = (void *)address;
934 +- } else {
935 +- page = kasan_early_alloc_segment();
936 +- memset(page, 0, _SEGMENT_SIZE);
937 ++ if (mode == POPULATE_ZERO_SHADOW) {
938 ++ pmd_populate(&init_mm, pm_dir, kasan_early_shadow_pte);
939 ++ address = (address + PMD_SIZE) & PMD_MASK;
940 ++ continue;
941 ++ } else if (has_edat && address) {
942 ++ void *page;
943 ++
944 ++ if (mode == POPULATE_ONE2ONE) {
945 ++ page = (void *)address;
946 ++ } else {
947 ++ page = kasan_early_alloc_segment();
948 ++ memset(page, 0, _SEGMENT_SIZE);
949 ++ }
950 ++ pmd_val(*pm_dir) = __pa(page) | sgt_prot;
951 ++ address = (address + PMD_SIZE) & PMD_MASK;
952 ++ continue;
953 + }
954 +- pmd_val(*pm_dir) = __pa(page) | sgt_prot;
955 +- address = (address + PMD_SIZE) & PMD_MASK;
956 +- continue;
957 + }
958 +-
959 + pt_dir = kasan_early_pte_alloc();
960 + pmd_populate(&init_mm, pm_dir, pt_dir);
961 + } else if (pmd_large(*pm_dir)) {
962 +diff --git a/arch/s390/pci/pci.c b/arch/s390/pci/pci.c
963 +index ca1a105e3b5d4..0ddb1fe353dc8 100644
964 +--- a/arch/s390/pci/pci.c
965 ++++ b/arch/s390/pci/pci.c
966 +@@ -659,9 +659,10 @@ int zpci_enable_device(struct zpci_dev *zdev)
967 + {
968 + int rc;
969 +
970 +- rc = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES);
971 +- if (rc)
972 ++ if (clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES)) {
973 ++ rc = -EIO;
974 + goto out;
975 ++ }
976 +
977 + rc = zpci_dma_init_device(zdev);
978 + if (rc)
979 +@@ -684,7 +685,7 @@ int zpci_disable_device(struct zpci_dev *zdev)
980 + * The zPCI function may already be disabled by the platform, this is
981 + * detected in clp_disable_fh() which becomes a no-op.
982 + */
983 +- return clp_disable_fh(zdev);
984 ++ return clp_disable_fh(zdev) ? -EIO : 0;
985 + }
986 + EXPORT_SYMBOL_GPL(zpci_disable_device);
987 +
988 +diff --git a/arch/s390/pci/pci_clp.c b/arch/s390/pci/pci_clp.c
989 +index d3331596ddbe1..0a0e8b8293bef 100644
990 +--- a/arch/s390/pci/pci_clp.c
991 ++++ b/arch/s390/pci/pci_clp.c
992 +@@ -213,15 +213,19 @@ out:
993 + }
994 +
995 + static int clp_refresh_fh(u32 fid);
996 +-/*
997 +- * Enable/Disable a given PCI function and update its function handle if
998 +- * necessary
999 ++/**
1000 ++ * clp_set_pci_fn() - Execute a command on a PCI function
1001 ++ * @zdev: Function that will be affected
1002 ++ * @nr_dma_as: DMA address space number
1003 ++ * @command: The command code to execute
1004 ++ *
1005 ++ * Returns: 0 on success, < 0 for Linux errors (e.g. -ENOMEM), and
1006 ++ * > 0 for non-success platform responses
1007 + */
1008 + static int clp_set_pci_fn(struct zpci_dev *zdev, u8 nr_dma_as, u8 command)
1009 + {
1010 + struct clp_req_rsp_set_pci *rrb;
1011 + int rc, retries = 100;
1012 +- u32 fid = zdev->fid;
1013 +
1014 + rrb = clp_alloc_block(GFP_KERNEL);
1015 + if (!rrb)
1016 +@@ -245,17 +249,16 @@ static int clp_set_pci_fn(struct zpci_dev *zdev, u8 nr_dma_as, u8 command)
1017 + }
1018 + } while (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY);
1019 +
1020 +- if (rc || rrb->response.hdr.rsp != CLP_RC_OK) {
1021 +- zpci_err("Set PCI FN:\n");
1022 +- zpci_err_clp(rrb->response.hdr.rsp, rc);
1023 +- }
1024 +-
1025 + if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {
1026 + zdev->fh = rrb->response.fh;
1027 +- } else if (!rc && rrb->response.hdr.rsp == CLP_RC_SETPCIFN_ALRDY &&
1028 +- rrb->response.fh == 0) {
1029 ++ } else if (!rc && rrb->response.hdr.rsp == CLP_RC_SETPCIFN_ALRDY) {
1030 + /* Function is already in desired state - update handle */
1031 +- rc = clp_refresh_fh(fid);
1032 ++ rc = clp_refresh_fh(zdev->fid);
1033 ++ } else {
1034 ++ zpci_err("Set PCI FN:\n");
1035 ++ zpci_err_clp(rrb->response.hdr.rsp, rc);
1036 ++ if (!rc)
1037 ++ rc = rrb->response.hdr.rsp;
1038 + }
1039 + clp_free_block(rrb);
1040 + return rc;
1041 +@@ -301,17 +304,13 @@ int clp_enable_fh(struct zpci_dev *zdev, u8 nr_dma_as)
1042 +
1043 + rc = clp_set_pci_fn(zdev, nr_dma_as, CLP_SET_ENABLE_PCI_FN);
1044 + zpci_dbg(3, "ena fid:%x, fh:%x, rc:%d\n", zdev->fid, zdev->fh, rc);
1045 +- if (rc)
1046 +- goto out;
1047 +-
1048 +- if (zpci_use_mio(zdev)) {
1049 ++ if (!rc && zpci_use_mio(zdev)) {
1050 + rc = clp_set_pci_fn(zdev, nr_dma_as, CLP_SET_ENABLE_MIO);
1051 + zpci_dbg(3, "ena mio fid:%x, fh:%x, rc:%d\n",
1052 + zdev->fid, zdev->fh, rc);
1053 + if (rc)
1054 + clp_disable_fh(zdev);
1055 + }
1056 +-out:
1057 + return rc;
1058 + }
1059 +
1060 +diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c
1061 +index 921f47b9bb247..ccc9ee1971e89 100644
1062 +--- a/arch/x86/events/amd/ibs.c
1063 ++++ b/arch/x86/events/amd/ibs.c
1064 +@@ -571,6 +571,7 @@ static struct perf_ibs perf_ibs_op = {
1065 + .start = perf_ibs_start,
1066 + .stop = perf_ibs_stop,
1067 + .read = perf_ibs_read,
1068 ++ .capabilities = PERF_PMU_CAP_NO_EXCLUDE,
1069 + },
1070 + .msr = MSR_AMD64_IBSOPCTL,
1071 + .config_mask = IBS_OP_CONFIG_MASK,
1072 +diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
1073 +index fc25c88c7ff29..9b5ff423e9398 100644
1074 +--- a/arch/x86/include/asm/mce.h
1075 ++++ b/arch/x86/include/asm/mce.h
1076 +@@ -259,6 +259,7 @@ enum mcp_flags {
1077 + MCP_TIMESTAMP = BIT(0), /* log time stamp */
1078 + MCP_UC = BIT(1), /* log uncorrected errors */
1079 + MCP_DONTLOG = BIT(2), /* only clear, don't log */
1080 ++ MCP_QUEUE_LOG = BIT(3), /* only queue to genpool */
1081 + };
1082 + bool machine_check_poll(enum mcp_flags flags, mce_banks_t *b);
1083 +
1084 +diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
1085 +index b7a27589dfa0b..056d0367864e9 100644
1086 +--- a/arch/x86/kernel/cpu/mce/core.c
1087 ++++ b/arch/x86/kernel/cpu/mce/core.c
1088 +@@ -817,7 +817,10 @@ log_it:
1089 + if (mca_cfg.dont_log_ce && !mce_usable_address(&m))
1090 + goto clear_it;
1091 +
1092 +- mce_log(&m);
1093 ++ if (flags & MCP_QUEUE_LOG)
1094 ++ mce_gen_pool_add(&m);
1095 ++ else
1096 ++ mce_log(&m);
1097 +
1098 + clear_it:
1099 + /*
1100 +@@ -1628,10 +1631,12 @@ static void __mcheck_cpu_init_generic(void)
1101 + m_fl = MCP_DONTLOG;
1102 +
1103 + /*
1104 +- * Log the machine checks left over from the previous reset.
1105 ++ * Log the machine checks left over from the previous reset. Log them
1106 ++ * only, do not start processing them. That will happen in mcheck_late_init()
1107 ++ * when all consumers have been registered on the notifier chain.
1108 + */
1109 + bitmap_fill(all_banks, MAX_NR_BANKS);
1110 +- machine_check_poll(MCP_UC | m_fl, &all_banks);
1111 ++ machine_check_poll(MCP_UC | MCP_QUEUE_LOG | m_fl, &all_banks);
1112 +
1113 + cr4_set_bits(X86_CR4_MCE);
1114 +
1115 +diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/resctrl/monitor.c
1116 +index 3075624723b27..576f16a505e37 100644
1117 +--- a/arch/x86/kernel/cpu/resctrl/monitor.c
1118 ++++ b/arch/x86/kernel/cpu/resctrl/monitor.c
1119 +@@ -241,6 +241,12 @@ static u64 __mon_event_count(u32 rmid, struct rmid_read *rr)
1120 + case QOS_L3_MBM_LOCAL_EVENT_ID:
1121 + m = &rr->d->mbm_local[rmid];
1122 + break;
1123 ++ default:
1124 ++ /*
1125 ++ * Code would never reach here because an invalid
1126 ++ * event id would fail the __rmid_read.
1127 ++ */
1128 ++ return RMID_VAL_ERROR;
1129 + }
1130 +
1131 + if (rr->first) {
1132 +diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c
1133 +index 5e25d93ec7d08..060d9a906535c 100644
1134 +--- a/arch/x86/kvm/mmu/mmu.c
1135 ++++ b/arch/x86/kvm/mmu/mmu.c
1136 +@@ -267,12 +267,6 @@ static bool check_mmio_spte(struct kvm_vcpu *vcpu, u64 spte)
1137 + static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
1138 + struct x86_exception *exception)
1139 + {
1140 +- /* Check if guest physical address doesn't exceed guest maximum */
1141 +- if (kvm_vcpu_is_illegal_gpa(vcpu, gpa)) {
1142 +- exception->error_code |= PFERR_RSVD_MASK;
1143 +- return UNMAPPED_GVA;
1144 +- }
1145 +-
1146 + return gpa;
1147 + }
1148 +
1149 +diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c
1150 +index e0c7910207c0f..d5f24a2f3e916 100644
1151 +--- a/arch/x86/kvm/vmx/nested.c
1152 ++++ b/arch/x86/kvm/vmx/nested.c
1153 +@@ -2243,12 +2243,11 @@ static void prepare_vmcs02_early(struct vcpu_vmx *vmx, struct vmcs12 *vmcs12)
1154 + ~PIN_BASED_VMX_PREEMPTION_TIMER);
1155 +
1156 + /* Posted interrupts setting is only taken from vmcs12. */
1157 +- if (nested_cpu_has_posted_intr(vmcs12)) {
1158 ++ vmx->nested.pi_pending = false;
1159 ++ if (nested_cpu_has_posted_intr(vmcs12))
1160 + vmx->nested.posted_intr_nv = vmcs12->posted_intr_nv;
1161 +- vmx->nested.pi_pending = false;
1162 +- } else {
1163 ++ else
1164 + exec_control &= ~PIN_BASED_POSTED_INTR;
1165 +- }
1166 + pin_controls_set(vmx, exec_control);
1167 +
1168 + /*
1169 +diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
1170 +index de24d3826788a..fcd8bcb7e0ea9 100644
1171 +--- a/arch/x86/kvm/vmx/vmx.c
1172 ++++ b/arch/x86/kvm/vmx/vmx.c
1173 +@@ -6396,6 +6396,9 @@ static void vmx_handle_exit_irqoff(struct kvm_vcpu *vcpu)
1174 + {
1175 + struct vcpu_vmx *vmx = to_vmx(vcpu);
1176 +
1177 ++ if (vmx->emulation_required)
1178 ++ return;
1179 ++
1180 + if (vmx->exit_reason.basic == EXIT_REASON_EXTERNAL_INTERRUPT)
1181 + handle_external_interrupt_irqoff(vcpu);
1182 + else if (vmx->exit_reason.basic == EXIT_REASON_EXCEPTION_NMI)
1183 +diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
1184 +index 812585986bb82..75c59ad27e9fd 100644
1185 +--- a/arch/x86/kvm/x86.c
1186 ++++ b/arch/x86/kvm/x86.c
1187 +@@ -3116,6 +3116,10 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1188 + if (!msr_info->host_initiated) {
1189 + s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
1190 + adjust_tsc_offset_guest(vcpu, adj);
1191 ++ /* Before back to guest, tsc_timestamp must be adjusted
1192 ++ * as well, otherwise guest's percpu pvclock time could jump.
1193 ++ */
1194 ++ kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1195 + }
1196 + vcpu->arch.ia32_tsc_adjust_msr = data;
1197 + }
1198 +diff --git a/block/bfq-iosched.c b/block/bfq-iosched.c
1199 +index c91dca641eb46..8ea37328ca84e 100644
1200 +--- a/block/bfq-iosched.c
1201 ++++ b/block/bfq-iosched.c
1202 +@@ -2251,6 +2251,9 @@ static int bfq_request_merge(struct request_queue *q, struct request **req,
1203 + __rq = bfq_find_rq_fmerge(bfqd, bio, q);
1204 + if (__rq && elv_bio_merge_ok(__rq, bio)) {
1205 + *req = __rq;
1206 ++
1207 ++ if (blk_discard_mergable(__rq))
1208 ++ return ELEVATOR_DISCARD_MERGE;
1209 + return ELEVATOR_FRONT_MERGE;
1210 + }
1211 +
1212 +diff --git a/block/bio.c b/block/bio.c
1213 +index 9c931df2d9864..0703a208ca248 100644
1214 +--- a/block/bio.c
1215 ++++ b/block/bio.c
1216 +@@ -978,6 +978,14 @@ static int __bio_iov_bvec_add_pages(struct bio *bio, struct iov_iter *iter)
1217 + return 0;
1218 + }
1219 +
1220 ++static void bio_put_pages(struct page **pages, size_t size, size_t off)
1221 ++{
1222 ++ size_t i, nr = DIV_ROUND_UP(size + (off & ~PAGE_MASK), PAGE_SIZE);
1223 ++
1224 ++ for (i = 0; i < nr; i++)
1225 ++ put_page(pages[i]);
1226 ++}
1227 ++
1228 + #define PAGE_PTRS_PER_BVEC (sizeof(struct bio_vec) / sizeof(struct page *))
1229 +
1230 + /**
1231 +@@ -1022,8 +1030,10 @@ static int __bio_iov_iter_get_pages(struct bio *bio, struct iov_iter *iter)
1232 + if (same_page)
1233 + put_page(page);
1234 + } else {
1235 +- if (WARN_ON_ONCE(bio_full(bio, len)))
1236 +- return -EINVAL;
1237 ++ if (WARN_ON_ONCE(bio_full(bio, len))) {
1238 ++ bio_put_pages(pages + i, left, offset);
1239 ++ return -EINVAL;
1240 ++ }
1241 + __bio_add_page(bio, page, len, offset);
1242 + }
1243 + offset = 0;
1244 +@@ -1068,6 +1078,7 @@ static int __bio_iov_append_get_pages(struct bio *bio, struct iov_iter *iter)
1245 + len = min_t(size_t, PAGE_SIZE - offset, left);
1246 + if (bio_add_hw_page(q, bio, page, len, offset,
1247 + max_append_sectors, &same_page) != len) {
1248 ++ bio_put_pages(pages + i, left, offset);
1249 + ret = -EINVAL;
1250 + break;
1251 + }
1252 +diff --git a/block/blk-crypto.c b/block/blk-crypto.c
1253 +index 5da43f0973b46..5ffa9aab49de0 100644
1254 +--- a/block/blk-crypto.c
1255 ++++ b/block/blk-crypto.c
1256 +@@ -332,7 +332,7 @@ int blk_crypto_init_key(struct blk_crypto_key *blk_key, const u8 *raw_key,
1257 + if (mode->keysize == 0)
1258 + return -EINVAL;
1259 +
1260 +- if (dun_bytes == 0 || dun_bytes > BLK_CRYPTO_MAX_IV_SIZE)
1261 ++ if (dun_bytes == 0 || dun_bytes > mode->ivsize)
1262 + return -EINVAL;
1263 +
1264 + if (!is_power_of_2(data_unit_size))
1265 +diff --git a/block/blk-merge.c b/block/blk-merge.c
1266 +index 349cd7d3af815..26f4bcc10de9d 100644
1267 +--- a/block/blk-merge.c
1268 ++++ b/block/blk-merge.c
1269 +@@ -341,6 +341,8 @@ void __blk_queue_split(struct bio **bio, unsigned int *nr_segs)
1270 + trace_block_split(q, split, (*bio)->bi_iter.bi_sector);
1271 + submit_bio_noacct(*bio);
1272 + *bio = split;
1273 ++
1274 ++ blk_throtl_charge_bio_split(*bio);
1275 + }
1276 + }
1277 +
1278 +@@ -700,22 +702,6 @@ static void blk_account_io_merge_request(struct request *req)
1279 + }
1280 + }
1281 +
1282 +-/*
1283 +- * Two cases of handling DISCARD merge:
1284 +- * If max_discard_segments > 1, the driver takes every bio
1285 +- * as a range and send them to controller together. The ranges
1286 +- * needn't to be contiguous.
1287 +- * Otherwise, the bios/requests will be handled as same as
1288 +- * others which should be contiguous.
1289 +- */
1290 +-static inline bool blk_discard_mergable(struct request *req)
1291 +-{
1292 +- if (req_op(req) == REQ_OP_DISCARD &&
1293 +- queue_max_discard_segments(req->q) > 1)
1294 +- return true;
1295 +- return false;
1296 +-}
1297 +-
1298 + static enum elv_merge blk_try_req_merge(struct request *req,
1299 + struct request *next)
1300 + {
1301 +diff --git a/block/blk-throttle.c b/block/blk-throttle.c
1302 +index b771c42999827..63e9d00a08321 100644
1303 +--- a/block/blk-throttle.c
1304 ++++ b/block/blk-throttle.c
1305 +@@ -178,6 +178,9 @@ struct throtl_grp {
1306 + unsigned int bad_bio_cnt; /* bios exceeding latency threshold */
1307 + unsigned long bio_cnt_reset_time;
1308 +
1309 ++ atomic_t io_split_cnt[2];
1310 ++ atomic_t last_io_split_cnt[2];
1311 ++
1312 + struct blkg_rwstat stat_bytes;
1313 + struct blkg_rwstat stat_ios;
1314 + };
1315 +@@ -771,6 +774,8 @@ static inline void throtl_start_new_slice_with_credit(struct throtl_grp *tg,
1316 + tg->bytes_disp[rw] = 0;
1317 + tg->io_disp[rw] = 0;
1318 +
1319 ++ atomic_set(&tg->io_split_cnt[rw], 0);
1320 ++
1321 + /*
1322 + * Previous slice has expired. We must have trimmed it after last
1323 + * bio dispatch. That means since start of last slice, we never used
1324 +@@ -793,6 +798,9 @@ static inline void throtl_start_new_slice(struct throtl_grp *tg, bool rw)
1325 + tg->io_disp[rw] = 0;
1326 + tg->slice_start[rw] = jiffies;
1327 + tg->slice_end[rw] = jiffies + tg->td->throtl_slice;
1328 ++
1329 ++ atomic_set(&tg->io_split_cnt[rw], 0);
1330 ++
1331 + throtl_log(&tg->service_queue,
1332 + "[%c] new slice start=%lu end=%lu jiffies=%lu",
1333 + rw == READ ? 'R' : 'W', tg->slice_start[rw],
1334 +@@ -1025,6 +1033,9 @@ static bool tg_may_dispatch(struct throtl_grp *tg, struct bio *bio,
1335 + jiffies + tg->td->throtl_slice);
1336 + }
1337 +
1338 ++ if (iops_limit != UINT_MAX)
1339 ++ tg->io_disp[rw] += atomic_xchg(&tg->io_split_cnt[rw], 0);
1340 ++
1341 + if (tg_with_in_bps_limit(tg, bio, bps_limit, &bps_wait) &&
1342 + tg_with_in_iops_limit(tg, bio, iops_limit, &iops_wait)) {
1343 + if (wait)
1344 +@@ -2046,12 +2057,14 @@ static void throtl_downgrade_check(struct throtl_grp *tg)
1345 + }
1346 +
1347 + if (tg->iops[READ][LIMIT_LOW]) {
1348 ++ tg->last_io_disp[READ] += atomic_xchg(&tg->last_io_split_cnt[READ], 0);
1349 + iops = tg->last_io_disp[READ] * HZ / elapsed_time;
1350 + if (iops >= tg->iops[READ][LIMIT_LOW])
1351 + tg->last_low_overflow_time[READ] = now;
1352 + }
1353 +
1354 + if (tg->iops[WRITE][LIMIT_LOW]) {
1355 ++ tg->last_io_disp[WRITE] += atomic_xchg(&tg->last_io_split_cnt[WRITE], 0);
1356 + iops = tg->last_io_disp[WRITE] * HZ / elapsed_time;
1357 + if (iops >= tg->iops[WRITE][LIMIT_LOW])
1358 + tg->last_low_overflow_time[WRITE] = now;
1359 +@@ -2170,6 +2183,25 @@ static inline void throtl_update_latency_buckets(struct throtl_data *td)
1360 + }
1361 + #endif
1362 +
1363 ++void blk_throtl_charge_bio_split(struct bio *bio)
1364 ++{
1365 ++ struct blkcg_gq *blkg = bio->bi_blkg;
1366 ++ struct throtl_grp *parent = blkg_to_tg(blkg);
1367 ++ struct throtl_service_queue *parent_sq;
1368 ++ bool rw = bio_data_dir(bio);
1369 ++
1370 ++ do {
1371 ++ if (!parent->has_rules[rw])
1372 ++ break;
1373 ++
1374 ++ atomic_inc(&parent->io_split_cnt[rw]);
1375 ++ atomic_inc(&parent->last_io_split_cnt[rw]);
1376 ++
1377 ++ parent_sq = parent->service_queue.parent_sq;
1378 ++ parent = sq_to_tg(parent_sq);
1379 ++ } while (parent);
1380 ++}
1381 ++
1382 + bool blk_throtl_bio(struct bio *bio)
1383 + {
1384 + struct request_queue *q = bio->bi_disk->queue;
1385 +diff --git a/block/blk.h b/block/blk.h
1386 +index ecfd523c68d00..f84c83300f6fa 100644
1387 +--- a/block/blk.h
1388 ++++ b/block/blk.h
1389 +@@ -299,11 +299,13 @@ int create_task_io_context(struct task_struct *task, gfp_t gfp_mask, int node);
1390 + extern int blk_throtl_init(struct request_queue *q);
1391 + extern void blk_throtl_exit(struct request_queue *q);
1392 + extern void blk_throtl_register_queue(struct request_queue *q);
1393 ++extern void blk_throtl_charge_bio_split(struct bio *bio);
1394 + bool blk_throtl_bio(struct bio *bio);
1395 + #else /* CONFIG_BLK_DEV_THROTTLING */
1396 + static inline int blk_throtl_init(struct request_queue *q) { return 0; }
1397 + static inline void blk_throtl_exit(struct request_queue *q) { }
1398 + static inline void blk_throtl_register_queue(struct request_queue *q) { }
1399 ++static inline void blk_throtl_charge_bio_split(struct bio *bio) { }
1400 + static inline bool blk_throtl_bio(struct bio *bio) { return false; }
1401 + #endif /* CONFIG_BLK_DEV_THROTTLING */
1402 + #ifdef CONFIG_BLK_DEV_THROTTLING_LOW
1403 +diff --git a/block/elevator.c b/block/elevator.c
1404 +index 293c5c81397a1..2a525863d4e92 100644
1405 +--- a/block/elevator.c
1406 ++++ b/block/elevator.c
1407 +@@ -336,6 +336,9 @@ enum elv_merge elv_merge(struct request_queue *q, struct request **req,
1408 + __rq = elv_rqhash_find(q, bio->bi_iter.bi_sector);
1409 + if (__rq && elv_bio_merge_ok(__rq, bio)) {
1410 + *req = __rq;
1411 ++
1412 ++ if (blk_discard_mergable(__rq))
1413 ++ return ELEVATOR_DISCARD_MERGE;
1414 + return ELEVATOR_BACK_MERGE;
1415 + }
1416 +
1417 +diff --git a/block/mq-deadline.c b/block/mq-deadline.c
1418 +index 2b9635d0dcba8..e4e90761eab35 100644
1419 +--- a/block/mq-deadline.c
1420 ++++ b/block/mq-deadline.c
1421 +@@ -454,6 +454,8 @@ static int dd_request_merge(struct request_queue *q, struct request **rq,
1422 +
1423 + if (elv_bio_merge_ok(__rq, bio)) {
1424 + *rq = __rq;
1425 ++ if (blk_discard_mergable(__rq))
1426 ++ return ELEVATOR_DISCARD_MERGE;
1427 + return ELEVATOR_FRONT_MERGE;
1428 + }
1429 + }
1430 +diff --git a/certs/Makefile b/certs/Makefile
1431 +index b6db52ebf0beb..b338799c0b242 100644
1432 +--- a/certs/Makefile
1433 ++++ b/certs/Makefile
1434 +@@ -47,11 +47,19 @@ endif
1435 + redirect_openssl = 2>&1
1436 + quiet_redirect_openssl = 2>&1
1437 + silent_redirect_openssl = 2>/dev/null
1438 ++openssl_available = $(shell openssl help 2>/dev/null && echo yes)
1439 +
1440 + # We do it this way rather than having a boolean option for enabling an
1441 + # external private key, because 'make randconfig' might enable such a
1442 + # boolean option and we unfortunately can't make it depend on !RANDCONFIG.
1443 + ifeq ($(CONFIG_MODULE_SIG_KEY),"certs/signing_key.pem")
1444 ++
1445 ++ifeq ($(openssl_available),yes)
1446 ++X509TEXT=$(shell openssl x509 -in "certs/signing_key.pem" -text 2>/dev/null)
1447 ++
1448 ++$(if $(findstring rsaEncryption,$(X509TEXT)),,$(shell rm -f "certs/signing_key.pem"))
1449 ++endif
1450 ++
1451 + $(obj)/signing_key.pem: $(obj)/x509.genkey
1452 + @$(kecho) "###"
1453 + @$(kecho) "### Now generating an X.509 key pair to be used for signing modules."
1454 +diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
1455 +index 61c762961ca8e..44f434acfce08 100644
1456 +--- a/drivers/ata/libata-core.c
1457 ++++ b/drivers/ata/libata-core.c
1458 +@@ -5573,7 +5573,7 @@ int ata_host_start(struct ata_host *host)
1459 + have_stop = 1;
1460 + }
1461 +
1462 +- if (host->ops->host_stop)
1463 ++ if (host->ops && host->ops->host_stop)
1464 + have_stop = 1;
1465 +
1466 + if (have_stop) {
1467 +diff --git a/drivers/base/dd.c b/drivers/base/dd.c
1468 +index 85bb8742f0906..81ad4f867f02d 100644
1469 +--- a/drivers/base/dd.c
1470 ++++ b/drivers/base/dd.c
1471 +@@ -543,7 +543,8 @@ re_probe:
1472 + goto probe_failed;
1473 + }
1474 +
1475 +- if (driver_sysfs_add(dev)) {
1476 ++ ret = driver_sysfs_add(dev);
1477 ++ if (ret) {
1478 + pr_err("%s: driver_sysfs_add(%s) failed\n",
1479 + __func__, dev_name(dev));
1480 + goto probe_failed;
1481 +@@ -565,15 +566,18 @@ re_probe:
1482 + goto probe_failed;
1483 + }
1484 +
1485 +- if (device_add_groups(dev, drv->dev_groups)) {
1486 ++ ret = device_add_groups(dev, drv->dev_groups);
1487 ++ if (ret) {
1488 + dev_err(dev, "device_add_groups() failed\n");
1489 + goto dev_groups_failed;
1490 + }
1491 +
1492 +- if (dev_has_sync_state(dev) &&
1493 +- device_create_file(dev, &dev_attr_state_synced)) {
1494 +- dev_err(dev, "state_synced sysfs add failed\n");
1495 +- goto dev_sysfs_state_synced_failed;
1496 ++ if (dev_has_sync_state(dev)) {
1497 ++ ret = device_create_file(dev, &dev_attr_state_synced);
1498 ++ if (ret) {
1499 ++ dev_err(dev, "state_synced sysfs add failed\n");
1500 ++ goto dev_sysfs_state_synced_failed;
1501 ++ }
1502 + }
1503 +
1504 + if (test_remove) {
1505 +diff --git a/drivers/base/firmware_loader/main.c b/drivers/base/firmware_loader/main.c
1506 +index a529235e6bfe9..f41e4e4993d37 100644
1507 +--- a/drivers/base/firmware_loader/main.c
1508 ++++ b/drivers/base/firmware_loader/main.c
1509 +@@ -164,7 +164,7 @@ static inline int fw_state_wait(struct fw_priv *fw_priv)
1510 + return __fw_state_wait_common(fw_priv, MAX_SCHEDULE_TIMEOUT);
1511 + }
1512 +
1513 +-static int fw_cache_piggyback_on_request(const char *name);
1514 ++static void fw_cache_piggyback_on_request(struct fw_priv *fw_priv);
1515 +
1516 + static struct fw_priv *__allocate_fw_priv(const char *fw_name,
1517 + struct firmware_cache *fwc,
1518 +@@ -705,10 +705,8 @@ int assign_fw(struct firmware *fw, struct device *device)
1519 + * on request firmware.
1520 + */
1521 + if (!(fw_priv->opt_flags & FW_OPT_NOCACHE) &&
1522 +- fw_priv->fwc->state == FW_LOADER_START_CACHE) {
1523 +- if (fw_cache_piggyback_on_request(fw_priv->fw_name))
1524 +- kref_get(&fw_priv->ref);
1525 +- }
1526 ++ fw_priv->fwc->state == FW_LOADER_START_CACHE)
1527 ++ fw_cache_piggyback_on_request(fw_priv);
1528 +
1529 + /* pass the pages buffer to driver at the last minute */
1530 + fw_set_page_data(fw_priv, fw);
1531 +@@ -1257,11 +1255,11 @@ static int __fw_entry_found(const char *name)
1532 + return 0;
1533 + }
1534 +
1535 +-static int fw_cache_piggyback_on_request(const char *name)
1536 ++static void fw_cache_piggyback_on_request(struct fw_priv *fw_priv)
1537 + {
1538 +- struct firmware_cache *fwc = &fw_cache;
1539 ++ const char *name = fw_priv->fw_name;
1540 ++ struct firmware_cache *fwc = fw_priv->fwc;
1541 + struct fw_cache_entry *fce;
1542 +- int ret = 0;
1543 +
1544 + spin_lock(&fwc->name_lock);
1545 + if (__fw_entry_found(name))
1546 +@@ -1269,13 +1267,12 @@ static int fw_cache_piggyback_on_request(const char *name)
1547 +
1548 + fce = alloc_fw_cache_entry(name);
1549 + if (fce) {
1550 +- ret = 1;
1551 + list_add(&fce->list, &fwc->fw_names);
1552 ++ kref_get(&fw_priv->ref);
1553 + pr_debug("%s: fw: %s\n", __func__, name);
1554 + }
1555 + found:
1556 + spin_unlock(&fwc->name_lock);
1557 +- return ret;
1558 + }
1559 +
1560 + static void free_fw_cache_entry(struct fw_cache_entry *fce)
1561 +@@ -1506,9 +1503,8 @@ static inline void unregister_fw_pm_ops(void)
1562 + unregister_pm_notifier(&fw_cache.pm_notify);
1563 + }
1564 + #else
1565 +-static int fw_cache_piggyback_on_request(const char *name)
1566 ++static void fw_cache_piggyback_on_request(struct fw_priv *fw_priv)
1567 + {
1568 +- return 0;
1569 + }
1570 + static inline int register_fw_pm_ops(void)
1571 + {
1572 +diff --git a/drivers/base/regmap/regmap.c b/drivers/base/regmap/regmap.c
1573 +index 5db536ccfcd6b..456a1787e18d0 100644
1574 +--- a/drivers/base/regmap/regmap.c
1575 ++++ b/drivers/base/regmap/regmap.c
1576 +@@ -1652,7 +1652,7 @@ static int _regmap_raw_write_impl(struct regmap *map, unsigned int reg,
1577 + if (ret) {
1578 + dev_err(map->dev,
1579 + "Error in caching of register: %x ret: %d\n",
1580 +- reg + i, ret);
1581 ++ reg + regmap_get_offset(map, i), ret);
1582 + return ret;
1583 + }
1584 + }
1585 +diff --git a/drivers/bcma/main.c b/drivers/bcma/main.c
1586 +index 6535614a7dc13..1df2b5801c3bc 100644
1587 +--- a/drivers/bcma/main.c
1588 ++++ b/drivers/bcma/main.c
1589 +@@ -236,6 +236,7 @@ EXPORT_SYMBOL(bcma_core_irq);
1590 +
1591 + void bcma_prepare_core(struct bcma_bus *bus, struct bcma_device *core)
1592 + {
1593 ++ device_initialize(&core->dev);
1594 + core->dev.release = bcma_release_core_dev;
1595 + core->dev.bus = &bcma_bus_type;
1596 + dev_set_name(&core->dev, "bcma%d:%d", bus->num, core->core_index);
1597 +@@ -277,11 +278,10 @@ static void bcma_register_core(struct bcma_bus *bus, struct bcma_device *core)
1598 + {
1599 + int err;
1600 +
1601 +- err = device_register(&core->dev);
1602 ++ err = device_add(&core->dev);
1603 + if (err) {
1604 + bcma_err(bus, "Could not register dev for core 0x%03X\n",
1605 + core->id.id);
1606 +- put_device(&core->dev);
1607 + return;
1608 + }
1609 + core->dev_registered = true;
1610 +@@ -372,7 +372,7 @@ void bcma_unregister_cores(struct bcma_bus *bus)
1611 + /* Now noone uses internally-handled cores, we can free them */
1612 + list_for_each_entry_safe(core, tmp, &bus->cores, list) {
1613 + list_del(&core->list);
1614 +- kfree(core);
1615 ++ put_device(&core->dev);
1616 + }
1617 + }
1618 +
1619 +diff --git a/drivers/block/nbd.c b/drivers/block/nbd.c
1620 +index 59c452fff8352..98274ba0701d6 100644
1621 +--- a/drivers/block/nbd.c
1622 ++++ b/drivers/block/nbd.c
1623 +@@ -1759,7 +1759,17 @@ static int nbd_dev_add(int index)
1624 + refcount_set(&nbd->refs, 1);
1625 + INIT_LIST_HEAD(&nbd->list);
1626 + disk->major = NBD_MAJOR;
1627 ++
1628 ++ /* Too big first_minor can cause duplicate creation of
1629 ++ * sysfs files/links, since first_minor will be truncated to
1630 ++ * byte in __device_add_disk().
1631 ++ */
1632 + disk->first_minor = index << part_shift;
1633 ++ if (disk->first_minor > 0xff) {
1634 ++ err = -EINVAL;
1635 ++ goto out_free_idr;
1636 ++ }
1637 ++
1638 + disk->fops = &nbd_fops;
1639 + disk->private_data = nbd;
1640 + sprintf(disk->disk_name, "nbd%d", index);
1641 +diff --git a/drivers/char/tpm/tpm_ibmvtpm.c b/drivers/char/tpm/tpm_ibmvtpm.c
1642 +index 994385bf37c0c..3ca7528322f53 100644
1643 +--- a/drivers/char/tpm/tpm_ibmvtpm.c
1644 ++++ b/drivers/char/tpm/tpm_ibmvtpm.c
1645 +@@ -106,17 +106,12 @@ static int tpm_ibmvtpm_recv(struct tpm_chip *chip, u8 *buf, size_t count)
1646 + {
1647 + struct ibmvtpm_dev *ibmvtpm = dev_get_drvdata(&chip->dev);
1648 + u16 len;
1649 +- int sig;
1650 +
1651 + if (!ibmvtpm->rtce_buf) {
1652 + dev_err(ibmvtpm->dev, "ibmvtpm device is not ready\n");
1653 + return 0;
1654 + }
1655 +
1656 +- sig = wait_event_interruptible(ibmvtpm->wq, !ibmvtpm->tpm_processing_cmd);
1657 +- if (sig)
1658 +- return -EINTR;
1659 +-
1660 + len = ibmvtpm->res_len;
1661 +
1662 + if (count < len) {
1663 +@@ -237,7 +232,7 @@ static int tpm_ibmvtpm_send(struct tpm_chip *chip, u8 *buf, size_t count)
1664 + * set the processing flag before the Hcall, since we may get the
1665 + * result (interrupt) before even being able to check rc.
1666 + */
1667 +- ibmvtpm->tpm_processing_cmd = true;
1668 ++ ibmvtpm->tpm_processing_cmd = 1;
1669 +
1670 + again:
1671 + rc = ibmvtpm_send_crq(ibmvtpm->vdev,
1672 +@@ -255,7 +250,7 @@ again:
1673 + goto again;
1674 + }
1675 + dev_err(ibmvtpm->dev, "tpm_ibmvtpm_send failed rc=%d\n", rc);
1676 +- ibmvtpm->tpm_processing_cmd = false;
1677 ++ ibmvtpm->tpm_processing_cmd = 0;
1678 + }
1679 +
1680 + spin_unlock(&ibmvtpm->rtce_lock);
1681 +@@ -269,7 +264,9 @@ static void tpm_ibmvtpm_cancel(struct tpm_chip *chip)
1682 +
1683 + static u8 tpm_ibmvtpm_status(struct tpm_chip *chip)
1684 + {
1685 +- return 0;
1686 ++ struct ibmvtpm_dev *ibmvtpm = dev_get_drvdata(&chip->dev);
1687 ++
1688 ++ return ibmvtpm->tpm_processing_cmd;
1689 + }
1690 +
1691 + /**
1692 +@@ -459,7 +456,7 @@ static const struct tpm_class_ops tpm_ibmvtpm = {
1693 + .send = tpm_ibmvtpm_send,
1694 + .cancel = tpm_ibmvtpm_cancel,
1695 + .status = tpm_ibmvtpm_status,
1696 +- .req_complete_mask = 0,
1697 ++ .req_complete_mask = 1,
1698 + .req_complete_val = 0,
1699 + .req_canceled = tpm_ibmvtpm_req_canceled,
1700 + };
1701 +@@ -552,7 +549,7 @@ static void ibmvtpm_crq_process(struct ibmvtpm_crq *crq,
1702 + case VTPM_TPM_COMMAND_RES:
1703 + /* len of the data in rtce buffer */
1704 + ibmvtpm->res_len = be16_to_cpu(crq->len);
1705 +- ibmvtpm->tpm_processing_cmd = false;
1706 ++ ibmvtpm->tpm_processing_cmd = 0;
1707 + wake_up_interruptible(&ibmvtpm->wq);
1708 + return;
1709 + default:
1710 +@@ -690,8 +687,15 @@ static int tpm_ibmvtpm_probe(struct vio_dev *vio_dev,
1711 + goto init_irq_cleanup;
1712 + }
1713 +
1714 +- if (!strcmp(id->compat, "IBM,vtpm20")) {
1715 ++
1716 ++ if (!strcmp(id->compat, "IBM,vtpm20"))
1717 + chip->flags |= TPM_CHIP_FLAG_TPM2;
1718 ++
1719 ++ rc = tpm_get_timeouts(chip);
1720 ++ if (rc)
1721 ++ goto init_irq_cleanup;
1722 ++
1723 ++ if (chip->flags & TPM_CHIP_FLAG_TPM2) {
1724 + rc = tpm2_get_cc_attrs_tbl(chip);
1725 + if (rc)
1726 + goto init_irq_cleanup;
1727 +diff --git a/drivers/char/tpm/tpm_ibmvtpm.h b/drivers/char/tpm/tpm_ibmvtpm.h
1728 +index b92aa7d3e93e7..51198b137461e 100644
1729 +--- a/drivers/char/tpm/tpm_ibmvtpm.h
1730 ++++ b/drivers/char/tpm/tpm_ibmvtpm.h
1731 +@@ -41,7 +41,7 @@ struct ibmvtpm_dev {
1732 + wait_queue_head_t wq;
1733 + u16 res_len;
1734 + u32 vtpm_version;
1735 +- bool tpm_processing_cmd;
1736 ++ u8 tpm_processing_cmd;
1737 + };
1738 +
1739 + #define CRQ_RES_BUF_SIZE PAGE_SIZE
1740 +diff --git a/drivers/clk/mvebu/kirkwood.c b/drivers/clk/mvebu/kirkwood.c
1741 +index 47680237d0beb..8bc893df47364 100644
1742 +--- a/drivers/clk/mvebu/kirkwood.c
1743 ++++ b/drivers/clk/mvebu/kirkwood.c
1744 +@@ -265,6 +265,7 @@ static const char *powersave_parents[] = {
1745 + static const struct clk_muxing_soc_desc kirkwood_mux_desc[] __initconst = {
1746 + { "powersave", powersave_parents, ARRAY_SIZE(powersave_parents),
1747 + 11, 1, 0 },
1748 ++ { }
1749 + };
1750 +
1751 + static struct clk *clk_muxing_get_src(
1752 +diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
1753 +index 760777458a909..2acfcc966bb54 100644
1754 +--- a/drivers/clocksource/sh_cmt.c
1755 ++++ b/drivers/clocksource/sh_cmt.c
1756 +@@ -572,7 +572,8 @@ static int sh_cmt_start(struct sh_cmt_channel *ch, unsigned long flag)
1757 + ch->flags |= flag;
1758 +
1759 + /* setup timeout if no clockevent */
1760 +- if ((flag == FLAG_CLOCKSOURCE) && (!(ch->flags & FLAG_CLOCKEVENT)))
1761 ++ if (ch->cmt->num_channels == 1 &&
1762 ++ flag == FLAG_CLOCKSOURCE && (!(ch->flags & FLAG_CLOCKEVENT)))
1763 + __sh_cmt_set_next(ch, ch->max_match_value);
1764 + out:
1765 + raw_spin_unlock_irqrestore(&ch->lock, flags);
1766 +@@ -608,20 +609,25 @@ static struct sh_cmt_channel *cs_to_sh_cmt(struct clocksource *cs)
1767 + static u64 sh_cmt_clocksource_read(struct clocksource *cs)
1768 + {
1769 + struct sh_cmt_channel *ch = cs_to_sh_cmt(cs);
1770 +- unsigned long flags;
1771 + u32 has_wrapped;
1772 +- u64 value;
1773 +- u32 raw;
1774 +
1775 +- raw_spin_lock_irqsave(&ch->lock, flags);
1776 +- value = ch->total_cycles;
1777 +- raw = sh_cmt_get_counter(ch, &has_wrapped);
1778 ++ if (ch->cmt->num_channels == 1) {
1779 ++ unsigned long flags;
1780 ++ u64 value;
1781 ++ u32 raw;
1782 +
1783 +- if (unlikely(has_wrapped))
1784 +- raw += ch->match_value + 1;
1785 +- raw_spin_unlock_irqrestore(&ch->lock, flags);
1786 ++ raw_spin_lock_irqsave(&ch->lock, flags);
1787 ++ value = ch->total_cycles;
1788 ++ raw = sh_cmt_get_counter(ch, &has_wrapped);
1789 ++
1790 ++ if (unlikely(has_wrapped))
1791 ++ raw += ch->match_value + 1;
1792 ++ raw_spin_unlock_irqrestore(&ch->lock, flags);
1793 ++
1794 ++ return value + raw;
1795 ++ }
1796 +
1797 +- return value + raw;
1798 ++ return sh_cmt_get_counter(ch, &has_wrapped);
1799 + }
1800 +
1801 + static int sh_cmt_clocksource_enable(struct clocksource *cs)
1802 +@@ -684,7 +690,7 @@ static int sh_cmt_register_clocksource(struct sh_cmt_channel *ch,
1803 + cs->disable = sh_cmt_clocksource_disable;
1804 + cs->suspend = sh_cmt_clocksource_suspend;
1805 + cs->resume = sh_cmt_clocksource_resume;
1806 +- cs->mask = CLOCKSOURCE_MASK(sizeof(u64) * 8);
1807 ++ cs->mask = CLOCKSOURCE_MASK(ch->cmt->info->width);
1808 + cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
1809 +
1810 + dev_info(&ch->cmt->pdev->dev, "ch%u: used as clock source\n",
1811 +diff --git a/drivers/counter/104-quad-8.c b/drivers/counter/104-quad-8.c
1812 +index 78766b6ec271a..21bb2bb767a1e 100644
1813 +--- a/drivers/counter/104-quad-8.c
1814 ++++ b/drivers/counter/104-quad-8.c
1815 +@@ -1224,12 +1224,13 @@ static ssize_t quad8_count_ceiling_write(struct counter_device *counter,
1816 + case 1:
1817 + case 3:
1818 + quad8_preset_register_set(priv, count->id, ceiling);
1819 +- break;
1820 ++ mutex_unlock(&priv->lock);
1821 ++ return len;
1822 + }
1823 +
1824 + mutex_unlock(&priv->lock);
1825 +
1826 +- return len;
1827 ++ return -EINVAL;
1828 + }
1829 +
1830 + static ssize_t quad8_count_preset_enable_read(struct counter_device *counter,
1831 +diff --git a/drivers/crypto/mxs-dcp.c b/drivers/crypto/mxs-dcp.c
1832 +index 909a7eb748e35..7daed8b78ac83 100644
1833 +--- a/drivers/crypto/mxs-dcp.c
1834 ++++ b/drivers/crypto/mxs-dcp.c
1835 +@@ -169,15 +169,19 @@ static struct dcp *global_sdcp;
1836 +
1837 + static int mxs_dcp_start_dma(struct dcp_async_ctx *actx)
1838 + {
1839 ++ int dma_err;
1840 + struct dcp *sdcp = global_sdcp;
1841 + const int chan = actx->chan;
1842 + uint32_t stat;
1843 + unsigned long ret;
1844 + struct dcp_dma_desc *desc = &sdcp->coh->desc[actx->chan];
1845 +-
1846 + dma_addr_t desc_phys = dma_map_single(sdcp->dev, desc, sizeof(*desc),
1847 + DMA_TO_DEVICE);
1848 +
1849 ++ dma_err = dma_mapping_error(sdcp->dev, desc_phys);
1850 ++ if (dma_err)
1851 ++ return dma_err;
1852 ++
1853 + reinit_completion(&sdcp->completion[chan]);
1854 +
1855 + /* Clear status register. */
1856 +@@ -215,18 +219,29 @@ static int mxs_dcp_start_dma(struct dcp_async_ctx *actx)
1857 + static int mxs_dcp_run_aes(struct dcp_async_ctx *actx,
1858 + struct skcipher_request *req, int init)
1859 + {
1860 ++ dma_addr_t key_phys, src_phys, dst_phys;
1861 + struct dcp *sdcp = global_sdcp;
1862 + struct dcp_dma_desc *desc = &sdcp->coh->desc[actx->chan];
1863 + struct dcp_aes_req_ctx *rctx = skcipher_request_ctx(req);
1864 + int ret;
1865 +
1866 +- dma_addr_t key_phys = dma_map_single(sdcp->dev, sdcp->coh->aes_key,
1867 +- 2 * AES_KEYSIZE_128,
1868 +- DMA_TO_DEVICE);
1869 +- dma_addr_t src_phys = dma_map_single(sdcp->dev, sdcp->coh->aes_in_buf,
1870 +- DCP_BUF_SZ, DMA_TO_DEVICE);
1871 +- dma_addr_t dst_phys = dma_map_single(sdcp->dev, sdcp->coh->aes_out_buf,
1872 +- DCP_BUF_SZ, DMA_FROM_DEVICE);
1873 ++ key_phys = dma_map_single(sdcp->dev, sdcp->coh->aes_key,
1874 ++ 2 * AES_KEYSIZE_128, DMA_TO_DEVICE);
1875 ++ ret = dma_mapping_error(sdcp->dev, key_phys);
1876 ++ if (ret)
1877 ++ return ret;
1878 ++
1879 ++ src_phys = dma_map_single(sdcp->dev, sdcp->coh->aes_in_buf,
1880 ++ DCP_BUF_SZ, DMA_TO_DEVICE);
1881 ++ ret = dma_mapping_error(sdcp->dev, src_phys);
1882 ++ if (ret)
1883 ++ goto err_src;
1884 ++
1885 ++ dst_phys = dma_map_single(sdcp->dev, sdcp->coh->aes_out_buf,
1886 ++ DCP_BUF_SZ, DMA_FROM_DEVICE);
1887 ++ ret = dma_mapping_error(sdcp->dev, dst_phys);
1888 ++ if (ret)
1889 ++ goto err_dst;
1890 +
1891 + if (actx->fill % AES_BLOCK_SIZE) {
1892 + dev_err(sdcp->dev, "Invalid block size!\n");
1893 +@@ -264,10 +279,12 @@ static int mxs_dcp_run_aes(struct dcp_async_ctx *actx,
1894 + ret = mxs_dcp_start_dma(actx);
1895 +
1896 + aes_done_run:
1897 ++ dma_unmap_single(sdcp->dev, dst_phys, DCP_BUF_SZ, DMA_FROM_DEVICE);
1898 ++err_dst:
1899 ++ dma_unmap_single(sdcp->dev, src_phys, DCP_BUF_SZ, DMA_TO_DEVICE);
1900 ++err_src:
1901 + dma_unmap_single(sdcp->dev, key_phys, 2 * AES_KEYSIZE_128,
1902 + DMA_TO_DEVICE);
1903 +- dma_unmap_single(sdcp->dev, src_phys, DCP_BUF_SZ, DMA_TO_DEVICE);
1904 +- dma_unmap_single(sdcp->dev, dst_phys, DCP_BUF_SZ, DMA_FROM_DEVICE);
1905 +
1906 + return ret;
1907 + }
1908 +@@ -556,6 +573,10 @@ static int mxs_dcp_run_sha(struct ahash_request *req)
1909 + dma_addr_t buf_phys = dma_map_single(sdcp->dev, sdcp->coh->sha_in_buf,
1910 + DCP_BUF_SZ, DMA_TO_DEVICE);
1911 +
1912 ++ ret = dma_mapping_error(sdcp->dev, buf_phys);
1913 ++ if (ret)
1914 ++ return ret;
1915 ++
1916 + /* Fill in the DMA descriptor. */
1917 + desc->control0 = MXS_DCP_CONTROL0_DECR_SEMAPHORE |
1918 + MXS_DCP_CONTROL0_INTERRUPT |
1919 +@@ -588,6 +609,10 @@ static int mxs_dcp_run_sha(struct ahash_request *req)
1920 + if (rctx->fini) {
1921 + digest_phys = dma_map_single(sdcp->dev, sdcp->coh->sha_out_buf,
1922 + DCP_SHA_PAY_SZ, DMA_FROM_DEVICE);
1923 ++ ret = dma_mapping_error(sdcp->dev, digest_phys);
1924 ++ if (ret)
1925 ++ goto done_run;
1926 ++
1927 + desc->control0 |= MXS_DCP_CONTROL0_HASH_TERM;
1928 + desc->payload = digest_phys;
1929 + }
1930 +diff --git a/drivers/crypto/omap-aes.c b/drivers/crypto/omap-aes.c
1931 +index 0dd4c6b157de9..9b968ac4ee7b6 100644
1932 +--- a/drivers/crypto/omap-aes.c
1933 ++++ b/drivers/crypto/omap-aes.c
1934 +@@ -1175,9 +1175,9 @@ static int omap_aes_probe(struct platform_device *pdev)
1935 + spin_lock_init(&dd->lock);
1936 +
1937 + INIT_LIST_HEAD(&dd->list);
1938 +- spin_lock(&list_lock);
1939 ++ spin_lock_bh(&list_lock);
1940 + list_add_tail(&dd->list, &dev_list);
1941 +- spin_unlock(&list_lock);
1942 ++ spin_unlock_bh(&list_lock);
1943 +
1944 + /* Initialize crypto engine */
1945 + dd->engine = crypto_engine_alloc_init(dev, 1);
1946 +@@ -1264,9 +1264,9 @@ static int omap_aes_remove(struct platform_device *pdev)
1947 + if (!dd)
1948 + return -ENODEV;
1949 +
1950 +- spin_lock(&list_lock);
1951 ++ spin_lock_bh(&list_lock);
1952 + list_del(&dd->list);
1953 +- spin_unlock(&list_lock);
1954 ++ spin_unlock_bh(&list_lock);
1955 +
1956 + for (i = dd->pdata->algs_info_size - 1; i >= 0; i--)
1957 + for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--) {
1958 +diff --git a/drivers/crypto/omap-des.c b/drivers/crypto/omap-des.c
1959 +index c9d38bcfd1c77..7fdf38e07adf8 100644
1960 +--- a/drivers/crypto/omap-des.c
1961 ++++ b/drivers/crypto/omap-des.c
1962 +@@ -1035,9 +1035,9 @@ static int omap_des_probe(struct platform_device *pdev)
1963 +
1964 +
1965 + INIT_LIST_HEAD(&dd->list);
1966 +- spin_lock(&list_lock);
1967 ++ spin_lock_bh(&list_lock);
1968 + list_add_tail(&dd->list, &dev_list);
1969 +- spin_unlock(&list_lock);
1970 ++ spin_unlock_bh(&list_lock);
1971 +
1972 + /* Initialize des crypto engine */
1973 + dd->engine = crypto_engine_alloc_init(dev, 1);
1974 +@@ -1096,9 +1096,9 @@ static int omap_des_remove(struct platform_device *pdev)
1975 + if (!dd)
1976 + return -ENODEV;
1977 +
1978 +- spin_lock(&list_lock);
1979 ++ spin_lock_bh(&list_lock);
1980 + list_del(&dd->list);
1981 +- spin_unlock(&list_lock);
1982 ++ spin_unlock_bh(&list_lock);
1983 +
1984 + for (i = dd->pdata->algs_info_size - 1; i >= 0; i--)
1985 + for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--)
1986 +diff --git a/drivers/crypto/omap-sham.c b/drivers/crypto/omap-sham.c
1987 +index 39d17ed1db2f2..48f78e34cf8dd 100644
1988 +--- a/drivers/crypto/omap-sham.c
1989 ++++ b/drivers/crypto/omap-sham.c
1990 +@@ -1735,7 +1735,7 @@ static void omap_sham_done_task(unsigned long data)
1991 + if (test_and_clear_bit(FLAGS_OUTPUT_READY, &dd->flags))
1992 + goto finish;
1993 + } else if (test_bit(FLAGS_DMA_READY, &dd->flags)) {
1994 +- if (test_and_clear_bit(FLAGS_DMA_ACTIVE, &dd->flags)) {
1995 ++ if (test_bit(FLAGS_DMA_ACTIVE, &dd->flags)) {
1996 + omap_sham_update_dma_stop(dd);
1997 + if (dd->err) {
1998 + err = dd->err;
1999 +@@ -2143,9 +2143,9 @@ static int omap_sham_probe(struct platform_device *pdev)
2000 + (rev & dd->pdata->major_mask) >> dd->pdata->major_shift,
2001 + (rev & dd->pdata->minor_mask) >> dd->pdata->minor_shift);
2002 +
2003 +- spin_lock(&sham.lock);
2004 ++ spin_lock_bh(&sham.lock);
2005 + list_add_tail(&dd->list, &sham.dev_list);
2006 +- spin_unlock(&sham.lock);
2007 ++ spin_unlock_bh(&sham.lock);
2008 +
2009 + dd->engine = crypto_engine_alloc_init(dev, 1);
2010 + if (!dd->engine) {
2011 +@@ -2193,9 +2193,9 @@ err_algs:
2012 + err_engine_start:
2013 + crypto_engine_exit(dd->engine);
2014 + err_engine:
2015 +- spin_lock(&sham.lock);
2016 ++ spin_lock_bh(&sham.lock);
2017 + list_del(&dd->list);
2018 +- spin_unlock(&sham.lock);
2019 ++ spin_unlock_bh(&sham.lock);
2020 + err_pm:
2021 + pm_runtime_disable(dev);
2022 + if (!dd->polling_mode)
2023 +@@ -2214,9 +2214,9 @@ static int omap_sham_remove(struct platform_device *pdev)
2024 + dd = platform_get_drvdata(pdev);
2025 + if (!dd)
2026 + return -ENODEV;
2027 +- spin_lock(&sham.lock);
2028 ++ spin_lock_bh(&sham.lock);
2029 + list_del(&dd->list);
2030 +- spin_unlock(&sham.lock);
2031 ++ spin_unlock_bh(&sham.lock);
2032 + for (i = dd->pdata->algs_info_size - 1; i >= 0; i--)
2033 + for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--) {
2034 + crypto_unregister_ahash(
2035 +diff --git a/drivers/crypto/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c b/drivers/crypto/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c
2036 +index d2fedbd7113cb..9709f29b64540 100644
2037 +--- a/drivers/crypto/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c
2038 ++++ b/drivers/crypto/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c
2039 +@@ -79,10 +79,10 @@ void adf_init_hw_data_c3xxxiov(struct adf_hw_device_data *hw_data)
2040 + hw_data->enable_error_correction = adf_vf_void_noop;
2041 + hw_data->init_admin_comms = adf_vf_int_noop;
2042 + hw_data->exit_admin_comms = adf_vf_void_noop;
2043 +- hw_data->send_admin_init = adf_vf2pf_init;
2044 ++ hw_data->send_admin_init = adf_vf2pf_notify_init;
2045 + hw_data->init_arb = adf_vf_int_noop;
2046 + hw_data->exit_arb = adf_vf_void_noop;
2047 +- hw_data->disable_iov = adf_vf2pf_shutdown;
2048 ++ hw_data->disable_iov = adf_vf2pf_notify_shutdown;
2049 + hw_data->get_accel_mask = get_accel_mask;
2050 + hw_data->get_ae_mask = get_ae_mask;
2051 + hw_data->get_num_accels = get_num_accels;
2052 +diff --git a/drivers/crypto/qat/qat_c62xvf/adf_c62xvf_hw_data.c b/drivers/crypto/qat/qat_c62xvf/adf_c62xvf_hw_data.c
2053 +index 29fd3f1091abc..5e6909d6cfc65 100644
2054 +--- a/drivers/crypto/qat/qat_c62xvf/adf_c62xvf_hw_data.c
2055 ++++ b/drivers/crypto/qat/qat_c62xvf/adf_c62xvf_hw_data.c
2056 +@@ -79,10 +79,10 @@ void adf_init_hw_data_c62xiov(struct adf_hw_device_data *hw_data)
2057 + hw_data->enable_error_correction = adf_vf_void_noop;
2058 + hw_data->init_admin_comms = adf_vf_int_noop;
2059 + hw_data->exit_admin_comms = adf_vf_void_noop;
2060 +- hw_data->send_admin_init = adf_vf2pf_init;
2061 ++ hw_data->send_admin_init = adf_vf2pf_notify_init;
2062 + hw_data->init_arb = adf_vf_int_noop;
2063 + hw_data->exit_arb = adf_vf_void_noop;
2064 +- hw_data->disable_iov = adf_vf2pf_shutdown;
2065 ++ hw_data->disable_iov = adf_vf2pf_notify_shutdown;
2066 + hw_data->get_accel_mask = get_accel_mask;
2067 + hw_data->get_ae_mask = get_ae_mask;
2068 + hw_data->get_num_accels = get_num_accels;
2069 +diff --git a/drivers/crypto/qat/qat_common/adf_common_drv.h b/drivers/crypto/qat/qat_common/adf_common_drv.h
2070 +index f22342f612c1d..469e06c93fafe 100644
2071 +--- a/drivers/crypto/qat/qat_common/adf_common_drv.h
2072 ++++ b/drivers/crypto/qat/qat_common/adf_common_drv.h
2073 +@@ -195,8 +195,8 @@ void adf_enable_vf2pf_interrupts(struct adf_accel_dev *accel_dev,
2074 + void adf_enable_pf2vf_interrupts(struct adf_accel_dev *accel_dev);
2075 + void adf_disable_pf2vf_interrupts(struct adf_accel_dev *accel_dev);
2076 +
2077 +-int adf_vf2pf_init(struct adf_accel_dev *accel_dev);
2078 +-void adf_vf2pf_shutdown(struct adf_accel_dev *accel_dev);
2079 ++int adf_vf2pf_notify_init(struct adf_accel_dev *accel_dev);
2080 ++void adf_vf2pf_notify_shutdown(struct adf_accel_dev *accel_dev);
2081 + int adf_init_pf_wq(void);
2082 + void adf_exit_pf_wq(void);
2083 + int adf_init_vf_wq(void);
2084 +@@ -219,12 +219,12 @@ static inline void adf_disable_pf2vf_interrupts(struct adf_accel_dev *accel_dev)
2085 + {
2086 + }
2087 +
2088 +-static inline int adf_vf2pf_init(struct adf_accel_dev *accel_dev)
2089 ++static inline int adf_vf2pf_notify_init(struct adf_accel_dev *accel_dev)
2090 + {
2091 + return 0;
2092 + }
2093 +
2094 +-static inline void adf_vf2pf_shutdown(struct adf_accel_dev *accel_dev)
2095 ++static inline void adf_vf2pf_notify_shutdown(struct adf_accel_dev *accel_dev)
2096 + {
2097 + }
2098 +
2099 +diff --git a/drivers/crypto/qat/qat_common/adf_init.c b/drivers/crypto/qat/qat_common/adf_init.c
2100 +index 42029153408ee..5c78433d19d42 100644
2101 +--- a/drivers/crypto/qat/qat_common/adf_init.c
2102 ++++ b/drivers/crypto/qat/qat_common/adf_init.c
2103 +@@ -61,6 +61,7 @@ int adf_dev_init(struct adf_accel_dev *accel_dev)
2104 + struct service_hndl *service;
2105 + struct list_head *list_itr;
2106 + struct adf_hw_device_data *hw_data = accel_dev->hw_device;
2107 ++ int ret;
2108 +
2109 + if (!hw_data) {
2110 + dev_err(&GET_DEV(accel_dev),
2111 +@@ -127,9 +128,9 @@ int adf_dev_init(struct adf_accel_dev *accel_dev)
2112 + }
2113 +
2114 + hw_data->enable_error_correction(accel_dev);
2115 +- hw_data->enable_vf2pf_comms(accel_dev);
2116 ++ ret = hw_data->enable_vf2pf_comms(accel_dev);
2117 +
2118 +- return 0;
2119 ++ return ret;
2120 + }
2121 + EXPORT_SYMBOL_GPL(adf_dev_init);
2122 +
2123 +diff --git a/drivers/crypto/qat/qat_common/adf_isr.c b/drivers/crypto/qat/qat_common/adf_isr.c
2124 +index da6ef007a6aef..de2f137e44ef8 100644
2125 +--- a/drivers/crypto/qat/qat_common/adf_isr.c
2126 ++++ b/drivers/crypto/qat/qat_common/adf_isr.c
2127 +@@ -15,6 +15,8 @@
2128 + #include "adf_transport_access_macros.h"
2129 + #include "adf_transport_internal.h"
2130 +
2131 ++#define ADF_MAX_NUM_VFS 32
2132 ++
2133 + static int adf_enable_msix(struct adf_accel_dev *accel_dev)
2134 + {
2135 + struct adf_accel_pci *pci_dev_info = &accel_dev->accel_pci_dev;
2136 +@@ -67,7 +69,7 @@ static irqreturn_t adf_msix_isr_ae(int irq, void *dev_ptr)
2137 + struct adf_bar *pmisc =
2138 + &GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)];
2139 + void __iomem *pmisc_bar_addr = pmisc->virt_addr;
2140 +- u32 vf_mask;
2141 ++ unsigned long vf_mask;
2142 +
2143 + /* Get the interrupt sources triggered by VFs */
2144 + vf_mask = ((ADF_CSR_RD(pmisc_bar_addr, ADF_ERRSOU5) &
2145 +@@ -88,8 +90,7 @@ static irqreturn_t adf_msix_isr_ae(int irq, void *dev_ptr)
2146 + * unless the VF is malicious and is attempting to
2147 + * flood the host OS with VF2PF interrupts.
2148 + */
2149 +- for_each_set_bit(i, (const unsigned long *)&vf_mask,
2150 +- (sizeof(vf_mask) * BITS_PER_BYTE)) {
2151 ++ for_each_set_bit(i, &vf_mask, ADF_MAX_NUM_VFS) {
2152 + vf_info = accel_dev->pf.vf_info + i;
2153 +
2154 + if (!__ratelimit(&vf_info->vf2pf_ratelimit)) {
2155 +diff --git a/drivers/crypto/qat/qat_common/adf_pf2vf_msg.c b/drivers/crypto/qat/qat_common/adf_pf2vf_msg.c
2156 +index 8b090b7ae8c6b..e829c6aaf16fd 100644
2157 +--- a/drivers/crypto/qat/qat_common/adf_pf2vf_msg.c
2158 ++++ b/drivers/crypto/qat/qat_common/adf_pf2vf_msg.c
2159 +@@ -186,7 +186,6 @@ int adf_iov_putmsg(struct adf_accel_dev *accel_dev, u32 msg, u8 vf_nr)
2160 +
2161 + return ret;
2162 + }
2163 +-EXPORT_SYMBOL_GPL(adf_iov_putmsg);
2164 +
2165 + void adf_vf2pf_req_hndl(struct adf_accel_vf_info *vf_info)
2166 + {
2167 +@@ -316,6 +315,8 @@ static int adf_vf2pf_request_version(struct adf_accel_dev *accel_dev)
2168 + msg |= ADF_PFVF_COMPATIBILITY_VERSION << ADF_VF2PF_COMPAT_VER_REQ_SHIFT;
2169 + BUILD_BUG_ON(ADF_PFVF_COMPATIBILITY_VERSION > 255);
2170 +
2171 ++ reinit_completion(&accel_dev->vf.iov_msg_completion);
2172 ++
2173 + /* Send request from VF to PF */
2174 + ret = adf_iov_putmsg(accel_dev, msg, 0);
2175 + if (ret) {
2176 +diff --git a/drivers/crypto/qat/qat_common/adf_vf2pf_msg.c b/drivers/crypto/qat/qat_common/adf_vf2pf_msg.c
2177 +index 2c98fb63f7b72..54b738da829d8 100644
2178 +--- a/drivers/crypto/qat/qat_common/adf_vf2pf_msg.c
2179 ++++ b/drivers/crypto/qat/qat_common/adf_vf2pf_msg.c
2180 +@@ -5,14 +5,14 @@
2181 + #include "adf_pf2vf_msg.h"
2182 +
2183 + /**
2184 +- * adf_vf2pf_init() - send init msg to PF
2185 ++ * adf_vf2pf_notify_init() - send init msg to PF
2186 + * @accel_dev: Pointer to acceleration VF device.
2187 + *
2188 + * Function sends an init messge from the VF to a PF
2189 + *
2190 + * Return: 0 on success, error code otherwise.
2191 + */
2192 +-int adf_vf2pf_init(struct adf_accel_dev *accel_dev)
2193 ++int adf_vf2pf_notify_init(struct adf_accel_dev *accel_dev)
2194 + {
2195 + u32 msg = (ADF_VF2PF_MSGORIGIN_SYSTEM |
2196 + (ADF_VF2PF_MSGTYPE_INIT << ADF_VF2PF_MSGTYPE_SHIFT));
2197 +@@ -25,17 +25,17 @@ int adf_vf2pf_init(struct adf_accel_dev *accel_dev)
2198 + set_bit(ADF_STATUS_PF_RUNNING, &accel_dev->status);
2199 + return 0;
2200 + }
2201 +-EXPORT_SYMBOL_GPL(adf_vf2pf_init);
2202 ++EXPORT_SYMBOL_GPL(adf_vf2pf_notify_init);
2203 +
2204 + /**
2205 +- * adf_vf2pf_shutdown() - send shutdown msg to PF
2206 ++ * adf_vf2pf_notify_shutdown() - send shutdown msg to PF
2207 + * @accel_dev: Pointer to acceleration VF device.
2208 + *
2209 + * Function sends a shutdown messge from the VF to a PF
2210 + *
2211 + * Return: void
2212 + */
2213 +-void adf_vf2pf_shutdown(struct adf_accel_dev *accel_dev)
2214 ++void adf_vf2pf_notify_shutdown(struct adf_accel_dev *accel_dev)
2215 + {
2216 + u32 msg = (ADF_VF2PF_MSGORIGIN_SYSTEM |
2217 + (ADF_VF2PF_MSGTYPE_SHUTDOWN << ADF_VF2PF_MSGTYPE_SHIFT));
2218 +@@ -45,4 +45,4 @@ void adf_vf2pf_shutdown(struct adf_accel_dev *accel_dev)
2219 + dev_err(&GET_DEV(accel_dev),
2220 + "Failed to send Shutdown event to PF\n");
2221 + }
2222 +-EXPORT_SYMBOL_GPL(adf_vf2pf_shutdown);
2223 ++EXPORT_SYMBOL_GPL(adf_vf2pf_notify_shutdown);
2224 +diff --git a/drivers/crypto/qat/qat_common/adf_vf_isr.c b/drivers/crypto/qat/qat_common/adf_vf_isr.c
2225 +index 31a36288623a2..024401ec9d1ae 100644
2226 +--- a/drivers/crypto/qat/qat_common/adf_vf_isr.c
2227 ++++ b/drivers/crypto/qat/qat_common/adf_vf_isr.c
2228 +@@ -159,6 +159,7 @@ static irqreturn_t adf_isr(int irq, void *privdata)
2229 + struct adf_bar *pmisc =
2230 + &GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)];
2231 + void __iomem *pmisc_bar_addr = pmisc->virt_addr;
2232 ++ bool handled = false;
2233 + u32 v_int;
2234 +
2235 + /* Read VF INT source CSR to determine the source of VF interrupt */
2236 +@@ -171,7 +172,7 @@ static irqreturn_t adf_isr(int irq, void *privdata)
2237 +
2238 + /* Schedule tasklet to handle interrupt BH */
2239 + tasklet_hi_schedule(&accel_dev->vf.pf2vf_bh_tasklet);
2240 +- return IRQ_HANDLED;
2241 ++ handled = true;
2242 + }
2243 +
2244 + /* Check bundle interrupt */
2245 +@@ -183,10 +184,10 @@ static irqreturn_t adf_isr(int irq, void *privdata)
2246 + WRITE_CSR_INT_FLAG_AND_COL(bank->csr_addr, bank->bank_number,
2247 + 0);
2248 + tasklet_hi_schedule(&bank->resp_handler);
2249 +- return IRQ_HANDLED;
2250 ++ handled = true;
2251 + }
2252 +
2253 +- return IRQ_NONE;
2254 ++ return handled ? IRQ_HANDLED : IRQ_NONE;
2255 + }
2256 +
2257 + static int adf_request_msi_irq(struct adf_accel_dev *accel_dev)
2258 +diff --git a/drivers/crypto/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c b/drivers/crypto/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c
2259 +index 5246f0524ca34..fc4cf141b1dea 100644
2260 +--- a/drivers/crypto/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c
2261 ++++ b/drivers/crypto/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c
2262 +@@ -79,10 +79,10 @@ void adf_init_hw_data_dh895xcciov(struct adf_hw_device_data *hw_data)
2263 + hw_data->enable_error_correction = adf_vf_void_noop;
2264 + hw_data->init_admin_comms = adf_vf_int_noop;
2265 + hw_data->exit_admin_comms = adf_vf_void_noop;
2266 +- hw_data->send_admin_init = adf_vf2pf_init;
2267 ++ hw_data->send_admin_init = adf_vf2pf_notify_init;
2268 + hw_data->init_arb = adf_vf_int_noop;
2269 + hw_data->exit_arb = adf_vf_void_noop;
2270 +- hw_data->disable_iov = adf_vf2pf_shutdown;
2271 ++ hw_data->disable_iov = adf_vf2pf_notify_shutdown;
2272 + hw_data->get_accel_mask = get_accel_mask;
2273 + hw_data->get_ae_mask = get_ae_mask;
2274 + hw_data->get_num_accels = get_num_accels;
2275 +diff --git a/drivers/edac/i10nm_base.c b/drivers/edac/i10nm_base.c
2276 +index 4912a7b883801..3a7362f968c9f 100644
2277 +--- a/drivers/edac/i10nm_base.c
2278 ++++ b/drivers/edac/i10nm_base.c
2279 +@@ -26,8 +26,8 @@
2280 + pci_read_config_dword((d)->uracu, 0xd8 + (i) * 4, &(reg))
2281 + #define I10NM_GET_DIMMMTR(m, i, j) \
2282 + readl((m)->mbase + 0x2080c + (i) * 0x4000 + (j) * 4)
2283 +-#define I10NM_GET_MCDDRTCFG(m, i, j) \
2284 +- readl((m)->mbase + 0x20970 + (i) * 0x4000 + (j) * 4)
2285 ++#define I10NM_GET_MCDDRTCFG(m, i) \
2286 ++ readl((m)->mbase + 0x20970 + (i) * 0x4000)
2287 + #define I10NM_GET_MCMTR(m, i) \
2288 + readl((m)->mbase + 0x20ef8 + (i) * 0x4000)
2289 +
2290 +@@ -170,10 +170,10 @@ static int i10nm_get_dimm_config(struct mem_ctl_info *mci)
2291 + continue;
2292 +
2293 + ndimms = 0;
2294 ++ mcddrtcfg = I10NM_GET_MCDDRTCFG(imc, i);
2295 + for (j = 0; j < I10NM_NUM_DIMMS; j++) {
2296 + dimm = edac_get_dimm(mci, i, j, 0);
2297 + mtr = I10NM_GET_DIMMMTR(imc, i, j);
2298 +- mcddrtcfg = I10NM_GET_MCDDRTCFG(imc, i, j);
2299 + edac_dbg(1, "dimmmtr 0x%x mcddrtcfg 0x%x (mc%d ch%d dimm%d)\n",
2300 + mtr, mcddrtcfg, imc->mc, i, j);
2301 +
2302 +diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c
2303 +index 6c474fbef32af..b6d4ae84a9a5b 100644
2304 +--- a/drivers/edac/mce_amd.c
2305 ++++ b/drivers/edac/mce_amd.c
2306 +@@ -1176,6 +1176,9 @@ static int __init mce_amd_init(void)
2307 + c->x86_vendor != X86_VENDOR_HYGON)
2308 + return -ENODEV;
2309 +
2310 ++ if (cpu_feature_enabled(X86_FEATURE_HYPERVISOR))
2311 ++ return -ENODEV;
2312 ++
2313 + if (boot_cpu_has(X86_FEATURE_SMCA)) {
2314 + xec_mask = 0x3f;
2315 + goto out;
2316 +diff --git a/drivers/firmware/raspberrypi.c b/drivers/firmware/raspberrypi.c
2317 +index 2371d08bdd17a..1d965c1252cac 100644
2318 +--- a/drivers/firmware/raspberrypi.c
2319 ++++ b/drivers/firmware/raspberrypi.c
2320 +@@ -7,6 +7,7 @@
2321 + */
2322 +
2323 + #include <linux/dma-mapping.h>
2324 ++#include <linux/kref.h>
2325 + #include <linux/mailbox_client.h>
2326 + #include <linux/module.h>
2327 + #include <linux/of_platform.h>
2328 +@@ -27,6 +28,8 @@ struct rpi_firmware {
2329 + struct mbox_chan *chan; /* The property channel. */
2330 + struct completion c;
2331 + u32 enabled;
2332 ++
2333 ++ struct kref consumers;
2334 + };
2335 +
2336 + static DEFINE_MUTEX(transaction_lock);
2337 +@@ -225,12 +228,31 @@ static void rpi_register_clk_driver(struct device *dev)
2338 + -1, NULL, 0);
2339 + }
2340 +
2341 ++static void rpi_firmware_delete(struct kref *kref)
2342 ++{
2343 ++ struct rpi_firmware *fw = container_of(kref, struct rpi_firmware,
2344 ++ consumers);
2345 ++
2346 ++ mbox_free_channel(fw->chan);
2347 ++ kfree(fw);
2348 ++}
2349 ++
2350 ++void rpi_firmware_put(struct rpi_firmware *fw)
2351 ++{
2352 ++ kref_put(&fw->consumers, rpi_firmware_delete);
2353 ++}
2354 ++EXPORT_SYMBOL_GPL(rpi_firmware_put);
2355 ++
2356 + static int rpi_firmware_probe(struct platform_device *pdev)
2357 + {
2358 + struct device *dev = &pdev->dev;
2359 + struct rpi_firmware *fw;
2360 +
2361 +- fw = devm_kzalloc(dev, sizeof(*fw), GFP_KERNEL);
2362 ++ /*
2363 ++ * Memory will be freed by rpi_firmware_delete() once all users have
2364 ++ * released their firmware handles. Don't use devm_kzalloc() here.
2365 ++ */
2366 ++ fw = kzalloc(sizeof(*fw), GFP_KERNEL);
2367 + if (!fw)
2368 + return -ENOMEM;
2369 +
2370 +@@ -247,6 +269,7 @@ static int rpi_firmware_probe(struct platform_device *pdev)
2371 + }
2372 +
2373 + init_completion(&fw->c);
2374 ++ kref_init(&fw->consumers);
2375 +
2376 + platform_set_drvdata(pdev, fw);
2377 +
2378 +@@ -275,7 +298,8 @@ static int rpi_firmware_remove(struct platform_device *pdev)
2379 + rpi_hwmon = NULL;
2380 + platform_device_unregister(rpi_clk);
2381 + rpi_clk = NULL;
2382 +- mbox_free_channel(fw->chan);
2383 ++
2384 ++ rpi_firmware_put(fw);
2385 +
2386 + return 0;
2387 + }
2388 +@@ -284,16 +308,32 @@ static int rpi_firmware_remove(struct platform_device *pdev)
2389 + * rpi_firmware_get - Get pointer to rpi_firmware structure.
2390 + * @firmware_node: Pointer to the firmware Device Tree node.
2391 + *
2392 ++ * The reference to rpi_firmware has to be released with rpi_firmware_put().
2393 ++ *
2394 + * Returns NULL is the firmware device is not ready.
2395 + */
2396 + struct rpi_firmware *rpi_firmware_get(struct device_node *firmware_node)
2397 + {
2398 + struct platform_device *pdev = of_find_device_by_node(firmware_node);
2399 ++ struct rpi_firmware *fw;
2400 +
2401 + if (!pdev)
2402 + return NULL;
2403 +
2404 +- return platform_get_drvdata(pdev);
2405 ++ fw = platform_get_drvdata(pdev);
2406 ++ if (!fw)
2407 ++ goto err_put_device;
2408 ++
2409 ++ if (!kref_get_unless_zero(&fw->consumers))
2410 ++ goto err_put_device;
2411 ++
2412 ++ put_device(&pdev->dev);
2413 ++
2414 ++ return fw;
2415 ++
2416 ++err_put_device:
2417 ++ put_device(&pdev->dev);
2418 ++ return NULL;
2419 + }
2420 + EXPORT_SYMBOL_GPL(rpi_firmware_get);
2421 +
2422 +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
2423 +index d3e51d361179e..eb68b0f1da825 100644
2424 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
2425 ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
2426 +@@ -160,17 +160,28 @@ static int acp_poweron(struct generic_pm_domain *genpd)
2427 + return 0;
2428 + }
2429 +
2430 +-static struct device *get_mfd_cell_dev(const char *device_name, int r)
2431 ++static int acp_genpd_add_device(struct device *dev, void *data)
2432 + {
2433 +- char auto_dev_name[25];
2434 +- struct device *dev;
2435 ++ struct generic_pm_domain *gpd = data;
2436 ++ int ret;
2437 +
2438 +- snprintf(auto_dev_name, sizeof(auto_dev_name),
2439 +- "%s.%d.auto", device_name, r);
2440 +- dev = bus_find_device_by_name(&platform_bus_type, NULL, auto_dev_name);
2441 +- dev_info(dev, "device %s added to pm domain\n", auto_dev_name);
2442 ++ ret = pm_genpd_add_device(gpd, dev);
2443 ++ if (ret)
2444 ++ dev_err(dev, "Failed to add dev to genpd %d\n", ret);
2445 +
2446 +- return dev;
2447 ++ return ret;
2448 ++}
2449 ++
2450 ++static int acp_genpd_remove_device(struct device *dev, void *data)
2451 ++{
2452 ++ int ret;
2453 ++
2454 ++ ret = pm_genpd_remove_device(dev);
2455 ++ if (ret)
2456 ++ dev_err(dev, "Failed to remove dev from genpd %d\n", ret);
2457 ++
2458 ++ /* Continue to remove */
2459 ++ return 0;
2460 + }
2461 +
2462 + /**
2463 +@@ -181,11 +192,10 @@ static struct device *get_mfd_cell_dev(const char *device_name, int r)
2464 + */
2465 + static int acp_hw_init(void *handle)
2466 + {
2467 +- int r, i;
2468 ++ int r;
2469 + uint64_t acp_base;
2470 + u32 val = 0;
2471 + u32 count = 0;
2472 +- struct device *dev;
2473 + struct i2s_platform_data *i2s_pdata = NULL;
2474 +
2475 + struct amdgpu_device *adev = (struct amdgpu_device *)handle;
2476 +@@ -341,15 +351,10 @@ static int acp_hw_init(void *handle)
2477 + if (r)
2478 + goto failure;
2479 +
2480 +- for (i = 0; i < ACP_DEVS ; i++) {
2481 +- dev = get_mfd_cell_dev(adev->acp.acp_cell[i].name, i);
2482 +- r = pm_genpd_add_device(&adev->acp.acp_genpd->gpd, dev);
2483 +- if (r) {
2484 +- dev_err(dev, "Failed to add dev to genpd\n");
2485 +- goto failure;
2486 +- }
2487 +- }
2488 +-
2489 ++ r = device_for_each_child(adev->acp.parent, &adev->acp.acp_genpd->gpd,
2490 ++ acp_genpd_add_device);
2491 ++ if (r)
2492 ++ goto failure;
2493 +
2494 + /* Assert Soft reset of ACP */
2495 + val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET);
2496 +@@ -410,10 +415,8 @@ failure:
2497 + */
2498 + static int acp_hw_fini(void *handle)
2499 + {
2500 +- int i, ret;
2501 + u32 val = 0;
2502 + u32 count = 0;
2503 +- struct device *dev;
2504 + struct amdgpu_device *adev = (struct amdgpu_device *)handle;
2505 +
2506 + /* return early if no ACP */
2507 +@@ -458,13 +461,8 @@ static int acp_hw_fini(void *handle)
2508 + udelay(100);
2509 + }
2510 +
2511 +- for (i = 0; i < ACP_DEVS ; i++) {
2512 +- dev = get_mfd_cell_dev(adev->acp.acp_cell[i].name, i);
2513 +- ret = pm_genpd_remove_device(dev);
2514 +- /* If removal fails, dont giveup and try rest */
2515 +- if (ret)
2516 +- dev_err(dev, "remove dev from genpd failed\n");
2517 +- }
2518 ++ device_for_each_child(adev->acp.parent, NULL,
2519 ++ acp_genpd_remove_device);
2520 +
2521 + mfd_remove_devices(adev->acp.parent);
2522 + kfree(adev->acp.acp_res);
2523 +diff --git a/drivers/gpu/drm/drm_of.c b/drivers/gpu/drm/drm_of.c
2524 +index ca04c34e82518..997b8827fed27 100644
2525 +--- a/drivers/gpu/drm/drm_of.c
2526 ++++ b/drivers/gpu/drm/drm_of.c
2527 +@@ -315,7 +315,7 @@ static int drm_of_lvds_get_remote_pixels_type(
2528 +
2529 + remote_port = of_graph_get_remote_port(endpoint);
2530 + if (!remote_port) {
2531 +- of_node_put(remote_port);
2532 ++ of_node_put(endpoint);
2533 + return -EPIPE;
2534 + }
2535 +
2536 +@@ -331,8 +331,10 @@ static int drm_of_lvds_get_remote_pixels_type(
2537 + * configurations by passing the endpoints explicitly to
2538 + * drm_of_lvds_get_dual_link_pixel_order().
2539 + */
2540 +- if (!current_pt || pixels_type != current_pt)
2541 ++ if (!current_pt || pixels_type != current_pt) {
2542 ++ of_node_put(endpoint);
2543 + return -EINVAL;
2544 ++ }
2545 + }
2546 +
2547 + return pixels_type;
2548 +diff --git a/drivers/gpu/drm/gma500/oaktrail_lvds.c b/drivers/gpu/drm/gma500/oaktrail_lvds.c
2549 +index 2828360153d16..30b949d6856c0 100644
2550 +--- a/drivers/gpu/drm/gma500/oaktrail_lvds.c
2551 ++++ b/drivers/gpu/drm/gma500/oaktrail_lvds.c
2552 +@@ -117,7 +117,7 @@ static void oaktrail_lvds_mode_set(st