1 |
commit: c7557f38393eb20315f6af11f166d7d3610c717c |
2 |
Author: Alice Ferrazzi <alicef <AT> gentoo <DOT> org> |
3 |
AuthorDate: Fri May 14 14:05:24 2021 +0000 |
4 |
Commit: Alice Ferrazzi <alicef <AT> gentoo <DOT> org> |
5 |
CommitDate: Fri May 14 14:05:33 2021 +0000 |
6 |
URL: https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=c7557f38 |
7 |
|
8 |
Linux patch 5.11.21 |
9 |
|
10 |
Signed-off-by: Alice Ferrazzi <alicef <AT> gentoo.org> |
11 |
|
12 |
0000_README | 4 + |
13 |
1020_linux-5.11.21.patch | 24433 +++++++++++++++++++++++++++++++++++++++++++++ |
14 |
2 files changed, 24437 insertions(+) |
15 |
|
16 |
diff --git a/0000_README b/0000_README |
17 |
index d79f34a..0fbd0c9 100644 |
18 |
--- a/0000_README |
19 |
+++ b/0000_README |
20 |
@@ -123,6 +123,10 @@ Patch: 1019_linux-5.11.20.patch |
21 |
From: http://www.kernel.org |
22 |
Desc: Linux 5.11.20 |
23 |
|
24 |
+Patch: 1020_linux-5.11.21.patch |
25 |
+From: http://www.kernel.org |
26 |
+Desc: Linux 5.11.21 |
27 |
+ |
28 |
Patch: 1500_XATTR_USER_PREFIX.patch |
29 |
From: https://bugs.gentoo.org/show_bug.cgi?id=470644 |
30 |
Desc: Support for namespace user.pax.* on tmpfs. |
31 |
|
32 |
diff --git a/1020_linux-5.11.21.patch b/1020_linux-5.11.21.patch |
33 |
new file mode 100644 |
34 |
index 0000000..0bb358b |
35 |
--- /dev/null |
36 |
+++ b/1020_linux-5.11.21.patch |
37 |
@@ -0,0 +1,24433 @@ |
38 |
+diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt |
39 |
+index a10b545c2070a..b537a96088958 100644 |
40 |
+--- a/Documentation/admin-guide/kernel-parameters.txt |
41 |
++++ b/Documentation/admin-guide/kernel-parameters.txt |
42 |
+@@ -1854,13 +1854,6 @@ |
43 |
+ bypassed by not enabling DMAR with this option. In |
44 |
+ this case, gfx device will use physical address for |
45 |
+ DMA. |
46 |
+- forcedac [X86-64] |
47 |
+- With this option iommu will not optimize to look |
48 |
+- for io virtual address below 32-bit forcing dual |
49 |
+- address cycle on pci bus for cards supporting greater |
50 |
+- than 32-bit addressing. The default is to look |
51 |
+- for translation below 32-bit and if not available |
52 |
+- then look in the higher range. |
53 |
+ strict [Default Off] |
54 |
+ With this option on every unmap_single operation will |
55 |
+ result in a hardware IOTLB flush operation as opposed |
56 |
+@@ -1949,6 +1942,14 @@ |
57 |
+ nobypass [PPC/POWERNV] |
58 |
+ Disable IOMMU bypass, using IOMMU for PCI devices. |
59 |
+ |
60 |
++ iommu.forcedac= [ARM64, X86] Control IOVA allocation for PCI devices. |
61 |
++ Format: { "0" | "1" } |
62 |
++ 0 - Try to allocate a 32-bit DMA address first, before |
63 |
++ falling back to the full range if needed. |
64 |
++ 1 - Allocate directly from the full usable range, |
65 |
++ forcing Dual Address Cycle for PCI cards supporting |
66 |
++ greater than 32-bit addressing. |
67 |
++ |
68 |
+ iommu.strict= [ARM64] Configure TLB invalidation behaviour |
69 |
+ Format: { "0" | "1" } |
70 |
+ 0 - Lazy mode. |
71 |
+diff --git a/Documentation/devicetree/bindings/serial/st,stm32-uart.yaml b/Documentation/devicetree/bindings/serial/st,stm32-uart.yaml |
72 |
+index 06d5f251ec880..51f390e5c276c 100644 |
73 |
+--- a/Documentation/devicetree/bindings/serial/st,stm32-uart.yaml |
74 |
++++ b/Documentation/devicetree/bindings/serial/st,stm32-uart.yaml |
75 |
+@@ -77,7 +77,8 @@ required: |
76 |
+ - interrupts |
77 |
+ - clocks |
78 |
+ |
79 |
+-additionalProperties: false |
80 |
++additionalProperties: |
81 |
++ type: object |
82 |
+ |
83 |
+ examples: |
84 |
+ - | |
85 |
+diff --git a/Documentation/driver-api/xilinx/eemi.rst b/Documentation/driver-api/xilinx/eemi.rst |
86 |
+index 9dcbc6f18d75d..c1bc47b9000dc 100644 |
87 |
+--- a/Documentation/driver-api/xilinx/eemi.rst |
88 |
++++ b/Documentation/driver-api/xilinx/eemi.rst |
89 |
+@@ -16,35 +16,8 @@ components running across different processing clusters on a chip or |
90 |
+ device to communicate with a power management controller (PMC) on a |
91 |
+ device to issue or respond to power management requests. |
92 |
+ |
93 |
+-EEMI ops is a structure containing all eemi APIs supported by Zynq MPSoC. |
94 |
+-The zynqmp-firmware driver maintain all EEMI APIs in zynqmp_eemi_ops |
95 |
+-structure. Any driver who want to communicate with PMC using EEMI APIs |
96 |
+-can call zynqmp_pm_get_eemi_ops(). |
97 |
+- |
98 |
+-Example of EEMI ops:: |
99 |
+- |
100 |
+- /* zynqmp-firmware driver maintain all EEMI APIs */ |
101 |
+- struct zynqmp_eemi_ops { |
102 |
+- int (*get_api_version)(u32 *version); |
103 |
+- int (*query_data)(struct zynqmp_pm_query_data qdata, u32 *out); |
104 |
+- }; |
105 |
+- |
106 |
+- static const struct zynqmp_eemi_ops eemi_ops = { |
107 |
+- .get_api_version = zynqmp_pm_get_api_version, |
108 |
+- .query_data = zynqmp_pm_query_data, |
109 |
+- }; |
110 |
+- |
111 |
+-Example of EEMI ops usage:: |
112 |
+- |
113 |
+- static const struct zynqmp_eemi_ops *eemi_ops; |
114 |
+- u32 ret_payload[PAYLOAD_ARG_CNT]; |
115 |
+- int ret; |
116 |
+- |
117 |
+- eemi_ops = zynqmp_pm_get_eemi_ops(); |
118 |
+- if (IS_ERR(eemi_ops)) |
119 |
+- return PTR_ERR(eemi_ops); |
120 |
+- |
121 |
+- ret = eemi_ops->query_data(qdata, ret_payload); |
122 |
++Any driver who wants to communicate with PMC using EEMI APIs use the |
123 |
++functions provided for each function. |
124 |
+ |
125 |
+ IOCTL |
126 |
+ ------ |
127 |
+diff --git a/Documentation/userspace-api/media/v4l/subdev-formats.rst b/Documentation/userspace-api/media/v4l/subdev-formats.rst |
128 |
+index 7f16cbe46e5c2..e6a9faa811973 100644 |
129 |
+--- a/Documentation/userspace-api/media/v4l/subdev-formats.rst |
130 |
++++ b/Documentation/userspace-api/media/v4l/subdev-formats.rst |
131 |
+@@ -1567,8 +1567,8 @@ The following tables list existing packed RGB formats. |
132 |
+ - MEDIA_BUS_FMT_RGB101010_1X30 |
133 |
+ - 0x1018 |
134 |
+ - |
135 |
+- - 0 |
136 |
+- - 0 |
137 |
++ - |
138 |
++ - |
139 |
+ - r\ :sub:`9` |
140 |
+ - r\ :sub:`8` |
141 |
+ - r\ :sub:`7` |
142 |
+diff --git a/Makefile b/Makefile |
143 |
+index 87597736db035..11ca74eabf47d 100644 |
144 |
+--- a/Makefile |
145 |
++++ b/Makefile |
146 |
+@@ -1,7 +1,7 @@ |
147 |
+ # SPDX-License-Identifier: GPL-2.0 |
148 |
+ VERSION = 5 |
149 |
+ PATCHLEVEL = 11 |
150 |
+-SUBLEVEL = 20 |
151 |
++SUBLEVEL = 21 |
152 |
+ EXTRAVERSION = |
153 |
+ NAME = 💕 Valentine's Day Edition 💕 |
154 |
+ |
155 |
+diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts |
156 |
+index a4b77aec5424b..5b5415d14c533 100644 |
157 |
+--- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts |
158 |
++++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts |
159 |
+@@ -712,9 +712,9 @@ |
160 |
+ multi-master; |
161 |
+ status = "okay"; |
162 |
+ |
163 |
+- si7021-a20@20 { |
164 |
++ si7021-a20@40 { |
165 |
+ compatible = "silabs,si7020"; |
166 |
+- reg = <0x20>; |
167 |
++ reg = <0x40>; |
168 |
+ }; |
169 |
+ |
170 |
+ tmp275@48 { |
171 |
+diff --git a/arch/arm/boot/dts/exynos4210-i9100.dts b/arch/arm/boot/dts/exynos4210-i9100.dts |
172 |
+index a0c3bab382aee..e56b64e237d34 100644 |
173 |
+--- a/arch/arm/boot/dts/exynos4210-i9100.dts |
174 |
++++ b/arch/arm/boot/dts/exynos4210-i9100.dts |
175 |
+@@ -136,7 +136,7 @@ |
176 |
+ compatible = "maxim,max17042"; |
177 |
+ |
178 |
+ interrupt-parent = <&gpx2>; |
179 |
+- interrupts = <3 IRQ_TYPE_EDGE_FALLING>; |
180 |
++ interrupts = <3 IRQ_TYPE_LEVEL_LOW>; |
181 |
+ |
182 |
+ pinctrl-0 = <&max17042_fuel_irq>; |
183 |
+ pinctrl-names = "default"; |
184 |
+diff --git a/arch/arm/boot/dts/exynos4412-midas.dtsi b/arch/arm/boot/dts/exynos4412-midas.dtsi |
185 |
+index 111c32bae02c0..fc77c1bfd844e 100644 |
186 |
+--- a/arch/arm/boot/dts/exynos4412-midas.dtsi |
187 |
++++ b/arch/arm/boot/dts/exynos4412-midas.dtsi |
188 |
+@@ -173,7 +173,7 @@ |
189 |
+ pmic@66 { |
190 |
+ compatible = "maxim,max77693"; |
191 |
+ interrupt-parent = <&gpx1>; |
192 |
+- interrupts = <5 IRQ_TYPE_EDGE_FALLING>; |
193 |
++ interrupts = <5 IRQ_TYPE_LEVEL_LOW>; |
194 |
+ pinctrl-names = "default"; |
195 |
+ pinctrl-0 = <&max77693_irq>; |
196 |
+ reg = <0x66>; |
197 |
+@@ -221,7 +221,7 @@ |
198 |
+ fuel-gauge@36 { |
199 |
+ compatible = "maxim,max17047"; |
200 |
+ interrupt-parent = <&gpx2>; |
201 |
+- interrupts = <3 IRQ_TYPE_EDGE_FALLING>; |
202 |
++ interrupts = <3 IRQ_TYPE_LEVEL_LOW>; |
203 |
+ pinctrl-names = "default"; |
204 |
+ pinctrl-0 = <&max77693_fuel_irq>; |
205 |
+ reg = <0x36>; |
206 |
+@@ -665,7 +665,7 @@ |
207 |
+ max77686: pmic@9 { |
208 |
+ compatible = "maxim,max77686"; |
209 |
+ interrupt-parent = <&gpx0>; |
210 |
+- interrupts = <7 IRQ_TYPE_NONE>; |
211 |
++ interrupts = <7 IRQ_TYPE_LEVEL_LOW>; |
212 |
+ pinctrl-0 = <&max77686_irq>; |
213 |
+ pinctrl-names = "default"; |
214 |
+ reg = <0x09>; |
215 |
+diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi |
216 |
+index 2b20d9095d9f2..eebe6a3952ce8 100644 |
217 |
+--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi |
218 |
++++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi |
219 |
+@@ -278,7 +278,7 @@ |
220 |
+ max77686: pmic@9 { |
221 |
+ compatible = "maxim,max77686"; |
222 |
+ interrupt-parent = <&gpx3>; |
223 |
+- interrupts = <2 IRQ_TYPE_NONE>; |
224 |
++ interrupts = <2 IRQ_TYPE_LEVEL_LOW>; |
225 |
+ pinctrl-names = "default"; |
226 |
+ pinctrl-0 = <&max77686_irq>; |
227 |
+ reg = <0x09>; |
228 |
+diff --git a/arch/arm/boot/dts/exynos4412-p4note.dtsi b/arch/arm/boot/dts/exynos4412-p4note.dtsi |
229 |
+index b2f9d5448a188..9e750890edb87 100644 |
230 |
+--- a/arch/arm/boot/dts/exynos4412-p4note.dtsi |
231 |
++++ b/arch/arm/boot/dts/exynos4412-p4note.dtsi |
232 |
+@@ -146,7 +146,7 @@ |
233 |
+ pinctrl-0 = <&fuel_alert_irq>; |
234 |
+ pinctrl-names = "default"; |
235 |
+ interrupt-parent = <&gpx2>; |
236 |
+- interrupts = <3 IRQ_TYPE_EDGE_FALLING>; |
237 |
++ interrupts = <3 IRQ_TYPE_LEVEL_LOW>; |
238 |
+ maxim,rsns-microohm = <10000>; |
239 |
+ maxim,over-heat-temp = <600>; |
240 |
+ maxim,over-volt = <4300>; |
241 |
+@@ -322,7 +322,7 @@ |
242 |
+ max77686: pmic@9 { |
243 |
+ compatible = "maxim,max77686"; |
244 |
+ interrupt-parent = <&gpx0>; |
245 |
+- interrupts = <7 IRQ_TYPE_NONE>; |
246 |
++ interrupts = <7 IRQ_TYPE_LEVEL_LOW>; |
247 |
+ pinctrl-0 = <&max77686_irq>; |
248 |
+ pinctrl-names = "default"; |
249 |
+ reg = <0x09>; |
250 |
+diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts |
251 |
+index 8b5a79a8720c6..39bbe18145cf2 100644 |
252 |
+--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts |
253 |
++++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts |
254 |
+@@ -134,7 +134,7 @@ |
255 |
+ compatible = "maxim,max77686"; |
256 |
+ reg = <0x09>; |
257 |
+ interrupt-parent = <&gpx3>; |
258 |
+- interrupts = <2 IRQ_TYPE_NONE>; |
259 |
++ interrupts = <2 IRQ_TYPE_LEVEL_LOW>; |
260 |
+ pinctrl-names = "default"; |
261 |
+ pinctrl-0 = <&max77686_irq>; |
262 |
+ #clock-cells = <1>; |
263 |
+diff --git a/arch/arm/boot/dts/exynos5250-snow-common.dtsi b/arch/arm/boot/dts/exynos5250-snow-common.dtsi |
264 |
+index 6635f6184051e..2335c46873494 100644 |
265 |
+--- a/arch/arm/boot/dts/exynos5250-snow-common.dtsi |
266 |
++++ b/arch/arm/boot/dts/exynos5250-snow-common.dtsi |
267 |
+@@ -292,7 +292,7 @@ |
268 |
+ max77686: pmic@9 { |
269 |
+ compatible = "maxim,max77686"; |
270 |
+ interrupt-parent = <&gpx3>; |
271 |
+- interrupts = <2 IRQ_TYPE_NONE>; |
272 |
++ interrupts = <2 IRQ_TYPE_LEVEL_LOW>; |
273 |
+ pinctrl-names = "default"; |
274 |
+ pinctrl-0 = <&max77686_irq>; |
275 |
+ wakeup-source; |
276 |
+diff --git a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts |
277 |
+index e769f638f2052..4c6f54aa9f66a 100644 |
278 |
+--- a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts |
279 |
++++ b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts |
280 |
+@@ -575,7 +575,7 @@ |
281 |
+ maxim,rcomp = /bits/ 8 <0x4d>; |
282 |
+ |
283 |
+ interrupt-parent = <&msmgpio>; |
284 |
+- interrupts = <9 IRQ_TYPE_EDGE_FALLING>; |
285 |
++ interrupts = <9 IRQ_TYPE_LEVEL_LOW>; |
286 |
+ |
287 |
+ pinctrl-names = "default"; |
288 |
+ pinctrl-0 = <&fuelgauge_pin>; |
289 |
+diff --git a/arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts b/arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts |
290 |
+index 97352de913142..64a3fdb79539e 100644 |
291 |
+--- a/arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts |
292 |
++++ b/arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts |
293 |
+@@ -691,7 +691,7 @@ |
294 |
+ maxim,rcomp = /bits/ 8 <0x56>; |
295 |
+ |
296 |
+ interrupt-parent = <&pma8084_gpios>; |
297 |
+- interrupts = <21 IRQ_TYPE_EDGE_FALLING>; |
298 |
++ interrupts = <21 IRQ_TYPE_LEVEL_LOW>; |
299 |
+ |
300 |
+ pinctrl-names = "default"; |
301 |
+ pinctrl-0 = <&fuelgauge_pin>; |
302 |
+diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts |
303 |
+index 09a152b915575..1d6f0c5d02e9a 100644 |
304 |
+--- a/arch/arm/boot/dts/r8a7790-lager.dts |
305 |
++++ b/arch/arm/boot/dts/r8a7790-lager.dts |
306 |
+@@ -53,6 +53,9 @@ |
307 |
+ i2c11 = &i2cexio1; |
308 |
+ i2c12 = &i2chdmi; |
309 |
+ i2c13 = &i2cpwr; |
310 |
++ mmc0 = &mmcif1; |
311 |
++ mmc1 = &sdhi0; |
312 |
++ mmc2 = &sdhi2; |
313 |
+ }; |
314 |
+ |
315 |
+ chosen { |
316 |
+diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts |
317 |
+index f603cba5441fc..6af1727b82690 100644 |
318 |
+--- a/arch/arm/boot/dts/r8a7791-koelsch.dts |
319 |
++++ b/arch/arm/boot/dts/r8a7791-koelsch.dts |
320 |
+@@ -53,6 +53,9 @@ |
321 |
+ i2c12 = &i2cexio1; |
322 |
+ i2c13 = &i2chdmi; |
323 |
+ i2c14 = &i2cexio4; |
324 |
++ mmc0 = &sdhi0; |
325 |
++ mmc1 = &sdhi1; |
326 |
++ mmc2 = &sdhi2; |
327 |
+ }; |
328 |
+ |
329 |
+ chosen { |
330 |
+diff --git a/arch/arm/boot/dts/r8a7791-porter.dts b/arch/arm/boot/dts/r8a7791-porter.dts |
331 |
+index c6d563fb7ec7c..bf51e29c793a3 100644 |
332 |
+--- a/arch/arm/boot/dts/r8a7791-porter.dts |
333 |
++++ b/arch/arm/boot/dts/r8a7791-porter.dts |
334 |
+@@ -28,6 +28,8 @@ |
335 |
+ serial0 = &scif0; |
336 |
+ i2c9 = &gpioi2c2; |
337 |
+ i2c10 = &i2chdmi; |
338 |
++ mmc0 = &sdhi0; |
339 |
++ mmc1 = &sdhi2; |
340 |
+ }; |
341 |
+ |
342 |
+ chosen { |
343 |
+diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts |
344 |
+index abf487e8fe0f3..2b59a04913500 100644 |
345 |
+--- a/arch/arm/boot/dts/r8a7793-gose.dts |
346 |
++++ b/arch/arm/boot/dts/r8a7793-gose.dts |
347 |
+@@ -49,6 +49,9 @@ |
348 |
+ i2c10 = &gpioi2c4; |
349 |
+ i2c11 = &i2chdmi; |
350 |
+ i2c12 = &i2cexio4; |
351 |
++ mmc0 = &sdhi0; |
352 |
++ mmc1 = &sdhi1; |
353 |
++ mmc2 = &sdhi2; |
354 |
+ }; |
355 |
+ |
356 |
+ chosen { |
357 |
+diff --git a/arch/arm/boot/dts/r8a7794-alt.dts b/arch/arm/boot/dts/r8a7794-alt.dts |
358 |
+index 3f1cc5bbf3297..32025986b3b9b 100644 |
359 |
+--- a/arch/arm/boot/dts/r8a7794-alt.dts |
360 |
++++ b/arch/arm/boot/dts/r8a7794-alt.dts |
361 |
+@@ -19,6 +19,9 @@ |
362 |
+ i2c10 = &gpioi2c4; |
363 |
+ i2c11 = &i2chdmi; |
364 |
+ i2c12 = &i2cexio4; |
365 |
++ mmc0 = &mmcif0; |
366 |
++ mmc1 = &sdhi0; |
367 |
++ mmc2 = &sdhi1; |
368 |
+ }; |
369 |
+ |
370 |
+ chosen { |
371 |
+diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts |
372 |
+index 677596f6c9c9a..af066ee5e2754 100644 |
373 |
+--- a/arch/arm/boot/dts/r8a7794-silk.dts |
374 |
++++ b/arch/arm/boot/dts/r8a7794-silk.dts |
375 |
+@@ -31,6 +31,8 @@ |
376 |
+ serial0 = &scif2; |
377 |
+ i2c9 = &gpioi2c1; |
378 |
+ i2c10 = &i2chdmi; |
379 |
++ mmc0 = &mmcif0; |
380 |
++ mmc1 = &sdhi1; |
381 |
+ }; |
382 |
+ |
383 |
+ chosen { |
384 |
+diff --git a/arch/arm/boot/dts/s5pv210-fascinate4g.dts b/arch/arm/boot/dts/s5pv210-fascinate4g.dts |
385 |
+index ca064359dd308..b47d8300e536e 100644 |
386 |
+--- a/arch/arm/boot/dts/s5pv210-fascinate4g.dts |
387 |
++++ b/arch/arm/boot/dts/s5pv210-fascinate4g.dts |
388 |
+@@ -115,7 +115,7 @@ |
389 |
+ compatible = "maxim,max77836-battery"; |
390 |
+ |
391 |
+ interrupt-parent = <&gph3>; |
392 |
+- interrupts = <3 IRQ_TYPE_EDGE_FALLING>; |
393 |
++ interrupts = <3 IRQ_TYPE_LEVEL_LOW>; |
394 |
+ |
395 |
+ pinctrl-names = "default"; |
396 |
+ pinctrl-0 = <&fg_irq>; |
397 |
+diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi |
398 |
+index 20a59e8f7a33f..f10a740ca3c15 100644 |
399 |
+--- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi |
400 |
++++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi |
401 |
+@@ -1868,10 +1868,15 @@ |
402 |
+ usart2_idle_pins_c: usart2-idle-2 { |
403 |
+ pins1 { |
404 |
+ pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */ |
405 |
+- <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */ |
406 |
+ <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */ |
407 |
+ }; |
408 |
+ pins2 { |
409 |
++ pinmux = <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */ |
410 |
++ bias-disable; |
411 |
++ drive-push-pull; |
412 |
++ slew-rate = <3>; |
413 |
++ }; |
414 |
++ pins3 { |
415 |
+ pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */ |
416 |
+ bias-disable; |
417 |
+ }; |
418 |
+@@ -1917,10 +1922,15 @@ |
419 |
+ usart3_idle_pins_b: usart3-idle-1 { |
420 |
+ pins1 { |
421 |
+ pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */ |
422 |
+- <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */ |
423 |
+ <STM32_PINMUX('I', 10, ANALOG)>; /* USART3_CTS_NSS */ |
424 |
+ }; |
425 |
+ pins2 { |
426 |
++ pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */ |
427 |
++ bias-disable; |
428 |
++ drive-push-pull; |
429 |
++ slew-rate = <0>; |
430 |
++ }; |
431 |
++ pins3 { |
432 |
+ pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */ |
433 |
+ bias-disable; |
434 |
+ }; |
435 |
+@@ -1953,10 +1963,15 @@ |
436 |
+ usart3_idle_pins_c: usart3-idle-2 { |
437 |
+ pins1 { |
438 |
+ pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */ |
439 |
+- <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */ |
440 |
+ <STM32_PINMUX('B', 13, ANALOG)>; /* USART3_CTS_NSS */ |
441 |
+ }; |
442 |
+ pins2 { |
443 |
++ pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */ |
444 |
++ bias-disable; |
445 |
++ drive-push-pull; |
446 |
++ slew-rate = <0>; |
447 |
++ }; |
448 |
++ pins3 { |
449 |
+ pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */ |
450 |
+ bias-disable; |
451 |
+ }; |
452 |
+diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi |
453 |
+index b0b15c97306b8..e81e5937a60ae 100644 |
454 |
+--- a/arch/arm/boot/dts/uniphier-pxs2.dtsi |
455 |
++++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi |
456 |
+@@ -583,7 +583,7 @@ |
457 |
+ clocks = <&sys_clk 6>; |
458 |
+ reset-names = "ether"; |
459 |
+ resets = <&sys_rst 6>; |
460 |
+- phy-mode = "rgmii"; |
461 |
++ phy-mode = "rgmii-id"; |
462 |
+ local-mac-address = [00 00 00 00 00 00]; |
463 |
+ socionext,syscon-phy-mode = <&soc_glue 0>; |
464 |
+ |
465 |
+diff --git a/arch/arm/crypto/poly1305-glue.c b/arch/arm/crypto/poly1305-glue.c |
466 |
+index 3023c1acfa194..c31bd8f7c0927 100644 |
467 |
+--- a/arch/arm/crypto/poly1305-glue.c |
468 |
++++ b/arch/arm/crypto/poly1305-glue.c |
469 |
+@@ -29,7 +29,7 @@ void __weak poly1305_blocks_neon(void *state, const u8 *src, u32 len, u32 hibit) |
470 |
+ |
471 |
+ static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_neon); |
472 |
+ |
473 |
+-void poly1305_init_arch(struct poly1305_desc_ctx *dctx, const u8 *key) |
474 |
++void poly1305_init_arch(struct poly1305_desc_ctx *dctx, const u8 key[POLY1305_KEY_SIZE]) |
475 |
+ { |
476 |
+ poly1305_init_arm(&dctx->h, key); |
477 |
+ dctx->s[0] = get_unaligned_le32(key + 16); |
478 |
+diff --git a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts |
479 |
+index 6dffada2e66b4..28aa634c9780e 100644 |
480 |
+--- a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts |
481 |
++++ b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts |
482 |
+@@ -294,7 +294,7 @@ |
483 |
+ |
484 |
+ &pwrap { |
485 |
+ /* Only MT8173 E1 needs USB power domain */ |
486 |
+- power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>; |
487 |
++ power-domains = <&spm MT8173_POWER_DOMAIN_USB>; |
488 |
+ |
489 |
+ pmic: mt6397 { |
490 |
+ compatible = "mediatek,mt6397"; |
491 |
+diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi |
492 |
+index 36a90dd2fa7c6..5477a49dc2fa1 100644 |
493 |
+--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi |
494 |
++++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi |
495 |
+@@ -969,6 +969,9 @@ |
496 |
+ compatible = "mediatek,mt8183-mmsys", "syscon"; |
497 |
+ reg = <0 0x14000000 0 0x1000>; |
498 |
+ #clock-cells = <1>; |
499 |
++ mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>, |
500 |
++ <&gce 1 CMDQ_THR_PRIO_HIGHEST>; |
501 |
++ mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>; |
502 |
+ }; |
503 |
+ |
504 |
+ ovl0: ovl@14008000 { |
505 |
+@@ -1044,6 +1047,7 @@ |
506 |
+ interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_LOW>; |
507 |
+ power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; |
508 |
+ clocks = <&mmsys CLK_MM_DISP_CCORR0>; |
509 |
++ mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xf000 0x1000>; |
510 |
+ }; |
511 |
+ |
512 |
+ aal0: aal@14010000 { |
513 |
+@@ -1053,6 +1057,7 @@ |
514 |
+ interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_LOW>; |
515 |
+ power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; |
516 |
+ clocks = <&mmsys CLK_MM_DISP_AAL0>; |
517 |
++ mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0 0x1000>; |
518 |
+ }; |
519 |
+ |
520 |
+ gamma0: gamma@14011000 { |
521 |
+@@ -1061,6 +1066,7 @@ |
522 |
+ interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_LOW>; |
523 |
+ power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; |
524 |
+ clocks = <&mmsys CLK_MM_DISP_GAMMA0>; |
525 |
++ mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x1000 0x1000>; |
526 |
+ }; |
527 |
+ |
528 |
+ dither0: dither@14012000 { |
529 |
+@@ -1069,6 +1075,7 @@ |
530 |
+ interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_LOW>; |
531 |
+ power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; |
532 |
+ clocks = <&mmsys CLK_MM_DISP_DITHER0>; |
533 |
++ mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x2000 0x1000>; |
534 |
+ }; |
535 |
+ |
536 |
+ dsi0: dsi@14014000 { |
537 |
+diff --git a/arch/arm64/boot/dts/mediatek/pumpkin-common.dtsi b/arch/arm64/boot/dts/mediatek/pumpkin-common.dtsi |
538 |
+index 63fd70086bb85..9f27e7ed5e225 100644 |
539 |
+--- a/arch/arm64/boot/dts/mediatek/pumpkin-common.dtsi |
540 |
++++ b/arch/arm64/boot/dts/mediatek/pumpkin-common.dtsi |
541 |
+@@ -56,7 +56,7 @@ |
542 |
+ tca6416: gpio@20 { |
543 |
+ compatible = "ti,tca6416"; |
544 |
+ reg = <0x20>; |
545 |
+- reset-gpios = <&pio 65 GPIO_ACTIVE_HIGH>; |
546 |
++ reset-gpios = <&pio 65 GPIO_ACTIVE_LOW>; |
547 |
+ pinctrl-names = "default"; |
548 |
+ pinctrl-0 = <&tca6416_pins>; |
549 |
+ |
550 |
+diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi |
551 |
+index 8ed7dd39f6e34..472f598cd7265 100644 |
552 |
+--- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi |
553 |
++++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi |
554 |
+@@ -22,9 +22,11 @@ |
555 |
+ thermal-sensors = <&pm6150_adc_tm 1>; |
556 |
+ |
557 |
+ trips { |
558 |
+- temperature = <125000>; |
559 |
+- hysteresis = <1000>; |
560 |
+- type = "critical"; |
561 |
++ charger-crit { |
562 |
++ temperature = <125000>; |
563 |
++ hysteresis = <1000>; |
564 |
++ type = "critical"; |
565 |
++ }; |
566 |
+ }; |
567 |
+ }; |
568 |
+ }; |
569 |
+@@ -836,17 +838,17 @@ hp_i2c: &i2c9 { |
570 |
+ }; |
571 |
+ |
572 |
+ &spi0 { |
573 |
+- pinctrl-0 = <&qup_spi0_cs_gpio>; |
574 |
++ pinctrl-0 = <&qup_spi0_cs_gpio_init_high>, <&qup_spi0_cs_gpio>; |
575 |
+ cs-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>; |
576 |
+ }; |
577 |
+ |
578 |
+ &spi6 { |
579 |
+- pinctrl-0 = <&qup_spi6_cs_gpio>; |
580 |
++ pinctrl-0 = <&qup_spi6_cs_gpio_init_high>, <&qup_spi6_cs_gpio>; |
581 |
+ cs-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>; |
582 |
+ }; |
583 |
+ |
584 |
+ ap_spi_fp: &spi10 { |
585 |
+- pinctrl-0 = <&qup_spi10_cs_gpio>; |
586 |
++ pinctrl-0 = <&qup_spi10_cs_gpio_init_high>, <&qup_spi10_cs_gpio>; |
587 |
+ cs-gpios = <&tlmm 89 GPIO_ACTIVE_LOW>; |
588 |
+ |
589 |
+ cros_ec_fp: ec@0 { |
590 |
+@@ -1400,6 +1402,27 @@ ap_spi_fp: &spi10 { |
591 |
+ }; |
592 |
+ }; |
593 |
+ |
594 |
++ qup_spi0_cs_gpio_init_high: qup-spi0-cs-gpio-init-high { |
595 |
++ pinconf { |
596 |
++ pins = "gpio37"; |
597 |
++ output-high; |
598 |
++ }; |
599 |
++ }; |
600 |
++ |
601 |
++ qup_spi6_cs_gpio_init_high: qup-spi6-cs-gpio-init-high { |
602 |
++ pinconf { |
603 |
++ pins = "gpio62"; |
604 |
++ output-high; |
605 |
++ }; |
606 |
++ }; |
607 |
++ |
608 |
++ qup_spi10_cs_gpio_init_high: qup-spi10-cs-gpio-init-high { |
609 |
++ pinconf { |
610 |
++ pins = "gpio89"; |
611 |
++ output-high; |
612 |
++ }; |
613 |
++ }; |
614 |
++ |
615 |
+ qup_uart3_sleep: qup-uart3-sleep { |
616 |
+ pinmux { |
617 |
+ pins = "gpio38", "gpio39", |
618 |
+diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts |
619 |
+index c4ac6f5dc008d..96d36b38f2696 100644 |
620 |
+--- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts |
621 |
++++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts |
622 |
+@@ -1015,7 +1015,7 @@ |
623 |
+ left_spkr: wsa8810-left{ |
624 |
+ compatible = "sdw10217201000"; |
625 |
+ reg = <0 1>; |
626 |
+- powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_HIGH>; |
627 |
++ powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>; |
628 |
+ #thermal-sensor-cells = <0>; |
629 |
+ sound-name-prefix = "SpkrLeft"; |
630 |
+ #sound-dai-cells = <0>; |
631 |
+@@ -1023,7 +1023,7 @@ |
632 |
+ |
633 |
+ right_spkr: wsa8810-right{ |
634 |
+ compatible = "sdw10217201000"; |
635 |
+- powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_HIGH>; |
636 |
++ powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>; |
637 |
+ reg = <0 2>; |
638 |
+ #thermal-sensor-cells = <0>; |
639 |
+ sound-name-prefix = "SpkrRight"; |
640 |
+diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi |
641 |
+index bcf888381f144..efefffaecc6ca 100644 |
642 |
+--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi |
643 |
++++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi |
644 |
+@@ -2384,7 +2384,7 @@ |
645 |
+ #gpio-cells = <2>; |
646 |
+ interrupt-controller; |
647 |
+ #interrupt-cells = <2>; |
648 |
+- gpio-ranges = <&tlmm 0 0 150>; |
649 |
++ gpio-ranges = <&tlmm 0 0 151>; |
650 |
+ wakeup-parent = <&pdc_intc>; |
651 |
+ |
652 |
+ cci0_default: cci0-default { |
653 |
+diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi |
654 |
+index 5270bda7418f0..ad1931a079818 100644 |
655 |
+--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi |
656 |
++++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi |
657 |
+@@ -757,7 +757,7 @@ |
658 |
+ <0x0 0x03D00000 0x0 0x300000>; |
659 |
+ reg-names = "west", "east", "north", "south"; |
660 |
+ interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; |
661 |
+- gpio-ranges = <&tlmm 0 0 175>; |
662 |
++ gpio-ranges = <&tlmm 0 0 176>; |
663 |
+ gpio-controller; |
664 |
+ #gpio-cells = <2>; |
665 |
+ interrupt-controller; |
666 |
+diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi |
667 |
+index 1ae90e8b70f32..415cf6eb5e367 100644 |
668 |
+--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi |
669 |
++++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi |
670 |
+@@ -216,7 +216,7 @@ |
671 |
+ |
672 |
+ pmu { |
673 |
+ compatible = "arm,armv8-pmuv3"; |
674 |
+- interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; |
675 |
++ interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; |
676 |
+ }; |
677 |
+ |
678 |
+ psci { |
679 |
+@@ -1877,7 +1877,7 @@ |
680 |
+ #gpio-cells = <2>; |
681 |
+ interrupt-controller; |
682 |
+ #interrupt-cells = <2>; |
683 |
+- gpio-ranges = <&tlmm 0 0 180>; |
684 |
++ gpio-ranges = <&tlmm 0 0 181>; |
685 |
+ wakeup-parent = <&pdc>; |
686 |
+ |
687 |
+ qup_i2c0_default: qup-i2c0-default { |
688 |
+@@ -2832,7 +2832,7 @@ |
689 |
+ (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, |
690 |
+ <GIC_PPI 11 |
691 |
+ (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, |
692 |
+- <GIC_PPI 12 |
693 |
++ <GIC_PPI 10 |
694 |
+ (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; |
695 |
+ }; |
696 |
+ |
697 |
+diff --git a/arch/arm64/boot/dts/renesas/hihope-common.dtsi b/arch/arm64/boot/dts/renesas/hihope-common.dtsi |
698 |
+index 2eda9f66ae81d..e8bf6f0c4c400 100644 |
699 |
+--- a/arch/arm64/boot/dts/renesas/hihope-common.dtsi |
700 |
++++ b/arch/arm64/boot/dts/renesas/hihope-common.dtsi |
701 |
+@@ -12,6 +12,9 @@ |
702 |
+ aliases { |
703 |
+ serial0 = &scif2; |
704 |
+ serial1 = &hscif0; |
705 |
++ mmc0 = &sdhi3; |
706 |
++ mmc1 = &sdhi0; |
707 |
++ mmc2 = &sdhi2; |
708 |
+ }; |
709 |
+ |
710 |
+ chosen { |
711 |
+diff --git a/arch/arm64/boot/dts/renesas/r8a774a1-beacon-rzg2m-kit.dts b/arch/arm64/boot/dts/renesas/r8a774a1-beacon-rzg2m-kit.dts |
712 |
+index 2c5b057c30c62..ad26f5bf0648d 100644 |
713 |
+--- a/arch/arm64/boot/dts/renesas/r8a774a1-beacon-rzg2m-kit.dts |
714 |
++++ b/arch/arm64/boot/dts/renesas/r8a774a1-beacon-rzg2m-kit.dts |
715 |
+@@ -21,6 +21,9 @@ |
716 |
+ serial4 = &hscif2; |
717 |
+ serial5 = &scif5; |
718 |
+ ethernet0 = &avb; |
719 |
++ mmc0 = &sdhi3; |
720 |
++ mmc1 = &sdhi0; |
721 |
++ mmc2 = &sdhi2; |
722 |
+ }; |
723 |
+ |
724 |
+ chosen { |
725 |
+diff --git a/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts b/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts |
726 |
+index ea87cb5a459c8..33257c6440b2c 100644 |
727 |
+--- a/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts |
728 |
++++ b/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts |
729 |
+@@ -17,6 +17,8 @@ |
730 |
+ aliases { |
731 |
+ serial0 = &scif2; |
732 |
+ serial1 = &hscif2; |
733 |
++ mmc0 = &sdhi0; |
734 |
++ mmc1 = &sdhi3; |
735 |
+ }; |
736 |
+ |
737 |
+ chosen { |
738 |
+diff --git a/arch/arm64/boot/dts/renesas/r8a77980.dtsi b/arch/arm64/boot/dts/renesas/r8a77980.dtsi |
739 |
+index ec7ca72399ec4..1ffa4a995a7ab 100644 |
740 |
+--- a/arch/arm64/boot/dts/renesas/r8a77980.dtsi |
741 |
++++ b/arch/arm64/boot/dts/renesas/r8a77980.dtsi |
742 |
+@@ -992,8 +992,8 @@ |
743 |
+ |
744 |
+ reg = <1>; |
745 |
+ |
746 |
+- vin4csi41: endpoint@2 { |
747 |
+- reg = <2>; |
748 |
++ vin4csi41: endpoint@3 { |
749 |
++ reg = <3>; |
750 |
+ remote-endpoint = <&csi41vin4>; |
751 |
+ }; |
752 |
+ }; |
753 |
+@@ -1020,8 +1020,8 @@ |
754 |
+ |
755 |
+ reg = <1>; |
756 |
+ |
757 |
+- vin5csi41: endpoint@2 { |
758 |
+- reg = <2>; |
759 |
++ vin5csi41: endpoint@3 { |
760 |
++ reg = <3>; |
761 |
+ remote-endpoint = <&csi41vin5>; |
762 |
+ }; |
763 |
+ }; |
764 |
+@@ -1048,8 +1048,8 @@ |
765 |
+ |
766 |
+ reg = <1>; |
767 |
+ |
768 |
+- vin6csi41: endpoint@2 { |
769 |
+- reg = <2>; |
770 |
++ vin6csi41: endpoint@3 { |
771 |
++ reg = <3>; |
772 |
+ remote-endpoint = <&csi41vin6>; |
773 |
+ }; |
774 |
+ }; |
775 |
+@@ -1076,8 +1076,8 @@ |
776 |
+ |
777 |
+ reg = <1>; |
778 |
+ |
779 |
+- vin7csi41: endpoint@2 { |
780 |
+- reg = <2>; |
781 |
++ vin7csi41: endpoint@3 { |
782 |
++ reg = <3>; |
783 |
+ remote-endpoint = <&csi41vin7>; |
784 |
+ }; |
785 |
+ }; |
786 |
+diff --git a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts |
787 |
+index e0ccca2222d2d..b9e3b6762ff42 100644 |
788 |
+--- a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts |
789 |
++++ b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts |
790 |
+@@ -16,6 +16,9 @@ |
791 |
+ aliases { |
792 |
+ serial0 = &scif2; |
793 |
+ ethernet0 = &avb; |
794 |
++ mmc0 = &sdhi3; |
795 |
++ mmc1 = &sdhi0; |
796 |
++ mmc2 = &sdhi1; |
797 |
+ }; |
798 |
+ |
799 |
+ chosen { |
800 |
+diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi |
801 |
+index 6cf77ce9aa937..86ec32a919d29 100644 |
802 |
+--- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi |
803 |
++++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi |
804 |
+@@ -50,10 +50,7 @@ |
805 |
+ |
806 |
+ pmu_a76 { |
807 |
+ compatible = "arm,cortex-a76-pmu"; |
808 |
+- interrupts-extended = <&gic GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>, |
809 |
+- <&gic GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, |
810 |
+- <&gic GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>, |
811 |
+- <&gic GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>; |
812 |
++ interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; |
813 |
+ }; |
814 |
+ |
815 |
+ /* External SCIF clock - to be overridden by boards that provide it */ |
816 |
+diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi |
817 |
+index 6c643ed74fc58..ee82fcb7192d2 100644 |
818 |
+--- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi |
819 |
++++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi |
820 |
+@@ -36,6 +36,9 @@ |
821 |
+ serial0 = &scif2; |
822 |
+ serial1 = &hscif1; |
823 |
+ ethernet0 = &avb; |
824 |
++ mmc0 = &sdhi2; |
825 |
++ mmc1 = &sdhi0; |
826 |
++ mmc2 = &sdhi3; |
827 |
+ }; |
828 |
+ |
829 |
+ chosen { |
830 |
+diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi |
831 |
+index e9ed2597f1c20..61bd4df09df0d 100644 |
832 |
+--- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi |
833 |
++++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi |
834 |
+@@ -16,6 +16,7 @@ |
835 |
+ aliases { |
836 |
+ serial1 = &hscif0; |
837 |
+ serial2 = &scif1; |
838 |
++ mmc2 = &sdhi3; |
839 |
+ }; |
840 |
+ |
841 |
+ clksndsel: clksndsel { |
842 |
+diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi |
843 |
+index 8f8d7371d8e24..e69e136d767a5 100644 |
844 |
+--- a/arch/arm64/boot/dts/renesas/ulcb.dtsi |
845 |
++++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi |
846 |
+@@ -23,6 +23,8 @@ |
847 |
+ aliases { |
848 |
+ serial0 = &scif2; |
849 |
+ ethernet0 = &avb; |
850 |
++ mmc0 = &sdhi2; |
851 |
++ mmc1 = &sdhi0; |
852 |
+ }; |
853 |
+ |
854 |
+ chosen { |
855 |
+diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi |
856 |
+index a87b8a6787196..8f2c1c1e2c64e 100644 |
857 |
+--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi |
858 |
++++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi |
859 |
+@@ -734,7 +734,7 @@ |
860 |
+ clocks = <&sys_clk 6>; |
861 |
+ reset-names = "ether"; |
862 |
+ resets = <&sys_rst 6>; |
863 |
+- phy-mode = "rgmii"; |
864 |
++ phy-mode = "rgmii-id"; |
865 |
+ local-mac-address = [00 00 00 00 00 00]; |
866 |
+ socionext,syscon-phy-mode = <&soc_glue 0>; |
867 |
+ |
868 |
+diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi |
869 |
+index 0e52dadf54b3a..be97da1322580 100644 |
870 |
+--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi |
871 |
++++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi |
872 |
+@@ -564,7 +564,7 @@ |
873 |
+ clocks = <&sys_clk 6>; |
874 |
+ reset-names = "ether"; |
875 |
+ resets = <&sys_rst 6>; |
876 |
+- phy-mode = "rgmii"; |
877 |
++ phy-mode = "rgmii-id"; |
878 |
+ local-mac-address = [00 00 00 00 00 00]; |
879 |
+ socionext,syscon-phy-mode = <&soc_glue 0>; |
880 |
+ |
881 |
+@@ -585,7 +585,7 @@ |
882 |
+ clocks = <&sys_clk 7>; |
883 |
+ reset-names = "ether"; |
884 |
+ resets = <&sys_rst 7>; |
885 |
+- phy-mode = "rgmii"; |
886 |
++ phy-mode = "rgmii-id"; |
887 |
+ local-mac-address = [00 00 00 00 00 00]; |
888 |
+ socionext,syscon-phy-mode = <&soc_glue 1>; |
889 |
+ |
890 |
+diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi |
891 |
+index b32df591c7668..91802e1502ddb 100644 |
892 |
+--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi |
893 |
++++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi |
894 |
+@@ -1078,13 +1078,16 @@ |
895 |
+ assigned-clocks = <&k3_clks 91 1>; |
896 |
+ assigned-clock-parents = <&k3_clks 91 2>; |
897 |
+ bus-width = <8>; |
898 |
+- mmc-hs400-1_8v; |
899 |
++ mmc-hs200-1_8v; |
900 |
+ mmc-ddr-1_8v; |
901 |
+ ti,otap-del-sel-legacy = <0xf>; |
902 |
+ ti,otap-del-sel-mmc-hs = <0xf>; |
903 |
+ ti,otap-del-sel-ddr52 = <0x5>; |
904 |
+ ti,otap-del-sel-hs200 = <0x6>; |
905 |
+ ti,otap-del-sel-hs400 = <0x0>; |
906 |
++ ti,itap-del-sel-legacy = <0x10>; |
907 |
++ ti,itap-del-sel-mmc-hs = <0xa>; |
908 |
++ ti,itap-del-sel-ddr52 = <0x3>; |
909 |
+ ti,trm-icp = <0x8>; |
910 |
+ ti,strobe-sel = <0x77>; |
911 |
+ dma-coherent; |
912 |
+@@ -1105,9 +1108,15 @@ |
913 |
+ ti,otap-del-sel-sdr25 = <0xf>; |
914 |
+ ti,otap-del-sel-sdr50 = <0xc>; |
915 |
+ ti,otap-del-sel-ddr50 = <0xc>; |
916 |
++ ti,itap-del-sel-legacy = <0x0>; |
917 |
++ ti,itap-del-sel-sd-hs = <0x0>; |
918 |
++ ti,itap-del-sel-sdr12 = <0x0>; |
919 |
++ ti,itap-del-sel-sdr25 = <0x0>; |
920 |
++ ti,itap-del-sel-ddr50 = <0x2>; |
921 |
+ ti,trm-icp = <0x8>; |
922 |
+ ti,clkbuf-sel = <0x7>; |
923 |
+ dma-coherent; |
924 |
++ sdhci-caps-mask = <0x2 0x0>; |
925 |
+ }; |
926 |
+ |
927 |
+ main_sdhci2: sdhci@4f98000 { |
928 |
+@@ -1125,9 +1134,15 @@ |
929 |
+ ti,otap-del-sel-sdr25 = <0xf>; |
930 |
+ ti,otap-del-sel-sdr50 = <0xc>; |
931 |
+ ti,otap-del-sel-ddr50 = <0xc>; |
932 |
++ ti,itap-del-sel-legacy = <0x0>; |
933 |
++ ti,itap-del-sel-sd-hs = <0x0>; |
934 |
++ ti,itap-del-sel-sdr12 = <0x0>; |
935 |
++ ti,itap-del-sel-sdr25 = <0x0>; |
936 |
++ ti,itap-del-sel-ddr50 = <0x2>; |
937 |
+ ti,trm-icp = <0x8>; |
938 |
+ ti,clkbuf-sel = <0x7>; |
939 |
+ dma-coherent; |
940 |
++ sdhci-caps-mask = <0x2 0x0>; |
941 |
+ }; |
942 |
+ |
943 |
+ usbss0: cdns-usb@4104000 { |
944 |
+diff --git a/arch/arm64/crypto/poly1305-glue.c b/arch/arm64/crypto/poly1305-glue.c |
945 |
+index 683de671741a7..9c3d86e397bf3 100644 |
946 |
+--- a/arch/arm64/crypto/poly1305-glue.c |
947 |
++++ b/arch/arm64/crypto/poly1305-glue.c |
948 |
+@@ -25,7 +25,7 @@ asmlinkage void poly1305_emit(void *state, u8 *digest, const u32 *nonce); |
949 |
+ |
950 |
+ static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_neon); |
951 |
+ |
952 |
+-void poly1305_init_arch(struct poly1305_desc_ctx *dctx, const u8 *key) |
953 |
++void poly1305_init_arch(struct poly1305_desc_ctx *dctx, const u8 key[POLY1305_KEY_SIZE]) |
954 |
+ { |
955 |
+ poly1305_init_arm64(&dctx->h, key); |
956 |
+ dctx->s[0] = get_unaligned_le32(key + 16); |
957 |
+diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h |
958 |
+index 8fcfab0c25672..848a7c5d70d6b 100644 |
959 |
+--- a/arch/arm64/include/asm/kvm_host.h |
960 |
++++ b/arch/arm64/include/asm/kvm_host.h |
961 |
+@@ -714,6 +714,7 @@ static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {} |
962 |
+ static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} |
963 |
+ |
964 |
+ void kvm_arm_init_debug(void); |
965 |
++void kvm_arm_vcpu_init_debug(struct kvm_vcpu *vcpu); |
966 |
+ void kvm_arm_setup_debug(struct kvm_vcpu *vcpu); |
967 |
+ void kvm_arm_clear_debug(struct kvm_vcpu *vcpu); |
968 |
+ void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu); |
969 |
+diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c |
970 |
+index b25b4c19feebc..807c47b93f5f0 100644 |
971 |
+--- a/arch/arm64/kvm/arm.c |
972 |
++++ b/arch/arm64/kvm/arm.c |
973 |
+@@ -580,6 +580,8 @@ static int kvm_vcpu_first_run_init(struct kvm_vcpu *vcpu) |
974 |
+ |
975 |
+ vcpu->arch.has_run_once = true; |
976 |
+ |
977 |
++ kvm_arm_vcpu_init_debug(vcpu); |
978 |
++ |
979 |
+ if (likely(irqchip_in_kernel(kvm))) { |
980 |
+ /* |
981 |
+ * Map the VGIC hardware resources before running a vcpu the |
982 |
+@@ -1809,8 +1811,10 @@ static int init_hyp_mode(void) |
983 |
+ if (is_protected_kvm_enabled()) { |
984 |
+ init_cpu_logical_map(); |
985 |
+ |
986 |
+- if (!init_psci_relay()) |
987 |
++ if (!init_psci_relay()) { |
988 |
++ err = -ENODEV; |
989 |
+ goto out_err; |
990 |
++ } |
991 |
+ } |
992 |
+ |
993 |
+ return 0; |
994 |
+diff --git a/arch/arm64/kvm/debug.c b/arch/arm64/kvm/debug.c |
995 |
+index dbc8905116311..2484b2cca74bc 100644 |
996 |
+--- a/arch/arm64/kvm/debug.c |
997 |
++++ b/arch/arm64/kvm/debug.c |
998 |
+@@ -68,6 +68,64 @@ void kvm_arm_init_debug(void) |
999 |
+ __this_cpu_write(mdcr_el2, kvm_call_hyp_ret(__kvm_get_mdcr_el2)); |
1000 |
+ } |
1001 |
+ |
1002 |
++/** |
1003 |
++ * kvm_arm_setup_mdcr_el2 - configure vcpu mdcr_el2 value |
1004 |
++ * |
1005 |
++ * @vcpu: the vcpu pointer |
1006 |
++ * |
1007 |
++ * This ensures we will trap access to: |
1008 |
++ * - Performance monitors (MDCR_EL2_TPM/MDCR_EL2_TPMCR) |
1009 |
++ * - Debug ROM Address (MDCR_EL2_TDRA) |
1010 |
++ * - OS related registers (MDCR_EL2_TDOSA) |
1011 |
++ * - Statistical profiler (MDCR_EL2_TPMS/MDCR_EL2_E2PB) |
1012 |
++ * - Self-hosted Trace Filter controls (MDCR_EL2_TTRF) |
1013 |
++ */ |
1014 |
++static void kvm_arm_setup_mdcr_el2(struct kvm_vcpu *vcpu) |
1015 |
++{ |
1016 |
++ /* |
1017 |
++ * This also clears MDCR_EL2_E2PB_MASK to disable guest access |
1018 |
++ * to the profiling buffer. |
1019 |
++ */ |
1020 |
++ vcpu->arch.mdcr_el2 = __this_cpu_read(mdcr_el2) & MDCR_EL2_HPMN_MASK; |
1021 |
++ vcpu->arch.mdcr_el2 |= (MDCR_EL2_TPM | |
1022 |
++ MDCR_EL2_TPMS | |
1023 |
++ MDCR_EL2_TTRF | |
1024 |
++ MDCR_EL2_TPMCR | |
1025 |
++ MDCR_EL2_TDRA | |
1026 |
++ MDCR_EL2_TDOSA); |
1027 |
++ |
1028 |
++ /* Is the VM being debugged by userspace? */ |
1029 |
++ if (vcpu->guest_debug) |
1030 |
++ /* Route all software debug exceptions to EL2 */ |
1031 |
++ vcpu->arch.mdcr_el2 |= MDCR_EL2_TDE; |
1032 |
++ |
1033 |
++ /* |
1034 |
++ * Trap debug register access when one of the following is true: |
1035 |
++ * - Userspace is using the hardware to debug the guest |
1036 |
++ * (KVM_GUESTDBG_USE_HW is set). |
1037 |
++ * - The guest is not using debug (KVM_ARM64_DEBUG_DIRTY is clear). |
1038 |
++ */ |
1039 |
++ if ((vcpu->guest_debug & KVM_GUESTDBG_USE_HW) || |
1040 |
++ !(vcpu->arch.flags & KVM_ARM64_DEBUG_DIRTY)) |
1041 |
++ vcpu->arch.mdcr_el2 |= MDCR_EL2_TDA; |
1042 |
++ |
1043 |
++ trace_kvm_arm_set_dreg32("MDCR_EL2", vcpu->arch.mdcr_el2); |
1044 |
++} |
1045 |
++ |
1046 |
++/** |
1047 |
++ * kvm_arm_vcpu_init_debug - setup vcpu debug traps |
1048 |
++ * |
1049 |
++ * @vcpu: the vcpu pointer |
1050 |
++ * |
1051 |
++ * Set vcpu initial mdcr_el2 value. |
1052 |
++ */ |
1053 |
++void kvm_arm_vcpu_init_debug(struct kvm_vcpu *vcpu) |
1054 |
++{ |
1055 |
++ preempt_disable(); |
1056 |
++ kvm_arm_setup_mdcr_el2(vcpu); |
1057 |
++ preempt_enable(); |
1058 |
++} |
1059 |
++ |
1060 |
+ /** |
1061 |
+ * kvm_arm_reset_debug_ptr - reset the debug ptr to point to the vcpu state |
1062 |
+ */ |
1063 |
+@@ -83,13 +141,7 @@ void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu) |
1064 |
+ * @vcpu: the vcpu pointer |
1065 |
+ * |
1066 |
+ * This is called before each entry into the hypervisor to setup any |
1067 |
+- * debug related registers. Currently this just ensures we will trap |
1068 |
+- * access to: |
1069 |
+- * - Performance monitors (MDCR_EL2_TPM/MDCR_EL2_TPMCR) |
1070 |
+- * - Debug ROM Address (MDCR_EL2_TDRA) |
1071 |
+- * - OS related registers (MDCR_EL2_TDOSA) |
1072 |
+- * - Statistical profiler (MDCR_EL2_TPMS/MDCR_EL2_E2PB) |
1073 |
+- * - Self-hosted Trace Filter controls (MDCR_EL2_TTRF) |
1074 |
++ * debug related registers. |
1075 |
+ * |
1076 |
+ * Additionally, KVM only traps guest accesses to the debug registers if |
1077 |
+ * the guest is not actively using them (see the KVM_ARM64_DEBUG_DIRTY |
1078 |
+@@ -101,28 +153,14 @@ void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu) |
1079 |
+ |
1080 |
+ void kvm_arm_setup_debug(struct kvm_vcpu *vcpu) |
1081 |
+ { |
1082 |
+- bool trap_debug = !(vcpu->arch.flags & KVM_ARM64_DEBUG_DIRTY); |
1083 |
+ unsigned long mdscr, orig_mdcr_el2 = vcpu->arch.mdcr_el2; |
1084 |
+ |
1085 |
+ trace_kvm_arm_setup_debug(vcpu, vcpu->guest_debug); |
1086 |
+ |
1087 |
+- /* |
1088 |
+- * This also clears MDCR_EL2_E2PB_MASK to disable guest access |
1089 |
+- * to the profiling buffer. |
1090 |
+- */ |
1091 |
+- vcpu->arch.mdcr_el2 = __this_cpu_read(mdcr_el2) & MDCR_EL2_HPMN_MASK; |
1092 |
+- vcpu->arch.mdcr_el2 |= (MDCR_EL2_TPM | |
1093 |
+- MDCR_EL2_TPMS | |
1094 |
+- MDCR_EL2_TTRF | |
1095 |
+- MDCR_EL2_TPMCR | |
1096 |
+- MDCR_EL2_TDRA | |
1097 |
+- MDCR_EL2_TDOSA); |
1098 |
++ kvm_arm_setup_mdcr_el2(vcpu); |
1099 |
+ |
1100 |
+ /* Is Guest debugging in effect? */ |
1101 |
+ if (vcpu->guest_debug) { |
1102 |
+- /* Route all software debug exceptions to EL2 */ |
1103 |
+- vcpu->arch.mdcr_el2 |= MDCR_EL2_TDE; |
1104 |
+- |
1105 |
+ /* Save guest debug state */ |
1106 |
+ save_guest_debug_regs(vcpu); |
1107 |
+ |
1108 |
+@@ -176,7 +214,6 @@ void kvm_arm_setup_debug(struct kvm_vcpu *vcpu) |
1109 |
+ |
1110 |
+ vcpu->arch.debug_ptr = &vcpu->arch.external_debug_state; |
1111 |
+ vcpu->arch.flags |= KVM_ARM64_DEBUG_DIRTY; |
1112 |
+- trap_debug = true; |
1113 |
+ |
1114 |
+ trace_kvm_arm_set_regset("BKPTS", get_num_brps(), |
1115 |
+ &vcpu->arch.debug_ptr->dbg_bcr[0], |
1116 |
+@@ -191,10 +228,6 @@ void kvm_arm_setup_debug(struct kvm_vcpu *vcpu) |
1117 |
+ BUG_ON(!vcpu->guest_debug && |
1118 |
+ vcpu->arch.debug_ptr != &vcpu->arch.vcpu_debug_state); |
1119 |
+ |
1120 |
+- /* Trap debug register access */ |
1121 |
+- if (trap_debug) |
1122 |
+- vcpu->arch.mdcr_el2 |= MDCR_EL2_TDA; |
1123 |
+- |
1124 |
+ /* If KDE or MDE are set, perform a full save/restore cycle. */ |
1125 |
+ if (vcpu_read_sys_reg(vcpu, MDSCR_EL1) & (DBG_MDSCR_KDE | DBG_MDSCR_MDE)) |
1126 |
+ vcpu->arch.flags |= KVM_ARM64_DEBUG_DIRTY; |
1127 |
+@@ -203,7 +236,6 @@ void kvm_arm_setup_debug(struct kvm_vcpu *vcpu) |
1128 |
+ if (has_vhe() && orig_mdcr_el2 != vcpu->arch.mdcr_el2) |
1129 |
+ write_sysreg(vcpu->arch.mdcr_el2, mdcr_el2); |
1130 |
+ |
1131 |
+- trace_kvm_arm_set_dreg32("MDCR_EL2", vcpu->arch.mdcr_el2); |
1132 |
+ trace_kvm_arm_set_dreg32("MDSCR_EL1", vcpu_read_sys_reg(vcpu, MDSCR_EL1)); |
1133 |
+ } |
1134 |
+ |
1135 |
+diff --git a/arch/arm64/kvm/reset.c b/arch/arm64/kvm/reset.c |
1136 |
+index 9d3d09a898945..505090cec8235 100644 |
1137 |
+--- a/arch/arm64/kvm/reset.c |
1138 |
++++ b/arch/arm64/kvm/reset.c |
1139 |
+@@ -242,6 +242,11 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu) |
1140 |
+ |
1141 |
+ /* Reset core registers */ |
1142 |
+ memset(vcpu_gp_regs(vcpu), 0, sizeof(*vcpu_gp_regs(vcpu))); |
1143 |
++ memset(&vcpu->arch.ctxt.fp_regs, 0, sizeof(vcpu->arch.ctxt.fp_regs)); |
1144 |
++ vcpu->arch.ctxt.spsr_abt = 0; |
1145 |
++ vcpu->arch.ctxt.spsr_und = 0; |
1146 |
++ vcpu->arch.ctxt.spsr_irq = 0; |
1147 |
++ vcpu->arch.ctxt.spsr_fiq = 0; |
1148 |
+ vcpu_gp_regs(vcpu)->pstate = pstate; |
1149 |
+ |
1150 |
+ /* Reset system registers */ |
1151 |
+diff --git a/arch/arm64/kvm/vgic/vgic-kvm-device.c b/arch/arm64/kvm/vgic/vgic-kvm-device.c |
1152 |
+index 44419679f91ad..7740995de982e 100644 |
1153 |
+--- a/arch/arm64/kvm/vgic/vgic-kvm-device.c |
1154 |
++++ b/arch/arm64/kvm/vgic/vgic-kvm-device.c |
1155 |
+@@ -87,8 +87,8 @@ int kvm_vgic_addr(struct kvm *kvm, unsigned long type, u64 *addr, bool write) |
1156 |
+ r = vgic_v3_set_redist_base(kvm, 0, *addr, 0); |
1157 |
+ goto out; |
1158 |
+ } |
1159 |
+- rdreg = list_first_entry(&vgic->rd_regions, |
1160 |
+- struct vgic_redist_region, list); |
1161 |
++ rdreg = list_first_entry_or_null(&vgic->rd_regions, |
1162 |
++ struct vgic_redist_region, list); |
1163 |
+ if (!rdreg) |
1164 |
+ addr_ptr = &undef_value; |
1165 |
+ else |
1166 |
+@@ -226,6 +226,9 @@ static int vgic_get_common_attr(struct kvm_device *dev, |
1167 |
+ u64 addr; |
1168 |
+ unsigned long type = (unsigned long)attr->attr; |
1169 |
+ |
1170 |
++ if (copy_from_user(&addr, uaddr, sizeof(addr))) |
1171 |
++ return -EFAULT; |
1172 |
++ |
1173 |
+ r = kvm_vgic_addr(dev->kvm, type, &addr, false); |
1174 |
+ if (r) |
1175 |
+ return (r == -ENODEV) ? -ENXIO : r; |
1176 |
+diff --git a/arch/ia64/kernel/efi.c b/arch/ia64/kernel/efi.c |
1177 |
+index f932b25fb817a..33282f33466e7 100644 |
1178 |
+--- a/arch/ia64/kernel/efi.c |
1179 |
++++ b/arch/ia64/kernel/efi.c |
1180 |
+@@ -413,10 +413,10 @@ efi_get_pal_addr (void) |
1181 |
+ mask = ~((1 << IA64_GRANULE_SHIFT) - 1); |
1182 |
+ |
1183 |
+ printk(KERN_INFO "CPU %d: mapping PAL code " |
1184 |
+- "[0x%lx-0x%lx) into [0x%lx-0x%lx)\n", |
1185 |
+- smp_processor_id(), md->phys_addr, |
1186 |
+- md->phys_addr + efi_md_size(md), |
1187 |
+- vaddr & mask, (vaddr & mask) + IA64_GRANULE_SIZE); |
1188 |
++ "[0x%llx-0x%llx) into [0x%llx-0x%llx)\n", |
1189 |
++ smp_processor_id(), md->phys_addr, |
1190 |
++ md->phys_addr + efi_md_size(md), |
1191 |
++ vaddr & mask, (vaddr & mask) + IA64_GRANULE_SIZE); |
1192 |
+ #endif |
1193 |
+ return __va(md->phys_addr); |
1194 |
+ } |
1195 |
+@@ -558,6 +558,7 @@ efi_init (void) |
1196 |
+ { |
1197 |
+ efi_memory_desc_t *md; |
1198 |
+ void *p; |
1199 |
++ unsigned int i; |
1200 |
+ |
1201 |
+ for (i = 0, p = efi_map_start; p < efi_map_end; |
1202 |
+ ++i, p += efi_desc_size) |
1203 |
+@@ -584,7 +585,7 @@ efi_init (void) |
1204 |
+ } |
1205 |
+ |
1206 |
+ printk("mem%02d: %s " |
1207 |
+- "range=[0x%016lx-0x%016lx) (%4lu%s)\n", |
1208 |
++ "range=[0x%016llx-0x%016llx) (%4lu%s)\n", |
1209 |
+ i, efi_md_typeattr_format(buf, sizeof(buf), md), |
1210 |
+ md->phys_addr, |
1211 |
+ md->phys_addr + efi_md_size(md), size, unit); |
1212 |
+diff --git a/arch/m68k/include/asm/mvme147hw.h b/arch/m68k/include/asm/mvme147hw.h |
1213 |
+index 257b29184af91..e28eb1c0e0bfb 100644 |
1214 |
+--- a/arch/m68k/include/asm/mvme147hw.h |
1215 |
++++ b/arch/m68k/include/asm/mvme147hw.h |
1216 |
+@@ -66,6 +66,9 @@ struct pcc_regs { |
1217 |
+ #define PCC_INT_ENAB 0x08 |
1218 |
+ |
1219 |
+ #define PCC_TIMER_INT_CLR 0x80 |
1220 |
++ |
1221 |
++#define PCC_TIMER_TIC_EN 0x01 |
1222 |
++#define PCC_TIMER_COC_EN 0x02 |
1223 |
+ #define PCC_TIMER_CLR_OVF 0x04 |
1224 |
+ |
1225 |
+ #define PCC_LEVEL_ABORT 0x07 |
1226 |
+diff --git a/arch/m68k/kernel/sys_m68k.c b/arch/m68k/kernel/sys_m68k.c |
1227 |
+index 1c235d8f53f36..f55bdcb8e4f15 100644 |
1228 |
+--- a/arch/m68k/kernel/sys_m68k.c |
1229 |
++++ b/arch/m68k/kernel/sys_m68k.c |
1230 |
+@@ -388,6 +388,8 @@ sys_cacheflush (unsigned long addr, int scope, int cache, unsigned long len) |
1231 |
+ ret = -EPERM; |
1232 |
+ if (!capable(CAP_SYS_ADMIN)) |
1233 |
+ goto out; |
1234 |
++ |
1235 |
++ mmap_read_lock(current->mm); |
1236 |
+ } else { |
1237 |
+ struct vm_area_struct *vma; |
1238 |
+ |
1239 |
+diff --git a/arch/m68k/mvme147/config.c b/arch/m68k/mvme147/config.c |
1240 |
+index cfdc7f912e14e..e1e90c49a4962 100644 |
1241 |
+--- a/arch/m68k/mvme147/config.c |
1242 |
++++ b/arch/m68k/mvme147/config.c |
1243 |
+@@ -114,8 +114,10 @@ static irqreturn_t mvme147_timer_int (int irq, void *dev_id) |
1244 |
+ unsigned long flags; |
1245 |
+ |
1246 |
+ local_irq_save(flags); |
1247 |
+- m147_pcc->t1_int_cntrl = PCC_TIMER_INT_CLR; |
1248 |
+- m147_pcc->t1_cntrl = PCC_TIMER_CLR_OVF; |
1249 |
++ m147_pcc->t1_cntrl = PCC_TIMER_CLR_OVF | PCC_TIMER_COC_EN | |
1250 |
++ PCC_TIMER_TIC_EN; |
1251 |
++ m147_pcc->t1_int_cntrl = PCC_INT_ENAB | PCC_TIMER_INT_CLR | |
1252 |
++ PCC_LEVEL_TIMER1; |
1253 |
+ clk_total += PCC_TIMER_CYCLES; |
1254 |
+ legacy_timer_tick(1); |
1255 |
+ local_irq_restore(flags); |
1256 |
+@@ -133,10 +135,10 @@ void mvme147_sched_init (void) |
1257 |
+ /* Init the clock with a value */ |
1258 |
+ /* The clock counter increments until 0xFFFF then reloads */ |
1259 |
+ m147_pcc->t1_preload = PCC_TIMER_PRELOAD; |
1260 |
+- m147_pcc->t1_cntrl = 0x0; /* clear timer */ |
1261 |
+- m147_pcc->t1_cntrl = 0x3; /* start timer */ |
1262 |
+- m147_pcc->t1_int_cntrl = PCC_TIMER_INT_CLR; /* clear pending ints */ |
1263 |
+- m147_pcc->t1_int_cntrl = PCC_INT_ENAB|PCC_LEVEL_TIMER1; |
1264 |
++ m147_pcc->t1_cntrl = PCC_TIMER_CLR_OVF | PCC_TIMER_COC_EN | |
1265 |
++ PCC_TIMER_TIC_EN; |
1266 |
++ m147_pcc->t1_int_cntrl = PCC_INT_ENAB | PCC_TIMER_INT_CLR | |
1267 |
++ PCC_LEVEL_TIMER1; |
1268 |
+ |
1269 |
+ clocksource_register_hz(&mvme147_clk, PCC_TIMER_CLOCK_FREQ); |
1270 |
+ } |
1271 |
+diff --git a/arch/m68k/mvme16x/config.c b/arch/m68k/mvme16x/config.c |
1272 |
+index 30357fe4ba6c8..b59593c7cfb9d 100644 |
1273 |
+--- a/arch/m68k/mvme16x/config.c |
1274 |
++++ b/arch/m68k/mvme16x/config.c |
1275 |
+@@ -366,6 +366,7 @@ static u32 clk_total; |
1276 |
+ #define PCCTOVR1_COC_EN 0x02 |
1277 |
+ #define PCCTOVR1_OVR_CLR 0x04 |
1278 |
+ |
1279 |
++#define PCCTIC1_INT_LEVEL 6 |
1280 |
+ #define PCCTIC1_INT_CLR 0x08 |
1281 |
+ #define PCCTIC1_INT_EN 0x10 |
1282 |
+ |
1283 |
+@@ -374,8 +375,8 @@ static irqreturn_t mvme16x_timer_int (int irq, void *dev_id) |
1284 |
+ unsigned long flags; |
1285 |
+ |
1286 |
+ local_irq_save(flags); |
1287 |
+- out_8(PCCTIC1, in_8(PCCTIC1) | PCCTIC1_INT_CLR); |
1288 |
+- out_8(PCCTOVR1, PCCTOVR1_OVR_CLR); |
1289 |
++ out_8(PCCTOVR1, PCCTOVR1_OVR_CLR | PCCTOVR1_TIC_EN | PCCTOVR1_COC_EN); |
1290 |
++ out_8(PCCTIC1, PCCTIC1_INT_EN | PCCTIC1_INT_CLR | PCCTIC1_INT_LEVEL); |
1291 |
+ clk_total += PCC_TIMER_CYCLES; |
1292 |
+ legacy_timer_tick(1); |
1293 |
+ local_irq_restore(flags); |
1294 |
+@@ -389,14 +390,15 @@ void mvme16x_sched_init(void) |
1295 |
+ int irq; |
1296 |
+ |
1297 |
+ /* Using PCCchip2 or MC2 chip tick timer 1 */ |
1298 |
+- out_be32(PCCTCNT1, 0); |
1299 |
+- out_be32(PCCTCMP1, PCC_TIMER_CYCLES); |
1300 |
+- out_8(PCCTOVR1, in_8(PCCTOVR1) | PCCTOVR1_TIC_EN | PCCTOVR1_COC_EN); |
1301 |
+- out_8(PCCTIC1, PCCTIC1_INT_EN | 6); |
1302 |
+ if (request_irq(MVME16x_IRQ_TIMER, mvme16x_timer_int, IRQF_TIMER, "timer", |
1303 |
+ NULL)) |
1304 |
+ panic ("Couldn't register timer int"); |
1305 |
+ |
1306 |
++ out_be32(PCCTCNT1, 0); |
1307 |
++ out_be32(PCCTCMP1, PCC_TIMER_CYCLES); |
1308 |
++ out_8(PCCTOVR1, PCCTOVR1_OVR_CLR | PCCTOVR1_TIC_EN | PCCTOVR1_COC_EN); |
1309 |
++ out_8(PCCTIC1, PCCTIC1_INT_EN | PCCTIC1_INT_CLR | PCCTIC1_INT_LEVEL); |
1310 |
++ |
1311 |
+ clocksource_register_hz(&mvme16x_clk, PCC_TIMER_CLOCK_FREQ); |
1312 |
+ |
1313 |
+ if (brdno == 0x0162 || brdno == 0x172) |
1314 |
+diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig |
1315 |
+index 0a17bedf4f0db..bf8ccd965512e 100644 |
1316 |
+--- a/arch/mips/Kconfig |
1317 |
++++ b/arch/mips/Kconfig |
1318 |
+@@ -6,6 +6,7 @@ config MIPS |
1319 |
+ select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT |
1320 |
+ select ARCH_HAS_FORTIFY_SOURCE |
1321 |
+ select ARCH_HAS_KCOV |
1322 |
++ select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA |
1323 |
+ select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI) |
1324 |
+ select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST |
1325 |
+ select ARCH_HAS_UBSAN_SANITIZE_ALL |
1326 |
+diff --git a/arch/mips/boot/dts/brcm/bcm3368.dtsi b/arch/mips/boot/dts/brcm/bcm3368.dtsi |
1327 |
+index 69cbef4723775..d4b2b430dad01 100644 |
1328 |
+--- a/arch/mips/boot/dts/brcm/bcm3368.dtsi |
1329 |
++++ b/arch/mips/boot/dts/brcm/bcm3368.dtsi |
1330 |
+@@ -59,7 +59,7 @@ |
1331 |
+ |
1332 |
+ periph_cntl: syscon@fff8c008 { |
1333 |
+ compatible = "syscon"; |
1334 |
+- reg = <0xfff8c000 0x4>; |
1335 |
++ reg = <0xfff8c008 0x4>; |
1336 |
+ native-endian; |
1337 |
+ }; |
1338 |
+ |
1339 |
+diff --git a/arch/mips/boot/dts/brcm/bcm63268.dtsi b/arch/mips/boot/dts/brcm/bcm63268.dtsi |
1340 |
+index e0021ff9f144d..9405944368726 100644 |
1341 |
+--- a/arch/mips/boot/dts/brcm/bcm63268.dtsi |
1342 |
++++ b/arch/mips/boot/dts/brcm/bcm63268.dtsi |
1343 |
+@@ -59,7 +59,7 @@ |
1344 |
+ |
1345 |
+ periph_cntl: syscon@10000008 { |
1346 |
+ compatible = "syscon"; |
1347 |
+- reg = <0x10000000 0xc>; |
1348 |
++ reg = <0x10000008 0x4>; |
1349 |
+ native-endian; |
1350 |
+ }; |
1351 |
+ |
1352 |
+diff --git a/arch/mips/boot/dts/brcm/bcm6358.dtsi b/arch/mips/boot/dts/brcm/bcm6358.dtsi |
1353 |
+index 9d93e7f5e6fc7..d79c88c2fc9ca 100644 |
1354 |
+--- a/arch/mips/boot/dts/brcm/bcm6358.dtsi |
1355 |
++++ b/arch/mips/boot/dts/brcm/bcm6358.dtsi |
1356 |
+@@ -59,7 +59,7 @@ |
1357 |
+ |
1358 |
+ periph_cntl: syscon@fffe0008 { |
1359 |
+ compatible = "syscon"; |
1360 |
+- reg = <0xfffe0000 0x4>; |
1361 |
++ reg = <0xfffe0008 0x4>; |
1362 |
+ native-endian; |
1363 |
+ }; |
1364 |
+ |
1365 |
+diff --git a/arch/mips/boot/dts/brcm/bcm6362.dtsi b/arch/mips/boot/dts/brcm/bcm6362.dtsi |
1366 |
+index eb10341b75bae..8a21cb761ffd4 100644 |
1367 |
+--- a/arch/mips/boot/dts/brcm/bcm6362.dtsi |
1368 |
++++ b/arch/mips/boot/dts/brcm/bcm6362.dtsi |
1369 |
+@@ -59,7 +59,7 @@ |
1370 |
+ |
1371 |
+ periph_cntl: syscon@10000008 { |
1372 |
+ compatible = "syscon"; |
1373 |
+- reg = <0x10000000 0xc>; |
1374 |
++ reg = <0x10000008 0x4>; |
1375 |
+ native-endian; |
1376 |
+ }; |
1377 |
+ |
1378 |
+diff --git a/arch/mips/boot/dts/brcm/bcm6368.dtsi b/arch/mips/boot/dts/brcm/bcm6368.dtsi |
1379 |
+index 52c19f40b9cca..8e87867ebc04a 100644 |
1380 |
+--- a/arch/mips/boot/dts/brcm/bcm6368.dtsi |
1381 |
++++ b/arch/mips/boot/dts/brcm/bcm6368.dtsi |
1382 |
+@@ -59,7 +59,7 @@ |
1383 |
+ |
1384 |
+ periph_cntl: syscon@100000008 { |
1385 |
+ compatible = "syscon"; |
1386 |
+- reg = <0x10000000 0xc>; |
1387 |
++ reg = <0x10000008 0x4>; |
1388 |
+ native-endian; |
1389 |
+ }; |
1390 |
+ |
1391 |
+diff --git a/arch/mips/crypto/poly1305-glue.c b/arch/mips/crypto/poly1305-glue.c |
1392 |
+index fc881b46d9111..bc6110fb98e0a 100644 |
1393 |
+--- a/arch/mips/crypto/poly1305-glue.c |
1394 |
++++ b/arch/mips/crypto/poly1305-glue.c |
1395 |
+@@ -17,7 +17,7 @@ asmlinkage void poly1305_init_mips(void *state, const u8 *key); |
1396 |
+ asmlinkage void poly1305_blocks_mips(void *state, const u8 *src, u32 len, u32 hibit); |
1397 |
+ asmlinkage void poly1305_emit_mips(void *state, u8 *digest, const u32 *nonce); |
1398 |
+ |
1399 |
+-void poly1305_init_arch(struct poly1305_desc_ctx *dctx, const u8 *key) |
1400 |
++void poly1305_init_arch(struct poly1305_desc_ctx *dctx, const u8 key[POLY1305_KEY_SIZE]) |
1401 |
+ { |
1402 |
+ poly1305_init_mips(&dctx->h, key); |
1403 |
+ dctx->s[0] = get_unaligned_le32(key + 16); |
1404 |
+diff --git a/arch/mips/generic/board-boston.its.S b/arch/mips/generic/board-boston.its.S |
1405 |
+index a7f51f97b9102..c45ad27594218 100644 |
1406 |
+--- a/arch/mips/generic/board-boston.its.S |
1407 |
++++ b/arch/mips/generic/board-boston.its.S |
1408 |
+@@ -1,22 +1,22 @@ |
1409 |
+ / { |
1410 |
+ images { |
1411 |
+- fdt@boston { |
1412 |
++ fdt-boston { |
1413 |
+ description = "img,boston Device Tree"; |
1414 |
+ data = /incbin/("boot/dts/img/boston.dtb"); |
1415 |
+ type = "flat_dt"; |
1416 |
+ arch = "mips"; |
1417 |
+ compression = "none"; |
1418 |
+- hash@0 { |
1419 |
++ hash { |
1420 |
+ algo = "sha1"; |
1421 |
+ }; |
1422 |
+ }; |
1423 |
+ }; |
1424 |
+ |
1425 |
+ configurations { |
1426 |
+- conf@boston { |
1427 |
++ conf-boston { |
1428 |
+ description = "Boston Linux kernel"; |
1429 |
+- kernel = "kernel@0"; |
1430 |
+- fdt = "fdt@boston"; |
1431 |
++ kernel = "kernel"; |
1432 |
++ fdt = "fdt-boston"; |
1433 |
+ }; |
1434 |
+ }; |
1435 |
+ }; |
1436 |
+diff --git a/arch/mips/generic/board-jaguar2.its.S b/arch/mips/generic/board-jaguar2.its.S |
1437 |
+index fb0e589eeff71..c2b8d479b26cd 100644 |
1438 |
+--- a/arch/mips/generic/board-jaguar2.its.S |
1439 |
++++ b/arch/mips/generic/board-jaguar2.its.S |
1440 |
+@@ -1,23 +1,23 @@ |
1441 |
+ /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ |
1442 |
+ / { |
1443 |
+ images { |
1444 |
+- fdt@jaguar2_pcb110 { |
1445 |
++ fdt-jaguar2_pcb110 { |
1446 |
+ description = "MSCC Jaguar2 PCB110 Device Tree"; |
1447 |
+ data = /incbin/("boot/dts/mscc/jaguar2_pcb110.dtb"); |
1448 |
+ type = "flat_dt"; |
1449 |
+ arch = "mips"; |
1450 |
+ compression = "none"; |
1451 |
+- hash@0 { |
1452 |
++ hash { |
1453 |
+ algo = "sha1"; |
1454 |
+ }; |
1455 |
+ }; |
1456 |
+- fdt@jaguar2_pcb111 { |
1457 |
++ fdt-jaguar2_pcb111 { |
1458 |
+ description = "MSCC Jaguar2 PCB111 Device Tree"; |
1459 |
+ data = /incbin/("boot/dts/mscc/jaguar2_pcb111.dtb"); |
1460 |
+ type = "flat_dt"; |
1461 |
+ arch = "mips"; |
1462 |
+ compression = "none"; |
1463 |
+- hash@0 { |
1464 |
++ hash { |
1465 |
+ algo = "sha1"; |
1466 |
+ }; |
1467 |
+ }; |
1468 |
+@@ -26,14 +26,14 @@ |
1469 |
+ configurations { |
1470 |
+ pcb110 { |
1471 |
+ description = "Jaguar2 Linux kernel"; |
1472 |
+- kernel = "kernel@0"; |
1473 |
+- fdt = "fdt@jaguar2_pcb110"; |
1474 |
++ kernel = "kernel"; |
1475 |
++ fdt = "fdt-jaguar2_pcb110"; |
1476 |
+ ramdisk = "ramdisk"; |
1477 |
+ }; |
1478 |
+ pcb111 { |
1479 |
+ description = "Jaguar2 Linux kernel"; |
1480 |
+- kernel = "kernel@0"; |
1481 |
+- fdt = "fdt@jaguar2_pcb111"; |
1482 |
++ kernel = "kernel"; |
1483 |
++ fdt = "fdt-jaguar2_pcb111"; |
1484 |
+ ramdisk = "ramdisk"; |
1485 |
+ }; |
1486 |
+ }; |
1487 |
+diff --git a/arch/mips/generic/board-luton.its.S b/arch/mips/generic/board-luton.its.S |
1488 |
+index 39a543f62f258..bd9837c9af976 100644 |
1489 |
+--- a/arch/mips/generic/board-luton.its.S |
1490 |
++++ b/arch/mips/generic/board-luton.its.S |
1491 |
+@@ -1,13 +1,13 @@ |
1492 |
+ /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ |
1493 |
+ / { |
1494 |
+ images { |
1495 |
+- fdt@luton_pcb091 { |
1496 |
++ fdt-luton_pcb091 { |
1497 |
+ description = "MSCC Luton PCB091 Device Tree"; |
1498 |
+ data = /incbin/("boot/dts/mscc/luton_pcb091.dtb"); |
1499 |
+ type = "flat_dt"; |
1500 |
+ arch = "mips"; |
1501 |
+ compression = "none"; |
1502 |
+- hash@0 { |
1503 |
++ hash { |
1504 |
+ algo = "sha1"; |
1505 |
+ }; |
1506 |
+ }; |
1507 |
+@@ -16,8 +16,8 @@ |
1508 |
+ configurations { |
1509 |
+ pcb091 { |
1510 |
+ description = "Luton Linux kernel"; |
1511 |
+- kernel = "kernel@0"; |
1512 |
+- fdt = "fdt@luton_pcb091"; |
1513 |
++ kernel = "kernel"; |
1514 |
++ fdt = "fdt-luton_pcb091"; |
1515 |
+ }; |
1516 |
+ }; |
1517 |
+ }; |
1518 |
+diff --git a/arch/mips/generic/board-ni169445.its.S b/arch/mips/generic/board-ni169445.its.S |
1519 |
+index e4cb4f95a8cc1..0a2e8f7a8526f 100644 |
1520 |
+--- a/arch/mips/generic/board-ni169445.its.S |
1521 |
++++ b/arch/mips/generic/board-ni169445.its.S |
1522 |
+@@ -1,22 +1,22 @@ |
1523 |
+ / { |
1524 |
+ images { |
1525 |
+- fdt@ni169445 { |
1526 |
++ fdt-ni169445 { |
1527 |
+ description = "NI 169445 device tree"; |
1528 |
+ data = /incbin/("boot/dts/ni/169445.dtb"); |
1529 |
+ type = "flat_dt"; |
1530 |
+ arch = "mips"; |
1531 |
+ compression = "none"; |
1532 |
+- hash@0 { |
1533 |
++ hash { |
1534 |
+ algo = "sha1"; |
1535 |
+ }; |
1536 |
+ }; |
1537 |
+ }; |
1538 |
+ |
1539 |
+ configurations { |
1540 |
+- conf@ni169445 { |
1541 |
++ conf-ni169445 { |
1542 |
+ description = "NI 169445 Linux Kernel"; |
1543 |
+- kernel = "kernel@0"; |
1544 |
+- fdt = "fdt@ni169445"; |
1545 |
++ kernel = "kernel"; |
1546 |
++ fdt = "fdt-ni169445"; |
1547 |
+ }; |
1548 |
+ }; |
1549 |
+ }; |
1550 |
+diff --git a/arch/mips/generic/board-ocelot.its.S b/arch/mips/generic/board-ocelot.its.S |
1551 |
+index 3da23988149a6..8c7e3a1b68d3d 100644 |
1552 |
+--- a/arch/mips/generic/board-ocelot.its.S |
1553 |
++++ b/arch/mips/generic/board-ocelot.its.S |
1554 |
+@@ -1,40 +1,40 @@ |
1555 |
+ /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ |
1556 |
+ / { |
1557 |
+ images { |
1558 |
+- fdt@ocelot_pcb123 { |
1559 |
++ fdt-ocelot_pcb123 { |
1560 |
+ description = "MSCC Ocelot PCB123 Device Tree"; |
1561 |
+ data = /incbin/("boot/dts/mscc/ocelot_pcb123.dtb"); |
1562 |
+ type = "flat_dt"; |
1563 |
+ arch = "mips"; |
1564 |
+ compression = "none"; |
1565 |
+- hash@0 { |
1566 |
++ hash { |
1567 |
+ algo = "sha1"; |
1568 |
+ }; |
1569 |
+ }; |
1570 |
+ |
1571 |
+- fdt@ocelot_pcb120 { |
1572 |
++ fdt-ocelot_pcb120 { |
1573 |
+ description = "MSCC Ocelot PCB120 Device Tree"; |
1574 |
+ data = /incbin/("boot/dts/mscc/ocelot_pcb120.dtb"); |
1575 |
+ type = "flat_dt"; |
1576 |
+ arch = "mips"; |
1577 |
+ compression = "none"; |
1578 |
+- hash@0 { |
1579 |
++ hash { |
1580 |
+ algo = "sha1"; |
1581 |
+ }; |
1582 |
+ }; |
1583 |
+ }; |
1584 |
+ |
1585 |
+ configurations { |
1586 |
+- conf@ocelot_pcb123 { |
1587 |
++ conf-ocelot_pcb123 { |
1588 |
+ description = "Ocelot Linux kernel"; |
1589 |
+- kernel = "kernel@0"; |
1590 |
+- fdt = "fdt@ocelot_pcb123"; |
1591 |
++ kernel = "kernel"; |
1592 |
++ fdt = "fdt-ocelot_pcb123"; |
1593 |
+ }; |
1594 |
+ |
1595 |
+- conf@ocelot_pcb120 { |
1596 |
++ conf-ocelot_pcb120 { |
1597 |
+ description = "Ocelot Linux kernel"; |
1598 |
+- kernel = "kernel@0"; |
1599 |
+- fdt = "fdt@ocelot_pcb120"; |
1600 |
++ kernel = "kernel"; |
1601 |
++ fdt = "fdt-ocelot_pcb120"; |
1602 |
+ }; |
1603 |
+ }; |
1604 |
+ }; |
1605 |
+diff --git a/arch/mips/generic/board-serval.its.S b/arch/mips/generic/board-serval.its.S |
1606 |
+index 4ea4fc9d757f3..dde833efe980a 100644 |
1607 |
+--- a/arch/mips/generic/board-serval.its.S |
1608 |
++++ b/arch/mips/generic/board-serval.its.S |
1609 |
+@@ -1,13 +1,13 @@ |
1610 |
+ /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ |
1611 |
+ / { |
1612 |
+ images { |
1613 |
+- fdt@serval_pcb105 { |
1614 |
++ fdt-serval_pcb105 { |
1615 |
+ description = "MSCC Serval PCB105 Device Tree"; |
1616 |
+ data = /incbin/("boot/dts/mscc/serval_pcb105.dtb"); |
1617 |
+ type = "flat_dt"; |
1618 |
+ arch = "mips"; |
1619 |
+ compression = "none"; |
1620 |
+- hash@0 { |
1621 |
++ hash { |
1622 |
+ algo = "sha1"; |
1623 |
+ }; |
1624 |
+ }; |
1625 |
+@@ -16,8 +16,8 @@ |
1626 |
+ configurations { |
1627 |
+ pcb105 { |
1628 |
+ description = "Serval Linux kernel"; |
1629 |
+- kernel = "kernel@0"; |
1630 |
+- fdt = "fdt@serval_pcb105"; |
1631 |
++ kernel = "kernel"; |
1632 |
++ fdt = "fdt-serval_pcb105"; |
1633 |
+ ramdisk = "ramdisk"; |
1634 |
+ }; |
1635 |
+ }; |
1636 |
+diff --git a/arch/mips/generic/board-xilfpga.its.S b/arch/mips/generic/board-xilfpga.its.S |
1637 |
+index a2e773d3f14f4..08c1e900eb4ed 100644 |
1638 |
+--- a/arch/mips/generic/board-xilfpga.its.S |
1639 |
++++ b/arch/mips/generic/board-xilfpga.its.S |
1640 |
+@@ -1,22 +1,22 @@ |
1641 |
+ / { |
1642 |
+ images { |
1643 |
+- fdt@xilfpga { |
1644 |
++ fdt-xilfpga { |
1645 |
+ description = "MIPSfpga (xilfpga) Device Tree"; |
1646 |
+ data = /incbin/("boot/dts/xilfpga/nexys4ddr.dtb"); |
1647 |
+ type = "flat_dt"; |
1648 |
+ arch = "mips"; |
1649 |
+ compression = "none"; |
1650 |
+- hash@0 { |
1651 |
++ hash { |
1652 |
+ algo = "sha1"; |
1653 |
+ }; |
1654 |
+ }; |
1655 |
+ }; |
1656 |
+ |
1657 |
+ configurations { |
1658 |
+- conf@xilfpga { |
1659 |
++ conf-xilfpga { |
1660 |
+ description = "MIPSfpga Linux kernel"; |
1661 |
+- kernel = "kernel@0"; |
1662 |
+- fdt = "fdt@xilfpga"; |
1663 |
++ kernel = "kernel"; |
1664 |
++ fdt = "fdt-xilfpga"; |
1665 |
+ }; |
1666 |
+ }; |
1667 |
+ }; |
1668 |
+diff --git a/arch/mips/generic/vmlinux.its.S b/arch/mips/generic/vmlinux.its.S |
1669 |
+index 1a08438fd8930..3e254676540f4 100644 |
1670 |
+--- a/arch/mips/generic/vmlinux.its.S |
1671 |
++++ b/arch/mips/generic/vmlinux.its.S |
1672 |
+@@ -6,7 +6,7 @@ |
1673 |
+ #address-cells = <ADDR_CELLS>; |
1674 |
+ |
1675 |
+ images { |
1676 |
+- kernel@0 { |
1677 |
++ kernel { |
1678 |
+ description = KERNEL_NAME; |
1679 |
+ data = /incbin/(VMLINUX_BINARY); |
1680 |
+ type = "kernel"; |
1681 |
+@@ -15,18 +15,18 @@ |
1682 |
+ compression = VMLINUX_COMPRESSION; |
1683 |
+ load = /bits/ ADDR_BITS <VMLINUX_LOAD_ADDRESS>; |
1684 |
+ entry = /bits/ ADDR_BITS <VMLINUX_ENTRY_ADDRESS>; |
1685 |
+- hash@0 { |
1686 |
++ hash { |
1687 |
+ algo = "sha1"; |
1688 |
+ }; |
1689 |
+ }; |
1690 |
+ }; |
1691 |
+ |
1692 |
+ configurations { |
1693 |
+- default = "conf@default"; |
1694 |
++ default = "conf-default"; |
1695 |
+ |
1696 |
+- conf@default { |
1697 |
++ conf-default { |
1698 |
+ description = "Generic Linux kernel"; |
1699 |
+- kernel = "kernel@0"; |
1700 |
++ kernel = "kernel"; |
1701 |
+ }; |
1702 |
+ }; |
1703 |
+ }; |
1704 |
+diff --git a/arch/mips/include/asm/asmmacro.h b/arch/mips/include/asm/asmmacro.h |
1705 |
+index 86f2323ebe6bc..ca83ada7015f5 100644 |
1706 |
+--- a/arch/mips/include/asm/asmmacro.h |
1707 |
++++ b/arch/mips/include/asm/asmmacro.h |
1708 |
+@@ -44,8 +44,7 @@ |
1709 |
+ .endm |
1710 |
+ #endif |
1711 |
+ |
1712 |
+-#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR5) || \ |
1713 |
+- defined(CONFIG_CPU_MIPSR6) |
1714 |
++#ifdef CONFIG_CPU_HAS_DIEI |
1715 |
+ .macro local_irq_enable reg=t0 |
1716 |
+ ei |
1717 |
+ irq_enable_hazard |
1718 |
+diff --git a/arch/mips/loongson64/init.c b/arch/mips/loongson64/init.c |
1719 |
+index ed75f7971261b..052cce6a8a998 100644 |
1720 |
+--- a/arch/mips/loongson64/init.c |
1721 |
++++ b/arch/mips/loongson64/init.c |
1722 |
+@@ -82,7 +82,7 @@ static int __init add_legacy_isa_io(struct fwnode_handle *fwnode, resource_size_ |
1723 |
+ return -ENOMEM; |
1724 |
+ |
1725 |
+ range->fwnode = fwnode; |
1726 |
+- range->size = size; |
1727 |
++ range->size = size = round_up(size, PAGE_SIZE); |
1728 |
+ range->hw_start = hw_start; |
1729 |
+ range->flags = LOGIC_PIO_CPU_MMIO; |
1730 |
+ |
1731 |
+diff --git a/arch/mips/pci/pci-legacy.c b/arch/mips/pci/pci-legacy.c |
1732 |
+index 39052de915f34..3a909194284a6 100644 |
1733 |
+--- a/arch/mips/pci/pci-legacy.c |
1734 |
++++ b/arch/mips/pci/pci-legacy.c |
1735 |
+@@ -166,8 +166,13 @@ void pci_load_of_ranges(struct pci_controller *hose, struct device_node *node) |
1736 |
+ res = hose->mem_resource; |
1737 |
+ break; |
1738 |
+ } |
1739 |
+- if (res != NULL) |
1740 |
+- of_pci_range_to_resource(&range, node, res); |
1741 |
++ if (res != NULL) { |
1742 |
++ res->name = node->full_name; |
1743 |
++ res->flags = range.flags; |
1744 |
++ res->start = range.cpu_addr; |
1745 |
++ res->end = range.cpu_addr + range.size - 1; |
1746 |
++ res->parent = res->child = res->sibling = NULL; |
1747 |
++ } |
1748 |
+ } |
1749 |
+ } |
1750 |
+ |
1751 |
+diff --git a/arch/mips/pci/pci-mt7620.c b/arch/mips/pci/pci-mt7620.c |
1752 |
+index d360616037525..e032932348d6f 100644 |
1753 |
+--- a/arch/mips/pci/pci-mt7620.c |
1754 |
++++ b/arch/mips/pci/pci-mt7620.c |
1755 |
+@@ -30,6 +30,7 @@ |
1756 |
+ #define RALINK_GPIOMODE 0x60 |
1757 |
+ |
1758 |
+ #define PPLL_CFG1 0x9c |
1759 |
++#define PPLL_LD BIT(23) |
1760 |
+ |
1761 |
+ #define PPLL_DRV 0xa0 |
1762 |
+ #define PDRV_SW_SET BIT(31) |
1763 |
+@@ -239,8 +240,8 @@ static int mt7620_pci_hw_init(struct platform_device *pdev) |
1764 |
+ rt_sysc_m32(0, RALINK_PCIE0_CLK_EN, RALINK_CLKCFG1); |
1765 |
+ mdelay(100); |
1766 |
+ |
1767 |
+- if (!(rt_sysc_r32(PPLL_CFG1) & PDRV_SW_SET)) { |
1768 |
+- dev_err(&pdev->dev, "MT7620 PPLL unlock\n"); |
1769 |
++ if (!(rt_sysc_r32(PPLL_CFG1) & PPLL_LD)) { |
1770 |
++ dev_err(&pdev->dev, "pcie PLL not locked, aborting init\n"); |
1771 |
+ reset_control_assert(rstpcie0); |
1772 |
+ rt_sysc_m32(RALINK_PCIE0_CLK_EN, 0, RALINK_CLKCFG1); |
1773 |
+ return -1; |
1774 |
+diff --git a/arch/mips/pci/pci-rt2880.c b/arch/mips/pci/pci-rt2880.c |
1775 |
+index e1f12e3981363..f1538d2be89e5 100644 |
1776 |
+--- a/arch/mips/pci/pci-rt2880.c |
1777 |
++++ b/arch/mips/pci/pci-rt2880.c |
1778 |
+@@ -180,7 +180,6 @@ static inline void rt2880_pci_write_u32(unsigned long reg, u32 val) |
1779 |
+ |
1780 |
+ int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) |
1781 |
+ { |
1782 |
+- u16 cmd; |
1783 |
+ int irq = -1; |
1784 |
+ |
1785 |
+ if (dev->bus->number != 0) |
1786 |
+@@ -188,8 +187,6 @@ int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) |
1787 |
+ |
1788 |
+ switch (PCI_SLOT(dev->devfn)) { |
1789 |
+ case 0x00: |
1790 |
+- rt2880_pci_write_u32(PCI_BASE_ADDRESS_0, 0x08000000); |
1791 |
+- (void) rt2880_pci_read_u32(PCI_BASE_ADDRESS_0); |
1792 |
+ break; |
1793 |
+ case 0x11: |
1794 |
+ irq = RT288X_CPU_IRQ_PCI; |
1795 |
+@@ -201,16 +198,6 @@ int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) |
1796 |
+ break; |
1797 |
+ } |
1798 |
+ |
1799 |
+- pci_write_config_byte((struct pci_dev *) dev, |
1800 |
+- PCI_CACHE_LINE_SIZE, 0x14); |
1801 |
+- pci_write_config_byte((struct pci_dev *) dev, PCI_LATENCY_TIMER, 0xFF); |
1802 |
+- pci_read_config_word((struct pci_dev *) dev, PCI_COMMAND, &cmd); |
1803 |
+- cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_IO | PCI_COMMAND_MEMORY | |
1804 |
+- PCI_COMMAND_INVALIDATE | PCI_COMMAND_FAST_BACK | |
1805 |
+- PCI_COMMAND_SERR | PCI_COMMAND_WAIT | PCI_COMMAND_PARITY; |
1806 |
+- pci_write_config_word((struct pci_dev *) dev, PCI_COMMAND, cmd); |
1807 |
+- pci_write_config_byte((struct pci_dev *) dev, PCI_INTERRUPT_LINE, |
1808 |
+- dev->irq); |
1809 |
+ return irq; |
1810 |
+ } |
1811 |
+ |
1812 |
+@@ -251,6 +238,30 @@ static int rt288x_pci_probe(struct platform_device *pdev) |
1813 |
+ |
1814 |
+ int pcibios_plat_dev_init(struct pci_dev *dev) |
1815 |
+ { |
1816 |
++ static bool slot0_init; |
1817 |
++ |
1818 |
++ /* |
1819 |
++ * Nobody seems to initialize slot 0, but this platform requires it, so |
1820 |
++ * do it once when some other slot is being enabled. The PCI subsystem |
1821 |
++ * should configure other slots properly, so no need to do anything |
1822 |
++ * special for those. |
1823 |
++ */ |
1824 |
++ if (!slot0_init && dev->bus->number == 0) { |
1825 |
++ u16 cmd; |
1826 |
++ u32 bar0; |
1827 |
++ |
1828 |
++ slot0_init = true; |
1829 |
++ |
1830 |
++ pci_bus_write_config_dword(dev->bus, 0, PCI_BASE_ADDRESS_0, |
1831 |
++ 0x08000000); |
1832 |
++ pci_bus_read_config_dword(dev->bus, 0, PCI_BASE_ADDRESS_0, |
1833 |
++ &bar0); |
1834 |
++ |
1835 |
++ pci_bus_read_config_word(dev->bus, 0, PCI_COMMAND, &cmd); |
1836 |
++ cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_IO | PCI_COMMAND_MEMORY; |
1837 |
++ pci_bus_write_config_word(dev->bus, 0, PCI_COMMAND, cmd); |
1838 |
++ } |
1839 |
++ |
1840 |
+ return 0; |
1841 |
+ } |
1842 |
+ |
1843 |
+diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig |
1844 |
+index a685e42d39932..fa4c6fa3fd06e 100644 |
1845 |
+--- a/arch/powerpc/Kconfig |
1846 |
++++ b/arch/powerpc/Kconfig |
1847 |
+@@ -225,7 +225,7 @@ config PPC |
1848 |
+ select HAVE_LIVEPATCH if HAVE_DYNAMIC_FTRACE_WITH_REGS |
1849 |
+ select HAVE_MOD_ARCH_SPECIFIC |
1850 |
+ select HAVE_NMI if PERF_EVENTS || (PPC64 && PPC_BOOK3S) |
1851 |
+- select HAVE_HARDLOCKUP_DETECTOR_ARCH if (PPC64 && PPC_BOOK3S) |
1852 |
++ select HAVE_HARDLOCKUP_DETECTOR_ARCH if PPC64 && PPC_BOOK3S && SMP |
1853 |
+ select HAVE_OPROFILE |
1854 |
+ select HAVE_OPTPROBES if PPC64 |
1855 |
+ select HAVE_PERF_EVENTS |
1856 |
+diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug |
1857 |
+index b88900f4832fd..52abca88b5b2b 100644 |
1858 |
+--- a/arch/powerpc/Kconfig.debug |
1859 |
++++ b/arch/powerpc/Kconfig.debug |
1860 |
+@@ -352,6 +352,7 @@ config PPC_EARLY_DEBUG_CPM_ADDR |
1861 |
+ config FAIL_IOMMU |
1862 |
+ bool "Fault-injection capability for IOMMU" |
1863 |
+ depends on FAULT_INJECTION |
1864 |
++ depends on PCI || IBMVIO |
1865 |
+ help |
1866 |
+ Provide fault-injection capability for IOMMU. Each device can |
1867 |
+ be selectively enabled via the fail_iommu property. |
1868 |
+diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h b/arch/powerpc/include/asm/book3s/64/pgtable.h |
1869 |
+index a398866816297..3d6cfa3b0f400 100644 |
1870 |
+--- a/arch/powerpc/include/asm/book3s/64/pgtable.h |
1871 |
++++ b/arch/powerpc/include/asm/book3s/64/pgtable.h |
1872 |
+@@ -7,6 +7,7 @@ |
1873 |
+ #ifndef __ASSEMBLY__ |
1874 |
+ #include <linux/mmdebug.h> |
1875 |
+ #include <linux/bug.h> |
1876 |
++#include <linux/sizes.h> |
1877 |
+ #endif |
1878 |
+ |
1879 |
+ /* |
1880 |
+@@ -323,7 +324,8 @@ extern unsigned long pci_io_base; |
1881 |
+ #define PHB_IO_END (KERN_IO_START + FULL_IO_SIZE) |
1882 |
+ #define IOREMAP_BASE (PHB_IO_END) |
1883 |
+ #define IOREMAP_START (ioremap_bot) |
1884 |
+-#define IOREMAP_END (KERN_IO_END) |
1885 |
++#define IOREMAP_END (KERN_IO_END - FIXADDR_SIZE) |
1886 |
++#define FIXADDR_SIZE SZ_32M |
1887 |
+ |
1888 |
+ /* Advertise special mapping type for AGP */ |
1889 |
+ #define HAVE_PAGE_AGP |
1890 |
+diff --git a/arch/powerpc/include/asm/book3s/64/radix.h b/arch/powerpc/include/asm/book3s/64/radix.h |
1891 |
+index c7813dc628fc9..59cab558e2f05 100644 |
1892 |
+--- a/arch/powerpc/include/asm/book3s/64/radix.h |
1893 |
++++ b/arch/powerpc/include/asm/book3s/64/radix.h |
1894 |
+@@ -222,8 +222,10 @@ static inline void radix__set_pte_at(struct mm_struct *mm, unsigned long addr, |
1895 |
+ * from ptesync, it should probably go into update_mmu_cache, rather |
1896 |
+ * than set_pte_at (which is used to set ptes unrelated to faults). |
1897 |
+ * |
1898 |
+- * Spurious faults to vmalloc region are not tolerated, so there is |
1899 |
+- * a ptesync in flush_cache_vmap. |
1900 |
++ * Spurious faults from the kernel memory are not tolerated, so there |
1901 |
++ * is a ptesync in flush_cache_vmap, and __map_kernel_page() follows |
1902 |
++ * the pte update sequence from ISA Book III 6.10 Translation Table |
1903 |
++ * Update Synchronization Requirements. |
1904 |
+ */ |
1905 |
+ } |
1906 |
+ |
1907 |
+diff --git a/arch/powerpc/include/asm/fixmap.h b/arch/powerpc/include/asm/fixmap.h |
1908 |
+index 8d03c16a36635..947b5b9c44241 100644 |
1909 |
+--- a/arch/powerpc/include/asm/fixmap.h |
1910 |
++++ b/arch/powerpc/include/asm/fixmap.h |
1911 |
+@@ -23,12 +23,17 @@ |
1912 |
+ #include <asm/kmap_size.h> |
1913 |
+ #endif |
1914 |
+ |
1915 |
++#ifdef CONFIG_PPC64 |
1916 |
++#define FIXADDR_TOP (IOREMAP_END + FIXADDR_SIZE) |
1917 |
++#else |
1918 |
++#define FIXADDR_SIZE 0 |
1919 |
+ #ifdef CONFIG_KASAN |
1920 |
+ #include <asm/kasan.h> |
1921 |
+ #define FIXADDR_TOP (KASAN_SHADOW_START - PAGE_SIZE) |
1922 |
+ #else |
1923 |
+ #define FIXADDR_TOP ((unsigned long)(-PAGE_SIZE)) |
1924 |
+ #endif |
1925 |
++#endif |
1926 |
+ |
1927 |
+ /* |
1928 |
+ * Here we define all the compile-time 'special' virtual |
1929 |
+@@ -50,6 +55,7 @@ |
1930 |
+ */ |
1931 |
+ enum fixed_addresses { |
1932 |
+ FIX_HOLE, |
1933 |
++#ifdef CONFIG_PPC32 |
1934 |
+ /* reserve the top 128K for early debugging purposes */ |
1935 |
+ FIX_EARLY_DEBUG_TOP = FIX_HOLE, |
1936 |
+ FIX_EARLY_DEBUG_BASE = FIX_EARLY_DEBUG_TOP+(ALIGN(SZ_128K, PAGE_SIZE)/PAGE_SIZE)-1, |
1937 |
+@@ -72,6 +78,7 @@ enum fixed_addresses { |
1938 |
+ FIX_IMMR_SIZE, |
1939 |
+ #endif |
1940 |
+ /* FIX_PCIE_MCFG, */ |
1941 |
++#endif /* CONFIG_PPC32 */ |
1942 |
+ __end_of_permanent_fixed_addresses, |
1943 |
+ |
1944 |
+ #define NR_FIX_BTMAPS (SZ_256K / PAGE_SIZE) |
1945 |
+@@ -98,6 +105,8 @@ enum fixed_addresses { |
1946 |
+ static inline void __set_fixmap(enum fixed_addresses idx, |
1947 |
+ phys_addr_t phys, pgprot_t flags) |
1948 |
+ { |
1949 |
++ BUILD_BUG_ON(IS_ENABLED(CONFIG_PPC64) && __FIXADDR_SIZE > FIXADDR_SIZE); |
1950 |
++ |
1951 |
+ if (__builtin_constant_p(idx)) |
1952 |
+ BUILD_BUG_ON(idx >= __end_of_fixed_addresses); |
1953 |
+ else if (WARN_ON(idx >= __end_of_fixed_addresses)) |
1954 |
+diff --git a/arch/powerpc/include/asm/nohash/64/pgtable.h b/arch/powerpc/include/asm/nohash/64/pgtable.h |
1955 |
+index 6cb8aa3571917..57cd3892bfe05 100644 |
1956 |
+--- a/arch/powerpc/include/asm/nohash/64/pgtable.h |
1957 |
++++ b/arch/powerpc/include/asm/nohash/64/pgtable.h |
1958 |
+@@ -6,6 +6,8 @@ |
1959 |
+ * the ppc64 non-hashed page table. |
1960 |
+ */ |
1961 |
+ |
1962 |
++#include <linux/sizes.h> |
1963 |
++ |
1964 |
+ #include <asm/nohash/64/pgtable-4k.h> |
1965 |
+ #include <asm/barrier.h> |
1966 |
+ #include <asm/asm-const.h> |
1967 |
+@@ -54,7 +56,8 @@ |
1968 |
+ #define PHB_IO_END (KERN_IO_START + FULL_IO_SIZE) |
1969 |
+ #define IOREMAP_BASE (PHB_IO_END) |
1970 |
+ #define IOREMAP_START (ioremap_bot) |
1971 |
+-#define IOREMAP_END (KERN_VIRT_START + KERN_VIRT_SIZE) |
1972 |
++#define IOREMAP_END (KERN_VIRT_START + KERN_VIRT_SIZE - FIXADDR_SIZE) |
1973 |
++#define FIXADDR_SIZE SZ_32M |
1974 |
+ |
1975 |
+ |
1976 |
+ /* |
1977 |
+diff --git a/arch/powerpc/include/asm/smp.h b/arch/powerpc/include/asm/smp.h |
1978 |
+index c4e2d53acd2be..15144aac2f706 100644 |
1979 |
+--- a/arch/powerpc/include/asm/smp.h |
1980 |
++++ b/arch/powerpc/include/asm/smp.h |
1981 |
+@@ -121,6 +121,11 @@ static inline struct cpumask *cpu_sibling_mask(int cpu) |
1982 |
+ return per_cpu(cpu_sibling_map, cpu); |
1983 |
+ } |
1984 |
+ |
1985 |
++static inline struct cpumask *cpu_core_mask(int cpu) |
1986 |
++{ |
1987 |
++ return per_cpu(cpu_core_map, cpu); |
1988 |
++} |
1989 |
++ |
1990 |
+ static inline struct cpumask *cpu_l2_cache_mask(int cpu) |
1991 |
+ { |
1992 |
+ return per_cpu(cpu_l2_cache_map, cpu); |
1993 |
+diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile |
1994 |
+index b31e2160b233a..74dfb09178aa5 100644 |
1995 |
+--- a/arch/powerpc/kernel/Makefile |
1996 |
++++ b/arch/powerpc/kernel/Makefile |
1997 |
+@@ -49,7 +49,7 @@ obj-y := cputable.o syscalls.o \ |
1998 |
+ hw_breakpoint_constraints.o |
1999 |
+ obj-y += ptrace/ |
2000 |
+ obj-$(CONFIG_PPC64) += setup_64.o \ |
2001 |
+- paca.o nvram_64.o note.o syscall_64.o |
2002 |
++ paca.o nvram_64.o note.o interrupt.o |
2003 |
+ obj-$(CONFIG_COMPAT) += sys_ppc32.o signal_32.o |
2004 |
+ obj-$(CONFIG_VDSO32) += vdso32_wrapper.o |
2005 |
+ obj-$(CONFIG_PPC_WATCHDOG) += watchdog.o |
2006 |
+diff --git a/arch/powerpc/kernel/fadump.c b/arch/powerpc/kernel/fadump.c |
2007 |
+index 8482739d42f38..eddf362caedce 100644 |
2008 |
+--- a/arch/powerpc/kernel/fadump.c |
2009 |
++++ b/arch/powerpc/kernel/fadump.c |
2010 |
+@@ -292,7 +292,7 @@ static void fadump_show_config(void) |
2011 |
+ * that is required for a kernel to boot successfully. |
2012 |
+ * |
2013 |
+ */ |
2014 |
+-static inline u64 fadump_calculate_reserve_size(void) |
2015 |
++static __init u64 fadump_calculate_reserve_size(void) |
2016 |
+ { |
2017 |
+ u64 base, size, bootmem_min; |
2018 |
+ int ret; |
2019 |
+diff --git a/arch/powerpc/kernel/interrupt.c b/arch/powerpc/kernel/interrupt.c |
2020 |
+new file mode 100644 |
2021 |
+index 0000000000000..f103fb9f2cfe7 |
2022 |
+--- /dev/null |
2023 |
++++ b/arch/powerpc/kernel/interrupt.c |
2024 |
+@@ -0,0 +1,442 @@ |
2025 |
++// SPDX-License-Identifier: GPL-2.0-or-later |
2026 |
++ |
2027 |
++#include <linux/err.h> |
2028 |
++#include <asm/asm-prototypes.h> |
2029 |
++#include <asm/kup.h> |
2030 |
++#include <asm/cputime.h> |
2031 |
++#include <asm/hw_irq.h> |
2032 |
++#include <asm/kprobes.h> |
2033 |
++#include <asm/paca.h> |
2034 |
++#include <asm/ptrace.h> |
2035 |
++#include <asm/reg.h> |
2036 |
++#include <asm/signal.h> |
2037 |
++#include <asm/switch_to.h> |
2038 |
++#include <asm/syscall.h> |
2039 |
++#include <asm/time.h> |
2040 |
++#include <asm/unistd.h> |
2041 |
++ |
2042 |
++typedef long (*syscall_fn)(long, long, long, long, long, long); |
2043 |
++ |
2044 |
++/* Has to run notrace because it is entered not completely "reconciled" */ |
2045 |
++notrace long system_call_exception(long r3, long r4, long r5, |
2046 |
++ long r6, long r7, long r8, |
2047 |
++ unsigned long r0, struct pt_regs *regs) |
2048 |
++{ |
2049 |
++ syscall_fn f; |
2050 |
++ |
2051 |
++ if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG)) |
2052 |
++ BUG_ON(irq_soft_mask_return() != IRQS_ALL_DISABLED); |
2053 |
++ |
2054 |
++ trace_hardirqs_off(); /* finish reconciling */ |
2055 |
++ |
2056 |
++ if (!IS_ENABLED(CONFIG_BOOKE) && !IS_ENABLED(CONFIG_40x)) |
2057 |
++ BUG_ON(!(regs->msr & MSR_RI)); |
2058 |
++ BUG_ON(!(regs->msr & MSR_PR)); |
2059 |
++ BUG_ON(!FULL_REGS(regs)); |
2060 |
++ BUG_ON(regs->softe != IRQS_ENABLED); |
2061 |
++ |
2062 |
++#ifdef CONFIG_PPC_PKEY |
2063 |
++ if (mmu_has_feature(MMU_FTR_PKEY)) { |
2064 |
++ unsigned long amr, iamr; |
2065 |
++ bool flush_needed = false; |
2066 |
++ /* |
2067 |
++ * When entering from userspace we mostly have the AMR/IAMR |
2068 |
++ * different from kernel default values. Hence don't compare. |
2069 |
++ */ |
2070 |
++ amr = mfspr(SPRN_AMR); |
2071 |
++ iamr = mfspr(SPRN_IAMR); |
2072 |
++ regs->amr = amr; |
2073 |
++ regs->iamr = iamr; |
2074 |
++ if (mmu_has_feature(MMU_FTR_BOOK3S_KUAP)) { |
2075 |
++ mtspr(SPRN_AMR, AMR_KUAP_BLOCKED); |
2076 |
++ flush_needed = true; |
2077 |
++ } |
2078 |
++ if (mmu_has_feature(MMU_FTR_BOOK3S_KUEP)) { |
2079 |
++ mtspr(SPRN_IAMR, AMR_KUEP_BLOCKED); |
2080 |
++ flush_needed = true; |
2081 |
++ } |
2082 |
++ if (flush_needed) |
2083 |
++ isync(); |
2084 |
++ } else |
2085 |
++#endif |
2086 |
++ kuap_check_amr(); |
2087 |
++ |
2088 |
++ account_cpu_user_entry(); |
2089 |
++ |
2090 |
++#ifdef CONFIG_PPC_SPLPAR |
2091 |
++ if (IS_ENABLED(CONFIG_VIRT_CPU_ACCOUNTING_NATIVE) && |
2092 |
++ firmware_has_feature(FW_FEATURE_SPLPAR)) { |
2093 |
++ struct lppaca *lp = local_paca->lppaca_ptr; |
2094 |
++ |
2095 |
++ if (unlikely(local_paca->dtl_ridx != be64_to_cpu(lp->dtl_idx))) |
2096 |
++ accumulate_stolen_time(); |
2097 |
++ } |
2098 |
++#endif |
2099 |
++ |
2100 |
++ /* |
2101 |
++ * This is not required for the syscall exit path, but makes the |
2102 |
++ * stack frame look nicer. If this was initialised in the first stack |
2103 |
++ * frame, or if the unwinder was taught the first stack frame always |
2104 |
++ * returns to user with IRQS_ENABLED, this store could be avoided! |
2105 |
++ */ |
2106 |
++ regs->softe = IRQS_ENABLED; |
2107 |
++ |
2108 |
++ local_irq_enable(); |
2109 |
++ |
2110 |
++ if (unlikely(current_thread_info()->flags & _TIF_SYSCALL_DOTRACE)) { |
2111 |
++ if (unlikely(regs->trap == 0x7ff0)) { |
2112 |
++ /* Unsupported scv vector */ |
2113 |
++ _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); |
2114 |
++ return regs->gpr[3]; |
2115 |
++ } |
2116 |
++ /* |
2117 |
++ * We use the return value of do_syscall_trace_enter() as the |
2118 |
++ * syscall number. If the syscall was rejected for any reason |
2119 |
++ * do_syscall_trace_enter() returns an invalid syscall number |
2120 |
++ * and the test against NR_syscalls will fail and the return |
2121 |
++ * value to be used is in regs->gpr[3]. |
2122 |
++ */ |
2123 |
++ r0 = do_syscall_trace_enter(regs); |
2124 |
++ if (unlikely(r0 >= NR_syscalls)) |
2125 |
++ return regs->gpr[3]; |
2126 |
++ r3 = regs->gpr[3]; |
2127 |
++ r4 = regs->gpr[4]; |
2128 |
++ r5 = regs->gpr[5]; |
2129 |
++ r6 = regs->gpr[6]; |
2130 |
++ r7 = regs->gpr[7]; |
2131 |
++ r8 = regs->gpr[8]; |
2132 |
++ |
2133 |
++ } else if (unlikely(r0 >= NR_syscalls)) { |
2134 |
++ if (unlikely(regs->trap == 0x7ff0)) { |
2135 |
++ /* Unsupported scv vector */ |
2136 |
++ _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); |
2137 |
++ return regs->gpr[3]; |
2138 |
++ } |
2139 |
++ return -ENOSYS; |
2140 |
++ } |
2141 |
++ |
2142 |
++ /* May be faster to do array_index_nospec? */ |
2143 |
++ barrier_nospec(); |
2144 |
++ |
2145 |
++ if (unlikely(is_32bit_task())) { |
2146 |
++ f = (void *)compat_sys_call_table[r0]; |
2147 |
++ |
2148 |
++ r3 &= 0x00000000ffffffffULL; |
2149 |
++ r4 &= 0x00000000ffffffffULL; |
2150 |
++ r5 &= 0x00000000ffffffffULL; |
2151 |
++ r6 &= 0x00000000ffffffffULL; |
2152 |
++ r7 &= 0x00000000ffffffffULL; |
2153 |
++ r8 &= 0x00000000ffffffffULL; |
2154 |
++ |
2155 |
++ } else { |
2156 |
++ f = (void *)sys_call_table[r0]; |
2157 |
++ } |
2158 |
++ |
2159 |
++ return f(r3, r4, r5, r6, r7, r8); |
2160 |
++} |
2161 |
++ |
2162 |
++/* |
2163 |
++ * local irqs must be disabled. Returns false if the caller must re-enable |
2164 |
++ * them, check for new work, and try again. |
2165 |
++ */ |
2166 |
++static notrace inline bool prep_irq_for_enabled_exit(bool clear_ri) |
2167 |
++{ |
2168 |
++ /* This must be done with RI=1 because tracing may touch vmaps */ |
2169 |
++ trace_hardirqs_on(); |
2170 |
++ |
2171 |
++ /* This pattern matches prep_irq_for_idle */ |
2172 |
++ if (clear_ri) |
2173 |
++ __hard_EE_RI_disable(); |
2174 |
++ else |
2175 |
++ __hard_irq_disable(); |
2176 |
++ if (unlikely(lazy_irq_pending_nocheck())) { |
2177 |
++ /* Took an interrupt, may have more exit work to do. */ |
2178 |
++ if (clear_ri) |
2179 |
++ __hard_RI_enable(); |
2180 |
++ trace_hardirqs_off(); |
2181 |
++ local_paca->irq_happened |= PACA_IRQ_HARD_DIS; |
2182 |
++ |
2183 |
++ return false; |
2184 |
++ } |
2185 |
++ local_paca->irq_happened = 0; |
2186 |
++ irq_soft_mask_set(IRQS_ENABLED); |
2187 |
++ |
2188 |
++ return true; |
2189 |
++} |
2190 |
++ |
2191 |
++/* |
2192 |
++ * This should be called after a syscall returns, with r3 the return value |
2193 |
++ * from the syscall. If this function returns non-zero, the system call |
2194 |
++ * exit assembly should additionally load all GPR registers and CTR and XER |
2195 |
++ * from the interrupt frame. |
2196 |
++ * |
2197 |
++ * The function graph tracer can not trace the return side of this function, |
2198 |
++ * because RI=0 and soft mask state is "unreconciled", so it is marked notrace. |
2199 |
++ */ |
2200 |
++notrace unsigned long syscall_exit_prepare(unsigned long r3, |
2201 |
++ struct pt_regs *regs, |
2202 |
++ long scv) |
2203 |
++{ |
2204 |
++ unsigned long *ti_flagsp = ¤t_thread_info()->flags; |
2205 |
++ unsigned long ti_flags; |
2206 |
++ unsigned long ret = 0; |
2207 |
++ |
2208 |
++ kuap_check_amr(); |
2209 |
++ |
2210 |
++ regs->result = r3; |
2211 |
++ |
2212 |
++ /* Check whether the syscall is issued inside a restartable sequence */ |
2213 |
++ rseq_syscall(regs); |
2214 |
++ |
2215 |
++ ti_flags = *ti_flagsp; |
2216 |
++ |
2217 |
++ if (unlikely(r3 >= (unsigned long)-MAX_ERRNO) && !scv) { |
2218 |
++ if (likely(!(ti_flags & (_TIF_NOERROR | _TIF_RESTOREALL)))) { |
2219 |
++ r3 = -r3; |
2220 |
++ regs->ccr |= 0x10000000; /* Set SO bit in CR */ |
2221 |
++ } |
2222 |
++ } |
2223 |
++ |
2224 |
++ if (unlikely(ti_flags & _TIF_PERSYSCALL_MASK)) { |
2225 |
++ if (ti_flags & _TIF_RESTOREALL) |
2226 |
++ ret = _TIF_RESTOREALL; |
2227 |
++ else |
2228 |
++ regs->gpr[3] = r3; |
2229 |
++ clear_bits(_TIF_PERSYSCALL_MASK, ti_flagsp); |
2230 |
++ } else { |
2231 |
++ regs->gpr[3] = r3; |
2232 |
++ } |
2233 |
++ |
2234 |
++ if (unlikely(ti_flags & _TIF_SYSCALL_DOTRACE)) { |
2235 |
++ do_syscall_trace_leave(regs); |
2236 |
++ ret |= _TIF_RESTOREALL; |
2237 |
++ } |
2238 |
++ |
2239 |
++again: |
2240 |
++ local_irq_disable(); |
2241 |
++ ti_flags = READ_ONCE(*ti_flagsp); |
2242 |
++ while (unlikely(ti_flags & (_TIF_USER_WORK_MASK & ~_TIF_RESTORE_TM))) { |
2243 |
++ local_irq_enable(); |
2244 |
++ if (ti_flags & _TIF_NEED_RESCHED) { |
2245 |
++ schedule(); |
2246 |
++ } else { |
2247 |
++ /* |
2248 |
++ * SIGPENDING must restore signal handler function |
2249 |
++ * argument GPRs, and some non-volatiles (e.g., r1). |
2250 |
++ * Restore all for now. This could be made lighter. |
2251 |
++ */ |
2252 |
++ if (ti_flags & _TIF_SIGPENDING) |
2253 |
++ ret |= _TIF_RESTOREALL; |
2254 |
++ do_notify_resume(regs, ti_flags); |
2255 |
++ } |
2256 |
++ local_irq_disable(); |
2257 |
++ ti_flags = READ_ONCE(*ti_flagsp); |
2258 |
++ } |
2259 |
++ |
2260 |
++ if (IS_ENABLED(CONFIG_PPC_BOOK3S) && IS_ENABLED(CONFIG_PPC_FPU)) { |
2261 |
++ if (IS_ENABLED(CONFIG_PPC_TRANSACTIONAL_MEM) && |
2262 |
++ unlikely((ti_flags & _TIF_RESTORE_TM))) { |
2263 |
++ restore_tm_state(regs); |
2264 |
++ } else { |
2265 |
++ unsigned long mathflags = MSR_FP; |
2266 |
++ |
2267 |
++ if (cpu_has_feature(CPU_FTR_VSX)) |
2268 |
++ mathflags |= MSR_VEC | MSR_VSX; |
2269 |
++ else if (cpu_has_feature(CPU_FTR_ALTIVEC)) |
2270 |
++ mathflags |= MSR_VEC; |
2271 |
++ |
2272 |
++ /* |
2273 |
++ * If userspace MSR has all available FP bits set, |
2274 |
++ * then they are live and no need to restore. If not, |
2275 |
++ * it means the regs were given up and restore_math |
2276 |
++ * may decide to restore them (to avoid taking an FP |
2277 |
++ * fault). |
2278 |
++ */ |
2279 |
++ if ((regs->msr & mathflags) != mathflags) |
2280 |
++ restore_math(regs); |
2281 |
++ } |
2282 |
++ } |
2283 |
++ |
2284 |
++ /* scv need not set RI=0 because SRRs are not used */ |
2285 |
++ if (unlikely(!prep_irq_for_enabled_exit(!scv))) { |
2286 |
++ local_irq_enable(); |
2287 |
++ goto again; |
2288 |
++ } |
2289 |
++ |
2290 |
++#ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
2291 |
++ local_paca->tm_scratch = regs->msr; |
2292 |
++#endif |
2293 |
++ |
2294 |
++ account_cpu_user_exit(); |
2295 |
++ |
2296 |
++#ifdef CONFIG_PPC_BOOK3S /* BOOK3E not yet using this */ |
2297 |
++ /* |
2298 |
++ * We do this at the end so that we do context switch with KERNEL AMR |
2299 |
++ */ |
2300 |
++ kuap_user_restore(regs); |
2301 |
++#endif |
2302 |
++ return ret; |
2303 |
++} |
2304 |
++ |
2305 |
++#ifdef CONFIG_PPC_BOOK3S /* BOOK3E not yet using this */ |
2306 |
++notrace unsigned long interrupt_exit_user_prepare(struct pt_regs *regs, unsigned long msr) |
2307 |
++{ |
2308 |
++#ifdef CONFIG_PPC_BOOK3E |
2309 |
++ struct thread_struct *ts = ¤t->thread; |
2310 |
++#endif |
2311 |
++ unsigned long *ti_flagsp = ¤t_thread_info()->flags; |
2312 |
++ unsigned long ti_flags; |
2313 |
++ unsigned long flags; |
2314 |
++ unsigned long ret = 0; |
2315 |
++ |
2316 |
++ if (!IS_ENABLED(CONFIG_BOOKE) && !IS_ENABLED(CONFIG_40x)) |
2317 |
++ BUG_ON(!(regs->msr & MSR_RI)); |
2318 |
++ BUG_ON(!(regs->msr & MSR_PR)); |
2319 |
++ BUG_ON(!FULL_REGS(regs)); |
2320 |
++ BUG_ON(regs->softe != IRQS_ENABLED); |
2321 |
++ |
2322 |
++ /* |
2323 |
++ * We don't need to restore AMR on the way back to userspace for KUAP. |
2324 |
++ * AMR can only have been unlocked if we interrupted the kernel. |
2325 |
++ */ |
2326 |
++ kuap_check_amr(); |
2327 |
++ |
2328 |
++ local_irq_save(flags); |
2329 |
++ |
2330 |
++again: |
2331 |
++ ti_flags = READ_ONCE(*ti_flagsp); |
2332 |
++ while (unlikely(ti_flags & (_TIF_USER_WORK_MASK & ~_TIF_RESTORE_TM))) { |
2333 |
++ local_irq_enable(); /* returning to user: may enable */ |
2334 |
++ if (ti_flags & _TIF_NEED_RESCHED) { |
2335 |
++ schedule(); |
2336 |
++ } else { |
2337 |
++ if (ti_flags & _TIF_SIGPENDING) |
2338 |
++ ret |= _TIF_RESTOREALL; |
2339 |
++ do_notify_resume(regs, ti_flags); |
2340 |
++ } |
2341 |
++ local_irq_disable(); |
2342 |
++ ti_flags = READ_ONCE(*ti_flagsp); |
2343 |
++ } |
2344 |
++ |
2345 |
++ if (IS_ENABLED(CONFIG_PPC_BOOK3S) && IS_ENABLED(CONFIG_PPC_FPU)) { |
2346 |
++ if (IS_ENABLED(CONFIG_PPC_TRANSACTIONAL_MEM) && |
2347 |
++ unlikely((ti_flags & _TIF_RESTORE_TM))) { |
2348 |
++ restore_tm_state(regs); |
2349 |
++ } else { |
2350 |
++ unsigned long mathflags = MSR_FP; |
2351 |
++ |
2352 |
++ if (cpu_has_feature(CPU_FTR_VSX)) |
2353 |
++ mathflags |= MSR_VEC | MSR_VSX; |
2354 |
++ else if (cpu_has_feature(CPU_FTR_ALTIVEC)) |
2355 |
++ mathflags |= MSR_VEC; |
2356 |
++ |
2357 |
++ /* See above restore_math comment */ |
2358 |
++ if ((regs->msr & mathflags) != mathflags) |
2359 |
++ restore_math(regs); |
2360 |
++ } |
2361 |
++ } |
2362 |
++ |
2363 |
++ if (unlikely(!prep_irq_for_enabled_exit(true))) { |
2364 |
++ local_irq_enable(); |
2365 |
++ local_irq_disable(); |
2366 |
++ goto again; |
2367 |
++ } |
2368 |
++ |
2369 |
++#ifdef CONFIG_PPC_BOOK3E |
2370 |
++ if (unlikely(ts->debug.dbcr0 & DBCR0_IDM)) { |
2371 |
++ /* |
2372 |
++ * Check to see if the dbcr0 register is set up to debug. |
2373 |
++ * Use the internal debug mode bit to do this. |
2374 |
++ */ |
2375 |
++ mtmsr(mfmsr() & ~MSR_DE); |
2376 |
++ mtspr(SPRN_DBCR0, ts->debug.dbcr0); |
2377 |
++ mtspr(SPRN_DBSR, -1); |
2378 |
++ } |
2379 |
++#endif |
2380 |
++ |
2381 |
++#ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
2382 |
++ local_paca->tm_scratch = regs->msr; |
2383 |
++#endif |
2384 |
++ |
2385 |
++ account_cpu_user_exit(); |
2386 |
++ |
2387 |
++ /* |
2388 |
++ * We do this at the end so that we do context switch with KERNEL AMR |
2389 |
++ */ |
2390 |
++ kuap_user_restore(regs); |
2391 |
++ return ret; |
2392 |
++} |
2393 |
++ |
2394 |
++void unrecoverable_exception(struct pt_regs *regs); |
2395 |
++void preempt_schedule_irq(void); |
2396 |
++ |
2397 |
++notrace unsigned long interrupt_exit_kernel_prepare(struct pt_regs *regs, unsigned long msr) |
2398 |
++{ |
2399 |
++ unsigned long *ti_flagsp = ¤t_thread_info()->flags; |
2400 |
++ unsigned long flags; |
2401 |
++ unsigned long ret = 0; |
2402 |
++ unsigned long amr; |
2403 |
++ |
2404 |
++ if (!IS_ENABLED(CONFIG_BOOKE) && !IS_ENABLED(CONFIG_40x) && |
2405 |
++ unlikely(!(regs->msr & MSR_RI))) |
2406 |
++ unrecoverable_exception(regs); |
2407 |
++ BUG_ON(regs->msr & MSR_PR); |
2408 |
++ BUG_ON(!FULL_REGS(regs)); |
2409 |
++ |
2410 |
++ amr = kuap_get_and_check_amr(); |
2411 |
++ |
2412 |
++ if (unlikely(*ti_flagsp & _TIF_EMULATE_STACK_STORE)) { |
2413 |
++ clear_bits(_TIF_EMULATE_STACK_STORE, ti_flagsp); |
2414 |
++ ret = 1; |
2415 |
++ } |
2416 |
++ |
2417 |
++ local_irq_save(flags); |
2418 |
++ |
2419 |
++ if (regs->softe == IRQS_ENABLED) { |
2420 |
++ /* Returning to a kernel context with local irqs enabled. */ |
2421 |
++ WARN_ON_ONCE(!(regs->msr & MSR_EE)); |
2422 |
++again: |
2423 |
++ if (IS_ENABLED(CONFIG_PREEMPT)) { |
2424 |
++ /* Return to preemptible kernel context */ |
2425 |
++ if (unlikely(*ti_flagsp & _TIF_NEED_RESCHED)) { |
2426 |
++ if (preempt_count() == 0) |
2427 |
++ preempt_schedule_irq(); |
2428 |
++ } |
2429 |
++ } |
2430 |
++ |
2431 |
++ if (unlikely(!prep_irq_for_enabled_exit(true))) { |
2432 |
++ /* |
2433 |
++ * Can't local_irq_restore to replay if we were in |
2434 |
++ * interrupt context. Must replay directly. |
2435 |
++ */ |
2436 |
++ if (irqs_disabled_flags(flags)) { |
2437 |
++ replay_soft_interrupts(); |
2438 |
++ } else { |
2439 |
++ local_irq_restore(flags); |
2440 |
++ local_irq_save(flags); |
2441 |
++ } |
2442 |
++ /* Took an interrupt, may have more exit work to do. */ |
2443 |
++ goto again; |
2444 |
++ } |
2445 |
++ } else { |
2446 |
++ /* Returning to a kernel context with local irqs disabled. */ |
2447 |
++ __hard_EE_RI_disable(); |
2448 |
++ if (regs->msr & MSR_EE) |
2449 |
++ local_paca->irq_happened &= ~PACA_IRQ_HARD_DIS; |
2450 |
++ } |
2451 |
++ |
2452 |
++ |
2453 |
++#ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
2454 |
++ local_paca->tm_scratch = regs->msr; |
2455 |
++#endif |
2456 |
++ |
2457 |
++ /* |
2458 |
++ * Don't want to mfspr(SPRN_AMR) here, because this comes after mtmsr, |
2459 |
++ * which would cause Read-After-Write stalls. Hence, we take the AMR |
2460 |
++ * value from the check above. |
2461 |
++ */ |
2462 |
++ kuap_kernel_restore(regs, amr); |
2463 |
++ |
2464 |
++ return ret; |
2465 |
++} |
2466 |
++#endif |
2467 |
+diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c |
2468 |
+index ae3c417303679..a7ebaa2084169 100644 |
2469 |
+--- a/arch/powerpc/kernel/prom.c |
2470 |
++++ b/arch/powerpc/kernel/prom.c |
2471 |
+@@ -267,7 +267,7 @@ static struct feature_property { |
2472 |
+ }; |
2473 |
+ |
2474 |
+ #if defined(CONFIG_44x) && defined(CONFIG_PPC_FPU) |
2475 |
+-static inline void identical_pvr_fixup(unsigned long node) |
2476 |
++static __init void identical_pvr_fixup(unsigned long node) |
2477 |
+ { |
2478 |
+ unsigned int pvr; |
2479 |
+ const char *model = of_get_flat_dt_prop(node, "model", NULL); |
2480 |
+diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c |
2481 |
+index 9e2246e80efd6..d1bc51a128b29 100644 |
2482 |
+--- a/arch/powerpc/kernel/smp.c |
2483 |
++++ b/arch/powerpc/kernel/smp.c |
2484 |
+@@ -1056,17 +1056,12 @@ void __init smp_prepare_cpus(unsigned int max_cpus) |
2485 |
+ local_memory_node(numa_cpu_lookup_table[cpu])); |
2486 |
+ } |
2487 |
+ #endif |
2488 |
+- /* |
2489 |
+- * cpu_core_map is now more updated and exists only since |
2490 |
+- * its been exported for long. It only will have a snapshot |
2491 |
+- * of cpu_cpu_mask. |
2492 |
+- */ |
2493 |
+- cpumask_copy(per_cpu(cpu_core_map, cpu), cpu_cpu_mask(cpu)); |
2494 |
+ } |
2495 |
+ |
2496 |
+ /* Init the cpumasks so the boot CPU is related to itself */ |
2497 |
+ cpumask_set_cpu(boot_cpuid, cpu_sibling_mask(boot_cpuid)); |
2498 |
+ cpumask_set_cpu(boot_cpuid, cpu_l2_cache_mask(boot_cpuid)); |
2499 |
++ cpumask_set_cpu(boot_cpuid, cpu_core_mask(boot_cpuid)); |
2500 |
+ |
2501 |
+ if (has_coregroup_support()) |
2502 |
+ cpumask_set_cpu(boot_cpuid, cpu_coregroup_mask(boot_cpuid)); |
2503 |
+@@ -1407,6 +1402,9 @@ static void remove_cpu_from_masks(int cpu) |
2504 |
+ set_cpus_unrelated(cpu, i, cpu_smallcore_mask); |
2505 |
+ } |
2506 |
+ |
2507 |
++ for_each_cpu(i, cpu_core_mask(cpu)) |
2508 |
++ set_cpus_unrelated(cpu, i, cpu_core_mask); |
2509 |
++ |
2510 |
+ if (has_coregroup_support()) { |
2511 |
+ for_each_cpu(i, cpu_coregroup_mask(cpu)) |
2512 |
+ set_cpus_unrelated(cpu, i, cpu_coregroup_mask); |
2513 |
+@@ -1467,8 +1465,11 @@ static void update_coregroup_mask(int cpu, cpumask_var_t *mask) |
2514 |
+ |
2515 |
+ static void add_cpu_to_masks(int cpu) |
2516 |
+ { |
2517 |
++ struct cpumask *(*submask_fn)(int) = cpu_sibling_mask; |
2518 |
+ int first_thread = cpu_first_thread_sibling(cpu); |
2519 |
++ int chip_id = cpu_to_chip_id(cpu); |
2520 |
+ cpumask_var_t mask; |
2521 |
++ bool ret; |
2522 |
+ int i; |
2523 |
+ |
2524 |
+ /* |
2525 |
+@@ -1484,12 +1485,36 @@ static void add_cpu_to_masks(int cpu) |
2526 |
+ add_cpu_to_smallcore_masks(cpu); |
2527 |
+ |
2528 |
+ /* In CPU-hotplug path, hence use GFP_ATOMIC */ |
2529 |
+- alloc_cpumask_var_node(&mask, GFP_ATOMIC, cpu_to_node(cpu)); |
2530 |
++ ret = alloc_cpumask_var_node(&mask, GFP_ATOMIC, cpu_to_node(cpu)); |
2531 |
+ update_mask_by_l2(cpu, &mask); |
2532 |
+ |
2533 |
+ if (has_coregroup_support()) |
2534 |
+ update_coregroup_mask(cpu, &mask); |
2535 |
+ |
2536 |
++ if (chip_id == -1 || !ret) { |
2537 |
++ cpumask_copy(per_cpu(cpu_core_map, cpu), cpu_cpu_mask(cpu)); |
2538 |
++ goto out; |
2539 |
++ } |
2540 |
++ |
2541 |
++ if (shared_caches) |
2542 |
++ submask_fn = cpu_l2_cache_mask; |
2543 |
++ |
2544 |
++ /* Update core_mask with all the CPUs that are part of submask */ |
2545 |
++ or_cpumasks_related(cpu, cpu, submask_fn, cpu_core_mask); |
2546 |
++ |
2547 |
++ /* Skip all CPUs already part of current CPU core mask */ |
2548 |
++ cpumask_andnot(mask, cpu_online_mask, cpu_core_mask(cpu)); |
2549 |
++ |
2550 |
++ for_each_cpu(i, mask) { |
2551 |
++ if (chip_id == cpu_to_chip_id(i)) { |
2552 |
++ or_cpumasks_related(cpu, i, submask_fn, cpu_core_mask); |
2553 |
++ cpumask_andnot(mask, mask, submask_fn(i)); |
2554 |
++ } else { |
2555 |
++ cpumask_andnot(mask, mask, cpu_core_mask(i)); |
2556 |
++ } |
2557 |
++ } |
2558 |
++ |
2559 |
++out: |
2560 |
+ free_cpumask_var(mask); |
2561 |
+ } |
2562 |
+ |
2563 |
+diff --git a/arch/powerpc/kernel/syscall_64.c b/arch/powerpc/kernel/syscall_64.c |
2564 |
+deleted file mode 100644 |
2565 |
+index 7c85ed04a1641..0000000000000 |
2566 |
+--- a/arch/powerpc/kernel/syscall_64.c |
2567 |
++++ /dev/null |
2568 |
+@@ -1,441 +0,0 @@ |
2569 |
+-// SPDX-License-Identifier: GPL-2.0-or-later |
2570 |
+- |
2571 |
+-#include <linux/err.h> |
2572 |
+-#include <asm/asm-prototypes.h> |
2573 |
+-#include <asm/kup.h> |
2574 |
+-#include <asm/cputime.h> |
2575 |
+-#include <asm/hw_irq.h> |
2576 |
+-#include <asm/kprobes.h> |
2577 |
+-#include <asm/paca.h> |
2578 |
+-#include <asm/ptrace.h> |
2579 |
+-#include <asm/reg.h> |
2580 |
+-#include <asm/signal.h> |
2581 |
+-#include <asm/switch_to.h> |
2582 |
+-#include <asm/syscall.h> |
2583 |
+-#include <asm/time.h> |
2584 |
+-#include <asm/unistd.h> |
2585 |
+- |
2586 |
+-typedef long (*syscall_fn)(long, long, long, long, long, long); |
2587 |
+- |
2588 |
+-/* Has to run notrace because it is entered not completely "reconciled" */ |
2589 |
+-notrace long system_call_exception(long r3, long r4, long r5, |
2590 |
+- long r6, long r7, long r8, |
2591 |
+- unsigned long r0, struct pt_regs *regs) |
2592 |
+-{ |
2593 |
+- syscall_fn f; |
2594 |
+- |
2595 |
+- if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG)) |
2596 |
+- BUG_ON(irq_soft_mask_return() != IRQS_ALL_DISABLED); |
2597 |
+- |
2598 |
+- trace_hardirqs_off(); /* finish reconciling */ |
2599 |
+- |
2600 |
+- if (IS_ENABLED(CONFIG_PPC_BOOK3S)) |
2601 |
+- BUG_ON(!(regs->msr & MSR_RI)); |
2602 |
+- BUG_ON(!(regs->msr & MSR_PR)); |
2603 |
+- BUG_ON(!FULL_REGS(regs)); |
2604 |
+- BUG_ON(regs->softe != IRQS_ENABLED); |
2605 |
+- |
2606 |
+-#ifdef CONFIG_PPC_PKEY |
2607 |
+- if (mmu_has_feature(MMU_FTR_PKEY)) { |
2608 |
+- unsigned long amr, iamr; |
2609 |
+- bool flush_needed = false; |
2610 |
+- /* |
2611 |
+- * When entering from userspace we mostly have the AMR/IAMR |
2612 |
+- * different from kernel default values. Hence don't compare. |
2613 |
+- */ |
2614 |
+- amr = mfspr(SPRN_AMR); |
2615 |
+- iamr = mfspr(SPRN_IAMR); |
2616 |
+- regs->amr = amr; |
2617 |
+- regs->iamr = iamr; |
2618 |
+- if (mmu_has_feature(MMU_FTR_BOOK3S_KUAP)) { |
2619 |
+- mtspr(SPRN_AMR, AMR_KUAP_BLOCKED); |
2620 |
+- flush_needed = true; |
2621 |
+- } |
2622 |
+- if (mmu_has_feature(MMU_FTR_BOOK3S_KUEP)) { |
2623 |
+- mtspr(SPRN_IAMR, AMR_KUEP_BLOCKED); |
2624 |
+- flush_needed = true; |
2625 |
+- } |
2626 |
+- if (flush_needed) |
2627 |
+- isync(); |
2628 |
+- } else |
2629 |
+-#endif |
2630 |
+- kuap_check_amr(); |
2631 |
+- |
2632 |
+- account_cpu_user_entry(); |
2633 |
+- |
2634 |
+-#ifdef CONFIG_PPC_SPLPAR |
2635 |
+- if (IS_ENABLED(CONFIG_VIRT_CPU_ACCOUNTING_NATIVE) && |
2636 |
+- firmware_has_feature(FW_FEATURE_SPLPAR)) { |
2637 |
+- struct lppaca *lp = local_paca->lppaca_ptr; |
2638 |
+- |
2639 |
+- if (unlikely(local_paca->dtl_ridx != be64_to_cpu(lp->dtl_idx))) |
2640 |
+- accumulate_stolen_time(); |
2641 |
+- } |
2642 |
+-#endif |
2643 |
+- |
2644 |
+- /* |
2645 |
+- * This is not required for the syscall exit path, but makes the |
2646 |
+- * stack frame look nicer. If this was initialised in the first stack |
2647 |
+- * frame, or if the unwinder was taught the first stack frame always |
2648 |
+- * returns to user with IRQS_ENABLED, this store could be avoided! |
2649 |
+- */ |
2650 |
+- regs->softe = IRQS_ENABLED; |
2651 |
+- |
2652 |
+- local_irq_enable(); |
2653 |
+- |
2654 |
+- if (unlikely(current_thread_info()->flags & _TIF_SYSCALL_DOTRACE)) { |
2655 |
+- if (unlikely(regs->trap == 0x7ff0)) { |
2656 |
+- /* Unsupported scv vector */ |
2657 |
+- _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); |
2658 |
+- return regs->gpr[3]; |
2659 |
+- } |
2660 |
+- /* |
2661 |
+- * We use the return value of do_syscall_trace_enter() as the |
2662 |
+- * syscall number. If the syscall was rejected for any reason |
2663 |
+- * do_syscall_trace_enter() returns an invalid syscall number |
2664 |
+- * and the test against NR_syscalls will fail and the return |
2665 |
+- * value to be used is in regs->gpr[3]. |
2666 |
+- */ |
2667 |
+- r0 = do_syscall_trace_enter(regs); |
2668 |
+- if (unlikely(r0 >= NR_syscalls)) |
2669 |
+- return regs->gpr[3]; |
2670 |
+- r3 = regs->gpr[3]; |
2671 |
+- r4 = regs->gpr[4]; |
2672 |
+- r5 = regs->gpr[5]; |
2673 |
+- r6 = regs->gpr[6]; |
2674 |
+- r7 = regs->gpr[7]; |
2675 |
+- r8 = regs->gpr[8]; |
2676 |
+- |
2677 |
+- } else if (unlikely(r0 >= NR_syscalls)) { |
2678 |
+- if (unlikely(regs->trap == 0x7ff0)) { |
2679 |
+- /* Unsupported scv vector */ |
2680 |
+- _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); |
2681 |
+- return regs->gpr[3]; |
2682 |
+- } |
2683 |
+- return -ENOSYS; |
2684 |
+- } |
2685 |
+- |
2686 |
+- /* May be faster to do array_index_nospec? */ |
2687 |
+- barrier_nospec(); |
2688 |
+- |
2689 |
+- if (unlikely(is_32bit_task())) { |
2690 |
+- f = (void *)compat_sys_call_table[r0]; |
2691 |
+- |
2692 |
+- r3 &= 0x00000000ffffffffULL; |
2693 |
+- r4 &= 0x00000000ffffffffULL; |
2694 |
+- r5 &= 0x00000000ffffffffULL; |
2695 |
+- r6 &= 0x00000000ffffffffULL; |
2696 |
+- r7 &= 0x00000000ffffffffULL; |
2697 |
+- r8 &= 0x00000000ffffffffULL; |
2698 |
+- |
2699 |
+- } else { |
2700 |
+- f = (void *)sys_call_table[r0]; |
2701 |
+- } |
2702 |
+- |
2703 |
+- return f(r3, r4, r5, r6, r7, r8); |
2704 |
+-} |
2705 |
+- |
2706 |
+-/* |
2707 |
+- * local irqs must be disabled. Returns false if the caller must re-enable |
2708 |
+- * them, check for new work, and try again. |
2709 |
+- */ |
2710 |
+-static notrace inline bool prep_irq_for_enabled_exit(bool clear_ri) |
2711 |
+-{ |
2712 |
+- /* This must be done with RI=1 because tracing may touch vmaps */ |
2713 |
+- trace_hardirqs_on(); |
2714 |
+- |
2715 |
+- /* This pattern matches prep_irq_for_idle */ |
2716 |
+- if (clear_ri) |
2717 |
+- __hard_EE_RI_disable(); |
2718 |
+- else |
2719 |
+- __hard_irq_disable(); |
2720 |
+- if (unlikely(lazy_irq_pending_nocheck())) { |
2721 |
+- /* Took an interrupt, may have more exit work to do. */ |
2722 |
+- if (clear_ri) |
2723 |
+- __hard_RI_enable(); |
2724 |
+- trace_hardirqs_off(); |
2725 |
+- local_paca->irq_happened |= PACA_IRQ_HARD_DIS; |
2726 |
+- |
2727 |
+- return false; |
2728 |
+- } |
2729 |
+- local_paca->irq_happened = 0; |
2730 |
+- irq_soft_mask_set(IRQS_ENABLED); |
2731 |
+- |
2732 |
+- return true; |
2733 |
+-} |
2734 |
+- |
2735 |
+-/* |
2736 |
+- * This should be called after a syscall returns, with r3 the return value |
2737 |
+- * from the syscall. If this function returns non-zero, the system call |
2738 |
+- * exit assembly should additionally load all GPR registers and CTR and XER |
2739 |
+- * from the interrupt frame. |
2740 |
+- * |
2741 |
+- * The function graph tracer can not trace the return side of this function, |
2742 |
+- * because RI=0 and soft mask state is "unreconciled", so it is marked notrace. |
2743 |
+- */ |
2744 |
+-notrace unsigned long syscall_exit_prepare(unsigned long r3, |
2745 |
+- struct pt_regs *regs, |
2746 |
+- long scv) |
2747 |
+-{ |
2748 |
+- unsigned long *ti_flagsp = ¤t_thread_info()->flags; |
2749 |
+- unsigned long ti_flags; |
2750 |
+- unsigned long ret = 0; |
2751 |
+- |
2752 |
+- kuap_check_amr(); |
2753 |
+- |
2754 |
+- regs->result = r3; |
2755 |
+- |
2756 |
+- /* Check whether the syscall is issued inside a restartable sequence */ |
2757 |
+- rseq_syscall(regs); |
2758 |
+- |
2759 |
+- ti_flags = *ti_flagsp; |
2760 |
+- |
2761 |
+- if (unlikely(r3 >= (unsigned long)-MAX_ERRNO) && !scv) { |
2762 |
+- if (likely(!(ti_flags & (_TIF_NOERROR | _TIF_RESTOREALL)))) { |
2763 |
+- r3 = -r3; |
2764 |
+- regs->ccr |= 0x10000000; /* Set SO bit in CR */ |
2765 |
+- } |
2766 |
+- } |
2767 |
+- |
2768 |
+- if (unlikely(ti_flags & _TIF_PERSYSCALL_MASK)) { |
2769 |
+- if (ti_flags & _TIF_RESTOREALL) |
2770 |
+- ret = _TIF_RESTOREALL; |
2771 |
+- else |
2772 |
+- regs->gpr[3] = r3; |
2773 |
+- clear_bits(_TIF_PERSYSCALL_MASK, ti_flagsp); |
2774 |
+- } else { |
2775 |
+- regs->gpr[3] = r3; |
2776 |
+- } |
2777 |
+- |
2778 |
+- if (unlikely(ti_flags & _TIF_SYSCALL_DOTRACE)) { |
2779 |
+- do_syscall_trace_leave(regs); |
2780 |
+- ret |= _TIF_RESTOREALL; |
2781 |
+- } |
2782 |
+- |
2783 |
+-again: |
2784 |
+- local_irq_disable(); |
2785 |
+- ti_flags = READ_ONCE(*ti_flagsp); |
2786 |
+- while (unlikely(ti_flags & (_TIF_USER_WORK_MASK & ~_TIF_RESTORE_TM))) { |
2787 |
+- local_irq_enable(); |
2788 |
+- if (ti_flags & _TIF_NEED_RESCHED) { |
2789 |
+- schedule(); |
2790 |
+- } else { |
2791 |
+- /* |
2792 |
+- * SIGPENDING must restore signal handler function |
2793 |
+- * argument GPRs, and some non-volatiles (e.g., r1). |
2794 |
+- * Restore all for now. This could be made lighter. |
2795 |
+- */ |
2796 |
+- if (ti_flags & _TIF_SIGPENDING) |
2797 |
+- ret |= _TIF_RESTOREALL; |
2798 |
+- do_notify_resume(regs, ti_flags); |
2799 |
+- } |
2800 |
+- local_irq_disable(); |
2801 |
+- ti_flags = READ_ONCE(*ti_flagsp); |
2802 |
+- } |
2803 |
+- |
2804 |
+- if (IS_ENABLED(CONFIG_PPC_BOOK3S) && IS_ENABLED(CONFIG_PPC_FPU)) { |
2805 |
+- if (IS_ENABLED(CONFIG_PPC_TRANSACTIONAL_MEM) && |
2806 |
+- unlikely((ti_flags & _TIF_RESTORE_TM))) { |
2807 |
+- restore_tm_state(regs); |
2808 |
+- } else { |
2809 |
+- unsigned long mathflags = MSR_FP; |
2810 |
+- |
2811 |
+- if (cpu_has_feature(CPU_FTR_VSX)) |
2812 |
+- mathflags |= MSR_VEC | MSR_VSX; |
2813 |
+- else if (cpu_has_feature(CPU_FTR_ALTIVEC)) |
2814 |
+- mathflags |= MSR_VEC; |
2815 |
+- |
2816 |
+- /* |
2817 |
+- * If userspace MSR has all available FP bits set, |
2818 |
+- * then they are live and no need to restore. If not, |
2819 |
+- * it means the regs were given up and restore_math |
2820 |
+- * may decide to restore them (to avoid taking an FP |
2821 |
+- * fault). |
2822 |
+- */ |
2823 |
+- if ((regs->msr & mathflags) != mathflags) |
2824 |
+- restore_math(regs); |
2825 |
+- } |
2826 |
+- } |
2827 |
+- |
2828 |
+- /* scv need not set RI=0 because SRRs are not used */ |
2829 |
+- if (unlikely(!prep_irq_for_enabled_exit(!scv))) { |
2830 |
+- local_irq_enable(); |
2831 |
+- goto again; |
2832 |
+- } |
2833 |
+- |
2834 |
+-#ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
2835 |
+- local_paca->tm_scratch = regs->msr; |
2836 |
+-#endif |
2837 |
+- |
2838 |
+- account_cpu_user_exit(); |
2839 |
+- |
2840 |
+-#ifdef CONFIG_PPC_BOOK3S /* BOOK3E not yet using this */ |
2841 |
+- /* |
2842 |
+- * We do this at the end so that we do context switch with KERNEL AMR |
2843 |
+- */ |
2844 |
+- kuap_user_restore(regs); |
2845 |
+-#endif |
2846 |
+- return ret; |
2847 |
+-} |
2848 |
+- |
2849 |
+-#ifdef CONFIG_PPC_BOOK3S /* BOOK3E not yet using this */ |
2850 |
+-notrace unsigned long interrupt_exit_user_prepare(struct pt_regs *regs, unsigned long msr) |
2851 |
+-{ |
2852 |
+-#ifdef CONFIG_PPC_BOOK3E |
2853 |
+- struct thread_struct *ts = ¤t->thread; |
2854 |
+-#endif |
2855 |
+- unsigned long *ti_flagsp = ¤t_thread_info()->flags; |
2856 |
+- unsigned long ti_flags; |
2857 |
+- unsigned long flags; |
2858 |
+- unsigned long ret = 0; |
2859 |
+- |
2860 |
+- if (IS_ENABLED(CONFIG_PPC_BOOK3S)) |
2861 |
+- BUG_ON(!(regs->msr & MSR_RI)); |
2862 |
+- BUG_ON(!(regs->msr & MSR_PR)); |
2863 |
+- BUG_ON(!FULL_REGS(regs)); |
2864 |
+- BUG_ON(regs->softe != IRQS_ENABLED); |
2865 |
+- |
2866 |
+- /* |
2867 |
+- * We don't need to restore AMR on the way back to userspace for KUAP. |
2868 |
+- * AMR can only have been unlocked if we interrupted the kernel. |
2869 |
+- */ |
2870 |
+- kuap_check_amr(); |
2871 |
+- |
2872 |
+- local_irq_save(flags); |
2873 |
+- |
2874 |
+-again: |
2875 |
+- ti_flags = READ_ONCE(*ti_flagsp); |
2876 |
+- while (unlikely(ti_flags & (_TIF_USER_WORK_MASK & ~_TIF_RESTORE_TM))) { |
2877 |
+- local_irq_enable(); /* returning to user: may enable */ |
2878 |
+- if (ti_flags & _TIF_NEED_RESCHED) { |
2879 |
+- schedule(); |
2880 |
+- } else { |
2881 |
+- if (ti_flags & _TIF_SIGPENDING) |
2882 |
+- ret |= _TIF_RESTOREALL; |
2883 |
+- do_notify_resume(regs, ti_flags); |
2884 |
+- } |
2885 |
+- local_irq_disable(); |
2886 |
+- ti_flags = READ_ONCE(*ti_flagsp); |
2887 |
+- } |
2888 |
+- |
2889 |
+- if (IS_ENABLED(CONFIG_PPC_BOOK3S) && IS_ENABLED(CONFIG_PPC_FPU)) { |
2890 |
+- if (IS_ENABLED(CONFIG_PPC_TRANSACTIONAL_MEM) && |
2891 |
+- unlikely((ti_flags & _TIF_RESTORE_TM))) { |
2892 |
+- restore_tm_state(regs); |
2893 |
+- } else { |
2894 |
+- unsigned long mathflags = MSR_FP; |
2895 |
+- |
2896 |
+- if (cpu_has_feature(CPU_FTR_VSX)) |
2897 |
+- mathflags |= MSR_VEC | MSR_VSX; |
2898 |
+- else if (cpu_has_feature(CPU_FTR_ALTIVEC)) |
2899 |
+- mathflags |= MSR_VEC; |
2900 |
+- |
2901 |
+- /* See above restore_math comment */ |
2902 |
+- if ((regs->msr & mathflags) != mathflags) |
2903 |
+- restore_math(regs); |
2904 |
+- } |
2905 |
+- } |
2906 |
+- |
2907 |
+- if (unlikely(!prep_irq_for_enabled_exit(true))) { |
2908 |
+- local_irq_enable(); |
2909 |
+- local_irq_disable(); |
2910 |
+- goto again; |
2911 |
+- } |
2912 |
+- |
2913 |
+-#ifdef CONFIG_PPC_BOOK3E |
2914 |
+- if (unlikely(ts->debug.dbcr0 & DBCR0_IDM)) { |
2915 |
+- /* |
2916 |
+- * Check to see if the dbcr0 register is set up to debug. |
2917 |
+- * Use the internal debug mode bit to do this. |
2918 |
+- */ |
2919 |
+- mtmsr(mfmsr() & ~MSR_DE); |
2920 |
+- mtspr(SPRN_DBCR0, ts->debug.dbcr0); |
2921 |
+- mtspr(SPRN_DBSR, -1); |
2922 |
+- } |
2923 |
+-#endif |
2924 |
+- |
2925 |
+-#ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
2926 |
+- local_paca->tm_scratch = regs->msr; |
2927 |
+-#endif |
2928 |
+- |
2929 |
+- account_cpu_user_exit(); |
2930 |
+- |
2931 |
+- /* |
2932 |
+- * We do this at the end so that we do context switch with KERNEL AMR |
2933 |
+- */ |
2934 |
+- kuap_user_restore(regs); |
2935 |
+- return ret; |
2936 |
+-} |
2937 |
+- |
2938 |
+-void unrecoverable_exception(struct pt_regs *regs); |
2939 |
+-void preempt_schedule_irq(void); |
2940 |
+- |
2941 |
+-notrace unsigned long interrupt_exit_kernel_prepare(struct pt_regs *regs, unsigned long msr) |
2942 |
+-{ |
2943 |
+- unsigned long *ti_flagsp = ¤t_thread_info()->flags; |
2944 |
+- unsigned long flags; |
2945 |
+- unsigned long ret = 0; |
2946 |
+- unsigned long amr; |
2947 |
+- |
2948 |
+- if (IS_ENABLED(CONFIG_PPC_BOOK3S) && unlikely(!(regs->msr & MSR_RI))) |
2949 |
+- unrecoverable_exception(regs); |
2950 |
+- BUG_ON(regs->msr & MSR_PR); |
2951 |
+- BUG_ON(!FULL_REGS(regs)); |
2952 |
+- |
2953 |
+- amr = kuap_get_and_check_amr(); |
2954 |
+- |
2955 |
+- if (unlikely(*ti_flagsp & _TIF_EMULATE_STACK_STORE)) { |
2956 |
+- clear_bits(_TIF_EMULATE_STACK_STORE, ti_flagsp); |
2957 |
+- ret = 1; |
2958 |
+- } |
2959 |
+- |
2960 |
+- local_irq_save(flags); |
2961 |
+- |
2962 |
+- if (regs->softe == IRQS_ENABLED) { |
2963 |
+- /* Returning to a kernel context with local irqs enabled. */ |
2964 |
+- WARN_ON_ONCE(!(regs->msr & MSR_EE)); |
2965 |
+-again: |
2966 |
+- if (IS_ENABLED(CONFIG_PREEMPT)) { |
2967 |
+- /* Return to preemptible kernel context */ |
2968 |
+- if (unlikely(*ti_flagsp & _TIF_NEED_RESCHED)) { |
2969 |
+- if (preempt_count() == 0) |
2970 |
+- preempt_schedule_irq(); |
2971 |
+- } |
2972 |
+- } |
2973 |
+- |
2974 |
+- if (unlikely(!prep_irq_for_enabled_exit(true))) { |
2975 |
+- /* |
2976 |
+- * Can't local_irq_restore to replay if we were in |
2977 |
+- * interrupt context. Must replay directly. |
2978 |
+- */ |
2979 |
+- if (irqs_disabled_flags(flags)) { |
2980 |
+- replay_soft_interrupts(); |
2981 |
+- } else { |
2982 |
+- local_irq_restore(flags); |
2983 |
+- local_irq_save(flags); |
2984 |
+- } |
2985 |
+- /* Took an interrupt, may have more exit work to do. */ |
2986 |
+- goto again; |
2987 |
+- } |
2988 |
+- } else { |
2989 |
+- /* Returning to a kernel context with local irqs disabled. */ |
2990 |
+- __hard_EE_RI_disable(); |
2991 |
+- if (regs->msr & MSR_EE) |
2992 |
+- local_paca->irq_happened &= ~PACA_IRQ_HARD_DIS; |
2993 |
+- } |
2994 |
+- |
2995 |
+- |
2996 |
+-#ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
2997 |
+- local_paca->tm_scratch = regs->msr; |
2998 |
+-#endif |
2999 |
+- |
3000 |
+- /* |
3001 |
+- * Don't want to mfspr(SPRN_AMR) here, because this comes after mtmsr, |
3002 |
+- * which would cause Read-After-Write stalls. Hence, we take the AMR |
3003 |
+- * value from the check above. |
3004 |
+- */ |
3005 |
+- kuap_kernel_restore(regs, amr); |
3006 |
+- |
3007 |
+- return ret; |
3008 |
+-} |
3009 |
+-#endif |
3010 |
+diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c |
3011 |
+index 6f612d240392f..138556cb559dd 100644 |
3012 |
+--- a/arch/powerpc/kvm/book3s_hv.c |
3013 |
++++ b/arch/powerpc/kvm/book3s_hv.c |
3014 |
+@@ -3709,7 +3709,10 @@ static int kvmhv_p9_guest_entry(struct kvm_vcpu *vcpu, u64 time_limit, |
3015 |
+ vcpu->arch.dec_expires = dec + tb; |
3016 |
+ vcpu->cpu = -1; |
3017 |
+ vcpu->arch.thread_cpu = -1; |
3018 |
++ /* Save guest CTRL register, set runlatch to 1 */ |
3019 |
+ vcpu->arch.ctrl = mfspr(SPRN_CTRLF); |
3020 |
++ if (!(vcpu->arch.ctrl & 1)) |
3021 |
++ mtspr(SPRN_CTRLT, vcpu->arch.ctrl | 1); |
3022 |
+ |
3023 |
+ vcpu->arch.iamr = mfspr(SPRN_IAMR); |
3024 |
+ vcpu->arch.pspb = mfspr(SPRN_PSPB); |
3025 |
+diff --git a/arch/powerpc/mm/book3s64/hash_pgtable.c b/arch/powerpc/mm/book3s64/hash_pgtable.c |
3026 |
+index 567e0c6b3978e..03819c259f0ab 100644 |
3027 |
+--- a/arch/powerpc/mm/book3s64/hash_pgtable.c |
3028 |
++++ b/arch/powerpc/mm/book3s64/hash_pgtable.c |
3029 |
+@@ -428,12 +428,14 @@ static bool hash__change_memory_range(unsigned long start, unsigned long end, |
3030 |
+ |
3031 |
+ void hash__mark_rodata_ro(void) |
3032 |
+ { |
3033 |
+- unsigned long start, end; |
3034 |
++ unsigned long start, end, pp; |
3035 |
+ |
3036 |
+ start = (unsigned long)_stext; |
3037 |
+ end = (unsigned long)__init_begin; |
3038 |
+ |
3039 |
+- WARN_ON(!hash__change_memory_range(start, end, PP_RXXX)); |
3040 |
++ pp = htab_convert_pte_flags(pgprot_val(PAGE_KERNEL_ROX), HPTE_USE_KERNEL_KEY); |
3041 |
++ |
3042 |
++ WARN_ON(!hash__change_memory_range(start, end, pp)); |
3043 |
+ } |
3044 |
+ |
3045 |
+ void hash__mark_initmem_nx(void) |
3046 |
+diff --git a/arch/powerpc/mm/book3s64/radix_pgtable.c b/arch/powerpc/mm/book3s64/radix_pgtable.c |
3047 |
+index 98f0b243c1ab2..39d488a212a04 100644 |
3048 |
+--- a/arch/powerpc/mm/book3s64/radix_pgtable.c |
3049 |
++++ b/arch/powerpc/mm/book3s64/radix_pgtable.c |
3050 |
+@@ -108,7 +108,7 @@ static int early_map_kernel_page(unsigned long ea, unsigned long pa, |
3051 |
+ |
3052 |
+ set_the_pte: |
3053 |
+ set_pte_at(&init_mm, ea, ptep, pfn_pte(pfn, flags)); |
3054 |
+- smp_wmb(); |
3055 |
++ asm volatile("ptesync": : :"memory"); |
3056 |
+ return 0; |
3057 |
+ } |
3058 |
+ |
3059 |
+@@ -168,7 +168,7 @@ static int __map_kernel_page(unsigned long ea, unsigned long pa, |
3060 |
+ |
3061 |
+ set_the_pte: |
3062 |
+ set_pte_at(&init_mm, ea, ptep, pfn_pte(pfn, flags)); |
3063 |
+- smp_wmb(); |
3064 |
++ asm volatile("ptesync": : :"memory"); |
3065 |
+ return 0; |
3066 |
+ } |
3067 |
+ |
3068 |
+diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c |
3069 |
+index afab328d08874..d6c3f0b79f1d1 100644 |
3070 |
+--- a/arch/powerpc/mm/mem.c |
3071 |
++++ b/arch/powerpc/mm/mem.c |
3072 |
+@@ -54,7 +54,6 @@ |
3073 |
+ |
3074 |
+ #include <mm/mmu_decl.h> |
3075 |
+ |
3076 |
+-static DEFINE_MUTEX(linear_mapping_mutex); |
3077 |
+ unsigned long long memory_limit; |
3078 |
+ bool init_mem_is_free; |
3079 |
+ |
3080 |
+@@ -72,6 +71,7 @@ pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, |
3081 |
+ EXPORT_SYMBOL(phys_mem_access_prot); |
3082 |
+ |
3083 |
+ #ifdef CONFIG_MEMORY_HOTPLUG |
3084 |
++static DEFINE_MUTEX(linear_mapping_mutex); |
3085 |
+ |
3086 |
+ #ifdef CONFIG_NUMA |
3087 |
+ int memory_add_physaddr_to_nid(u64 start) |
3088 |
+diff --git a/arch/powerpc/perf/isa207-common.c b/arch/powerpc/perf/isa207-common.c |
3089 |
+index 6ab5b272090a7..58448f0e47213 100644 |
3090 |
+--- a/arch/powerpc/perf/isa207-common.c |
3091 |
++++ b/arch/powerpc/perf/isa207-common.c |
3092 |
+@@ -400,8 +400,8 @@ ebb_bhrb: |
3093 |
+ * EBB events are pinned & exclusive, so this should never actually |
3094 |
+ * hit, but we leave it as a fallback in case. |
3095 |
+ */ |
3096 |
+- mask |= CNST_EBB_VAL(ebb); |
3097 |
+- value |= CNST_EBB_MASK; |
3098 |
++ mask |= CNST_EBB_MASK; |
3099 |
++ value |= CNST_EBB_VAL(ebb); |
3100 |
+ |
3101 |
+ *maskp = mask; |
3102 |
+ *valp = value; |
3103 |
+diff --git a/arch/powerpc/perf/power10-events-list.h b/arch/powerpc/perf/power10-events-list.h |
3104 |
+index e45dafe818ed4..93be7197d2502 100644 |
3105 |
+--- a/arch/powerpc/perf/power10-events-list.h |
3106 |
++++ b/arch/powerpc/perf/power10-events-list.h |
3107 |
+@@ -75,5 +75,5 @@ EVENT(PM_RUN_INST_CMPL_ALT, 0x00002); |
3108 |
+ * thresh end (TE) |
3109 |
+ */ |
3110 |
+ |
3111 |
+-EVENT(MEM_LOADS, 0x34340401e0); |
3112 |
+-EVENT(MEM_STORES, 0x343c0401e0); |
3113 |
++EVENT(MEM_LOADS, 0x35340401e0); |
3114 |
++EVENT(MEM_STORES, 0x353c0401e0); |
3115 |
+diff --git a/arch/powerpc/platforms/52xx/lite5200_sleep.S b/arch/powerpc/platforms/52xx/lite5200_sleep.S |
3116 |
+index 11475c58ea431..afee8b1515a8e 100644 |
3117 |
+--- a/arch/powerpc/platforms/52xx/lite5200_sleep.S |
3118 |
++++ b/arch/powerpc/platforms/52xx/lite5200_sleep.S |
3119 |
+@@ -181,7 +181,7 @@ sram_code: |
3120 |
+ udelay: /* r11 - tb_ticks_per_usec, r12 - usecs, overwrites r13 */ |
3121 |
+ mullw r12, r12, r11 |
3122 |
+ mftb r13 /* start */ |
3123 |
+- addi r12, r13, r12 /* end */ |
3124 |
++ add r12, r13, r12 /* end */ |
3125 |
+ 1: |
3126 |
+ mftb r13 /* current */ |
3127 |
+ cmp cr0, r13, r12 |
3128 |
+diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c |
3129 |
+index 9fc5217f0c8e5..836cbbe0ecc56 100644 |
3130 |
+--- a/arch/powerpc/platforms/pseries/iommu.c |
3131 |
++++ b/arch/powerpc/platforms/pseries/iommu.c |
3132 |
+@@ -1229,7 +1229,7 @@ static u64 enable_ddw(struct pci_dev *dev, struct device_node *pdn) |
3133 |
+ if (pmem_present) { |
3134 |
+ if (query.largest_available_block >= |
3135 |
+ (1ULL << (MAX_PHYSMEM_BITS - page_shift))) |
3136 |
+- len = MAX_PHYSMEM_BITS - page_shift; |
3137 |
++ len = MAX_PHYSMEM_BITS; |
3138 |
+ else |
3139 |
+ dev_info(&dev->dev, "Skipping ibm,pmemory"); |
3140 |
+ } |
3141 |
+diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c |
3142 |
+index 3805519a64697..cd38bd421f381 100644 |
3143 |
+--- a/arch/powerpc/platforms/pseries/lpar.c |
3144 |
++++ b/arch/powerpc/platforms/pseries/lpar.c |
3145 |
+@@ -977,11 +977,13 @@ static void pSeries_lpar_hpte_updateboltedpp(unsigned long newpp, |
3146 |
+ slot = pSeries_lpar_hpte_find(vpn, psize, ssize); |
3147 |
+ BUG_ON(slot == -1); |
3148 |
+ |
3149 |
+- flags = newpp & 7; |
3150 |
++ flags = newpp & (HPTE_R_PP | HPTE_R_N); |
3151 |
+ if (mmu_has_feature(MMU_FTR_KERNEL_RO)) |
3152 |
+ /* Move pp0 into bit 8 (IBM 55) */ |
3153 |
+ flags |= (newpp & HPTE_R_PP0) >> 55; |
3154 |
+ |
3155 |
++ flags |= ((newpp & HPTE_R_KEY_HI) >> 48) | (newpp & HPTE_R_KEY_LO); |
3156 |
++ |
3157 |
+ lpar_rc = plpar_pte_protect(flags, slot, 0); |
3158 |
+ |
3159 |
+ BUG_ON(lpar_rc != H_SUCCESS); |
3160 |
+diff --git a/arch/powerpc/platforms/pseries/pci_dlpar.c b/arch/powerpc/platforms/pseries/pci_dlpar.c |
3161 |
+index f9ae17e8a0f46..a8f9140a24fa3 100644 |
3162 |
+--- a/arch/powerpc/platforms/pseries/pci_dlpar.c |
3163 |
++++ b/arch/powerpc/platforms/pseries/pci_dlpar.c |
3164 |
+@@ -50,6 +50,7 @@ EXPORT_SYMBOL_GPL(init_phb_dynamic); |
3165 |
+ int remove_phb_dynamic(struct pci_controller *phb) |
3166 |
+ { |
3167 |
+ struct pci_bus *b = phb->bus; |
3168 |
++ struct pci_host_bridge *host_bridge = to_pci_host_bridge(b->bridge); |
3169 |
+ struct resource *res; |
3170 |
+ int rc, i; |
3171 |
+ |
3172 |
+@@ -76,7 +77,8 @@ int remove_phb_dynamic(struct pci_controller *phb) |
3173 |
+ /* Remove the PCI bus and unregister the bridge device from sysfs */ |
3174 |
+ phb->bus = NULL; |
3175 |
+ pci_remove_bus(b); |
3176 |
+- device_unregister(b->bridge); |
3177 |
++ host_bridge->bus = NULL; |
3178 |
++ device_unregister(&host_bridge->dev); |
3179 |
+ |
3180 |
+ /* Now release the IO resource */ |
3181 |
+ if (res->flags & IORESOURCE_IO) |
3182 |
+diff --git a/arch/powerpc/platforms/pseries/vio.c b/arch/powerpc/platforms/pseries/vio.c |
3183 |
+index b2797cfe4e2b0..68276e05502b9 100644 |
3184 |
+--- a/arch/powerpc/platforms/pseries/vio.c |
3185 |
++++ b/arch/powerpc/platforms/pseries/vio.c |
3186 |
+@@ -1286,6 +1286,10 @@ static int vio_bus_remove(struct device *dev) |
3187 |
+ int __vio_register_driver(struct vio_driver *viodrv, struct module *owner, |
3188 |
+ const char *mod_name) |
3189 |
+ { |
3190 |
++ // vio_bus_type is only initialised for pseries |
3191 |
++ if (!machine_is(pseries)) |
3192 |
++ return -ENODEV; |
3193 |
++ |
3194 |
+ pr_debug("%s: driver %s registering\n", __func__, viodrv->name); |
3195 |
+ |
3196 |
+ /* fill in 'struct driver' fields */ |
3197 |
+diff --git a/arch/powerpc/sysdev/xive/common.c b/arch/powerpc/sysdev/xive/common.c |
3198 |
+index 595310e056f4d..5cacb632eb37a 100644 |
3199 |
+--- a/arch/powerpc/sysdev/xive/common.c |
3200 |
++++ b/arch/powerpc/sysdev/xive/common.c |
3201 |
+@@ -253,17 +253,20 @@ notrace void xmon_xive_do_dump(int cpu) |
3202 |
+ xmon_printf("\n"); |
3203 |
+ } |
3204 |
+ |
3205 |
++static struct irq_data *xive_get_irq_data(u32 hw_irq) |
3206 |
++{ |
3207 |
++ unsigned int irq = irq_find_mapping(xive_irq_domain, hw_irq); |
3208 |
++ |
3209 |
++ return irq ? irq_get_irq_data(irq) : NULL; |
3210 |
++} |
3211 |
++ |
3212 |
+ int xmon_xive_get_irq_config(u32 hw_irq, struct irq_data *d) |
3213 |
+ { |
3214 |
+- struct irq_chip *chip = irq_data_get_irq_chip(d); |
3215 |
+ int rc; |
3216 |
+ u32 target; |
3217 |
+ u8 prio; |
3218 |
+ u32 lirq; |
3219 |
+ |
3220 |
+- if (!is_xive_irq(chip)) |
3221 |
+- return -EINVAL; |
3222 |
+- |
3223 |
+ rc = xive_ops->get_irq_config(hw_irq, &target, &prio, &lirq); |
3224 |
+ if (rc) { |
3225 |
+ xmon_printf("IRQ 0x%08x : no config rc=%d\n", hw_irq, rc); |
3226 |
+@@ -273,6 +276,9 @@ int xmon_xive_get_irq_config(u32 hw_irq, struct irq_data *d) |
3227 |
+ xmon_printf("IRQ 0x%08x : target=0x%x prio=%02x lirq=0x%x ", |
3228 |
+ hw_irq, target, prio, lirq); |
3229 |
+ |
3230 |
++ if (!d) |
3231 |
++ d = xive_get_irq_data(hw_irq); |
3232 |
++ |
3233 |
+ if (d) { |
3234 |
+ struct xive_irq_data *xd = irq_data_get_irq_handler_data(d); |
3235 |
+ u64 val = xive_esb_read(xd, XIVE_ESB_GET); |
3236 |
+@@ -1599,6 +1605,8 @@ static void xive_debug_show_irq(struct seq_file *m, u32 hw_irq, struct irq_data |
3237 |
+ u32 target; |
3238 |
+ u8 prio; |
3239 |
+ u32 lirq; |
3240 |
++ struct xive_irq_data *xd; |
3241 |
++ u64 val; |
3242 |
+ |
3243 |
+ if (!is_xive_irq(chip)) |
3244 |
+ return; |
3245 |
+@@ -1612,17 +1620,14 @@ static void xive_debug_show_irq(struct seq_file *m, u32 hw_irq, struct irq_data |
3246 |
+ seq_printf(m, "IRQ 0x%08x : target=0x%x prio=%02x lirq=0x%x ", |
3247 |
+ hw_irq, target, prio, lirq); |
3248 |
+ |
3249 |
+- if (d) { |
3250 |
+- struct xive_irq_data *xd = irq_data_get_irq_handler_data(d); |
3251 |
+- u64 val = xive_esb_read(xd, XIVE_ESB_GET); |
3252 |
+- |
3253 |
+- seq_printf(m, "flags=%c%c%c PQ=%c%c", |
3254 |
+- xd->flags & XIVE_IRQ_FLAG_STORE_EOI ? 'S' : ' ', |
3255 |
+- xd->flags & XIVE_IRQ_FLAG_LSI ? 'L' : ' ', |
3256 |
+- xd->flags & XIVE_IRQ_FLAG_H_INT_ESB ? 'H' : ' ', |
3257 |
+- val & XIVE_ESB_VAL_P ? 'P' : '-', |
3258 |
+- val & XIVE_ESB_VAL_Q ? 'Q' : '-'); |
3259 |
+- } |
3260 |
++ xd = irq_data_get_irq_handler_data(d); |
3261 |
++ val = xive_esb_read(xd, XIVE_ESB_GET); |
3262 |
++ seq_printf(m, "flags=%c%c%c PQ=%c%c", |
3263 |
++ xd->flags & XIVE_IRQ_FLAG_STORE_EOI ? 'S' : ' ', |
3264 |
++ xd->flags & XIVE_IRQ_FLAG_LSI ? 'L' : ' ', |
3265 |
++ xd->flags & XIVE_IRQ_FLAG_H_INT_ESB ? 'H' : ' ', |
3266 |
++ val & XIVE_ESB_VAL_P ? 'P' : '-', |
3267 |
++ val & XIVE_ESB_VAL_Q ? 'Q' : '-'); |
3268 |
+ seq_puts(m, "\n"); |
3269 |
+ } |
3270 |
+ |
3271 |
+diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c |
3272 |
+index 1fbed91c73bc7..69e96501e0e8d 100644 |
3273 |
+--- a/arch/s390/kernel/setup.c |
3274 |
++++ b/arch/s390/kernel/setup.c |
3275 |
+@@ -924,9 +924,9 @@ static int __init setup_hwcaps(void) |
3276 |
+ if (MACHINE_HAS_VX) { |
3277 |
+ elf_hwcap |= HWCAP_S390_VXRS; |
3278 |
+ if (test_facility(134)) |
3279 |
+- elf_hwcap |= HWCAP_S390_VXRS_EXT; |
3280 |
+- if (test_facility(135)) |
3281 |
+ elf_hwcap |= HWCAP_S390_VXRS_BCD; |
3282 |
++ if (test_facility(135)) |
3283 |
++ elf_hwcap |= HWCAP_S390_VXRS_EXT; |
3284 |
+ if (test_facility(148)) |
3285 |
+ elf_hwcap |= HWCAP_S390_VXRS_EXT2; |
3286 |
+ if (test_facility(152)) |
3287 |
+diff --git a/arch/s390/kvm/gaccess.c b/arch/s390/kvm/gaccess.c |
3288 |
+index 6d6b57059493e..b9f85b2dc053f 100644 |
3289 |
+--- a/arch/s390/kvm/gaccess.c |
3290 |
++++ b/arch/s390/kvm/gaccess.c |
3291 |
+@@ -976,7 +976,9 @@ int kvm_s390_check_low_addr_prot_real(struct kvm_vcpu *vcpu, unsigned long gra) |
3292 |
+ * kvm_s390_shadow_tables - walk the guest page table and create shadow tables |
3293 |
+ * @sg: pointer to the shadow guest address space structure |
3294 |
+ * @saddr: faulting address in the shadow gmap |
3295 |
+- * @pgt: pointer to the page table address result |
3296 |
++ * @pgt: pointer to the beginning of the page table for the given address if |
3297 |
++ * successful (return value 0), or to the first invalid DAT entry in |
3298 |
++ * case of exceptions (return value > 0) |
3299 |
+ * @fake: pgt references contiguous guest memory block, not a pgtable |
3300 |
+ */ |
3301 |
+ static int kvm_s390_shadow_tables(struct gmap *sg, unsigned long saddr, |
3302 |
+@@ -1034,6 +1036,7 @@ static int kvm_s390_shadow_tables(struct gmap *sg, unsigned long saddr, |
3303 |
+ rfte.val = ptr; |
3304 |
+ goto shadow_r2t; |
3305 |
+ } |
3306 |
++ *pgt = ptr + vaddr.rfx * 8; |
3307 |
+ rc = gmap_read_table(parent, ptr + vaddr.rfx * 8, &rfte.val); |
3308 |
+ if (rc) |
3309 |
+ return rc; |
3310 |
+@@ -1060,6 +1063,7 @@ shadow_r2t: |
3311 |
+ rste.val = ptr; |
3312 |
+ goto shadow_r3t; |
3313 |
+ } |
3314 |
++ *pgt = ptr + vaddr.rsx * 8; |
3315 |
+ rc = gmap_read_table(parent, ptr + vaddr.rsx * 8, &rste.val); |
3316 |
+ if (rc) |
3317 |
+ return rc; |
3318 |
+@@ -1087,6 +1091,7 @@ shadow_r3t: |
3319 |
+ rtte.val = ptr; |
3320 |
+ goto shadow_sgt; |
3321 |
+ } |
3322 |
++ *pgt = ptr + vaddr.rtx * 8; |
3323 |
+ rc = gmap_read_table(parent, ptr + vaddr.rtx * 8, &rtte.val); |
3324 |
+ if (rc) |
3325 |
+ return rc; |
3326 |
+@@ -1123,6 +1128,7 @@ shadow_sgt: |
3327 |
+ ste.val = ptr; |
3328 |
+ goto shadow_pgt; |
3329 |
+ } |
3330 |
++ *pgt = ptr + vaddr.sx * 8; |
3331 |
+ rc = gmap_read_table(parent, ptr + vaddr.sx * 8, &ste.val); |
3332 |
+ if (rc) |
3333 |
+ return rc; |
3334 |
+@@ -1157,6 +1163,8 @@ shadow_pgt: |
3335 |
+ * @vcpu: virtual cpu |
3336 |
+ * @sg: pointer to the shadow guest address space structure |
3337 |
+ * @saddr: faulting address in the shadow gmap |
3338 |
++ * @datptr: will contain the address of the faulting DAT table entry, or of |
3339 |
++ * the valid leaf, plus some flags |
3340 |
+ * |
3341 |
+ * Returns: - 0 if the shadow fault was successfully resolved |
3342 |
+ * - > 0 (pgm exception code) on exceptions while faulting |
3343 |
+@@ -1165,11 +1173,11 @@ shadow_pgt: |
3344 |
+ * - -ENOMEM if out of memory |
3345 |
+ */ |
3346 |
+ int kvm_s390_shadow_fault(struct kvm_vcpu *vcpu, struct gmap *sg, |
3347 |
+- unsigned long saddr) |
3348 |
++ unsigned long saddr, unsigned long *datptr) |
3349 |
+ { |
3350 |
+ union vaddress vaddr; |
3351 |
+ union page_table_entry pte; |
3352 |
+- unsigned long pgt; |
3353 |
++ unsigned long pgt = 0; |
3354 |
+ int dat_protection, fake; |
3355 |
+ int rc; |
3356 |
+ |
3357 |
+@@ -1191,8 +1199,20 @@ int kvm_s390_shadow_fault(struct kvm_vcpu *vcpu, struct gmap *sg, |
3358 |
+ pte.val = pgt + vaddr.px * PAGE_SIZE; |
3359 |
+ goto shadow_page; |
3360 |
+ } |
3361 |
+- if (!rc) |
3362 |
+- rc = gmap_read_table(sg->parent, pgt + vaddr.px * 8, &pte.val); |
3363 |
++ |
3364 |
++ switch (rc) { |
3365 |
++ case PGM_SEGMENT_TRANSLATION: |
3366 |
++ case PGM_REGION_THIRD_TRANS: |
3367 |
++ case PGM_REGION_SECOND_TRANS: |
3368 |
++ case PGM_REGION_FIRST_TRANS: |
3369 |
++ pgt |= PEI_NOT_PTE; |
3370 |
++ break; |
3371 |
++ case 0: |
3372 |
++ pgt += vaddr.px * 8; |
3373 |
++ rc = gmap_read_table(sg->parent, pgt, &pte.val); |
3374 |
++ } |
3375 |
++ if (datptr) |
3376 |
++ *datptr = pgt | dat_protection * PEI_DAT_PROT; |
3377 |
+ if (!rc && pte.i) |
3378 |
+ rc = PGM_PAGE_TRANSLATION; |
3379 |
+ if (!rc && pte.z) |
3380 |
+diff --git a/arch/s390/kvm/gaccess.h b/arch/s390/kvm/gaccess.h |
3381 |
+index f4c51756c4623..7c72a5e3449f8 100644 |
3382 |
+--- a/arch/s390/kvm/gaccess.h |
3383 |
++++ b/arch/s390/kvm/gaccess.h |
3384 |
+@@ -18,17 +18,14 @@ |
3385 |
+ |
3386 |
+ /** |
3387 |
+ * kvm_s390_real_to_abs - convert guest real address to guest absolute address |
3388 |
+- * @vcpu - guest virtual cpu |
3389 |
++ * @prefix - guest prefix |
3390 |
+ * @gra - guest real address |
3391 |
+ * |
3392 |
+ * Returns the guest absolute address that corresponds to the passed guest real |
3393 |
+- * address @gra of a virtual guest cpu by applying its prefix. |
3394 |
++ * address @gra of by applying the given prefix. |
3395 |
+ */ |
3396 |
+-static inline unsigned long kvm_s390_real_to_abs(struct kvm_vcpu *vcpu, |
3397 |
+- unsigned long gra) |
3398 |
++static inline unsigned long _kvm_s390_real_to_abs(u32 prefix, unsigned long gra) |
3399 |
+ { |
3400 |
+- unsigned long prefix = kvm_s390_get_prefix(vcpu); |
3401 |
+- |
3402 |
+ if (gra < 2 * PAGE_SIZE) |
3403 |
+ gra += prefix; |
3404 |
+ else if (gra >= prefix && gra < prefix + 2 * PAGE_SIZE) |
3405 |
+@@ -36,6 +33,43 @@ static inline unsigned long kvm_s390_real_to_abs(struct kvm_vcpu *vcpu, |
3406 |
+ return gra; |
3407 |
+ } |
3408 |
+ |
3409 |
++/** |
3410 |
++ * kvm_s390_real_to_abs - convert guest real address to guest absolute address |
3411 |
++ * @vcpu - guest virtual cpu |
3412 |
++ * @gra - guest real address |
3413 |
++ * |
3414 |
++ * Returns the guest absolute address that corresponds to the passed guest real |
3415 |
++ * address @gra of a virtual guest cpu by applying its prefix. |
3416 |
++ */ |
3417 |
++static inline unsigned long kvm_s390_real_to_abs(struct kvm_vcpu *vcpu, |
3418 |
++ unsigned long gra) |
3419 |
++{ |
3420 |
++ return _kvm_s390_real_to_abs(kvm_s390_get_prefix(vcpu), gra); |
3421 |
++} |
3422 |
++ |
3423 |
++/** |
3424 |
++ * _kvm_s390_logical_to_effective - convert guest logical to effective address |
3425 |
++ * @psw: psw of the guest |
3426 |
++ * @ga: guest logical address |
3427 |
++ * |
3428 |
++ * Convert a guest logical address to an effective address by applying the |
3429 |
++ * rules of the addressing mode defined by bits 31 and 32 of the given PSW |
3430 |
++ * (extendended/basic addressing mode). |
3431 |
++ * |
3432 |
++ * Depending on the addressing mode, the upper 40 bits (24 bit addressing |
3433 |
++ * mode), 33 bits (31 bit addressing mode) or no bits (64 bit addressing |
3434 |
++ * mode) of @ga will be zeroed and the remaining bits will be returned. |
3435 |
++ */ |
3436 |
++static inline unsigned long _kvm_s390_logical_to_effective(psw_t *psw, |
3437 |
++ unsigned long ga) |
3438 |
++{ |
3439 |
++ if (psw_bits(*psw).eaba == PSW_BITS_AMODE_64BIT) |
3440 |
++ return ga; |
3441 |
++ if (psw_bits(*psw).eaba == PSW_BITS_AMODE_31BIT) |
3442 |
++ return ga & ((1UL << 31) - 1); |
3443 |
++ return ga & ((1UL << 24) - 1); |
3444 |
++} |
3445 |
++ |
3446 |
+ /** |
3447 |
+ * kvm_s390_logical_to_effective - convert guest logical to effective address |
3448 |
+ * @vcpu: guest virtual cpu |
3449 |
+@@ -52,13 +86,7 @@ static inline unsigned long kvm_s390_real_to_abs(struct kvm_vcpu *vcpu, |
3450 |
+ static inline unsigned long kvm_s390_logical_to_effective(struct kvm_vcpu *vcpu, |
3451 |
+ unsigned long ga) |
3452 |
+ { |
3453 |
+- psw_t *psw = &vcpu->arch.sie_block->gpsw; |
3454 |
+- |
3455 |
+- if (psw_bits(*psw).eaba == PSW_BITS_AMODE_64BIT) |
3456 |
+- return ga; |
3457 |
+- if (psw_bits(*psw).eaba == PSW_BITS_AMODE_31BIT) |
3458 |
+- return ga & ((1UL << 31) - 1); |
3459 |
+- return ga & ((1UL << 24) - 1); |
3460 |
++ return _kvm_s390_logical_to_effective(&vcpu->arch.sie_block->gpsw, ga); |
3461 |
+ } |
3462 |
+ |
3463 |
+ /* |
3464 |
+@@ -359,7 +387,11 @@ void ipte_unlock(struct kvm_vcpu *vcpu); |
3465 |
+ int ipte_lock_held(struct kvm_vcpu *vcpu); |
3466 |
+ int kvm_s390_check_low_addr_prot_real(struct kvm_vcpu *vcpu, unsigned long gra); |
3467 |
+ |
3468 |
++/* MVPG PEI indication bits */ |
3469 |
++#define PEI_DAT_PROT 2 |
3470 |
++#define PEI_NOT_PTE 4 |
3471 |
++ |
3472 |
+ int kvm_s390_shadow_fault(struct kvm_vcpu *vcpu, struct gmap *shadow, |
3473 |
+- unsigned long saddr); |
3474 |
++ unsigned long saddr, unsigned long *datptr); |
3475 |
+ |
3476 |
+ #endif /* __KVM_S390_GACCESS_H */ |
3477 |
+diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c |
3478 |
+index dbafd057ca6a7..25b3d14c775cc 100644 |
3479 |
+--- a/arch/s390/kvm/kvm-s390.c |
3480 |
++++ b/arch/s390/kvm/kvm-s390.c |
3481 |
+@@ -4310,16 +4310,16 @@ static void store_regs_fmt2(struct kvm_vcpu *vcpu) |
3482 |
+ kvm_run->s.regs.bpbc = (vcpu->arch.sie_block->fpf & FPF_BPBC) == FPF_BPBC; |
3483 |
+ kvm_run->s.regs.diag318 = vcpu->arch.diag318_info.val; |
3484 |
+ if (MACHINE_HAS_GS) { |
3485 |
++ preempt_disable(); |
3486 |
+ __ctl_set_bit(2, 4); |
3487 |
+ if (vcpu->arch.gs_enabled) |
3488 |
+ save_gs_cb(current->thread.gs_cb); |
3489 |
+- preempt_disable(); |
3490 |
+ current->thread.gs_cb = vcpu->arch.host_gscb; |
3491 |
+ restore_gs_cb(vcpu->arch.host_gscb); |
3492 |
+- preempt_enable(); |
3493 |
+ if (!vcpu->arch.host_gscb) |
3494 |
+ __ctl_clear_bit(2, 4); |
3495 |
+ vcpu->arch.host_gscb = NULL; |
3496 |
++ preempt_enable(); |
3497 |
+ } |
3498 |
+ /* SIE will save etoken directly into SDNX and therefore kvm_run */ |
3499 |
+ } |
3500 |
+diff --git a/arch/s390/kvm/vsie.c b/arch/s390/kvm/vsie.c |
3501 |
+index c5d0a58b2c29c..2fa65d9d8cb2f 100644 |
3502 |
+--- a/arch/s390/kvm/vsie.c |
3503 |
++++ b/arch/s390/kvm/vsie.c |
3504 |
+@@ -416,11 +416,6 @@ static void unshadow_scb(struct kvm_vcpu *vcpu, struct vsie_page *vsie_page) |
3505 |
+ memcpy((void *)((u64)scb_o + 0xc0), |
3506 |
+ (void *)((u64)scb_s + 0xc0), 0xf0 - 0xc0); |
3507 |
+ break; |
3508 |
+- case ICPT_PARTEXEC: |
3509 |
+- /* MVPG only */ |
3510 |
+- memcpy((void *)((u64)scb_o + 0xc0), |
3511 |
+- (void *)((u64)scb_s + 0xc0), 0xd0 - 0xc0); |
3512 |
+- break; |
3513 |
+ } |
3514 |
+ |
3515 |
+ if (scb_s->ihcpu != 0xffffU) |
3516 |
+@@ -619,10 +614,10 @@ static int map_prefix(struct kvm_vcpu *vcpu, struct vsie_page *vsie_page) |
3517 |
+ /* with mso/msl, the prefix lies at offset *mso* */ |
3518 |
+ prefix += scb_s->mso; |
3519 |
+ |
3520 |
+- rc = kvm_s390_shadow_fault(vcpu, vsie_page->gmap, prefix); |
3521 |
++ rc = kvm_s390_shadow_fault(vcpu, vsie_page->gmap, prefix, NULL); |
3522 |
+ if (!rc && (scb_s->ecb & ECB_TE)) |
3523 |
+ rc = kvm_s390_shadow_fault(vcpu, vsie_page->gmap, |
3524 |
+- prefix + PAGE_SIZE); |
3525 |
++ prefix + PAGE_SIZE, NULL); |
3526 |
+ /* |
3527 |
+ * We don't have to mprotect, we will be called for all unshadows. |
3528 |
+ * SIE will detect if protection applies and trigger a validity. |
3529 |
+@@ -913,7 +908,7 @@ static int handle_fault(struct kvm_vcpu *vcpu, struct vsie_page *vsie_page) |
3530 |
+ current->thread.gmap_addr, 1); |
3531 |
+ |
3532 |
+ rc = kvm_s390_shadow_fault(vcpu, vsie_page->gmap, |
3533 |
+- current->thread.gmap_addr); |
3534 |
++ current->thread.gmap_addr, NULL); |
3535 |
+ if (rc > 0) { |
3536 |
+ rc = inject_fault(vcpu, rc, |
3537 |
+ current->thread.gmap_addr, |
3538 |
+@@ -935,7 +930,7 @@ static void handle_last_fault(struct kvm_vcpu *vcpu, |
3539 |
+ { |
3540 |
+ if (vsie_page->fault_addr) |
3541 |
+ kvm_s390_shadow_fault(vcpu, vsie_page->gmap, |
3542 |
+- vsie_page->fault_addr); |
3543 |
++ vsie_page->fault_addr, NULL); |
3544 |
+ vsie_page->fault_addr = 0; |
3545 |
+ } |
3546 |
+ |
3547 |
+@@ -982,6 +977,98 @@ static int handle_stfle(struct kvm_vcpu *vcpu, struct vsie_page *vsie_page) |
3548 |
+ return 0; |
3549 |
+ } |
3550 |
+ |
3551 |
++/* |
3552 |
++ * Get a register for a nested guest. |
3553 |
++ * @vcpu the vcpu of the guest |
3554 |
++ * @vsie_page the vsie_page for the nested guest |
3555 |
++ * @reg the register number, the upper 4 bits are ignored. |
3556 |
++ * returns: the value of the register. |
3557 |
++ */ |
3558 |
++static u64 vsie_get_register(struct kvm_vcpu *vcpu, struct vsie_page *vsie_page, u8 reg) |
3559 |
++{ |
3560 |
++ /* no need to validate the parameter and/or perform error handling */ |
3561 |
++ reg &= 0xf; |
3562 |
++ switch (reg) { |
3563 |
++ case 15: |
3564 |
++ return vsie_page->scb_s.gg15; |
3565 |
++ case 14: |
3566 |
++ return vsie_page->scb_s.gg14; |
3567 |
++ default: |
3568 |
++ return vcpu->run->s.regs.gprs[reg]; |
3569 |
++ } |
3570 |
++} |
3571 |
++ |
3572 |
++static int vsie_handle_mvpg(struct kvm_vcpu *vcpu, struct vsie_page *vsie_page) |
3573 |
++{ |
3574 |
++ struct kvm_s390_sie_block *scb_s = &vsie_page->scb_s; |
3575 |
++ unsigned long pei_dest, pei_src, src, dest, mask, prefix; |
3576 |
++ u64 *pei_block = &vsie_page->scb_o->mcic; |
3577 |
++ int edat, rc_dest, rc_src; |
3578 |
++ union ctlreg0 cr0; |
3579 |
++ |
3580 |
++ cr0.val = vcpu->arch.sie_block->gcr[0]; |
3581 |
++ edat = cr0.edat && test_kvm_facility(vcpu->kvm, 8); |
3582 |
++ mask = _kvm_s390_logical_to_effective(&scb_s->gpsw, PAGE_MASK); |
3583 |
++ prefix = scb_s->prefix << GUEST_PREFIX_SHIFT; |
3584 |
++ |
3585 |
++ dest = vsie_get_register(vcpu, vsie_page, scb_s->ipb >> 20) & mask; |
3586 |
++ dest = _kvm_s390_real_to_abs(prefix, dest) + scb_s->mso; |
3587 |
++ src = vsie_get_register(vcpu, vsie_page, scb_s->ipb >> 16) & mask; |
3588 |
++ src = _kvm_s390_real_to_abs(prefix, src) + scb_s->mso; |
3589 |
++ |
3590 |
++ rc_dest = kvm_s390_shadow_fault(vcpu, vsie_page->gmap, dest, &pei_dest); |
3591 |
++ rc_src = kvm_s390_shadow_fault(vcpu, vsie_page->gmap, src, &pei_src); |
3592 |
++ /* |
3593 |
++ * Either everything went well, or something non-critical went wrong |
3594 |
++ * e.g. because of a race. In either case, simply retry. |
3595 |
++ */ |
3596 |
++ if (rc_dest == -EAGAIN || rc_src == -EAGAIN || (!rc_dest && !rc_src)) { |
3597 |
++ retry_vsie_icpt(vsie_page); |
3598 |
++ return -EAGAIN; |
3599 |
++ } |
3600 |
++ /* Something more serious went wrong, propagate the error */ |
3601 |
++ if (rc_dest < 0) |
3602 |
++ return rc_dest; |
3603 |
++ if (rc_src < 0) |
3604 |
++ return rc_src; |
3605 |
++ |
3606 |
++ /* The only possible suppressing exception: just deliver it */ |
3607 |
++ if (rc_dest == PGM_TRANSLATION_SPEC || rc_src == PGM_TRANSLATION_SPEC) { |
3608 |
++ clear_vsie_icpt(vsie_page); |
3609 |
++ rc_dest = kvm_s390_inject_program_int(vcpu, PGM_TRANSLATION_SPEC); |
3610 |
++ WARN_ON_ONCE(rc_dest); |
3611 |
++ return 1; |
3612 |
++ } |
3613 |
++ |
3614 |
++ /* |
3615 |
++ * Forward the PEI intercept to the guest if it was a page fault, or |
3616 |
++ * also for segment and region table faults if EDAT applies. |
3617 |
++ */ |
3618 |
++ if (edat) { |
3619 |
++ rc_dest = rc_dest == PGM_ASCE_TYPE ? rc_dest : 0; |
3620 |
++ rc_src = rc_src == PGM_ASCE_TYPE ? rc_src : 0; |
3621 |
++ } else { |
3622 |
++ rc_dest = rc_dest != PGM_PAGE_TRANSLATION ? rc_dest : 0; |
3623 |
++ rc_src = rc_src != PGM_PAGE_TRANSLATION ? rc_src : 0; |
3624 |
++ } |
3625 |
++ if (!rc_dest && !rc_src) { |
3626 |
++ pei_block[0] = pei_dest; |
3627 |
++ pei_block[1] = pei_src; |
3628 |
++ return 1; |
3629 |
++ } |
3630 |
++ |
3631 |
++ retry_vsie_icpt(vsie_page); |
3632 |
++ |
3633 |
++ /* |
3634 |
++ * The host has edat, and the guest does not, or it was an ASCE type |
3635 |
++ * exception. The host needs to inject the appropriate DAT interrupts |
3636 |
++ * into the guest. |
3637 |
++ */ |
3638 |
++ if (rc_dest) |
3639 |
++ return inject_fault(vcpu, rc_dest, dest, 1); |
3640 |
++ return inject_fault(vcpu, rc_src, src, 0); |
3641 |
++} |
3642 |
++ |
3643 |
+ /* |
3644 |
+ * Run the vsie on a shadow scb and a shadow gmap, without any further |
3645 |
+ * sanity checks, handling SIE faults. |
3646 |
+@@ -1068,6 +1155,10 @@ static int do_vsie_run(struct kvm_vcpu *vcpu, struct vsie_page *vsie_page) |
3647 |
+ if ((scb_s->ipa & 0xf000) != 0xf000) |
3648 |
+ scb_s->ipa += 0x1000; |
3649 |
+ break; |
3650 |
++ case ICPT_PARTEXEC: |
3651 |
++ if (scb_s->ipa == 0xb254) |
3652 |
++ rc = vsie_handle_mvpg(vcpu, vsie_page); |
3653 |
++ break; |
3654 |
+ } |
3655 |
+ return rc; |
3656 |
+ } |
3657 |
+diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig |
3658 |
+index 95aefc3752008..4960c6e1b0826 100644 |
3659 |
+--- a/arch/x86/Kconfig |
3660 |
++++ b/arch/x86/Kconfig |
3661 |
+@@ -564,6 +564,7 @@ config X86_UV |
3662 |
+ depends on X86_EXTENDED_PLATFORM |
3663 |
+ depends on NUMA |
3664 |
+ depends on EFI |
3665 |
++ depends on KEXEC_CORE |
3666 |
+ depends on X86_X2APIC |
3667 |
+ depends on PCI |
3668 |
+ help |
3669 |
+diff --git a/arch/x86/crypto/poly1305_glue.c b/arch/x86/crypto/poly1305_glue.c |
3670 |
+index 646da46e8d104..1dfb8af48a3ca 100644 |
3671 |
+--- a/arch/x86/crypto/poly1305_glue.c |
3672 |
++++ b/arch/x86/crypto/poly1305_glue.c |
3673 |
+@@ -16,7 +16,7 @@ |
3674 |
+ #include <asm/simd.h> |
3675 |
+ |
3676 |
+ asmlinkage void poly1305_init_x86_64(void *ctx, |
3677 |
+- const u8 key[POLY1305_KEY_SIZE]); |
3678 |
++ const u8 key[POLY1305_BLOCK_SIZE]); |
3679 |
+ asmlinkage void poly1305_blocks_x86_64(void *ctx, const u8 *inp, |
3680 |
+ const size_t len, const u32 padbit); |
3681 |
+ asmlinkage void poly1305_emit_x86_64(void *ctx, u8 mac[POLY1305_DIGEST_SIZE], |
3682 |
+@@ -81,7 +81,7 @@ static void convert_to_base2_64(void *ctx) |
3683 |
+ state->is_base2_26 = 0; |
3684 |
+ } |
3685 |
+ |
3686 |
+-static void poly1305_simd_init(void *ctx, const u8 key[POLY1305_KEY_SIZE]) |
3687 |
++static void poly1305_simd_init(void *ctx, const u8 key[POLY1305_BLOCK_SIZE]) |
3688 |
+ { |
3689 |
+ poly1305_init_x86_64(ctx, key); |
3690 |
+ } |
3691 |
+@@ -129,7 +129,7 @@ static void poly1305_simd_emit(void *ctx, u8 mac[POLY1305_DIGEST_SIZE], |
3692 |
+ poly1305_emit_avx(ctx, mac, nonce); |
3693 |
+ } |
3694 |
+ |
3695 |
+-void poly1305_init_arch(struct poly1305_desc_ctx *dctx, const u8 *key) |
3696 |
++void poly1305_init_arch(struct poly1305_desc_ctx *dctx, const u8 key[POLY1305_KEY_SIZE]) |
3697 |
+ { |
3698 |
+ poly1305_simd_init(&dctx->h, key); |
3699 |
+ dctx->s[0] = get_unaligned_le32(&key[16]); |
3700 |
+diff --git a/arch/x86/entry/vdso/vdso2c.h b/arch/x86/entry/vdso/vdso2c.h |
3701 |
+index 1c7cfac7e64ac..5264daa8859f5 100644 |
3702 |
+--- a/arch/x86/entry/vdso/vdso2c.h |
3703 |
++++ b/arch/x86/entry/vdso/vdso2c.h |
3704 |
+@@ -35,7 +35,7 @@ static void BITSFUNC(extract)(const unsigned char *data, size_t data_len, |
3705 |
+ if (offset + len > data_len) |
3706 |
+ fail("section to extract overruns input data"); |
3707 |
+ |
3708 |
+- fprintf(outfile, "static const unsigned char %s[%lu] = {", name, len); |
3709 |
++ fprintf(outfile, "static const unsigned char %s[%zu] = {", name, len); |
3710 |
+ BITSFUNC(copy)(outfile, data + offset, len); |
3711 |
+ fprintf(outfile, "\n};\n\n"); |
3712 |
+ } |
3713 |
+diff --git a/arch/x86/events/amd/iommu.c b/arch/x86/events/amd/iommu.c |
3714 |
+index be50ef8572cce..6a98a76516214 100644 |
3715 |
+--- a/arch/x86/events/amd/iommu.c |
3716 |
++++ b/arch/x86/events/amd/iommu.c |
3717 |
+@@ -81,12 +81,12 @@ static struct attribute_group amd_iommu_events_group = { |
3718 |
+ }; |
3719 |
+ |
3720 |
+ struct amd_iommu_event_desc { |
3721 |
+- struct kobj_attribute attr; |
3722 |
++ struct device_attribute attr; |
3723 |
+ const char *event; |
3724 |
+ }; |
3725 |
+ |
3726 |
+-static ssize_t _iommu_event_show(struct kobject *kobj, |
3727 |
+- struct kobj_attribute *attr, char *buf) |
3728 |
++static ssize_t _iommu_event_show(struct device *dev, |
3729 |
++ struct device_attribute *attr, char *buf) |
3730 |
+ { |
3731 |
+ struct amd_iommu_event_desc *event = |
3732 |
+ container_of(attr, struct amd_iommu_event_desc, attr); |
3733 |
+diff --git a/arch/x86/events/amd/uncore.c b/arch/x86/events/amd/uncore.c |
3734 |
+index 7f014d450bc28..582c0ffb5e983 100644 |
3735 |
+--- a/arch/x86/events/amd/uncore.c |
3736 |
++++ b/arch/x86/events/amd/uncore.c |
3737 |
+@@ -275,14 +275,14 @@ static struct attribute_group amd_uncore_attr_group = { |
3738 |
+ }; |
3739 |
+ |
3740 |
+ #define DEFINE_UNCORE_FORMAT_ATTR(_var, _name, _format) \ |
3741 |
+-static ssize_t __uncore_##_var##_show(struct kobject *kobj, \ |
3742 |
+- struct kobj_attribute *attr, \ |
3743 |
++static ssize_t __uncore_##_var##_show(struct device *dev, \ |
3744 |
++ struct device_attribute *attr, \ |
3745 |
+ char *page) \ |
3746 |
+ { \ |
3747 |
+ BUILD_BUG_ON(sizeof(_format) >= PAGE_SIZE); \ |
3748 |
+ return sprintf(page, _format "\n"); \ |
3749 |
+ } \ |
3750 |
+-static struct kobj_attribute format_attr_##_var = \ |
3751 |
++static struct device_attribute format_attr_##_var = \ |
3752 |
+ __ATTR(_name, 0444, __uncore_##_var##_show, NULL) |
3753 |
+ |
3754 |
+ DEFINE_UNCORE_FORMAT_ATTR(event12, event, "config:0-7,32-35"); |
3755 |
+diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c |
3756 |
+index 52bc217ca8c32..c9ddd233e32ff 100644 |
3757 |
+--- a/arch/x86/kernel/apic/x2apic_uv_x.c |
3758 |
++++ b/arch/x86/kernel/apic/x2apic_uv_x.c |
3759 |
+@@ -1671,6 +1671,9 @@ static __init int uv_system_init_hubless(void) |
3760 |
+ if (rc < 0) |
3761 |
+ return rc; |
3762 |
+ |
3763 |
++ /* Set section block size for current node memory */ |
3764 |
++ set_block_size(); |
3765 |
++ |
3766 |
+ /* Create user access node */ |
3767 |
+ if (rc >= 0) |
3768 |
+ uv_setup_proc_files(1); |
3769 |
+diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/microcode/core.c |
3770 |
+index ec6f0415bc6d1..bbbd248fe9132 100644 |
3771 |
+--- a/arch/x86/kernel/cpu/microcode/core.c |
3772 |
++++ b/arch/x86/kernel/cpu/microcode/core.c |
3773 |
+@@ -629,16 +629,16 @@ static ssize_t reload_store(struct device *dev, |
3774 |
+ if (val != 1) |
3775 |
+ return size; |
3776 |
+ |
3777 |
+- tmp_ret = microcode_ops->request_microcode_fw(bsp, µcode_pdev->dev, true); |
3778 |
+- if (tmp_ret != UCODE_NEW) |
3779 |
+- return size; |
3780 |
+- |
3781 |
+ get_online_cpus(); |
3782 |
+ |
3783 |
+ ret = check_online_cpus(); |
3784 |
+ if (ret) |
3785 |
+ goto put; |
3786 |
+ |
3787 |
++ tmp_ret = microcode_ops->request_microcode_fw(bsp, µcode_pdev->dev, true); |
3788 |
++ if (tmp_ret != UCODE_NEW) |
3789 |
++ goto put; |
3790 |
++ |
3791 |
+ mutex_lock(µcode_mutex); |
3792 |
+ ret = microcode_reload_late(); |
3793 |
+ mutex_unlock(µcode_mutex); |
3794 |
+diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c |
3795 |
+index 22aad412f965e..629c4994f1654 100644 |
3796 |
+--- a/arch/x86/kernel/e820.c |
3797 |
++++ b/arch/x86/kernel/e820.c |
3798 |
+@@ -31,8 +31,8 @@ |
3799 |
+ * - inform the user about the firmware's notion of memory layout |
3800 |
+ * via /sys/firmware/memmap |
3801 |
+ * |
3802 |
+- * - the hibernation code uses it to generate a kernel-independent MD5 |
3803 |
+- * fingerprint of the physical memory layout of a system. |
3804 |
++ * - the hibernation code uses it to generate a kernel-independent CRC32 |
3805 |
++ * checksum of the physical memory layout of a system. |
3806 |
+ * |
3807 |
+ * - 'e820_table_kexec': a slightly modified (by the kernel) firmware version |
3808 |
+ * passed to us by the bootloader - the major difference between |
3809 |
+diff --git a/arch/x86/kernel/kprobes/core.c b/arch/x86/kernel/kprobes/core.c |
3810 |
+index a65e9e97857f8..4e81d86a1470a 100644 |
3811 |
+--- a/arch/x86/kernel/kprobes/core.c |
3812 |
++++ b/arch/x86/kernel/kprobes/core.c |
3813 |
+@@ -159,6 +159,8 @@ NOKPROBE_SYMBOL(skip_prefixes); |
3814 |
+ int can_boost(struct insn *insn, void *addr) |
3815 |
+ { |
3816 |
+ kprobe_opcode_t opcode; |
3817 |
++ insn_byte_t prefix; |
3818 |
++ int i; |
3819 |
+ |
3820 |
+ if (search_exception_tables((unsigned long)addr)) |
3821 |
+ return 0; /* Page fault may occur on this address. */ |
3822 |
+@@ -171,9 +173,14 @@ int can_boost(struct insn *insn, void *addr) |
3823 |
+ if (insn->opcode.nbytes != 1) |
3824 |
+ return 0; |
3825 |
+ |
3826 |
+- /* Can't boost Address-size override prefix */ |
3827 |
+- if (unlikely(inat_is_address_size_prefix(insn->attr))) |
3828 |
+- return 0; |
3829 |
++ for_each_insn_prefix(insn, i, prefix) { |
3830 |
++ insn_attr_t attr; |
3831 |
++ |
3832 |
++ attr = inat_get_opcode_attribute(prefix); |
3833 |
++ /* Can't boost Address-size override prefix and CS override prefix */ |
3834 |
++ if (prefix == 0x2e || inat_is_address_size_prefix(attr)) |
3835 |
++ return 0; |
3836 |
++ } |
3837 |
+ |
3838 |
+ opcode = insn->opcode.bytes[0]; |
3839 |
+ |
3840 |
+@@ -198,8 +205,8 @@ int can_boost(struct insn *insn, void *addr) |
3841 |
+ /* clear and set flags are boostable */ |
3842 |
+ return (opcode == 0xf5 || (0xf7 < opcode && opcode < 0xfe)); |
3843 |
+ default: |
3844 |
+- /* CS override prefix and call are not boostable */ |
3845 |
+- return (opcode != 0x2e && opcode != 0x9a); |
3846 |
++ /* call is not boostable */ |
3847 |
++ return opcode != 0x9a; |
3848 |
+ } |
3849 |
+ } |
3850 |
+ |
3851 |
+diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c |
3852 |
+index 16703c35a944f..6b08d1eb173fd 100644 |
3853 |
+--- a/arch/x86/kernel/smpboot.c |
3854 |
++++ b/arch/x86/kernel/smpboot.c |
3855 |
+@@ -458,29 +458,52 @@ static bool match_smt(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o) |
3856 |
+ return false; |
3857 |
+ } |
3858 |
+ |
3859 |
++static bool match_die(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o) |
3860 |
++{ |
3861 |
++ if (c->phys_proc_id == o->phys_proc_id && |
3862 |
++ c->cpu_die_id == o->cpu_die_id) |
3863 |
++ return true; |
3864 |
++ return false; |
3865 |
++} |
3866 |
++ |
3867 |
+ /* |
3868 |
+- * Define snc_cpu[] for SNC (Sub-NUMA Cluster) CPUs. |
3869 |
++ * Unlike the other levels, we do not enforce keeping a |
3870 |
++ * multicore group inside a NUMA node. If this happens, we will |
3871 |
++ * discard the MC level of the topology later. |
3872 |
++ */ |
3873 |
++static bool match_pkg(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o) |
3874 |
++{ |
3875 |
++ if (c->phys_proc_id == o->phys_proc_id) |
3876 |
++ return true; |
3877 |
++ return false; |
3878 |
++} |
3879 |
++ |
3880 |
++/* |
3881 |
++ * Define intel_cod_cpu[] for Intel COD (Cluster-on-Die) CPUs. |
3882 |
+ * |
3883 |
+- * These are Intel CPUs that enumerate an LLC that is shared by |
3884 |
+- * multiple NUMA nodes. The LLC on these systems is shared for |
3885 |
+- * off-package data access but private to the NUMA node (half |
3886 |
+- * of the package) for on-package access. |
3887 |
++ * Any Intel CPU that has multiple nodes per package and does not |
3888 |
++ * match intel_cod_cpu[] has the SNC (Sub-NUMA Cluster) topology. |
3889 |
+ * |
3890 |
+- * CPUID (the source of the information about the LLC) can only |
3891 |
+- * enumerate the cache as being shared *or* unshared, but not |
3892 |
+- * this particular configuration. The CPU in this case enumerates |
3893 |
+- * the cache to be shared across the entire package (spanning both |
3894 |
+- * NUMA nodes). |
3895 |
++ * When in SNC mode, these CPUs enumerate an LLC that is shared |
3896 |
++ * by multiple NUMA nodes. The LLC is shared for off-package data |
3897 |
++ * access but private to the NUMA node (half of the package) for |
3898 |
++ * on-package access. CPUID (the source of the information about |
3899 |
++ * the LLC) can only enumerate the cache as shared or unshared, |
3900 |
++ * but not this particular configuration. |
3901 |
+ */ |
3902 |
+ |
3903 |
+-static const struct x86_cpu_id snc_cpu[] = { |
3904 |
+- X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, NULL), |
3905 |
++static const struct x86_cpu_id intel_cod_cpu[] = { |
3906 |
++ X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X, 0), /* COD */ |
3907 |
++ X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, 0), /* COD */ |
3908 |
++ X86_MATCH_INTEL_FAM6_MODEL(ANY, 1), /* SNC */ |
3909 |
+ {} |
3910 |
+ }; |
3911 |
+ |
3912 |
+ static bool match_llc(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o) |
3913 |
+ { |
3914 |
++ const struct x86_cpu_id *id = x86_match_cpu(intel_cod_cpu); |
3915 |
+ int cpu1 = c->cpu_index, cpu2 = o->cpu_index; |
3916 |
++ bool intel_snc = id && id->driver_data; |
3917 |
+ |
3918 |
+ /* Do not match if we do not have a valid APICID for cpu: */ |
3919 |
+ if (per_cpu(cpu_llc_id, cpu1) == BAD_APICID) |
3920 |
+@@ -495,32 +518,12 @@ static bool match_llc(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o) |
3921 |
+ * means 'c' does not share the LLC of 'o'. This will be |
3922 |
+ * reflected to userspace. |
3923 |
+ */ |
3924 |
+- if (!topology_same_node(c, o) && x86_match_cpu(snc_cpu)) |
3925 |
++ if (match_pkg(c, o) && !topology_same_node(c, o) && intel_snc) |
3926 |
+ return false; |
3927 |
+ |
3928 |
+ return topology_sane(c, o, "llc"); |
3929 |
+ } |
3930 |
+ |
3931 |
+-/* |
3932 |
+- * Unlike the other levels, we do not enforce keeping a |
3933 |
+- * multicore group inside a NUMA node. If this happens, we will |
3934 |
+- * discard the MC level of the topology later. |
3935 |
+- */ |
3936 |
+-static bool match_pkg(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o) |
3937 |
+-{ |
3938 |
+- if (c->phys_proc_id == o->phys_proc_id) |
3939 |
+- return true; |
3940 |
+- return false; |
3941 |
+-} |
3942 |
+- |
3943 |
+-static bool match_die(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o) |
3944 |
+-{ |
3945 |
+- if ((c->phys_proc_id == o->phys_proc_id) && |
3946 |
+- (c->cpu_die_id == o->cpu_die_id)) |
3947 |
+- return true; |
3948 |
+- return false; |
3949 |
+-} |
3950 |
+- |
3951 |
+ |
3952 |
+ #if defined(CONFIG_SCHED_SMT) || defined(CONFIG_SCHED_MC) |
3953 |
+ static inline int x86_sched_itmt_flags(void) |
3954 |
+@@ -592,14 +595,23 @@ void set_cpu_sibling_map(int cpu) |
3955 |
+ for_each_cpu(i, cpu_sibling_setup_mask) { |
3956 |
+ o = &cpu_data(i); |
3957 |
+ |
3958 |
++ if (match_pkg(c, o) && !topology_same_node(c, o)) |
3959 |
++ x86_has_numa_in_package = true; |
3960 |
++ |
3961 |
+ if ((i == cpu) || (has_smt && match_smt(c, o))) |
3962 |
+ link_mask(topology_sibling_cpumask, cpu, i); |
3963 |
+ |
3964 |
+ if ((i == cpu) || (has_mp && match_llc(c, o))) |
3965 |
+ link_mask(cpu_llc_shared_mask, cpu, i); |
3966 |
+ |
3967 |
++ if ((i == cpu) || (has_mp && match_die(c, o))) |
3968 |
++ link_mask(topology_die_cpumask, cpu, i); |
3969 |
+ } |
3970 |
+ |
3971 |
++ threads = cpumask_weight(topology_sibling_cpumask(cpu)); |
3972 |
++ if (threads > __max_smt_threads) |
3973 |
++ __max_smt_threads = threads; |
3974 |
++ |
3975 |
+ /* |
3976 |
+ * This needs a separate iteration over the cpus because we rely on all |
3977 |
+ * topology_sibling_cpumask links to be set-up. |
3978 |
+@@ -613,8 +625,7 @@ void set_cpu_sibling_map(int cpu) |
3979 |
+ /* |
3980 |
+ * Does this new cpu bringup a new core? |
3981 |
+ */ |
3982 |
+- if (cpumask_weight( |
3983 |
+- topology_sibling_cpumask(cpu)) == 1) { |
3984 |
++ if (threads == 1) { |
3985 |
+ /* |
3986 |
+ * for each core in package, increment |
3987 |
+ * the booted_cores for this new cpu |
3988 |
+@@ -631,16 +642,7 @@ void set_cpu_sibling_map(int cpu) |
3989 |
+ } else if (i != cpu && !c->booted_cores) |
3990 |
+ c->booted_cores = cpu_data(i).booted_cores; |
3991 |
+ } |
3992 |
+- if (match_pkg(c, o) && !topology_same_node(c, o)) |
3993 |
+- x86_has_numa_in_package = true; |
3994 |
+- |
3995 |
+- if ((i == cpu) || (has_mp && match_die(c, o))) |
3996 |
+- link_mask(topology_die_cpumask, cpu, i); |
3997 |
+ } |
3998 |
+- |
3999 |
+- threads = cpumask_weight(topology_sibling_cpumask(cpu)); |
4000 |
+- if (threads > __max_smt_threads) |
4001 |
+- __max_smt_threads = threads; |
4002 |
+ } |
4003 |
+ |
4004 |
+ /* maps the cpu to the sched domain representing multi-core */ |
4005 |
+diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c |
4006 |
+index 1453b9b794425..d3f2b63167451 100644 |
4007 |
+--- a/arch/x86/kvm/emulate.c |
4008 |
++++ b/arch/x86/kvm/emulate.c |
4009 |
+@@ -4220,7 +4220,7 @@ static bool valid_cr(int nr) |
4010 |
+ } |
4011 |
+ } |
4012 |
+ |
4013 |
+-static int check_cr_read(struct x86_emulate_ctxt *ctxt) |
4014 |
++static int check_cr_access(struct x86_emulate_ctxt *ctxt) |
4015 |
+ { |
4016 |
+ if (!valid_cr(ctxt->modrm_reg)) |
4017 |
+ return emulate_ud(ctxt); |
4018 |
+@@ -4228,80 +4228,6 @@ static int check_cr_read(struct x86_emulate_ctxt *ctxt) |
4019 |
+ return X86EMUL_CONTINUE; |
4020 |
+ } |
4021 |
+ |
4022 |
+-static int check_cr_write(struct x86_emulate_ctxt *ctxt) |
4023 |
+-{ |
4024 |
+- u64 new_val = ctxt->src.val64; |
4025 |
+- int cr = ctxt->modrm_reg; |
4026 |
+- u64 efer = 0; |
4027 |
+- |
4028 |
+- static u64 cr_reserved_bits[] = { |
4029 |
+- 0xffffffff00000000ULL, |
4030 |
+- 0, 0, 0, /* CR3 checked later */ |
4031 |
+- CR4_RESERVED_BITS, |
4032 |
+- 0, 0, 0, |
4033 |
+- CR8_RESERVED_BITS, |
4034 |
+- }; |
4035 |
+- |
4036 |
+- if (!valid_cr(cr)) |
4037 |
+- return emulate_ud(ctxt); |
4038 |
+- |
4039 |
+- if (new_val & cr_reserved_bits[cr]) |
4040 |
+- return emulate_gp(ctxt, 0); |
4041 |
+- |
4042 |
+- switch (cr) { |
4043 |
+- case 0: { |
4044 |
+- u64 cr4; |
4045 |
+- if (((new_val & X86_CR0_PG) && !(new_val & X86_CR0_PE)) || |
4046 |
+- ((new_val & X86_CR0_NW) && !(new_val & X86_CR0_CD))) |
4047 |
+- return emulate_gp(ctxt, 0); |
4048 |
+- |
4049 |
+- cr4 = ctxt->ops->get_cr(ctxt, 4); |
4050 |
+- ctxt->ops->get_msr(ctxt, MSR_EFER, &efer); |
4051 |
+- |
4052 |
+- if ((new_val & X86_CR0_PG) && (efer & EFER_LME) && |
4053 |
+- !(cr4 & X86_CR4_PAE)) |
4054 |
+- return emulate_gp(ctxt, 0); |
4055 |
+- |
4056 |
+- break; |
4057 |
+- } |
4058 |
+- case 3: { |
4059 |
+- u64 rsvd = 0; |
4060 |
+- |
4061 |
+- ctxt->ops->get_msr(ctxt, MSR_EFER, &efer); |
4062 |
+- if (efer & EFER_LMA) { |
4063 |
+- u64 maxphyaddr; |
4064 |
+- u32 eax, ebx, ecx, edx; |
4065 |
+- |
4066 |
+- eax = 0x80000008; |
4067 |
+- ecx = 0; |
4068 |
+- if (ctxt->ops->get_cpuid(ctxt, &eax, &ebx, &ecx, |
4069 |
+- &edx, true)) |
4070 |
+- maxphyaddr = eax & 0xff; |
4071 |
+- else |
4072 |
+- maxphyaddr = 36; |
4073 |
+- rsvd = rsvd_bits(maxphyaddr, 63); |
4074 |
+- if (ctxt->ops->get_cr(ctxt, 4) & X86_CR4_PCIDE) |
4075 |
+- rsvd &= ~X86_CR3_PCID_NOFLUSH; |
4076 |
+- } |
4077 |
+- |
4078 |
+- if (new_val & rsvd) |
4079 |
+- return emulate_gp(ctxt, 0); |
4080 |
+- |
4081 |
+- break; |
4082 |
+- } |
4083 |
+- case 4: { |
4084 |
+- ctxt->ops->get_msr(ctxt, MSR_EFER, &efer); |
4085 |
+- |
4086 |
+- if ((efer & EFER_LMA) && !(new_val & X86_CR4_PAE)) |
4087 |
+- return emulate_gp(ctxt, 0); |
4088 |
+- |
4089 |
+- break; |
4090 |
+- } |
4091 |
+- } |
4092 |
+- |
4093 |
+- return X86EMUL_CONTINUE; |
4094 |
+-} |
4095 |
+- |
4096 |
+ static int check_dr7_gd(struct x86_emulate_ctxt *ctxt) |
4097 |
+ { |
4098 |
+ unsigned long dr7; |
4099 |
+@@ -4841,10 +4767,10 @@ static const struct opcode twobyte_table[256] = { |
4100 |
+ D(ImplicitOps | ModRM | SrcMem | NoAccess), /* 8 * reserved NOP */ |
4101 |
+ D(ImplicitOps | ModRM | SrcMem | NoAccess), /* NOP + 7 * reserved NOP */ |
4102 |
+ /* 0x20 - 0x2F */ |
4103 |
+- DIP(ModRM | DstMem | Priv | Op3264 | NoMod, cr_read, check_cr_read), |
4104 |
++ DIP(ModRM | DstMem | Priv | Op3264 | NoMod, cr_read, check_cr_access), |
4105 |
+ DIP(ModRM | DstMem | Priv | Op3264 | NoMod, dr_read, check_dr_read), |
4106 |
+ IIP(ModRM | SrcMem | Priv | Op3264 | NoMod, em_cr_write, cr_write, |
4107 |
+- check_cr_write), |
4108 |
++ check_cr_access), |
4109 |
+ IIP(ModRM | SrcMem | Priv | Op3264 | NoMod, em_dr_write, dr_write, |
4110 |
+ check_dr_write), |
4111 |
+ N, N, N, N, |
4112 |
+diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c |
4113 |
+index 86cedf32526a6..9dabd689a8129 100644 |
4114 |
+--- a/arch/x86/kvm/mmu/mmu.c |
4115 |
++++ b/arch/x86/kvm/mmu/mmu.c |
4116 |
+@@ -3203,14 +3203,14 @@ void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, |
4117 |
+ if (mmu->shadow_root_level >= PT64_ROOT_4LEVEL && |
4118 |
+ (mmu->root_level >= PT64_ROOT_4LEVEL || mmu->direct_map)) { |
4119 |
+ mmu_free_root_page(kvm, &mmu->root_hpa, &invalid_list); |
4120 |
+- } else { |
4121 |
++ } else if (mmu->pae_root) { |
4122 |
+ for (i = 0; i < 4; ++i) |
4123 |
+ if (mmu->pae_root[i] != 0) |
4124 |
+ mmu_free_root_page(kvm, |
4125 |
+ &mmu->pae_root[i], |
4126 |
+ &invalid_list); |
4127 |
+- mmu->root_hpa = INVALID_PAGE; |
4128 |
+ } |
4129 |
++ mmu->root_hpa = INVALID_PAGE; |
4130 |
+ mmu->root_pgd = 0; |
4131 |
+ } |
4132 |
+ |
4133 |
+@@ -3322,9 +3322,23 @@ static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu) |
4134 |
+ * the shadow page table may be a PAE or a long mode page table. |
4135 |
+ */ |
4136 |
+ pm_mask = PT_PRESENT_MASK; |
4137 |
+- if (vcpu->arch.mmu->shadow_root_level == PT64_ROOT_4LEVEL) |
4138 |
++ if (vcpu->arch.mmu->shadow_root_level == PT64_ROOT_4LEVEL) { |
4139 |
+ pm_mask |= PT_ACCESSED_MASK | PT_WRITABLE_MASK | PT_USER_MASK; |
4140 |
+ |
4141 |
++ /* |
4142 |
++ * Allocate the page for the PDPTEs when shadowing 32-bit NPT |
4143 |
++ * with 64-bit only when needed. Unlike 32-bit NPT, it doesn't |
4144 |
++ * need to be in low mem. See also lm_root below. |
4145 |
++ */ |
4146 |
++ if (!vcpu->arch.mmu->pae_root) { |
4147 |
++ WARN_ON_ONCE(!tdp_enabled); |
4148 |
++ |
4149 |
++ vcpu->arch.mmu->pae_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT); |
4150 |
++ if (!vcpu->arch.mmu->pae_root) |
4151 |
++ return -ENOMEM; |
4152 |
++ } |
4153 |
++ } |
4154 |
++ |
4155 |
+ for (i = 0; i < 4; ++i) { |
4156 |
+ MMU_WARN_ON(VALID_PAGE(vcpu->arch.mmu->pae_root[i])); |
4157 |
+ if (vcpu->arch.mmu->root_level == PT32E_ROOT_LEVEL) { |
4158 |
+@@ -3347,21 +3361,19 @@ static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu) |
4159 |
+ vcpu->arch.mmu->root_hpa = __pa(vcpu->arch.mmu->pae_root); |
4160 |
+ |
4161 |
+ /* |
4162 |
+- * If we shadow a 32 bit page table with a long mode page |
4163 |
+- * table we enter this path. |
4164 |
++ * When shadowing 32-bit or PAE NPT with 64-bit NPT, the PML4 and PDP |
4165 |
++ * tables are allocated and initialized at MMU creation as there is no |
4166 |
++ * equivalent level in the guest's NPT to shadow. Allocate the tables |
4167 |
++ * on demand, as running a 32-bit L1 VMM is very rare. The PDP is |
4168 |
++ * handled above (to share logic with PAE), deal with the PML4 here. |
4169 |
+ */ |
4170 |
+ if (vcpu->arch.mmu->shadow_root_level == PT64_ROOT_4LEVEL) { |
4171 |
+ if (vcpu->arch.mmu->lm_root == NULL) { |
4172 |
+- /* |
4173 |
+- * The additional page necessary for this is only |
4174 |
+- * allocated on demand. |
4175 |
+- */ |
4176 |
+- |
4177 |
+ u64 *lm_root; |
4178 |
+ |
4179 |
+ lm_root = (void*)get_zeroed_page(GFP_KERNEL_ACCOUNT); |
4180 |
+- if (lm_root == NULL) |
4181 |
+- return 1; |
4182 |
++ if (!lm_root) |
4183 |
++ return -ENOMEM; |
4184 |
+ |
4185 |
+ lm_root[0] = __pa(vcpu->arch.mmu->pae_root) | pm_mask; |
4186 |
+ |
4187 |
+@@ -3664,6 +3676,14 @@ static bool try_async_pf(struct kvm_vcpu *vcpu, bool prefault, gfn_t gfn, |
4188 |
+ struct kvm_memory_slot *slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); |
4189 |
+ bool async; |
4190 |
+ |
4191 |
++ /* |
4192 |
++ * Retry the page fault if the gfn hit a memslot that is being deleted |
4193 |
++ * or moved. This ensures any existing SPTEs for the old memslot will |
4194 |
++ * be zapped before KVM inserts a new MMIO SPTE for the gfn. |
4195 |
++ */ |
4196 |
++ if (slot && (slot->flags & KVM_MEMSLOT_INVALID)) |
4197 |
++ return true; |
4198 |
++ |
4199 |
+ /* Don't expose private memslots to L2. */ |
4200 |
+ if (is_guest_mode(vcpu) && !kvm_is_visible_memslot(slot)) { |
4201 |
+ *pfn = KVM_PFN_NOSLOT; |
4202 |
+@@ -4618,12 +4638,17 @@ void kvm_init_shadow_npt_mmu(struct kvm_vcpu *vcpu, u32 cr0, u32 cr4, u32 efer, |
4203 |
+ struct kvm_mmu *context = &vcpu->arch.guest_mmu; |
4204 |
+ union kvm_mmu_role new_role = kvm_calc_shadow_npt_root_page_role(vcpu); |
4205 |
+ |
4206 |
+- context->shadow_root_level = new_role.base.level; |
4207 |
+- |
4208 |
+ __kvm_mmu_new_pgd(vcpu, nested_cr3, new_role.base, false, false); |
4209 |
+ |
4210 |
+- if (new_role.as_u64 != context->mmu_role.as_u64) |
4211 |
++ if (new_role.as_u64 != context->mmu_role.as_u64) { |
4212 |
+ shadow_mmu_init_context(vcpu, context, cr0, cr4, efer, new_role); |
4213 |
++ |
4214 |
++ /* |
4215 |
++ * Override the level set by the common init helper, nested TDP |
4216 |
++ * always uses the host's TDP configuration. |
4217 |
++ */ |
4218 |
++ context->shadow_root_level = new_role.base.level; |
4219 |
++ } |
4220 |
+ } |
4221 |
+ EXPORT_SYMBOL_GPL(kvm_init_shadow_npt_mmu); |
4222 |
+ |
4223 |
+@@ -5310,9 +5335,11 @@ static int __kvm_mmu_create(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu) |
4224 |
+ * while the PDP table is a per-vCPU construct that's allocated at MMU |
4225 |
+ * creation. When emulating 32-bit mode, cr3 is only 32 bits even on |
4226 |
+ * x86_64. Therefore we need to allocate the PDP table in the first |
4227 |
+- * 4GB of memory, which happens to fit the DMA32 zone. Except for |
4228 |
+- * SVM's 32-bit NPT support, TDP paging doesn't use PAE paging and can |
4229 |
+- * skip allocating the PDP table. |
4230 |
++ * 4GB of memory, which happens to fit the DMA32 zone. TDP paging |
4231 |
++ * generally doesn't use PAE paging and can skip allocating the PDP |
4232 |
++ * table. The main exception, handled here, is SVM's 32-bit NPT. The |
4233 |
++ * other exception is for shadowing L1's 32-bit or PAE NPT on 64-bit |
4234 |
++ * KVM; that horror is handled on-demand by mmu_alloc_shadow_roots(). |
4235 |
+ */ |
4236 |
+ if (tdp_enabled && kvm_mmu_get_tdp_level(vcpu) > PT32E_ROOT_LEVEL) |
4237 |
+ return 0; |
4238 |
+diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c |
4239 |
+index 48017fef1cd9c..7c233c79c124d 100644 |
4240 |
+--- a/arch/x86/kvm/svm/sev.c |
4241 |
++++ b/arch/x86/kvm/svm/sev.c |
4242 |
+@@ -86,7 +86,7 @@ static bool __sev_recycle_asids(int min_asid, int max_asid) |
4243 |
+ return true; |
4244 |
+ } |
4245 |
+ |
4246 |
+-static int sev_asid_new(struct kvm_sev_info *sev) |
4247 |
++static int sev_asid_new(bool es_active) |
4248 |
+ { |
4249 |
+ int pos, min_asid, max_asid; |
4250 |
+ bool retry = true; |
4251 |
+@@ -97,8 +97,8 @@ static int sev_asid_new(struct kvm_sev_info *sev) |
4252 |
+ * SEV-enabled guests must use asid from min_sev_asid to max_sev_asid. |
4253 |
+ * SEV-ES-enabled guest can use from 1 to min_sev_asid - 1. |
4254 |
+ */ |
4255 |
+- min_asid = sev->es_active ? 0 : min_sev_asid - 1; |
4256 |
+- max_asid = sev->es_active ? min_sev_asid - 1 : max_sev_asid; |
4257 |
++ min_asid = es_active ? 0 : min_sev_asid - 1; |
4258 |
++ max_asid = es_active ? min_sev_asid - 1 : max_sev_asid; |
4259 |
+ again: |
4260 |
+ pos = find_next_zero_bit(sev_asid_bitmap, max_sev_asid, min_asid); |
4261 |
+ if (pos >= max_asid) { |
4262 |
+@@ -178,13 +178,17 @@ static void sev_unbind_asid(struct kvm *kvm, unsigned int handle) |
4263 |
+ static int sev_guest_init(struct kvm *kvm, struct kvm_sev_cmd *argp) |
4264 |
+ { |
4265 |
+ struct kvm_sev_info *sev = &to_kvm_svm(kvm)->sev_info; |
4266 |
++ bool es_active = argp->id == KVM_SEV_ES_INIT; |
4267 |
+ int asid, ret; |
4268 |
+ |
4269 |
++ if (kvm->created_vcpus) |
4270 |
++ return -EINVAL; |
4271 |
++ |
4272 |
+ ret = -EBUSY; |
4273 |
+ if (unlikely(sev->active)) |
4274 |
+ return ret; |
4275 |
+ |
4276 |
+- asid = sev_asid_new(sev); |
4277 |
++ asid = sev_asid_new(es_active); |
4278 |
+ if (asid < 0) |
4279 |
+ return ret; |
4280 |
+ |
4281 |
+@@ -193,6 +197,7 @@ static int sev_guest_init(struct kvm *kvm, struct kvm_sev_cmd *argp) |
4282 |
+ goto e_free; |
4283 |
+ |
4284 |
+ sev->active = true; |
4285 |
++ sev->es_active = es_active; |
4286 |
+ sev->asid = asid; |
4287 |
+ INIT_LIST_HEAD(&sev->regions_list); |
4288 |
+ |
4289 |
+@@ -203,16 +208,6 @@ e_free: |
4290 |
+ return ret; |
4291 |
+ } |
4292 |
+ |
4293 |
+-static int sev_es_guest_init(struct kvm *kvm, struct kvm_sev_cmd *argp) |
4294 |
+-{ |
4295 |
+- if (!sev_es) |
4296 |
+- return -ENOTTY; |
4297 |
+- |
4298 |
+- to_kvm_svm(kvm)->sev_info.es_active = true; |
4299 |
+- |
4300 |
+- return sev_guest_init(kvm, argp); |
4301 |
+-} |
4302 |
+- |
4303 |
+ static int sev_bind_asid(struct kvm *kvm, unsigned int handle, int *error) |
4304 |
+ { |
4305 |
+ struct sev_data_activate *data; |
4306 |
+@@ -563,6 +558,7 @@ static int sev_launch_update_vmsa(struct kvm *kvm, struct kvm_sev_cmd *argp) |
4307 |
+ { |
4308 |
+ struct kvm_sev_info *sev = &to_kvm_svm(kvm)->sev_info; |
4309 |
+ struct sev_data_launch_update_vmsa *vmsa; |
4310 |
++ struct kvm_vcpu *vcpu; |
4311 |
+ int i, ret; |
4312 |
+ |
4313 |
+ if (!sev_es_guest(kvm)) |
4314 |
+@@ -572,8 +568,8 @@ static int sev_launch_update_vmsa(struct kvm *kvm, struct kvm_sev_cmd *argp) |
4315 |
+ if (!vmsa) |
4316 |
+ return -ENOMEM; |
4317 |
+ |
4318 |
+- for (i = 0; i < kvm->created_vcpus; i++) { |
4319 |
+- struct vcpu_svm *svm = to_svm(kvm->vcpus[i]); |
4320 |
++ kvm_for_each_vcpu(i, vcpu, kvm) { |
4321 |
++ struct vcpu_svm *svm = to_svm(vcpu); |
4322 |
+ |
4323 |
+ /* Perform some pre-encryption checks against the VMSA */ |
4324 |
+ ret = sev_es_sync_vmsa(svm); |
4325 |
+@@ -1058,12 +1054,15 @@ int svm_mem_enc_op(struct kvm *kvm, void __user *argp) |
4326 |
+ mutex_lock(&kvm->lock); |
4327 |
+ |
4328 |
+ switch (sev_cmd.id) { |
4329 |
++ case KVM_SEV_ES_INIT: |
4330 |
++ if (!sev_es) { |
4331 |
++ r = -ENOTTY; |
4332 |
++ goto out; |
4333 |
++ } |
4334 |
++ fallthrough; |
4335 |
+ case KVM_SEV_INIT: |
4336 |
+ r = sev_guest_init(kvm, &sev_cmd); |
4337 |
+ break; |
4338 |
+- case KVM_SEV_ES_INIT: |
4339 |
+- r = sev_es_guest_init(kvm, &sev_cmd); |
4340 |
+- break; |
4341 |
+ case KVM_SEV_LAUNCH_START: |
4342 |
+ r = sev_launch_start(kvm, &sev_cmd); |
4343 |
+ break; |
4344 |
+@@ -1277,8 +1276,11 @@ void __init sev_hardware_setup(void) |
4345 |
+ goto out; |
4346 |
+ |
4347 |
+ sev_reclaim_asid_bitmap = bitmap_zalloc(max_sev_asid, GFP_KERNEL); |
4348 |
+- if (!sev_reclaim_asid_bitmap) |
4349 |
++ if (!sev_reclaim_asid_bitmap) { |
4350 |
++ bitmap_free(sev_asid_bitmap); |
4351 |
++ sev_asid_bitmap = NULL; |
4352 |
+ goto out; |
4353 |
++ } |
4354 |
+ |
4355 |
+ pr_info("SEV supported: %u ASIDs\n", max_sev_asid - min_sev_asid + 1); |
4356 |
+ sev_supported = true; |
4357 |
+diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c |
4358 |
+index 6a0670548125f..15a69500819d2 100644 |
4359 |
+--- a/arch/x86/kvm/svm/svm.c |
4360 |
++++ b/arch/x86/kvm/svm/svm.c |
4361 |
+@@ -576,9 +576,8 @@ static int svm_cpu_init(int cpu) |
4362 |
+ clear_page(page_address(sd->save_area)); |
4363 |
+ |
4364 |
+ if (svm_sev_enabled()) { |
4365 |
+- sd->sev_vmcbs = kmalloc_array(max_sev_asid + 1, |
4366 |
+- sizeof(void *), |
4367 |
+- GFP_KERNEL); |
4368 |
++ sd->sev_vmcbs = kcalloc(max_sev_asid + 1, sizeof(void *), |
4369 |
++ GFP_KERNEL); |
4370 |
+ if (!sd->sev_vmcbs) |
4371 |
+ goto free_save_area; |
4372 |
+ } |
4373 |
+@@ -981,7 +980,16 @@ static __init int svm_hardware_setup(void) |
4374 |
+ kvm_enable_efer_bits(EFER_SVME | EFER_LMSLE); |
4375 |
+ } |
4376 |
+ |
4377 |
+- if (IS_ENABLED(CONFIG_KVM_AMD_SEV) && sev) { |
4378 |
++ if (!boot_cpu_has(X86_FEATURE_NPT)) |
4379 |
++ npt_enabled = false; |
4380 |
++ |
4381 |
++ if (npt_enabled && !npt) |
4382 |
++ npt_enabled = false; |
4383 |
++ |
4384 |
++ kvm_configure_mmu(npt_enabled, get_max_npt_level(), PG_LEVEL_1G); |
4385 |
++ pr_info("kvm: Nested Paging %sabled\n", npt_enabled ? "en" : "dis"); |
4386 |
++ |
4387 |
++ if (IS_ENABLED(CONFIG_KVM_AMD_SEV) && sev && npt_enabled) { |
4388 |
+ sev_hardware_setup(); |
4389 |
+ } else { |
4390 |
+ sev = false; |
4391 |
+@@ -996,15 +1004,6 @@ static __init int svm_hardware_setup(void) |
4392 |
+ goto err; |
4393 |
+ } |
4394 |
+ |
4395 |
+- if (!boot_cpu_has(X86_FEATURE_NPT)) |
4396 |
+- npt_enabled = false; |
4397 |
+- |
4398 |
+- if (npt_enabled && !npt) |
4399 |
+- npt_enabled = false; |
4400 |
+- |
4401 |
+- kvm_configure_mmu(npt_enabled, get_max_npt_level(), PG_LEVEL_1G); |
4402 |
+- pr_info("kvm: Nested Paging %sabled\n", npt_enabled ? "en" : "dis"); |
4403 |
+- |
4404 |
+ if (nrips) { |
4405 |
+ if (!boot_cpu_has(X86_FEATURE_NRIPS)) |
4406 |
+ nrips = false; |
4407 |
+@@ -1888,7 +1887,7 @@ static void svm_set_dr7(struct kvm_vcpu *vcpu, unsigned long value) |
4408 |
+ |
4409 |
+ static int pf_interception(struct vcpu_svm *svm) |
4410 |
+ { |
4411 |
+- u64 fault_address = __sme_clr(svm->vmcb->control.exit_info_2); |
4412 |
++ u64 fault_address = svm->vmcb->control.exit_info_2; |
4413 |
+ u64 error_code = svm->vmcb->control.exit_info_1; |
4414 |
+ |
4415 |
+ return kvm_handle_page_fault(&svm->vcpu, error_code, fault_address, |
4416 |
+@@ -2651,6 +2650,9 @@ static int svm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) |
4417 |
+ case MSR_TSC_AUX: |
4418 |
+ if (!boot_cpu_has(X86_FEATURE_RDTSCP)) |
4419 |
+ return 1; |
4420 |
++ if (!msr_info->host_initiated && |
4421 |
++ !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP)) |
4422 |
++ return 1; |
4423 |
+ msr_info->data = svm->tsc_aux; |
4424 |
+ break; |
4425 |
+ /* |
4426 |
+@@ -2859,6 +2861,10 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr) |
4427 |
+ if (!boot_cpu_has(X86_FEATURE_RDTSCP)) |
4428 |
+ return 1; |
4429 |
+ |
4430 |
++ if (!msr->host_initiated && |
4431 |
++ !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP)) |
4432 |
++ return 1; |
4433 |
++ |
4434 |
+ /* |
4435 |
+ * This is rare, so we update the MSR here instead of using |
4436 |
+ * direct_access_msrs. Doing that would require a rdmsr in |
4437 |
+diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c |
4438 |
+index cb48236cc24d6..0c41ffb7957f9 100644 |
4439 |
+--- a/arch/x86/kvm/vmx/nested.c |
4440 |
++++ b/arch/x86/kvm/vmx/nested.c |
4441 |
+@@ -618,6 +618,7 @@ static inline bool nested_vmx_prepare_msr_bitmap(struct kvm_vcpu *vcpu, |
4442 |
+ } |
4443 |
+ |
4444 |
+ /* KVM unconditionally exposes the FS/GS base MSRs to L1. */ |
4445 |
++#ifdef CONFIG_X86_64 |
4446 |
+ nested_vmx_disable_intercept_for_msr(msr_bitmap_l1, msr_bitmap_l0, |
4447 |
+ MSR_FS_BASE, MSR_TYPE_RW); |
4448 |
+ |
4449 |
+@@ -626,6 +627,7 @@ static inline bool nested_vmx_prepare_msr_bitmap(struct kvm_vcpu *vcpu, |
4450 |
+ |
4451 |
+ nested_vmx_disable_intercept_for_msr(msr_bitmap_l1, msr_bitmap_l0, |
4452 |
+ MSR_KERNEL_GS_BASE, MSR_TYPE_RW); |
4453 |
++#endif |
4454 |
+ |
4455 |
+ /* |
4456 |
+ * Checking the L0->L1 bitmap is trying to verify two things: |
4457 |
+@@ -4639,9 +4641,9 @@ int get_vmx_mem_address(struct kvm_vcpu *vcpu, unsigned long exit_qualification, |
4458 |
+ else if (addr_size == 0) |
4459 |
+ off = (gva_t)sign_extend64(off, 15); |
4460 |
+ if (base_is_valid) |
4461 |
+- off += kvm_register_read(vcpu, base_reg); |
4462 |
++ off += kvm_register_readl(vcpu, base_reg); |
4463 |
+ if (index_is_valid) |
4464 |
+- off += kvm_register_read(vcpu, index_reg) << scaling; |
4465 |
++ off += kvm_register_readl(vcpu, index_reg) << scaling; |
4466 |
+ vmx_get_segment(vcpu, &s, seg_reg); |
4467 |
+ |
4468 |
+ /* |
4469 |
+@@ -5517,16 +5519,11 @@ static int nested_vmx_eptp_switching(struct kvm_vcpu *vcpu, |
4470 |
+ if (!nested_vmx_check_eptp(vcpu, new_eptp)) |
4471 |
+ return 1; |
4472 |
+ |
4473 |
+- kvm_mmu_unload(vcpu); |
4474 |
+ mmu->ept_ad = accessed_dirty; |
4475 |
+ mmu->mmu_role.base.ad_disabled = !accessed_dirty; |
4476 |
+ vmcs12->ept_pointer = new_eptp; |
4477 |
+- /* |
4478 |
+- * TODO: Check what's the correct approach in case |
4479 |
+- * mmu reload fails. Currently, we just let the next |
4480 |
+- * reload potentially fail |
4481 |
+- */ |
4482 |
+- kvm_mmu_reload(vcpu); |
4483 |
++ |
4484 |
++ kvm_make_request(KVM_REQ_MMU_RELOAD, vcpu); |
4485 |
+ } |
4486 |
+ |
4487 |
+ return 0; |
4488 |
+@@ -5755,7 +5752,7 @@ static bool nested_vmx_exit_handled_vmcs_access(struct kvm_vcpu *vcpu, |
4489 |
+ |
4490 |
+ /* Decode instruction info and find the field to access */ |
4491 |
+ vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO); |
4492 |
+- field = kvm_register_read(vcpu, (((vmx_instruction_info) >> 28) & 0xf)); |
4493 |
++ field = kvm_register_readl(vcpu, (((vmx_instruction_info) >> 28) & 0xf)); |
4494 |
+ |
4495 |
+ /* Out-of-range fields always cause a VM exit from L2 to L1 */ |
4496 |
+ if (field >> 15) |
4497 |
+diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c |
4498 |
+index 95f836fbceb27..852cfb4c063e8 100644 |
4499 |
+--- a/arch/x86/kvm/vmx/vmx.c |
4500 |
++++ b/arch/x86/kvm/vmx/vmx.c |
4501 |
+@@ -155,9 +155,11 @@ static u32 vmx_possible_passthrough_msrs[MAX_POSSIBLE_PASSTHROUGH_MSRS] = { |
4502 |
+ MSR_IA32_SPEC_CTRL, |
4503 |
+ MSR_IA32_PRED_CMD, |
4504 |
+ MSR_IA32_TSC, |
4505 |
++#ifdef CONFIG_X86_64 |
4506 |
+ MSR_FS_BASE, |
4507 |
+ MSR_GS_BASE, |
4508 |
+ MSR_KERNEL_GS_BASE, |
4509 |
++#endif |
4510 |
+ MSR_IA32_SYSENTER_CS, |
4511 |
+ MSR_IA32_SYSENTER_ESP, |
4512 |
+ MSR_IA32_SYSENTER_EIP, |
4513 |
+@@ -5759,7 +5761,6 @@ void dump_vmcs(void) |
4514 |
+ u32 vmentry_ctl, vmexit_ctl; |
4515 |
+ u32 cpu_based_exec_ctrl, pin_based_exec_ctrl, secondary_exec_control; |
4516 |
+ unsigned long cr4; |
4517 |
+- u64 efer; |
4518 |
+ |
4519 |
+ if (!dump_invalid_vmcs) { |
4520 |
+ pr_warn_ratelimited("set kvm_intel.dump_invalid_vmcs=1 to dump internal KVM state.\n"); |
4521 |
+@@ -5771,7 +5772,6 @@ void dump_vmcs(void) |
4522 |
+ cpu_based_exec_ctrl = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL); |
4523 |
+ pin_based_exec_ctrl = vmcs_read32(PIN_BASED_VM_EXEC_CONTROL); |
4524 |
+ cr4 = vmcs_readl(GUEST_CR4); |
4525 |
+- efer = vmcs_read64(GUEST_IA32_EFER); |
4526 |
+ secondary_exec_control = 0; |
4527 |
+ if (cpu_has_secondary_exec_ctrls()) |
4528 |
+ secondary_exec_control = vmcs_read32(SECONDARY_VM_EXEC_CONTROL); |
4529 |
+@@ -5783,9 +5783,7 @@ void dump_vmcs(void) |
4530 |
+ pr_err("CR4: actual=0x%016lx, shadow=0x%016lx, gh_mask=%016lx\n", |
4531 |
+ cr4, vmcs_readl(CR4_READ_SHADOW), vmcs_readl(CR4_GUEST_HOST_MASK)); |
4532 |
+ pr_err("CR3 = 0x%016lx\n", vmcs_readl(GUEST_CR3)); |
4533 |
+- if ((secondary_exec_control & SECONDARY_EXEC_ENABLE_EPT) && |
4534 |
+- (cr4 & X86_CR4_PAE) && !(efer & EFER_LMA)) |
4535 |
+- { |
4536 |
++ if (cpu_has_vmx_ept()) { |
4537 |
+ pr_err("PDPTR0 = 0x%016llx PDPTR1 = 0x%016llx\n", |
4538 |
+ vmcs_read64(GUEST_PDPTR0), vmcs_read64(GUEST_PDPTR1)); |
4539 |
+ pr_err("PDPTR2 = 0x%016llx PDPTR3 = 0x%016llx\n", |
4540 |
+@@ -5811,7 +5809,8 @@ void dump_vmcs(void) |
4541 |
+ if ((vmexit_ctl & (VM_EXIT_SAVE_IA32_PAT | VM_EXIT_SAVE_IA32_EFER)) || |
4542 |
+ (vmentry_ctl & (VM_ENTRY_LOAD_IA32_PAT | VM_ENTRY_LOAD_IA32_EFER))) |
4543 |
+ pr_err("EFER = 0x%016llx PAT = 0x%016llx\n", |
4544 |
+- efer, vmcs_read64(GUEST_IA32_PAT)); |
4545 |
++ vmcs_read64(GUEST_IA32_EFER), |
4546 |
++ vmcs_read64(GUEST_IA32_PAT)); |
4547 |
+ pr_err("DebugCtl = 0x%016llx DebugExceptions = 0x%016lx\n", |
4548 |
+ vmcs_read64(GUEST_IA32_DEBUGCTL), |
4549 |
+ vmcs_readl(GUEST_PENDING_DBG_EXCEPTIONS)); |
4550 |
+@@ -6893,9 +6892,11 @@ static int vmx_create_vcpu(struct kvm_vcpu *vcpu) |
4551 |
+ bitmap_fill(vmx->shadow_msr_intercept.write, MAX_POSSIBLE_PASSTHROUGH_MSRS); |
4552 |
+ |
4553 |
+ vmx_disable_intercept_for_msr(vcpu, MSR_IA32_TSC, MSR_TYPE_R); |
4554 |
++#ifdef CONFIG_X86_64 |
4555 |
+ vmx_disable_intercept_for_msr(vcpu, MSR_FS_BASE, MSR_TYPE_RW); |
4556 |
+ vmx_disable_intercept_for_msr(vcpu, MSR_GS_BASE, MSR_TYPE_RW); |
4557 |
+ vmx_disable_intercept_for_msr(vcpu, MSR_KERNEL_GS_BASE, MSR_TYPE_RW); |
4558 |
++#endif |
4559 |
+ vmx_disable_intercept_for_msr(vcpu, MSR_IA32_SYSENTER_CS, MSR_TYPE_RW); |
4560 |
+ vmx_disable_intercept_for_msr(vcpu, MSR_IA32_SYSENTER_ESP, MSR_TYPE_RW); |
4561 |
+ vmx_disable_intercept_for_msr(vcpu, MSR_IA32_SYSENTER_EIP, MSR_TYPE_RW); |
4562 |
+diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c |
4563 |
+index f37f5c1430cfd..38c3e7860aa90 100644 |
4564 |
+--- a/arch/x86/kvm/x86.c |
4565 |
++++ b/arch/x86/kvm/x86.c |
4566 |
+@@ -10888,6 +10888,9 @@ bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu) |
4567 |
+ |
4568 |
+ bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu) |
4569 |
+ { |
4570 |
++ if (vcpu->arch.guest_state_protected) |
4571 |
++ return true; |
4572 |
++ |
4573 |
+ return vcpu->arch.preempted_in_kernel; |
4574 |
+ } |
4575 |
+ |
4576 |
+@@ -11407,7 +11410,7 @@ int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva) |
4577 |
+ |
4578 |
+ fallthrough; |
4579 |
+ case INVPCID_TYPE_ALL_INCL_GLOBAL: |
4580 |
+- kvm_mmu_unload(vcpu); |
4581 |
++ kvm_make_request(KVM_REQ_MMU_RELOAD, vcpu); |
4582 |
+ return kvm_skip_emulated_instruction(vcpu); |
4583 |
+ |
4584 |
+ default: |
4585 |
+diff --git a/arch/x86/power/hibernate.c b/arch/x86/power/hibernate.c |
4586 |
+index cd3914fc9f3d4..e94e0050a583a 100644 |
4587 |
+--- a/arch/x86/power/hibernate.c |
4588 |
++++ b/arch/x86/power/hibernate.c |
4589 |
+@@ -13,8 +13,8 @@ |
4590 |
+ #include <linux/kdebug.h> |
4591 |
+ #include <linux/cpu.h> |
4592 |
+ #include <linux/pgtable.h> |
4593 |
+- |
4594 |
+-#include <crypto/hash.h> |
4595 |
++#include <linux/types.h> |
4596 |
++#include <linux/crc32.h> |
4597 |
+ |
4598 |
+ #include <asm/e820/api.h> |
4599 |
+ #include <asm/init.h> |
4600 |
+@@ -54,95 +54,33 @@ int pfn_is_nosave(unsigned long pfn) |
4601 |
+ return pfn >= nosave_begin_pfn && pfn < nosave_end_pfn; |
4602 |
+ } |
4603 |
+ |
4604 |
+- |
4605 |
+-#define MD5_DIGEST_SIZE 16 |
4606 |
+- |
4607 |
+ struct restore_data_record { |
4608 |
+ unsigned long jump_address; |
4609 |
+ unsigned long jump_address_phys; |
4610 |
+ unsigned long cr3; |
4611 |
+ unsigned long magic; |
4612 |
+- u8 e820_digest[MD5_DIGEST_SIZE]; |
4613 |
++ unsigned long e820_checksum; |
4614 |
+ }; |
4615 |
+ |
4616 |
+-#if IS_BUILTIN(CONFIG_CRYPTO_MD5) |
4617 |
+ /** |
4618 |
+- * get_e820_md5 - calculate md5 according to given e820 table |
4619 |
++ * compute_e820_crc32 - calculate crc32 of a given e820 table |
4620 |
+ * |
4621 |
+ * @table: the e820 table to be calculated |
4622 |
+- * @buf: the md5 result to be stored to |
4623 |
++ * |
4624 |
++ * Return: the resulting checksum |
4625 |
+ */ |
4626 |
+-static int get_e820_md5(struct e820_table *table, void *buf) |
4627 |
++static inline u32 compute_e820_crc32(struct e820_table *table) |
4628 |
+ { |
4629 |
+- struct crypto_shash *tfm; |
4630 |
+- struct shash_desc *desc; |
4631 |
+- int size; |
4632 |
+- int ret = 0; |
4633 |
+- |
4634 |
+- tfm = crypto_alloc_shash("md5", 0, 0); |
4635 |
+- if (IS_ERR(tfm)) |
4636 |
+- return -ENOMEM; |
4637 |
+- |
4638 |
+- desc = kmalloc(sizeof(struct shash_desc) + crypto_shash_descsize(tfm), |
4639 |
+- GFP_KERNEL); |
4640 |
+- if (!desc) { |
4641 |
+- ret = -ENOMEM; |
4642 |
+- goto free_tfm; |
4643 |
+- } |
4644 |
+- |
4645 |
+- desc->tfm = tfm; |
4646 |
+- |
4647 |
+- size = offsetof(struct e820_table, entries) + |
4648 |
++ int size = offsetof(struct e820_table, entries) + |
4649 |
+ sizeof(struct e820_entry) * table->nr_entries; |
4650 |
+ |
4651 |
+- if (crypto_shash_digest(desc, (u8 *)table, size, buf)) |
4652 |
+- ret = -EINVAL; |
4653 |
+- |
4654 |
+- kfree_sensitive(desc); |
4655 |
+- |
4656 |
+-free_tfm: |
4657 |
+- crypto_free_shash(tfm); |
4658 |
+- return ret; |
4659 |
+-} |
4660 |
+- |
4661 |
+-static int hibernation_e820_save(void *buf) |
4662 |
+-{ |
4663 |
+- return get_e820_md5(e820_table_firmware, buf); |
4664 |
+-} |
4665 |
+- |
4666 |
+-static bool hibernation_e820_mismatch(void *buf) |
4667 |
+-{ |
4668 |
+- int ret; |
4669 |
+- u8 result[MD5_DIGEST_SIZE]; |
4670 |
+- |
4671 |
+- memset(result, 0, MD5_DIGEST_SIZE); |
4672 |
+- /* If there is no digest in suspend kernel, let it go. */ |
4673 |
+- if (!memcmp(result, buf, MD5_DIGEST_SIZE)) |
4674 |
+- return false; |
4675 |
+- |
4676 |
+- ret = get_e820_md5(e820_table_firmware, result); |
4677 |
+- if (ret) |
4678 |
+- return true; |
4679 |
+- |
4680 |
+- return memcmp(result, buf, MD5_DIGEST_SIZE) ? true : false; |
4681 |
+-} |
4682 |
+-#else |
4683 |
+-static int hibernation_e820_save(void *buf) |
4684 |
+-{ |
4685 |
+- return 0; |
4686 |
+-} |
4687 |
+- |
4688 |
+-static bool hibernation_e820_mismatch(void *buf) |
4689 |
+-{ |
4690 |
+- /* If md5 is not builtin for restore kernel, let it go. */ |
4691 |
+- return false; |
4692 |
++ return ~crc32_le(~0, (unsigned char const *)table, size); |
4693 |
+ } |
4694 |
+-#endif |
4695 |
+ |
4696 |
+ #ifdef CONFIG_X86_64 |
4697 |
+-#define RESTORE_MAGIC 0x23456789ABCDEF01UL |
4698 |
++#define RESTORE_MAGIC 0x23456789ABCDEF02UL |
4699 |
+ #else |
4700 |
+-#define RESTORE_MAGIC 0x12345678UL |
4701 |
++#define RESTORE_MAGIC 0x12345679UL |
4702 |
+ #endif |
4703 |
+ |
4704 |
+ /** |
4705 |
+@@ -179,7 +117,8 @@ int arch_hibernation_header_save(void *addr, unsigned int max_size) |
4706 |
+ */ |
4707 |
+ rdr->cr3 = restore_cr3 & ~CR3_PCID_MASK; |
4708 |
+ |
4709 |
+- return hibernation_e820_save(rdr->e820_digest); |
4710 |
++ rdr->e820_checksum = compute_e820_crc32(e820_table_firmware); |
4711 |
++ return 0; |
4712 |
+ } |
4713 |
+ |
4714 |
+ /** |
4715 |
+@@ -200,7 +139,7 @@ int arch_hibernation_header_restore(void *addr) |
4716 |
+ jump_address_phys = rdr->jump_address_phys; |
4717 |
+ restore_cr3 = rdr->cr3; |
4718 |
+ |
4719 |
+- if (hibernation_e820_mismatch(rdr->e820_digest)) { |
4720 |
++ if (rdr->e820_checksum != compute_e820_crc32(e820_table_firmware)) { |
4721 |
+ pr_crit("Hibernate inconsistent memory map detected!\n"); |
4722 |
+ return -ENODEV; |
4723 |
+ } |
4724 |
+diff --git a/crypto/async_tx/async_xor.c b/crypto/async_tx/async_xor.c |
4725 |
+index a057ecb1288d2..6cd7f7025df47 100644 |
4726 |
+--- a/crypto/async_tx/async_xor.c |
4727 |
++++ b/crypto/async_tx/async_xor.c |
4728 |
+@@ -233,6 +233,7 @@ async_xor_offs(struct page *dest, unsigned int offset, |
4729 |
+ if (submit->flags & ASYNC_TX_XOR_DROP_DST) { |
4730 |
+ src_cnt--; |
4731 |
+ src_list++; |
4732 |
++ src_offs++; |
4733 |
+ } |
4734 |
+ |
4735 |
+ /* wait for any prerequisite operations */ |
4736 |
+diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c |
4737 |
+index 75aaf94ae0a90..f98b533d9aef2 100644 |
4738 |
+--- a/drivers/acpi/cppc_acpi.c |
4739 |
++++ b/drivers/acpi/cppc_acpi.c |
4740 |
+@@ -119,23 +119,15 @@ static DEFINE_PER_CPU(struct cpc_desc *, cpc_desc_ptr); |
4741 |
+ */ |
4742 |
+ #define NUM_RETRIES 500ULL |
4743 |
+ |
4744 |
+-struct cppc_attr { |
4745 |
+- struct attribute attr; |
4746 |
+- ssize_t (*show)(struct kobject *kobj, |
4747 |
+- struct attribute *attr, char *buf); |
4748 |
+- ssize_t (*store)(struct kobject *kobj, |
4749 |
+- struct attribute *attr, const char *c, ssize_t count); |
4750 |
+-}; |
4751 |
+- |
4752 |
+ #define define_one_cppc_ro(_name) \ |
4753 |
+-static struct cppc_attr _name = \ |
4754 |
++static struct kobj_attribute _name = \ |
4755 |
+ __ATTR(_name, 0444, show_##_name, NULL) |
4756 |
+ |
4757 |
+ #define to_cpc_desc(a) container_of(a, struct cpc_desc, kobj) |
4758 |
+ |
4759 |
+ #define show_cppc_data(access_fn, struct_name, member_name) \ |
4760 |
+ static ssize_t show_##member_name(struct kobject *kobj, \ |
4761 |
+- struct attribute *attr, char *buf) \ |
4762 |
++ struct kobj_attribute *attr, char *buf) \ |
4763 |
+ { \ |
4764 |
+ struct cpc_desc *cpc_ptr = to_cpc_desc(kobj); \ |
4765 |
+ struct struct_name st_name = {0}; \ |
4766 |
+@@ -161,7 +153,7 @@ show_cppc_data(cppc_get_perf_ctrs, cppc_perf_fb_ctrs, reference_perf); |
4767 |
+ show_cppc_data(cppc_get_perf_ctrs, cppc_perf_fb_ctrs, wraparound_time); |
4768 |
+ |
4769 |
+ static ssize_t show_feedback_ctrs(struct kobject *kobj, |
4770 |
+- struct attribute *attr, char *buf) |
4771 |
++ struct kobj_attribute *attr, char *buf) |
4772 |
+ { |
4773 |
+ struct cpc_desc *cpc_ptr = to_cpc_desc(kobj); |
4774 |
+ struct cppc_perf_fb_ctrs fb_ctrs = {0}; |
4775 |
+diff --git a/drivers/ata/libahci_platform.c b/drivers/ata/libahci_platform.c |
4776 |
+index de638dafce21e..b2f5520882918 100644 |
4777 |
+--- a/drivers/ata/libahci_platform.c |
4778 |
++++ b/drivers/ata/libahci_platform.c |
4779 |
+@@ -582,11 +582,13 @@ int ahci_platform_init_host(struct platform_device *pdev, |
4780 |
+ int i, irq, n_ports, rc; |
4781 |
+ |
4782 |
+ irq = platform_get_irq(pdev, 0); |
4783 |
+- if (irq <= 0) { |
4784 |
++ if (irq < 0) { |
4785 |
+ if (irq != -EPROBE_DEFER) |
4786 |
+ dev_err(dev, "no irq\n"); |
4787 |
+ return irq; |
4788 |
+ } |
4789 |
++ if (!irq) |
4790 |
++ return -EINVAL; |
4791 |
+ |
4792 |
+ hpriv->irq = irq; |
4793 |
+ |
4794 |
+diff --git a/drivers/ata/pata_arasan_cf.c b/drivers/ata/pata_arasan_cf.c |
4795 |
+index e9cf31f384506..63f39440a9b42 100644 |
4796 |
+--- a/drivers/ata/pata_arasan_cf.c |
4797 |
++++ b/drivers/ata/pata_arasan_cf.c |
4798 |
+@@ -818,12 +818,19 @@ static int arasan_cf_probe(struct platform_device *pdev) |
4799 |
+ else |
4800 |
+ quirk = CF_BROKEN_UDMA; /* as it is on spear1340 */ |
4801 |
+ |
4802 |
+- /* if irq is 0, support only PIO */ |
4803 |
+- acdev->irq = platform_get_irq(pdev, 0); |
4804 |
+- if (acdev->irq) |
4805 |
++ /* |
4806 |
++ * If there's an error getting IRQ (or we do get IRQ0), |
4807 |
++ * support only PIO |
4808 |
++ */ |
4809 |
++ ret = platform_get_irq(pdev, 0); |
4810 |
++ if (ret > 0) { |
4811 |
++ acdev->irq = ret; |
4812 |
+ irq_handler = arasan_cf_interrupt; |
4813 |
+- else |
4814 |
++ } else if (ret == -EPROBE_DEFER) { |
4815 |
++ return ret; |
4816 |
++ } else { |
4817 |
+ quirk |= CF_BROKEN_MWDMA | CF_BROKEN_UDMA; |
4818 |
++ } |
4819 |
+ |
4820 |
+ acdev->pbase = res->start; |
4821 |
+ acdev->vbase = devm_ioremap(&pdev->dev, res->start, |
4822 |
+diff --git a/drivers/ata/pata_ixp4xx_cf.c b/drivers/ata/pata_ixp4xx_cf.c |
4823 |
+index d1644a8ef9fa6..abc0e87ca1a8b 100644 |
4824 |
+--- a/drivers/ata/pata_ixp4xx_cf.c |
4825 |
++++ b/drivers/ata/pata_ixp4xx_cf.c |
4826 |
+@@ -165,8 +165,12 @@ static int ixp4xx_pata_probe(struct platform_device *pdev) |
4827 |
+ return -ENOMEM; |
4828 |
+ |
4829 |
+ irq = platform_get_irq(pdev, 0); |
4830 |
+- if (irq) |
4831 |
++ if (irq > 0) |
4832 |
+ irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING); |
4833 |
++ else if (irq < 0) |
4834 |
++ return irq; |
4835 |
++ else |
4836 |
++ return -EINVAL; |
4837 |
+ |
4838 |
+ /* Setup expansion bus chip selects */ |
4839 |
+ *data->cs0_cfg = data->cs0_bits; |
4840 |
+diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c |
4841 |
+index 664ef658a955f..b62446ea5f408 100644 |
4842 |
+--- a/drivers/ata/sata_mv.c |
4843 |
++++ b/drivers/ata/sata_mv.c |
4844 |
+@@ -4097,6 +4097,10 @@ static int mv_platform_probe(struct platform_device *pdev) |
4845 |
+ n_ports = mv_platform_data->n_ports; |
4846 |
+ irq = platform_get_irq(pdev, 0); |
4847 |
+ } |
4848 |
++ if (irq < 0) |
4849 |
++ return irq; |
4850 |
++ if (!irq) |
4851 |
++ return -EINVAL; |
4852 |
+ |
4853 |
+ host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports); |
4854 |
+ hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL); |
4855 |
+diff --git a/drivers/base/devtmpfs.c b/drivers/base/devtmpfs.c |
4856 |
+index eac184e6d6577..a71d141179439 100644 |
4857 |
+--- a/drivers/base/devtmpfs.c |
4858 |
++++ b/drivers/base/devtmpfs.c |
4859 |
+@@ -416,7 +416,6 @@ static int __init devtmpfs_setup(void *p) |
4860 |
+ init_chroot("."); |
4861 |
+ out: |
4862 |
+ *(int *)p = err; |
4863 |
+- complete(&setup_done); |
4864 |
+ return err; |
4865 |
+ } |
4866 |
+ |
4867 |
+@@ -429,6 +428,7 @@ static int __ref devtmpfsd(void *p) |
4868 |
+ { |
4869 |
+ int err = devtmpfs_setup(p); |
4870 |
+ |
4871 |
++ complete(&setup_done); |
4872 |
+ if (err) |
4873 |
+ return err; |
4874 |
+ devtmpfs_work_loop(); |
4875 |
+diff --git a/drivers/base/node.c b/drivers/base/node.c |
4876 |
+index 04f71c7bc3f83..ec4bc09c29977 100644 |
4877 |
+--- a/drivers/base/node.c |
4878 |
++++ b/drivers/base/node.c |
4879 |
+@@ -268,21 +268,20 @@ static void node_init_cache_dev(struct node *node) |
4880 |
+ if (!dev) |
4881 |
+ return; |
4882 |
+ |
4883 |
++ device_initialize(dev); |
4884 |
+ dev->parent = &node->dev; |
4885 |
+ dev->release = node_cache_release; |
4886 |
+ if (dev_set_name(dev, "memory_side_cache")) |
4887 |
+- goto free_dev; |
4888 |
++ goto put_device; |
4889 |
+ |
4890 |
+- if (device_register(dev)) |
4891 |
+- goto free_name; |
4892 |
++ if (device_add(dev)) |
4893 |
++ goto put_device; |
4894 |
+ |
4895 |
+ pm_runtime_no_callbacks(dev); |
4896 |
+ node->cache_dev = dev; |
4897 |
+ return; |
4898 |
+-free_name: |
4899 |
+- kfree_const(dev->kobj.name); |
4900 |
+-free_dev: |
4901 |
+- kfree(dev); |
4902 |
++put_device: |
4903 |
++ put_device(dev); |
4904 |
+ } |
4905 |
+ |
4906 |
+ /** |
4907 |
+@@ -319,25 +318,24 @@ void node_add_cache(unsigned int nid, struct node_cache_attrs *cache_attrs) |
4908 |
+ return; |
4909 |
+ |
4910 |
+ dev = &info->dev; |
4911 |
++ device_initialize(dev); |
4912 |
+ dev->parent = node->cache_dev; |
4913 |
+ dev->release = node_cacheinfo_release; |
4914 |
+ dev->groups = cache_groups; |
4915 |
+ if (dev_set_name(dev, "index%d", cache_attrs->level)) |
4916 |
+- goto free_cache; |
4917 |
++ goto put_device; |
4918 |
+ |
4919 |
+ info->cache_attrs = *cache_attrs; |
4920 |
+- if (device_register(dev)) { |
4921 |
++ if (device_add(dev)) { |
4922 |
+ dev_warn(&node->dev, "failed to add cache level:%d\n", |
4923 |
+ cache_attrs->level); |
4924 |
+- goto free_name; |
4925 |
++ goto put_device; |
4926 |
+ } |
4927 |
+ pm_runtime_no_callbacks(dev); |
4928 |
+ list_add_tail(&info->node, &node->cache_attrs); |
4929 |
+ return; |
4930 |
+-free_name: |
4931 |
+- kfree_const(dev->kobj.name); |
4932 |
+-free_cache: |
4933 |
+- kfree(info); |
4934 |
++put_device: |
4935 |
++ put_device(dev); |
4936 |
+ } |
4937 |
+ |
4938 |
+ static void node_remove_caches(struct node *node) |
4939 |
+diff --git a/drivers/base/regmap/regmap-debugfs.c b/drivers/base/regmap/regmap-debugfs.c |
4940 |
+index ff2ee87987c7e..211a335a608d7 100644 |
4941 |
+--- a/drivers/base/regmap/regmap-debugfs.c |
4942 |
++++ b/drivers/base/regmap/regmap-debugfs.c |
4943 |
+@@ -660,6 +660,7 @@ void regmap_debugfs_exit(struct regmap *map) |
4944 |
+ regmap_debugfs_free_dump_cache(map); |
4945 |
+ mutex_unlock(&map->cache_lock); |
4946 |
+ kfree(map->debugfs_name); |
4947 |
++ map->debugfs_name = NULL; |
4948 |
+ } else { |
4949 |
+ struct regmap_debugfs_node *node, *tmp; |
4950 |
+ |
4951 |
+diff --git a/drivers/block/ataflop.c b/drivers/block/ataflop.c |
4952 |
+index 104b713f4055a..d601e49f80e07 100644 |
4953 |
+--- a/drivers/block/ataflop.c |
4954 |
++++ b/drivers/block/ataflop.c |
4955 |
+@@ -729,8 +729,12 @@ static int do_format(int drive, int type, struct atari_format_descr *desc) |
4956 |
+ unsigned long flags; |
4957 |
+ int ret; |
4958 |
+ |
4959 |
+- if (type) |
4960 |
++ if (type) { |
4961 |
+ type--; |
4962 |
++ if (type >= NUM_DISK_MINORS || |
4963 |
++ minor2disktype[type].drive_types > DriveType) |
4964 |
++ return -EINVAL; |
4965 |
++ } |
4966 |
+ |
4967 |
+ q = unit[drive].disk[type]->queue; |
4968 |
+ blk_mq_freeze_queue(q); |
4969 |
+@@ -742,11 +746,6 @@ static int do_format(int drive, int type, struct atari_format_descr *desc) |
4970 |
+ local_irq_restore(flags); |
4971 |
+ |
4972 |
+ if (type) { |
4973 |
+- if (type >= NUM_DISK_MINORS || |
4974 |
+- minor2disktype[type].drive_types > DriveType) { |
4975 |
+- ret = -EINVAL; |
4976 |
+- goto out; |
4977 |
+- } |
4978 |
+ type = minor2disktype[type].index; |
4979 |
+ UDT = &atari_disk_type[type]; |
4980 |
+ } |
4981 |
+@@ -2002,7 +2001,10 @@ static void ataflop_probe(dev_t dev) |
4982 |
+ int drive = MINOR(dev) & 3; |
4983 |
+ int type = MINOR(dev) >> 2; |
4984 |
+ |
4985 |
+- if (drive >= FD_MAX_UNITS || type > NUM_DISK_MINORS) |
4986 |
++ if (type) |
4987 |
++ type--; |
4988 |
++ |
4989 |
++ if (drive >= FD_MAX_UNITS || type >= NUM_DISK_MINORS) |
4990 |
+ return; |
4991 |
+ mutex_lock(&ataflop_probe_lock); |
4992 |
+ if (!unit[drive].disk[type]) { |
4993 |
+diff --git a/drivers/block/null_blk/zoned.c b/drivers/block/null_blk/zoned.c |
4994 |
+index fce0a54df0e5f..8e0656964f1c9 100644 |
4995 |
+--- a/drivers/block/null_blk/zoned.c |
4996 |
++++ b/drivers/block/null_blk/zoned.c |
4997 |
+@@ -180,6 +180,7 @@ int null_register_zoned_dev(struct nullb *nullb) |
4998 |
+ void null_free_zoned_dev(struct nullb_device *dev) |
4999 |
+ { |
5000 |
+ kvfree(dev->zones); |
5001 |
++ dev->zones = NULL; |
5002 |
+ } |
5003 |
+ |
5004 |
+ int null_report_zones(struct gendisk *disk, sector_t sector, |
5005 |
+diff --git a/drivers/block/rnbd/rnbd-clt-sysfs.c b/drivers/block/rnbd/rnbd-clt-sysfs.c |
5006 |
+index 526c77cd7a506..49ad400a52255 100644 |
5007 |
+--- a/drivers/block/rnbd/rnbd-clt-sysfs.c |
5008 |
++++ b/drivers/block/rnbd/rnbd-clt-sysfs.c |
5009 |
+@@ -483,11 +483,7 @@ static int rnbd_clt_get_path_name(struct rnbd_clt_dev *dev, char *buf, |
5010 |
+ while ((s = strchr(pathname, '/'))) |
5011 |
+ s[0] = '!'; |
5012 |
+ |
5013 |
+- ret = snprintf(buf, len, "%s", pathname); |
5014 |
+- if (ret >= len) |
5015 |
+- return -ENAMETOOLONG; |
5016 |
+- |
5017 |
+- ret = snprintf(buf, len, "%s@%s", buf, dev->sess->sessname); |
5018 |
++ ret = snprintf(buf, len, "%s@%s", pathname, dev->sess->sessname); |
5019 |
+ if (ret >= len) |
5020 |
+ return -ENAMETOOLONG; |
5021 |
+ |
5022 |
+diff --git a/drivers/block/xen-blkback/common.h b/drivers/block/xen-blkback/common.h |
5023 |
+index b0c71d3a81a02..bda5c815e4415 100644 |
5024 |
+--- a/drivers/block/xen-blkback/common.h |
5025 |
++++ b/drivers/block/xen-blkback/common.h |
5026 |
+@@ -313,6 +313,7 @@ struct xen_blkif { |
5027 |
+ |
5028 |
+ struct work_struct free_work; |
5029 |
+ unsigned int nr_ring_pages; |
5030 |
++ bool multi_ref; |
5031 |
+ /* All rings for this device. */ |
5032 |
+ struct xen_blkif_ring *rings; |
5033 |
+ unsigned int nr_rings; |
5034 |
+diff --git a/drivers/block/xen-blkback/xenbus.c b/drivers/block/xen-blkback/xenbus.c |
5035 |
+index 9860d4842f36c..6c5e9373e91c3 100644 |
5036 |
+--- a/drivers/block/xen-blkback/xenbus.c |
5037 |
++++ b/drivers/block/xen-blkback/xenbus.c |
5038 |
+@@ -998,14 +998,17 @@ static int read_per_ring_refs(struct xen_blkif_ring *ring, const char *dir) |
5039 |
+ for (i = 0; i < nr_grefs; i++) { |
5040 |
+ char ring_ref_name[RINGREF_NAME_LEN]; |
5041 |
+ |
5042 |
+- snprintf(ring_ref_name, RINGREF_NAME_LEN, "ring-ref%u", i); |
5043 |
++ if (blkif->multi_ref) |
5044 |
++ snprintf(ring_ref_name, RINGREF_NAME_LEN, "ring-ref%u", i); |
5045 |
++ else { |
5046 |
++ WARN_ON(i != 0); |
5047 |
++ snprintf(ring_ref_name, RINGREF_NAME_LEN, "ring-ref"); |
5048 |
++ } |
5049 |
++ |
5050 |
+ err = xenbus_scanf(XBT_NIL, dir, ring_ref_name, |
5051 |
+ "%u", &ring_ref[i]); |
5052 |
+ |
5053 |
+ if (err != 1) { |
5054 |
+- if (nr_grefs == 1) |
5055 |
+- break; |
5056 |
+- |
5057 |
+ err = -EINVAL; |
5058 |
+ xenbus_dev_fatal(dev, err, "reading %s/%s", |
5059 |
+ dir, ring_ref_name); |
5060 |
+@@ -1013,18 +1016,6 @@ static int read_per_ring_refs(struct xen_blkif_ring *ring, const char *dir) |
5061 |
+ } |
5062 |
+ } |
5063 |
+ |
5064 |
+- if (err != 1) { |
5065 |
+- WARN_ON(nr_grefs != 1); |
5066 |
+- |
5067 |
+- err = xenbus_scanf(XBT_NIL, dir, "ring-ref", "%u", |
5068 |
+- &ring_ref[0]); |
5069 |
+- if (err != 1) { |
5070 |
+- err = -EINVAL; |
5071 |
+- xenbus_dev_fatal(dev, err, "reading %s/ring-ref", dir); |
5072 |
+- return err; |
5073 |
+- } |
5074 |
+- } |
5075 |
+- |
5076 |
+ err = -ENOMEM; |
5077 |
+ for (i = 0; i < nr_grefs * XEN_BLKIF_REQS_PER_PAGE; i++) { |
5078 |
+ req = kzalloc(sizeof(*req), GFP_KERNEL); |
5079 |
+@@ -1129,10 +1120,15 @@ static int connect_ring(struct backend_info *be) |
5080 |
+ blkif->nr_rings, blkif->blk_protocol, protocol, |
5081 |
+ blkif->vbd.feature_gnt_persistent ? "persistent grants" : ""); |
5082 |
+ |
5083 |
+- ring_page_order = xenbus_read_unsigned(dev->otherend, |
5084 |
+- "ring-page-order", 0); |
5085 |
+- |
5086 |
+- if (ring_page_order > xen_blkif_max_ring_order) { |
5087 |
++ err = xenbus_scanf(XBT_NIL, dev->otherend, "ring-page-order", "%u", |
5088 |
++ &ring_page_order); |
5089 |
++ if (err != 1) { |
5090 |
++ blkif->nr_ring_pages = 1; |
5091 |
++ blkif->multi_ref = false; |
5092 |
++ } else if (ring_page_order <= xen_blkif_max_ring_order) { |
5093 |
++ blkif->nr_ring_pages = 1 << ring_page_order; |
5094 |
++ blkif->multi_ref = true; |
5095 |
++ } else { |
5096 |
+ err = -EINVAL; |
5097 |
+ xenbus_dev_fatal(dev, err, |
5098 |
+ "requested ring page order %d exceed max:%d", |
5099 |
+@@ -1141,8 +1137,6 @@ static int connect_ring(struct backend_info *be) |
5100 |
+ return err; |
5101 |
+ } |
5102 |
+ |
5103 |
+- blkif->nr_ring_pages = 1 << ring_page_order; |
5104 |
+- |
5105 |
+ if (blkif->nr_rings == 1) |
5106 |
+ return read_per_ring_refs(&blkif->rings[0], dev->otherend); |
5107 |
+ else { |
5108 |
+diff --git a/drivers/bus/qcom-ebi2.c b/drivers/bus/qcom-ebi2.c |
5109 |
+index 03ddcf426887b..0b8f53a688b8a 100644 |
5110 |
+--- a/drivers/bus/qcom-ebi2.c |
5111 |
++++ b/drivers/bus/qcom-ebi2.c |
5112 |
+@@ -353,8 +353,10 @@ static int qcom_ebi2_probe(struct platform_device *pdev) |
5113 |
+ |
5114 |
+ /* Figure out the chipselect */ |
5115 |
+ ret = of_property_read_u32(child, "reg", &csindex); |
5116 |
+- if (ret) |
5117 |
++ if (ret) { |
5118 |
++ of_node_put(child); |
5119 |
+ return ret; |
5120 |
++ } |
5121 |
+ |
5122 |
+ if (csindex > 5) { |
5123 |
+ dev_err(dev, |
5124 |
+diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c |
5125 |
+index 9e535336689fd..68145e326eb90 100644 |
5126 |
+--- a/drivers/bus/ti-sysc.c |
5127 |
++++ b/drivers/bus/ti-sysc.c |
5128 |
+@@ -901,9 +901,6 @@ static int sysc_map_and_check_registers(struct sysc *ddata) |
5129 |
+ struct device_node *np = ddata->dev->of_node; |
5130 |
+ int error; |
5131 |
+ |
5132 |
+- if (!of_get_property(np, "reg", NULL)) |
5133 |
+- return 0; |
5134 |
+- |
5135 |
+ error = sysc_parse_and_check_child_range(ddata); |
5136 |
+ if (error) |
5137 |
+ return error; |
5138 |
+@@ -914,6 +911,9 @@ static int sysc_map_and_check_registers(struct sysc *ddata) |
5139 |
+ |
5140 |
+ sysc_check_children(ddata); |
5141 |
+ |
5142 |
++ if (!of_get_property(np, "reg", NULL)) |
5143 |
++ return 0; |
5144 |
++ |
5145 |
+ error = sysc_parse_registers(ddata); |
5146 |
+ if (error) |
5147 |
+ return error; |
5148 |
+diff --git a/drivers/char/ttyprintk.c b/drivers/char/ttyprintk.c |
5149 |
+index 6a0059e508e38..93f5d11c830b7 100644 |
5150 |
+--- a/drivers/char/ttyprintk.c |
5151 |
++++ b/drivers/char/ttyprintk.c |
5152 |
+@@ -158,12 +158,23 @@ static int tpk_ioctl(struct tty_struct *tty, |
5153 |
+ return 0; |
5154 |
+ } |
5155 |
+ |
5156 |
++/* |
5157 |
++ * TTY operations hangup function. |
5158 |
++ */ |
5159 |
++static void tpk_hangup(struct tty_struct *tty) |
5160 |
++{ |
5161 |
++ struct ttyprintk_port *tpkp = tty->driver_data; |
5162 |
++ |
5163 |
++ tty_port_hangup(&tpkp->port); |
5164 |
++} |
5165 |
++ |
5166 |
+ static const struct tty_operations ttyprintk_ops = { |
5167 |
+ .open = tpk_open, |
5168 |
+ .close = tpk_close, |
5169 |
+ .write = tpk_write, |
5170 |
+ .write_room = tpk_write_room, |
5171 |
+ .ioctl = tpk_ioctl, |
5172 |
++ .hangup = tpk_hangup, |
5173 |
+ }; |
5174 |
+ |
5175 |
+ static const struct tty_port_operations null_ops = { }; |
5176 |
+diff --git a/drivers/clk/clk-ast2600.c b/drivers/clk/clk-ast2600.c |
5177 |
+index a55b37fc2c8bd..bc3be5f3eae15 100644 |
5178 |
+--- a/drivers/clk/clk-ast2600.c |
5179 |
++++ b/drivers/clk/clk-ast2600.c |
5180 |
+@@ -61,10 +61,10 @@ static void __iomem *scu_g6_base; |
5181 |
+ static const struct aspeed_gate_data aspeed_g6_gates[] = { |
5182 |
+ /* clk rst name parent flags */ |
5183 |
+ [ASPEED_CLK_GATE_MCLK] = { 0, -1, "mclk-gate", "mpll", CLK_IS_CRITICAL }, /* SDRAM */ |
5184 |
+- [ASPEED_CLK_GATE_ECLK] = { 1, -1, "eclk-gate", "eclk", 0 }, /* Video Engine */ |
5185 |
++ [ASPEED_CLK_GATE_ECLK] = { 1, 6, "eclk-gate", "eclk", 0 }, /* Video Engine */ |
5186 |
+ [ASPEED_CLK_GATE_GCLK] = { 2, 7, "gclk-gate", NULL, 0 }, /* 2D engine */ |
5187 |
+ /* vclk parent - dclk/d1clk/hclk/mclk */ |
5188 |
+- [ASPEED_CLK_GATE_VCLK] = { 3, 6, "vclk-gate", NULL, 0 }, /* Video Capture */ |
5189 |
++ [ASPEED_CLK_GATE_VCLK] = { 3, -1, "vclk-gate", NULL, 0 }, /* Video Capture */ |
5190 |
+ [ASPEED_CLK_GATE_BCLK] = { 4, 8, "bclk-gate", "bclk", 0 }, /* PCIe/PCI */ |
5191 |
+ /* From dpll */ |
5192 |
+ [ASPEED_CLK_GATE_DCLK] = { 5, -1, "dclk-gate", NULL, CLK_IS_CRITICAL }, /* DAC */ |
5193 |
+diff --git a/drivers/clk/imx/clk-imx25.c b/drivers/clk/imx/clk-imx25.c |
5194 |
+index a66cabfbf94f1..66192fe0a898c 100644 |
5195 |
+--- a/drivers/clk/imx/clk-imx25.c |
5196 |
++++ b/drivers/clk/imx/clk-imx25.c |
5197 |
+@@ -73,16 +73,6 @@ enum mx25_clks { |
5198 |
+ |
5199 |
+ static struct clk *clk[clk_max]; |
5200 |
+ |
5201 |
+-static struct clk ** const uart_clks[] __initconst = { |
5202 |
+- &clk[uart_ipg_per], |
5203 |
+- &clk[uart1_ipg], |
5204 |
+- &clk[uart2_ipg], |
5205 |
+- &clk[uart3_ipg], |
5206 |
+- &clk[uart4_ipg], |
5207 |
+- &clk[uart5_ipg], |
5208 |
+- NULL |
5209 |
+-}; |
5210 |
+- |
5211 |
+ static int __init __mx25_clocks_init(void __iomem *ccm_base) |
5212 |
+ { |
5213 |
+ BUG_ON(!ccm_base); |
5214 |
+@@ -228,7 +218,7 @@ static int __init __mx25_clocks_init(void __iomem *ccm_base) |
5215 |
+ */ |
5216 |
+ clk_set_parent(clk[cko_sel], clk[ipg]); |
5217 |
+ |
5218 |
+- imx_register_uart_clocks(uart_clks); |
5219 |
++ imx_register_uart_clocks(6); |
5220 |
+ |
5221 |
+ return 0; |
5222 |
+ } |
5223 |
+diff --git a/drivers/clk/imx/clk-imx27.c b/drivers/clk/imx/clk-imx27.c |
5224 |
+index 5585ded8b8c6f..56a5fc402b10c 100644 |
5225 |
+--- a/drivers/clk/imx/clk-imx27.c |
5226 |
++++ b/drivers/clk/imx/clk-imx27.c |
5227 |
+@@ -49,17 +49,6 @@ static const char *ssi_sel_clks[] = { "spll_gate", "mpll", }; |
5228 |
+ static struct clk *clk[IMX27_CLK_MAX]; |
5229 |
+ static struct clk_onecell_data clk_data; |
5230 |
+ |
5231 |
+-static struct clk ** const uart_clks[] __initconst = { |
5232 |
+- &clk[IMX27_CLK_PER1_GATE], |
5233 |
+- &clk[IMX27_CLK_UART1_IPG_GATE], |
5234 |
+- &clk[IMX27_CLK_UART2_IPG_GATE], |
5235 |
+- &clk[IMX27_CLK_UART3_IPG_GATE], |
5236 |
+- &clk[IMX27_CLK_UART4_IPG_GATE], |
5237 |
+- &clk[IMX27_CLK_UART5_IPG_GATE], |
5238 |
+- &clk[IMX27_CLK_UART6_IPG_GATE], |
5239 |
+- NULL |
5240 |
+-}; |
5241 |
+- |
5242 |
+ static void __init _mx27_clocks_init(unsigned long fref) |
5243 |
+ { |
5244 |
+ BUG_ON(!ccm); |
5245 |
+@@ -176,7 +165,7 @@ static void __init _mx27_clocks_init(unsigned long fref) |
5246 |
+ |
5247 |
+ clk_prepare_enable(clk[IMX27_CLK_EMI_AHB_GATE]); |
5248 |
+ |
5249 |
+- imx_register_uart_clocks(uart_clks); |
5250 |
++ imx_register_uart_clocks(7); |
5251 |
+ |
5252 |
+ imx_print_silicon_rev("i.MX27", mx27_revision()); |
5253 |
+ } |
5254 |
+diff --git a/drivers/clk/imx/clk-imx35.c b/drivers/clk/imx/clk-imx35.c |
5255 |
+index c1df03665c09a..0fe5ac2101566 100644 |
5256 |
+--- a/drivers/clk/imx/clk-imx35.c |
5257 |
++++ b/drivers/clk/imx/clk-imx35.c |
5258 |
+@@ -82,14 +82,6 @@ enum mx35_clks { |
5259 |
+ |
5260 |
+ static struct clk *clk[clk_max]; |
5261 |
+ |
5262 |
+-static struct clk ** const uart_clks[] __initconst = { |
5263 |
+- &clk[ipg], |
5264 |
+- &clk[uart1_gate], |
5265 |
+- &clk[uart2_gate], |
5266 |
+- &clk[uart3_gate], |
5267 |
+- NULL |
5268 |
+-}; |
5269 |
+- |
5270 |
+ static void __init _mx35_clocks_init(void) |
5271 |
+ { |
5272 |
+ void __iomem *base; |
5273 |
+@@ -243,7 +235,7 @@ static void __init _mx35_clocks_init(void) |
5274 |
+ */ |
5275 |
+ clk_prepare_enable(clk[scc_gate]); |
5276 |
+ |
5277 |
+- imx_register_uart_clocks(uart_clks); |
5278 |
++ imx_register_uart_clocks(4); |
5279 |
+ |
5280 |
+ imx_print_silicon_rev("i.MX35", mx35_revision()); |
5281 |
+ } |
5282 |
+diff --git a/drivers/clk/imx/clk-imx5.c b/drivers/clk/imx/clk-imx5.c |
5283 |
+index 01e079b810261..e4493846454dd 100644 |
5284 |
+--- a/drivers/clk/imx/clk-imx5.c |
5285 |
++++ b/drivers/clk/imx/clk-imx5.c |
5286 |
+@@ -128,30 +128,6 @@ static const char *ieee1588_sels[] = { "pll3_sw", "pll4_sw", "dummy" /* usbphy2_ |
5287 |
+ static struct clk *clk[IMX5_CLK_END]; |
5288 |
+ static struct clk_onecell_data clk_data; |
5289 |
+ |
5290 |
+-static struct clk ** const uart_clks_mx51[] __initconst = { |
5291 |
+- &clk[IMX5_CLK_UART1_IPG_GATE], |
5292 |
+- &clk[IMX5_CLK_UART1_PER_GATE], |
5293 |
+- &clk[IMX5_CLK_UART2_IPG_GATE], |
5294 |
+- &clk[IMX5_CLK_UART2_PER_GATE], |
5295 |
+- &clk[IMX5_CLK_UART3_IPG_GATE], |
5296 |
+- &clk[IMX5_CLK_UART3_PER_GATE], |
5297 |
+- NULL |
5298 |
+-}; |
5299 |
+- |
5300 |
+-static struct clk ** const uart_clks_mx50_mx53[] __initconst = { |
5301 |
+- &clk[IMX5_CLK_UART1_IPG_GATE], |
5302 |
+- &clk[IMX5_CLK_UART1_PER_GATE], |
5303 |
+- &clk[IMX5_CLK_UART2_IPG_GATE], |
5304 |
+- &clk[IMX5_CLK_UART2_PER_GATE], |
5305 |
+- &clk[IMX5_CLK_UART3_IPG_GATE], |
5306 |
+- &clk[IMX5_CLK_UART3_PER_GATE], |
5307 |
+- &clk[IMX5_CLK_UART4_IPG_GATE], |
5308 |
+- &clk[IMX5_CLK_UART4_PER_GATE], |
5309 |
+- &clk[IMX5_CLK_UART5_IPG_GATE], |
5310 |
+- &clk[IMX5_CLK_UART5_PER_GATE], |
5311 |
+- NULL |
5312 |
+-}; |
5313 |
+- |
5314 |
+ static void __init mx5_clocks_common_init(void __iomem *ccm_base) |
5315 |
+ { |
5316 |
+ clk[IMX5_CLK_DUMMY] = imx_clk_fixed("dummy", 0); |
5317 |
+@@ -382,7 +358,7 @@ static void __init mx50_clocks_init(struct device_node *np) |
5318 |
+ r = clk_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000); |
5319 |
+ clk_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r); |
5320 |
+ |
5321 |
+- imx_register_uart_clocks(uart_clks_mx50_mx53); |
5322 |
++ imx_register_uart_clocks(5); |
5323 |
+ } |
5324 |
+ CLK_OF_DECLARE(imx50_ccm, "fsl,imx50-ccm", mx50_clocks_init); |
5325 |
+ |
5326 |
+@@ -488,7 +464,7 @@ static void __init mx51_clocks_init(struct device_node *np) |
5327 |
+ val |= 1 << 23; |
5328 |
+ writel(val, MXC_CCM_CLPCR); |
5329 |
+ |
5330 |
+- imx_register_uart_clocks(uart_clks_mx51); |
5331 |
++ imx_register_uart_clocks(3); |
5332 |
+ } |
5333 |
+ CLK_OF_DECLARE(imx51_ccm, "fsl,imx51-ccm", mx51_clocks_init); |
5334 |
+ |
5335 |
+@@ -633,6 +609,6 @@ static void __init mx53_clocks_init(struct device_node *np) |
5336 |
+ r = clk_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000); |
5337 |
+ clk_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r); |
5338 |
+ |
5339 |
+- imx_register_uart_clocks(uart_clks_mx50_mx53); |
5340 |
++ imx_register_uart_clocks(5); |
5341 |
+ } |
5342 |
+ CLK_OF_DECLARE(imx53_ccm, "fsl,imx53-ccm", mx53_clocks_init); |
5343 |
+diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c |
5344 |
+index b2ff187cedabc..f444bbe8244c2 100644 |
5345 |
+--- a/drivers/clk/imx/clk-imx6q.c |
5346 |
++++ b/drivers/clk/imx/clk-imx6q.c |
5347 |
+@@ -140,13 +140,6 @@ static inline int clk_on_imx6dl(void) |
5348 |
+ return of_machine_is_compatible("fsl,imx6dl"); |
5349 |
+ } |
5350 |
+ |
5351 |
+-static const int uart_clk_ids[] __initconst = { |
5352 |
+- IMX6QDL_CLK_UART_IPG, |
5353 |
+- IMX6QDL_CLK_UART_SERIAL, |
5354 |
+-}; |
5355 |
+- |
5356 |
+-static struct clk **uart_clks[ARRAY_SIZE(uart_clk_ids) + 1] __initdata; |
5357 |
+- |
5358 |
+ static int ldb_di_sel_by_clock_id(int clock_id) |
5359 |
+ { |
5360 |
+ switch (clock_id) { |
5361 |
+@@ -440,7 +433,6 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) |
5362 |
+ struct device_node *np; |
5363 |
+ void __iomem *anatop_base, *base; |
5364 |
+ int ret; |
5365 |
+- int i; |
5366 |
+ |
5367 |
+ clk_hw_data = kzalloc(struct_size(clk_hw_data, hws, |
5368 |
+ IMX6QDL_CLK_END), GFP_KERNEL); |
5369 |
+@@ -982,12 +974,6 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) |
5370 |
+ hws[IMX6QDL_CLK_PLL3_USB_OTG]->clk); |
5371 |
+ } |
5372 |
+ |
5373 |
+- for (i = 0; i < ARRAY_SIZE(uart_clk_ids); i++) { |
5374 |
+- int index = uart_clk_ids[i]; |
5375 |
+- |
5376 |
+- uart_clks[i] = &hws[index]->clk; |
5377 |
+- } |
5378 |
+- |
5379 |
+- imx_register_uart_clocks(uart_clks); |
5380 |
++ imx_register_uart_clocks(1); |
5381 |
+ } |
5382 |
+ CLK_OF_DECLARE(imx6q, "fsl,imx6q-ccm", imx6q_clocks_init); |
5383 |
+diff --git a/drivers/clk/imx/clk-imx6sl.c b/drivers/clk/imx/clk-imx6sl.c |
5384 |
+index 2f9361946a0e1..d997b5b078183 100644 |
5385 |
+--- a/drivers/clk/imx/clk-imx6sl.c |
5386 |
++++ b/drivers/clk/imx/clk-imx6sl.c |
5387 |
+@@ -178,19 +178,11 @@ void imx6sl_set_wait_clk(bool enter) |
5388 |
+ imx6sl_enable_pll_arm(false); |
5389 |
+ } |
5390 |
+ |
5391 |
+-static const int uart_clk_ids[] __initconst = { |
5392 |
+- IMX6SL_CLK_UART, |
5393 |
+- IMX6SL_CLK_UART_SERIAL, |
5394 |
+-}; |
5395 |
+- |
5396 |
+-static struct clk **uart_clks[ARRAY_SIZE(uart_clk_ids) + 1] __initdata; |
5397 |
+- |
5398 |
+ static void __init imx6sl_clocks_init(struct device_node *ccm_node) |
5399 |
+ { |
5400 |
+ struct device_node *np; |
5401 |
+ void __iomem *base; |
5402 |
+ int ret; |
5403 |
+- int i; |
5404 |
+ |
5405 |
+ clk_hw_data = kzalloc(struct_size(clk_hw_data, hws, |
5406 |
+ IMX6SL_CLK_END), GFP_KERNEL); |
5407 |
+@@ -447,12 +439,6 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node) |
5408 |
+ clk_set_parent(hws[IMX6SL_CLK_LCDIF_AXI_SEL]->clk, |
5409 |
+ hws[IMX6SL_CLK_PLL2_PFD2]->clk); |
5410 |
+ |
5411 |
+- for (i = 0; i < ARRAY_SIZE(uart_clk_ids); i++) { |
5412 |
+- int index = uart_clk_ids[i]; |
5413 |
+- |
5414 |
+- uart_clks[i] = &hws[index]->clk; |
5415 |
+- } |
5416 |
+- |
5417 |
+- imx_register_uart_clocks(uart_clks); |
5418 |
++ imx_register_uart_clocks(2); |
5419 |
+ } |
5420 |
+ CLK_OF_DECLARE(imx6sl, "fsl,imx6sl-ccm", imx6sl_clocks_init); |
5421 |
+diff --git a/drivers/clk/imx/clk-imx6sll.c b/drivers/clk/imx/clk-imx6sll.c |
5422 |
+index 8e8288bda4d0b..31d777f300395 100644 |
5423 |
+--- a/drivers/clk/imx/clk-imx6sll.c |
5424 |
++++ b/drivers/clk/imx/clk-imx6sll.c |
5425 |
+@@ -76,26 +76,10 @@ static u32 share_count_ssi1; |
5426 |
+ static u32 share_count_ssi2; |
5427 |
+ static u32 share_count_ssi3; |
5428 |
+ |
5429 |
+-static const int uart_clk_ids[] __initconst = { |
5430 |
+- IMX6SLL_CLK_UART1_IPG, |
5431 |
+- IMX6SLL_CLK_UART1_SERIAL, |
5432 |
+- IMX6SLL_CLK_UART2_IPG, |
5433 |
+- IMX6SLL_CLK_UART2_SERIAL, |
5434 |
+- IMX6SLL_CLK_UART3_IPG, |
5435 |
+- IMX6SLL_CLK_UART3_SERIAL, |
5436 |
+- IMX6SLL_CLK_UART4_IPG, |
5437 |
+- IMX6SLL_CLK_UART4_SERIAL, |
5438 |
+- IMX6SLL_CLK_UART5_IPG, |
5439 |
+- IMX6SLL_CLK_UART5_SERIAL, |
5440 |
+-}; |
5441 |
+- |
5442 |
+-static struct clk **uart_clks[ARRAY_SIZE(uart_clk_ids) + 1] __initdata; |
5443 |
+- |
5444 |
+ static void __init imx6sll_clocks_init(struct device_node *ccm_node) |
5445 |
+ { |
5446 |
+ struct device_node *np; |
5447 |
+ void __iomem *base; |
5448 |
+- int i; |
5449 |
+ |
5450 |
+ clk_hw_data = kzalloc(struct_size(clk_hw_data, hws, |
5451 |
+ IMX6SLL_CLK_END), GFP_KERNEL); |
5452 |
+@@ -356,13 +340,7 @@ static void __init imx6sll_clocks_init(struct device_node *ccm_node) |
5453 |
+ |
5454 |
+ of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_hw_data); |
5455 |
+ |
5456 |
+- for (i = 0; i < ARRAY_SIZE(uart_clk_ids); i++) { |
5457 |
+- int index = uart_clk_ids[i]; |
5458 |
+- |
5459 |
+- uart_clks[i] = &hws[index]->clk; |
5460 |
+- } |
5461 |
+- |
5462 |
+- imx_register_uart_clocks(uart_clks); |
5463 |
++ imx_register_uart_clocks(5); |
5464 |
+ |
5465 |
+ /* Lower the AHB clock rate before changing the clock source. */ |
5466 |
+ clk_set_rate(hws[IMX6SLL_CLK_AHB]->clk, 99000000); |
5467 |
+diff --git a/drivers/clk/imx/clk-imx6sx.c b/drivers/clk/imx/clk-imx6sx.c |
5468 |
+index 20dcce526d072..fc1bd23d45834 100644 |
5469 |
+--- a/drivers/clk/imx/clk-imx6sx.c |
5470 |
++++ b/drivers/clk/imx/clk-imx6sx.c |
5471 |
+@@ -117,18 +117,10 @@ static u32 share_count_ssi3; |
5472 |
+ static u32 share_count_sai1; |
5473 |
+ static u32 share_count_sai2; |
5474 |
+ |
5475 |
+-static const int uart_clk_ids[] __initconst = { |
5476 |
+- IMX6SX_CLK_UART_IPG, |
5477 |
+- IMX6SX_CLK_UART_SERIAL, |
5478 |
+-}; |
5479 |
+- |
5480 |
+-static struct clk **uart_clks[ARRAY_SIZE(uart_clk_ids) + 1] __initdata; |
5481 |
+- |
5482 |
+ static void __init imx6sx_clocks_init(struct device_node *ccm_node) |
5483 |
+ { |
5484 |
+ struct device_node *np; |
5485 |
+ void __iomem *base; |
5486 |
+- int i; |
5487 |
+ |
5488 |
+ clk_hw_data = kzalloc(struct_size(clk_hw_data, hws, |
5489 |
+ IMX6SX_CLK_CLK_END), GFP_KERNEL); |
5490 |
+@@ -556,12 +548,6 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node) |
5491 |
+ clk_set_parent(hws[IMX6SX_CLK_QSPI1_SEL]->clk, hws[IMX6SX_CLK_PLL2_BUS]->clk); |
5492 |
+ clk_set_parent(hws[IMX6SX_CLK_QSPI2_SEL]->clk, hws[IMX6SX_CLK_PLL2_BUS]->clk); |
5493 |
+ |
5494 |
+- for (i = 0; i < ARRAY_SIZE(uart_clk_ids); i++) { |
5495 |
+- int index = uart_clk_ids[i]; |
5496 |
+- |
5497 |
+- uart_clks[i] = &hws[index]->clk; |
5498 |
+- } |
5499 |
+- |
5500 |
+- imx_register_uart_clocks(uart_clks); |
5501 |
++ imx_register_uart_clocks(2); |
5502 |
+ } |
5503 |
+ CLK_OF_DECLARE(imx6sx, "fsl,imx6sx-ccm", imx6sx_clocks_init); |
5504 |
+diff --git a/drivers/clk/imx/clk-imx7d.c b/drivers/clk/imx/clk-imx7d.c |
5505 |
+index 22d24a6a05e70..c4e0f1c07192f 100644 |
5506 |
+--- a/drivers/clk/imx/clk-imx7d.c |
5507 |
++++ b/drivers/clk/imx/clk-imx7d.c |
5508 |
+@@ -377,23 +377,10 @@ static const char *pll_video_bypass_sel[] = { "pll_video_main", "pll_video_main_ |
5509 |
+ static struct clk_hw **hws; |
5510 |
+ static struct clk_hw_onecell_data *clk_hw_data; |
5511 |
+ |
5512 |
+-static const int uart_clk_ids[] __initconst = { |
5513 |
+- IMX7D_UART1_ROOT_CLK, |
5514 |
+- IMX7D_UART2_ROOT_CLK, |
5515 |
+- IMX7D_UART3_ROOT_CLK, |
5516 |
+- IMX7D_UART4_ROOT_CLK, |
5517 |
+- IMX7D_UART5_ROOT_CLK, |
5518 |
+- IMX7D_UART6_ROOT_CLK, |
5519 |
+- IMX7D_UART7_ROOT_CLK, |
5520 |
+-}; |
5521 |
+- |
5522 |
+-static struct clk **uart_clks[ARRAY_SIZE(uart_clk_ids) + 1] __initdata; |
5523 |
+- |
5524 |
+ static void __init imx7d_clocks_init(struct device_node *ccm_node) |
5525 |
+ { |
5526 |
+ struct device_node *np; |
5527 |
+ void __iomem *base; |
5528 |
+- int i; |
5529 |
+ |
5530 |
+ clk_hw_data = kzalloc(struct_size(clk_hw_data, hws, |
5531 |
+ IMX7D_CLK_END), GFP_KERNEL); |
5532 |
+@@ -897,14 +884,7 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node) |
5533 |
+ hws[IMX7D_USB1_MAIN_480M_CLK] = imx_clk_hw_fixed_factor("pll_usb1_main_clk", "osc", 20, 1); |
5534 |
+ hws[IMX7D_USB_MAIN_480M_CLK] = imx_clk_hw_fixed_factor("pll_usb_main_clk", "osc", 20, 1); |
5535 |
+ |
5536 |
+- for (i = 0; i < ARRAY_SIZE(uart_clk_ids); i++) { |
5537 |
+- int index = uart_clk_ids[i]; |
5538 |
+- |
5539 |
+- uart_clks[i] = &hws[index]->clk; |
5540 |
+- } |
5541 |
+- |
5542 |
+- |
5543 |
+- imx_register_uart_clocks(uart_clks); |
5544 |
++ imx_register_uart_clocks(7); |
5545 |
+ |
5546 |
+ } |
5547 |
+ CLK_OF_DECLARE(imx7d, "fsl,imx7d-ccm", imx7d_clocks_init); |
5548 |
+diff --git a/drivers/clk/imx/clk-imx7ulp.c b/drivers/clk/imx/clk-imx7ulp.c |
5549 |
+index 634c0b6636b0e..779e09105da7d 100644 |
5550 |
+--- a/drivers/clk/imx/clk-imx7ulp.c |
5551 |
++++ b/drivers/clk/imx/clk-imx7ulp.c |
5552 |
+@@ -43,19 +43,6 @@ static const struct clk_div_table ulp_div_table[] = { |
5553 |
+ { /* sentinel */ }, |
5554 |
+ }; |
5555 |
+ |
5556 |
+-static const int pcc2_uart_clk_ids[] __initconst = { |
5557 |
+- IMX7ULP_CLK_LPUART4, |
5558 |
+- IMX7ULP_CLK_LPUART5, |
5559 |
+-}; |
5560 |
+- |
5561 |
+-static const int pcc3_uart_clk_ids[] __initconst = { |
5562 |
+- IMX7ULP_CLK_LPUART6, |
5563 |
+- IMX7ULP_CLK_LPUART7, |
5564 |
+-}; |
5565 |
+- |
5566 |
+-static struct clk **pcc2_uart_clks[ARRAY_SIZE(pcc2_uart_clk_ids) + 1] __initdata; |
5567 |
+-static struct clk **pcc3_uart_clks[ARRAY_SIZE(pcc3_uart_clk_ids) + 1] __initdata; |
5568 |
+- |
5569 |
+ static void __init imx7ulp_clk_scg1_init(struct device_node *np) |
5570 |
+ { |
5571 |
+ struct clk_hw_onecell_data *clk_data; |
5572 |
+@@ -150,7 +137,6 @@ static void __init imx7ulp_clk_pcc2_init(struct device_node *np) |
5573 |
+ struct clk_hw_onecell_data *clk_data; |
5574 |
+ struct clk_hw **hws; |
5575 |
+ void __iomem *base; |
5576 |
+- int i; |
5577 |
+ |
5578 |
+ clk_data = kzalloc(struct_size(clk_data, hws, IMX7ULP_CLK_PCC2_END), |
5579 |
+ GFP_KERNEL); |
5580 |
+@@ -190,13 +176,7 @@ static void __init imx7ulp_clk_pcc2_init(struct device_node *np) |
5581 |
+ |
5582 |
+ of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_data); |
5583 |
+ |
5584 |
+- for (i = 0; i < ARRAY_SIZE(pcc2_uart_clk_ids); i++) { |
5585 |
+- int index = pcc2_uart_clk_ids[i]; |
5586 |
+- |
5587 |
+- pcc2_uart_clks[i] = &hws[index]->clk; |
5588 |
+- } |
5589 |
+- |
5590 |
+- imx_register_uart_clocks(pcc2_uart_clks); |
5591 |
++ imx_register_uart_clocks(2); |
5592 |
+ } |
5593 |
+ CLK_OF_DECLARE(imx7ulp_clk_pcc2, "fsl,imx7ulp-pcc2", imx7ulp_clk_pcc2_init); |
5594 |
+ |
5595 |
+@@ -205,7 +185,6 @@ static void __init imx7ulp_clk_pcc3_init(struct device_node *np) |
5596 |
+ struct clk_hw_onecell_data *clk_data; |
5597 |
+ struct clk_hw **hws; |
5598 |
+ void __iomem *base; |
5599 |
+- int i; |
5600 |
+ |
5601 |
+ clk_data = kzalloc(struct_size(clk_data, hws, IMX7ULP_CLK_PCC3_END), |
5602 |
+ GFP_KERNEL); |
5603 |
+@@ -244,13 +223,7 @@ static void __init imx7ulp_clk_pcc3_init(struct device_node *np) |
5604 |
+ |
5605 |
+ of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_data); |
5606 |
+ |
5607 |
+- for (i = 0; i < ARRAY_SIZE(pcc3_uart_clk_ids); i++) { |
5608 |
+- int index = pcc3_uart_clk_ids[i]; |
5609 |
+- |
5610 |
+- pcc3_uart_clks[i] = &hws[index]->clk; |
5611 |
+- } |
5612 |
+- |
5613 |
+- imx_register_uart_clocks(pcc3_uart_clks); |
5614 |
++ imx_register_uart_clocks(7); |
5615 |
+ } |
5616 |
+ CLK_OF_DECLARE(imx7ulp_clk_pcc3, "fsl,imx7ulp-pcc3", imx7ulp_clk_pcc3_init); |
5617 |
+ |
5618 |
+diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c |
5619 |
+index 7c905861af5dc..209775140fe8c 100644 |
5620 |
+--- a/drivers/clk/imx/clk-imx8mm.c |
5621 |
++++ b/drivers/clk/imx/clk-imx8mm.c |
5622 |
+@@ -291,20 +291,12 @@ static const char *imx8mm_clko2_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll1_ |
5623 |
+ static struct clk_hw_onecell_data *clk_hw_data; |
5624 |
+ static struct clk_hw **hws; |
5625 |
+ |
5626 |
+-static const int uart_clk_ids[] = { |
5627 |
+- IMX8MM_CLK_UART1_ROOT, |
5628 |
+- IMX8MM_CLK_UART2_ROOT, |
5629 |
+- IMX8MM_CLK_UART3_ROOT, |
5630 |
+- IMX8MM_CLK_UART4_ROOT, |
5631 |
+-}; |
5632 |
+-static struct clk **uart_hws[ARRAY_SIZE(uart_clk_ids) + 1]; |
5633 |
+- |
5634 |
+ static int imx8mm_clocks_probe(struct platform_device *pdev) |
5635 |
+ { |
5636 |
+ struct device *dev = &pdev->dev; |
5637 |
+ struct device_node *np = dev->of_node; |
5638 |
+ void __iomem *base; |
5639 |
+- int ret, i; |
5640 |
++ int ret; |
5641 |
+ |
5642 |
+ clk_hw_data = kzalloc(struct_size(clk_hw_data, hws, |
5643 |
+ IMX8MM_CLK_END), GFP_KERNEL); |
5644 |
+@@ -622,13 +614,7 @@ static int imx8mm_clocks_probe(struct platform_device *pdev) |
5645 |
+ goto unregister_hws; |
5646 |
+ } |
5647 |
+ |
5648 |
+- for (i = 0; i < ARRAY_SIZE(uart_clk_ids); i++) { |
5649 |
+- int index = uart_clk_ids[i]; |
5650 |
+- |
5651 |
+- uart_hws[i] = &hws[index]->clk; |
5652 |
+- } |
5653 |
+- |
5654 |
+- imx_register_uart_clocks(uart_hws); |
5655 |
++ imx_register_uart_clocks(4); |
5656 |
+ |
5657 |
+ return 0; |
5658 |
+ |
5659 |
+diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c |
5660 |
+index 3c21db942d5bc..43098186abeb4 100644 |
5661 |
+--- a/drivers/clk/imx/clk-imx8mn.c |
5662 |
++++ b/drivers/clk/imx/clk-imx8mn.c |
5663 |
+@@ -284,20 +284,12 @@ static const char * const imx8mn_clko2_sels[] = {"osc_24m", "sys_pll2_200m", "sy |
5664 |
+ static struct clk_hw_onecell_data *clk_hw_data; |
5665 |
+ static struct clk_hw **hws; |
5666 |
+ |
5667 |
+-static const int uart_clk_ids[] = { |
5668 |
+- IMX8MN_CLK_UART1_ROOT, |
5669 |
+- IMX8MN_CLK_UART2_ROOT, |
5670 |
+- IMX8MN_CLK_UART3_ROOT, |
5671 |
+- IMX8MN_CLK_UART4_ROOT, |
5672 |
+-}; |
5673 |
+-static struct clk **uart_hws[ARRAY_SIZE(uart_clk_ids) + 1]; |
5674 |
+- |
5675 |
+ static int imx8mn_clocks_probe(struct platform_device *pdev) |
5676 |
+ { |
5677 |
+ struct device *dev = &pdev->dev; |
5678 |
+ struct device_node *np = dev->of_node; |
5679 |
+ void __iomem *base; |
5680 |
+- int ret, i; |
5681 |
++ int ret; |
5682 |
+ |
5683 |
+ clk_hw_data = kzalloc(struct_size(clk_hw_data, hws, |
5684 |
+ IMX8MN_CLK_END), GFP_KERNEL); |
5685 |
+@@ -573,13 +565,7 @@ static int imx8mn_clocks_probe(struct platform_device *pdev) |
5686 |
+ goto unregister_hws; |
5687 |
+ } |
5688 |
+ |
5689 |
+- for (i = 0; i < ARRAY_SIZE(uart_clk_ids); i++) { |
5690 |
+- int index = uart_clk_ids[i]; |
5691 |
+- |
5692 |
+- uart_hws[i] = &hws[index]->clk; |
5693 |
+- } |
5694 |
+- |
5695 |
+- imx_register_uart_clocks(uart_hws); |
5696 |
++ imx_register_uart_clocks(4); |
5697 |
+ |
5698 |
+ return 0; |
5699 |
+ |
5700 |
+diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c |
5701 |
+index 2f4e1d674e1c1..3e6557e7d559b 100644 |
5702 |
+--- a/drivers/clk/imx/clk-imx8mp.c |
5703 |
++++ b/drivers/clk/imx/clk-imx8mp.c |
5704 |
+@@ -414,20 +414,11 @@ static const char * const imx8mp_dram_core_sels[] = {"dram_pll_out", "dram_alt_r |
5705 |
+ static struct clk_hw **hws; |
5706 |
+ static struct clk_hw_onecell_data *clk_hw_data; |
5707 |
+ |
5708 |
+-static const int uart_clk_ids[] = { |
5709 |
+- IMX8MP_CLK_UART1_ROOT, |
5710 |
+- IMX8MP_CLK_UART2_ROOT, |
5711 |
+- IMX8MP_CLK_UART3_ROOT, |
5712 |
+- IMX8MP_CLK_UART4_ROOT, |
5713 |
+-}; |
5714 |
+-static struct clk **uart_clks[ARRAY_SIZE(uart_clk_ids) + 1]; |
5715 |
+- |
5716 |
+ static int imx8mp_clocks_probe(struct platform_device *pdev) |
5717 |
+ { |
5718 |
+ struct device *dev = &pdev->dev; |
5719 |
+ struct device_node *np; |
5720 |
+ void __iomem *anatop_base, *ccm_base; |
5721 |
+- int i; |
5722 |
+ |
5723 |
+ np = of_find_compatible_node(NULL, NULL, "fsl,imx8mp-anatop"); |
5724 |
+ anatop_base = of_iomap(np, 0); |
5725 |
+@@ -737,13 +728,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev) |
5726 |
+ |
5727 |
+ of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_hw_data); |
5728 |
+ |
5729 |
+- for (i = 0; i < ARRAY_SIZE(uart_clk_ids); i++) { |
5730 |
+- int index = uart_clk_ids[i]; |
5731 |
+- |
5732 |
+- uart_clks[i] = &hws[index]->clk; |
5733 |
+- } |
5734 |
+- |
5735 |
+- imx_register_uart_clocks(uart_clks); |
5736 |
++ imx_register_uart_clocks(4); |
5737 |
+ |
5738 |
+ return 0; |
5739 |
+ } |
5740 |
+diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c |
5741 |
+index 779ea69e639cf..3d539e9f9c92f 100644 |
5742 |
+--- a/drivers/clk/imx/clk-imx8mq.c |
5743 |
++++ b/drivers/clk/imx/clk-imx8mq.c |
5744 |
+@@ -273,20 +273,12 @@ static const char * const imx8mq_clko2_sels[] = {"osc_25m", "sys2_pll_200m", "sy |
5745 |
+ static struct clk_hw_onecell_data *clk_hw_data; |
5746 |
+ static struct clk_hw **hws; |
5747 |
+ |
5748 |
+-static const int uart_clk_ids[] = { |
5749 |
+- IMX8MQ_CLK_UART1_ROOT, |
5750 |
+- IMX8MQ_CLK_UART2_ROOT, |
5751 |
+- IMX8MQ_CLK_UART3_ROOT, |
5752 |
+- IMX8MQ_CLK_UART4_ROOT, |
5753 |
+-}; |
5754 |
+-static struct clk **uart_hws[ARRAY_SIZE(uart_clk_ids) + 1]; |
5755 |
+- |
5756 |
+ static int imx8mq_clocks_probe(struct platform_device *pdev) |
5757 |
+ { |
5758 |
+ struct device *dev = &pdev->dev; |
5759 |
+ struct device_node *np = dev->of_node; |
5760 |
+ void __iomem *base; |
5761 |
+- int err, i; |
5762 |
++ int err; |
5763 |
+ |
5764 |
+ clk_hw_data = kzalloc(struct_size(clk_hw_data, hws, |
5765 |
+ IMX8MQ_CLK_END), GFP_KERNEL); |
5766 |
+@@ -607,13 +599,7 @@ static int imx8mq_clocks_probe(struct platform_device *pdev) |
5767 |
+ goto unregister_hws; |
5768 |
+ } |
5769 |
+ |
5770 |
+- for (i = 0; i < ARRAY_SIZE(uart_clk_ids); i++) { |
5771 |
+- int index = uart_clk_ids[i]; |
5772 |
+- |
5773 |
+- uart_hws[i] = &hws[index]->clk; |
5774 |
+- } |
5775 |
+- |
5776 |
+- imx_register_uart_clocks(uart_hws); |
5777 |
++ imx_register_uart_clocks(4); |
5778 |
+ |
5779 |
+ return 0; |
5780 |
+ |
5781 |
+diff --git a/drivers/clk/imx/clk.c b/drivers/clk/imx/clk.c |
5782 |
+index 47882c51cb853..7cc669934253a 100644 |
5783 |
+--- a/drivers/clk/imx/clk.c |
5784 |
++++ b/drivers/clk/imx/clk.c |
5785 |
+@@ -147,8 +147,10 @@ void imx_cscmr1_fixup(u32 *val) |
5786 |
+ } |
5787 |
+ |
5788 |
+ #ifndef MODULE |
5789 |
+-static int imx_keep_uart_clocks; |
5790 |
+-static struct clk ** const *imx_uart_clocks; |
5791 |
++ |
5792 |
++static bool imx_keep_uart_clocks; |
5793 |
++static int imx_enabled_uart_clocks; |
5794 |
++static struct clk **imx_uart_clocks; |
5795 |
+ |
5796 |
+ static int __init imx_keep_uart_clocks_param(char *str) |
5797 |
+ { |
5798 |
+@@ -161,24 +163,45 @@ __setup_param("earlycon", imx_keep_uart_earlycon, |
5799 |
+ __setup_param("earlyprintk", imx_keep_uart_earlyprintk, |
5800 |
+ imx_keep_uart_clocks_param, 0); |
5801 |
+ |
5802 |
+-void imx_register_uart_clocks(struct clk ** const clks[]) |
5803 |
++void imx_register_uart_clocks(unsigned int clk_count) |
5804 |
+ { |
5805 |
++ imx_enabled_uart_clocks = 0; |
5806 |
++ |
5807 |
++/* i.MX boards use device trees now. For build tests without CONFIG_OF, do nothing */ |
5808 |
++#ifdef CONFIG_OF |
5809 |
+ if (imx_keep_uart_clocks) { |
5810 |
+ int i; |
5811 |
+ |
5812 |
+- imx_uart_clocks = clks; |
5813 |
+- for (i = 0; imx_uart_clocks[i]; i++) |
5814 |
+- clk_prepare_enable(*imx_uart_clocks[i]); |
5815 |
++ imx_uart_clocks = kcalloc(clk_count, sizeof(struct clk *), GFP_KERNEL); |
5816 |
++ |
5817 |
++ if (!of_stdout) |
5818 |
++ return; |
5819 |
++ |
5820 |
++ for (i = 0; i < clk_count; i++) { |
5821 |
++ imx_uart_clocks[imx_enabled_uart_clocks] = of_clk_get(of_stdout, i); |
5822 |
++ |
5823 |
++ /* Stop if there are no more of_stdout references */ |
5824 |
++ if (IS_ERR(imx_uart_clocks[imx_enabled_uart_clocks])) |
5825 |
++ return; |
5826 |
++ |
5827 |
++ /* Only enable the clock if it's not NULL */ |
5828 |
++ if (imx_uart_clocks[imx_enabled_uart_clocks]) |
5829 |
++ clk_prepare_enable(imx_uart_clocks[imx_enabled_uart_clocks++]); |
5830 |
++ } |
5831 |
+ } |
5832 |
++#endif |
5833 |
+ } |
5834 |
+ |
5835 |
+ static int __init imx_clk_disable_uart(void) |
5836 |
+ { |
5837 |
+- if (imx_keep_uart_clocks && imx_uart_clocks) { |
5838 |
++ if (imx_keep_uart_clocks && imx_enabled_uart_clocks) { |
5839 |
+ int i; |
5840 |
+ |
5841 |
+- for (i = 0; imx_uart_clocks[i]; i++) |
5842 |
+- clk_disable_unprepare(*imx_uart_clocks[i]); |
5843 |
++ for (i = 0; i < imx_enabled_uart_clocks; i++) { |
5844 |
++ clk_disable_unprepare(imx_uart_clocks[i]); |
5845 |
++ clk_put(imx_uart_clocks[i]); |
5846 |
++ } |
5847 |
++ kfree(imx_uart_clocks); |
5848 |
+ } |
5849 |
+ |
5850 |
+ return 0; |
5851 |
+diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h |
5852 |
+index 4f04c8287286f..7571603bee23b 100644 |
5853 |
+--- a/drivers/clk/imx/clk.h |
5854 |
++++ b/drivers/clk/imx/clk.h |
5855 |
+@@ -11,9 +11,9 @@ extern spinlock_t imx_ccm_lock; |
5856 |
+ void imx_check_clocks(struct clk *clks[], unsigned int count); |
5857 |
+ void imx_check_clk_hws(struct clk_hw *clks[], unsigned int count); |
5858 |
+ #ifndef MODULE |
5859 |
+-void imx_register_uart_clocks(struct clk ** const clks[]); |
5860 |
++void imx_register_uart_clocks(unsigned int clk_count); |
5861 |
+ #else |
5862 |
+-static inline void imx_register_uart_clocks(struct clk ** const clks[]) |
5863 |
++static inline void imx_register_uart_clocks(unsigned int clk_count) |
5864 |
+ { |
5865 |
+ } |
5866 |
+ #endif |
5867 |
+diff --git a/drivers/clk/mvebu/armada-37xx-periph.c b/drivers/clk/mvebu/armada-37xx-periph.c |
5868 |
+index f5746f9ea929f..32ac6b6b75306 100644 |
5869 |
+--- a/drivers/clk/mvebu/armada-37xx-periph.c |
5870 |
++++ b/drivers/clk/mvebu/armada-37xx-periph.c |
5871 |
+@@ -84,6 +84,7 @@ struct clk_pm_cpu { |
5872 |
+ void __iomem *reg_div; |
5873 |
+ u8 shift_div; |
5874 |
+ struct regmap *nb_pm_base; |
5875 |
++ unsigned long l1_expiration; |
5876 |
+ }; |
5877 |
+ |
5878 |
+ #define to_clk_double_div(_hw) container_of(_hw, struct clk_double_div, hw) |
5879 |
+@@ -440,33 +441,6 @@ static u8 clk_pm_cpu_get_parent(struct clk_hw *hw) |
5880 |
+ return val; |
5881 |
+ } |
5882 |
+ |
5883 |
+-static int clk_pm_cpu_set_parent(struct clk_hw *hw, u8 index) |
5884 |
+-{ |
5885 |
+- struct clk_pm_cpu *pm_cpu = to_clk_pm_cpu(hw); |
5886 |
+- struct regmap *base = pm_cpu->nb_pm_base; |
5887 |
+- int load_level; |
5888 |
+- |
5889 |
+- /* |
5890 |
+- * We set the clock parent only if the DVFS is available but |
5891 |
+- * not enabled. |
5892 |
+- */ |
5893 |
+- if (IS_ERR(base) || armada_3700_pm_dvfs_is_enabled(base)) |
5894 |
+- return -EINVAL; |
5895 |
+- |
5896 |
+- /* Set the parent clock for all the load level */ |
5897 |
+- for (load_level = 0; load_level < LOAD_LEVEL_NR; load_level++) { |
5898 |
+- unsigned int reg, mask, val, |
5899 |
+- offset = ARMADA_37XX_NB_TBG_SEL_OFF; |
5900 |
+- |
5901 |
+- armada_3700_pm_dvfs_update_regs(load_level, ®, &offset); |
5902 |
+- |
5903 |
+- val = index << offset; |
5904 |
+- mask = ARMADA_37XX_NB_TBG_SEL_MASK << offset; |
5905 |
+- regmap_update_bits(base, reg, mask, val); |
5906 |
+- } |
5907 |
+- return 0; |
5908 |
+-} |
5909 |
+- |
5910 |
+ static unsigned long clk_pm_cpu_recalc_rate(struct clk_hw *hw, |
5911 |
+ unsigned long parent_rate) |
5912 |
+ { |
5913 |
+@@ -514,8 +488,10 @@ static long clk_pm_cpu_round_rate(struct clk_hw *hw, unsigned long rate, |
5914 |
+ } |
5915 |
+ |
5916 |
+ /* |
5917 |
+- * Switching the CPU from the L2 or L3 frequencies (300 and 200 Mhz |
5918 |
+- * respectively) to L0 frequency (1.2 Ghz) requires a significant |
5919 |
++ * Workaround when base CPU frequnecy is 1000 or 1200 MHz |
5920 |
++ * |
5921 |
++ * Switching the CPU from the L2 or L3 frequencies (250/300 or 200 MHz |
5922 |
++ * respectively) to L0 frequency (1/1.2 GHz) requires a significant |
5923 |
+ * amount of time to let VDD stabilize to the appropriate |
5924 |
+ * voltage. This amount of time is large enough that it cannot be |
5925 |
+ * covered by the hardware countdown register. Due to this, the CPU |
5926 |
+@@ -525,26 +501,56 @@ static long clk_pm_cpu_round_rate(struct clk_hw *hw, unsigned long rate, |
5927 |
+ * To work around this problem, we prevent switching directly from the |
5928 |
+ * L2/L3 frequencies to the L0 frequency, and instead switch to the L1 |
5929 |
+ * frequency in-between. The sequence therefore becomes: |
5930 |
+- * 1. First switch from L2/L3(200/300MHz) to L1(600MHZ) |
5931 |
++ * 1. First switch from L2/L3 (200/250/300 MHz) to L1 (500/600 MHz) |
5932 |
+ * 2. Sleep 20ms for stabling VDD voltage |
5933 |
+- * 3. Then switch from L1(600MHZ) to L0(1200Mhz). |
5934 |
++ * 3. Then switch from L1 (500/600 MHz) to L0 (1000/1200 MHz). |
5935 |
+ */ |
5936 |
+-static void clk_pm_cpu_set_rate_wa(unsigned long rate, struct regmap *base) |
5937 |
++static void clk_pm_cpu_set_rate_wa(struct clk_pm_cpu *pm_cpu, |
5938 |
++ unsigned int new_level, unsigned long rate, |
5939 |
++ struct regmap *base) |
5940 |
+ { |
5941 |
+ unsigned int cur_level; |
5942 |
+ |
5943 |
+- if (rate != 1200 * 1000 * 1000) |
5944 |
+- return; |
5945 |
+- |
5946 |
+ regmap_read(base, ARMADA_37XX_NB_CPU_LOAD, &cur_level); |
5947 |
+ cur_level &= ARMADA_37XX_NB_CPU_LOAD_MASK; |
5948 |
+- if (cur_level <= ARMADA_37XX_DVFS_LOAD_1) |
5949 |
++ |
5950 |
++ if (cur_level == new_level) |
5951 |
++ return; |
5952 |
++ |
5953 |
++ /* |
5954 |
++ * System wants to go to L1 on its own. If we are going from L2/L3, |
5955 |
++ * remember when 20ms will expire. If from L0, set the value so that |
5956 |
++ * next switch to L0 won't have to wait. |
5957 |
++ */ |
5958 |
++ if (new_level == ARMADA_37XX_DVFS_LOAD_1) { |
5959 |
++ if (cur_level == ARMADA_37XX_DVFS_LOAD_0) |
5960 |
++ pm_cpu->l1_expiration = jiffies; |
5961 |
++ else |
5962 |
++ pm_cpu->l1_expiration = jiffies + msecs_to_jiffies(20); |
5963 |
+ return; |
5964 |
++ } |
5965 |
++ |
5966 |
++ /* |
5967 |
++ * If we are setting to L2/L3, just invalidate L1 expiration time, |
5968 |
++ * sleeping is not needed. |
5969 |
++ */ |
5970 |
++ if (rate < 1000*1000*1000) |
5971 |
++ goto invalidate_l1_exp; |
5972 |
++ |
5973 |
++ /* |
5974 |
++ * We are going to L0 with rate >= 1GHz. Check whether we have been at |
5975 |
++ * L1 for long enough time. If not, go to L1 for 20ms. |
5976 |
++ */ |
5977 |
++ if (pm_cpu->l1_expiration && jiffies >= pm_cpu->l1_expiration) |
5978 |
++ goto invalidate_l1_exp; |
5979 |
+ |
5980 |
+ regmap_update_bits(base, ARMADA_37XX_NB_CPU_LOAD, |
5981 |
+ ARMADA_37XX_NB_CPU_LOAD_MASK, |
5982 |
+ ARMADA_37XX_DVFS_LOAD_1); |
5983 |
+ msleep(20); |
5984 |
++ |
5985 |
++invalidate_l1_exp: |
5986 |
++ pm_cpu->l1_expiration = 0; |
5987 |
+ } |
5988 |
+ |
5989 |
+ static int clk_pm_cpu_set_rate(struct clk_hw *hw, unsigned long rate, |
5990 |
+@@ -578,7 +584,9 @@ static int clk_pm_cpu_set_rate(struct clk_hw *hw, unsigned long rate, |
5991 |
+ reg = ARMADA_37XX_NB_CPU_LOAD; |
5992 |
+ mask = ARMADA_37XX_NB_CPU_LOAD_MASK; |
5993 |
+ |
5994 |
+- clk_pm_cpu_set_rate_wa(rate, base); |
5995 |
++ /* Apply workaround when base CPU frequency is 1000 or 1200 MHz */ |
5996 |
++ if (parent_rate >= 1000*1000*1000) |
5997 |
++ clk_pm_cpu_set_rate_wa(pm_cpu, load_level, rate, base); |
5998 |
+ |
5999 |
+ regmap_update_bits(base, reg, mask, load_level); |
6000 |
+ |
6001 |
+@@ -592,7 +600,6 @@ static int clk_pm_cpu_set_rate(struct clk_hw *hw, unsigned long rate, |
6002 |
+ |
6003 |
+ static const struct clk_ops clk_pm_cpu_ops = { |
6004 |
+ .get_parent = clk_pm_cpu_get_parent, |
6005 |
+- .set_parent = clk_pm_cpu_set_parent, |
6006 |
+ .round_rate = clk_pm_cpu_round_rate, |
6007 |
+ .set_rate = clk_pm_cpu_set_rate, |
6008 |
+ .recalc_rate = clk_pm_cpu_recalc_rate, |
6009 |
+diff --git a/drivers/clk/qcom/a53-pll.c b/drivers/clk/qcom/a53-pll.c |
6010 |
+index 45cfc57bff924..af6ac17c7daeb 100644 |
6011 |
+--- a/drivers/clk/qcom/a53-pll.c |
6012 |
++++ b/drivers/clk/qcom/a53-pll.c |
6013 |
+@@ -93,6 +93,7 @@ static const struct of_device_id qcom_a53pll_match_table[] = { |
6014 |
+ { .compatible = "qcom,msm8916-a53pll" }, |
6015 |
+ { } |
6016 |
+ }; |
6017 |
++MODULE_DEVICE_TABLE(of, qcom_a53pll_match_table); |
6018 |
+ |
6019 |
+ static struct platform_driver qcom_a53pll_driver = { |
6020 |
+ .probe = qcom_a53pll_probe, |
6021 |
+diff --git a/drivers/clk/qcom/apss-ipq-pll.c b/drivers/clk/qcom/apss-ipq-pll.c |
6022 |
+index 30be87fb222aa..bef7899ad0d66 100644 |
6023 |
+--- a/drivers/clk/qcom/apss-ipq-pll.c |
6024 |
++++ b/drivers/clk/qcom/apss-ipq-pll.c |
6025 |
+@@ -81,6 +81,7 @@ static const struct of_device_id apss_ipq_pll_match_table[] = { |
6026 |
+ { .compatible = "qcom,ipq6018-a53pll" }, |
6027 |
+ { } |
6028 |
+ }; |
6029 |
++MODULE_DEVICE_TABLE(of, apss_ipq_pll_match_table); |
6030 |
+ |
6031 |
+ static struct platform_driver apss_ipq_pll_driver = { |
6032 |
+ .probe = apss_ipq_pll_probe, |
6033 |
+diff --git a/drivers/clk/uniphier/clk-uniphier-mux.c b/drivers/clk/uniphier/clk-uniphier-mux.c |
6034 |
+index 462c84321b2d2..1998e9d4cfc02 100644 |
6035 |
+--- a/drivers/clk/uniphier/clk-uniphier-mux.c |
6036 |
++++ b/drivers/clk/uniphier/clk-uniphier-mux.c |
6037 |
+@@ -31,10 +31,10 @@ static int uniphier_clk_mux_set_parent(struct clk_hw *hw, u8 index) |
6038 |
+ static u8 uniphier_clk_mux_get_parent(struct clk_hw *hw) |
6039 |
+ { |
6040 |
+ struct uniphier_clk_mux *mux = to_uniphier_clk_mux(hw); |
6041 |
+- int num_parents = clk_hw_get_num_parents(hw); |
6042 |
++ unsigned int num_parents = clk_hw_get_num_parents(hw); |
6043 |
+ int ret; |
6044 |
+ unsigned int val; |
6045 |
+- u8 i; |
6046 |
++ unsigned int i; |
6047 |
+ |
6048 |
+ ret = regmap_read(mux->regmap, mux->reg, &val); |
6049 |
+ if (ret) |
6050 |
+diff --git a/drivers/clk/zynqmp/pll.c b/drivers/clk/zynqmp/pll.c |
6051 |
+index 92f449ed38e51..abe6afbf3407b 100644 |
6052 |
+--- a/drivers/clk/zynqmp/pll.c |
6053 |
++++ b/drivers/clk/zynqmp/pll.c |
6054 |
+@@ -14,10 +14,12 @@ |
6055 |
+ * struct zynqmp_pll - PLL clock |
6056 |
+ * @hw: Handle between common and hardware-specific interfaces |
6057 |
+ * @clk_id: PLL clock ID |
6058 |
++ * @set_pll_mode: Whether an IOCTL_SET_PLL_FRAC_MODE request be sent to ATF |
6059 |
+ */ |
6060 |
+ struct zynqmp_pll { |
6061 |
+ struct clk_hw hw; |
6062 |
+ u32 clk_id; |
6063 |
++ bool set_pll_mode; |
6064 |
+ }; |
6065 |
+ |
6066 |
+ #define to_zynqmp_pll(_hw) container_of(_hw, struct zynqmp_pll, hw) |
6067 |
+@@ -81,6 +83,8 @@ static inline void zynqmp_pll_set_mode(struct clk_hw *hw, bool on) |
6068 |
+ if (ret) |
6069 |
+ pr_warn_once("%s() PLL set frac mode failed for %s, ret = %d\n", |
6070 |
+ __func__, clk_name, ret); |
6071 |
++ else |
6072 |
++ clk->set_pll_mode = true; |
6073 |
+ } |
6074 |
+ |
6075 |
+ /** |
6076 |
+@@ -100,9 +104,7 @@ static long zynqmp_pll_round_rate(struct clk_hw *hw, unsigned long rate, |
6077 |
+ /* Enable the fractional mode if needed */ |
6078 |
+ rate_div = (rate * FRAC_DIV) / *prate; |
6079 |
+ f = rate_div % FRAC_DIV; |
6080 |
+- zynqmp_pll_set_mode(hw, !!f); |
6081 |
+- |
6082 |
+- if (zynqmp_pll_get_mode(hw) == PLL_MODE_FRAC) { |
6083 |
++ if (f) { |
6084 |
+ if (rate > PS_PLL_VCO_MAX) { |
6085 |
+ fbdiv = rate / PS_PLL_VCO_MAX; |
6086 |
+ rate = rate / (fbdiv + 1); |
6087 |
+@@ -173,10 +175,12 @@ static int zynqmp_pll_set_rate(struct clk_hw *hw, unsigned long rate, |
6088 |
+ long rate_div, frac, m, f; |
6089 |
+ int ret; |
6090 |
+ |
6091 |
+- if (zynqmp_pll_get_mode(hw) == PLL_MODE_FRAC) { |
6092 |
+- rate_div = (rate * FRAC_DIV) / parent_rate; |
6093 |
++ rate_div = (rate * FRAC_DIV) / parent_rate; |
6094 |
++ f = rate_div % FRAC_DIV; |
6095 |
++ zynqmp_pll_set_mode(hw, !!f); |
6096 |
++ |
6097 |
++ if (f) { |
6098 |
+ m = rate_div / FRAC_DIV; |
6099 |
+- f = rate_div % FRAC_DIV; |
6100 |
+ m = clamp_t(u32, m, (PLL_FBDIV_MIN), (PLL_FBDIV_MAX)); |
6101 |
+ rate = parent_rate * m; |
6102 |
+ frac = (parent_rate * f) / FRAC_DIV; |
6103 |
+@@ -240,9 +244,15 @@ static int zynqmp_pll_enable(struct clk_hw *hw) |
6104 |
+ u32 clk_id = clk->clk_id; |
6105 |
+ int ret; |
6106 |
+ |
6107 |
+- if (zynqmp_pll_is_enabled(hw)) |
6108 |
++ /* |
6109 |
++ * Don't skip enabling clock if there is an IOCTL_SET_PLL_FRAC_MODE request |
6110 |
++ * that has been sent to ATF. |
6111 |
++ */ |
6112 |
++ if (zynqmp_pll_is_enabled(hw) && (!clk->set_pll_mode)) |
6113 |
+ return 0; |
6114 |
+ |
6115 |
++ clk->set_pll_mode = false; |
6116 |
++ |
6117 |
+ ret = zynqmp_pm_clock_enable(clk_id); |
6118 |
+ if (ret) |
6119 |
+ pr_warn_once("%s() clock enable failed for %s, ret = %d\n", |
6120 |
+diff --git a/drivers/clocksource/ingenic-ost.c b/drivers/clocksource/ingenic-ost.c |
6121 |
+index 029efc2731b49..6af2470136bd2 100644 |
6122 |
+--- a/drivers/clocksource/ingenic-ost.c |
6123 |
++++ b/drivers/clocksource/ingenic-ost.c |
6124 |
+@@ -88,9 +88,9 @@ static int __init ingenic_ost_probe(struct platform_device *pdev) |
6125 |
+ return PTR_ERR(ost->regs); |
6126 |
+ |
6127 |
+ map = device_node_to_regmap(dev->parent->of_node); |
6128 |
+- if (!map) { |
6129 |
++ if (IS_ERR(map)) { |
6130 |
+ dev_err(dev, "regmap not found"); |
6131 |
+- return -EINVAL; |
6132 |
++ return PTR_ERR(map); |
6133 |
+ } |
6134 |
+ |
6135 |
+ ost->clk = devm_clk_get(dev, "ost"); |
6136 |
+diff --git a/drivers/clocksource/timer-ti-dm-systimer.c b/drivers/clocksource/timer-ti-dm-systimer.c |
6137 |
+index 33b3e8aa2cc50..3fae9ebb58b83 100644 |
6138 |
+--- a/drivers/clocksource/timer-ti-dm-systimer.c |
6139 |
++++ b/drivers/clocksource/timer-ti-dm-systimer.c |
6140 |
+@@ -449,13 +449,13 @@ static int dmtimer_set_next_event(unsigned long cycles, |
6141 |
+ struct dmtimer_systimer *t = &clkevt->t; |
6142 |
+ void __iomem *pend = t->base + t->pend; |
6143 |
+ |
6144 |
+- writel_relaxed(0xffffffff - cycles, t->base + t->counter); |
6145 |
+ while (readl_relaxed(pend) & WP_TCRR) |
6146 |
+ cpu_relax(); |
6147 |
++ writel_relaxed(0xffffffff - cycles, t->base + t->counter); |
6148 |
+ |
6149 |
+- writel_relaxed(OMAP_TIMER_CTRL_ST, t->base + t->ctrl); |
6150 |
+ while (readl_relaxed(pend) & WP_TCLR) |
6151 |
+ cpu_relax(); |
6152 |
++ writel_relaxed(OMAP_TIMER_CTRL_ST, t->base + t->ctrl); |
6153 |
+ |
6154 |
+ return 0; |
6155 |
+ } |
6156 |
+@@ -490,18 +490,18 @@ static int dmtimer_set_periodic(struct clock_event_device *evt) |
6157 |
+ dmtimer_clockevent_shutdown(evt); |
6158 |
+ |
6159 |
+ /* Looks like we need to first set the load value separately */ |
6160 |
+- writel_relaxed(clkevt->period, t->base + t->load); |
6161 |
+ while (readl_relaxed(pend) & WP_TLDR) |
6162 |
+ cpu_relax(); |
6163 |
++ writel_relaxed(clkevt->period, t->base + t->load); |
6164 |
+ |
6165 |
+- writel_relaxed(clkevt->period, t->base + t->counter); |
6166 |
+ while (readl_relaxed(pend) & WP_TCRR) |
6167 |
+ cpu_relax(); |
6168 |
++ writel_relaxed(clkevt->period, t->base + t->counter); |
6169 |
+ |
6170 |
+- writel_relaxed(OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST, |
6171 |
+- t->base + t->ctrl); |
6172 |
+ while (readl_relaxed(pend) & WP_TCLR) |
6173 |
+ cpu_relax(); |
6174 |
++ writel_relaxed(OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST, |
6175 |
++ t->base + t->ctrl); |
6176 |
+ |
6177 |
+ return 0; |
6178 |
+ } |
6179 |
+@@ -554,6 +554,7 @@ static int __init dmtimer_clockevent_init(struct device_node *np) |
6180 |
+ dev->set_state_shutdown = dmtimer_clockevent_shutdown; |
6181 |
+ dev->set_state_periodic = dmtimer_set_periodic; |
6182 |
+ dev->set_state_oneshot = dmtimer_clockevent_shutdown; |
6183 |
++ dev->set_state_oneshot_stopped = dmtimer_clockevent_shutdown; |
6184 |
+ dev->tick_resume = dmtimer_clockevent_shutdown; |
6185 |
+ dev->cpumask = cpu_possible_mask; |
6186 |
+ |
6187 |
+diff --git a/drivers/cpufreq/armada-37xx-cpufreq.c b/drivers/cpufreq/armada-37xx-cpufreq.c |
6188 |
+index b4af4094309b0..e4782f562e7a9 100644 |
6189 |
+--- a/drivers/cpufreq/armada-37xx-cpufreq.c |
6190 |
++++ b/drivers/cpufreq/armada-37xx-cpufreq.c |
6191 |
+@@ -25,6 +25,10 @@ |
6192 |
+ |
6193 |
+ #include "cpufreq-dt.h" |
6194 |
+ |
6195 |
++/* Clk register set */ |
6196 |
++#define ARMADA_37XX_CLK_TBG_SEL 0 |
6197 |
++#define ARMADA_37XX_CLK_TBG_SEL_CPU_OFF 22 |
6198 |
++ |
6199 |
+ /* Power management in North Bridge register set */ |
6200 |
+ #define ARMADA_37XX_NB_L0L1 0x18 |
6201 |
+ #define ARMADA_37XX_NB_L2L3 0x1C |
6202 |
+@@ -69,6 +73,8 @@ |
6203 |
+ #define LOAD_LEVEL_NR 4 |
6204 |
+ |
6205 |
+ #define MIN_VOLT_MV 1000 |
6206 |
++#define MIN_VOLT_MV_FOR_L1_1000MHZ 1108 |
6207 |
++#define MIN_VOLT_MV_FOR_L1_1200MHZ 1155 |
6208 |
+ |
6209 |
+ /* AVS value for the corresponding voltage (in mV) */ |
6210 |
+ static int avs_map[] = { |
6211 |
+@@ -120,10 +126,15 @@ static struct armada_37xx_dvfs *armada_37xx_cpu_freq_info_get(u32 freq) |
6212 |
+ * will be configured then the DVFS will be enabled. |
6213 |
+ */ |
6214 |
+ static void __init armada37xx_cpufreq_dvfs_setup(struct regmap *base, |
6215 |
+- struct clk *clk, u8 *divider) |
6216 |
++ struct regmap *clk_base, u8 *divider) |
6217 |
+ { |
6218 |
++ u32 cpu_tbg_sel; |
6219 |
+ int load_lvl; |
6220 |
+- struct clk *parent; |
6221 |
++ |
6222 |
++ /* Determine to which TBG clock is CPU connected */ |
6223 |
++ regmap_read(clk_base, ARMADA_37XX_CLK_TBG_SEL, &cpu_tbg_sel); |
6224 |
++ cpu_tbg_sel >>= ARMADA_37XX_CLK_TBG_SEL_CPU_OFF; |
6225 |
++ cpu_tbg_sel &= ARMADA_37XX_NB_TBG_SEL_MASK; |
6226 |
+ |
6227 |
+ for (load_lvl = 0; load_lvl < LOAD_LEVEL_NR; load_lvl++) { |
6228 |
+ unsigned int reg, mask, val, offset = 0; |
6229 |
+@@ -142,6 +153,11 @@ static void __init armada37xx_cpufreq_dvfs_setup(struct regmap *base, |
6230 |
+ mask = (ARMADA_37XX_NB_CLK_SEL_MASK |
6231 |
+ << ARMADA_37XX_NB_CLK_SEL_OFF); |
6232 |
+ |
6233 |
++ /* Set TBG index, for all levels we use the same TBG */ |
6234 |
++ val = cpu_tbg_sel << ARMADA_37XX_NB_TBG_SEL_OFF; |
6235 |
++ mask = (ARMADA_37XX_NB_TBG_SEL_MASK |
6236 |
++ << ARMADA_37XX_NB_TBG_SEL_OFF); |
6237 |
++ |
6238 |
+ /* |
6239 |
+ * Set cpu divider based on the pre-computed array in |
6240 |
+ * order to have balanced step. |
6241 |
+@@ -160,14 +176,6 @@ static void __init armada37xx_cpufreq_dvfs_setup(struct regmap *base, |
6242 |
+ |
6243 |
+ regmap_update_bits(base, reg, mask, val); |
6244 |
+ } |
6245 |
+- |
6246 |
+- /* |
6247 |
+- * Set cpu clock source, for all the level we keep the same |
6248 |
+- * clock source that the one already configured. For this one |
6249 |
+- * we need to use the clock framework |
6250 |
+- */ |
6251 |
+- parent = clk_get_parent(clk); |
6252 |
+- clk_set_parent(clk, parent); |
6253 |
+ } |
6254 |
+ |
6255 |
+ /* |
6256 |
+@@ -202,6 +210,8 @@ static u32 armada_37xx_avs_val_match(int target_vm) |
6257 |
+ * - L2 & L3 voltage should be about 150mv smaller than L0 voltage. |
6258 |
+ * This function calculates L1 & L2 & L3 AVS values dynamically based |
6259 |
+ * on L0 voltage and fill all AVS values to the AVS value table. |
6260 |
++ * When base CPU frequency is 1000 or 1200 MHz then there is additional |
6261 |
++ * minimal avs value for load L1. |
6262 |
+ */ |
6263 |
+ static void __init armada37xx_cpufreq_avs_configure(struct regmap *base, |
6264 |
+ struct armada_37xx_dvfs *dvfs) |
6265 |
+@@ -233,6 +243,19 @@ static void __init armada37xx_cpufreq_avs_configure(struct regmap *base, |
6266 |
+ for (load_level = 1; load_level < LOAD_LEVEL_NR; load_level++) |
6267 |
+ dvfs->avs[load_level] = avs_min; |
6268 |
+ |
6269 |
++ /* |
6270 |
++ * Set the avs values for load L0 and L1 when base CPU frequency |
6271 |
++ * is 1000/1200 MHz to its typical initial values according to |
6272 |
++ * the Armada 3700 Hardware Specifications. |
6273 |
++ */ |
6274 |
++ if (dvfs->cpu_freq_max >= 1000*1000*1000) { |
6275 |
++ if (dvfs->cpu_freq_max >= 1200*1000*1000) |
6276 |
++ avs_min = armada_37xx_avs_val_match(MIN_VOLT_MV_FOR_L1_1200MHZ); |
6277 |
++ else |
6278 |
++ avs_min = armada_37xx_avs_val_match(MIN_VOLT_MV_FOR_L1_1000MHZ); |
6279 |
++ dvfs->avs[0] = dvfs->avs[1] = avs_min; |
6280 |
++ } |
6281 |
++ |
6282 |
+ return; |
6283 |
+ } |
6284 |
+ |
6285 |
+@@ -252,6 +275,26 @@ static void __init armada37xx_cpufreq_avs_configure(struct regmap *base, |
6286 |
+ target_vm = avs_map[l0_vdd_min] - 150; |
6287 |
+ target_vm = target_vm > MIN_VOLT_MV ? target_vm : MIN_VOLT_MV; |
6288 |
+ dvfs->avs[2] = dvfs->avs[3] = armada_37xx_avs_val_match(target_vm); |
6289 |
++ |
6290 |
++ /* |
6291 |
++ * Fix the avs value for load L1 when base CPU frequency is 1000/1200 MHz, |
6292 |
++ * otherwise the CPU gets stuck when switching from load L1 to load L0. |
6293 |
++ * Also ensure that avs value for load L1 is not higher than for L0. |
6294 |
++ */ |
6295 |
++ if (dvfs->cpu_freq_max >= 1000*1000*1000) { |
6296 |
++ u32 avs_min_l1; |
6297 |
++ |
6298 |
++ if (dvfs->cpu_freq_max >= 1200*1000*1000) |
6299 |
++ avs_min_l1 = armada_37xx_avs_val_match(MIN_VOLT_MV_FOR_L1_1200MHZ); |
6300 |
++ else |
6301 |
++ avs_min_l1 = armada_37xx_avs_val_match(MIN_VOLT_MV_FOR_L1_1000MHZ); |
6302 |
++ |
6303 |
++ if (avs_min_l1 > dvfs->avs[0]) |
6304 |
++ avs_min_l1 = dvfs->avs[0]; |
6305 |
++ |
6306 |
++ if (dvfs->avs[1] < avs_min_l1) |
6307 |
++ dvfs->avs[1] = avs_min_l1; |
6308 |
++ } |
6309 |
+ } |
6310 |
+ |
6311 |
+ static void __init armada37xx_cpufreq_avs_setup(struct regmap *base, |
6312 |
+@@ -358,11 +401,16 @@ static int __init armada37xx_cpufreq_driver_init(void) |
6313 |
+ struct platform_device *pdev; |
6314 |
+ unsigned long freq; |
6315 |
+ unsigned int cur_frequency, base_frequency; |
6316 |
+- struct regmap *nb_pm_base, *avs_base; |
6317 |
++ struct regmap *nb_clk_base, *nb_pm_base, *avs_base; |
6318 |
+ struct device *cpu_dev; |
6319 |
+ int load_lvl, ret; |
6320 |
+ struct clk *clk, *parent; |
6321 |
+ |
6322 |
++ nb_clk_base = |
6323 |
++ syscon_regmap_lookup_by_compatible("marvell,armada-3700-periph-clock-nb"); |
6324 |
++ if (IS_ERR(nb_clk_base)) |
6325 |
++ return -ENODEV; |
6326 |
++ |
6327 |
+ nb_pm_base = |
6328 |
+ syscon_regmap_lookup_by_compatible("marvell,armada-3700-nb-pm"); |
6329 |
+ |
6330 |
+@@ -421,7 +469,7 @@ static int __init armada37xx_cpufreq_driver_init(void) |
6331 |
+ return -EINVAL; |
6332 |
+ } |
6333 |
+ |
6334 |
+- dvfs = armada_37xx_cpu_freq_info_get(cur_frequency); |
6335 |
++ dvfs = armada_37xx_cpu_freq_info_get(base_frequency); |
6336 |
+ if (!dvfs) { |
6337 |
+ clk_put(clk); |
6338 |
+ return -EINVAL; |
6339 |
+@@ -439,7 +487,7 @@ static int __init armada37xx_cpufreq_driver_init(void) |
6340 |
+ armada37xx_cpufreq_avs_configure(avs_base, dvfs); |
6341 |
+ armada37xx_cpufreq_avs_setup(avs_base, dvfs); |
6342 |
+ |
6343 |
+- armada37xx_cpufreq_dvfs_setup(nb_pm_base, clk, dvfs->divider); |
6344 |
++ armada37xx_cpufreq_dvfs_setup(nb_pm_base, nb_clk_base, dvfs->divider); |
6345 |
+ clk_put(clk); |
6346 |
+ |
6347 |
+ for (load_lvl = ARMADA_37XX_DVFS_LOAD_0; load_lvl < LOAD_LEVEL_NR; |
6348 |
+@@ -473,7 +521,7 @@ disable_dvfs: |
6349 |
+ remove_opp: |
6350 |
+ /* clean-up the already added opp before leaving */ |
6351 |
+ while (load_lvl-- > ARMADA_37XX_DVFS_LOAD_0) { |
6352 |
+- freq = cur_frequency / dvfs->divider[load_lvl]; |
6353 |
++ freq = base_frequency / dvfs->divider[load_lvl]; |
6354 |
+ dev_pm_opp_remove(cpu_dev, freq); |
6355 |
+ } |
6356 |
+ |
6357 |
+diff --git a/drivers/cpuidle/Kconfig.arm b/drivers/cpuidle/Kconfig.arm |
6358 |
+index 0844fadc4be85..334f83e56120c 100644 |
6359 |
+--- a/drivers/cpuidle/Kconfig.arm |
6360 |
++++ b/drivers/cpuidle/Kconfig.arm |
6361 |
+@@ -107,7 +107,7 @@ config ARM_TEGRA_CPUIDLE |
6362 |
+ |
6363 |
+ config ARM_QCOM_SPM_CPUIDLE |
6364 |
+ bool "CPU Idle Driver for Qualcomm Subsystem Power Manager (SPM)" |
6365 |
+- depends on (ARCH_QCOM || COMPILE_TEST) && !ARM64 |
6366 |
++ depends on (ARCH_QCOM || COMPILE_TEST) && !ARM64 && MMU |
6367 |
+ select ARM_CPU_SUSPEND |
6368 |
+ select CPU_IDLE_MULTIPLE_DRIVERS |
6369 |
+ select DT_IDLE_STATES |
6370 |
+diff --git a/drivers/crypto/allwinner/Kconfig b/drivers/crypto/allwinner/Kconfig |
6371 |
+index 180c8a9db819d..02e6855a6ed78 100644 |
6372 |
+--- a/drivers/crypto/allwinner/Kconfig |
6373 |
++++ b/drivers/crypto/allwinner/Kconfig |
6374 |
+@@ -62,10 +62,10 @@ config CRYPTO_DEV_SUN8I_CE_DEBUG |
6375 |
+ config CRYPTO_DEV_SUN8I_CE_HASH |
6376 |
+ bool "Enable support for hash on sun8i-ce" |
6377 |
+ depends on CRYPTO_DEV_SUN8I_CE |
6378 |
+- select MD5 |
6379 |
+- select SHA1 |
6380 |
+- select SHA256 |
6381 |
+- select SHA512 |
6382 |
++ select CRYPTO_MD5 |
6383 |
++ select CRYPTO_SHA1 |
6384 |
++ select CRYPTO_SHA256 |
6385 |
++ select CRYPTO_SHA512 |
6386 |
+ help |
6387 |
+ Say y to enable support for hash algorithms. |
6388 |
+ |
6389 |
+@@ -123,8 +123,8 @@ config CRYPTO_DEV_SUN8I_SS_PRNG |
6390 |
+ config CRYPTO_DEV_SUN8I_SS_HASH |
6391 |
+ bool "Enable support for hash on sun8i-ss" |
6392 |
+ depends on CRYPTO_DEV_SUN8I_SS |
6393 |
+- select MD5 |
6394 |
+- select SHA1 |
6395 |
+- select SHA256 |
6396 |
++ select CRYPTO_MD5 |
6397 |
++ select CRYPTO_SHA1 |
6398 |
++ select CRYPTO_SHA256 |
6399 |
+ help |
6400 |
+ Say y to enable support for hash algorithms. |
6401 |
+diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c |
6402 |
+index 11cbcbc83a7b6..64446b86c927f 100644 |
6403 |
+--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c |
6404 |
++++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c |
6405 |
+@@ -348,8 +348,10 @@ int sun8i_ss_hash_run(struct crypto_engine *engine, void *breq) |
6406 |
+ bf = (__le32 *)pad; |
6407 |
+ |
6408 |
+ result = kzalloc(digestsize, GFP_KERNEL | GFP_DMA); |
6409 |
+- if (!result) |
6410 |
++ if (!result) { |
6411 |
++ kfree(pad); |
6412 |
+ return -ENOMEM; |
6413 |
++ } |
6414 |
+ |
6415 |
+ for (i = 0; i < MAX_SG; i++) { |
6416 |
+ rctx->t_dst[i].addr = 0; |
6417 |
+@@ -435,11 +437,10 @@ int sun8i_ss_hash_run(struct crypto_engine *engine, void *breq) |
6418 |
+ dma_unmap_sg(ss->dev, areq->src, nr_sgs, DMA_TO_DEVICE); |
6419 |
+ dma_unmap_single(ss->dev, addr_res, digestsize, DMA_FROM_DEVICE); |
6420 |
+ |
6421 |
+- kfree(pad); |
6422 |
+- |
6423 |
+ memcpy(areq->result, result, algt->alg.hash.halg.digestsize); |
6424 |
+- kfree(result); |
6425 |
+ theend: |
6426 |
++ kfree(pad); |
6427 |
++ kfree(result); |
6428 |
+ crypto_finalize_hash_request(engine, breq, err); |
6429 |
+ return 0; |
6430 |
+ } |
6431 |
+diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-prng.c b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-prng.c |
6432 |
+index 08a1473b21457..3191527928e41 100644 |
6433 |
+--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-prng.c |
6434 |
++++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-prng.c |
6435 |
+@@ -103,7 +103,8 @@ int sun8i_ss_prng_generate(struct crypto_rng *tfm, const u8 *src, |
6436 |
+ dma_iv = dma_map_single(ss->dev, ctx->seed, ctx->slen, DMA_TO_DEVICE); |
6437 |
+ if (dma_mapping_error(ss->dev, dma_iv)) { |
6438 |
+ dev_err(ss->dev, "Cannot DMA MAP IV\n"); |
6439 |
+- return -EFAULT; |
6440 |
++ err = -EFAULT; |
6441 |
++ goto err_free; |
6442 |
+ } |
6443 |
+ |
6444 |
+ dma_dst = dma_map_single(ss->dev, d, todo, DMA_FROM_DEVICE); |
6445 |
+@@ -167,6 +168,7 @@ err_iv: |
6446 |
+ memcpy(ctx->seed, d + dlen, ctx->slen); |
6447 |
+ } |
6448 |
+ memzero_explicit(d, todo); |
6449 |
++err_free: |
6450 |
+ kfree(d); |
6451 |
+ |
6452 |
+ return err; |
6453 |
+diff --git a/drivers/crypto/ccp/sev-dev.c b/drivers/crypto/ccp/sev-dev.c |
6454 |
+index 476113e12489f..5b82ba7acc7cb 100644 |
6455 |
+--- a/drivers/crypto/ccp/sev-dev.c |
6456 |
++++ b/drivers/crypto/ccp/sev-dev.c |
6457 |
+@@ -149,6 +149,9 @@ static int __sev_do_cmd_locked(int cmd, void *data, int *psp_ret) |
6458 |
+ |
6459 |
+ sev = psp->sev_data; |
6460 |
+ |
6461 |
++ if (data && WARN_ON_ONCE(!virt_addr_valid(data))) |
6462 |
++ return -EINVAL; |
6463 |
++ |
6464 |
+ /* Get the physical address of the command buffer */ |
6465 |
+ phys_lsb = data ? lower_32_bits(__psp_pa(data)) : 0; |
6466 |
+ phys_msb = data ? upper_32_bits(__psp_pa(data)) : 0; |
6467 |
+diff --git a/drivers/crypto/ccp/tee-dev.c b/drivers/crypto/ccp/tee-dev.c |
6468 |
+index 5e697a90ea7f4..bcb81fef42118 100644 |
6469 |
+--- a/drivers/crypto/ccp/tee-dev.c |
6470 |
++++ b/drivers/crypto/ccp/tee-dev.c |
6471 |
+@@ -36,6 +36,7 @@ static int tee_alloc_ring(struct psp_tee_device *tee, int ring_size) |
6472 |
+ if (!start_addr) |
6473 |
+ return -ENOMEM; |
6474 |
+ |
6475 |
++ memset(start_addr, 0x0, ring_size); |
6476 |
+ rb_mgr->ring_start = start_addr; |
6477 |
+ rb_mgr->ring_size = ring_size; |
6478 |
+ rb_mgr->ring_pa = __psp_pa(start_addr); |
6479 |
+@@ -244,41 +245,54 @@ static int tee_submit_cmd(struct psp_tee_device *tee, enum tee_cmd_id cmd_id, |
6480 |
+ void *buf, size_t len, struct tee_ring_cmd **resp) |
6481 |
+ { |
6482 |
+ struct tee_ring_cmd *cmd; |
6483 |
+- u32 rptr, wptr; |
6484 |
+ int nloop = 1000, ret = 0; |
6485 |
++ u32 rptr; |
6486 |
+ |
6487 |
+ *resp = NULL; |
6488 |
+ |
6489 |
+ mutex_lock(&tee->rb_mgr.mutex); |
6490 |
+ |
6491 |
+- wptr = tee->rb_mgr.wptr; |
6492 |
+- |
6493 |
+- /* Check if ring buffer is full */ |
6494 |
++ /* Loop until empty entry found in ring buffer */ |
6495 |
+ do { |
6496 |
++ /* Get pointer to ring buffer command entry */ |
6497 |
++ cmd = (struct tee_ring_cmd *) |
6498 |
++ (tee->rb_mgr.ring_start + tee->rb_mgr.wptr); |
6499 |
++ |
6500 |
+ rptr = ioread32(tee->io_regs + tee->vdata->ring_rptr_reg); |
6501 |
+ |
6502 |
+- if (!(wptr + sizeof(struct tee_ring_cmd) == rptr)) |
6503 |
++ /* Check if ring buffer is full or command entry is waiting |
6504 |
++ * for response from TEE |
6505 |
++ */ |
6506 |
++ if (!(tee->rb_mgr.wptr + sizeof(struct tee_ring_cmd) == rptr || |
6507 |
++ cmd->flag == CMD_WAITING_FOR_RESPONSE)) |
6508 |
+ break; |
6509 |
+ |
6510 |
+- dev_info(tee->dev, "tee: ring buffer full. rptr = %u wptr = %u\n", |
6511 |
+- rptr, wptr); |
6512 |
++ dev_dbg(tee->dev, "tee: ring buffer full. rptr = %u wptr = %u\n", |
6513 |
++ rptr, tee->rb_mgr.wptr); |
6514 |
+ |
6515 |
+- /* Wait if ring buffer is full */ |
6516 |
++ /* Wait if ring buffer is full or TEE is processing data */ |
6517 |
+ mutex_unlock(&tee->rb_mgr.mutex); |
6518 |
+ schedule_timeout_interruptible(msecs_to_jiffies(10)); |
6519 |
+ mutex_lock(&tee->rb_mgr.mutex); |
6520 |
+ |
6521 |
+ } while (--nloop); |
6522 |
+ |
6523 |
+- if (!nloop && (wptr + sizeof(struct tee_ring_cmd) == rptr)) { |
6524 |
+- dev_err(tee->dev, "tee: ring buffer full. rptr = %u wptr = %u\n", |
6525 |
+- rptr, wptr); |
6526 |
++ if (!nloop && |
6527 |
++ (tee->rb_mgr.wptr + sizeof(struct tee_ring_cmd) == rptr || |
6528 |
++ cmd->flag == CMD_WAITING_FOR_RESPONSE)) { |
6529 |
++ dev_err(tee->dev, "tee: ring buffer full. rptr = %u wptr = %u response flag %u\n", |
6530 |
++ rptr, tee->rb_mgr.wptr, cmd->flag); |
6531 |
+ ret = -EBUSY; |
6532 |
+ goto unlock; |
6533 |
+ } |
6534 |
+ |
6535 |
+- /* Pointer to empty data entry in ring buffer */ |
6536 |
+- cmd = (struct tee_ring_cmd *)(tee->rb_mgr.ring_start + wptr); |
6537 |
++ /* Do not submit command if PSP got disabled while processing any |
6538 |
++ * command in another thread |
6539 |
++ */ |
6540 |
++ if (psp_dead) { |
6541 |
++ ret = -EBUSY; |
6542 |
++ goto unlock; |
6543 |
++ } |
6544 |
+ |
6545 |
+ /* Write command data into ring buffer */ |
6546 |
+ cmd->cmd_id = cmd_id; |
6547 |
+@@ -286,6 +300,9 @@ static int tee_submit_cmd(struct psp_tee_device *tee, enum tee_cmd_id cmd_id, |
6548 |
+ memset(&cmd->buf[0], 0, sizeof(cmd->buf)); |
6549 |
+ memcpy(&cmd->buf[0], buf, len); |
6550 |
+ |
6551 |
++ /* Indicate driver is waiting for response */ |
6552 |
++ cmd->flag = CMD_WAITING_FOR_RESPONSE; |
6553 |
++ |
6554 |
+ /* Update local copy of write pointer */ |
6555 |
+ tee->rb_mgr.wptr += sizeof(struct tee_ring_cmd); |
6556 |
+ if (tee->rb_mgr.wptr >= tee->rb_mgr.ring_size) |
6557 |
+@@ -353,12 +370,16 @@ int psp_tee_process_cmd(enum tee_cmd_id cmd_id, void *buf, size_t len, |
6558 |
+ return ret; |
6559 |
+ |
6560 |
+ ret = tee_wait_cmd_completion(tee, resp, TEE_DEFAULT_TIMEOUT); |
6561 |
+- if (ret) |
6562 |
++ if (ret) { |
6563 |
++ resp->flag = CMD_RESPONSE_TIMEDOUT; |
6564 |
+ return ret; |
6565 |
++ } |
6566 |
+ |
6567 |
+ memcpy(buf, &resp->buf[0], len); |
6568 |
+ *status = resp->status; |
6569 |
+ |
6570 |
++ resp->flag = CMD_RESPONSE_COPIED; |
6571 |
++ |
6572 |
+ return 0; |
6573 |
+ } |
6574 |
+ EXPORT_SYMBOL(psp_tee_process_cmd); |
6575 |
+diff --git a/drivers/crypto/ccp/tee-dev.h b/drivers/crypto/ccp/tee-dev.h |
6576 |
+index f099601121150..49d26158b71e3 100644 |
6577 |
+--- a/drivers/crypto/ccp/tee-dev.h |
6578 |
++++ b/drivers/crypto/ccp/tee-dev.h |
6579 |
+@@ -1,6 +1,6 @@ |
6580 |
+ /* SPDX-License-Identifier: MIT */ |
6581 |
+ /* |
6582 |
+- * Copyright 2019 Advanced Micro Devices, Inc. |
6583 |
++ * Copyright (C) 2019,2021 Advanced Micro Devices, Inc. |
6584 |
+ * |
6585 |
+ * Author: Rijo Thomas <Rijo-john.Thomas@×××.com> |
6586 |
+ * Author: Devaraj Rangasamy <Devaraj.Rangasamy@×××.com> |
6587 |
+@@ -18,7 +18,7 @@ |
6588 |
+ #include <linux/mutex.h> |
6589 |
+ |
6590 |
+ #define TEE_DEFAULT_TIMEOUT 10 |
6591 |
+-#define MAX_BUFFER_SIZE 992 |
6592 |
++#define MAX_BUFFER_SIZE 988 |
6593 |
+ |
6594 |
+ /** |
6595 |
+ * enum tee_ring_cmd_id - TEE interface commands for ring buffer configuration |
6596 |
+@@ -81,6 +81,20 @@ enum tee_cmd_state { |
6597 |
+ TEE_CMD_STATE_COMPLETED, |
6598 |
+ }; |
6599 |
+ |
6600 |
++/** |
6601 |
++ * enum cmd_resp_state - TEE command's response status maintained by driver |
6602 |
++ * @CMD_RESPONSE_INVALID: initial state when no command is written to ring |
6603 |
++ * @CMD_WAITING_FOR_RESPONSE: driver waiting for response from TEE |
6604 |
++ * @CMD_RESPONSE_TIMEDOUT: failed to get response from TEE |
6605 |
++ * @CMD_RESPONSE_COPIED: driver has copied response from TEE |
6606 |
++ */ |
6607 |
++enum cmd_resp_state { |
6608 |
++ CMD_RESPONSE_INVALID, |
6609 |
++ CMD_WAITING_FOR_RESPONSE, |
6610 |
++ CMD_RESPONSE_TIMEDOUT, |
6611 |
++ CMD_RESPONSE_COPIED, |
6612 |
++}; |
6613 |
++ |
6614 |
+ /** |
6615 |
+ * struct tee_ring_cmd - Structure of the command buffer in TEE ring |
6616 |
+ * @cmd_id: refers to &enum tee_cmd_id. Command id for the ring buffer |
6617 |
+@@ -91,6 +105,7 @@ enum tee_cmd_state { |
6618 |
+ * @pdata: private data (currently unused) |
6619 |
+ * @res1: reserved region |
6620 |
+ * @buf: TEE command specific buffer |
6621 |
++ * @flag: refers to &enum cmd_resp_state |
6622 |
+ */ |
6623 |
+ struct tee_ring_cmd { |
6624 |
+ u32 cmd_id; |
6625 |
+@@ -100,6 +115,7 @@ struct tee_ring_cmd { |
6626 |
+ u64 pdata; |
6627 |
+ u32 res1[2]; |
6628 |
+ u8 buf[MAX_BUFFER_SIZE]; |
6629 |
++ u32 flag; |
6630 |
+ |
6631 |
+ /* Total size: 1024 bytes */ |
6632 |
+ } __packed; |
6633 |
+diff --git a/drivers/crypto/chelsio/chcr_algo.c b/drivers/crypto/chelsio/chcr_algo.c |
6634 |
+index f5a336634daa6..405ff957b8370 100644 |
6635 |
+--- a/drivers/crypto/chelsio/chcr_algo.c |
6636 |
++++ b/drivers/crypto/chelsio/chcr_algo.c |
6637 |
+@@ -769,13 +769,14 @@ static inline void create_wreq(struct chcr_context *ctx, |
6638 |
+ struct uld_ctx *u_ctx = ULD_CTX(ctx); |
6639 |
+ unsigned int tx_channel_id, rx_channel_id; |
6640 |
+ unsigned int txqidx = 0, rxqidx = 0; |
6641 |
+- unsigned int qid, fid; |
6642 |
++ unsigned int qid, fid, portno; |
6643 |
+ |
6644 |
+ get_qidxs(req, &txqidx, &rxqidx); |
6645 |
+ qid = u_ctx->lldi.rxq_ids[rxqidx]; |
6646 |
+ fid = u_ctx->lldi.rxq_ids[0]; |
6647 |
++ portno = rxqidx / ctx->rxq_perchan; |
6648 |
+ tx_channel_id = txqidx / ctx->txq_perchan; |
6649 |
+- rx_channel_id = rxqidx / ctx->rxq_perchan; |
6650 |
++ rx_channel_id = cxgb4_port_e2cchan(u_ctx->lldi.ports[portno]); |
6651 |
+ |
6652 |
+ |
6653 |
+ chcr_req->wreq.op_to_cctx_size = FILL_WR_OP_CCTX_SIZE; |
6654 |
+@@ -806,6 +807,7 @@ static struct sk_buff *create_cipher_wr(struct cipher_wr_param *wrparam) |
6655 |
+ { |
6656 |
+ struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(wrparam->req); |
6657 |
+ struct chcr_context *ctx = c_ctx(tfm); |
6658 |
++ struct uld_ctx *u_ctx = ULD_CTX(ctx); |
6659 |
+ struct ablk_ctx *ablkctx = ABLK_CTX(ctx); |
6660 |
+ struct sk_buff *skb = NULL; |
6661 |
+ struct chcr_wr *chcr_req; |
6662 |
+@@ -822,6 +824,7 @@ static struct sk_buff *create_cipher_wr(struct cipher_wr_param *wrparam) |
6663 |
+ struct adapter *adap = padap(ctx->dev); |
6664 |
+ unsigned int rx_channel_id = reqctx->rxqidx / ctx->rxq_perchan; |
6665 |
+ |
6666 |
++ rx_channel_id = cxgb4_port_e2cchan(u_ctx->lldi.ports[rx_channel_id]); |
6667 |
+ nents = sg_nents_xlen(reqctx->dstsg, wrparam->bytes, CHCR_DST_SG_SIZE, |
6668 |
+ reqctx->dst_ofst); |
6669 |
+ dst_size = get_space_for_phys_dsgl(nents); |
6670 |
+@@ -1580,6 +1583,7 @@ static struct sk_buff *create_hash_wr(struct ahash_request *req, |
6671 |
+ int error = 0; |
6672 |
+ unsigned int rx_channel_id = req_ctx->rxqidx / ctx->rxq_perchan; |
6673 |
+ |
6674 |
++ rx_channel_id = cxgb4_port_e2cchan(u_ctx->lldi.ports[rx_channel_id]); |
6675 |
+ transhdr_len = HASH_TRANSHDR_SIZE(param->kctx_len); |
6676 |
+ req_ctx->hctx_wr.imm = (transhdr_len + param->bfr_len + |
6677 |
+ param->sg_len) <= SGE_MAX_WR_LEN; |
6678 |
+@@ -2438,6 +2442,7 @@ static struct sk_buff *create_authenc_wr(struct aead_request *req, |
6679 |
+ { |
6680 |
+ struct crypto_aead *tfm = crypto_aead_reqtfm(req); |
6681 |
+ struct chcr_context *ctx = a_ctx(tfm); |
6682 |
++ struct uld_ctx *u_ctx = ULD_CTX(ctx); |
6683 |
+ struct chcr_aead_ctx *aeadctx = AEAD_CTX(ctx); |
6684 |
+ struct chcr_authenc_ctx *actx = AUTHENC_CTX(aeadctx); |
6685 |
+ struct chcr_aead_reqctx *reqctx = aead_request_ctx(req); |
6686 |
+@@ -2457,6 +2462,7 @@ static struct sk_buff *create_authenc_wr(struct aead_request *req, |
6687 |
+ struct adapter *adap = padap(ctx->dev); |
6688 |
+ unsigned int rx_channel_id = reqctx->rxqidx / ctx->rxq_perchan; |
6689 |
+ |
6690 |
++ rx_channel_id = cxgb4_port_e2cchan(u_ctx->lldi.ports[rx_channel_id]); |
6691 |
+ if (req->cryptlen == 0) |
6692 |
+ return NULL; |
6693 |
+ |
6694 |
+@@ -2710,9 +2716,11 @@ void chcr_add_aead_dst_ent(struct aead_request *req, |
6695 |
+ struct dsgl_walk dsgl_walk; |
6696 |
+ unsigned int authsize = crypto_aead_authsize(tfm); |
6697 |
+ struct chcr_context *ctx = a_ctx(tfm); |
6698 |
++ struct uld_ctx *u_ctx = ULD_CTX(ctx); |
6699 |
+ u32 temp; |
6700 |
+ unsigned int rx_channel_id = reqctx->rxqidx / ctx->rxq_perchan; |
6701 |
+ |
6702 |
++ rx_channel_id = cxgb4_port_e2cchan(u_ctx->lldi.ports[rx_channel_id]); |
6703 |
+ dsgl_walk_init(&dsgl_walk, phys_cpl); |
6704 |
+ dsgl_walk_add_page(&dsgl_walk, IV + reqctx->b0_len, reqctx->iv_dma); |
6705 |
+ temp = req->assoclen + req->cryptlen + |
6706 |
+@@ -2752,9 +2760,11 @@ void chcr_add_cipher_dst_ent(struct skcipher_request *req, |
6707 |
+ struct chcr_skcipher_req_ctx *reqctx = skcipher_request_ctx(req); |
6708 |
+ struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(wrparam->req); |
6709 |
+ struct chcr_context *ctx = c_ctx(tfm); |
6710 |
++ struct uld_ctx *u_ctx = ULD_CTX(ctx); |
6711 |
+ struct dsgl_walk dsgl_walk; |
6712 |
+ unsigned int rx_channel_id = reqctx->rxqidx / ctx->rxq_perchan; |
6713 |
+ |
6714 |
++ rx_channel_id = cxgb4_port_e2cchan(u_ctx->lldi.ports[rx_channel_id]); |
6715 |
+ dsgl_walk_init(&dsgl_walk, phys_cpl); |
6716 |
+ dsgl_walk_add_sg(&dsgl_walk, reqctx->dstsg, wrparam->bytes, |
6717 |
+ reqctx->dst_ofst); |
6718 |
+@@ -2958,6 +2968,7 @@ static void fill_sec_cpl_for_aead(struct cpl_tx_sec_pdu *sec_cpl, |
6719 |
+ { |
6720 |
+ struct crypto_aead *tfm = crypto_aead_reqtfm(req); |
6721 |
+ struct chcr_context *ctx = a_ctx(tfm); |
6722 |
++ struct uld_ctx *u_ctx = ULD_CTX(ctx); |
6723 |
+ struct chcr_aead_ctx *aeadctx = AEAD_CTX(ctx); |
6724 |
+ struct chcr_aead_reqctx *reqctx = aead_request_ctx(req); |
6725 |
+ unsigned int cipher_mode = CHCR_SCMD_CIPHER_MODE_AES_CCM; |
6726 |
+@@ -2967,6 +2978,8 @@ static void fill_sec_cpl_for_aead(struct cpl_tx_sec_pdu *sec_cpl, |
6727 |
+ unsigned int tag_offset = 0, auth_offset = 0; |
6728 |
+ unsigned int assoclen; |
6729 |
+ |
6730 |
++ rx_channel_id = cxgb4_port_e2cchan(u_ctx->lldi.ports[rx_channel_id]); |
6731 |
++ |
6732 |
+ if (get_aead_subtype(tfm) == CRYPTO_ALG_SUB_TYPE_AEAD_RFC4309) |
6733 |
+ assoclen = req->assoclen - 8; |
6734 |
+ else |
6735 |
+@@ -3127,6 +3140,7 @@ static struct sk_buff *create_gcm_wr(struct aead_request *req, |
6736 |
+ { |
6737 |
+ struct crypto_aead *tfm = crypto_aead_reqtfm(req); |
6738 |
+ struct chcr_context *ctx = a_ctx(tfm); |
6739 |
++ struct uld_ctx *u_ctx = ULD_CTX(ctx); |
6740 |
+ struct chcr_aead_ctx *aeadctx = AEAD_CTX(ctx); |
6741 |
+ struct chcr_aead_reqctx *reqctx = aead_request_ctx(req); |
6742 |
+ struct sk_buff *skb = NULL; |
6743 |
+@@ -3143,6 +3157,7 @@ static struct sk_buff *create_gcm_wr(struct aead_request *req, |
6744 |
+ struct adapter *adap = padap(ctx->dev); |
6745 |
+ unsigned int rx_channel_id = reqctx->rxqidx / ctx->rxq_perchan; |
6746 |
+ |
6747 |
++ rx_channel_id = cxgb4_port_e2cchan(u_ctx->lldi.ports[rx_channel_id]); |
6748 |
+ if (get_aead_subtype(tfm) == CRYPTO_ALG_SUB_TYPE_AEAD_RFC4106) |
6749 |
+ assoclen = req->assoclen - 8; |
6750 |
+ |
6751 |
+diff --git a/drivers/crypto/keembay/keembay-ocs-aes-core.c b/drivers/crypto/keembay/keembay-ocs-aes-core.c |
6752 |
+index b6b25d994af38..2ef312866338f 100644 |
6753 |
+--- a/drivers/crypto/keembay/keembay-ocs-aes-core.c |
6754 |
++++ b/drivers/crypto/keembay/keembay-ocs-aes-core.c |
6755 |
+@@ -1649,8 +1649,10 @@ static int kmb_ocs_aes_probe(struct platform_device *pdev) |
6756 |
+ |
6757 |
+ /* Initialize crypto engine */ |
6758 |
+ aes_dev->engine = crypto_engine_alloc_init(dev, true); |
6759 |
+- if (!aes_dev->engine) |
6760 |
++ if (!aes_dev->engine) { |
6761 |
++ rc = -ENOMEM; |
6762 |
+ goto list_del; |
6763 |
++ } |
6764 |
+ |
6765 |
+ rc = crypto_engine_start(aes_dev->engine); |
6766 |
+ if (rc) { |
6767 |
+diff --git a/drivers/crypto/qat/qat_c3xxxvf/adf_drv.c b/drivers/crypto/qat/qat_c3xxxvf/adf_drv.c |
6768 |
+index 1d1532e8fb6d9..067ca5e17d387 100644 |
6769 |
+--- a/drivers/crypto/qat/qat_c3xxxvf/adf_drv.c |
6770 |
++++ b/drivers/crypto/qat/qat_c3xxxvf/adf_drv.c |
6771 |
+@@ -184,12 +184,12 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
6772 |
+ if (ret) |
6773 |
+ goto out_err_free_reg; |
6774 |
+ |
6775 |
+- set_bit(ADF_STATUS_PF_RUNNING, &accel_dev->status); |
6776 |
+- |
6777 |
+ ret = adf_dev_init(accel_dev); |
6778 |
+ if (ret) |
6779 |
+ goto out_err_dev_shutdown; |
6780 |
+ |
6781 |
++ set_bit(ADF_STATUS_PF_RUNNING, &accel_dev->status); |
6782 |
++ |
6783 |
+ ret = adf_dev_start(accel_dev); |
6784 |
+ if (ret) |
6785 |
+ goto out_err_dev_stop; |
6786 |
+diff --git a/drivers/crypto/qat/qat_c62xvf/adf_drv.c b/drivers/crypto/qat/qat_c62xvf/adf_drv.c |
6787 |
+index 04742a6d91cae..51ea88c0b17d7 100644 |
6788 |
+--- a/drivers/crypto/qat/qat_c62xvf/adf_drv.c |
6789 |
++++ b/drivers/crypto/qat/qat_c62xvf/adf_drv.c |
6790 |
+@@ -184,12 +184,12 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
6791 |
+ if (ret) |
6792 |
+ goto out_err_free_reg; |
6793 |
+ |
6794 |
+- set_bit(ADF_STATUS_PF_RUNNING, &accel_dev->status); |
6795 |
+- |
6796 |
+ ret = adf_dev_init(accel_dev); |
6797 |
+ if (ret) |
6798 |
+ goto out_err_dev_shutdown; |
6799 |
+ |
6800 |
++ set_bit(ADF_STATUS_PF_RUNNING, &accel_dev->status); |
6801 |
++ |
6802 |
+ ret = adf_dev_start(accel_dev); |
6803 |
+ if (ret) |
6804 |
+ goto out_err_dev_stop; |
6805 |
+diff --git a/drivers/crypto/qat/qat_common/adf_isr.c b/drivers/crypto/qat/qat_common/adf_isr.c |
6806 |
+index c458534635306..e3ad5587be49e 100644 |
6807 |
+--- a/drivers/crypto/qat/qat_common/adf_isr.c |
6808 |
++++ b/drivers/crypto/qat/qat_common/adf_isr.c |
6809 |
+@@ -291,19 +291,32 @@ int adf_isr_resource_alloc(struct adf_accel_dev *accel_dev) |
6810 |
+ |
6811 |
+ ret = adf_isr_alloc_msix_entry_table(accel_dev); |
6812 |
+ if (ret) |
6813 |
+- return ret; |
6814 |
+- if (adf_enable_msix(accel_dev)) |
6815 |
+ goto err_out; |
6816 |
+ |
6817 |
+- if (adf_setup_bh(accel_dev)) |
6818 |
+- goto err_out; |
6819 |
++ ret = adf_enable_msix(accel_dev); |
6820 |
++ if (ret) |
6821 |
++ goto err_free_msix_table; |
6822 |
+ |
6823 |
+- if (adf_request_irqs(accel_dev)) |
6824 |
+- goto err_out; |
6825 |
++ ret = adf_setup_bh(accel_dev); |
6826 |
++ if (ret) |
6827 |
++ goto err_disable_msix; |
6828 |
++ |
6829 |
++ ret = adf_request_irqs(accel_dev); |
6830 |
++ if (ret) |
6831 |
++ goto err_cleanup_bh; |
6832 |
+ |
6833 |
+ return 0; |
6834 |
++ |
6835 |
++err_cleanup_bh: |
6836 |
++ adf_cleanup_bh(accel_dev); |
6837 |
++ |
6838 |
++err_disable_msix: |
6839 |
++ adf_disable_msix(&accel_dev->accel_pci_dev); |
6840 |
++ |
6841 |
++err_free_msix_table: |
6842 |
++ adf_isr_free_msix_entry_table(accel_dev); |
6843 |
++ |
6844 |
+ err_out: |
6845 |
+- adf_isr_resource_free(accel_dev); |
6846 |
+- return -EFAULT; |
6847 |
++ return ret; |
6848 |
+ } |
6849 |
+ EXPORT_SYMBOL_GPL(adf_isr_resource_alloc); |
6850 |
+diff --git a/drivers/crypto/qat/qat_common/adf_transport.c b/drivers/crypto/qat/qat_common/adf_transport.c |
6851 |
+index 5a7030acdc334..6195d76731c64 100644 |
6852 |
+--- a/drivers/crypto/qat/qat_common/adf_transport.c |
6853 |
++++ b/drivers/crypto/qat/qat_common/adf_transport.c |
6854 |
+@@ -171,6 +171,7 @@ static int adf_init_ring(struct adf_etr_ring_data *ring) |
6855 |
+ dev_err(&GET_DEV(accel_dev), "Ring address not aligned\n"); |
6856 |
+ dma_free_coherent(&GET_DEV(accel_dev), ring_size_bytes, |
6857 |
+ ring->base_addr, ring->dma_addr); |
6858 |
++ ring->base_addr = NULL; |
6859 |
+ return -EFAULT; |
6860 |
+ } |
6861 |
+ |
6862 |
+diff --git a/drivers/crypto/qat/qat_common/adf_vf_isr.c b/drivers/crypto/qat/qat_common/adf_vf_isr.c |
6863 |
+index 38d316a42ba6f..888388acb6bd3 100644 |
6864 |
+--- a/drivers/crypto/qat/qat_common/adf_vf_isr.c |
6865 |
++++ b/drivers/crypto/qat/qat_common/adf_vf_isr.c |
6866 |
+@@ -261,17 +261,26 @@ int adf_vf_isr_resource_alloc(struct adf_accel_dev *accel_dev) |
6867 |
+ goto err_out; |
6868 |
+ |
6869 |
+ if (adf_setup_pf2vf_bh(accel_dev)) |
6870 |
+- goto err_out; |
6871 |
++ goto err_disable_msi; |
6872 |
+ |
6873 |
+ if (adf_setup_bh(accel_dev)) |
6874 |
+- goto err_out; |
6875 |
++ goto err_cleanup_pf2vf_bh; |
6876 |
+ |
6877 |
+ if (adf_request_msi_irq(accel_dev)) |
6878 |
+- goto err_out; |
6879 |
++ goto err_cleanup_bh; |
6880 |
+ |
6881 |
+ return 0; |
6882 |
++ |
6883 |
++err_cleanup_bh: |
6884 |
++ adf_cleanup_bh(accel_dev); |
6885 |
++ |
6886 |
++err_cleanup_pf2vf_bh: |
6887 |
++ adf_cleanup_pf2vf_bh(accel_dev); |
6888 |
++ |
6889 |
++err_disable_msi: |
6890 |
++ adf_disable_msi(accel_dev); |
6891 |
++ |
6892 |
+ err_out: |
6893 |
+- adf_vf_isr_resource_free(accel_dev); |
6894 |
+ return -EFAULT; |
6895 |
+ } |
6896 |
+ EXPORT_SYMBOL_GPL(adf_vf_isr_resource_alloc); |
6897 |
+diff --git a/drivers/crypto/qat/qat_dh895xccvf/adf_drv.c b/drivers/crypto/qat/qat_dh895xccvf/adf_drv.c |
6898 |
+index c972554a755e7..29999da716cc9 100644 |
6899 |
+--- a/drivers/crypto/qat/qat_dh895xccvf/adf_drv.c |
6900 |
++++ b/drivers/crypto/qat/qat_dh895xccvf/adf_drv.c |
6901 |
+@@ -184,12 +184,12 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
6902 |
+ if (ret) |
6903 |
+ goto out_err_free_reg; |
6904 |
+ |
6905 |
+- set_bit(ADF_STATUS_PF_RUNNING, &accel_dev->status); |
6906 |
+- |
6907 |
+ ret = adf_dev_init(accel_dev); |
6908 |
+ if (ret) |
6909 |
+ goto out_err_dev_shutdown; |
6910 |
+ |
6911 |
++ set_bit(ADF_STATUS_PF_RUNNING, &accel_dev->status); |
6912 |
++ |
6913 |
+ ret = adf_dev_start(accel_dev); |
6914 |
+ if (ret) |
6915 |
+ goto out_err_dev_stop; |
6916 |
+diff --git a/drivers/crypto/sa2ul.c b/drivers/crypto/sa2ul.c |
6917 |
+index d7b1628fb4848..b0f0502a5bb0f 100644 |
6918 |
+--- a/drivers/crypto/sa2ul.c |
6919 |
++++ b/drivers/crypto/sa2ul.c |
6920 |
+@@ -1146,8 +1146,10 @@ static int sa_run(struct sa_req *req) |
6921 |
+ mapped_sg->sgt.sgl = src; |
6922 |
+ mapped_sg->sgt.orig_nents = src_nents; |
6923 |
+ ret = dma_map_sgtable(ddev, &mapped_sg->sgt, dir_src, 0); |
6924 |
+- if (ret) |
6925 |
++ if (ret) { |
6926 |
++ kfree(rxd); |
6927 |
+ return ret; |
6928 |
++ } |
6929 |
+ |
6930 |
+ mapped_sg->dir = dir_src; |
6931 |
+ mapped_sg->mapped = true; |
6932 |
+@@ -1155,8 +1157,10 @@ static int sa_run(struct sa_req *req) |
6933 |
+ mapped_sg->sgt.sgl = req->src; |
6934 |
+ mapped_sg->sgt.orig_nents = sg_nents; |
6935 |
+ ret = dma_map_sgtable(ddev, &mapped_sg->sgt, dir_src, 0); |
6936 |
+- if (ret) |
6937 |
++ if (ret) { |
6938 |
++ kfree(rxd); |
6939 |
+ return ret; |
6940 |
++ } |
6941 |
+ |
6942 |
+ mapped_sg->dir = dir_src; |
6943 |
+ mapped_sg->mapped = true; |
6944 |
+diff --git a/drivers/devfreq/devfreq.c b/drivers/devfreq/devfreq.c |
6945 |
+index 6aa10de792b33..6459dacb06975 100644 |
6946 |
+--- a/drivers/devfreq/devfreq.c |
6947 |
++++ b/drivers/devfreq/devfreq.c |
6948 |
+@@ -387,7 +387,7 @@ static int devfreq_set_target(struct devfreq *devfreq, unsigned long new_freq, |
6949 |
+ devfreq->previous_freq = new_freq; |
6950 |
+ |
6951 |
+ if (devfreq->suspend_freq) |
6952 |
+- devfreq->resume_freq = cur_freq; |
6953 |
++ devfreq->resume_freq = new_freq; |
6954 |
+ |
6955 |
+ return err; |
6956 |
+ } |
6957 |
+@@ -818,7 +818,8 @@ struct devfreq *devfreq_add_device(struct device *dev, |
6958 |
+ |
6959 |
+ if (devfreq->profile->timer < 0 |
6960 |
+ || devfreq->profile->timer >= DEVFREQ_TIMER_NUM) { |
6961 |
+- goto err_out; |
6962 |
++ mutex_unlock(&devfreq->lock); |
6963 |
++ goto err_dev; |
6964 |
+ } |
6965 |
+ |
6966 |
+ if (!devfreq->profile->max_state && !devfreq->profile->freq_table) { |
6967 |
+diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig |
6968 |
+index 3f14dffb96696..5dd19dbd67a3b 100644 |
6969 |
+--- a/drivers/firmware/Kconfig |
6970 |
++++ b/drivers/firmware/Kconfig |
6971 |
+@@ -237,6 +237,7 @@ config INTEL_STRATIX10_RSU |
6972 |
+ config QCOM_SCM |
6973 |
+ bool |
6974 |
+ depends on ARM || ARM64 |
6975 |
++ depends on HAVE_ARM_SMCCC |
6976 |
+ select RESET_CONTROLLER |
6977 |
+ |
6978 |
+ config QCOM_SCM_DOWNLOAD_MODE_DEFAULT |
6979 |
+diff --git a/drivers/firmware/qcom_scm-smc.c b/drivers/firmware/qcom_scm-smc.c |
6980 |
+index 497c13ba98d67..d111833364ba4 100644 |
6981 |
+--- a/drivers/firmware/qcom_scm-smc.c |
6982 |
++++ b/drivers/firmware/qcom_scm-smc.c |
6983 |
+@@ -77,8 +77,10 @@ static void __scm_smc_do(const struct arm_smccc_args *smc, |
6984 |
+ } while (res->a0 == QCOM_SCM_V2_EBUSY); |
6985 |
+ } |
6986 |
+ |
6987 |
+-int scm_smc_call(struct device *dev, const struct qcom_scm_desc *desc, |
6988 |
+- struct qcom_scm_res *res, bool atomic) |
6989 |
++ |
6990 |
++int __scm_smc_call(struct device *dev, const struct qcom_scm_desc *desc, |
6991 |
++ enum qcom_scm_convention qcom_convention, |
6992 |
++ struct qcom_scm_res *res, bool atomic) |
6993 |
+ { |
6994 |
+ int arglen = desc->arginfo & 0xf; |
6995 |
+ int i; |
6996 |
+@@ -87,9 +89,8 @@ int scm_smc_call(struct device *dev, const struct qcom_scm_desc *desc, |
6997 |
+ size_t alloc_len; |
6998 |
+ gfp_t flag = atomic ? GFP_ATOMIC : GFP_KERNEL; |
6999 |
+ u32 smccc_call_type = atomic ? ARM_SMCCC_FAST_CALL : ARM_SMCCC_STD_CALL; |
7000 |
+- u32 qcom_smccc_convention = |
7001 |
+- (qcom_scm_convention == SMC_CONVENTION_ARM_32) ? |
7002 |
+- ARM_SMCCC_SMC_32 : ARM_SMCCC_SMC_64; |
7003 |
++ u32 qcom_smccc_convention = (qcom_convention == SMC_CONVENTION_ARM_32) ? |
7004 |
++ ARM_SMCCC_SMC_32 : ARM_SMCCC_SMC_64; |
7005 |
+ struct arm_smccc_res smc_res; |
7006 |
+ struct arm_smccc_args smc = {0}; |
7007 |
+ |
7008 |
+@@ -148,4 +149,5 @@ int scm_smc_call(struct device *dev, const struct qcom_scm_desc *desc, |
7009 |
+ } |
7010 |
+ |
7011 |
+ return (long)smc_res.a0 ? qcom_scm_remap_error(smc_res.a0) : 0; |
7012 |
++ |
7013 |
+ } |
7014 |
+diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c |
7015 |
+index 7be48c1bec96d..c5b20bdc08e9d 100644 |
7016 |
+--- a/drivers/firmware/qcom_scm.c |
7017 |
++++ b/drivers/firmware/qcom_scm.c |
7018 |
+@@ -113,14 +113,10 @@ static void qcom_scm_clk_disable(void) |
7019 |
+ clk_disable_unprepare(__scm->bus_clk); |
7020 |
+ } |
7021 |
+ |
7022 |
+-static int __qcom_scm_is_call_available(struct device *dev, u32 svc_id, |
7023 |
+- u32 cmd_id); |
7024 |
++enum qcom_scm_convention qcom_scm_convention = SMC_CONVENTION_UNKNOWN; |
7025 |
++static DEFINE_SPINLOCK(scm_query_lock); |
7026 |
+ |
7027 |
+-enum qcom_scm_convention qcom_scm_convention; |
7028 |
+-static bool has_queried __read_mostly; |
7029 |
+-static DEFINE_SPINLOCK(query_lock); |
7030 |
+- |
7031 |
+-static void __query_convention(void) |
7032 |
++static enum qcom_scm_convention __get_convention(void) |
7033 |
+ { |
7034 |
+ unsigned long flags; |
7035 |
+ struct qcom_scm_desc desc = { |
7036 |
+@@ -133,36 +129,50 @@ static void __query_convention(void) |
7037 |
+ .owner = ARM_SMCCC_OWNER_SIP, |
7038 |
+ }; |
7039 |
+ struct qcom_scm_res res; |
7040 |
++ enum qcom_scm_convention probed_convention; |
7041 |
+ int ret; |
7042 |
++ bool forced = false; |
7043 |
+ |
7044 |
+- spin_lock_irqsave(&query_lock, flags); |
7045 |
+- if (has_queried) |
7046 |
+- goto out; |
7047 |
++ if (likely(qcom_scm_convention != SMC_CONVENTION_UNKNOWN)) |
7048 |
++ return qcom_scm_convention; |
7049 |
+ |
7050 |
+- qcom_scm_convention = SMC_CONVENTION_ARM_64; |
7051 |
+- // Device isn't required as there is only one argument - no device |
7052 |
+- // needed to dma_map_single to secure world |
7053 |
+- ret = scm_smc_call(NULL, &desc, &res, true); |
7054 |
++ /* |
7055 |
++ * Device isn't required as there is only one argument - no device |
7056 |
++ * needed to dma_map_single to secure world |
7057 |
++ */ |
7058 |
++ probed_convention = SMC_CONVENTION_ARM_64; |
7059 |
++ ret = __scm_smc_call(NULL, &desc, probed_convention, &res, true); |
7060 |
+ if (!ret && res.result[0] == 1) |
7061 |
+- goto out; |
7062 |
++ goto found; |
7063 |
++ |
7064 |
++ /* |
7065 |
++ * Some SC7180 firmwares didn't implement the |
7066 |
++ * QCOM_SCM_INFO_IS_CALL_AVAIL call, so we fallback to forcing ARM_64 |
7067 |
++ * calling conventions on these firmwares. Luckily we don't make any |
7068 |
++ * early calls into the firmware on these SoCs so the device pointer |
7069 |
++ * will be valid here to check if the compatible matches. |
7070 |
++ */ |
7071 |
++ if (of_device_is_compatible(__scm ? __scm->dev->of_node : NULL, "qcom,scm-sc7180")) { |
7072 |
++ forced = true; |
7073 |
++ goto found; |
7074 |
++ } |
7075 |
+ |
7076 |
+- qcom_scm_convention = SMC_CONVENTION_ARM_32; |
7077 |
+- ret = scm_smc_call(NULL, &desc, &res, true); |
7078 |
++ probed_convention = SMC_CONVENTION_ARM_32; |
7079 |
++ ret = __scm_smc_call(NULL, &desc, probed_convention, &res, true); |
7080 |
+ if (!ret && res.result[0] == 1) |
7081 |
+- goto out; |
7082 |
+- |
7083 |
+- qcom_scm_convention = SMC_CONVENTION_LEGACY; |
7084 |
+-out: |
7085 |
+- has_queried = true; |
7086 |
+- spin_unlock_irqrestore(&query_lock, flags); |
7087 |
+- pr_info("qcom_scm: convention: %s\n", |
7088 |
+- qcom_scm_convention_names[qcom_scm_convention]); |
7089 |
+-} |
7090 |
++ goto found; |
7091 |
++ |
7092 |
++ probed_convention = SMC_CONVENTION_LEGACY; |
7093 |
++found: |
7094 |
++ spin_lock_irqsave(&scm_query_lock, flags); |
7095 |
++ if (probed_convention != qcom_scm_convention) { |
7096 |
++ qcom_scm_convention = probed_convention; |
7097 |
++ pr_info("qcom_scm: convention: %s%s\n", |
7098 |
++ qcom_scm_convention_names[qcom_scm_convention], |
7099 |
++ forced ? " (forced)" : ""); |
7100 |
++ } |
7101 |
++ spin_unlock_irqrestore(&scm_query_lock, flags); |
7102 |
+ |
7103 |
+-static inline enum qcom_scm_convention __get_convention(void) |
7104 |
+-{ |
7105 |
+- if (unlikely(!has_queried)) |
7106 |
+- __query_convention(); |
7107 |
+ return qcom_scm_convention; |
7108 |
+ } |
7109 |
+ |
7110 |
+@@ -219,8 +229,8 @@ static int qcom_scm_call_atomic(struct device *dev, |
7111 |
+ } |
7112 |
+ } |
7113 |
+ |
7114 |
+-static int __qcom_scm_is_call_available(struct device *dev, u32 svc_id, |
7115 |
+- u32 cmd_id) |
7116 |
++static bool __qcom_scm_is_call_available(struct device *dev, u32 svc_id, |
7117 |
++ u32 cmd_id) |
7118 |
+ { |
7119 |
+ int ret; |
7120 |
+ struct qcom_scm_desc desc = { |
7121 |
+@@ -247,7 +257,7 @@ static int __qcom_scm_is_call_available(struct device *dev, u32 svc_id, |
7122 |
+ |
7123 |
+ ret = qcom_scm_call(dev, &desc, &res); |
7124 |
+ |
7125 |
+- return ret ? : res.result[0]; |
7126 |
++ return ret ? false : !!res.result[0]; |
7127 |
+ } |
7128 |
+ |
7129 |
+ /** |
7130 |
+@@ -585,9 +595,8 @@ bool qcom_scm_pas_supported(u32 peripheral) |
7131 |
+ }; |
7132 |
+ struct qcom_scm_res res; |
7133 |
+ |
7134 |
+- ret = __qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_PIL, |
7135 |
+- QCOM_SCM_PIL_PAS_IS_SUPPORTED); |
7136 |
+- if (ret <= 0) |
7137 |
++ if (!__qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_PIL, |
7138 |
++ QCOM_SCM_PIL_PAS_IS_SUPPORTED)) |
7139 |
+ return false; |
7140 |
+ |
7141 |
+ ret = qcom_scm_call(__scm->dev, &desc, &res); |
7142 |
+@@ -1054,17 +1063,18 @@ EXPORT_SYMBOL(qcom_scm_ice_set_key); |
7143 |
+ */ |
7144 |
+ bool qcom_scm_hdcp_available(void) |
7145 |
+ { |
7146 |
++ bool avail; |
7147 |
+ int ret = qcom_scm_clk_enable(); |
7148 |
+ |
7149 |
+ if (ret) |
7150 |
+ return ret; |
7151 |
+ |
7152 |
+- ret = __qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_HDCP, |
7153 |
++ avail = __qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_HDCP, |
7154 |
+ QCOM_SCM_HDCP_INVOKE); |
7155 |
+ |
7156 |
+ qcom_scm_clk_disable(); |
7157 |
+ |
7158 |
+- return ret > 0; |
7159 |
++ return avail; |
7160 |
+ } |
7161 |
+ EXPORT_SYMBOL(qcom_scm_hdcp_available); |
7162 |
+ |
7163 |
+@@ -1236,7 +1246,7 @@ static int qcom_scm_probe(struct platform_device *pdev) |
7164 |
+ __scm = scm; |
7165 |
+ __scm->dev = &pdev->dev; |
7166 |
+ |
7167 |
+- __query_convention(); |
7168 |
++ __get_convention(); |
7169 |
+ |
7170 |
+ /* |
7171 |
+ * If requested enable "download mode", from this point on warmboot |
7172 |
+diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h |
7173 |
+index 95cd1ac30ab0b..632fe31424621 100644 |
7174 |
+--- a/drivers/firmware/qcom_scm.h |
7175 |
++++ b/drivers/firmware/qcom_scm.h |
7176 |
+@@ -61,8 +61,11 @@ struct qcom_scm_res { |
7177 |
+ }; |
7178 |
+ |
7179 |
+ #define SCM_SMC_FNID(s, c) ((((s) & 0xFF) << 8) | ((c) & 0xFF)) |
7180 |
+-extern int scm_smc_call(struct device *dev, const struct qcom_scm_desc *desc, |
7181 |
+- struct qcom_scm_res *res, bool atomic); |
7182 |
++extern int __scm_smc_call(struct device *dev, const struct qcom_scm_desc *desc, |
7183 |
++ enum qcom_scm_convention qcom_convention, |
7184 |
++ struct qcom_scm_res *res, bool atomic); |
7185 |
++#define scm_smc_call(dev, desc, res, atomic) \ |
7186 |
++ __scm_smc_call((dev), (desc), qcom_scm_convention, (res), (atomic)) |
7187 |
+ |
7188 |
+ #define SCM_LEGACY_FNID(s, c) (((s) << 10) | ((c) & 0x3ff)) |
7189 |
+ extern int scm_legacy_call_atomic(struct device *dev, |
7190 |
+diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c |
7191 |
+index 7eb9958662ddd..83082e2f2e441 100644 |
7192 |
+--- a/drivers/firmware/xilinx/zynqmp.c |
7193 |
++++ b/drivers/firmware/xilinx/zynqmp.c |
7194 |
+@@ -2,7 +2,7 @@ |
7195 |
+ /* |
7196 |
+ * Xilinx Zynq MPSoC Firmware layer |
7197 |
+ * |
7198 |
+- * Copyright (C) 2014-2020 Xilinx, Inc. |
7199 |
++ * Copyright (C) 2014-2021 Xilinx, Inc. |
7200 |
+ * |
7201 |
+ * Michal Simek <michal.simek@××××××.com> |
7202 |
+ * Davorin Mista <davorin.mista@××××××.com> |
7203 |
+@@ -1280,12 +1280,13 @@ static int zynqmp_firmware_probe(struct platform_device *pdev) |
7204 |
+ static int zynqmp_firmware_remove(struct platform_device *pdev) |
7205 |
+ { |
7206 |
+ struct pm_api_feature_data *feature_data; |
7207 |
++ struct hlist_node *tmp; |
7208 |
+ int i; |
7209 |
+ |
7210 |
+ mfd_remove_devices(&pdev->dev); |
7211 |
+ zynqmp_pm_api_debugfs_exit(); |
7212 |
+ |
7213 |
+- hash_for_each(pm_api_features_map, i, feature_data, hentry) { |
7214 |
++ hash_for_each_safe(pm_api_features_map, i, tmp, feature_data, hentry) { |
7215 |
+ hash_del(&feature_data->hentry); |
7216 |
+ kfree(feature_data); |
7217 |
+ } |
7218 |
+diff --git a/drivers/fpga/xilinx-spi.c b/drivers/fpga/xilinx-spi.c |
7219 |
+index 27defa98092dd..fee4d0abf6bfe 100644 |
7220 |
+--- a/drivers/fpga/xilinx-spi.c |
7221 |
++++ b/drivers/fpga/xilinx-spi.c |
7222 |
+@@ -233,25 +233,19 @@ static int xilinx_spi_probe(struct spi_device *spi) |
7223 |
+ |
7224 |
+ /* PROGRAM_B is active low */ |
7225 |
+ conf->prog_b = devm_gpiod_get(&spi->dev, "prog_b", GPIOD_OUT_LOW); |
7226 |
+- if (IS_ERR(conf->prog_b)) { |
7227 |
+- dev_err(&spi->dev, "Failed to get PROGRAM_B gpio: %ld\n", |
7228 |
+- PTR_ERR(conf->prog_b)); |
7229 |
+- return PTR_ERR(conf->prog_b); |
7230 |
+- } |
7231 |
++ if (IS_ERR(conf->prog_b)) |
7232 |
++ return dev_err_probe(&spi->dev, PTR_ERR(conf->prog_b), |
7233 |
++ "Failed to get PROGRAM_B gpio\n"); |
7234 |
+ |
7235 |
+ conf->init_b = devm_gpiod_get_optional(&spi->dev, "init-b", GPIOD_IN); |
7236 |
+- if (IS_ERR(conf->init_b)) { |
7237 |
+- dev_err(&spi->dev, "Failed to get INIT_B gpio: %ld\n", |
7238 |
+- PTR_ERR(conf->init_b)); |
7239 |
+- return PTR_ERR(conf->init_b); |
7240 |
+- } |
7241 |
++ if (IS_ERR(conf->init_b)) |
7242 |
++ return dev_err_probe(&spi->dev, PTR_ERR(conf->init_b), |
7243 |
++ "Failed to get INIT_B gpio\n"); |
7244 |
+ |
7245 |
+ conf->done = devm_gpiod_get(&spi->dev, "done", GPIOD_IN); |
7246 |
+- if (IS_ERR(conf->done)) { |
7247 |
+- dev_err(&spi->dev, "Failed to get DONE gpio: %ld\n", |
7248 |
+- PTR_ERR(conf->done)); |
7249 |
+- return PTR_ERR(conf->done); |
7250 |
+- } |
7251 |
++ if (IS_ERR(conf->done)) |
7252 |
++ return dev_err_probe(&spi->dev, PTR_ERR(conf->done), |
7253 |
++ "Failed to get DONE gpio\n"); |
7254 |
+ |
7255 |
+ mgr = devm_fpga_mgr_create(&spi->dev, |
7256 |
+ "Xilinx Slave Serial FPGA Manager", |
7257 |
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c |
7258 |
+index 94b069630db36..b4971e90b98cf 100644 |
7259 |
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c |
7260 |
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c |
7261 |
+@@ -215,7 +215,11 @@ static int amdgpu_vmid_grab_idle(struct amdgpu_vm *vm, |
7262 |
+ /* Check if we have an idle VMID */ |
7263 |
+ i = 0; |
7264 |
+ list_for_each_entry((*idle), &id_mgr->ids_lru, list) { |
7265 |
+- fences[i] = amdgpu_sync_peek_fence(&(*idle)->active, ring); |
7266 |
++ /* Don't use per engine and per process VMID at the same time */ |
7267 |
++ struct amdgpu_ring *r = adev->vm_manager.concurrent_flush ? |
7268 |
++ NULL : ring; |
7269 |
++ |
7270 |
++ fences[i] = amdgpu_sync_peek_fence(&(*idle)->active, r); |
7271 |
+ if (!fences[i]) |
7272 |
+ break; |
7273 |
+ ++i; |
7274 |
+@@ -281,7 +285,7 @@ static int amdgpu_vmid_grab_reserved(struct amdgpu_vm *vm, |
7275 |
+ if (updates && (*id)->flushed_updates && |
7276 |
+ updates->context == (*id)->flushed_updates->context && |
7277 |
+ !dma_fence_is_later(updates, (*id)->flushed_updates)) |
7278 |
+- updates = NULL; |
7279 |
++ updates = NULL; |
7280 |
+ |
7281 |
+ if ((*id)->owner != vm->immediate.fence_context || |
7282 |
+ job->vm_pd_addr != (*id)->pd_gpu_addr || |
7283 |
+@@ -290,6 +294,10 @@ static int amdgpu_vmid_grab_reserved(struct amdgpu_vm *vm, |
7284 |
+ !dma_fence_is_signaled((*id)->last_flush))) { |
7285 |
+ struct dma_fence *tmp; |
7286 |
+ |
7287 |
++ /* Don't use per engine and per process VMID at the same time */ |
7288 |
++ if (adev->vm_manager.concurrent_flush) |
7289 |
++ ring = NULL; |
7290 |
++ |
7291 |
+ /* to prevent one context starved by another context */ |
7292 |
+ (*id)->pd_gpu_addr = 0; |
7293 |
+ tmp = amdgpu_sync_peek_fence(&(*id)->active, ring); |
7294 |
+@@ -365,12 +373,7 @@ static int amdgpu_vmid_grab_used(struct amdgpu_vm *vm, |
7295 |
+ if (updates && (!flushed || dma_fence_is_later(updates, flushed))) |
7296 |
+ needs_flush = true; |
7297 |
+ |
7298 |
+- /* Concurrent flushes are only possible starting with Vega10 and |
7299 |
+- * are broken on Navi10 and Navi14. |
7300 |
+- */ |
7301 |
+- if (needs_flush && (adev->asic_type < CHIP_VEGA10 || |
7302 |
+- adev->asic_type == CHIP_NAVI10 || |
7303 |
+- adev->asic_type == CHIP_NAVI14)) |
7304 |
++ if (needs_flush && !adev->vm_manager.concurrent_flush) |
7305 |
+ continue; |
7306 |
+ |
7307 |
+ /* Good, we can use this VMID. Remember this submission as |
7308 |
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c |
7309 |
+index 19c0a3655228f..82e9ecf843523 100644 |
7310 |
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c |
7311 |
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c |
7312 |
+@@ -519,8 +519,10 @@ static int init_pmu_entry_by_type_and_add(struct amdgpu_pmu_entry *pmu_entry, |
7313 |
+ pmu_entry->pmu.attr_groups = kmemdup(attr_groups, sizeof(attr_groups), |
7314 |
+ GFP_KERNEL); |
7315 |
+ |
7316 |
+- if (!pmu_entry->pmu.attr_groups) |
7317 |
++ if (!pmu_entry->pmu.attr_groups) { |
7318 |
++ ret = -ENOMEM; |
7319 |
+ goto err_attr_group; |
7320 |
++ } |
7321 |
+ |
7322 |
+ snprintf(pmu_name, PMU_NAME_SIZE, "%s_%d", pmu_entry->pmu_file_prefix, |
7323 |
+ adev_to_drm(pmu_entry->adev)->primary->index); |
7324 |
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c |
7325 |
+index 8090c1e7a3bac..d0bb5198945c9 100644 |
7326 |
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c |
7327 |
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c |
7328 |
+@@ -3145,6 +3145,12 @@ void amdgpu_vm_manager_init(struct amdgpu_device *adev) |
7329 |
+ { |
7330 |
+ unsigned i; |
7331 |
+ |
7332 |
++ /* Concurrent flushes are only possible starting with Vega10 and |
7333 |
++ * are broken on Navi10 and Navi14. |
7334 |
++ */ |
7335 |
++ adev->vm_manager.concurrent_flush = !(adev->asic_type < CHIP_VEGA10 || |
7336 |
++ adev->asic_type == CHIP_NAVI10 || |
7337 |
++ adev->asic_type == CHIP_NAVI14); |
7338 |
+ amdgpu_vmid_mgr_init(adev); |
7339 |
+ |
7340 |
+ adev->vm_manager.fence_context = |
7341 |
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h |
7342 |
+index 976a12e5a8b92..4e140288159cd 100644 |
7343 |
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h |
7344 |
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h |
7345 |
+@@ -331,6 +331,7 @@ struct amdgpu_vm_manager { |
7346 |
+ /* Handling of VMIDs */ |
7347 |
+ struct amdgpu_vmid_mgr id_mgr[AMDGPU_MAX_VMHUBS]; |
7348 |
+ unsigned int first_kfd_vmid; |
7349 |
++ bool concurrent_flush; |
7350 |
+ |
7351 |
+ /* Handling of VM fences */ |
7352 |
+ u64 fence_context; |
7353 |
+diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c |
7354 |
+index 2d832fc231191..421d6069c5096 100644 |
7355 |
+--- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c |
7356 |
++++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c |
7357 |
+@@ -59,6 +59,7 @@ MODULE_FIRMWARE("amdgpu/tonga_mc.bin"); |
7358 |
+ MODULE_FIRMWARE("amdgpu/polaris11_mc.bin"); |
7359 |
+ MODULE_FIRMWARE("amdgpu/polaris10_mc.bin"); |
7360 |
+ MODULE_FIRMWARE("amdgpu/polaris12_mc.bin"); |
7361 |
++MODULE_FIRMWARE("amdgpu/polaris12_32_mc.bin"); |
7362 |
+ MODULE_FIRMWARE("amdgpu/polaris11_k_mc.bin"); |
7363 |
+ MODULE_FIRMWARE("amdgpu/polaris10_k_mc.bin"); |
7364 |
+ MODULE_FIRMWARE("amdgpu/polaris12_k_mc.bin"); |
7365 |
+@@ -243,10 +244,16 @@ static int gmc_v8_0_init_microcode(struct amdgpu_device *adev) |
7366 |
+ chip_name = "polaris10"; |
7367 |
+ break; |
7368 |
+ case CHIP_POLARIS12: |
7369 |
+- if (ASICID_IS_P23(adev->pdev->device, adev->pdev->revision)) |
7370 |
++ if (ASICID_IS_P23(adev->pdev->device, adev->pdev->revision)) { |
7371 |
+ chip_name = "polaris12_k"; |
7372 |
+- else |
7373 |
+- chip_name = "polaris12"; |
7374 |
++ } else { |
7375 |
++ WREG32(mmMC_SEQ_IO_DEBUG_INDEX, ixMC_IO_DEBUG_UP_159); |
7376 |
++ /* Polaris12 32bit ASIC needs a special MC firmware */ |
7377 |
++ if (RREG32(mmMC_SEQ_IO_DEBUG_DATA) == 0x05b4dc40) |
7378 |
++ chip_name = "polaris12_32"; |
7379 |
++ else |
7380 |
++ chip_name = "polaris12"; |
7381 |
++ } |
7382 |
+ break; |
7383 |
+ case CHIP_FIJI: |
7384 |
+ case CHIP_CARRIZO: |
7385 |
+diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c |
7386 |
+index def583916294d..9b844e9fb16ff 100644 |
7387 |
+--- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c |
7388 |
++++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c |
7389 |
+@@ -584,6 +584,10 @@ static void vcn_v3_0_mc_resume_dpg_mode(struct amdgpu_device *adev, int inst_idx |
7390 |
+ WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( |
7391 |
+ VCN, inst_idx, mmUVD_VCPU_NONCACHE_SIZE0), |
7392 |
+ AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_fw_shared)), 0, indirect); |
7393 |
++ |
7394 |
++ /* VCN global tiling registers */ |
7395 |
++ WREG32_SOC15_DPG_MODE(0, SOC15_DPG_MODE_OFFSET( |
7396 |
++ UVD, 0, mmUVD_GFX10_ADDR_CONFIG), adev->gfx.config.gb_addr_config, 0, indirect); |
7397 |
+ } |
7398 |
+ |
7399 |
+ static void vcn_v3_0_disable_static_power_gating(struct amdgpu_device *adev, int inst) |
7400 |
+diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_iommu.c b/drivers/gpu/drm/amd/amdkfd/kfd_iommu.c |
7401 |
+index 66bbca61e3ef5..9318936aa8054 100644 |
7402 |
+--- a/drivers/gpu/drm/amd/amdkfd/kfd_iommu.c |
7403 |
++++ b/drivers/gpu/drm/amd/amdkfd/kfd_iommu.c |
7404 |
+@@ -20,6 +20,10 @@ |
7405 |
+ * OTHER DEALINGS IN THE SOFTWARE. |
7406 |
+ */ |
7407 |
+ |
7408 |
++#include <linux/kconfig.h> |
7409 |
++ |
7410 |
++#if IS_REACHABLE(CONFIG_AMD_IOMMU_V2) |
7411 |
++ |
7412 |
+ #include <linux/printk.h> |
7413 |
+ #include <linux/device.h> |
7414 |
+ #include <linux/slab.h> |
7415 |
+@@ -355,3 +359,5 @@ int kfd_iommu_add_perf_counters(struct kfd_topology_device *kdev) |
7416 |
+ |
7417 |
+ return 0; |
7418 |
+ } |
7419 |
++ |
7420 |
++#endif |
7421 |
+diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_iommu.h b/drivers/gpu/drm/amd/amdkfd/kfd_iommu.h |
7422 |
+index dd23d9fdf6a82..afd420b01a0c2 100644 |
7423 |
+--- a/drivers/gpu/drm/amd/amdkfd/kfd_iommu.h |
7424 |
++++ b/drivers/gpu/drm/amd/amdkfd/kfd_iommu.h |
7425 |
+@@ -23,7 +23,9 @@ |
7426 |
+ #ifndef __KFD_IOMMU_H__ |
7427 |
+ #define __KFD_IOMMU_H__ |
7428 |
+ |
7429 |
+-#if defined(CONFIG_AMD_IOMMU_V2_MODULE) || defined(CONFIG_AMD_IOMMU_V2) |
7430 |
++#include <linux/kconfig.h> |
7431 |
++ |
7432 |
++#if IS_REACHABLE(CONFIG_AMD_IOMMU_V2) |
7433 |
+ |
7434 |
+ #define KFD_SUPPORT_IOMMU_V2 |
7435 |
+ |
7436 |
+@@ -46,6 +48,9 @@ static inline int kfd_iommu_check_device(struct kfd_dev *kfd) |
7437 |
+ } |
7438 |
+ static inline int kfd_iommu_device_init(struct kfd_dev *kfd) |
7439 |
+ { |
7440 |
++#if IS_MODULE(CONFIG_AMD_IOMMU_V2) |
7441 |
++ WARN_ONCE(1, "iommu_v2 module is not usable by built-in KFD"); |
7442 |
++#endif |
7443 |
+ return 0; |
7444 |
+ } |
7445 |
+ |
7446 |
+@@ -73,6 +78,6 @@ static inline int kfd_iommu_add_perf_counters(struct kfd_topology_device *kdev) |
7447 |
+ return 0; |
7448 |
+ } |
7449 |
+ |
7450 |
+-#endif /* defined(CONFIG_AMD_IOMMU_V2) */ |
7451 |
++#endif /* IS_REACHABLE(CONFIG_AMD_IOMMU_V2) */ |
7452 |
+ |
7453 |
+ #endif /* __KFD_IOMMU_H__ */ |
7454 |
+diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |
7455 |
+index fa4786a8296f0..36898ae63f306 100644 |
7456 |
+--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |
7457 |
++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |
7458 |
+@@ -3740,6 +3740,23 @@ static int fill_dc_scaling_info(const struct drm_plane_state *state, |
7459 |
+ scaling_info->src_rect.x = state->src_x >> 16; |
7460 |
+ scaling_info->src_rect.y = state->src_y >> 16; |
7461 |
+ |
7462 |
++ /* |
7463 |
++ * For reasons we don't (yet) fully understand a non-zero |
7464 |
++ * src_y coordinate into an NV12 buffer can cause a |
7465 |
++ * system hang. To avoid hangs (and maybe be overly cautious) |
7466 |
++ * let's reject both non-zero src_x and src_y. |
7467 |
++ * |
7468 |
++ * We currently know of only one use-case to reproduce a |
7469 |
++ * scenario with non-zero src_x and src_y for NV12, which |
7470 |
++ * is to gesture the YouTube Android app into full screen |
7471 |
++ * on ChromeOS. |
7472 |
++ */ |
7473 |
++ if (state->fb && |
7474 |
++ state->fb->format->format == DRM_FORMAT_NV12 && |
7475 |
++ (scaling_info->src_rect.x != 0 || |
7476 |
++ scaling_info->src_rect.y != 0)) |
7477 |
++ return -EINVAL; |
7478 |
++ |
7479 |
+ scaling_info->src_rect.width = state->src_w >> 16; |
7480 |
+ if (scaling_info->src_rect.width == 0) |
7481 |
+ return -EINVAL; |
7482 |
+@@ -9102,7 +9119,8 @@ static int dm_check_crtc_cursor(struct drm_atomic_state *state, |
7483 |
+ |
7484 |
+ new_cursor_state = drm_atomic_get_new_plane_state(state, crtc->cursor); |
7485 |
+ new_primary_state = drm_atomic_get_new_plane_state(state, crtc->primary); |
7486 |
+- if (!new_cursor_state || !new_primary_state || !new_cursor_state->fb) { |
7487 |
++ if (!new_cursor_state || !new_primary_state || |
7488 |
++ !new_cursor_state->fb || !new_primary_state->fb) { |
7489 |
+ return 0; |
7490 |
+ } |
7491 |
+ |
7492 |
+diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_abm.c b/drivers/gpu/drm/amd/display/dc/dce/dce_abm.c |
7493 |
+index 4e87e70237e3d..874b132fe1d78 100644 |
7494 |
+--- a/drivers/gpu/drm/amd/display/dc/dce/dce_abm.c |
7495 |
++++ b/drivers/gpu/drm/amd/display/dc/dce/dce_abm.c |
7496 |
+@@ -283,7 +283,7 @@ struct abm *dce_abm_create( |
7497 |
+ const struct dce_abm_shift *abm_shift, |
7498 |
+ const struct dce_abm_mask *abm_mask) |
7499 |
+ { |
7500 |
+- struct dce_abm *abm_dce = kzalloc(sizeof(*abm_dce), GFP_KERNEL); |
7501 |
++ struct dce_abm *abm_dce = kzalloc(sizeof(*abm_dce), GFP_ATOMIC); |
7502 |
+ |
7503 |
+ if (abm_dce == NULL) { |
7504 |
+ BREAK_TO_DEBUGGER(); |
7505 |
+diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c b/drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c |
7506 |
+index f3ed8b619cafd..4c397a099e075 100644 |
7507 |
+--- a/drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c |
7508 |
++++ b/drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c |
7509 |
+@@ -925,7 +925,7 @@ struct dmcu *dcn10_dmcu_create( |
7510 |
+ const struct dce_dmcu_shift *dmcu_shift, |
7511 |
+ const struct dce_dmcu_mask *dmcu_mask) |
7512 |
+ { |
7513 |
+- struct dce_dmcu *dmcu_dce = kzalloc(sizeof(*dmcu_dce), GFP_KERNEL); |
7514 |
++ struct dce_dmcu *dmcu_dce = kzalloc(sizeof(*dmcu_dce), GFP_ATOMIC); |
7515 |
+ |
7516 |
+ if (dmcu_dce == NULL) { |
7517 |
+ BREAK_TO_DEBUGGER(); |
7518 |
+@@ -946,7 +946,7 @@ struct dmcu *dcn20_dmcu_create( |
7519 |
+ const struct dce_dmcu_shift *dmcu_shift, |
7520 |
+ const struct dce_dmcu_mask *dmcu_mask) |
7521 |
+ { |
7522 |
+- struct dce_dmcu *dmcu_dce = kzalloc(sizeof(*dmcu_dce), GFP_KERNEL); |
7523 |
++ struct dce_dmcu *dmcu_dce = kzalloc(sizeof(*dmcu_dce), GFP_ATOMIC); |
7524 |
+ |
7525 |
+ if (dmcu_dce == NULL) { |
7526 |
+ BREAK_TO_DEBUGGER(); |
7527 |
+@@ -967,7 +967,7 @@ struct dmcu *dcn21_dmcu_create( |
7528 |
+ const struct dce_dmcu_shift *dmcu_shift, |
7529 |
+ const struct dce_dmcu_mask *dmcu_mask) |
7530 |
+ { |
7531 |
+- struct dce_dmcu *dmcu_dce = kzalloc(sizeof(*dmcu_dce), GFP_KERNEL); |
7532 |
++ struct dce_dmcu *dmcu_dce = kzalloc(sizeof(*dmcu_dce), GFP_ATOMIC); |
7533 |
+ |
7534 |
+ if (dmcu_dce == NULL) { |
7535 |
+ BREAK_TO_DEBUGGER(); |
7536 |
+diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.c |
7537 |
+index 62cc2651e00c1..8774406120fc1 100644 |
7538 |
+--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.c |
7539 |
++++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.c |
7540 |
+@@ -112,7 +112,7 @@ struct dccg *dccg2_create( |
7541 |
+ const struct dccg_shift *dccg_shift, |
7542 |
+ const struct dccg_mask *dccg_mask) |
7543 |
+ { |
7544 |
+- struct dcn_dccg *dccg_dcn = kzalloc(sizeof(*dccg_dcn), GFP_KERNEL); |
7545 |
++ struct dcn_dccg *dccg_dcn = kzalloc(sizeof(*dccg_dcn), GFP_ATOMIC); |
7546 |
+ struct dccg *base; |
7547 |
+ |
7548 |
+ if (dccg_dcn == NULL) { |
7549 |
+diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c |
7550 |
+index 354c2a2702d79..ef8e788baf153 100644 |
7551 |
+--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c |
7552 |
++++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c |
7553 |
+@@ -1104,7 +1104,7 @@ struct dpp *dcn20_dpp_create( |
7554 |
+ uint32_t inst) |
7555 |
+ { |
7556 |
+ struct dcn20_dpp *dpp = |
7557 |
+- kzalloc(sizeof(struct dcn20_dpp), GFP_KERNEL); |
7558 |
++ kzalloc(sizeof(struct dcn20_dpp), GFP_ATOMIC); |
7559 |
+ |
7560 |
+ if (!dpp) |
7561 |
+ return NULL; |
7562 |
+@@ -1122,7 +1122,7 @@ struct input_pixel_processor *dcn20_ipp_create( |
7563 |
+ struct dc_context *ctx, uint32_t inst) |
7564 |
+ { |
7565 |
+ struct dcn10_ipp *ipp = |
7566 |
+- kzalloc(sizeof(struct dcn10_ipp), GFP_KERNEL); |
7567 |
++ kzalloc(sizeof(struct dcn10_ipp), GFP_ATOMIC); |
7568 |
+ |
7569 |
+ if (!ipp) { |
7570 |
+ BREAK_TO_DEBUGGER(); |
7571 |
+@@ -1139,7 +1139,7 @@ struct output_pixel_processor *dcn20_opp_create( |
7572 |
+ struct dc_context *ctx, uint32_t inst) |
7573 |
+ { |
7574 |
+ struct dcn20_opp *opp = |
7575 |
+- kzalloc(sizeof(struct dcn20_opp), GFP_KERNEL); |
7576 |
++ kzalloc(sizeof(struct dcn20_opp), GFP_ATOMIC); |
7577 |
+ |
7578 |
+ if (!opp) { |
7579 |
+ BREAK_TO_DEBUGGER(); |
7580 |
+@@ -1156,7 +1156,7 @@ struct dce_aux *dcn20_aux_engine_create( |
7581 |
+ uint32_t inst) |
7582 |
+ { |
7583 |
+ struct aux_engine_dce110 *aux_engine = |
7584 |
+- kzalloc(sizeof(struct aux_engine_dce110), GFP_KERNEL); |
7585 |
++ kzalloc(sizeof(struct aux_engine_dce110), GFP_ATOMIC); |
7586 |
+ |
7587 |
+ if (!aux_engine) |
7588 |
+ return NULL; |
7589 |
+@@ -1194,7 +1194,7 @@ struct dce_i2c_hw *dcn20_i2c_hw_create( |
7590 |
+ uint32_t inst) |
7591 |
+ { |
7592 |
+ struct dce_i2c_hw *dce_i2c_hw = |
7593 |
+- kzalloc(sizeof(struct dce_i2c_hw), GFP_KERNEL); |
7594 |
++ kzalloc(sizeof(struct dce_i2c_hw), GFP_ATOMIC); |
7595 |
+ |
7596 |
+ if (!dce_i2c_hw) |
7597 |
+ return NULL; |
7598 |
+@@ -1207,7 +1207,7 @@ struct dce_i2c_hw *dcn20_i2c_hw_create( |
7599 |
+ struct mpc *dcn20_mpc_create(struct dc_context *ctx) |
7600 |
+ { |
7601 |
+ struct dcn20_mpc *mpc20 = kzalloc(sizeof(struct dcn20_mpc), |
7602 |
+- GFP_KERNEL); |
7603 |
++ GFP_ATOMIC); |
7604 |
+ |
7605 |
+ if (!mpc20) |
7606 |
+ return NULL; |
7607 |
+@@ -1225,7 +1225,7 @@ struct hubbub *dcn20_hubbub_create(struct dc_context *ctx) |
7608 |
+ { |
7609 |
+ int i; |
7610 |
+ struct dcn20_hubbub *hubbub = kzalloc(sizeof(struct dcn20_hubbub), |
7611 |
+- GFP_KERNEL); |
7612 |
++ GFP_ATOMIC); |
7613 |
+ |
7614 |
+ if (!hubbub) |
7615 |
+ return NULL; |
7616 |
+@@ -1253,7 +1253,7 @@ struct timing_generator *dcn20_timing_generator_create( |
7617 |
+ uint32_t instance) |
7618 |
+ { |
7619 |
+ struct optc *tgn10 = |
7620 |
+- kzalloc(sizeof(struct optc), GFP_KERNEL); |
7621 |
++ kzalloc(sizeof(struct optc), GFP_ATOMIC); |
7622 |
+ |
7623 |
+ if (!tgn10) |
7624 |
+ return NULL; |
7625 |
+@@ -1332,7 +1332,7 @@ static struct clock_source *dcn20_clock_source_create( |
7626 |
+ bool dp_clk_src) |
7627 |
+ { |
7628 |
+ struct dce110_clk_src *clk_src = |
7629 |
+- kzalloc(sizeof(struct dce110_clk_src), GFP_KERNEL); |
7630 |
++ kzalloc(sizeof(struct dce110_clk_src), GFP_ATOMIC); |
7631 |
+ |
7632 |
+ if (!clk_src) |
7633 |
+ return NULL; |
7634 |
+@@ -1438,7 +1438,7 @@ struct display_stream_compressor *dcn20_dsc_create( |
7635 |
+ struct dc_context *ctx, uint32_t inst) |
7636 |
+ { |
7637 |
+ struct dcn20_dsc *dsc = |
7638 |
+- kzalloc(sizeof(struct dcn20_dsc), GFP_KERNEL); |
7639 |
++ kzalloc(sizeof(struct dcn20_dsc), GFP_ATOMIC); |
7640 |
+ |
7641 |
+ if (!dsc) { |
7642 |
+ BREAK_TO_DEBUGGER(); |
7643 |
+@@ -1572,7 +1572,7 @@ struct hubp *dcn20_hubp_create( |
7644 |
+ uint32_t inst) |
7645 |
+ { |
7646 |
+ struct dcn20_hubp *hubp2 = |
7647 |
+- kzalloc(sizeof(struct dcn20_hubp), GFP_KERNEL); |
7648 |
++ kzalloc(sizeof(struct dcn20_hubp), GFP_ATOMIC); |
7649 |
+ |
7650 |
+ if (!hubp2) |
7651 |
+ return NULL; |
7652 |
+@@ -3388,7 +3388,7 @@ bool dcn20_mmhubbub_create(struct dc_context *ctx, struct resource_pool *pool) |
7653 |
+ |
7654 |
+ static struct pp_smu_funcs *dcn20_pp_smu_create(struct dc_context *ctx) |
7655 |
+ { |
7656 |
+- struct pp_smu_funcs *pp_smu = kzalloc(sizeof(*pp_smu), GFP_KERNEL); |
7657 |
++ struct pp_smu_funcs *pp_smu = kzalloc(sizeof(*pp_smu), GFP_ATOMIC); |
7658 |
+ |
7659 |
+ if (!pp_smu) |
7660 |
+ return pp_smu; |
7661 |
+@@ -4142,7 +4142,7 @@ struct resource_pool *dcn20_create_resource_pool( |
7662 |
+ struct dc *dc) |
7663 |
+ { |
7664 |
+ struct dcn20_resource_pool *pool = |
7665 |
+- kzalloc(sizeof(struct dcn20_resource_pool), GFP_KERNEL); |
7666 |
++ kzalloc(sizeof(struct dcn20_resource_pool), GFP_ATOMIC); |
7667 |
+ |
7668 |
+ if (!pool) |
7669 |
+ return NULL; |
7670 |
+diff --git a/drivers/gpu/drm/amd/display/dc/hdcp/hdcp_msg.c b/drivers/gpu/drm/amd/display/dc/hdcp/hdcp_msg.c |
7671 |
+index 5e384a8a83dc2..51855a2624cf4 100644 |
7672 |
+--- a/drivers/gpu/drm/amd/display/dc/hdcp/hdcp_msg.c |
7673 |
++++ b/drivers/gpu/drm/amd/display/dc/hdcp/hdcp_msg.c |
7674 |
+@@ -39,7 +39,7 @@ |
7675 |
+ #define HDCP14_KSV_SIZE 5 |
7676 |
+ #define HDCP14_MAX_KSV_FIFO_SIZE 127*HDCP14_KSV_SIZE |
7677 |
+ |
7678 |
+-static const bool hdcp_cmd_is_read[] = { |
7679 |
++static const bool hdcp_cmd_is_read[HDCP_MESSAGE_ID_MAX] = { |
7680 |
+ [HDCP_MESSAGE_ID_READ_BKSV] = true, |
7681 |
+ [HDCP_MESSAGE_ID_READ_RI_R0] = true, |
7682 |
+ [HDCP_MESSAGE_ID_READ_PJ] = true, |
7683 |
+@@ -75,7 +75,7 @@ static const bool hdcp_cmd_is_read[] = { |
7684 |
+ [HDCP_MESSAGE_ID_WRITE_CONTENT_STREAM_TYPE] = false |
7685 |
+ }; |
7686 |
+ |
7687 |
+-static const uint8_t hdcp_i2c_offsets[] = { |
7688 |
++static const uint8_t hdcp_i2c_offsets[HDCP_MESSAGE_ID_MAX] = { |
7689 |
+ [HDCP_MESSAGE_ID_READ_BKSV] = 0x0, |
7690 |
+ [HDCP_MESSAGE_ID_READ_RI_R0] = 0x8, |
7691 |
+ [HDCP_MESSAGE_ID_READ_PJ] = 0xA, |
7692 |
+@@ -106,7 +106,8 @@ static const uint8_t hdcp_i2c_offsets[] = { |
7693 |
+ [HDCP_MESSAGE_ID_WRITE_REPEATER_AUTH_SEND_ACK] = 0x60, |
7694 |
+ [HDCP_MESSAGE_ID_WRITE_REPEATER_AUTH_STREAM_MANAGE] = 0x60, |
7695 |
+ [HDCP_MESSAGE_ID_READ_REPEATER_AUTH_STREAM_READY] = 0x80, |
7696 |
+- [HDCP_MESSAGE_ID_READ_RXSTATUS] = 0x70 |
7697 |
++ [HDCP_MESSAGE_ID_READ_RXSTATUS] = 0x70, |
7698 |
++ [HDCP_MESSAGE_ID_WRITE_CONTENT_STREAM_TYPE] = 0x0, |
7699 |
+ }; |
7700 |
+ |
7701 |
+ struct protection_properties { |
7702 |
+@@ -184,7 +185,7 @@ static const struct protection_properties hdmi_14_protection = { |
7703 |
+ .process_transaction = hdmi_14_process_transaction |
7704 |
+ }; |
7705 |
+ |
7706 |
+-static const uint32_t hdcp_dpcd_addrs[] = { |
7707 |
++static const uint32_t hdcp_dpcd_addrs[HDCP_MESSAGE_ID_MAX] = { |
7708 |
+ [HDCP_MESSAGE_ID_READ_BKSV] = 0x68000, |
7709 |
+ [HDCP_MESSAGE_ID_READ_RI_R0] = 0x68005, |
7710 |
+ [HDCP_MESSAGE_ID_READ_PJ] = 0xFFFFFFFF, |
7711 |
+diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c |
7712 |
+index e84c737e39673..57b5a9e968931 100644 |
7713 |
+--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c |
7714 |
++++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c |
7715 |
+@@ -1931,6 +1931,7 @@ int smu_set_power_limit(struct smu_context *smu, uint32_t limit) |
7716 |
+ dev_err(smu->adev->dev, |
7717 |
+ "New power limit (%d) is over the max allowed %d\n", |
7718 |
+ limit, smu->max_power_limit); |
7719 |
++ ret = -EINVAL; |
7720 |
+ goto out; |
7721 |
+ } |
7722 |
+ |
7723 |
+diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig |
7724 |
+index e4110d6ca7b3c..bc60fc4728d70 100644 |
7725 |
+--- a/drivers/gpu/drm/bridge/Kconfig |
7726 |
++++ b/drivers/gpu/drm/bridge/Kconfig |
7727 |
+@@ -67,6 +67,7 @@ config DRM_LONTIUM_LT9611UXC |
7728 |
+ depends on OF |
7729 |
+ select DRM_PANEL_BRIDGE |
7730 |
+ select DRM_KMS_HELPER |
7731 |
++ select DRM_MIPI_DSI |
7732 |
+ select REGMAP_I2C |
7733 |
+ help |
7734 |
+ Driver for Lontium LT9611UXC DSI to HDMI bridge |
7735 |
+@@ -151,6 +152,7 @@ config DRM_SII902X |
7736 |
+ tristate "Silicon Image sii902x RGB/HDMI bridge" |
7737 |
+ depends on OF |
7738 |
+ select DRM_KMS_HELPER |
7739 |
++ select DRM_MIPI_DSI |
7740 |
+ select REGMAP_I2C |
7741 |
+ select I2C_MUX |
7742 |
+ select SND_SOC_HDMI_CODEC if SND_SOC |
7743 |
+@@ -200,6 +202,7 @@ config DRM_TOSHIBA_TC358767 |
7744 |
+ tristate "Toshiba TC358767 eDP bridge" |
7745 |
+ depends on OF |
7746 |
+ select DRM_KMS_HELPER |
7747 |
++ select DRM_MIPI_DSI |
7748 |
+ select REGMAP_I2C |
7749 |
+ select DRM_PANEL |
7750 |
+ help |
7751 |
+diff --git a/drivers/gpu/drm/bridge/analogix/Kconfig b/drivers/gpu/drm/bridge/analogix/Kconfig |
7752 |
+index 024ea2a570e74..9160fd80dd704 100644 |
7753 |
+--- a/drivers/gpu/drm/bridge/analogix/Kconfig |
7754 |
++++ b/drivers/gpu/drm/bridge/analogix/Kconfig |
7755 |
+@@ -30,6 +30,7 @@ config DRM_ANALOGIX_ANX7625 |
7756 |
+ tristate "Analogix Anx7625 MIPI to DP interface support" |
7757 |
+ depends on DRM |
7758 |
+ depends on OF |
7759 |
++ select DRM_MIPI_DSI |
7760 |
+ help |
7761 |
+ ANX7625 is an ultra-low power 4K mobile HD transmitter |
7762 |
+ designed for portable devices. It converts MIPI/DPI to |
7763 |
+diff --git a/drivers/gpu/drm/bridge/panel.c b/drivers/gpu/drm/bridge/panel.c |
7764 |
+index 0ddc37551194e..c916f4b8907ef 100644 |
7765 |
+--- a/drivers/gpu/drm/bridge/panel.c |
7766 |
++++ b/drivers/gpu/drm/bridge/panel.c |
7767 |
+@@ -87,6 +87,18 @@ static int panel_bridge_attach(struct drm_bridge *bridge, |
7768 |
+ |
7769 |
+ static void panel_bridge_detach(struct drm_bridge *bridge) |
7770 |
+ { |
7771 |
++ struct panel_bridge *panel_bridge = drm_bridge_to_panel_bridge(bridge); |
7772 |
++ struct drm_connector *connector = &panel_bridge->connector; |
7773 |
++ |
7774 |
++ /* |
7775 |
++ * Cleanup the connector if we know it was initialized. |
7776 |
++ * |
7777 |
++ * FIXME: This wouldn't be needed if the panel_bridge structure was |
7778 |
++ * allocated with drmm_kzalloc(). This might be tricky since the |
7779 |
++ * drm_device pointer can only be retrieved when the bridge is attached. |
7780 |
++ */ |
7781 |
++ if (connector->dev) |
7782 |
++ drm_connector_cleanup(connector); |
7783 |
+ } |
7784 |
+ |
7785 |
+ static void panel_bridge_pre_enable(struct drm_bridge *bridge) |
7786 |
+diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c |
7787 |
+index 405501c74e400..6d4fb07cc9e78 100644 |
7788 |
+--- a/drivers/gpu/drm/drm_dp_mst_topology.c |
7789 |
++++ b/drivers/gpu/drm/drm_dp_mst_topology.c |
7790 |
+@@ -1154,6 +1154,7 @@ static void build_clear_payload_id_table(struct drm_dp_sideband_msg_tx *msg) |
7791 |
+ |
7792 |
+ req.req_type = DP_CLEAR_PAYLOAD_ID_TABLE; |
7793 |
+ drm_dp_encode_sideband_req(&req, msg); |
7794 |
++ msg->path_msg = true; |
7795 |
+ } |
7796 |
+ |
7797 |
+ static int build_enum_path_resources(struct drm_dp_sideband_msg_tx *msg, |
7798 |
+@@ -2824,15 +2825,21 @@ static int set_hdr_from_dst_qlock(struct drm_dp_sideband_msg_hdr *hdr, |
7799 |
+ |
7800 |
+ req_type = txmsg->msg[0] & 0x7f; |
7801 |
+ if (req_type == DP_CONNECTION_STATUS_NOTIFY || |
7802 |
+- req_type == DP_RESOURCE_STATUS_NOTIFY) |
7803 |
++ req_type == DP_RESOURCE_STATUS_NOTIFY || |
7804 |
++ req_type == DP_CLEAR_PAYLOAD_ID_TABLE) |
7805 |
+ hdr->broadcast = 1; |
7806 |
+ else |
7807 |
+ hdr->broadcast = 0; |
7808 |
+ hdr->path_msg = txmsg->path_msg; |
7809 |
+- hdr->lct = mstb->lct; |
7810 |
+- hdr->lcr = mstb->lct - 1; |
7811 |
+- if (mstb->lct > 1) |
7812 |
+- memcpy(hdr->rad, mstb->rad, mstb->lct / 2); |
7813 |
++ if (hdr->broadcast) { |
7814 |
++ hdr->lct = 1; |
7815 |
++ hdr->lcr = 6; |
7816 |
++ } else { |
7817 |
++ hdr->lct = mstb->lct; |
7818 |
++ hdr->lcr = mstb->lct - 1; |
7819 |
++ } |
7820 |
++ |
7821 |
++ memcpy(hdr->rad, mstb->rad, hdr->lct / 2); |
7822 |
+ |
7823 |
+ return 0; |
7824 |
+ } |
7825 |
+diff --git a/drivers/gpu/drm/drm_probe_helper.c b/drivers/gpu/drm/drm_probe_helper.c |
7826 |
+index d6017726cc2a0..e5432dcf69996 100644 |
7827 |
+--- a/drivers/gpu/drm/drm_probe_helper.c |
7828 |
++++ b/drivers/gpu/drm/drm_probe_helper.c |
7829 |
+@@ -623,6 +623,7 @@ static void output_poll_execute(struct work_struct *work) |
7830 |
+ struct drm_connector_list_iter conn_iter; |
7831 |
+ enum drm_connector_status old_status; |
7832 |
+ bool repoll = false, changed; |
7833 |
++ u64 old_epoch_counter; |
7834 |
+ |
7835 |
+ if (!dev->mode_config.poll_enabled) |
7836 |
+ return; |
7837 |
+@@ -659,8 +660,9 @@ static void output_poll_execute(struct work_struct *work) |
7838 |
+ |
7839 |
+ repoll = true; |
7840 |
+ |
7841 |
++ old_epoch_counter = connector->epoch_counter; |
7842 |
+ connector->status = drm_helper_probe_detect(connector, NULL, false); |
7843 |
+- if (old_status != connector->status) { |
7844 |
++ if (old_epoch_counter != connector->epoch_counter) { |
7845 |
+ const char *old, *new; |
7846 |
+ |
7847 |
+ /* |
7848 |
+@@ -689,6 +691,9 @@ static void output_poll_execute(struct work_struct *work) |
7849 |
+ connector->base.id, |
7850 |
+ connector->name, |
7851 |
+ old, new); |
7852 |
++ DRM_DEBUG_KMS("[CONNECTOR:%d:%s] epoch counter %llu -> %llu\n", |
7853 |
++ connector->base.id, connector->name, |
7854 |
++ old_epoch_counter, connector->epoch_counter); |
7855 |
+ |
7856 |
+ changed = true; |
7857 |
+ } |
7858 |
+diff --git a/drivers/gpu/drm/i915/gvt/gvt.c b/drivers/gpu/drm/i915/gvt/gvt.c |
7859 |
+index d1d8ee4a5f16a..57578bf28d774 100644 |
7860 |
+--- a/drivers/gpu/drm/i915/gvt/gvt.c |
7861 |
++++ b/drivers/gpu/drm/i915/gvt/gvt.c |
7862 |
+@@ -126,7 +126,7 @@ static bool intel_get_gvt_attrs(struct attribute_group ***intel_vgpu_type_groups |
7863 |
+ return true; |
7864 |
+ } |
7865 |
+ |
7866 |
+-static bool intel_gvt_init_vgpu_type_groups(struct intel_gvt *gvt) |
7867 |
++static int intel_gvt_init_vgpu_type_groups(struct intel_gvt *gvt) |
7868 |
+ { |
7869 |
+ int i, j; |
7870 |
+ struct intel_vgpu_type *type; |
7871 |
+@@ -144,7 +144,7 @@ static bool intel_gvt_init_vgpu_type_groups(struct intel_gvt *gvt) |
7872 |
+ gvt_vgpu_type_groups[i] = group; |
7873 |
+ } |
7874 |
+ |
7875 |
+- return true; |
7876 |
++ return 0; |
7877 |
+ |
7878 |
+ unwind: |
7879 |
+ for (j = 0; j < i; j++) { |
7880 |
+@@ -152,7 +152,7 @@ unwind: |
7881 |
+ kfree(group); |
7882 |
+ } |
7883 |
+ |
7884 |
+- return false; |
7885 |
++ return -ENOMEM; |
7886 |
+ } |
7887 |
+ |
7888 |
+ static void intel_gvt_cleanup_vgpu_type_groups(struct intel_gvt *gvt) |
7889 |
+@@ -360,7 +360,7 @@ int intel_gvt_init_device(struct drm_i915_private *i915) |
7890 |
+ goto out_clean_thread; |
7891 |
+ |
7892 |
+ ret = intel_gvt_init_vgpu_type_groups(gvt); |
7893 |
+- if (ret == false) { |
7894 |
++ if (ret) { |
7895 |
+ gvt_err("failed to init vgpu type groups: %d\n", ret); |
7896 |
+ goto out_clean_types; |
7897 |
+ } |
7898 |
+diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c |
7899 |
+index 368bfef8b3403..4e0685e1c0eb6 100644 |
7900 |
+--- a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c |
7901 |
++++ b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c |
7902 |
+@@ -553,7 +553,7 @@ static void ingenic_drm_plane_atomic_update(struct drm_plane *plane, |
7903 |
+ height = state->src_h >> 16; |
7904 |
+ cpp = state->fb->format->cpp[0]; |
7905 |
+ |
7906 |
+- if (priv->soc_info->has_osd && plane->type == DRM_PLANE_TYPE_OVERLAY) |
7907 |
++ if (!priv->soc_info->has_osd || plane->type == DRM_PLANE_TYPE_OVERLAY) |
7908 |
+ hwdesc = &priv->dma_hwdescs->hwdesc_f0; |
7909 |
+ else |
7910 |
+ hwdesc = &priv->dma_hwdescs->hwdesc_f1; |
7911 |
+@@ -809,6 +809,7 @@ static int ingenic_drm_bind(struct device *dev, bool has_components) |
7912 |
+ const struct jz_soc_info *soc_info; |
7913 |
+ struct ingenic_drm *priv; |
7914 |
+ struct clk *parent_clk; |
7915 |
++ struct drm_plane *primary; |
7916 |
+ struct drm_bridge *bridge; |
7917 |
+ struct drm_panel *panel; |
7918 |
+ struct drm_encoder *encoder; |
7919 |
+@@ -923,9 +924,11 @@ static int ingenic_drm_bind(struct device *dev, bool has_components) |
7920 |
+ if (soc_info->has_osd) |
7921 |
+ priv->ipu_plane = drm_plane_from_index(drm, 0); |
7922 |
+ |
7923 |
+- drm_plane_helper_add(&priv->f1, &ingenic_drm_plane_helper_funcs); |
7924 |
++ primary = priv->soc_info->has_osd ? &priv->f1 : &priv->f0; |
7925 |
+ |
7926 |
+- ret = drm_universal_plane_init(drm, &priv->f1, 1, |
7927 |
++ drm_plane_helper_add(primary, &ingenic_drm_plane_helper_funcs); |
7928 |
++ |
7929 |
++ ret = drm_universal_plane_init(drm, primary, 1, |
7930 |
+ &ingenic_drm_primary_plane_funcs, |
7931 |
+ priv->soc_info->formats_f1, |
7932 |
+ priv->soc_info->num_formats_f1, |
7933 |
+@@ -937,7 +940,7 @@ static int ingenic_drm_bind(struct device *dev, bool has_components) |
7934 |
+ |
7935 |
+ drm_crtc_helper_add(&priv->crtc, &ingenic_drm_crtc_helper_funcs); |
7936 |
+ |
7937 |
+- ret = drm_crtc_init_with_planes(drm, &priv->crtc, &priv->f1, |
7938 |
++ ret = drm_crtc_init_with_planes(drm, &priv->crtc, primary, |
7939 |
+ NULL, &ingenic_drm_crtc_funcs, NULL); |
7940 |
+ if (ret) { |
7941 |
+ dev_err(dev, "Failed to init CRTC: %i\n", ret); |
7942 |
+diff --git a/drivers/gpu/drm/mcde/mcde_dsi.c b/drivers/gpu/drm/mcde/mcde_dsi.c |
7943 |
+index 2314c81229920..b3fd3501c4127 100644 |
7944 |
+--- a/drivers/gpu/drm/mcde/mcde_dsi.c |
7945 |
++++ b/drivers/gpu/drm/mcde/mcde_dsi.c |
7946 |
+@@ -760,7 +760,7 @@ static void mcde_dsi_start(struct mcde_dsi *d) |
7947 |
+ DSI_MCTL_MAIN_DATA_CTL_BTA_EN | |
7948 |
+ DSI_MCTL_MAIN_DATA_CTL_READ_EN | |
7949 |
+ DSI_MCTL_MAIN_DATA_CTL_REG_TE_EN; |
7950 |
+- if (d->mdsi->mode_flags & MIPI_DSI_MODE_EOT_PACKET) |
7951 |
++ if (!(d->mdsi->mode_flags & MIPI_DSI_MODE_EOT_PACKET)) |
7952 |
+ val |= DSI_MCTL_MAIN_DATA_CTL_HOST_EOT_GEN; |
7953 |
+ writel(val, d->regs + DSI_MCTL_MAIN_DATA_CTL); |
7954 |
+ |
7955 |
+diff --git a/drivers/gpu/drm/msm/msm_debugfs.c b/drivers/gpu/drm/msm/msm_debugfs.c |
7956 |
+index 85ad0babc3260..d611cc8e54a45 100644 |
7957 |
+--- a/drivers/gpu/drm/msm/msm_debugfs.c |
7958 |
++++ b/drivers/gpu/drm/msm/msm_debugfs.c |
7959 |
+@@ -111,23 +111,15 @@ static const struct file_operations msm_gpu_fops = { |
7960 |
+ static int msm_gem_show(struct drm_device *dev, struct seq_file *m) |
7961 |
+ { |
7962 |
+ struct msm_drm_private *priv = dev->dev_private; |
7963 |
+- struct msm_gpu *gpu = priv->gpu; |
7964 |
+ int ret; |
7965 |
+ |
7966 |
+- ret = mutex_lock_interruptible(&priv->mm_lock); |
7967 |
++ ret = mutex_lock_interruptible(&priv->obj_lock); |
7968 |
+ if (ret) |
7969 |
+ return ret; |
7970 |
+ |
7971 |
+- if (gpu) { |
7972 |
+- seq_printf(m, "Active Objects (%s):\n", gpu->name); |
7973 |
+- msm_gem_describe_objects(&gpu->active_list, m); |
7974 |
+- } |
7975 |
+- |
7976 |
+- seq_printf(m, "Inactive Objects:\n"); |
7977 |
+- msm_gem_describe_objects(&priv->inactive_dontneed, m); |
7978 |
+- msm_gem_describe_objects(&priv->inactive_willneed, m); |
7979 |
++ msm_gem_describe_objects(&priv->objects, m); |
7980 |
+ |
7981 |
+- mutex_unlock(&priv->mm_lock); |
7982 |
++ mutex_unlock(&priv->obj_lock); |
7983 |
+ |
7984 |
+ return 0; |
7985 |
+ } |
7986 |
+diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c |
7987 |
+index 196907689c82e..18ea1c66de718 100644 |
7988 |
+--- a/drivers/gpu/drm/msm/msm_drv.c |
7989 |
++++ b/drivers/gpu/drm/msm/msm_drv.c |
7990 |
+@@ -446,6 +446,9 @@ static int msm_drm_init(struct device *dev, const struct drm_driver *drv) |
7991 |
+ |
7992 |
+ priv->wq = alloc_ordered_workqueue("msm", 0); |
7993 |
+ |
7994 |
++ INIT_LIST_HEAD(&priv->objects); |
7995 |
++ mutex_init(&priv->obj_lock); |
7996 |
++ |
7997 |
+ INIT_LIST_HEAD(&priv->inactive_willneed); |
7998 |
+ INIT_LIST_HEAD(&priv->inactive_dontneed); |
7999 |
+ mutex_init(&priv->mm_lock); |
8000 |
+diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h |
8001 |
+index 591c47a654e83..6b58e49754cbc 100644 |
8002 |
+--- a/drivers/gpu/drm/msm/msm_drv.h |
8003 |
++++ b/drivers/gpu/drm/msm/msm_drv.h |
8004 |
+@@ -174,7 +174,14 @@ struct msm_drm_private { |
8005 |
+ struct msm_rd_state *hangrd; /* debugfs to dump hanging submits */ |
8006 |
+ struct msm_perf_state *perf; |
8007 |
+ |
8008 |
+- /* |
8009 |
++ /** |
8010 |
++ * List of all GEM objects (mainly for debugfs, protected by obj_lock |
8011 |
++ * (acquire before per GEM object lock) |
8012 |
++ */ |
8013 |
++ struct list_head objects; |
8014 |
++ struct mutex obj_lock; |
8015 |
++ |
8016 |
++ /** |
8017 |
+ * Lists of inactive GEM objects. Every bo is either in one of the |
8018 |
+ * inactive lists (depending on whether or not it is shrinkable) or |
8019 |
+ * gpu->active_list (for the gpu it is active on[1]) |
8020 |
+diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c |
8021 |
+index 9d10739c4eb2d..27eea26119ef9 100644 |
8022 |
+--- a/drivers/gpu/drm/msm/msm_gem.c |
8023 |
++++ b/drivers/gpu/drm/msm/msm_gem.c |
8024 |
+@@ -951,7 +951,7 @@ void msm_gem_describe_objects(struct list_head *list, struct seq_file *m) |
8025 |
+ size_t size = 0; |
8026 |
+ |
8027 |
+ seq_puts(m, " flags id ref offset kaddr size madv name\n"); |
8028 |
+- list_for_each_entry(msm_obj, list, mm_list) { |
8029 |
++ list_for_each_entry(msm_obj, list, node) { |
8030 |
+ struct drm_gem_object *obj = &msm_obj->base; |
8031 |
+ seq_puts(m, " "); |
8032 |
+ msm_gem_describe(obj, m); |
8033 |
+@@ -970,6 +970,10 @@ void msm_gem_free_object(struct drm_gem_object *obj) |
8034 |
+ struct drm_device *dev = obj->dev; |
8035 |
+ struct msm_drm_private *priv = dev->dev_private; |
8036 |
+ |
8037 |
++ mutex_lock(&priv->obj_lock); |
8038 |
++ list_del(&msm_obj->node); |
8039 |
++ mutex_unlock(&priv->obj_lock); |
8040 |
++ |
8041 |
+ mutex_lock(&priv->mm_lock); |
8042 |
+ list_del(&msm_obj->mm_list); |
8043 |
+ mutex_unlock(&priv->mm_lock); |
8044 |
+@@ -1158,6 +1162,10 @@ static struct drm_gem_object *_msm_gem_new(struct drm_device *dev, |
8045 |
+ list_add_tail(&msm_obj->mm_list, &priv->inactive_willneed); |
8046 |
+ mutex_unlock(&priv->mm_lock); |
8047 |
+ |
8048 |
++ mutex_lock(&priv->obj_lock); |
8049 |
++ list_add_tail(&msm_obj->node, &priv->objects); |
8050 |
++ mutex_unlock(&priv->obj_lock); |
8051 |
++ |
8052 |
+ return obj; |
8053 |
+ |
8054 |
+ fail: |
8055 |
+@@ -1228,6 +1236,10 @@ struct drm_gem_object *msm_gem_import(struct drm_device *dev, |
8056 |
+ list_add_tail(&msm_obj->mm_list, &priv->inactive_willneed); |
8057 |
+ mutex_unlock(&priv->mm_lock); |
8058 |
+ |
8059 |
++ mutex_lock(&priv->obj_lock); |
8060 |
++ list_add_tail(&msm_obj->node, &priv->objects); |
8061 |
++ mutex_unlock(&priv->obj_lock); |
8062 |
++ |
8063 |
+ return obj; |
8064 |
+ |
8065 |
+ fail: |
8066 |
+diff --git a/drivers/gpu/drm/msm/msm_gem.h b/drivers/gpu/drm/msm/msm_gem.h |
8067 |
+index b3a0a880cbabe..99d4c0e9465ec 100644 |
8068 |
+--- a/drivers/gpu/drm/msm/msm_gem.h |
8069 |
++++ b/drivers/gpu/drm/msm/msm_gem.h |
8070 |
+@@ -55,8 +55,16 @@ struct msm_gem_object { |
8071 |
+ */ |
8072 |
+ uint8_t vmap_count; |
8073 |
+ |
8074 |
+- /* And object is either: |
8075 |
+- * inactive - on priv->inactive_list |
8076 |
++ /** |
8077 |
++ * Node in list of all objects (mainly for debugfs, protected by |
8078 |
++ * priv->obj_lock |
8079 |
++ */ |
8080 |
++ struct list_head node; |
8081 |
++ |
8082 |
++ /** |
8083 |
++ * An object is either: |
8084 |
++ * inactive - on priv->inactive_dontneed or priv->inactive_willneed |
8085 |
++ * (depending on purgability status) |
8086 |
+ * active - on one one of the gpu's active_list.. well, at |
8087 |
+ * least for now we don't have (I don't think) hw sync between |
8088 |
+ * 2d and 3d one devices which have both, meaning we need to |
8089 |
+diff --git a/drivers/gpu/drm/panel/panel-novatek-nt35510.c b/drivers/gpu/drm/panel/panel-novatek-nt35510.c |
8090 |
+index b9a0e56f33e24..ef70140c5b09d 100644 |
8091 |
+--- a/drivers/gpu/drm/panel/panel-novatek-nt35510.c |
8092 |
++++ b/drivers/gpu/drm/panel/panel-novatek-nt35510.c |
8093 |
+@@ -898,8 +898,7 @@ static int nt35510_probe(struct mipi_dsi_device *dsi) |
8094 |
+ */ |
8095 |
+ dsi->hs_rate = 349440000; |
8096 |
+ dsi->lp_rate = 9600000; |
8097 |
+- dsi->mode_flags = MIPI_DSI_CLOCK_NON_CONTINUOUS | |
8098 |
+- MIPI_DSI_MODE_EOT_PACKET; |
8099 |
++ dsi->mode_flags = MIPI_DSI_CLOCK_NON_CONTINUOUS; |
8100 |
+ |
8101 |
+ /* |
8102 |
+ * Every new incarnation of this display must have a unique |
8103 |
+diff --git a/drivers/gpu/drm/panel/panel-samsung-s6d16d0.c b/drivers/gpu/drm/panel/panel-samsung-s6d16d0.c |
8104 |
+index 4aac0d1573dd0..70560cac53a99 100644 |
8105 |
+--- a/drivers/gpu/drm/panel/panel-samsung-s6d16d0.c |
8106 |
++++ b/drivers/gpu/drm/panel/panel-samsung-s6d16d0.c |
8107 |
+@@ -184,9 +184,7 @@ static int s6d16d0_probe(struct mipi_dsi_device *dsi) |
8108 |
+ * As we only send commands we do not need to be continuously |
8109 |
+ * clocked. |
8110 |
+ */ |
8111 |
+- dsi->mode_flags = |
8112 |
+- MIPI_DSI_CLOCK_NON_CONTINUOUS | |
8113 |
+- MIPI_DSI_MODE_EOT_PACKET; |
8114 |
++ dsi->mode_flags = MIPI_DSI_CLOCK_NON_CONTINUOUS; |
8115 |
+ |
8116 |
+ s6->supply = devm_regulator_get(dev, "vdd1"); |
8117 |
+ if (IS_ERR(s6->supply)) |
8118 |
+diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e63m0-dsi.c b/drivers/gpu/drm/panel/panel-samsung-s6e63m0-dsi.c |
8119 |
+index eec74c10dddaf..9c3563c61e8cc 100644 |
8120 |
+--- a/drivers/gpu/drm/panel/panel-samsung-s6e63m0-dsi.c |
8121 |
++++ b/drivers/gpu/drm/panel/panel-samsung-s6e63m0-dsi.c |
8122 |
+@@ -97,7 +97,6 @@ static int s6e63m0_dsi_probe(struct mipi_dsi_device *dsi) |
8123 |
+ dsi->hs_rate = 349440000; |
8124 |
+ dsi->lp_rate = 9600000; |
8125 |
+ dsi->mode_flags = MIPI_DSI_MODE_VIDEO | |
8126 |
+- MIPI_DSI_MODE_EOT_PACKET | |
8127 |
+ MIPI_DSI_MODE_VIDEO_BURST; |
8128 |
+ |
8129 |
+ ret = s6e63m0_probe(dev, s6e63m0_dsi_dcs_read, s6e63m0_dsi_dcs_write, |
8130 |
+diff --git a/drivers/gpu/drm/panel/panel-sony-acx424akp.c b/drivers/gpu/drm/panel/panel-sony-acx424akp.c |
8131 |
+index 065efae213f5b..95659a4d15e97 100644 |
8132 |
+--- a/drivers/gpu/drm/panel/panel-sony-acx424akp.c |
8133 |
++++ b/drivers/gpu/drm/panel/panel-sony-acx424akp.c |
8134 |
+@@ -449,8 +449,7 @@ static int acx424akp_probe(struct mipi_dsi_device *dsi) |
8135 |
+ MIPI_DSI_MODE_VIDEO_BURST; |
8136 |
+ else |
8137 |
+ dsi->mode_flags = |
8138 |
+- MIPI_DSI_CLOCK_NON_CONTINUOUS | |
8139 |
+- MIPI_DSI_MODE_EOT_PACKET; |
8140 |
++ MIPI_DSI_CLOCK_NON_CONTINUOUS; |
8141 |
+ |
8142 |
+ acx->supply = devm_regulator_get(dev, "vddi"); |
8143 |
+ if (IS_ERR(acx->supply)) |
8144 |
+diff --git a/drivers/gpu/drm/panfrost/panfrost_mmu.c b/drivers/gpu/drm/panfrost/panfrost_mmu.c |
8145 |
+index 7c1b3481b7850..21e552d1ac71a 100644 |
8146 |
+--- a/drivers/gpu/drm/panfrost/panfrost_mmu.c |
8147 |
++++ b/drivers/gpu/drm/panfrost/panfrost_mmu.c |
8148 |
+@@ -488,8 +488,14 @@ static int panfrost_mmu_map_fault_addr(struct panfrost_device *pfdev, int as, |
8149 |
+ } |
8150 |
+ bo->base.pages = pages; |
8151 |
+ bo->base.pages_use_count = 1; |
8152 |
+- } else |
8153 |
++ } else { |
8154 |
+ pages = bo->base.pages; |
8155 |
++ if (pages[page_offset]) { |
8156 |
++ /* Pages are already mapped, bail out. */ |
8157 |
++ mutex_unlock(&bo->base.pages_lock); |
8158 |
++ goto out; |
8159 |
++ } |
8160 |
++ } |
8161 |
+ |
8162 |
+ mapping = bo->base.base.filp->f_mapping; |
8163 |
+ mapping_set_unevictable(mapping); |
8164 |
+@@ -522,6 +528,7 @@ static int panfrost_mmu_map_fault_addr(struct panfrost_device *pfdev, int as, |
8165 |
+ |
8166 |
+ dev_dbg(pfdev->dev, "mapped page fault @ AS%d %llx", as, addr); |
8167 |
+ |
8168 |
++out: |
8169 |
+ panfrost_gem_mapping_put(bomapping); |
8170 |
+ |
8171 |
+ return 0; |
8172 |
+@@ -593,6 +600,8 @@ static irqreturn_t panfrost_mmu_irq_handler_thread(int irq, void *data) |
8173 |
+ access_type = (fault_status >> 8) & 0x3; |
8174 |
+ source_id = (fault_status >> 16); |
8175 |
+ |
8176 |
++ mmu_write(pfdev, MMU_INT_CLEAR, mask); |
8177 |
++ |
8178 |
+ /* Page fault only */ |
8179 |
+ ret = -1; |
8180 |
+ if ((status & mask) == BIT(i) && (exception_type & 0xF8) == 0xC0) |
8181 |
+@@ -616,8 +625,6 @@ static irqreturn_t panfrost_mmu_irq_handler_thread(int irq, void *data) |
8182 |
+ access_type, access_type_name(pfdev, fault_status), |
8183 |
+ source_id); |
8184 |
+ |
8185 |
+- mmu_write(pfdev, MMU_INT_CLEAR, mask); |
8186 |
+- |
8187 |
+ status &= ~mask; |
8188 |
+ } |
8189 |
+ |
8190 |
+diff --git a/drivers/gpu/drm/qxl/qxl_cmd.c b/drivers/gpu/drm/qxl/qxl_cmd.c |
8191 |
+index 54e3c3a974407..741cc983daf1c 100644 |
8192 |
+--- a/drivers/gpu/drm/qxl/qxl_cmd.c |
8193 |
++++ b/drivers/gpu/drm/qxl/qxl_cmd.c |
8194 |
+@@ -268,7 +268,7 @@ int qxl_alloc_bo_reserved(struct qxl_device *qdev, |
8195 |
+ int ret; |
8196 |
+ |
8197 |
+ ret = qxl_bo_create(qdev, size, false /* not kernel - device */, |
8198 |
+- false, QXL_GEM_DOMAIN_VRAM, NULL, &bo); |
8199 |
++ false, QXL_GEM_DOMAIN_VRAM, 0, NULL, &bo); |
8200 |
+ if (ret) { |
8201 |
+ DRM_ERROR("failed to allocate VRAM BO\n"); |
8202 |
+ return ret; |
8203 |
+diff --git a/drivers/gpu/drm/qxl/qxl_display.c b/drivers/gpu/drm/qxl/qxl_display.c |
8204 |
+index 56e0c6c625e9a..3f432ec8e771c 100644 |
8205 |
+--- a/drivers/gpu/drm/qxl/qxl_display.c |
8206 |
++++ b/drivers/gpu/drm/qxl/qxl_display.c |
8207 |
+@@ -798,8 +798,8 @@ static int qxl_plane_prepare_fb(struct drm_plane *plane, |
8208 |
+ qdev->dumb_shadow_bo = NULL; |
8209 |
+ } |
8210 |
+ qxl_bo_create(qdev, surf.height * surf.stride, |
8211 |
+- true, true, QXL_GEM_DOMAIN_SURFACE, &surf, |
8212 |
+- &qdev->dumb_shadow_bo); |
8213 |
++ true, true, QXL_GEM_DOMAIN_SURFACE, 0, |
8214 |
++ &surf, &qdev->dumb_shadow_bo); |
8215 |
+ } |
8216 |
+ if (user_bo->shadow != qdev->dumb_shadow_bo) { |
8217 |
+ if (user_bo->shadow) { |
8218 |
+diff --git a/drivers/gpu/drm/qxl/qxl_drv.c b/drivers/gpu/drm/qxl/qxl_drv.c |
8219 |
+index 41cdf9d1e59dc..6e7f16f4cec79 100644 |
8220 |
+--- a/drivers/gpu/drm/qxl/qxl_drv.c |
8221 |
++++ b/drivers/gpu/drm/qxl/qxl_drv.c |
8222 |
+@@ -144,8 +144,6 @@ static void qxl_drm_release(struct drm_device *dev) |
8223 |
+ * reodering qxl_modeset_fini() + qxl_device_fini() calls is |
8224 |
+ * non-trivial though. |
8225 |
+ */ |
8226 |
+- if (!dev->registered) |
8227 |
+- return; |
8228 |
+ qxl_modeset_fini(qdev); |
8229 |
+ qxl_device_fini(qdev); |
8230 |
+ } |
8231 |
+diff --git a/drivers/gpu/drm/qxl/qxl_gem.c b/drivers/gpu/drm/qxl/qxl_gem.c |
8232 |
+index 48e096285b4c6..a08da0bd9098b 100644 |
8233 |
+--- a/drivers/gpu/drm/qxl/qxl_gem.c |
8234 |
++++ b/drivers/gpu/drm/qxl/qxl_gem.c |
8235 |
+@@ -55,7 +55,7 @@ int qxl_gem_object_create(struct qxl_device *qdev, int size, |
8236 |
+ /* At least align on page size */ |
8237 |
+ if (alignment < PAGE_SIZE) |
8238 |
+ alignment = PAGE_SIZE; |
8239 |
+- r = qxl_bo_create(qdev, size, kernel, false, initial_domain, surf, &qbo); |
8240 |
++ r = qxl_bo_create(qdev, size, kernel, false, initial_domain, 0, surf, &qbo); |
8241 |
+ if (r) { |
8242 |
+ if (r != -ERESTARTSYS) |
8243 |
+ DRM_ERROR( |
8244 |
+diff --git a/drivers/gpu/drm/qxl/qxl_object.c b/drivers/gpu/drm/qxl/qxl_object.c |
8245 |
+index ceebc5881f68d..a5806667697aa 100644 |
8246 |
+--- a/drivers/gpu/drm/qxl/qxl_object.c |
8247 |
++++ b/drivers/gpu/drm/qxl/qxl_object.c |
8248 |
+@@ -103,8 +103,8 @@ static const struct drm_gem_object_funcs qxl_object_funcs = { |
8249 |
+ .print_info = drm_gem_ttm_print_info, |
8250 |
+ }; |
8251 |
+ |
8252 |
+-int qxl_bo_create(struct qxl_device *qdev, |
8253 |
+- unsigned long size, bool kernel, bool pinned, u32 domain, |
8254 |
++int qxl_bo_create(struct qxl_device *qdev, unsigned long size, |
8255 |
++ bool kernel, bool pinned, u32 domain, u32 priority, |
8256 |
+ struct qxl_surface *surf, |
8257 |
+ struct qxl_bo **bo_ptr) |
8258 |
+ { |
8259 |
+@@ -137,6 +137,7 @@ int qxl_bo_create(struct qxl_device *qdev, |
8260 |
+ |
8261 |
+ qxl_ttm_placement_from_domain(bo, domain); |
8262 |
+ |
8263 |
++ bo->tbo.priority = priority; |
8264 |
+ r = ttm_bo_init_reserved(&qdev->mman.bdev, &bo->tbo, size, type, |
8265 |
+ &bo->placement, 0, &ctx, size, |
8266 |
+ NULL, NULL, &qxl_ttm_bo_destroy); |
8267 |
+diff --git a/drivers/gpu/drm/qxl/qxl_object.h b/drivers/gpu/drm/qxl/qxl_object.h |
8268 |
+index ebf24c9d2bf26..0d57e291acbff 100644 |
8269 |
+--- a/drivers/gpu/drm/qxl/qxl_object.h |
8270 |
++++ b/drivers/gpu/drm/qxl/qxl_object.h |
8271 |
+@@ -61,6 +61,7 @@ static inline u64 qxl_bo_mmap_offset(struct qxl_bo *bo) |
8272 |
+ extern int qxl_bo_create(struct qxl_device *qdev, |
8273 |
+ unsigned long size, |
8274 |
+ bool kernel, bool pinned, u32 domain, |
8275 |
++ u32 priority, |
8276 |
+ struct qxl_surface *surf, |
8277 |
+ struct qxl_bo **bo_ptr); |
8278 |
+ extern int qxl_bo_kmap(struct qxl_bo *bo, struct dma_buf_map *map); |
8279 |
+diff --git a/drivers/gpu/drm/qxl/qxl_release.c b/drivers/gpu/drm/qxl/qxl_release.c |
8280 |
+index e75e364655b81..6ee1e3057c282 100644 |
8281 |
+--- a/drivers/gpu/drm/qxl/qxl_release.c |
8282 |
++++ b/drivers/gpu/drm/qxl/qxl_release.c |
8283 |
+@@ -199,11 +199,12 @@ qxl_release_free(struct qxl_device *qdev, |
8284 |
+ } |
8285 |
+ |
8286 |
+ static int qxl_release_bo_alloc(struct qxl_device *qdev, |
8287 |
+- struct qxl_bo **bo) |
8288 |
++ struct qxl_bo **bo, |
8289 |
++ u32 priority) |
8290 |
+ { |
8291 |
+ /* pin releases bo's they are too messy to evict */ |
8292 |
+ return qxl_bo_create(qdev, PAGE_SIZE, false, true, |
8293 |
+- QXL_GEM_DOMAIN_VRAM, NULL, bo); |
8294 |
++ QXL_GEM_DOMAIN_VRAM, priority, NULL, bo); |
8295 |
+ } |
8296 |
+ |
8297 |
+ int qxl_release_list_add(struct qxl_release *release, struct qxl_bo *bo) |
8298 |
+@@ -326,13 +327,18 @@ int qxl_alloc_release_reserved(struct qxl_device *qdev, unsigned long size, |
8299 |
+ int ret = 0; |
8300 |
+ union qxl_release_info *info; |
8301 |
+ int cur_idx; |
8302 |
++ u32 priority; |
8303 |
+ |
8304 |
+- if (type == QXL_RELEASE_DRAWABLE) |
8305 |
++ if (type == QXL_RELEASE_DRAWABLE) { |
8306 |
+ cur_idx = 0; |
8307 |
+- else if (type == QXL_RELEASE_SURFACE_CMD) |
8308 |
++ priority = 0; |
8309 |
++ } else if (type == QXL_RELEASE_SURFACE_CMD) { |
8310 |
+ cur_idx = 1; |
8311 |
+- else if (type == QXL_RELEASE_CURSOR_CMD) |
8312 |
++ priority = 1; |
8313 |
++ } else if (type == QXL_RELEASE_CURSOR_CMD) { |
8314 |
+ cur_idx = 2; |
8315 |
++ priority = 1; |
8316 |
++ } |
8317 |
+ else { |
8318 |
+ DRM_ERROR("got illegal type: %d\n", type); |
8319 |
+ return -EINVAL; |
8320 |
+@@ -352,7 +358,7 @@ int qxl_alloc_release_reserved(struct qxl_device *qdev, unsigned long size, |
8321 |
+ qdev->current_release_bo[cur_idx] = NULL; |
8322 |
+ } |
8323 |
+ if (!qdev->current_release_bo[cur_idx]) { |
8324 |
+- ret = qxl_release_bo_alloc(qdev, &qdev->current_release_bo[cur_idx]); |
8325 |
++ ret = qxl_release_bo_alloc(qdev, &qdev->current_release_bo[cur_idx], priority); |
8326 |
+ if (ret) { |
8327 |
+ mutex_unlock(&qdev->release_mutex); |
8328 |
+ qxl_release_free(qdev, *release); |
8329 |
+diff --git a/drivers/gpu/drm/radeon/radeon_dp_mst.c b/drivers/gpu/drm/radeon/radeon_dp_mst.c |
8330 |
+index 2c32186c4acd9..4e4c937c36c62 100644 |
8331 |
+--- a/drivers/gpu/drm/radeon/radeon_dp_mst.c |
8332 |
++++ b/drivers/gpu/drm/radeon/radeon_dp_mst.c |
8333 |
+@@ -242,6 +242,9 @@ radeon_dp_mst_detect(struct drm_connector *connector, |
8334 |
+ to_radeon_connector(connector); |
8335 |
+ struct radeon_connector *master = radeon_connector->mst_port; |
8336 |
+ |
8337 |
++ if (drm_connector_is_unregistered(connector)) |
8338 |
++ return connector_status_disconnected; |
8339 |
++ |
8340 |
+ return drm_dp_mst_detect_port(connector, ctx, &master->mst_mgr, |
8341 |
+ radeon_connector->port); |
8342 |
+ } |
8343 |
+diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c |
8344 |
+index 50cee4880bb46..e9f6f6a673a4a 100644 |
8345 |
+--- a/drivers/gpu/drm/radeon/radeon_kms.c |
8346 |
++++ b/drivers/gpu/drm/radeon/radeon_kms.c |
8347 |
+@@ -514,6 +514,7 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) |
8348 |
+ *value = rdev->config.si.backend_enable_mask; |
8349 |
+ } else { |
8350 |
+ DRM_DEBUG_KMS("BACKEND_ENABLED_MASK is si+ only!\n"); |
8351 |
++ return -EINVAL; |
8352 |
+ } |
8353 |
+ break; |
8354 |
+ case RADEON_INFO_MAX_SCLK: |
8355 |
+diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c |
8356 |
+index 3980677435cbf..949511a0a24fe 100644 |
8357 |
+--- a/drivers/gpu/drm/stm/ltdc.c |
8358 |
++++ b/drivers/gpu/drm/stm/ltdc.c |
8359 |
+@@ -525,13 +525,42 @@ static void ltdc_crtc_mode_set_nofb(struct drm_crtc *crtc) |
8360 |
+ { |
8361 |
+ struct ltdc_device *ldev = crtc_to_ltdc(crtc); |
8362 |
+ struct drm_device *ddev = crtc->dev; |
8363 |
++ struct drm_connector_list_iter iter; |
8364 |
++ struct drm_connector *connector = NULL; |
8365 |
++ struct drm_encoder *encoder = NULL; |
8366 |
++ struct drm_bridge *bridge = NULL; |
8367 |
+ struct drm_display_mode *mode = &crtc->state->adjusted_mode; |
8368 |
+ struct videomode vm; |
8369 |
+ u32 hsync, vsync, accum_hbp, accum_vbp, accum_act_w, accum_act_h; |
8370 |
+ u32 total_width, total_height; |
8371 |
++ u32 bus_flags = 0; |
8372 |
+ u32 val; |
8373 |
+ int ret; |
8374 |
+ |
8375 |
++ /* get encoder from crtc */ |
8376 |
++ drm_for_each_encoder(encoder, ddev) |
8377 |
++ if (encoder->crtc == crtc) |
8378 |
++ break; |
8379 |
++ |
8380 |
++ if (encoder) { |
8381 |
++ /* get bridge from encoder */ |
8382 |
++ list_for_each_entry(bridge, &encoder->bridge_chain, chain_node) |
8383 |
++ if (bridge->encoder == encoder) |
8384 |
++ break; |
8385 |
++ |
8386 |
++ /* Get the connector from encoder */ |
8387 |
++ drm_connector_list_iter_begin(ddev, &iter); |
8388 |
++ drm_for_each_connector_iter(connector, &iter) |
8389 |
++ if (connector->encoder == encoder) |
8390 |
++ break; |
8391 |
++ drm_connector_list_iter_end(&iter); |
8392 |
++ } |
8393 |
++ |
8394 |
++ if (bridge && bridge->timings) |
8395 |
++ bus_flags = bridge->timings->input_bus_flags; |
8396 |
++ else if (connector) |
8397 |
++ bus_flags = connector->display_info.bus_flags; |
8398 |
++ |
8399 |
+ if (!pm_runtime_active(ddev->dev)) { |
8400 |
+ ret = pm_runtime_get_sync(ddev->dev); |
8401 |
+ if (ret) { |
8402 |
+@@ -567,10 +596,10 @@ static void ltdc_crtc_mode_set_nofb(struct drm_crtc *crtc) |
8403 |
+ if (vm.flags & DISPLAY_FLAGS_VSYNC_HIGH) |
8404 |
+ val |= GCR_VSPOL; |
8405 |
+ |
8406 |
+- if (vm.flags & DISPLAY_FLAGS_DE_LOW) |
8407 |
++ if (bus_flags & DRM_BUS_FLAG_DE_LOW) |
8408 |
+ val |= GCR_DEPOL; |
8409 |
+ |
8410 |
+- if (vm.flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE) |
8411 |
++ if (bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE) |
8412 |
+ val |= GCR_PCPOL; |
8413 |
+ |
8414 |
+ reg_update_bits(ldev->regs, LTDC_GCR, |
8415 |
+diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c |
8416 |
+index 30213708fc990..d99afd19ca083 100644 |
8417 |
+--- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c |
8418 |
++++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c |
8419 |
+@@ -515,6 +515,15 @@ static void tilcdc_crtc_off(struct drm_crtc *crtc, bool shutdown) |
8420 |
+ |
8421 |
+ drm_crtc_vblank_off(crtc); |
8422 |
+ |
8423 |
++ spin_lock_irq(&crtc->dev->event_lock); |
8424 |
++ |
8425 |
++ if (crtc->state->event) { |
8426 |
++ drm_crtc_send_vblank_event(crtc, crtc->state->event); |
8427 |
++ crtc->state->event = NULL; |
8428 |
++ } |
8429 |
++ |
8430 |
++ spin_unlock_irq(&crtc->dev->event_lock); |
8431 |
++ |
8432 |
+ tilcdc_crtc_disable_irqs(dev); |
8433 |
+ |
8434 |
+ pm_runtime_put_sync(dev->dev); |
8435 |
+diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c b/drivers/gpu/drm/xlnx/zynqmp_dp.c |
8436 |
+index 99158ee67d02b..59d1fb017da01 100644 |
8437 |
+--- a/drivers/gpu/drm/xlnx/zynqmp_dp.c |
8438 |
++++ b/drivers/gpu/drm/xlnx/zynqmp_dp.c |
8439 |
+@@ -866,7 +866,7 @@ static int zynqmp_dp_train(struct zynqmp_dp *dp) |
8440 |
+ return ret; |
8441 |
+ |
8442 |
+ zynqmp_dp_write(dp, ZYNQMP_DP_SCRAMBLING_DISABLE, 1); |
8443 |
+- memset(dp->train_set, 0, 4); |
8444 |
++ memset(dp->train_set, 0, sizeof(dp->train_set)); |
8445 |
+ ret = zynqmp_dp_link_train_cr(dp); |
8446 |
+ if (ret) |
8447 |
+ return ret; |
8448 |
+diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h |
8449 |
+index 09d0499865160..2c38d696863b3 100644 |
8450 |
+--- a/drivers/hid/hid-ids.h |
8451 |
++++ b/drivers/hid/hid-ids.h |
8452 |
+@@ -941,6 +941,7 @@ |
8453 |
+ #define USB_DEVICE_ID_ORTEK_IHOME_IMAC_A210S 0x8003 |
8454 |
+ |
8455 |
+ #define USB_VENDOR_ID_PLANTRONICS 0x047f |
8456 |
++#define USB_DEVICE_ID_PLANTRONICS_BLACKWIRE_3220_SERIES 0xc056 |
8457 |
+ |
8458 |
+ #define USB_VENDOR_ID_PANASONIC 0x04da |
8459 |
+ #define USB_DEVICE_ID_PANABOARD_UBT780 0x1044 |
8460 |
+diff --git a/drivers/hid/hid-lenovo.c b/drivers/hid/hid-lenovo.c |
8461 |
+index c6c8e20f3e8d5..0ff03fed97709 100644 |
8462 |
+--- a/drivers/hid/hid-lenovo.c |
8463 |
++++ b/drivers/hid/hid-lenovo.c |
8464 |
+@@ -33,6 +33,9 @@ |
8465 |
+ |
8466 |
+ #include "hid-ids.h" |
8467 |
+ |
8468 |
++/* Userspace expects F20 for mic-mute KEY_MICMUTE does not work */ |
8469 |
++#define LENOVO_KEY_MICMUTE KEY_F20 |
8470 |
++ |
8471 |
+ struct lenovo_drvdata { |
8472 |
+ u8 led_report[3]; /* Must be first for proper alignment */ |
8473 |
+ int led_state; |
8474 |
+@@ -62,8 +65,8 @@ struct lenovo_drvdata { |
8475 |
+ #define TP10UBKBD_LED_OFF 1 |
8476 |
+ #define TP10UBKBD_LED_ON 2 |
8477 |
+ |
8478 |
+-static void lenovo_led_set_tp10ubkbd(struct hid_device *hdev, u8 led_code, |
8479 |
+- enum led_brightness value) |
8480 |
++static int lenovo_led_set_tp10ubkbd(struct hid_device *hdev, u8 led_code, |
8481 |
++ enum led_brightness value) |
8482 |
+ { |
8483 |
+ struct lenovo_drvdata *data = hid_get_drvdata(hdev); |
8484 |
+ int ret; |
8485 |
+@@ -75,10 +78,18 @@ static void lenovo_led_set_tp10ubkbd(struct hid_device *hdev, u8 led_code, |
8486 |
+ data->led_report[2] = value ? TP10UBKBD_LED_ON : TP10UBKBD_LED_OFF; |
8487 |
+ ret = hid_hw_raw_request(hdev, data->led_report[0], data->led_report, 3, |
8488 |
+ HID_OUTPUT_REPORT, HID_REQ_SET_REPORT); |
8489 |
+- if (ret) |
8490 |
+- hid_err(hdev, "Set LED output report error: %d\n", ret); |
8491 |
++ if (ret != 3) { |
8492 |
++ if (ret != -ENODEV) |
8493 |
++ hid_err(hdev, "Set LED output report error: %d\n", ret); |
8494 |
++ |
8495 |
++ ret = ret < 0 ? ret : -EIO; |
8496 |
++ } else { |
8497 |
++ ret = 0; |
8498 |
++ } |
8499 |
+ |
8500 |
+ mutex_unlock(&data->led_report_mutex); |
8501 |
++ |
8502 |
++ return ret; |
8503 |
+ } |
8504 |
+ |
8505 |
+ static void lenovo_tp10ubkbd_sync_fn_lock(struct work_struct *work) |
8506 |
+@@ -126,7 +137,7 @@ static int lenovo_input_mapping_tpkbd(struct hid_device *hdev, |
8507 |
+ if (usage->hid == (HID_UP_BUTTON | 0x0010)) { |
8508 |
+ /* This sub-device contains trackpoint, mark it */ |
8509 |
+ hid_set_drvdata(hdev, (void *)1); |
8510 |
+- map_key_clear(KEY_MICMUTE); |
8511 |
++ map_key_clear(LENOVO_KEY_MICMUTE); |
8512 |
+ return 1; |
8513 |
+ } |
8514 |
+ return 0; |
8515 |
+@@ -141,7 +152,7 @@ static int lenovo_input_mapping_cptkbd(struct hid_device *hdev, |
8516 |
+ (usage->hid & HID_USAGE_PAGE) == HID_UP_LNVENDOR) { |
8517 |
+ switch (usage->hid & HID_USAGE) { |
8518 |
+ case 0x00f1: /* Fn-F4: Mic mute */ |
8519 |
+- map_key_clear(KEY_MICMUTE); |
8520 |
++ map_key_clear(LENOVO_KEY_MICMUTE); |
8521 |
+ return 1; |
8522 |
+ case 0x00f2: /* Fn-F5: Brightness down */ |
8523 |
+ map_key_clear(KEY_BRIGHTNESSDOWN); |
8524 |
+@@ -231,7 +242,7 @@ static int lenovo_input_mapping_tp10_ultrabook_kbd(struct hid_device *hdev, |
8525 |
+ map_key_clear(KEY_FN_ESC); |
8526 |
+ return 1; |
8527 |
+ case 9: /* Fn-F4: Mic mute */ |
8528 |
+- map_key_clear(KEY_MICMUTE); |
8529 |
++ map_key_clear(LENOVO_KEY_MICMUTE); |
8530 |
+ return 1; |
8531 |
+ case 10: /* Fn-F7: Control panel */ |
8532 |
+ map_key_clear(KEY_CONFIG); |
8533 |
+@@ -349,7 +360,7 @@ static ssize_t attr_fn_lock_store(struct device *dev, |
8534 |
+ { |
8535 |
+ struct hid_device *hdev = to_hid_device(dev); |
8536 |
+ struct lenovo_drvdata *data = hid_get_drvdata(hdev); |
8537 |
+- int value; |
8538 |
++ int value, ret; |
8539 |
+ |
8540 |
+ if (kstrtoint(buf, 10, &value)) |
8541 |
+ return -EINVAL; |
8542 |
+@@ -364,7 +375,9 @@ static ssize_t attr_fn_lock_store(struct device *dev, |
8543 |
+ lenovo_features_set_cptkbd(hdev); |
8544 |
+ break; |
8545 |
+ case USB_DEVICE_ID_LENOVO_TP10UBKBD: |
8546 |
+- lenovo_led_set_tp10ubkbd(hdev, TP10UBKBD_FN_LOCK_LED, value); |
8547 |
++ ret = lenovo_led_set_tp10ubkbd(hdev, TP10UBKBD_FN_LOCK_LED, value); |
8548 |
++ if (ret) |
8549 |
++ return ret; |
8550 |
+ break; |
8551 |
+ } |
8552 |
+ |
8553 |
+@@ -498,6 +511,9 @@ static int lenovo_event_cptkbd(struct hid_device *hdev, |
8554 |
+ static int lenovo_event(struct hid_device *hdev, struct hid_field *field, |
8555 |
+ struct hid_usage *usage, __s32 value) |
8556 |
+ { |
8557 |
++ if (!hid_get_drvdata(hdev)) |
8558 |
++ return 0; |
8559 |
++ |
8560 |
+ switch (hdev->product) { |
8561 |
+ case USB_DEVICE_ID_LENOVO_CUSBKBD: |
8562 |
+ case USB_DEVICE_ID_LENOVO_CBTKBD: |
8563 |
+@@ -777,7 +793,7 @@ static enum led_brightness lenovo_led_brightness_get( |
8564 |
+ : LED_OFF; |
8565 |
+ } |
8566 |
+ |
8567 |
+-static void lenovo_led_brightness_set(struct led_classdev *led_cdev, |
8568 |
++static int lenovo_led_brightness_set(struct led_classdev *led_cdev, |
8569 |
+ enum led_brightness value) |
8570 |
+ { |
8571 |
+ struct device *dev = led_cdev->dev->parent; |
8572 |
+@@ -785,6 +801,7 @@ static void lenovo_led_brightness_set(struct led_classdev *led_cdev, |
8573 |
+ struct lenovo_drvdata *data_pointer = hid_get_drvdata(hdev); |
8574 |
+ u8 tp10ubkbd_led[] = { TP10UBKBD_MUTE_LED, TP10UBKBD_MICMUTE_LED }; |
8575 |
+ int led_nr = 0; |
8576 |
++ int ret = 0; |
8577 |
+ |
8578 |
+ if (led_cdev == &data_pointer->led_micmute) |
8579 |
+ led_nr = 1; |
8580 |
+@@ -799,9 +816,11 @@ static void lenovo_led_brightness_set(struct led_classdev *led_cdev, |
8581 |
+ lenovo_led_set_tpkbd(hdev); |
8582 |
+ break; |
8583 |
+ case USB_DEVICE_ID_LENOVO_TP10UBKBD: |
8584 |
+- lenovo_led_set_tp10ubkbd(hdev, tp10ubkbd_led[led_nr], value); |
8585 |
++ ret = lenovo_led_set_tp10ubkbd(hdev, tp10ubkbd_led[led_nr], value); |
8586 |
+ break; |
8587 |
+ } |
8588 |
++ |
8589 |
++ return ret; |
8590 |
+ } |
8591 |
+ |
8592 |
+ static int lenovo_register_leds(struct hid_device *hdev) |
8593 |
+@@ -822,7 +841,8 @@ static int lenovo_register_leds(struct hid_device *hdev) |
8594 |
+ |
8595 |
+ data->led_mute.name = name_mute; |
8596 |
+ data->led_mute.brightness_get = lenovo_led_brightness_get; |
8597 |
+- data->led_mute.brightness_set = lenovo_led_brightness_set; |
8598 |
++ data->led_mute.brightness_set_blocking = lenovo_led_brightness_set; |
8599 |
++ data->led_mute.flags = LED_HW_PLUGGABLE; |
8600 |
+ data->led_mute.dev = &hdev->dev; |
8601 |
+ ret = led_classdev_register(&hdev->dev, &data->led_mute); |
8602 |
+ if (ret < 0) |
8603 |
+@@ -830,7 +850,8 @@ static int lenovo_register_leds(struct hid_device *hdev) |
8604 |
+ |
8605 |
+ data->led_micmute.name = name_micm; |
8606 |
+ data->led_micmute.brightness_get = lenovo_led_brightness_get; |
8607 |
+- data->led_micmute.brightness_set = lenovo_led_brightness_set; |
8608 |
++ data->led_micmute.brightness_set_blocking = lenovo_led_brightness_set; |
8609 |
++ data->led_micmute.flags = LED_HW_PLUGGABLE; |
8610 |
+ data->led_micmute.dev = &hdev->dev; |
8611 |
+ ret = led_classdev_register(&hdev->dev, &data->led_micmute); |
8612 |
+ if (ret < 0) { |
8613 |
+diff --git a/drivers/hid/hid-plantronics.c b/drivers/hid/hid-plantronics.c |
8614 |
+index 85b685efc12f3..e81b7cec2d124 100644 |
8615 |
+--- a/drivers/hid/hid-plantronics.c |
8616 |
++++ b/drivers/hid/hid-plantronics.c |
8617 |
+@@ -13,6 +13,7 @@ |
8618 |
+ |
8619 |
+ #include <linux/hid.h> |
8620 |
+ #include <linux/module.h> |
8621 |
++#include <linux/jiffies.h> |
8622 |
+ |
8623 |
+ #define PLT_HID_1_0_PAGE 0xffa00000 |
8624 |
+ #define PLT_HID_2_0_PAGE 0xffa20000 |
8625 |
+@@ -36,6 +37,16 @@ |
8626 |
+ #define PLT_ALLOW_CONSUMER (field->application == HID_CP_CONSUMERCONTROL && \ |
8627 |
+ (usage->hid & HID_USAGE_PAGE) == HID_UP_CONSUMER) |
8628 |
+ |
8629 |
++#define PLT_QUIRK_DOUBLE_VOLUME_KEYS BIT(0) |
8630 |
++ |
8631 |
++#define PLT_DOUBLE_KEY_TIMEOUT 5 /* ms */ |
8632 |
++ |
8633 |
++struct plt_drv_data { |
8634 |
++ unsigned long device_type; |
8635 |
++ unsigned long last_volume_key_ts; |
8636 |
++ u32 quirks; |
8637 |
++}; |
8638 |
++ |
8639 |
+ static int plantronics_input_mapping(struct hid_device *hdev, |
8640 |
+ struct hid_input *hi, |
8641 |
+ struct hid_field *field, |
8642 |
+@@ -43,7 +54,8 @@ static int plantronics_input_mapping(struct hid_device *hdev, |
8643 |
+ unsigned long **bit, int *max) |
8644 |
+ { |
8645 |
+ unsigned short mapped_key; |
8646 |
+- unsigned long plt_type = (unsigned long)hid_get_drvdata(hdev); |
8647 |
++ struct plt_drv_data *drv_data = hid_get_drvdata(hdev); |
8648 |
++ unsigned long plt_type = drv_data->device_type; |
8649 |
+ |
8650 |
+ /* special case for PTT products */ |
8651 |
+ if (field->application == HID_GD_JOYSTICK) |
8652 |
+@@ -105,6 +117,30 @@ mapped: |
8653 |
+ return 1; |
8654 |
+ } |
8655 |
+ |
8656 |
++static int plantronics_event(struct hid_device *hdev, struct hid_field *field, |
8657 |
++ struct hid_usage *usage, __s32 value) |
8658 |
++{ |
8659 |
++ struct plt_drv_data *drv_data = hid_get_drvdata(hdev); |
8660 |
++ |
8661 |
++ if (drv_data->quirks & PLT_QUIRK_DOUBLE_VOLUME_KEYS) { |
8662 |
++ unsigned long prev_ts, cur_ts; |
8663 |
++ |
8664 |
++ /* Usages are filtered in plantronics_usages. */ |
8665 |
++ |
8666 |
++ if (!value) /* Handle key presses only. */ |
8667 |
++ return 0; |
8668 |
++ |
8669 |
++ prev_ts = drv_data->last_volume_key_ts; |
8670 |
++ cur_ts = jiffies; |
8671 |
++ if (jiffies_to_msecs(cur_ts - prev_ts) <= PLT_DOUBLE_KEY_TIMEOUT) |
8672 |
++ return 1; /* Ignore the repeated key. */ |
8673 |
++ |
8674 |
++ drv_data->last_volume_key_ts = cur_ts; |
8675 |
++ } |
8676 |
++ |
8677 |
++ return 0; |
8678 |
++} |
8679 |
++ |
8680 |
+ static unsigned long plantronics_device_type(struct hid_device *hdev) |
8681 |
+ { |
8682 |
+ unsigned i, col_page; |
8683 |
+@@ -133,15 +169,24 @@ exit: |
8684 |
+ static int plantronics_probe(struct hid_device *hdev, |
8685 |
+ const struct hid_device_id *id) |
8686 |
+ { |
8687 |
++ struct plt_drv_data *drv_data; |
8688 |
+ int ret; |
8689 |
+ |
8690 |
++ drv_data = devm_kzalloc(&hdev->dev, sizeof(*drv_data), GFP_KERNEL); |
8691 |
++ if (!drv_data) |
8692 |
++ return -ENOMEM; |
8693 |
++ |
8694 |
+ ret = hid_parse(hdev); |
8695 |
+ if (ret) { |
8696 |
+ hid_err(hdev, "parse failed\n"); |
8697 |
+ goto err; |
8698 |
+ } |
8699 |
+ |
8700 |
+- hid_set_drvdata(hdev, (void *)plantronics_device_type(hdev)); |
8701 |
++ drv_data->device_type = plantronics_device_type(hdev); |
8702 |
++ drv_data->quirks = id->driver_data; |
8703 |
++ drv_data->last_volume_key_ts = jiffies - msecs_to_jiffies(PLT_DOUBLE_KEY_TIMEOUT); |
8704 |
++ |
8705 |
++ hid_set_drvdata(hdev, drv_data); |
8706 |
+ |
8707 |
+ ret = hid_hw_start(hdev, HID_CONNECT_DEFAULT | |
8708 |
+ HID_CONNECT_HIDINPUT_FORCE | HID_CONNECT_HIDDEV_FORCE); |
8709 |
+@@ -153,15 +198,26 @@ err: |
8710 |
+ } |
8711 |
+ |
8712 |
+ static const struct hid_device_id plantronics_devices[] = { |
8713 |
++ { HID_USB_DEVICE(USB_VENDOR_ID_PLANTRONICS, |
8714 |
++ USB_DEVICE_ID_PLANTRONICS_BLACKWIRE_3220_SERIES), |
8715 |
++ .driver_data = PLT_QUIRK_DOUBLE_VOLUME_KEYS }, |
8716 |
+ { HID_USB_DEVICE(USB_VENDOR_ID_PLANTRONICS, HID_ANY_ID) }, |
8717 |
+ { } |
8718 |
+ }; |
8719 |
+ MODULE_DEVICE_TABLE(hid, plantronics_devices); |
8720 |
+ |
8721 |
++static const struct hid_usage_id plantronics_usages[] = { |
8722 |
++ { HID_CP_VOLUMEUP, EV_KEY, HID_ANY_ID }, |
8723 |
++ { HID_CP_VOLUMEDOWN, EV_KEY, HID_ANY_ID }, |
8724 |
++ { HID_TERMINATOR, HID_TERMINATOR, HID_TERMINATOR } |
8725 |
++}; |
8726 |
++ |
8727 |
+ static struct hid_driver plantronics_driver = { |
8728 |
+ .name = "plantronics", |
8729 |
+ .id_table = plantronics_devices, |
8730 |
++ .usage_table = plantronics_usages, |
8731 |
+ .input_mapping = plantronics_input_mapping, |
8732 |
++ .event = plantronics_event, |
8733 |
+ .probe = plantronics_probe, |
8734 |
+ }; |
8735 |
+ module_hid_driver(plantronics_driver); |
8736 |
+diff --git a/drivers/hsi/hsi_core.c b/drivers/hsi/hsi_core.c |
8737 |
+index c3fb5beb846e2..ec90713564e32 100644 |
8738 |
+--- a/drivers/hsi/hsi_core.c |
8739 |
++++ b/drivers/hsi/hsi_core.c |
8740 |
+@@ -210,8 +210,6 @@ static void hsi_add_client_from_dt(struct hsi_port *port, |
8741 |
+ if (err) |
8742 |
+ goto err; |
8743 |
+ |
8744 |
+- dev_set_name(&cl->device, "%s", name); |
8745 |
+- |
8746 |
+ err = hsi_of_property_parse_mode(client, "hsi-mode", &mode); |
8747 |
+ if (err) { |
8748 |
+ err = hsi_of_property_parse_mode(client, "hsi-rx-mode", |
8749 |
+@@ -293,6 +291,7 @@ static void hsi_add_client_from_dt(struct hsi_port *port, |
8750 |
+ cl->device.release = hsi_client_release; |
8751 |
+ cl->device.of_node = client; |
8752 |
+ |
8753 |
++ dev_set_name(&cl->device, "%s", name); |
8754 |
+ if (device_register(&cl->device) < 0) { |
8755 |
+ pr_err("hsi: failed to register client: %s\n", name); |
8756 |
+ put_device(&cl->device); |
8757 |
+diff --git a/drivers/hv/channel.c b/drivers/hv/channel.c |
8758 |
+index 6fb0c76bfbf81..a59ab2f3d68e1 100644 |
8759 |
+--- a/drivers/hv/channel.c |
8760 |
++++ b/drivers/hv/channel.c |
8761 |
+@@ -653,7 +653,7 @@ static int __vmbus_open(struct vmbus_channel *newchannel, |
8762 |
+ |
8763 |
+ if (newchannel->rescind) { |
8764 |
+ err = -ENODEV; |
8765 |
+- goto error_free_info; |
8766 |
++ goto error_clean_msglist; |
8767 |
+ } |
8768 |
+ |
8769 |
+ err = vmbus_post_msg(open_msg, |
8770 |
+diff --git a/drivers/hv/channel_mgmt.c b/drivers/hv/channel_mgmt.c |
8771 |
+index 6be9f56cb6270..6476bfe193afd 100644 |
8772 |
+--- a/drivers/hv/channel_mgmt.c |
8773 |
++++ b/drivers/hv/channel_mgmt.c |
8774 |
+@@ -725,6 +725,12 @@ static void init_vp_index(struct vmbus_channel *channel) |
8775 |
+ free_cpumask_var(available_mask); |
8776 |
+ } |
8777 |
+ |
8778 |
++#define UNLOAD_DELAY_UNIT_MS 10 /* 10 milliseconds */ |
8779 |
++#define UNLOAD_WAIT_MS (100*1000) /* 100 seconds */ |
8780 |
++#define UNLOAD_WAIT_LOOPS (UNLOAD_WAIT_MS/UNLOAD_DELAY_UNIT_MS) |
8781 |
++#define UNLOAD_MSG_MS (5*1000) /* Every 5 seconds */ |
8782 |
++#define UNLOAD_MSG_LOOPS (UNLOAD_MSG_MS/UNLOAD_DELAY_UNIT_MS) |
8783 |
++ |
8784 |
+ static void vmbus_wait_for_unload(void) |
8785 |
+ { |
8786 |
+ int cpu; |
8787 |
+@@ -742,12 +748,17 @@ static void vmbus_wait_for_unload(void) |
8788 |
+ * vmbus_connection.unload_event. If not, the last thing we can do is |
8789 |
+ * read message pages for all CPUs directly. |
8790 |
+ * |
8791 |
+- * Wait no more than 10 seconds so that the panic path can't get |
8792 |
+- * hung forever in case the response message isn't seen. |
8793 |
++ * Wait up to 100 seconds since an Azure host must writeback any dirty |
8794 |
++ * data in its disk cache before the VMbus UNLOAD request will |
8795 |
++ * complete. This flushing has been empirically observed to take up |
8796 |
++ * to 50 seconds in cases with a lot of dirty data, so allow additional |
8797 |
++ * leeway and for inaccuracies in mdelay(). But eventually time out so |
8798 |
++ * that the panic path can't get hung forever in case the response |
8799 |
++ * message isn't seen. |
8800 |
+ */ |
8801 |
+- for (i = 0; i < 1000; i++) { |
8802 |
++ for (i = 1; i <= UNLOAD_WAIT_LOOPS; i++) { |
8803 |
+ if (completion_done(&vmbus_connection.unload_event)) |
8804 |
+- break; |
8805 |
++ goto completed; |
8806 |
+ |
8807 |
+ for_each_online_cpu(cpu) { |
8808 |
+ struct hv_per_cpu_context *hv_cpu |
8809 |
+@@ -770,9 +781,18 @@ static void vmbus_wait_for_unload(void) |
8810 |
+ vmbus_signal_eom(msg, message_type); |
8811 |
+ } |
8812 |
+ |
8813 |
+- mdelay(10); |
8814 |
++ /* |
8815 |
++ * Give a notice periodically so someone watching the |
8816 |
++ * serial output won't think it is completely hung. |
8817 |
++ */ |
8818 |
++ if (!(i % UNLOAD_MSG_LOOPS)) |
8819 |
++ pr_notice("Waiting for VMBus UNLOAD to complete\n"); |
8820 |
++ |
8821 |
++ mdelay(UNLOAD_DELAY_UNIT_MS); |
8822 |
+ } |
8823 |
++ pr_err("Continuing even though VMBus UNLOAD did not complete\n"); |
8824 |
+ |
8825 |
++completed: |
8826 |
+ /* |
8827 |
+ * We're crashing and already got the UNLOAD_RESPONSE, cleanup all |
8828 |
+ * maybe-pending messages on all CPUs to be able to receive new |
8829 |
+diff --git a/drivers/hv/ring_buffer.c b/drivers/hv/ring_buffer.c |
8830 |
+index 35833d4d1a1dc..ecd82ebfd5bc4 100644 |
8831 |
+--- a/drivers/hv/ring_buffer.c |
8832 |
++++ b/drivers/hv/ring_buffer.c |
8833 |
+@@ -313,7 +313,6 @@ int hv_ringbuffer_write(struct vmbus_channel *channel, |
8834 |
+ rqst_id = vmbus_next_request_id(&channel->requestor, requestid); |
8835 |
+ if (rqst_id == VMBUS_RQST_ERROR) { |
8836 |
+ spin_unlock_irqrestore(&outring_info->ring_lock, flags); |
8837 |
+- pr_err("No request id available\n"); |
8838 |
+ return -EAGAIN; |
8839 |
+ } |
8840 |
+ } |
8841 |
+diff --git a/drivers/hwmon/pmbus/pxe1610.c b/drivers/hwmon/pmbus/pxe1610.c |
8842 |
+index da27ce34ee3fd..eb4a06003b7f9 100644 |
8843 |
+--- a/drivers/hwmon/pmbus/pxe1610.c |
8844 |
++++ b/drivers/hwmon/pmbus/pxe1610.c |
8845 |
+@@ -41,6 +41,15 @@ static int pxe1610_identify(struct i2c_client *client, |
8846 |
+ info->vrm_version[i] = vr13; |
8847 |
+ break; |
8848 |
+ default: |
8849 |
++ /* |
8850 |
++ * If prior pages are available limit operation |
8851 |
++ * to them |
8852 |
++ */ |
8853 |
++ if (i != 0) { |
8854 |
++ info->pages = i; |
8855 |
++ return 0; |
8856 |
++ } |
8857 |
++ |
8858 |
+ return -ENODEV; |
8859 |
+ } |
8860 |
+ } |
8861 |
+diff --git a/drivers/i2c/busses/i2c-cadence.c b/drivers/i2c/busses/i2c-cadence.c |
8862 |
+index e4b7f2a951ad5..c1bbc4caeb5c9 100644 |
8863 |
+--- a/drivers/i2c/busses/i2c-cadence.c |
8864 |
++++ b/drivers/i2c/busses/i2c-cadence.c |
8865 |
+@@ -789,7 +789,7 @@ static int cdns_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, |
8866 |
+ bool change_role = false; |
8867 |
+ #endif |
8868 |
+ |
8869 |
+- ret = pm_runtime_get_sync(id->dev); |
8870 |
++ ret = pm_runtime_resume_and_get(id->dev); |
8871 |
+ if (ret < 0) |
8872 |
+ return ret; |
8873 |
+ |
8874 |
+@@ -911,7 +911,7 @@ static int cdns_reg_slave(struct i2c_client *slave) |
8875 |
+ if (slave->flags & I2C_CLIENT_TEN) |
8876 |
+ return -EAFNOSUPPORT; |
8877 |
+ |
8878 |
+- ret = pm_runtime_get_sync(id->dev); |
8879 |
++ ret = pm_runtime_resume_and_get(id->dev); |
8880 |
+ if (ret < 0) |
8881 |
+ return ret; |
8882 |
+ |
8883 |
+@@ -1200,7 +1200,10 @@ static int cdns_i2c_probe(struct platform_device *pdev) |
8884 |
+ if (IS_ERR(id->membase)) |
8885 |
+ return PTR_ERR(id->membase); |
8886 |
+ |
8887 |
+- id->irq = platform_get_irq(pdev, 0); |
8888 |
++ ret = platform_get_irq(pdev, 0); |
8889 |
++ if (ret < 0) |
8890 |
++ return ret; |
8891 |
++ id->irq = ret; |
8892 |
+ |
8893 |
+ id->adap.owner = THIS_MODULE; |
8894 |
+ id->adap.dev.of_node = pdev->dev.of_node; |
8895 |
+diff --git a/drivers/i2c/busses/i2c-emev2.c b/drivers/i2c/busses/i2c-emev2.c |
8896 |
+index a08554c1a5704..bdff0e6345d9a 100644 |
8897 |
+--- a/drivers/i2c/busses/i2c-emev2.c |
8898 |
++++ b/drivers/i2c/busses/i2c-emev2.c |
8899 |
+@@ -395,7 +395,10 @@ static int em_i2c_probe(struct platform_device *pdev) |
8900 |
+ |
8901 |
+ em_i2c_reset(&priv->adap); |
8902 |
+ |
8903 |
+- priv->irq = platform_get_irq(pdev, 0); |
8904 |
++ ret = platform_get_irq(pdev, 0); |
8905 |
++ if (ret < 0) |
8906 |
++ goto err_clk; |
8907 |
++ priv->irq = ret; |
8908 |
+ ret = devm_request_irq(&pdev->dev, priv->irq, em_i2c_irq_handler, 0, |
8909 |
+ "em_i2c", priv); |
8910 |
+ if (ret) |
8911 |
+diff --git a/drivers/i2c/busses/i2c-img-scb.c b/drivers/i2c/busses/i2c-img-scb.c |
8912 |
+index 98a89301ed2a6..8e987945ed450 100644 |
8913 |
+--- a/drivers/i2c/busses/i2c-img-scb.c |
8914 |
++++ b/drivers/i2c/busses/i2c-img-scb.c |
8915 |
+@@ -1057,7 +1057,7 @@ static int img_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, |
8916 |
+ atomic = true; |
8917 |
+ } |
8918 |
+ |
8919 |
+- ret = pm_runtime_get_sync(adap->dev.parent); |
8920 |
++ ret = pm_runtime_resume_and_get(adap->dev.parent); |
8921 |
+ if (ret < 0) |
8922 |
+ return ret; |
8923 |
+ |
8924 |
+@@ -1158,7 +1158,7 @@ static int img_i2c_init(struct img_i2c *i2c) |
8925 |
+ u32 rev; |
8926 |
+ int ret; |
8927 |
+ |
8928 |
+- ret = pm_runtime_get_sync(i2c->adap.dev.parent); |
8929 |
++ ret = pm_runtime_resume_and_get(i2c->adap.dev.parent); |
8930 |
+ if (ret < 0) |
8931 |
+ return ret; |
8932 |
+ |
8933 |
+diff --git a/drivers/i2c/busses/i2c-imx-lpi2c.c b/drivers/i2c/busses/i2c-imx-lpi2c.c |
8934 |
+index 9db6ccded5e9e..8b9ba055c4186 100644 |
8935 |
+--- a/drivers/i2c/busses/i2c-imx-lpi2c.c |
8936 |
++++ b/drivers/i2c/busses/i2c-imx-lpi2c.c |
8937 |
+@@ -259,7 +259,7 @@ static int lpi2c_imx_master_enable(struct lpi2c_imx_struct *lpi2c_imx) |
8938 |
+ unsigned int temp; |
8939 |
+ int ret; |
8940 |
+ |
8941 |
+- ret = pm_runtime_get_sync(lpi2c_imx->adapter.dev.parent); |
8942 |
++ ret = pm_runtime_resume_and_get(lpi2c_imx->adapter.dev.parent); |
8943 |
+ if (ret < 0) |
8944 |
+ return ret; |
8945 |
+ |
8946 |
+diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c |
8947 |
+index a8e8af57e33f4..8a694b2eebfdb 100644 |
8948 |
+--- a/drivers/i2c/busses/i2c-imx.c |
8949 |
++++ b/drivers/i2c/busses/i2c-imx.c |
8950 |
+@@ -1208,7 +1208,7 @@ static int i2c_imx_xfer(struct i2c_adapter *adapter, |
8951 |
+ struct imx_i2c_struct *i2c_imx = i2c_get_adapdata(adapter); |
8952 |
+ int result; |
8953 |
+ |
8954 |
+- result = pm_runtime_get_sync(i2c_imx->adapter.dev.parent); |
8955 |
++ result = pm_runtime_resume_and_get(i2c_imx->adapter.dev.parent); |
8956 |
+ if (result < 0) |
8957 |
+ return result; |
8958 |
+ |
8959 |
+@@ -1451,7 +1451,7 @@ static int i2c_imx_remove(struct platform_device *pdev) |
8960 |
+ struct imx_i2c_struct *i2c_imx = platform_get_drvdata(pdev); |
8961 |
+ int irq, ret; |
8962 |
+ |
8963 |
+- ret = pm_runtime_get_sync(&pdev->dev); |
8964 |
++ ret = pm_runtime_resume_and_get(&pdev->dev); |
8965 |
+ if (ret < 0) |
8966 |
+ return ret; |
8967 |
+ |
8968 |
+diff --git a/drivers/i2c/busses/i2c-jz4780.c b/drivers/i2c/busses/i2c-jz4780.c |
8969 |
+index 2a946c2079284..e181db3fd2cce 100644 |
8970 |
+--- a/drivers/i2c/busses/i2c-jz4780.c |
8971 |
++++ b/drivers/i2c/busses/i2c-jz4780.c |
8972 |
+@@ -826,7 +826,10 @@ static int jz4780_i2c_probe(struct platform_device *pdev) |
8973 |
+ |
8974 |
+ jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, 0x0); |
8975 |
+ |
8976 |
+- i2c->irq = platform_get_irq(pdev, 0); |
8977 |
++ ret = platform_get_irq(pdev, 0); |
8978 |
++ if (ret < 0) |
8979 |
++ goto err; |
8980 |
++ i2c->irq = ret; |
8981 |
+ ret = devm_request_irq(&pdev->dev, i2c->irq, jz4780_i2c_irq, 0, |
8982 |
+ dev_name(&pdev->dev), i2c); |
8983 |
+ if (ret) |
8984 |
+diff --git a/drivers/i2c/busses/i2c-mlxbf.c b/drivers/i2c/busses/i2c-mlxbf.c |
8985 |
+index 2fb0532d8a161..ab261d762dea3 100644 |
8986 |
+--- a/drivers/i2c/busses/i2c-mlxbf.c |
8987 |
++++ b/drivers/i2c/busses/i2c-mlxbf.c |
8988 |
+@@ -2376,6 +2376,8 @@ static int mlxbf_i2c_probe(struct platform_device *pdev) |
8989 |
+ mlxbf_i2c_init_slave(pdev, priv); |
8990 |
+ |
8991 |
+ irq = platform_get_irq(pdev, 0); |
8992 |
++ if (irq < 0) |
8993 |
++ return irq; |
8994 |
+ ret = devm_request_irq(dev, irq, mlxbf_smbus_irq, |
8995 |
+ IRQF_ONESHOT | IRQF_SHARED | IRQF_PROBE_SHARED, |
8996 |
+ dev_name(dev), priv); |
8997 |
+diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c |
8998 |
+index 2ffd2f354d0ae..86f70c7513192 100644 |
8999 |
+--- a/drivers/i2c/busses/i2c-mt65xx.c |
9000 |
++++ b/drivers/i2c/busses/i2c-mt65xx.c |
9001 |
+@@ -479,7 +479,7 @@ static void mtk_i2c_init_hw(struct mtk_i2c *i2c) |
9002 |
+ { |
9003 |
+ u16 control_reg; |
9004 |
+ |
9005 |
+- if (i2c->dev_comp->dma_sync) { |
9006 |
++ if (i2c->dev_comp->apdma_sync) { |
9007 |
+ writel(I2C_DMA_WARM_RST, i2c->pdmabase + OFFSET_RST); |
9008 |
+ udelay(10); |
9009 |
+ writel(I2C_DMA_CLR_FLAG, i2c->pdmabase + OFFSET_RST); |
9010 |
+diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c |
9011 |
+index 12ac4212aded8..d4f6c6d60683a 100644 |
9012 |
+--- a/drivers/i2c/busses/i2c-omap.c |
9013 |
++++ b/drivers/i2c/busses/i2c-omap.c |
9014 |
+@@ -1404,9 +1404,9 @@ omap_i2c_probe(struct platform_device *pdev) |
9015 |
+ pm_runtime_set_autosuspend_delay(omap->dev, OMAP_I2C_PM_TIMEOUT); |
9016 |
+ pm_runtime_use_autosuspend(omap->dev); |
9017 |
+ |
9018 |
+- r = pm_runtime_get_sync(omap->dev); |
9019 |
++ r = pm_runtime_resume_and_get(omap->dev); |
9020 |
+ if (r < 0) |
9021 |
+- goto err_free_mem; |
9022 |
++ goto err_disable_pm; |
9023 |
+ |
9024 |
+ /* |
9025 |
+ * Read the Rev hi bit-[15:14] ie scheme this is 1 indicates ver2. |
9026 |
+@@ -1513,8 +1513,8 @@ err_unuse_clocks: |
9027 |
+ omap_i2c_write_reg(omap, OMAP_I2C_CON_REG, 0); |
9028 |
+ pm_runtime_dont_use_autosuspend(omap->dev); |
9029 |
+ pm_runtime_put_sync(omap->dev); |
9030 |
++err_disable_pm: |
9031 |
+ pm_runtime_disable(&pdev->dev); |
9032 |
+-err_free_mem: |
9033 |
+ |
9034 |
+ return r; |
9035 |
+ } |
9036 |
+@@ -1525,7 +1525,7 @@ static int omap_i2c_remove(struct platform_device *pdev) |
9037 |
+ int ret; |
9038 |
+ |
9039 |
+ i2c_del_adapter(&omap->adapter); |
9040 |
+- ret = pm_runtime_get_sync(&pdev->dev); |
9041 |
++ ret = pm_runtime_resume_and_get(&pdev->dev); |
9042 |
+ if (ret < 0) |
9043 |
+ return ret; |
9044 |
+ |
9045 |
+diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c |
9046 |
+index ad6630e3cc779..8722ca23f889b 100644 |
9047 |
+--- a/drivers/i2c/busses/i2c-rcar.c |
9048 |
++++ b/drivers/i2c/busses/i2c-rcar.c |
9049 |
+@@ -625,20 +625,11 @@ static bool rcar_i2c_slave_irq(struct rcar_i2c_priv *priv) |
9050 |
+ * generated. It turned out that taking a spinlock at the beginning of the ISR |
9051 |
+ * was already causing repeated messages. Thus, this driver was converted to |
9052 |
+ * the now lockless behaviour. Please keep this in mind when hacking the driver. |
9053 |
++ * R-Car Gen3 seems to have this fixed but earlier versions than R-Car Gen2 are |
9054 |
++ * likely affected. Therefore, we have different interrupt handler entries. |
9055 |
+ */ |
9056 |
+-static irqreturn_t rcar_i2c_irq(int irq, void *ptr) |
9057 |
++static irqreturn_t rcar_i2c_irq(int irq, struct rcar_i2c_priv *priv, u32 msr) |
9058 |
+ { |
9059 |
+- struct rcar_i2c_priv *priv = ptr; |
9060 |
+- u32 msr; |
9061 |
+- |
9062 |
+- /* Clear START or STOP immediately, except for REPSTART after read */ |
9063 |
+- if (likely(!(priv->flags & ID_P_REP_AFTER_RD))) |
9064 |
+- rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA); |
9065 |
+- |
9066 |
+- msr = rcar_i2c_read(priv, ICMSR); |
9067 |
+- |
9068 |
+- /* Only handle interrupts that are currently enabled */ |
9069 |
+- msr &= rcar_i2c_read(priv, ICMIER); |
9070 |
+ if (!msr) { |
9071 |
+ if (rcar_i2c_slave_irq(priv)) |
9072 |
+ return IRQ_HANDLED; |
9073 |
+@@ -682,6 +673,41 @@ out: |
9074 |
+ return IRQ_HANDLED; |
9075 |
+ } |
9076 |
+ |
9077 |
++static irqreturn_t rcar_i2c_gen2_irq(int irq, void *ptr) |
9078 |
++{ |
9079 |
++ struct rcar_i2c_priv *priv = ptr; |
9080 |
++ u32 msr; |
9081 |
++ |
9082 |
++ /* Clear START or STOP immediately, except for REPSTART after read */ |
9083 |
++ if (likely(!(priv->flags & ID_P_REP_AFTER_RD))) |
9084 |
++ rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA); |
9085 |
++ |
9086 |
++ /* Only handle interrupts that are currently enabled */ |
9087 |
++ msr = rcar_i2c_read(priv, ICMSR); |
9088 |
++ msr &= rcar_i2c_read(priv, ICMIER); |
9089 |
++ |
9090 |
++ return rcar_i2c_irq(irq, priv, msr); |
9091 |
++} |
9092 |
++ |
9093 |
++static irqreturn_t rcar_i2c_gen3_irq(int irq, void *ptr) |
9094 |
++{ |
9095 |
++ struct rcar_i2c_priv *priv = ptr; |
9096 |
++ u32 msr; |
9097 |
++ |
9098 |
++ /* Only handle interrupts that are currently enabled */ |
9099 |
++ msr = rcar_i2c_read(priv, ICMSR); |
9100 |
++ msr &= rcar_i2c_read(priv, ICMIER); |
9101 |
++ |
9102 |
++ /* |
9103 |
++ * Clear START or STOP immediately, except for REPSTART after read or |
9104 |
++ * if a spurious interrupt was detected. |
9105 |
++ */ |
9106 |
++ if (likely(!(priv->flags & ID_P_REP_AFTER_RD) && msr)) |
9107 |
++ rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA); |
9108 |
++ |
9109 |
++ return rcar_i2c_irq(irq, priv, msr); |
9110 |
++} |
9111 |
++ |
9112 |
+ static struct dma_chan *rcar_i2c_request_dma_chan(struct device *dev, |
9113 |
+ enum dma_transfer_direction dir, |
9114 |
+ dma_addr_t port_addr) |
9115 |
+@@ -928,6 +954,8 @@ static int rcar_i2c_probe(struct platform_device *pdev) |
9116 |
+ struct rcar_i2c_priv *priv; |
9117 |
+ struct i2c_adapter *adap; |
9118 |
+ struct device *dev = &pdev->dev; |
9119 |
++ unsigned long irqflags = 0; |
9120 |
++ irqreturn_t (*irqhandler)(int irq, void *ptr) = rcar_i2c_gen3_irq; |
9121 |
+ int ret; |
9122 |
+ |
9123 |
+ /* Otherwise logic will break because some bytes must always use PIO */ |
9124 |
+@@ -976,6 +1004,11 @@ static int rcar_i2c_probe(struct platform_device *pdev) |
9125 |
+ |
9126 |
+ rcar_i2c_write(priv, ICSAR, 0); /* Gen2: must be 0 if not using slave */ |
9127 |
+ |
9128 |
++ if (priv->devtype < I2C_RCAR_GEN3) { |
9129 |
++ irqflags |= IRQF_NO_THREAD; |
9130 |
++ irqhandler = rcar_i2c_gen2_irq; |
9131 |
++ } |
9132 |
++ |
9133 |
+ if (priv->devtype == I2C_RCAR_GEN3) { |
9134 |
+ priv->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL); |
9135 |
+ if (!IS_ERR(priv->rstc)) { |
9136 |
+@@ -994,8 +1027,11 @@ static int rcar_i2c_probe(struct platform_device *pdev) |
9137 |
+ if (of_property_read_bool(dev->of_node, "smbus")) |
9138 |
+ priv->flags |= ID_P_HOST_NOTIFY; |
9139 |
+ |
9140 |
+- priv->irq = platform_get_irq(pdev, 0); |
9141 |
+- ret = devm_request_irq(dev, priv->irq, rcar_i2c_irq, 0, dev_name(dev), priv); |
9142 |
++ ret = platform_get_irq(pdev, 0); |
9143 |
++ if (ret < 0) |
9144 |
++ goto out_pm_disable; |
9145 |
++ priv->irq = ret; |
9146 |
++ ret = devm_request_irq(dev, priv->irq, irqhandler, irqflags, dev_name(dev), priv); |
9147 |
+ if (ret < 0) { |
9148 |
+ dev_err(dev, "cannot get irq %d\n", priv->irq); |
9149 |
+ goto out_pm_disable; |
9150 |
+diff --git a/drivers/i2c/busses/i2c-sh7760.c b/drivers/i2c/busses/i2c-sh7760.c |
9151 |
+index c2005c789d2b0..319d1fa617c88 100644 |
9152 |
+--- a/drivers/i2c/busses/i2c-sh7760.c |
9153 |
++++ b/drivers/i2c/busses/i2c-sh7760.c |
9154 |
+@@ -471,7 +471,10 @@ static int sh7760_i2c_probe(struct platform_device *pdev) |
9155 |
+ goto out2; |
9156 |
+ } |
9157 |
+ |
9158 |
+- id->irq = platform_get_irq(pdev, 0); |
9159 |
++ ret = platform_get_irq(pdev, 0); |
9160 |
++ if (ret < 0) |
9161 |
++ goto out3; |
9162 |
++ id->irq = ret; |
9163 |
+ |
9164 |
+ id->adap.nr = pdev->id; |
9165 |
+ id->adap.algo = &sh7760_i2c_algo; |
9166 |
+diff --git a/drivers/i2c/busses/i2c-sprd.c b/drivers/i2c/busses/i2c-sprd.c |
9167 |
+index 2917fecf6c80d..8ead7e021008c 100644 |
9168 |
+--- a/drivers/i2c/busses/i2c-sprd.c |
9169 |
++++ b/drivers/i2c/busses/i2c-sprd.c |
9170 |
+@@ -290,7 +290,7 @@ static int sprd_i2c_master_xfer(struct i2c_adapter *i2c_adap, |
9171 |
+ struct sprd_i2c *i2c_dev = i2c_adap->algo_data; |
9172 |
+ int im, ret; |
9173 |
+ |
9174 |
+- ret = pm_runtime_get_sync(i2c_dev->dev); |
9175 |
++ ret = pm_runtime_resume_and_get(i2c_dev->dev); |
9176 |
+ if (ret < 0) |
9177 |
+ return ret; |
9178 |
+ |
9179 |
+@@ -576,7 +576,7 @@ static int sprd_i2c_remove(struct platform_device *pdev) |
9180 |
+ struct sprd_i2c *i2c_dev = platform_get_drvdata(pdev); |
9181 |
+ int ret; |
9182 |
+ |
9183 |
+- ret = pm_runtime_get_sync(i2c_dev->dev); |
9184 |
++ ret = pm_runtime_resume_and_get(i2c_dev->dev); |
9185 |
+ if (ret < 0) |
9186 |
+ return ret; |
9187 |
+ |
9188 |
+diff --git a/drivers/i2c/busses/i2c-stm32f7.c b/drivers/i2c/busses/i2c-stm32f7.c |
9189 |
+index 473fbe144b7e3..8e2c65f91a67d 100644 |
9190 |
+--- a/drivers/i2c/busses/i2c-stm32f7.c |
9191 |
++++ b/drivers/i2c/busses/i2c-stm32f7.c |
9192 |
+@@ -1652,7 +1652,7 @@ static int stm32f7_i2c_xfer(struct i2c_adapter *i2c_adap, |
9193 |
+ i2c_dev->msg_id = 0; |
9194 |
+ f7_msg->smbus = false; |
9195 |
+ |
9196 |
+- ret = pm_runtime_get_sync(i2c_dev->dev); |
9197 |
++ ret = pm_runtime_resume_and_get(i2c_dev->dev); |
9198 |
+ if (ret < 0) |
9199 |
+ return ret; |
9200 |
+ |
9201 |
+@@ -1698,7 +1698,7 @@ static int stm32f7_i2c_smbus_xfer(struct i2c_adapter *adapter, u16 addr, |
9202 |
+ f7_msg->read_write = read_write; |
9203 |
+ f7_msg->smbus = true; |
9204 |
+ |
9205 |
+- ret = pm_runtime_get_sync(dev); |
9206 |
++ ret = pm_runtime_resume_and_get(dev); |
9207 |
+ if (ret < 0) |
9208 |
+ return ret; |
9209 |
+ |
9210 |
+@@ -1799,7 +1799,7 @@ static int stm32f7_i2c_reg_slave(struct i2c_client *slave) |
9211 |
+ if (ret) |
9212 |
+ return ret; |
9213 |
+ |
9214 |
+- ret = pm_runtime_get_sync(dev); |
9215 |
++ ret = pm_runtime_resume_and_get(dev); |
9216 |
+ if (ret < 0) |
9217 |
+ return ret; |
9218 |
+ |
9219 |
+@@ -1880,7 +1880,7 @@ static int stm32f7_i2c_unreg_slave(struct i2c_client *slave) |
9220 |
+ |
9221 |
+ WARN_ON(!i2c_dev->slave[id]); |
9222 |
+ |
9223 |
+- ret = pm_runtime_get_sync(i2c_dev->dev); |
9224 |
++ ret = pm_runtime_resume_and_get(i2c_dev->dev); |
9225 |
+ if (ret < 0) |
9226 |
+ return ret; |
9227 |
+ |
9228 |
+@@ -2277,7 +2277,7 @@ static int stm32f7_i2c_regs_backup(struct stm32f7_i2c_dev *i2c_dev) |
9229 |
+ int ret; |
9230 |
+ struct stm32f7_i2c_regs *backup_regs = &i2c_dev->backup_regs; |
9231 |
+ |
9232 |
+- ret = pm_runtime_get_sync(i2c_dev->dev); |
9233 |
++ ret = pm_runtime_resume_and_get(i2c_dev->dev); |
9234 |
+ if (ret < 0) |
9235 |
+ return ret; |
9236 |
+ |
9237 |
+@@ -2299,7 +2299,7 @@ static int stm32f7_i2c_regs_restore(struct stm32f7_i2c_dev *i2c_dev) |
9238 |
+ int ret; |
9239 |
+ struct stm32f7_i2c_regs *backup_regs = &i2c_dev->backup_regs; |
9240 |
+ |
9241 |
+- ret = pm_runtime_get_sync(i2c_dev->dev); |
9242 |
++ ret = pm_runtime_resume_and_get(i2c_dev->dev); |
9243 |
+ if (ret < 0) |
9244 |
+ return ret; |
9245 |
+ |
9246 |
+diff --git a/drivers/i2c/busses/i2c-xiic.c b/drivers/i2c/busses/i2c-xiic.c |
9247 |
+index 087b2951942eb..2a8568b97c14d 100644 |
9248 |
+--- a/drivers/i2c/busses/i2c-xiic.c |
9249 |
++++ b/drivers/i2c/busses/i2c-xiic.c |
9250 |
+@@ -706,7 +706,7 @@ static int xiic_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) |
9251 |
+ dev_dbg(adap->dev.parent, "%s entry SR: 0x%x\n", __func__, |
9252 |
+ xiic_getreg8(i2c, XIIC_SR_REG_OFFSET)); |
9253 |
+ |
9254 |
+- err = pm_runtime_get_sync(i2c->dev); |
9255 |
++ err = pm_runtime_resume_and_get(i2c->dev); |
9256 |
+ if (err < 0) |
9257 |
+ return err; |
9258 |
+ |
9259 |
+@@ -873,7 +873,7 @@ static int xiic_i2c_remove(struct platform_device *pdev) |
9260 |
+ /* remove adapter & data */ |
9261 |
+ i2c_del_adapter(&i2c->adap); |
9262 |
+ |
9263 |
+- ret = pm_runtime_get_sync(i2c->dev); |
9264 |
++ ret = pm_runtime_resume_and_get(i2c->dev); |
9265 |
+ if (ret < 0) |
9266 |
+ return ret; |
9267 |
+ |
9268 |
+diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c |
9269 |
+index b61bf53ec07af..1c6b78ad5ade4 100644 |
9270 |
+--- a/drivers/i3c/master.c |
9271 |
++++ b/drivers/i3c/master.c |
9272 |
+@@ -2537,7 +2537,7 @@ int i3c_master_register(struct i3c_master_controller *master, |
9273 |
+ |
9274 |
+ ret = i3c_master_bus_init(master); |
9275 |
+ if (ret) |
9276 |
+- goto err_destroy_wq; |
9277 |
++ goto err_put_dev; |
9278 |
+ |
9279 |
+ ret = device_add(&master->dev); |
9280 |
+ if (ret) |
9281 |
+@@ -2568,9 +2568,6 @@ err_del_dev: |
9282 |
+ err_cleanup_bus: |
9283 |
+ i3c_master_bus_cleanup(master); |
9284 |
+ |
9285 |
+-err_destroy_wq: |
9286 |
+- destroy_workqueue(master->wq); |
9287 |
+- |
9288 |
+ err_put_dev: |
9289 |
+ put_device(&master->dev); |
9290 |
+ |
9291 |
+diff --git a/drivers/iio/accel/adis16201.c b/drivers/iio/accel/adis16201.c |
9292 |
+index 3633a4e302c68..fe225990de24b 100644 |
9293 |
+--- a/drivers/iio/accel/adis16201.c |
9294 |
++++ b/drivers/iio/accel/adis16201.c |
9295 |
+@@ -215,7 +215,7 @@ static const struct iio_chan_spec adis16201_channels[] = { |
9296 |
+ ADIS_AUX_ADC_CHAN(ADIS16201_AUX_ADC_REG, ADIS16201_SCAN_AUX_ADC, 0, 12), |
9297 |
+ ADIS_INCLI_CHAN(X, ADIS16201_XINCL_OUT_REG, ADIS16201_SCAN_INCLI_X, |
9298 |
+ BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14), |
9299 |
+- ADIS_INCLI_CHAN(X, ADIS16201_YINCL_OUT_REG, ADIS16201_SCAN_INCLI_Y, |
9300 |
++ ADIS_INCLI_CHAN(Y, ADIS16201_YINCL_OUT_REG, ADIS16201_SCAN_INCLI_Y, |
9301 |
+ BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14), |
9302 |
+ IIO_CHAN_SOFT_TIMESTAMP(7) |
9303 |
+ }; |
9304 |
+diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig |
9305 |
+index be1f73166a32b..6840c1205e6db 100644 |
9306 |
+--- a/drivers/iio/adc/Kconfig |
9307 |
++++ b/drivers/iio/adc/Kconfig |
9308 |
+@@ -249,7 +249,7 @@ config AD799X |
9309 |
+ config AD9467 |
9310 |
+ tristate "Analog Devices AD9467 High Speed ADC driver" |
9311 |
+ depends on SPI |
9312 |
+- select ADI_AXI_ADC |
9313 |
++ depends on ADI_AXI_ADC |
9314 |
+ help |
9315 |
+ Say yes here to build support for Analog Devices: |
9316 |
+ * AD9467 16-Bit, 200 MSPS/250 MSPS Analog-to-Digital Converter |
9317 |
+diff --git a/drivers/iio/adc/ad7476.c b/drivers/iio/adc/ad7476.c |
9318 |
+index 66c55ae67791b..bf55726702443 100644 |
9319 |
+--- a/drivers/iio/adc/ad7476.c |
9320 |
++++ b/drivers/iio/adc/ad7476.c |
9321 |
+@@ -316,25 +316,15 @@ static int ad7476_probe(struct spi_device *spi) |
9322 |
+ spi_message_init(&st->msg); |
9323 |
+ spi_message_add_tail(&st->xfer, &st->msg); |
9324 |
+ |
9325 |
+- ret = iio_triggered_buffer_setup(indio_dev, NULL, |
9326 |
+- &ad7476_trigger_handler, NULL); |
9327 |
++ ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, NULL, |
9328 |
++ &ad7476_trigger_handler, NULL); |
9329 |
+ if (ret) |
9330 |
+- goto error_disable_reg; |
9331 |
++ return ret; |
9332 |
+ |
9333 |
+ if (st->chip_info->reset) |
9334 |
+ st->chip_info->reset(st); |
9335 |
+ |
9336 |
+- ret = iio_device_register(indio_dev); |
9337 |
+- if (ret) |
9338 |
+- goto error_ring_unregister; |
9339 |
+- return 0; |
9340 |
+- |
9341 |
+-error_ring_unregister: |
9342 |
+- iio_triggered_buffer_cleanup(indio_dev); |
9343 |
+-error_disable_reg: |
9344 |
+- regulator_disable(st->reg); |
9345 |
+- |
9346 |
+- return ret; |
9347 |
++ return devm_iio_device_register(&spi->dev, indio_dev); |
9348 |
+ } |
9349 |
+ |
9350 |
+ static const struct spi_device_id ad7476_id[] = { |
9351 |
+diff --git a/drivers/iio/imu/adis16480.c b/drivers/iio/imu/adis16480.c |
9352 |
+index dfe86c5893254..c41b8ef1e2509 100644 |
9353 |
+--- a/drivers/iio/imu/adis16480.c |
9354 |
++++ b/drivers/iio/imu/adis16480.c |
9355 |
+@@ -10,6 +10,7 @@ |
9356 |
+ #include <linux/of_irq.h> |
9357 |
+ #include <linux/interrupt.h> |
9358 |
+ #include <linux/delay.h> |
9359 |
++#include <linux/math.h> |
9360 |
+ #include <linux/mutex.h> |
9361 |
+ #include <linux/device.h> |
9362 |
+ #include <linux/kernel.h> |
9363 |
+@@ -17,6 +18,7 @@ |
9364 |
+ #include <linux/slab.h> |
9365 |
+ #include <linux/sysfs.h> |
9366 |
+ #include <linux/module.h> |
9367 |
++#include <linux/lcm.h> |
9368 |
+ |
9369 |
+ #include <linux/iio/iio.h> |
9370 |
+ #include <linux/iio/sysfs.h> |
9371 |
+@@ -170,6 +172,11 @@ static const char * const adis16480_int_pin_names[4] = { |
9372 |
+ [ADIS16480_PIN_DIO4] = "DIO4", |
9373 |
+ }; |
9374 |
+ |
9375 |
++static bool low_rate_allow; |
9376 |
++module_param(low_rate_allow, bool, 0444); |
9377 |
++MODULE_PARM_DESC(low_rate_allow, |
9378 |
++ "Allow IMU rates below the minimum advisable when external clk is used in PPS mode (default: N)"); |
9379 |
++ |
9380 |
+ #ifdef CONFIG_DEBUG_FS |
9381 |
+ |
9382 |
+ static ssize_t adis16480_show_firmware_revision(struct file *file, |
9383 |
+@@ -312,7 +319,8 @@ static int adis16480_debugfs_init(struct iio_dev *indio_dev) |
9384 |
+ static int adis16480_set_freq(struct iio_dev *indio_dev, int val, int val2) |
9385 |
+ { |
9386 |
+ struct adis16480 *st = iio_priv(indio_dev); |
9387 |
+- unsigned int t, reg; |
9388 |
++ unsigned int t, sample_rate = st->clk_freq; |
9389 |
++ int ret; |
9390 |
+ |
9391 |
+ if (val < 0 || val2 < 0) |
9392 |
+ return -EINVAL; |
9393 |
+@@ -321,28 +329,65 @@ static int adis16480_set_freq(struct iio_dev *indio_dev, int val, int val2) |
9394 |
+ if (t == 0) |
9395 |
+ return -EINVAL; |
9396 |
+ |
9397 |
++ mutex_lock(&st->adis.state_lock); |
9398 |
+ /* |
9399 |
+- * When using PPS mode, the rate of data collection is equal to the |
9400 |
+- * product of the external clock frequency and the scale factor in the |
9401 |
+- * SYNC_SCALE register. |
9402 |
+- * When using sync mode, or internal clock, the output data rate is |
9403 |
+- * equal with the clock frequency divided by DEC_RATE + 1. |
9404 |
++ * When using PPS mode, the input clock needs to be scaled so that we have an IMU |
9405 |
++ * sample rate between (optimally) 4000 and 4250. After this, we can use the |
9406 |
++ * decimation filter to lower the sampling rate in order to get what the user wants. |
9407 |
++ * Optimally, the user sample rate is a multiple of both the IMU sample rate and |
9408 |
++ * the input clock. Hence, calculating the sync_scale dynamically gives us better |
9409 |
++ * chances of achieving a perfect/integer value for DEC_RATE. The math here is: |
9410 |
++ * 1. lcm of the input clock and the desired output rate. |
9411 |
++ * 2. get the highest multiple of the previous result lower than the adis max rate. |
9412 |
++ * 3. The last result becomes the IMU sample rate. Use that to calculate SYNC_SCALE |
9413 |
++ * and DEC_RATE (to get the user output rate) |
9414 |
+ */ |
9415 |
+ if (st->clk_mode == ADIS16480_CLK_PPS) { |
9416 |
+- t = t / st->clk_freq; |
9417 |
+- reg = ADIS16495_REG_SYNC_SCALE; |
9418 |
+- } else { |
9419 |
+- t = st->clk_freq / t; |
9420 |
+- reg = ADIS16480_REG_DEC_RATE; |
9421 |
++ unsigned long scaled_rate = lcm(st->clk_freq, t); |
9422 |
++ int sync_scale; |
9423 |
++ |
9424 |
++ /* |
9425 |
++ * If lcm is bigger than the IMU maximum sampling rate there's no perfect |
9426 |
++ * solution. In this case, we get the highest multiple of the input clock |
9427 |
++ * lower than the IMU max sample rate. |
9428 |
++ */ |
9429 |
++ if (scaled_rate > st->chip_info->int_clk) |
9430 |
++ scaled_rate = st->chip_info->int_clk / st->clk_freq * st->clk_freq; |
9431 |
++ else |
9432 |
++ scaled_rate = st->chip_info->int_clk / scaled_rate * scaled_rate; |
9433 |
++ |
9434 |
++ /* |
9435 |
++ * This is not an hard requirement but it's not advised to run the IMU |
9436 |
++ * with a sample rate lower than 4000Hz due to possible undersampling |
9437 |
++ * issues. However, there are users that might really want to take the risk. |
9438 |
++ * Hence, we provide a module parameter for them. If set, we allow sample |
9439 |
++ * rates lower than 4KHz. By default, we won't allow this and we just roundup |
9440 |
++ * the rate to the next multiple of the input clock bigger than 4KHz. This |
9441 |
++ * is done like this as in some cases (when DEC_RATE is 0) might give |
9442 |
++ * us the closest value to the one desired by the user... |
9443 |
++ */ |
9444 |
++ if (scaled_rate < 4000000 && !low_rate_allow) |
9445 |
++ scaled_rate = roundup(4000000, st->clk_freq); |
9446 |
++ |
9447 |
++ sync_scale = scaled_rate / st->clk_freq; |
9448 |
++ ret = __adis_write_reg_16(&st->adis, ADIS16495_REG_SYNC_SCALE, sync_scale); |
9449 |
++ if (ret) |
9450 |
++ goto error; |
9451 |
++ |
9452 |
++ sample_rate = scaled_rate; |
9453 |
+ } |
9454 |
+ |
9455 |
++ t = DIV_ROUND_CLOSEST(sample_rate, t); |
9456 |
++ if (t) |
9457 |
++ t--; |
9458 |
++ |
9459 |
+ if (t > st->chip_info->max_dec_rate) |
9460 |
+ t = st->chip_info->max_dec_rate; |
9461 |
+ |
9462 |
+- if ((t != 0) && (st->clk_mode != ADIS16480_CLK_PPS)) |
9463 |
+- t--; |
9464 |
+- |
9465 |
+- return adis_write_reg_16(&st->adis, reg, t); |
9466 |
++ ret = __adis_write_reg_16(&st->adis, ADIS16480_REG_DEC_RATE, t); |
9467 |
++error: |
9468 |
++ mutex_unlock(&st->adis.state_lock); |
9469 |
++ return ret; |
9470 |
+ } |
9471 |
+ |
9472 |
+ static int adis16480_get_freq(struct iio_dev *indio_dev, int *val, int *val2) |
9473 |
+@@ -350,34 +395,35 @@ static int adis16480_get_freq(struct iio_dev *indio_dev, int *val, int *val2) |
9474 |
+ struct adis16480 *st = iio_priv(indio_dev); |
9475 |
+ uint16_t t; |
9476 |
+ int ret; |
9477 |
+- unsigned int freq; |
9478 |
+- unsigned int reg; |
9479 |
++ unsigned int freq, sample_rate = st->clk_freq; |
9480 |
+ |
9481 |
+- if (st->clk_mode == ADIS16480_CLK_PPS) |
9482 |
+- reg = ADIS16495_REG_SYNC_SCALE; |
9483 |
+- else |
9484 |
+- reg = ADIS16480_REG_DEC_RATE; |
9485 |
++ mutex_lock(&st->adis.state_lock); |
9486 |
++ |
9487 |
++ if (st->clk_mode == ADIS16480_CLK_PPS) { |
9488 |
++ u16 sync_scale; |
9489 |
++ |
9490 |
++ ret = __adis_read_reg_16(&st->adis, ADIS16495_REG_SYNC_SCALE, &sync_scale); |
9491 |
++ if (ret) |
9492 |
++ goto error; |
9493 |
+ |
9494 |
+- ret = adis_read_reg_16(&st->adis, reg, &t); |
9495 |
++ sample_rate = st->clk_freq * sync_scale; |
9496 |
++ } |
9497 |
++ |
9498 |
++ ret = __adis_read_reg_16(&st->adis, ADIS16480_REG_DEC_RATE, &t); |
9499 |
+ if (ret) |
9500 |
+- return ret; |
9501 |
++ goto error; |
9502 |
+ |
9503 |
+- /* |
9504 |
+- * When using PPS mode, the rate of data collection is equal to the |
9505 |
+- * product of the external clock frequency and the scale factor in the |
9506 |
+- * SYNC_SCALE register. |
9507 |
+- * When using sync mode, or internal clock, the output data rate is |
9508 |
+- * equal with the clock frequency divided by DEC_RATE + 1. |
9509 |
+- */ |
9510 |
+- if (st->clk_mode == ADIS16480_CLK_PPS) |
9511 |
+- freq = st->clk_freq * t; |
9512 |
+- else |
9513 |
+- freq = st->clk_freq / (t + 1); |
9514 |
++ mutex_unlock(&st->adis.state_lock); |
9515 |
++ |
9516 |
++ freq = DIV_ROUND_CLOSEST(sample_rate, (t + 1)); |
9517 |
+ |
9518 |
+ *val = freq / 1000; |
9519 |
+ *val2 = (freq % 1000) * 1000; |
9520 |
+ |
9521 |
+ return IIO_VAL_INT_PLUS_MICRO; |
9522 |
++error: |
9523 |
++ mutex_unlock(&st->adis.state_lock); |
9524 |
++ return ret; |
9525 |
+ } |
9526 |
+ |
9527 |
+ enum { |
9528 |
+@@ -1278,6 +1324,20 @@ static int adis16480_probe(struct spi_device *spi) |
9529 |
+ |
9530 |
+ st->clk_freq = clk_get_rate(st->ext_clk); |
9531 |
+ st->clk_freq *= 1000; /* micro */ |
9532 |
++ if (st->clk_mode == ADIS16480_CLK_PPS) { |
9533 |
++ u16 sync_scale; |
9534 |
++ |
9535 |
++ /* |
9536 |
++ * In PPS mode, the IMU sample rate is the clk_freq * sync_scale. Hence, |
9537 |
++ * default the IMU sample rate to the highest multiple of the input clock |
9538 |
++ * lower than the IMU max sample rate. The internal sample rate is the |
9539 |
++ * max... |
9540 |
++ */ |
9541 |
++ sync_scale = st->chip_info->int_clk / st->clk_freq; |
9542 |
++ ret = __adis_write_reg_16(&st->adis, ADIS16495_REG_SYNC_SCALE, sync_scale); |
9543 |
++ if (ret) |
9544 |
++ return ret; |
9545 |
++ } |
9546 |
+ } else { |
9547 |
+ st->clk_freq = st->chip_info->int_clk; |
9548 |
+ } |
9549 |
+diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c b/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c |
9550 |
+index 18a1898e3e348..ae391ec4a7275 100644 |
9551 |
+--- a/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c |
9552 |
++++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c |
9553 |
+@@ -723,12 +723,16 @@ inv_mpu6050_read_raw(struct iio_dev *indio_dev, |
9554 |
+ } |
9555 |
+ } |
9556 |
+ |
9557 |
+-static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state *st, int val) |
9558 |
++static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state *st, int val, |
9559 |
++ int val2) |
9560 |
+ { |
9561 |
+ int result, i; |
9562 |
+ |
9563 |
++ if (val != 0) |
9564 |
++ return -EINVAL; |
9565 |
++ |
9566 |
+ for (i = 0; i < ARRAY_SIZE(gyro_scale_6050); ++i) { |
9567 |
+- if (gyro_scale_6050[i] == val) { |
9568 |
++ if (gyro_scale_6050[i] == val2) { |
9569 |
+ result = inv_mpu6050_set_gyro_fsr(st, i); |
9570 |
+ if (result) |
9571 |
+ return result; |
9572 |
+@@ -759,13 +763,17 @@ static int inv_write_raw_get_fmt(struct iio_dev *indio_dev, |
9573 |
+ return -EINVAL; |
9574 |
+ } |
9575 |
+ |
9576 |
+-static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state *st, int val) |
9577 |
++static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state *st, int val, |
9578 |
++ int val2) |
9579 |
+ { |
9580 |
+ int result, i; |
9581 |
+ u8 d; |
9582 |
+ |
9583 |
++ if (val != 0) |
9584 |
++ return -EINVAL; |
9585 |
++ |
9586 |
+ for (i = 0; i < ARRAY_SIZE(accel_scale); ++i) { |
9587 |
+- if (accel_scale[i] == val) { |
9588 |
++ if (accel_scale[i] == val2) { |
9589 |
+ d = (i << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT); |
9590 |
+ result = regmap_write(st->map, st->reg->accl_config, d); |
9591 |
+ if (result) |
9592 |
+@@ -806,10 +814,10 @@ static int inv_mpu6050_write_raw(struct iio_dev *indio_dev, |
9593 |
+ case IIO_CHAN_INFO_SCALE: |
9594 |
+ switch (chan->type) { |
9595 |
+ case IIO_ANGL_VEL: |
9596 |
+- result = inv_mpu6050_write_gyro_scale(st, val2); |
9597 |
++ result = inv_mpu6050_write_gyro_scale(st, val, val2); |
9598 |
+ break; |
9599 |
+ case IIO_ACCEL: |
9600 |
+- result = inv_mpu6050_write_accel_scale(st, val2); |
9601 |
++ result = inv_mpu6050_write_accel_scale(st, val, val2); |
9602 |
+ break; |
9603 |
+ default: |
9604 |
+ result = -EINVAL; |
9605 |
+diff --git a/drivers/iio/proximity/sx9310.c b/drivers/iio/proximity/sx9310.c |
9606 |
+index 37fd0b65a0140..ea82cfaf7f427 100644 |
9607 |
+--- a/drivers/iio/proximity/sx9310.c |
9608 |
++++ b/drivers/iio/proximity/sx9310.c |
9609 |
+@@ -763,7 +763,11 @@ static int sx9310_write_far_debounce(struct sx9310_data *data, int val) |
9610 |
+ int ret; |
9611 |
+ unsigned int regval; |
9612 |
+ |
9613 |
+- val = ilog2(val); |
9614 |
++ if (val > 0) |
9615 |
++ val = ilog2(val); |
9616 |
++ if (!FIELD_FIT(SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK, val)) |
9617 |
++ return -EINVAL; |
9618 |
++ |
9619 |
+ regval = FIELD_PREP(SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK, val); |
9620 |
+ |
9621 |
+ mutex_lock(&data->mutex); |
9622 |
+@@ -780,7 +784,11 @@ static int sx9310_write_close_debounce(struct sx9310_data *data, int val) |
9623 |
+ int ret; |
9624 |
+ unsigned int regval; |
9625 |
+ |
9626 |
+- val = ilog2(val); |
9627 |
++ if (val > 0) |
9628 |
++ val = ilog2(val); |
9629 |
++ if (!FIELD_FIT(SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK, val)) |
9630 |
++ return -EINVAL; |
9631 |
++ |
9632 |
+ regval = FIELD_PREP(SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK, val); |
9633 |
+ |
9634 |
+ mutex_lock(&data->mutex); |
9635 |
+@@ -1213,17 +1221,17 @@ static int sx9310_init_compensation(struct iio_dev *indio_dev) |
9636 |
+ } |
9637 |
+ |
9638 |
+ static const struct sx9310_reg_default * |
9639 |
+-sx9310_get_default_reg(struct sx9310_data *data, int i, |
9640 |
++sx9310_get_default_reg(struct sx9310_data *data, int idx, |
9641 |
+ struct sx9310_reg_default *reg_def) |
9642 |
+ { |
9643 |
+- int ret; |
9644 |
+ const struct device_node *np = data->client->dev.of_node; |
9645 |
+- u32 combined[SX9310_NUM_CHANNELS] = { 4, 4, 4, 4 }; |
9646 |
++ u32 combined[SX9310_NUM_CHANNELS]; |
9647 |
++ u32 start = 0, raw = 0, pos = 0; |
9648 |
+ unsigned long comb_mask = 0; |
9649 |
++ int ret, i, count; |
9650 |
+ const char *res; |
9651 |
+- u32 start = 0, raw = 0, pos = 0; |
9652 |
+ |
9653 |
+- memcpy(reg_def, &sx9310_default_regs[i], sizeof(*reg_def)); |
9654 |
++ memcpy(reg_def, &sx9310_default_regs[idx], sizeof(*reg_def)); |
9655 |
+ if (!np) |
9656 |
+ return reg_def; |
9657 |
+ |
9658 |
+@@ -1234,15 +1242,31 @@ sx9310_get_default_reg(struct sx9310_data *data, int i, |
9659 |
+ reg_def->def |= SX9310_REG_PROX_CTRL2_SHIELDEN_GROUND; |
9660 |
+ } |
9661 |
+ |
9662 |
+- reg_def->def &= ~SX9310_REG_PROX_CTRL2_COMBMODE_MASK; |
9663 |
+- of_property_read_u32_array(np, "semtech,combined-sensors", |
9664 |
+- combined, ARRAY_SIZE(combined)); |
9665 |
+- for (i = 0; i < ARRAY_SIZE(combined); i++) { |
9666 |
+- if (combined[i] <= SX9310_NUM_CHANNELS) |
9667 |
+- comb_mask |= BIT(combined[i]); |
9668 |
++ count = of_property_count_elems_of_size(np, "semtech,combined-sensors", |
9669 |
++ sizeof(u32)); |
9670 |
++ if (count > 0 && count <= ARRAY_SIZE(combined)) { |
9671 |
++ ret = of_property_read_u32_array(np, "semtech,combined-sensors", |
9672 |
++ combined, count); |
9673 |
++ if (ret) |
9674 |
++ break; |
9675 |
++ } else { |
9676 |
++ /* |
9677 |
++ * Either the property does not exist in the DT or the |
9678 |
++ * number of entries is incorrect. |
9679 |
++ */ |
9680 |
++ break; |
9681 |
+ } |
9682 |
++ for (i = 0; i < count; i++) { |
9683 |
++ if (combined[i] >= SX9310_NUM_CHANNELS) { |
9684 |
++ /* Invalid sensor (invalid DT). */ |
9685 |
++ break; |
9686 |
++ } |
9687 |
++ comb_mask |= BIT(combined[i]); |
9688 |
++ } |
9689 |
++ if (i < count) |
9690 |
++ break; |
9691 |
+ |
9692 |
+- comb_mask &= 0xf; |
9693 |
++ reg_def->def &= ~SX9310_REG_PROX_CTRL2_COMBMODE_MASK; |
9694 |
+ if (comb_mask == (BIT(3) | BIT(2) | BIT(1) | BIT(0))) |
9695 |
+ reg_def->def |= SX9310_REG_PROX_CTRL2_COMBMODE_CS0_CS1_CS2_CS3; |
9696 |
+ else if (comb_mask == (BIT(1) | BIT(2))) |
9697 |
+diff --git a/drivers/infiniband/core/cm.c b/drivers/infiniband/core/cm.c |
9698 |
+index 3d194bb608405..6adbaea358aeb 100644 |
9699 |
+--- a/drivers/infiniband/core/cm.c |
9700 |
++++ b/drivers/infiniband/core/cm.c |
9701 |
+@@ -2138,7 +2138,8 @@ static int cm_req_handler(struct cm_work *work) |
9702 |
+ goto destroy; |
9703 |
+ } |
9704 |
+ |
9705 |
+- cm_process_routed_req(req_msg, work->mad_recv_wc->wc); |
9706 |
++ if (cm_id_priv->av.ah_attr.type != RDMA_AH_ATTR_TYPE_ROCE) |
9707 |
++ cm_process_routed_req(req_msg, work->mad_recv_wc->wc); |
9708 |
+ |
9709 |
+ memset(&work->path[0], 0, sizeof(work->path[0])); |
9710 |
+ if (cm_req_has_alt_path(req_msg)) |
9711 |
+diff --git a/drivers/infiniband/core/cma.c b/drivers/infiniband/core/cma.c |
9712 |
+index e3638f80e1d52..6af066a2c8c06 100644 |
9713 |
+--- a/drivers/infiniband/core/cma.c |
9714 |
++++ b/drivers/infiniband/core/cma.c |
9715 |
+@@ -463,7 +463,6 @@ static void _cma_attach_to_dev(struct rdma_id_private *id_priv, |
9716 |
+ id_priv->id.route.addr.dev_addr.transport = |
9717 |
+ rdma_node_get_transport(cma_dev->device->node_type); |
9718 |
+ list_add_tail(&id_priv->list, &cma_dev->id_list); |
9719 |
+- rdma_restrack_add(&id_priv->res); |
9720 |
+ |
9721 |
+ trace_cm_id_attach(id_priv, cma_dev->device); |
9722 |
+ } |
9723 |
+@@ -700,6 +699,7 @@ static int cma_ib_acquire_dev(struct rdma_id_private *id_priv, |
9724 |
+ mutex_lock(&lock); |
9725 |
+ cma_attach_to_dev(id_priv, listen_id_priv->cma_dev); |
9726 |
+ mutex_unlock(&lock); |
9727 |
++ rdma_restrack_add(&id_priv->res); |
9728 |
+ return 0; |
9729 |
+ } |
9730 |
+ |
9731 |
+@@ -754,8 +754,10 @@ static int cma_iw_acquire_dev(struct rdma_id_private *id_priv, |
9732 |
+ } |
9733 |
+ |
9734 |
+ out: |
9735 |
+- if (!ret) |
9736 |
++ if (!ret) { |
9737 |
+ cma_attach_to_dev(id_priv, cma_dev); |
9738 |
++ rdma_restrack_add(&id_priv->res); |
9739 |
++ } |
9740 |
+ |
9741 |
+ mutex_unlock(&lock); |
9742 |
+ return ret; |
9743 |
+@@ -816,6 +818,7 @@ static int cma_resolve_ib_dev(struct rdma_id_private *id_priv) |
9744 |
+ |
9745 |
+ found: |
9746 |
+ cma_attach_to_dev(id_priv, cma_dev); |
9747 |
++ rdma_restrack_add(&id_priv->res); |
9748 |
+ mutex_unlock(&lock); |
9749 |
+ addr = (struct sockaddr_ib *)cma_src_addr(id_priv); |
9750 |
+ memcpy(&addr->sib_addr, &sgid, sizeof(sgid)); |
9751 |
+@@ -2529,6 +2532,7 @@ static int cma_listen_on_dev(struct rdma_id_private *id_priv, |
9752 |
+ rdma_addr_size(cma_src_addr(id_priv))); |
9753 |
+ |
9754 |
+ _cma_attach_to_dev(dev_id_priv, cma_dev); |
9755 |
++ rdma_restrack_add(&dev_id_priv->res); |
9756 |
+ cma_id_get(id_priv); |
9757 |
+ dev_id_priv->internal_id = 1; |
9758 |
+ dev_id_priv->afonly = id_priv->afonly; |
9759 |
+@@ -3169,6 +3173,7 @@ port_found: |
9760 |
+ ib_addr_set_pkey(&id_priv->id.route.addr.dev_addr, pkey); |
9761 |
+ id_priv->id.port_num = p; |
9762 |
+ cma_attach_to_dev(id_priv, cma_dev); |
9763 |
++ rdma_restrack_add(&id_priv->res); |
9764 |
+ cma_set_loopback(cma_src_addr(id_priv)); |
9765 |
+ out: |
9766 |
+ mutex_unlock(&lock); |
9767 |
+@@ -3201,6 +3206,7 @@ static void addr_handler(int status, struct sockaddr *src_addr, |
9768 |
+ if (status) |
9769 |
+ pr_debug_ratelimited("RDMA CM: ADDR_ERROR: failed to acquire device. status %d\n", |
9770 |
+ status); |
9771 |
++ rdma_restrack_add(&id_priv->res); |
9772 |
+ } else if (status) { |
9773 |
+ pr_debug_ratelimited("RDMA CM: ADDR_ERROR: failed to resolve IP. status %d\n", status); |
9774 |
+ } |
9775 |
+@@ -3812,6 +3818,8 @@ int rdma_bind_addr(struct rdma_cm_id *id, struct sockaddr *addr) |
9776 |
+ if (ret) |
9777 |
+ goto err2; |
9778 |
+ |
9779 |
++ if (!cma_any_addr(addr)) |
9780 |
++ rdma_restrack_add(&id_priv->res); |
9781 |
+ return 0; |
9782 |
+ err2: |
9783 |
+ if (id_priv->cma_dev) |
9784 |
+diff --git a/drivers/infiniband/hw/bnxt_re/qplib_fp.c b/drivers/infiniband/hw/bnxt_re/qplib_fp.c |
9785 |
+index 995d4633b0a1c..d4d4959c2434c 100644 |
9786 |
+--- a/drivers/infiniband/hw/bnxt_re/qplib_fp.c |
9787 |
++++ b/drivers/infiniband/hw/bnxt_re/qplib_fp.c |
9788 |
+@@ -2784,6 +2784,7 @@ do_rq: |
9789 |
+ dev_err(&cq->hwq.pdev->dev, |
9790 |
+ "FP: CQ Processed terminal reported rq_cons_idx 0x%x exceeds max 0x%x\n", |
9791 |
+ cqe_cons, rq->max_wqe); |
9792 |
++ rc = -EINVAL; |
9793 |
+ goto done; |
9794 |
+ } |
9795 |
+ |
9796 |
+diff --git a/drivers/infiniband/hw/bnxt_re/qplib_res.c b/drivers/infiniband/hw/bnxt_re/qplib_res.c |
9797 |
+index fa7878336100a..3ca47004b7527 100644 |
9798 |
+--- a/drivers/infiniband/hw/bnxt_re/qplib_res.c |
9799 |
++++ b/drivers/infiniband/hw/bnxt_re/qplib_res.c |
9800 |
+@@ -854,6 +854,7 @@ static int bnxt_qplib_alloc_dpi_tbl(struct bnxt_qplib_res *res, |
9801 |
+ |
9802 |
+ unmap_io: |
9803 |
+ pci_iounmap(res->pdev, dpit->dbr_bar_reg_iomem); |
9804 |
++ dpit->dbr_bar_reg_iomem = NULL; |
9805 |
+ return -ENOMEM; |
9806 |
+ } |
9807 |
+ |
9808 |
+diff --git a/drivers/infiniband/hw/cxgb4/resource.c b/drivers/infiniband/hw/cxgb4/resource.c |
9809 |
+index 5c95c789f302d..e800e8e8bed5a 100644 |
9810 |
+--- a/drivers/infiniband/hw/cxgb4/resource.c |
9811 |
++++ b/drivers/infiniband/hw/cxgb4/resource.c |
9812 |
+@@ -216,7 +216,7 @@ u32 c4iw_get_qpid(struct c4iw_rdev *rdev, struct c4iw_dev_ucontext *uctx) |
9813 |
+ goto out; |
9814 |
+ entry->qid = qid; |
9815 |
+ list_add_tail(&entry->entry, &uctx->cqids); |
9816 |
+- for (i = qid; i & rdev->qpmask; i++) { |
9817 |
++ for (i = qid + 1; i & rdev->qpmask; i++) { |
9818 |
+ entry = kmalloc(sizeof(*entry), GFP_KERNEL); |
9819 |
+ if (!entry) |
9820 |
+ goto out; |
9821 |
+diff --git a/drivers/infiniband/hw/hfi1/firmware.c b/drivers/infiniband/hw/hfi1/firmware.c |
9822 |
+index 0e83d4b61e463..2cf102b5abd44 100644 |
9823 |
+--- a/drivers/infiniband/hw/hfi1/firmware.c |
9824 |
++++ b/drivers/infiniband/hw/hfi1/firmware.c |
9825 |
+@@ -1916,6 +1916,7 @@ int parse_platform_config(struct hfi1_devdata *dd) |
9826 |
+ dd_dev_err(dd, "%s: Failed CRC check at offset %ld\n", |
9827 |
+ __func__, (ptr - |
9828 |
+ (u32 *)dd->platform_config.data)); |
9829 |
++ ret = -EINVAL; |
9830 |
+ goto bail; |
9831 |
+ } |
9832 |
+ /* Jump the CRC DWORD */ |
9833 |
+diff --git a/drivers/infiniband/hw/hfi1/mmu_rb.c b/drivers/infiniband/hw/hfi1/mmu_rb.c |
9834 |
+index f3fb28e3d5d74..d213f65d4cdd0 100644 |
9835 |
+--- a/drivers/infiniband/hw/hfi1/mmu_rb.c |
9836 |
++++ b/drivers/infiniband/hw/hfi1/mmu_rb.c |
9837 |
+@@ -89,7 +89,7 @@ int hfi1_mmu_rb_register(void *ops_arg, |
9838 |
+ struct mmu_rb_handler *h; |
9839 |
+ int ret; |
9840 |
+ |
9841 |
+- h = kmalloc(sizeof(*h), GFP_KERNEL); |
9842 |
++ h = kzalloc(sizeof(*h), GFP_KERNEL); |
9843 |
+ if (!h) |
9844 |
+ return -ENOMEM; |
9845 |
+ |
9846 |
+diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c |
9847 |
+index 0f76e193317e6..d1444ce015b88 100644 |
9848 |
+--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c |
9849 |
++++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c |
9850 |
+@@ -5090,6 +5090,7 @@ done: |
9851 |
+ qp_attr->cur_qp_state = qp_attr->qp_state; |
9852 |
+ qp_attr->cap.max_recv_wr = hr_qp->rq.wqe_cnt; |
9853 |
+ qp_attr->cap.max_recv_sge = hr_qp->rq.max_gs - hr_qp->rq.rsv_sge; |
9854 |
++ qp_attr->cap.max_inline_data = hr_qp->max_inline_data; |
9855 |
+ |
9856 |
+ if (!ibqp->uobject) { |
9857 |
+ qp_attr->cap.max_send_wr = hr_qp->sq.wqe_cnt; |
9858 |
+diff --git a/drivers/infiniband/hw/i40iw/i40iw_pble.c b/drivers/infiniband/hw/i40iw/i40iw_pble.c |
9859 |
+index 5f97643e22e53..ae7d227edad2f 100644 |
9860 |
+--- a/drivers/infiniband/hw/i40iw/i40iw_pble.c |
9861 |
++++ b/drivers/infiniband/hw/i40iw/i40iw_pble.c |
9862 |
+@@ -392,12 +392,9 @@ static enum i40iw_status_code add_pble_pool(struct i40iw_sc_dev *dev, |
9863 |
+ i40iw_debug(dev, I40IW_DEBUG_PBLE, "next_fpm_addr = %llx chunk_size[%u] = 0x%x\n", |
9864 |
+ pble_rsrc->next_fpm_addr, chunk->size, chunk->size); |
9865 |
+ pble_rsrc->unallocated_pble -= (chunk->size >> 3); |
9866 |
+- list_add(&chunk->list, &pble_rsrc->pinfo.clist); |
9867 |
+ sd_reg_val = (sd_entry_type == I40IW_SD_TYPE_PAGED) ? |
9868 |
+ sd_entry->u.pd_table.pd_page_addr.pa : sd_entry->u.bp.addr.pa; |
9869 |
+- if (sd_entry->valid) |
9870 |
+- return 0; |
9871 |
+- if (dev->is_pf) { |
9872 |
++ if (dev->is_pf && !sd_entry->valid) { |
9873 |
+ ret_code = i40iw_hmc_sd_one(dev, hmc_info->hmc_fn_id, |
9874 |
+ sd_reg_val, idx->sd_idx, |
9875 |
+ sd_entry->entry_type, true); |
9876 |
+@@ -408,6 +405,7 @@ static enum i40iw_status_code add_pble_pool(struct i40iw_sc_dev *dev, |
9877 |
+ } |
9878 |
+ |
9879 |
+ sd_entry->valid = true; |
9880 |
++ list_add(&chunk->list, &pble_rsrc->pinfo.clist); |
9881 |
+ return 0; |
9882 |
+ error: |
9883 |
+ kfree(chunk); |
9884 |
+diff --git a/drivers/infiniband/hw/mlx5/fs.c b/drivers/infiniband/hw/mlx5/fs.c |
9885 |
+index 25da0b05b4e2f..f0af3f1ae0398 100644 |
9886 |
+--- a/drivers/infiniband/hw/mlx5/fs.c |
9887 |
++++ b/drivers/infiniband/hw/mlx5/fs.c |
9888 |
+@@ -1528,8 +1528,8 @@ static struct mlx5_ib_flow_handler *raw_fs_rule_add( |
9889 |
+ dst_num++; |
9890 |
+ } |
9891 |
+ |
9892 |
+- handler = _create_raw_flow_rule(dev, ft_prio, dst, fs_matcher, |
9893 |
+- flow_context, flow_act, |
9894 |
++ handler = _create_raw_flow_rule(dev, ft_prio, dst_num ? dst : NULL, |
9895 |
++ fs_matcher, flow_context, flow_act, |
9896 |
+ cmd_in, inlen, dst_num); |
9897 |
+ |
9898 |
+ if (IS_ERR(handler)) { |
9899 |
+@@ -1885,8 +1885,9 @@ static int get_dests(struct uverbs_attr_bundle *attrs, |
9900 |
+ else |
9901 |
+ *dest_id = mqp->raw_packet_qp.rq.tirn; |
9902 |
+ *dest_type = MLX5_FLOW_DESTINATION_TYPE_TIR; |
9903 |
+- } else if (fs_matcher->ns_type == MLX5_FLOW_NAMESPACE_EGRESS || |
9904 |
+- fs_matcher->ns_type == MLX5_FLOW_NAMESPACE_RDMA_TX) { |
9905 |
++ } else if ((fs_matcher->ns_type == MLX5_FLOW_NAMESPACE_EGRESS || |
9906 |
++ fs_matcher->ns_type == MLX5_FLOW_NAMESPACE_RDMA_TX) && |
9907 |
++ !(*flags & MLX5_IB_ATTR_CREATE_FLOW_FLAGS_DROP)) { |
9908 |
+ *dest_type = MLX5_FLOW_DESTINATION_TYPE_PORT; |
9909 |
+ } |
9910 |
+ |
9911 |
+diff --git a/drivers/infiniband/hw/mlx5/qp.c b/drivers/infiniband/hw/mlx5/qp.c |
9912 |
+index bab40ad527dae..434d70ff7ee92 100644 |
9913 |
+--- a/drivers/infiniband/hw/mlx5/qp.c |
9914 |
++++ b/drivers/infiniband/hw/mlx5/qp.c |
9915 |
+@@ -3054,6 +3054,19 @@ enum { |
9916 |
+ MLX5_PATH_FLAG_COUNTER = 1 << 2, |
9917 |
+ }; |
9918 |
+ |
9919 |
++static int mlx5_to_ib_rate_map(u8 rate) |
9920 |
++{ |
9921 |
++ static const int rates[] = { IB_RATE_PORT_CURRENT, IB_RATE_56_GBPS, |
9922 |
++ IB_RATE_25_GBPS, IB_RATE_100_GBPS, |
9923 |
++ IB_RATE_200_GBPS, IB_RATE_50_GBPS, |
9924 |
++ IB_RATE_400_GBPS }; |
9925 |
++ |
9926 |
++ if (rate < ARRAY_SIZE(rates)) |
9927 |
++ return rates[rate]; |
9928 |
++ |
9929 |
++ return rate - MLX5_STAT_RATE_OFFSET; |
9930 |
++} |
9931 |
++ |
9932 |
+ static int ib_to_mlx5_rate_map(u8 rate) |
9933 |
+ { |
9934 |
+ switch (rate) { |
9935 |
+@@ -4398,7 +4411,7 @@ static void to_rdma_ah_attr(struct mlx5_ib_dev *ibdev, |
9936 |
+ rdma_ah_set_path_bits(ah_attr, MLX5_GET(ads, path, mlid)); |
9937 |
+ |
9938 |
+ static_rate = MLX5_GET(ads, path, stat_rate); |
9939 |
+- rdma_ah_set_static_rate(ah_attr, static_rate ? static_rate - 5 : 0); |
9940 |
++ rdma_ah_set_static_rate(ah_attr, mlx5_to_ib_rate_map(static_rate)); |
9941 |
+ if (MLX5_GET(ads, path, grh) || |
9942 |
+ ah_attr->type == RDMA_AH_ATTR_TYPE_ROCE) { |
9943 |
+ rdma_ah_set_grh(ah_attr, NULL, MLX5_GET(ads, path, flow_label), |
9944 |
+diff --git a/drivers/infiniband/hw/qedr/qedr_iw_cm.c b/drivers/infiniband/hw/qedr/qedr_iw_cm.c |
9945 |
+index c4bc58736e489..1715fbe0719d8 100644 |
9946 |
+--- a/drivers/infiniband/hw/qedr/qedr_iw_cm.c |
9947 |
++++ b/drivers/infiniband/hw/qedr/qedr_iw_cm.c |
9948 |
+@@ -636,8 +636,10 @@ int qedr_iw_connect(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param) |
9949 |
+ memcpy(in_params.local_mac_addr, dev->ndev->dev_addr, ETH_ALEN); |
9950 |
+ |
9951 |
+ if (test_and_set_bit(QEDR_IWARP_CM_WAIT_FOR_CONNECT, |
9952 |
+- &qp->iwarp_cm_flags)) |
9953 |
++ &qp->iwarp_cm_flags)) { |
9954 |
++ rc = -ENODEV; |
9955 |
+ goto err; /* QP already being destroyed */ |
9956 |
++ } |
9957 |
+ |
9958 |
+ rc = dev->ops->iwarp_connect(dev->rdma_ctx, &in_params, &out_params); |
9959 |
+ if (rc) { |
9960 |
+diff --git a/drivers/infiniband/sw/rxe/rxe_av.c b/drivers/infiniband/sw/rxe/rxe_av.c |
9961 |
+index df0d173d6acba..da2e867a1ed93 100644 |
9962 |
+--- a/drivers/infiniband/sw/rxe/rxe_av.c |
9963 |
++++ b/drivers/infiniband/sw/rxe/rxe_av.c |
9964 |
+@@ -88,7 +88,7 @@ void rxe_av_fill_ip_info(struct rxe_av *av, struct rdma_ah_attr *attr) |
9965 |
+ type = RXE_NETWORK_TYPE_IPV4; |
9966 |
+ break; |
9967 |
+ case RDMA_NETWORK_IPV6: |
9968 |
+- type = RXE_NETWORK_TYPE_IPV4; |
9969 |
++ type = RXE_NETWORK_TYPE_IPV6; |
9970 |
+ break; |
9971 |
+ default: |
9972 |
+ /* not reached - checked in rxe_av_chk_attr */ |
9973 |
+diff --git a/drivers/infiniband/sw/siw/siw_mem.c b/drivers/infiniband/sw/siw/siw_mem.c |
9974 |
+index 34a910cf0edbd..61c17db70d658 100644 |
9975 |
+--- a/drivers/infiniband/sw/siw/siw_mem.c |
9976 |
++++ b/drivers/infiniband/sw/siw/siw_mem.c |
9977 |
+@@ -106,8 +106,6 @@ int siw_mr_add_mem(struct siw_mr *mr, struct ib_pd *pd, void *mem_obj, |
9978 |
+ mem->perms = rights & IWARP_ACCESS_MASK; |
9979 |
+ kref_init(&mem->ref); |
9980 |
+ |
9981 |
+- mr->mem = mem; |
9982 |
+- |
9983 |
+ get_random_bytes(&next, 4); |
9984 |
+ next &= 0x00ffffff; |
9985 |
+ |
9986 |
+@@ -116,6 +114,8 @@ int siw_mr_add_mem(struct siw_mr *mr, struct ib_pd *pd, void *mem_obj, |
9987 |
+ kfree(mem); |
9988 |
+ return -ENOMEM; |
9989 |
+ } |
9990 |
++ |
9991 |
++ mr->mem = mem; |
9992 |
+ /* Set the STag index part */ |
9993 |
+ mem->stag = id << 8; |
9994 |
+ mr->base_mr.lkey = mr->base_mr.rkey = mem->stag; |
9995 |
+diff --git a/drivers/infiniband/ulp/isert/ib_isert.c b/drivers/infiniband/ulp/isert/ib_isert.c |
9996 |
+index 2ba27221ea85b..11339cc722149 100644 |
9997 |
+--- a/drivers/infiniband/ulp/isert/ib_isert.c |
9998 |
++++ b/drivers/infiniband/ulp/isert/ib_isert.c |
9999 |
+@@ -438,23 +438,23 @@ isert_connect_request(struct rdma_cm_id *cma_id, struct rdma_cm_event *event) |
10000 |
+ isert_init_conn(isert_conn); |
10001 |
+ isert_conn->cm_id = cma_id; |
10002 |
+ |
10003 |
+- ret = isert_alloc_login_buf(isert_conn, cma_id->device); |
10004 |
+- if (ret) |
10005 |
+- goto out; |
10006 |
+- |
10007 |
+ device = isert_device_get(cma_id); |
10008 |
+ if (IS_ERR(device)) { |
10009 |
+ ret = PTR_ERR(device); |
10010 |
+- goto out_rsp_dma_map; |
10011 |
++ goto out; |
10012 |
+ } |
10013 |
+ isert_conn->device = device; |
10014 |
+ |
10015 |
++ ret = isert_alloc_login_buf(isert_conn, cma_id->device); |
10016 |
++ if (ret) |
10017 |
++ goto out_conn_dev; |
10018 |
++ |
10019 |
+ isert_set_nego_params(isert_conn, &event->param.conn); |
10020 |
+ |
10021 |
+ isert_conn->qp = isert_create_qp(isert_conn, cma_id); |
10022 |
+ if (IS_ERR(isert_conn->qp)) { |
10023 |
+ ret = PTR_ERR(isert_conn->qp); |
10024 |
+- goto out_conn_dev; |
10025 |
++ goto out_rsp_dma_map; |
10026 |
+ } |
10027 |
+ |
10028 |
+ ret = isert_login_post_recv(isert_conn); |
10029 |
+@@ -473,10 +473,10 @@ isert_connect_request(struct rdma_cm_id *cma_id, struct rdma_cm_event *event) |
10030 |
+ |
10031 |
+ out_destroy_qp: |
10032 |
+ isert_destroy_qp(isert_conn); |
10033 |
+-out_conn_dev: |
10034 |
+- isert_device_put(device); |
10035 |
+ out_rsp_dma_map: |
10036 |
+ isert_free_login_buf(isert_conn); |
10037 |
++out_conn_dev: |
10038 |
++ isert_device_put(device); |
10039 |
+ out: |
10040 |
+ kfree(isert_conn); |
10041 |
+ rdma_reject(cma_id, NULL, 0, IB_CM_REJ_CONSUMER_DEFINED); |
10042 |
+diff --git a/drivers/infiniband/ulp/rtrs/rtrs-clt.c b/drivers/infiniband/ulp/rtrs/rtrs-clt.c |
10043 |
+index ee37c5af3a8c9..4cd81d84cd188 100644 |
10044 |
+--- a/drivers/infiniband/ulp/rtrs/rtrs-clt.c |
10045 |
++++ b/drivers/infiniband/ulp/rtrs/rtrs-clt.c |
10046 |
+@@ -2799,8 +2799,8 @@ int rtrs_clt_remove_path_from_sysfs(struct rtrs_clt_sess *sess, |
10047 |
+ } while (!changed && old_state != RTRS_CLT_DEAD); |
10048 |
+ |
10049 |
+ if (likely(changed)) { |
10050 |
+- rtrs_clt_destroy_sess_files(sess, sysfs_self); |
10051 |
+ rtrs_clt_remove_path_from_arr(sess); |
10052 |
++ rtrs_clt_destroy_sess_files(sess, sysfs_self); |
10053 |
+ kobject_put(&sess->kobj); |
10054 |
+ } |
10055 |
+ |
10056 |
+diff --git a/drivers/infiniband/ulp/srpt/ib_srpt.c b/drivers/infiniband/ulp/srpt/ib_srpt.c |
10057 |
+index 6be60aa5ffe21..7f0420ad90575 100644 |
10058 |
+--- a/drivers/infiniband/ulp/srpt/ib_srpt.c |
10059 |
++++ b/drivers/infiniband/ulp/srpt/ib_srpt.c |
10060 |
+@@ -2378,6 +2378,7 @@ static int srpt_cm_req_recv(struct srpt_device *const sdev, |
10061 |
+ pr_info("rejected SRP_LOGIN_REQ because target %s_%d is not enabled\n", |
10062 |
+ dev_name(&sdev->device->dev), port_num); |
10063 |
+ mutex_unlock(&sport->mutex); |
10064 |
++ ret = -EINVAL; |
10065 |
+ goto reject; |
10066 |
+ } |
10067 |
+ |
10068 |
+diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c |
10069 |
+index 78339b0bb8e58..9846b01a52140 100644 |
10070 |
+--- a/drivers/iommu/amd/init.c |
10071 |
++++ b/drivers/iommu/amd/init.c |
10072 |
+@@ -1835,7 +1835,7 @@ static void __init late_iommu_features_init(struct amd_iommu *iommu) |
10073 |
+ * IVHD and MMIO conflict. |
10074 |
+ */ |
10075 |
+ if (features != iommu->features) |
10076 |
+- pr_warn(FW_WARN "EFR mismatch. Use IVHD EFR (%#llx : %#llx\n).", |
10077 |
++ pr_warn(FW_WARN "EFR mismatch. Use IVHD EFR (%#llx : %#llx).\n", |
10078 |
+ features, iommu->features); |
10079 |
+ } |
10080 |
+ |
10081 |
+diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h |
10082 |
+index 96c2e9565e002..190f723a5bcdf 100644 |
10083 |
+--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h |
10084 |
++++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h |
10085 |
+@@ -115,7 +115,7 @@ |
10086 |
+ #define GERROR_PRIQ_ABT_ERR (1 << 3) |
10087 |
+ #define GERROR_EVTQ_ABT_ERR (1 << 2) |
10088 |
+ #define GERROR_CMDQ_ERR (1 << 0) |
10089 |
+-#define GERROR_ERR_MASK 0xfd |
10090 |
++#define GERROR_ERR_MASK 0x1fd |
10091 |
+ |
10092 |
+ #define ARM_SMMU_GERRORN 0x64 |
10093 |
+ |
10094 |
+diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c |
10095 |
+index 00fbc591a1425..9d4a29796fe46 100644 |
10096 |
+--- a/drivers/iommu/dma-iommu.c |
10097 |
++++ b/drivers/iommu/dma-iommu.c |
10098 |
+@@ -51,6 +51,19 @@ struct iommu_dma_cookie { |
10099 |
+ struct iommu_domain *fq_domain; |
10100 |
+ }; |
10101 |
+ |
10102 |
++static DEFINE_STATIC_KEY_FALSE(iommu_deferred_attach_enabled); |
10103 |
++bool iommu_dma_forcedac __read_mostly; |
10104 |
++ |
10105 |
++static int __init iommu_dma_forcedac_setup(char *str) |
10106 |
++{ |
10107 |
++ int ret = kstrtobool(str, &iommu_dma_forcedac); |
10108 |
++ |
10109 |
++ if (!ret && iommu_dma_forcedac) |
10110 |
++ pr_info("Forcing DAC for PCI devices\n"); |
10111 |
++ return ret; |
10112 |
++} |
10113 |
++early_param("iommu.forcedac", iommu_dma_forcedac_setup); |
10114 |
++ |
10115 |
+ void iommu_dma_free_cpu_cached_iovas(unsigned int cpu, |
10116 |
+ struct iommu_domain *domain) |
10117 |
+ { |
10118 |
+@@ -389,9 +402,6 @@ static int iommu_dma_deferred_attach(struct device *dev, |
10119 |
+ { |
10120 |
+ const struct iommu_ops *ops = domain->ops; |
10121 |
+ |
10122 |
+- if (!is_kdump_kernel()) |
10123 |
+- return 0; |
10124 |
+- |
10125 |
+ if (unlikely(ops->is_attach_deferred && |
10126 |
+ ops->is_attach_deferred(domain, dev))) |
10127 |
+ return iommu_attach_device(domain, dev); |
10128 |
+@@ -457,7 +467,7 @@ static dma_addr_t iommu_dma_alloc_iova(struct iommu_domain *domain, |
10129 |
+ dma_limit = min(dma_limit, (u64)domain->geometry.aperture_end); |
10130 |
+ |
10131 |
+ /* Try to get PCI devices a SAC address */ |
10132 |
+- if (dma_limit > DMA_BIT_MASK(32) && dev_is_pci(dev)) |
10133 |
++ if (dma_limit > DMA_BIT_MASK(32) && !iommu_dma_forcedac && dev_is_pci(dev)) |
10134 |
+ iova = alloc_iova_fast(iovad, iova_len, |
10135 |
+ DMA_BIT_MASK(32) >> shift, false); |
10136 |
+ |
10137 |
+@@ -536,7 +546,8 @@ static dma_addr_t __iommu_dma_map(struct device *dev, phys_addr_t phys, |
10138 |
+ size_t iova_off = iova_offset(iovad, phys); |
10139 |
+ dma_addr_t iova; |
10140 |
+ |
10141 |
+- if (unlikely(iommu_dma_deferred_attach(dev, domain))) |
10142 |
++ if (static_branch_unlikely(&iommu_deferred_attach_enabled) && |
10143 |
++ iommu_dma_deferred_attach(dev, domain)) |
10144 |
+ return DMA_MAPPING_ERROR; |
10145 |
+ |
10146 |
+ size = iova_align(iovad, size + iova_off); |
10147 |
+@@ -694,7 +705,8 @@ static void *iommu_dma_alloc_remap(struct device *dev, size_t size, |
10148 |
+ |
10149 |
+ *dma_handle = DMA_MAPPING_ERROR; |
10150 |
+ |
10151 |
+- if (unlikely(iommu_dma_deferred_attach(dev, domain))) |
10152 |
++ if (static_branch_unlikely(&iommu_deferred_attach_enabled) && |
10153 |
++ iommu_dma_deferred_attach(dev, domain)) |
10154 |
+ return NULL; |
10155 |
+ |
10156 |
+ min_size = alloc_sizes & -alloc_sizes; |
10157 |
+@@ -977,7 +989,8 @@ static int iommu_dma_map_sg(struct device *dev, struct scatterlist *sg, |
10158 |
+ unsigned long mask = dma_get_seg_boundary(dev); |
10159 |
+ int i; |
10160 |
+ |
10161 |
+- if (unlikely(iommu_dma_deferred_attach(dev, domain))) |
10162 |
++ if (static_branch_unlikely(&iommu_deferred_attach_enabled) && |
10163 |
++ iommu_dma_deferred_attach(dev, domain)) |
10164 |
+ return 0; |
10165 |
+ |
10166 |
+ if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC)) |
10167 |
+@@ -1425,6 +1438,9 @@ void iommu_dma_compose_msi_msg(struct msi_desc *desc, |
10168 |
+ |
10169 |
+ static int iommu_dma_init(void) |
10170 |
+ { |
10171 |
++ if (is_kdump_kernel()) |
10172 |
++ static_branch_enable(&iommu_deferred_attach_enabled); |
10173 |
++ |
10174 |
+ return iova_cache_get(); |
10175 |
+ } |
10176 |
+ arch_initcall(iommu_dma_init); |
10177 |
+diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c |
10178 |
+index e49a79322c53f..93f17a8a42e2b 100644 |
10179 |
+--- a/drivers/iommu/intel/iommu.c |
10180 |
++++ b/drivers/iommu/intel/iommu.c |
10181 |
+@@ -350,7 +350,6 @@ int intel_iommu_enabled = 0; |
10182 |
+ EXPORT_SYMBOL_GPL(intel_iommu_enabled); |
10183 |
+ |
10184 |
+ static int dmar_map_gfx = 1; |
10185 |
+-static int dmar_forcedac; |
10186 |
+ static int intel_iommu_strict; |
10187 |
+ static int intel_iommu_superpage = 1; |
10188 |
+ static int iommu_identity_mapping; |
10189 |
+@@ -441,8 +440,8 @@ static int __init intel_iommu_setup(char *str) |
10190 |
+ dmar_map_gfx = 0; |
10191 |
+ pr_info("Disable GFX device mapping\n"); |
10192 |
+ } else if (!strncmp(str, "forcedac", 8)) { |
10193 |
+- pr_info("Forcing DAC for PCI devices\n"); |
10194 |
+- dmar_forcedac = 1; |
10195 |
++ pr_warn("intel_iommu=forcedac deprecated; use iommu.forcedac instead\n"); |
10196 |
++ iommu_dma_forcedac = true; |
10197 |
+ } else if (!strncmp(str, "strict", 6)) { |
10198 |
+ pr_info("Disable batched IOTLB flush\n"); |
10199 |
+ intel_iommu_strict = 1; |
10200 |
+@@ -648,7 +647,14 @@ static int domain_update_iommu_snooping(struct intel_iommu *skip) |
10201 |
+ rcu_read_lock(); |
10202 |
+ for_each_active_iommu(iommu, drhd) { |
10203 |
+ if (iommu != skip) { |
10204 |
+- if (!ecap_sc_support(iommu->ecap)) { |
10205 |
++ /* |
10206 |
++ * If the hardware is operating in the scalable mode, |
10207 |
++ * the snooping control is always supported since we |
10208 |
++ * always set PASID-table-entry.PGSNP bit if the domain |
10209 |
++ * is managed outside (UNMANAGED). |
10210 |
++ */ |
10211 |
++ if (!sm_supported(iommu) && |
10212 |
++ !ecap_sc_support(iommu->ecap)) { |
10213 |
+ ret = 0; |
10214 |
+ break; |
10215 |
+ } |
10216 |
+@@ -1017,8 +1023,11 @@ static struct dma_pte *pfn_to_dma_pte(struct dmar_domain *domain, |
10217 |
+ |
10218 |
+ domain_flush_cache(domain, tmp_page, VTD_PAGE_SIZE); |
10219 |
+ pteval = ((uint64_t)virt_to_dma_pfn(tmp_page) << VTD_PAGE_SHIFT) | DMA_PTE_READ | DMA_PTE_WRITE; |
10220 |
+- if (domain_use_first_level(domain)) |
10221 |
++ if (domain_use_first_level(domain)) { |
10222 |
+ pteval |= DMA_FL_PTE_XD | DMA_FL_PTE_US; |
10223 |
++ if (domain->domain.type == IOMMU_DOMAIN_DMA) |
10224 |
++ pteval |= DMA_FL_PTE_ACCESS; |
10225 |
++ } |
10226 |
+ if (cmpxchg64(&pte->val, 0ULL, pteval)) |
10227 |
+ /* Someone else set it while we were thinking; use theirs. */ |
10228 |
+ free_pgtable_page(tmp_page); |
10229 |
+@@ -1327,6 +1336,11 @@ static void iommu_set_root_entry(struct intel_iommu *iommu) |
10230 |
+ readl, (sts & DMA_GSTS_RTPS), sts); |
10231 |
+ |
10232 |
+ raw_spin_unlock_irqrestore(&iommu->register_lock, flag); |
10233 |
++ |
10234 |
++ iommu->flush.flush_context(iommu, 0, 0, 0, DMA_CCMD_GLOBAL_INVL); |
10235 |
++ if (sm_supported(iommu)) |
10236 |
++ qi_flush_pasid_cache(iommu, 0, QI_PC_GLOBAL, 0); |
10237 |
++ iommu->flush.flush_iotlb(iommu, 0, 0, 0, DMA_TLB_GLOBAL_FLUSH); |
10238 |
+ } |
10239 |
+ |
10240 |
+ void iommu_flush_write_buffer(struct intel_iommu *iommu) |
10241 |
+@@ -2345,8 +2359,16 @@ __domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn, |
10242 |
+ return -EINVAL; |
10243 |
+ |
10244 |
+ attr = prot & (DMA_PTE_READ | DMA_PTE_WRITE | DMA_PTE_SNP); |
10245 |
+- if (domain_use_first_level(domain)) |
10246 |
+- attr |= DMA_FL_PTE_PRESENT | DMA_FL_PTE_XD | DMA_FL_PTE_US; |
10247 |
++ attr |= DMA_FL_PTE_PRESENT; |
10248 |
++ if (domain_use_first_level(domain)) { |
10249 |
++ attr |= DMA_FL_PTE_XD | DMA_FL_PTE_US; |
10250 |
++ |
10251 |
++ if (domain->domain.type == IOMMU_DOMAIN_DMA) { |
10252 |
++ attr |= DMA_FL_PTE_ACCESS; |
10253 |
++ if (prot & DMA_PTE_WRITE) |
10254 |
++ attr |= DMA_FL_PTE_DIRTY; |
10255 |
++ } |
10256 |
++ } |
10257 |
+ |
10258 |
+ pteval = ((phys_addr_t)phys_pfn << VTD_PAGE_SHIFT) | attr; |
10259 |
+ |
10260 |
+@@ -2464,6 +2486,10 @@ static void domain_context_clear_one(struct intel_iommu *iommu, u8 bus, u8 devfn |
10261 |
+ (((u16)bus) << 8) | devfn, |
10262 |
+ DMA_CCMD_MASK_NOBIT, |
10263 |
+ DMA_CCMD_DEVICE_INVL); |
10264 |
++ |
10265 |
++ if (sm_supported(iommu)) |
10266 |
++ qi_flush_pasid_cache(iommu, did_old, QI_PC_ALL_PASIDS, 0); |
10267 |
++ |
10268 |
+ iommu->flush.flush_iotlb(iommu, |
10269 |
+ did_old, |
10270 |
+ 0, |
10271 |
+@@ -2547,6 +2573,9 @@ static int domain_setup_first_level(struct intel_iommu *iommu, |
10272 |
+ |
10273 |
+ flags |= (level == 5) ? PASID_FLAG_FL5LP : 0; |
10274 |
+ |
10275 |
++ if (domain->domain.type == IOMMU_DOMAIN_UNMANAGED) |
10276 |
++ flags |= PASID_FLAG_PAGE_SNOOP; |
10277 |
++ |
10278 |
+ return intel_pasid_setup_first_level(iommu, dev, (pgd_t *)pgd, pasid, |
10279 |
+ domain->iommu_did[iommu->seq_id], |
10280 |
+ flags); |
10281 |
+@@ -3305,8 +3334,6 @@ static int __init init_dmars(void) |
10282 |
+ register_pasid_allocator(iommu); |
10283 |
+ #endif |
10284 |
+ iommu_set_root_entry(iommu); |
10285 |
+- iommu->flush.flush_context(iommu, 0, 0, 0, DMA_CCMD_GLOBAL_INVL); |
10286 |
+- iommu->flush.flush_iotlb(iommu, 0, 0, 0, DMA_TLB_GLOBAL_FLUSH); |
10287 |
+ } |
10288 |
+ |
10289 |
+ #ifdef CONFIG_INTEL_IOMMU_BROKEN_GFX_WA |
10290 |
+@@ -3496,12 +3523,7 @@ static int init_iommu_hw(void) |
10291 |
+ } |
10292 |
+ |
10293 |
+ iommu_flush_write_buffer(iommu); |
10294 |
+- |
10295 |
+ iommu_set_root_entry(iommu); |
10296 |
+- |
10297 |
+- iommu->flush.flush_context(iommu, 0, 0, 0, |
10298 |
+- DMA_CCMD_GLOBAL_INVL); |
10299 |
+- iommu->flush.flush_iotlb(iommu, 0, 0, 0, DMA_TLB_GLOBAL_FLUSH); |
10300 |
+ iommu_enable_translation(iommu); |
10301 |
+ iommu_disable_protect_mem_regions(iommu); |
10302 |
+ } |
10303 |
+@@ -3829,8 +3851,6 @@ static int intel_iommu_add(struct dmar_drhd_unit *dmaru) |
10304 |
+ goto disable_iommu; |
10305 |
+ |
10306 |
+ iommu_set_root_entry(iommu); |
10307 |
+- iommu->flush.flush_context(iommu, 0, 0, 0, DMA_CCMD_GLOBAL_INVL); |
10308 |
+- iommu->flush.flush_iotlb(iommu, 0, 0, 0, DMA_TLB_GLOBAL_FLUSH); |
10309 |
+ iommu_enable_translation(iommu); |
10310 |
+ |
10311 |
+ iommu_disable_protect_mem_regions(iommu); |
10312 |
+diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c |
10313 |
+index b92af83b79bdc..ce4ef2d245e3b 100644 |
10314 |
+--- a/drivers/iommu/intel/pasid.c |
10315 |
++++ b/drivers/iommu/intel/pasid.c |
10316 |
+@@ -411,6 +411,16 @@ static inline void pasid_set_page_snoop(struct pasid_entry *pe, bool value) |
10317 |
+ pasid_set_bits(&pe->val[1], 1 << 23, value << 23); |
10318 |
+ } |
10319 |
+ |
10320 |
++/* |
10321 |
++ * Setup the Page Snoop (PGSNP) field (Bit 88) of a scalable mode |
10322 |
++ * PASID entry. |
10323 |
++ */ |
10324 |
++static inline void |
10325 |
++pasid_set_pgsnp(struct pasid_entry *pe) |
10326 |
++{ |
10327 |
++ pasid_set_bits(&pe->val[1], 1ULL << 24, 1ULL << 24); |
10328 |
++} |
10329 |
++ |
10330 |
+ /* |
10331 |
+ * Setup the First Level Page table Pointer field (Bit 140~191) |
10332 |
+ * of a scalable mode PASID entry. |
10333 |
+@@ -579,6 +589,9 @@ int intel_pasid_setup_first_level(struct intel_iommu *iommu, |
10334 |
+ } |
10335 |
+ } |
10336 |
+ |
10337 |
++ if (flags & PASID_FLAG_PAGE_SNOOP) |
10338 |
++ pasid_set_pgsnp(pte); |
10339 |
++ |
10340 |
+ pasid_set_domain_id(pte, did); |
10341 |
+ pasid_set_address_width(pte, iommu->agaw); |
10342 |
+ pasid_set_page_snoop(pte, !!ecap_smpwc(iommu->ecap)); |
10343 |
+@@ -657,6 +670,9 @@ int intel_pasid_setup_second_level(struct intel_iommu *iommu, |
10344 |
+ pasid_set_fault_enable(pte); |
10345 |
+ pasid_set_page_snoop(pte, !!ecap_smpwc(iommu->ecap)); |
10346 |
+ |
10347 |
++ if (domain->domain.type == IOMMU_DOMAIN_UNMANAGED) |
10348 |
++ pasid_set_pgsnp(pte); |
10349 |
++ |
10350 |
+ /* |
10351 |
+ * Since it is a second level only translation setup, we should |
10352 |
+ * set SRE bit as well (addresses are expected to be GPAs). |
10353 |
+diff --git a/drivers/iommu/intel/pasid.h b/drivers/iommu/intel/pasid.h |
10354 |
+index 444c0bec221a4..086ebd6973199 100644 |
10355 |
+--- a/drivers/iommu/intel/pasid.h |
10356 |
++++ b/drivers/iommu/intel/pasid.h |
10357 |
+@@ -48,6 +48,7 @@ |
10358 |
+ */ |
10359 |
+ #define PASID_FLAG_SUPERVISOR_MODE BIT(0) |
10360 |
+ #define PASID_FLAG_NESTED BIT(1) |
10361 |
++#define PASID_FLAG_PAGE_SNOOP BIT(2) |
10362 |
+ |
10363 |
+ /* |
10364 |
+ * The PASID_FLAG_FL5LP flag Indicates using 5-level paging for first- |
10365 |
+diff --git a/drivers/iommu/intel/svm.c b/drivers/iommu/intel/svm.c |
10366 |
+index b3bcd6dec93e7..4260bb089b2ca 100644 |
10367 |
+--- a/drivers/iommu/intel/svm.c |
10368 |
++++ b/drivers/iommu/intel/svm.c |
10369 |
+@@ -899,7 +899,7 @@ intel_svm_prq_report(struct device *dev, struct page_req_dsc *desc) |
10370 |
+ /* Fill in event data for device specific processing */ |
10371 |
+ memset(&event, 0, sizeof(struct iommu_fault_event)); |
10372 |
+ event.fault.type = IOMMU_FAULT_PAGE_REQ; |
10373 |
+- event.fault.prm.addr = desc->addr; |
10374 |
++ event.fault.prm.addr = (u64)desc->addr << VTD_PAGE_SHIFT; |
10375 |
+ event.fault.prm.pasid = desc->pasid; |
10376 |
+ event.fault.prm.grpid = desc->prg_index; |
10377 |
+ event.fault.prm.perm = prq_to_iommu_prot(desc); |
10378 |
+@@ -959,7 +959,17 @@ static irqreturn_t prq_event_thread(int irq, void *d) |
10379 |
+ ((unsigned long long *)req)[1]); |
10380 |
+ goto no_pasid; |
10381 |
+ } |
10382 |
+- |
10383 |
++ /* We shall not receive page request for supervisor SVM */ |
10384 |
++ if (req->pm_req && (req->rd_req | req->wr_req)) { |
10385 |
++ pr_err("Unexpected page request in Privilege Mode"); |
10386 |
++ /* No need to find the matching sdev as for bad_req */ |
10387 |
++ goto no_pasid; |
10388 |
++ } |
10389 |
++ /* DMA read with exec requeset is not supported. */ |
10390 |
++ if (req->exe_req && req->rd_req) { |
10391 |
++ pr_err("Execution request not supported\n"); |
10392 |
++ goto no_pasid; |
10393 |
++ } |
10394 |
+ if (!svm || svm->pasid != req->pasid) { |
10395 |
+ rcu_read_lock(); |
10396 |
+ svm = ioasid_find(NULL, req->pasid, NULL); |
10397 |
+@@ -1061,12 +1071,12 @@ no_pasid: |
10398 |
+ QI_PGRP_RESP_TYPE; |
10399 |
+ resp.qw1 = QI_PGRP_IDX(req->prg_index) | |
10400 |
+ QI_PGRP_LPIG(req->lpig); |
10401 |
++ resp.qw2 = 0; |
10402 |
++ resp.qw3 = 0; |
10403 |
+ |
10404 |
+ if (req->priv_data_present) |
10405 |
+ memcpy(&resp.qw2, req->priv_data, |
10406 |
+ sizeof(req->priv_data)); |
10407 |
+- resp.qw2 = 0; |
10408 |
+- resp.qw3 = 0; |
10409 |
+ qi_submit_sync(iommu, &resp, 1, 0); |
10410 |
+ } |
10411 |
+ prq_advance: |
10412 |
+diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c |
10413 |
+index fd5f59373fc62..0e0140454de82 100644 |
10414 |
+--- a/drivers/iommu/iommu.c |
10415 |
++++ b/drivers/iommu/iommu.c |
10416 |
+@@ -2889,10 +2889,12 @@ EXPORT_SYMBOL_GPL(iommu_dev_has_feature); |
10417 |
+ |
10418 |
+ int iommu_dev_enable_feature(struct device *dev, enum iommu_dev_features feat) |
10419 |
+ { |
10420 |
+- const struct iommu_ops *ops = dev->bus->iommu_ops; |
10421 |
++ if (dev->iommu && dev->iommu->iommu_dev) { |
10422 |
++ const struct iommu_ops *ops = dev->iommu->iommu_dev->ops; |
10423 |
+ |
10424 |
+- if (ops && ops->dev_enable_feat) |
10425 |
+- return ops->dev_enable_feat(dev, feat); |
10426 |
++ if (ops->dev_enable_feat) |
10427 |
++ return ops->dev_enable_feat(dev, feat); |
10428 |
++ } |
10429 |
+ |
10430 |
+ return -ENODEV; |
10431 |
+ } |
10432 |
+@@ -2905,10 +2907,12 @@ EXPORT_SYMBOL_GPL(iommu_dev_enable_feature); |
10433 |
+ */ |
10434 |
+ int iommu_dev_disable_feature(struct device *dev, enum iommu_dev_features feat) |
10435 |
+ { |
10436 |
+- const struct iommu_ops *ops = dev->bus->iommu_ops; |
10437 |
++ if (dev->iommu && dev->iommu->iommu_dev) { |
10438 |
++ const struct iommu_ops *ops = dev->iommu->iommu_dev->ops; |
10439 |
+ |
10440 |
+- if (ops && ops->dev_disable_feat) |
10441 |
+- return ops->dev_disable_feat(dev, feat); |
10442 |
++ if (ops->dev_disable_feat) |
10443 |
++ return ops->dev_disable_feat(dev, feat); |
10444 |
++ } |
10445 |
+ |
10446 |
+ return -EBUSY; |
10447 |
+ } |
10448 |
+@@ -2916,10 +2920,12 @@ EXPORT_SYMBOL_GPL(iommu_dev_disable_feature); |
10449 |
+ |
10450 |
+ bool iommu_dev_feature_enabled(struct device *dev, enum iommu_dev_features feat) |
10451 |
+ { |
10452 |
+- const struct iommu_ops *ops = dev->bus->iommu_ops; |
10453 |
++ if (dev->iommu && dev->iommu->iommu_dev) { |
10454 |
++ const struct iommu_ops *ops = dev->iommu->iommu_dev->ops; |
10455 |
+ |
10456 |
+- if (ops && ops->dev_feat_enabled) |
10457 |
+- return ops->dev_feat_enabled(dev, feat); |
10458 |
++ if (ops->dev_feat_enabled) |
10459 |
++ return ops->dev_feat_enabled(dev, feat); |
10460 |
++ } |
10461 |
+ |
10462 |
+ return false; |
10463 |
+ } |
10464 |
+diff --git a/drivers/irqchip/irq-gic-v3-mbi.c b/drivers/irqchip/irq-gic-v3-mbi.c |
10465 |
+index 563a9b3662941..e81e89a81cb5b 100644 |
10466 |
+--- a/drivers/irqchip/irq-gic-v3-mbi.c |
10467 |
++++ b/drivers/irqchip/irq-gic-v3-mbi.c |
10468 |
+@@ -303,7 +303,7 @@ int __init mbi_init(struct fwnode_handle *fwnode, struct irq_domain *parent) |
10469 |
+ reg = of_get_property(np, "mbi-alias", NULL); |
10470 |
+ if (reg) { |
10471 |
+ mbi_phys_base = of_translate_address(np, reg); |
10472 |
+- if (mbi_phys_base == OF_BAD_ADDR) { |
10473 |
++ if (mbi_phys_base == (phys_addr_t)OF_BAD_ADDR) { |
10474 |
+ ret = -ENXIO; |
10475 |
+ goto err_free_mbi; |
10476 |
+ } |
10477 |
+diff --git a/drivers/mailbox/sprd-mailbox.c b/drivers/mailbox/sprd-mailbox.c |
10478 |
+index 4c325301a2fe8..94d9067dc8d09 100644 |
10479 |
+--- a/drivers/mailbox/sprd-mailbox.c |
10480 |
++++ b/drivers/mailbox/sprd-mailbox.c |
10481 |
+@@ -60,6 +60,8 @@ struct sprd_mbox_priv { |
10482 |
+ struct clk *clk; |
10483 |
+ u32 outbox_fifo_depth; |
10484 |
+ |
10485 |
++ struct mutex lock; |
10486 |
++ u32 refcnt; |
10487 |
+ struct mbox_chan chan[SPRD_MBOX_CHAN_MAX]; |
10488 |
+ }; |
10489 |
+ |
10490 |
+@@ -115,7 +117,11 @@ static irqreturn_t sprd_mbox_outbox_isr(int irq, void *data) |
10491 |
+ id = readl(priv->outbox_base + SPRD_MBOX_ID); |
10492 |
+ |
10493 |
+ chan = &priv->chan[id]; |
10494 |
+- mbox_chan_received_data(chan, (void *)msg); |
10495 |
++ if (chan->cl) |
10496 |
++ mbox_chan_received_data(chan, (void *)msg); |
10497 |
++ else |
10498 |
++ dev_warn_ratelimited(priv->dev, |
10499 |
++ "message's been dropped at ch[%d]\n", id); |
10500 |
+ |
10501 |
+ /* Trigger to update outbox FIFO pointer */ |
10502 |
+ writel(0x1, priv->outbox_base + SPRD_MBOX_TRIGGER); |
10503 |
+@@ -215,18 +221,22 @@ static int sprd_mbox_startup(struct mbox_chan *chan) |
10504 |
+ struct sprd_mbox_priv *priv = to_sprd_mbox_priv(chan->mbox); |
10505 |
+ u32 val; |
10506 |
+ |
10507 |
+- /* Select outbox FIFO mode and reset the outbox FIFO status */ |
10508 |
+- writel(0x0, priv->outbox_base + SPRD_MBOX_FIFO_RST); |
10509 |
++ mutex_lock(&priv->lock); |
10510 |
++ if (priv->refcnt++ == 0) { |
10511 |
++ /* Select outbox FIFO mode and reset the outbox FIFO status */ |
10512 |
++ writel(0x0, priv->outbox_base + SPRD_MBOX_FIFO_RST); |
10513 |
+ |
10514 |
+- /* Enable inbox FIFO overflow and delivery interrupt */ |
10515 |
+- val = readl(priv->inbox_base + SPRD_MBOX_IRQ_MSK); |
10516 |
+- val &= ~(SPRD_INBOX_FIFO_OVERFLOW_IRQ | SPRD_INBOX_FIFO_DELIVER_IRQ); |
10517 |
+- writel(val, priv->inbox_base + SPRD_MBOX_IRQ_MSK); |
10518 |
++ /* Enable inbox FIFO overflow and delivery interrupt */ |
10519 |
++ val = readl(priv->inbox_base + SPRD_MBOX_IRQ_MSK); |
10520 |
++ val &= ~(SPRD_INBOX_FIFO_OVERFLOW_IRQ | SPRD_INBOX_FIFO_DELIVER_IRQ); |
10521 |
++ writel(val, priv->inbox_base + SPRD_MBOX_IRQ_MSK); |
10522 |
+ |
10523 |
+- /* Enable outbox FIFO not empty interrupt */ |
10524 |
+- val = readl(priv->outbox_base + SPRD_MBOX_IRQ_MSK); |
10525 |
+- val &= ~SPRD_OUTBOX_FIFO_NOT_EMPTY_IRQ; |
10526 |
+- writel(val, priv->outbox_base + SPRD_MBOX_IRQ_MSK); |
10527 |
++ /* Enable outbox FIFO not empty interrupt */ |
10528 |
++ val = readl(priv->outbox_base + SPRD_MBOX_IRQ_MSK); |
10529 |
++ val &= ~SPRD_OUTBOX_FIFO_NOT_EMPTY_IRQ; |
10530 |
++ writel(val, priv->outbox_base + SPRD_MBOX_IRQ_MSK); |
10531 |
++ } |
10532 |
++ mutex_unlock(&priv->lock); |
10533 |
+ |
10534 |
+ return 0; |
10535 |
+ } |
10536 |
+@@ -235,9 +245,13 @@ static void sprd_mbox_shutdown(struct mbox_chan *chan) |
10537 |
+ { |
10538 |
+ struct sprd_mbox_priv *priv = to_sprd_mbox_priv(chan->mbox); |
10539 |
+ |
10540 |
+- /* Disable inbox & outbox interrupt */ |
10541 |
+- writel(SPRD_INBOX_FIFO_IRQ_MASK, priv->inbox_base + SPRD_MBOX_IRQ_MSK); |
10542 |
+- writel(SPRD_OUTBOX_FIFO_IRQ_MASK, priv->outbox_base + SPRD_MBOX_IRQ_MSK); |
10543 |
++ mutex_lock(&priv->lock); |
10544 |
++ if (--priv->refcnt == 0) { |
10545 |
++ /* Disable inbox & outbox interrupt */ |
10546 |
++ writel(SPRD_INBOX_FIFO_IRQ_MASK, priv->inbox_base + SPRD_MBOX_IRQ_MSK); |
10547 |
++ writel(SPRD_OUTBOX_FIFO_IRQ_MASK, priv->outbox_base + SPRD_MBOX_IRQ_MSK); |
10548 |
++ } |
10549 |
++ mutex_unlock(&priv->lock); |
10550 |
+ } |
10551 |
+ |
10552 |
+ static const struct mbox_chan_ops sprd_mbox_ops = { |
10553 |
+@@ -266,6 +280,7 @@ static int sprd_mbox_probe(struct platform_device *pdev) |
10554 |
+ return -ENOMEM; |
10555 |
+ |
10556 |
+ priv->dev = dev; |
10557 |
++ mutex_init(&priv->lock); |
10558 |
+ |
10559 |
+ /* |
10560 |
+ * The Spreadtrum mailbox uses an inbox to send messages to the target |
10561 |
+diff --git a/drivers/md/md-bitmap.c b/drivers/md/md-bitmap.c |
10562 |
+index 200c5d0f08bf5..ea3130e116801 100644 |
10563 |
+--- a/drivers/md/md-bitmap.c |
10564 |
++++ b/drivers/md/md-bitmap.c |
10565 |
+@@ -1722,6 +1722,8 @@ void md_bitmap_flush(struct mddev *mddev) |
10566 |
+ md_bitmap_daemon_work(mddev); |
10567 |
+ bitmap->daemon_lastrun -= sleep; |
10568 |
+ md_bitmap_daemon_work(mddev); |
10569 |
++ if (mddev->bitmap_info.external) |
10570 |
++ md_super_wait(mddev); |
10571 |
+ md_bitmap_update_sb(bitmap); |
10572 |
+ } |
10573 |
+ |
10574 |
+diff --git a/drivers/md/md.c b/drivers/md/md.c |
10575 |
+index 04384452a7abd..b15a96708a6d2 100644 |
10576 |
+--- a/drivers/md/md.c |
10577 |
++++ b/drivers/md/md.c |
10578 |
+@@ -752,7 +752,34 @@ void mddev_init(struct mddev *mddev) |
10579 |
+ } |
10580 |
+ EXPORT_SYMBOL_GPL(mddev_init); |
10581 |
+ |
10582 |
++static struct mddev *mddev_find_locked(dev_t unit) |
10583 |
++{ |
10584 |
++ struct mddev *mddev; |
10585 |
++ |
10586 |
++ list_for_each_entry(mddev, &all_mddevs, all_mddevs) |
10587 |
++ if (mddev->unit == unit) |
10588 |
++ return mddev; |
10589 |
++ |
10590 |
++ return NULL; |
10591 |
++} |
10592 |
++ |
10593 |
+ static struct mddev *mddev_find(dev_t unit) |
10594 |
++{ |
10595 |
++ struct mddev *mddev; |
10596 |
++ |
10597 |
++ if (MAJOR(unit) != MD_MAJOR) |
10598 |
++ unit &= ~((1 << MdpMinorShift) - 1); |
10599 |
++ |
10600 |
++ spin_lock(&all_mddevs_lock); |
10601 |
++ mddev = mddev_find_locked(unit); |
10602 |
++ if (mddev) |
10603 |
++ mddev_get(mddev); |
10604 |
++ spin_unlock(&all_mddevs_lock); |
10605 |
++ |
10606 |
++ return mddev; |
10607 |
++} |
10608 |
++ |
10609 |
++static struct mddev *mddev_find_or_alloc(dev_t unit) |
10610 |
+ { |
10611 |
+ struct mddev *mddev, *new = NULL; |
10612 |
+ |
10613 |
+@@ -763,13 +790,13 @@ static struct mddev *mddev_find(dev_t unit) |
10614 |
+ spin_lock(&all_mddevs_lock); |
10615 |
+ |
10616 |
+ if (unit) { |
10617 |
+- list_for_each_entry(mddev, &all_mddevs, all_mddevs) |
10618 |
+- if (mddev->unit == unit) { |
10619 |
+- mddev_get(mddev); |
10620 |
+- spin_unlock(&all_mddevs_lock); |
10621 |
+- kfree(new); |
10622 |
+- return mddev; |
10623 |
+- } |
10624 |
++ mddev = mddev_find_locked(unit); |
10625 |
++ if (mddev) { |
10626 |
++ mddev_get(mddev); |
10627 |
++ spin_unlock(&all_mddevs_lock); |
10628 |
++ kfree(new); |
10629 |
++ return mddev; |
10630 |
++ } |
10631 |
+ |
10632 |
+ if (new) { |
10633 |
+ list_add(&new->all_mddevs, &all_mddevs); |
10634 |
+@@ -795,12 +822,7 @@ static struct mddev *mddev_find(dev_t unit) |
10635 |
+ return NULL; |
10636 |
+ } |
10637 |
+ |
10638 |
+- is_free = 1; |
10639 |
+- list_for_each_entry(mddev, &all_mddevs, all_mddevs) |
10640 |
+- if (mddev->unit == dev) { |
10641 |
+- is_free = 0; |
10642 |
+- break; |
10643 |
+- } |
10644 |
++ is_free = !mddev_find_locked(dev); |
10645 |
+ } |
10646 |
+ new->unit = dev; |
10647 |
+ new->md_minor = MINOR(dev); |
10648 |
+@@ -5657,7 +5679,7 @@ static int md_alloc(dev_t dev, char *name) |
10649 |
+ * writing to /sys/module/md_mod/parameters/new_array. |
10650 |
+ */ |
10651 |
+ static DEFINE_MUTEX(disks_mutex); |
10652 |
+- struct mddev *mddev = mddev_find(dev); |
10653 |
++ struct mddev *mddev = mddev_find_or_alloc(dev); |
10654 |
+ struct gendisk *disk; |
10655 |
+ int partitioned; |
10656 |
+ int shift; |
10657 |
+@@ -6539,11 +6561,9 @@ static void autorun_devices(int part) |
10658 |
+ |
10659 |
+ md_probe(dev); |
10660 |
+ mddev = mddev_find(dev); |
10661 |
+- if (!mddev || !mddev->gendisk) { |
10662 |
+- if (mddev) |
10663 |
+- mddev_put(mddev); |
10664 |
++ if (!mddev) |
10665 |
+ break; |
10666 |
+- } |
10667 |
++ |
10668 |
+ if (mddev_lock(mddev)) |
10669 |
+ pr_warn("md: %s locked, cannot run\n", mdname(mddev)); |
10670 |
+ else if (mddev->raid_disks || mddev->major_version |
10671 |
+@@ -7836,8 +7856,7 @@ static int md_open(struct block_device *bdev, fmode_t mode) |
10672 |
+ /* Wait until bdev->bd_disk is definitely gone */ |
10673 |
+ if (work_pending(&mddev->del_work)) |
10674 |
+ flush_workqueue(md_misc_wq); |
10675 |
+- /* Then retry the open from the top */ |
10676 |
+- return -ERESTARTSYS; |
10677 |
++ return -EBUSY; |
10678 |
+ } |
10679 |
+ BUG_ON(mddev != bdev->bd_disk->private_data); |
10680 |
+ |
10681 |
+@@ -8168,7 +8187,11 @@ static void *md_seq_start(struct seq_file *seq, loff_t *pos) |
10682 |
+ loff_t l = *pos; |
10683 |
+ struct mddev *mddev; |
10684 |
+ |
10685 |
+- if (l >= 0x10000) |
10686 |
++ if (l == 0x10000) { |
10687 |
++ ++*pos; |
10688 |
++ return (void *)2; |
10689 |
++ } |
10690 |
++ if (l > 0x10000) |
10691 |
+ return NULL; |
10692 |
+ if (!l--) |
10693 |
+ /* header */ |
10694 |
+@@ -9266,11 +9289,11 @@ void md_check_recovery(struct mddev *mddev) |
10695 |
+ } |
10696 |
+ |
10697 |
+ if (mddev_is_clustered(mddev)) { |
10698 |
+- struct md_rdev *rdev; |
10699 |
++ struct md_rdev *rdev, *tmp; |
10700 |
+ /* kick the device if another node issued a |
10701 |
+ * remove disk. |
10702 |
+ */ |
10703 |
+- rdev_for_each(rdev, mddev) { |
10704 |
++ rdev_for_each_safe(rdev, tmp, mddev) { |
10705 |
+ if (test_and_clear_bit(ClusterRemove, &rdev->flags) && |
10706 |
+ rdev->raid_disk < 0) |
10707 |
+ md_kick_rdev_from_array(rdev); |
10708 |
+@@ -9584,7 +9607,7 @@ err_wq: |
10709 |
+ static void check_sb_changes(struct mddev *mddev, struct md_rdev *rdev) |
10710 |
+ { |
10711 |
+ struct mdp_superblock_1 *sb = page_address(rdev->sb_page); |
10712 |
+- struct md_rdev *rdev2; |
10713 |
++ struct md_rdev *rdev2, *tmp; |
10714 |
+ int role, ret; |
10715 |
+ char b[BDEVNAME_SIZE]; |
10716 |
+ |
10717 |
+@@ -9601,7 +9624,7 @@ static void check_sb_changes(struct mddev *mddev, struct md_rdev *rdev) |
10718 |
+ } |
10719 |
+ |
10720 |
+ /* Check for change of roles in the active devices */ |
10721 |
+- rdev_for_each(rdev2, mddev) { |
10722 |
++ rdev_for_each_safe(rdev2, tmp, mddev) { |
10723 |
+ if (test_bit(Faulty, &rdev2->flags)) |
10724 |
+ continue; |
10725 |
+ |
10726 |
+diff --git a/drivers/media/common/saa7146/saa7146_core.c b/drivers/media/common/saa7146/saa7146_core.c |
10727 |
+index f2d13b71416cb..e50fa0ff7c5d5 100644 |
10728 |
+--- a/drivers/media/common/saa7146/saa7146_core.c |
10729 |
++++ b/drivers/media/common/saa7146/saa7146_core.c |
10730 |
+@@ -253,7 +253,7 @@ int saa7146_pgtable_build_single(struct pci_dev *pci, struct saa7146_pgtable *pt |
10731 |
+ i, sg_dma_address(list), sg_dma_len(list), |
10732 |
+ list->offset); |
10733 |
+ */ |
10734 |
+- for (p = 0; p * 4096 < list->length; p++, ptr++) { |
10735 |
++ for (p = 0; p * 4096 < sg_dma_len(list); p++, ptr++) { |
10736 |
+ *ptr = cpu_to_le32(sg_dma_address(list) + p * 4096); |
10737 |
+ nr_pages++; |
10738 |
+ } |
10739 |
+diff --git a/drivers/media/common/saa7146/saa7146_video.c b/drivers/media/common/saa7146/saa7146_video.c |
10740 |
+index 7b8795eca5893..66215d9106a42 100644 |
10741 |
+--- a/drivers/media/common/saa7146/saa7146_video.c |
10742 |
++++ b/drivers/media/common/saa7146/saa7146_video.c |
10743 |
+@@ -247,9 +247,8 @@ static int saa7146_pgtable_build(struct saa7146_dev *dev, struct saa7146_buf *bu |
10744 |
+ |
10745 |
+ /* walk all pages, copy all page addresses to ptr1 */ |
10746 |
+ for (i = 0; i < length; i++, list++) { |
10747 |
+- for (p = 0; p * 4096 < list->length; p++, ptr1++) { |
10748 |
++ for (p = 0; p * 4096 < sg_dma_len(list); p++, ptr1++) |
10749 |
+ *ptr1 = cpu_to_le32(sg_dma_address(list) - list->offset); |
10750 |
+- } |
10751 |
+ } |
10752 |
+ /* |
10753 |
+ ptr1 = pt1->cpu; |
10754 |
+diff --git a/drivers/media/dvb-frontends/m88ds3103.c b/drivers/media/dvb-frontends/m88ds3103.c |
10755 |
+index cfa4cdde99d8a..02e8aa11e36e7 100644 |
10756 |
+--- a/drivers/media/dvb-frontends/m88ds3103.c |
10757 |
++++ b/drivers/media/dvb-frontends/m88ds3103.c |
10758 |
+@@ -1904,8 +1904,8 @@ static int m88ds3103_probe(struct i2c_client *client, |
10759 |
+ |
10760 |
+ dev->dt_client = i2c_new_dummy_device(client->adapter, |
10761 |
+ dev->dt_addr); |
10762 |
+- if (!dev->dt_client) { |
10763 |
+- ret = -ENODEV; |
10764 |
++ if (IS_ERR(dev->dt_client)) { |
10765 |
++ ret = PTR_ERR(dev->dt_client); |
10766 |
+ goto err_kfree; |
10767 |
+ } |
10768 |
+ } |
10769 |
+diff --git a/drivers/media/i2c/ccs/ccs-core.c b/drivers/media/i2c/ccs/ccs-core.c |
10770 |
+index b39ae5f8446b1..6a02d8852398a 100644 |
10771 |
+--- a/drivers/media/i2c/ccs/ccs-core.c |
10772 |
++++ b/drivers/media/i2c/ccs/ccs-core.c |
10773 |
+@@ -3290,11 +3290,11 @@ static int ccs_probe(struct i2c_client *client) |
10774 |
+ sensor->pll.scale_n = CCS_LIM(sensor, SCALER_N_MIN); |
10775 |
+ |
10776 |
+ ccs_create_subdev(sensor, sensor->scaler, " scaler", 2, |
10777 |
+- MEDIA_ENT_F_CAM_SENSOR); |
10778 |
++ MEDIA_ENT_F_PROC_VIDEO_SCALER); |
10779 |
+ ccs_create_subdev(sensor, sensor->binner, " binner", 2, |
10780 |
+ MEDIA_ENT_F_PROC_VIDEO_SCALER); |
10781 |
+ ccs_create_subdev(sensor, sensor->pixel_array, " pixel_array", 1, |
10782 |
+- MEDIA_ENT_F_PROC_VIDEO_SCALER); |
10783 |
++ MEDIA_ENT_F_CAM_SENSOR); |
10784 |
+ |
10785 |
+ rval = ccs_init_controls(sensor); |
10786 |
+ if (rval < 0) |
10787 |
+diff --git a/drivers/media/i2c/imx219.c b/drivers/media/i2c/imx219.c |
10788 |
+index e7791a0848b39..ad5cdbfd1d754 100644 |
10789 |
+--- a/drivers/media/i2c/imx219.c |
10790 |
++++ b/drivers/media/i2c/imx219.c |
10791 |
+@@ -1024,29 +1024,47 @@ static int imx219_start_streaming(struct imx219 *imx219) |
10792 |
+ const struct imx219_reg_list *reg_list; |
10793 |
+ int ret; |
10794 |
+ |
10795 |
++ ret = pm_runtime_get_sync(&client->dev); |
10796 |
++ if (ret < 0) { |
10797 |
++ pm_runtime_put_noidle(&client->dev); |
10798 |
++ return ret; |
10799 |
++ } |
10800 |
++ |
10801 |
+ /* Apply default values of current mode */ |
10802 |
+ reg_list = &imx219->mode->reg_list; |
10803 |
+ ret = imx219_write_regs(imx219, reg_list->regs, reg_list->num_of_regs); |
10804 |
+ if (ret) { |
10805 |
+ dev_err(&client->dev, "%s failed to set mode\n", __func__); |
10806 |
+- return ret; |
10807 |
++ goto err_rpm_put; |
10808 |
+ } |
10809 |
+ |
10810 |
+ ret = imx219_set_framefmt(imx219); |
10811 |
+ if (ret) { |
10812 |
+ dev_err(&client->dev, "%s failed to set frame format: %d\n", |
10813 |
+ __func__, ret); |
10814 |
+- return ret; |
10815 |
++ goto err_rpm_put; |
10816 |
+ } |
10817 |
+ |
10818 |
+ /* Apply customized values from user */ |
10819 |
+ ret = __v4l2_ctrl_handler_setup(imx219->sd.ctrl_handler); |
10820 |
+ if (ret) |
10821 |
+- return ret; |
10822 |
++ goto err_rpm_put; |
10823 |
+ |
10824 |
+ /* set stream on register */ |
10825 |
+- return imx219_write_reg(imx219, IMX219_REG_MODE_SELECT, |
10826 |
+- IMX219_REG_VALUE_08BIT, IMX219_MODE_STREAMING); |
10827 |
++ ret = imx219_write_reg(imx219, IMX219_REG_MODE_SELECT, |
10828 |
++ IMX219_REG_VALUE_08BIT, IMX219_MODE_STREAMING); |
10829 |
++ if (ret) |
10830 |
++ goto err_rpm_put; |
10831 |
++ |
10832 |
++ /* vflip and hflip cannot change during streaming */ |
10833 |
++ __v4l2_ctrl_grab(imx219->vflip, true); |
10834 |
++ __v4l2_ctrl_grab(imx219->hflip, true); |
10835 |
++ |
10836 |
++ return 0; |
10837 |
++ |
10838 |
++err_rpm_put: |
10839 |
++ pm_runtime_put(&client->dev); |
10840 |
++ return ret; |
10841 |
+ } |
10842 |
+ |
10843 |
+ static void imx219_stop_streaming(struct imx219 *imx219) |
10844 |
+@@ -1059,12 +1077,16 @@ static void imx219_stop_streaming(struct imx219 *imx219) |
10845 |
+ IMX219_REG_VALUE_08BIT, IMX219_MODE_STANDBY); |
10846 |
+ if (ret) |
10847 |
+ dev_err(&client->dev, "%s failed to set stream\n", __func__); |
10848 |
++ |
10849 |
++ __v4l2_ctrl_grab(imx219->vflip, false); |
10850 |
++ __v4l2_ctrl_grab(imx219->hflip, false); |
10851 |
++ |
10852 |
++ pm_runtime_put(&client->dev); |
10853 |
+ } |
10854 |
+ |
10855 |
+ static int imx219_set_stream(struct v4l2_subdev *sd, int enable) |
10856 |
+ { |
10857 |
+ struct imx219 *imx219 = to_imx219(sd); |
10858 |
+- struct i2c_client *client = v4l2_get_subdevdata(sd); |
10859 |
+ int ret = 0; |
10860 |
+ |
10861 |
+ mutex_lock(&imx219->mutex); |
10862 |
+@@ -1074,36 +1096,23 @@ static int imx219_set_stream(struct v4l2_subdev *sd, int enable) |
10863 |
+ } |
10864 |
+ |
10865 |
+ if (enable) { |
10866 |
+- ret = pm_runtime_get_sync(&client->dev); |
10867 |
+- if (ret < 0) { |
10868 |
+- pm_runtime_put_noidle(&client->dev); |
10869 |
+- goto err_unlock; |
10870 |
+- } |
10871 |
+- |
10872 |
+ /* |
10873 |
+ * Apply default & customized values |
10874 |
+ * and then start streaming. |
10875 |
+ */ |
10876 |
+ ret = imx219_start_streaming(imx219); |
10877 |
+ if (ret) |
10878 |
+- goto err_rpm_put; |
10879 |
++ goto err_unlock; |
10880 |
+ } else { |
10881 |
+ imx219_stop_streaming(imx219); |
10882 |
+- pm_runtime_put(&client->dev); |
10883 |
+ } |
10884 |
+ |
10885 |
+ imx219->streaming = enable; |
10886 |
+ |
10887 |
+- /* vflip and hflip cannot change during streaming */ |
10888 |
+- __v4l2_ctrl_grab(imx219->vflip, enable); |
10889 |
+- __v4l2_ctrl_grab(imx219->hflip, enable); |
10890 |
+- |
10891 |
+ mutex_unlock(&imx219->mutex); |
10892 |
+ |
10893 |
+ return ret; |
10894 |
+ |
10895 |
+-err_rpm_put: |
10896 |
+- pm_runtime_put(&client->dev); |
10897 |
+ err_unlock: |
10898 |
+ mutex_unlock(&imx219->mutex); |
10899 |
+ |
10900 |
+diff --git a/drivers/media/pci/intel/ipu3/ipu3-cio2.c b/drivers/media/pci/intel/ipu3/ipu3-cio2.c |
10901 |
+index 143ba9d90342f..325c1483f42bd 100644 |
10902 |
+--- a/drivers/media/pci/intel/ipu3/ipu3-cio2.c |
10903 |
++++ b/drivers/media/pci/intel/ipu3/ipu3-cio2.c |
10904 |
+@@ -302,7 +302,7 @@ static int cio2_csi2_calc_timing(struct cio2_device *cio2, struct cio2_queue *q, |
10905 |
+ if (!q->sensor) |
10906 |
+ return -ENODEV; |
10907 |
+ |
10908 |
+- freq = v4l2_get_link_freq(q->sensor->ctrl_handler, bpp, lanes); |
10909 |
++ freq = v4l2_get_link_freq(q->sensor->ctrl_handler, bpp, lanes * 2); |
10910 |
+ if (freq < 0) { |
10911 |
+ dev_err(dev, "error %lld, invalid link_freq\n", freq); |
10912 |
+ return freq; |
10913 |
+diff --git a/drivers/media/pci/saa7134/saa7134-core.c b/drivers/media/pci/saa7134/saa7134-core.c |
10914 |
+index 391572a6ec76a..efb757d5168a6 100644 |
10915 |
+--- a/drivers/media/pci/saa7134/saa7134-core.c |
10916 |
++++ b/drivers/media/pci/saa7134/saa7134-core.c |
10917 |
+@@ -243,7 +243,7 @@ int saa7134_pgtable_build(struct pci_dev *pci, struct saa7134_pgtable *pt, |
10918 |
+ |
10919 |
+ ptr = pt->cpu + startpage; |
10920 |
+ for (i = 0; i < length; i++, list = sg_next(list)) { |
10921 |
+- for (p = 0; p * 4096 < list->length; p++, ptr++) |
10922 |
++ for (p = 0; p * 4096 < sg_dma_len(list); p++, ptr++) |
10923 |
+ *ptr = cpu_to_le32(sg_dma_address(list) + |
10924 |
+ list->offset + p * 4096); |
10925 |
+ } |
10926 |
+diff --git a/drivers/media/platform/aspeed-video.c b/drivers/media/platform/aspeed-video.c |
10927 |
+index f2c4dadd6a0eb..7bb6babdcade0 100644 |
10928 |
+--- a/drivers/media/platform/aspeed-video.c |
10929 |
++++ b/drivers/media/platform/aspeed-video.c |
10930 |
+@@ -514,8 +514,8 @@ static void aspeed_video_off(struct aspeed_video *video) |
10931 |
+ aspeed_video_write(video, VE_INTERRUPT_STATUS, 0xffffffff); |
10932 |
+ |
10933 |
+ /* Turn off the relevant clocks */ |
10934 |
+- clk_disable(video->vclk); |
10935 |
+ clk_disable(video->eclk); |
10936 |
++ clk_disable(video->vclk); |
10937 |
+ |
10938 |
+ clear_bit(VIDEO_CLOCKS_ON, &video->flags); |
10939 |
+ } |
10940 |
+@@ -526,8 +526,8 @@ static void aspeed_video_on(struct aspeed_video *video) |
10941 |
+ return; |
10942 |
+ |
10943 |
+ /* Turn on the relevant clocks */ |
10944 |
+- clk_enable(video->eclk); |
10945 |
+ clk_enable(video->vclk); |
10946 |
++ clk_enable(video->eclk); |
10947 |
+ |
10948 |
+ set_bit(VIDEO_CLOCKS_ON, &video->flags); |
10949 |
+ } |
10950 |
+@@ -1719,8 +1719,11 @@ static int aspeed_video_probe(struct platform_device *pdev) |
10951 |
+ return rc; |
10952 |
+ |
10953 |
+ rc = aspeed_video_setup_video(video); |
10954 |
+- if (rc) |
10955 |
++ if (rc) { |
10956 |
++ clk_unprepare(video->vclk); |
10957 |
++ clk_unprepare(video->eclk); |
10958 |
+ return rc; |
10959 |
++ } |
10960 |
+ |
10961 |
+ return 0; |
10962 |
+ } |
10963 |
+diff --git a/drivers/media/platform/meson/ge2d/ge2d.c b/drivers/media/platform/meson/ge2d/ge2d.c |
10964 |
+index f526501bd473b..4ca71eeb26d6f 100644 |
10965 |
+--- a/drivers/media/platform/meson/ge2d/ge2d.c |
10966 |
++++ b/drivers/media/platform/meson/ge2d/ge2d.c |
10967 |
+@@ -757,7 +757,7 @@ static int ge2d_s_ctrl(struct v4l2_ctrl *ctrl) |
10968 |
+ |
10969 |
+ if (ctrl->val == 90) { |
10970 |
+ ctx->hflip = 0; |
10971 |
+- ctx->vflip = 0; |
10972 |
++ ctx->vflip = 1; |
10973 |
+ ctx->xy_swap = 1; |
10974 |
+ } else if (ctrl->val == 180) { |
10975 |
+ ctx->hflip = 1; |
10976 |
+@@ -765,7 +765,7 @@ static int ge2d_s_ctrl(struct v4l2_ctrl *ctrl) |
10977 |
+ ctx->xy_swap = 0; |
10978 |
+ } else if (ctrl->val == 270) { |
10979 |
+ ctx->hflip = 1; |
10980 |
+- ctx->vflip = 1; |
10981 |
++ ctx->vflip = 0; |
10982 |
+ ctx->xy_swap = 1; |
10983 |
+ } else { |
10984 |
+ ctx->hflip = 0; |
10985 |
+diff --git a/drivers/media/platform/qcom/venus/core.c b/drivers/media/platform/qcom/venus/core.c |
10986 |
+index 7233a73117577..4b318dfd71770 100644 |
10987 |
+--- a/drivers/media/platform/qcom/venus/core.c |
10988 |
++++ b/drivers/media/platform/qcom/venus/core.c |
10989 |
+@@ -195,11 +195,11 @@ static int venus_probe(struct platform_device *pdev) |
10990 |
+ if (IS_ERR(core->base)) |
10991 |
+ return PTR_ERR(core->base); |
10992 |
+ |
10993 |
+- core->video_path = of_icc_get(dev, "video-mem"); |
10994 |
++ core->video_path = devm_of_icc_get(dev, "video-mem"); |
10995 |
+ if (IS_ERR(core->video_path)) |
10996 |
+ return PTR_ERR(core->video_path); |
10997 |
+ |
10998 |
+- core->cpucfg_path = of_icc_get(dev, "cpu-cfg"); |
10999 |
++ core->cpucfg_path = devm_of_icc_get(dev, "cpu-cfg"); |
11000 |
+ if (IS_ERR(core->cpucfg_path)) |
11001 |
+ return PTR_ERR(core->cpucfg_path); |
11002 |
+ |
11003 |
+@@ -334,9 +334,6 @@ static int venus_remove(struct platform_device *pdev) |
11004 |
+ |
11005 |
+ hfi_destroy(core); |
11006 |
+ |
11007 |
+- icc_put(core->video_path); |
11008 |
+- icc_put(core->cpucfg_path); |
11009 |
+- |
11010 |
+ v4l2_device_unregister(&core->v4l2_dev); |
11011 |
+ mutex_destroy(&core->pm_lock); |
11012 |
+ mutex_destroy(&core->lock); |
11013 |
+diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c |
11014 |
+index 813670ed9577b..79deed8adceab 100644 |
11015 |
+--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c |
11016 |
++++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c |
11017 |
+@@ -520,14 +520,15 @@ static void rkisp1_rsz_set_src_fmt(struct rkisp1_resizer *rsz, |
11018 |
+ struct v4l2_mbus_framefmt *format, |
11019 |
+ unsigned int which) |
11020 |
+ { |
11021 |
+- const struct rkisp1_isp_mbus_info *mbus_info; |
11022 |
+- struct v4l2_mbus_framefmt *src_fmt; |
11023 |
++ const struct rkisp1_isp_mbus_info *sink_mbus_info; |
11024 |
++ struct v4l2_mbus_framefmt *src_fmt, *sink_fmt; |
11025 |
+ |
11026 |
++ sink_fmt = rkisp1_rsz_get_pad_fmt(rsz, cfg, RKISP1_RSZ_PAD_SINK, which); |
11027 |
+ src_fmt = rkisp1_rsz_get_pad_fmt(rsz, cfg, RKISP1_RSZ_PAD_SRC, which); |
11028 |
+- mbus_info = rkisp1_isp_mbus_info_get(src_fmt->code); |
11029 |
++ sink_mbus_info = rkisp1_isp_mbus_info_get(sink_fmt->code); |
11030 |
+ |
11031 |
+ /* for YUV formats, userspace can change the mbus code on the src pad if it is supported */ |
11032 |
+- if (mbus_info->pixel_enc == V4L2_PIXEL_ENC_YUV && |
11033 |
++ if (sink_mbus_info->pixel_enc == V4L2_PIXEL_ENC_YUV && |
11034 |
+ rkisp1_rsz_get_yuv_mbus_info(format->code)) |
11035 |
+ src_fmt->code = format->code; |
11036 |
+ |
11037 |
+diff --git a/drivers/media/platform/sunxi/sun6i-csi/sun6i_video.c b/drivers/media/platform/sunxi/sun6i-csi/sun6i_video.c |
11038 |
+index b55de9ab64d8b..3181d0781b613 100644 |
11039 |
+--- a/drivers/media/platform/sunxi/sun6i-csi/sun6i_video.c |
11040 |
++++ b/drivers/media/platform/sunxi/sun6i-csi/sun6i_video.c |
11041 |
+@@ -151,8 +151,10 @@ static int sun6i_video_start_streaming(struct vb2_queue *vq, unsigned int count) |
11042 |
+ } |
11043 |
+ |
11044 |
+ subdev = sun6i_video_remote_subdev(video, NULL); |
11045 |
+- if (!subdev) |
11046 |
++ if (!subdev) { |
11047 |
++ ret = -EINVAL; |
11048 |
+ goto stop_media_pipeline; |
11049 |
++ } |
11050 |
+ |
11051 |
+ config.pixelformat = video->fmt.fmt.pix.pixelformat; |
11052 |
+ config.code = video->mbus_code; |
11053 |
+diff --git a/drivers/media/test-drivers/vivid/vivid-vid-out.c b/drivers/media/test-drivers/vivid/vivid-vid-out.c |
11054 |
+index ac1e981e83420..9f731f085179e 100644 |
11055 |
+--- a/drivers/media/test-drivers/vivid/vivid-vid-out.c |
11056 |
++++ b/drivers/media/test-drivers/vivid/vivid-vid-out.c |
11057 |
+@@ -1021,7 +1021,7 @@ int vivid_vid_out_s_fbuf(struct file *file, void *fh, |
11058 |
+ return -EINVAL; |
11059 |
+ } |
11060 |
+ dev->fbuf_out_flags &= ~(chroma_flags | alpha_flags); |
11061 |
+- dev->fbuf_out_flags = a->flags & (chroma_flags | alpha_flags); |
11062 |
++ dev->fbuf_out_flags |= a->flags & (chroma_flags | alpha_flags); |
11063 |
+ return 0; |
11064 |
+ } |
11065 |
+ |
11066 |
+diff --git a/drivers/media/tuners/m88rs6000t.c b/drivers/media/tuners/m88rs6000t.c |
11067 |
+index b3505f4024764..8647c50b66e50 100644 |
11068 |
+--- a/drivers/media/tuners/m88rs6000t.c |
11069 |
++++ b/drivers/media/tuners/m88rs6000t.c |
11070 |
+@@ -525,7 +525,7 @@ static int m88rs6000t_get_rf_strength(struct dvb_frontend *fe, u16 *strength) |
11071 |
+ PGA2_cri = PGA2_GC >> 2; |
11072 |
+ PGA2_crf = PGA2_GC & 0x03; |
11073 |
+ |
11074 |
+- for (i = 0; i <= RF_GC; i++) |
11075 |
++ for (i = 0; i <= RF_GC && i < ARRAY_SIZE(RFGS); i++) |
11076 |
+ RFG += RFGS[i]; |
11077 |
+ |
11078 |
+ if (RF_GC == 0) |
11079 |
+@@ -537,12 +537,12 @@ static int m88rs6000t_get_rf_strength(struct dvb_frontend *fe, u16 *strength) |
11080 |
+ if (RF_GC == 3) |
11081 |
+ RFG += 100; |
11082 |
+ |
11083 |
+- for (i = 0; i <= IF_GC; i++) |
11084 |
++ for (i = 0; i <= IF_GC && i < ARRAY_SIZE(IFGS); i++) |
11085 |
+ IFG += IFGS[i]; |
11086 |
+ |
11087 |
+ TIAG = TIA_GC * TIA_GS; |
11088 |
+ |
11089 |
+- for (i = 0; i <= BB_GC; i++) |
11090 |
++ for (i = 0; i <= BB_GC && i < ARRAY_SIZE(BBGS); i++) |
11091 |
+ BBG += BBGS[i]; |
11092 |
+ |
11093 |
+ PGA2G = PGA2_cri * PGA2_cri_GS + PGA2_crf * PGA2_crf_GS; |
11094 |
+diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c |
11095 |
+index 8052a6efb9659..5fdca3da0d70e 100644 |
11096 |
+--- a/drivers/media/v4l2-core/v4l2-ctrls.c |
11097 |
++++ b/drivers/media/v4l2-core/v4l2-ctrls.c |
11098 |
+@@ -2536,7 +2536,15 @@ void v4l2_ctrl_handler_free(struct v4l2_ctrl_handler *hdl) |
11099 |
+ if (hdl == NULL || hdl->buckets == NULL) |
11100 |
+ return; |
11101 |
+ |
11102 |
+- if (!hdl->req_obj.req && !list_empty(&hdl->requests)) { |
11103 |
++ /* |
11104 |
++ * If the main handler is freed and it is used by handler objects in |
11105 |
++ * outstanding requests, then unbind and put those objects before |
11106 |
++ * freeing the main handler. |
11107 |
++ * |
11108 |
++ * The main handler can be identified by having a NULL ops pointer in |
11109 |
++ * the request object. |
11110 |
++ */ |
11111 |
++ if (!hdl->req_obj.ops && !list_empty(&hdl->requests)) { |
11112 |
+ struct v4l2_ctrl_handler *req, *next_req; |
11113 |
+ |
11114 |
+ list_for_each_entry_safe(req, next_req, &hdl->requests, requests) { |
11115 |
+@@ -3579,8 +3587,8 @@ static void v4l2_ctrl_request_unbind(struct media_request_object *obj) |
11116 |
+ container_of(obj, struct v4l2_ctrl_handler, req_obj); |
11117 |
+ struct v4l2_ctrl_handler *main_hdl = obj->priv; |
11118 |
+ |
11119 |
+- list_del_init(&hdl->requests); |
11120 |
+ mutex_lock(main_hdl->lock); |
11121 |
++ list_del_init(&hdl->requests); |
11122 |
+ if (hdl->request_is_queued) { |
11123 |
+ list_del_init(&hdl->requests_queued); |
11124 |
+ hdl->request_is_queued = false; |
11125 |
+@@ -3639,8 +3647,11 @@ static int v4l2_ctrl_request_bind(struct media_request *req, |
11126 |
+ if (!ret) { |
11127 |
+ ret = media_request_object_bind(req, &req_ops, |
11128 |
+ from, false, &hdl->req_obj); |
11129 |
+- if (!ret) |
11130 |
++ if (!ret) { |
11131 |
++ mutex_lock(from->lock); |
11132 |
+ list_add_tail(&hdl->requests, &from->requests); |
11133 |
++ mutex_unlock(from->lock); |
11134 |
++ } |
11135 |
+ } |
11136 |
+ return ret; |
11137 |
+ } |
11138 |
+diff --git a/drivers/memory/omap-gpmc.c b/drivers/memory/omap-gpmc.c |
11139 |
+index cfa730cfd1453..f80c2ea39ca4c 100644 |
11140 |
+--- a/drivers/memory/omap-gpmc.c |
11141 |
++++ b/drivers/memory/omap-gpmc.c |
11142 |
+@@ -1009,8 +1009,8 @@ EXPORT_SYMBOL(gpmc_cs_request); |
11143 |
+ |
11144 |
+ void gpmc_cs_free(int cs) |
11145 |
+ { |
11146 |
+- struct gpmc_cs_data *gpmc = &gpmc_cs[cs]; |
11147 |
+- struct resource *res = &gpmc->mem; |
11148 |
++ struct gpmc_cs_data *gpmc; |
11149 |
++ struct resource *res; |
11150 |
+ |
11151 |
+ spin_lock(&gpmc_mem_lock); |
11152 |
+ if (cs >= gpmc_cs_num || cs < 0 || !gpmc_cs_reserved(cs)) { |
11153 |
+@@ -1018,6 +1018,9 @@ void gpmc_cs_free(int cs) |
11154 |
+ spin_unlock(&gpmc_mem_lock); |
11155 |
+ return; |
11156 |
+ } |
11157 |
++ gpmc = &gpmc_cs[cs]; |
11158 |
++ res = &gpmc->mem; |
11159 |
++ |
11160 |
+ gpmc_cs_disable_mem(cs); |
11161 |
+ if (res->flags) |
11162 |
+ release_resource(res); |
11163 |
+diff --git a/drivers/memory/pl353-smc.c b/drivers/memory/pl353-smc.c |
11164 |
+index 73bd3023202f0..b42804b1801e6 100644 |
11165 |
+--- a/drivers/memory/pl353-smc.c |
11166 |
++++ b/drivers/memory/pl353-smc.c |
11167 |
+@@ -63,7 +63,7 @@ |
11168 |
+ /* ECC memory config register specific constants */ |
11169 |
+ #define PL353_SMC_ECC_MEMCFG_MODE_MASK 0xC |
11170 |
+ #define PL353_SMC_ECC_MEMCFG_MODE_SHIFT 2 |
11171 |
+-#define PL353_SMC_ECC_MEMCFG_PGSIZE_MASK 0xC |
11172 |
++#define PL353_SMC_ECC_MEMCFG_PGSIZE_MASK 0x3 |
11173 |
+ |
11174 |
+ #define PL353_SMC_DC_UPT_NAND_REGS ((4 << 23) | /* CS: NAND chip */ \ |
11175 |
+ (2 << 21)) /* UpdateRegs operation */ |
11176 |
+diff --git a/drivers/memory/renesas-rpc-if.c b/drivers/memory/renesas-rpc-if.c |
11177 |
+index 8d36e221def14..45eed659b0c6d 100644 |
11178 |
+--- a/drivers/memory/renesas-rpc-if.c |
11179 |
++++ b/drivers/memory/renesas-rpc-if.c |
11180 |
+@@ -192,10 +192,10 @@ int rpcif_sw_init(struct rpcif *rpc, struct device *dev) |
11181 |
+ } |
11182 |
+ |
11183 |
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dirmap"); |
11184 |
+- rpc->size = resource_size(res); |
11185 |
+ rpc->dirmap = devm_ioremap_resource(&pdev->dev, res); |
11186 |
+ if (IS_ERR(rpc->dirmap)) |
11187 |
+ rpc->dirmap = NULL; |
11188 |
++ rpc->size = resource_size(res); |
11189 |
+ |
11190 |
+ rpc->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL); |
11191 |
+ |
11192 |
+diff --git a/drivers/memory/samsung/exynos5422-dmc.c b/drivers/memory/samsung/exynos5422-dmc.c |
11193 |
+index c5ee4121a4d22..3d230f07eaf21 100644 |
11194 |
+--- a/drivers/memory/samsung/exynos5422-dmc.c |
11195 |
++++ b/drivers/memory/samsung/exynos5422-dmc.c |
11196 |
+@@ -1298,7 +1298,9 @@ static int exynos5_dmc_init_clks(struct exynos5_dmc *dmc) |
11197 |
+ |
11198 |
+ dmc->curr_volt = target_volt; |
11199 |
+ |
11200 |
+- clk_set_parent(dmc->mout_mx_mspll_ccore, dmc->mout_spll); |
11201 |
++ ret = clk_set_parent(dmc->mout_mx_mspll_ccore, dmc->mout_spll); |
11202 |
++ if (ret) |
11203 |
++ return ret; |
11204 |
+ |
11205 |
+ clk_prepare_enable(dmc->fout_bpll); |
11206 |
+ clk_prepare_enable(dmc->mout_bpll); |
11207 |
+diff --git a/drivers/mfd/intel_pmt.c b/drivers/mfd/intel_pmt.c |
11208 |
+index 744b230cdccaa..65da2b17a2040 100644 |
11209 |
+--- a/drivers/mfd/intel_pmt.c |
11210 |
++++ b/drivers/mfd/intel_pmt.c |
11211 |
+@@ -79,19 +79,18 @@ static int pmt_add_dev(struct pci_dev *pdev, struct intel_dvsec_header *header, |
11212 |
+ case DVSEC_INTEL_ID_WATCHER: |
11213 |
+ if (quirks & PMT_QUIRK_NO_WATCHER) { |
11214 |
+ dev_info(dev, "Watcher not supported\n"); |
11215 |
+- return 0; |
11216 |
++ return -EINVAL; |
11217 |
+ } |
11218 |
+ name = "pmt_watcher"; |
11219 |
+ break; |
11220 |
+ case DVSEC_INTEL_ID_CRASHLOG: |
11221 |
+ if (quirks & PMT_QUIRK_NO_CRASHLOG) { |
11222 |
+ dev_info(dev, "Crashlog not supported\n"); |
11223 |
+- return 0; |
11224 |
++ return -EINVAL; |
11225 |
+ } |
11226 |
+ name = "pmt_crashlog"; |
11227 |
+ break; |
11228 |
+ default: |
11229 |
+- dev_err(dev, "Unrecognized PMT capability: %d\n", id); |
11230 |
+ return -EINVAL; |
11231 |
+ } |
11232 |
+ |
11233 |
+@@ -174,12 +173,8 @@ static int pmt_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) |
11234 |
+ header.offset = INTEL_DVSEC_TABLE_OFFSET(table); |
11235 |
+ |
11236 |
+ ret = pmt_add_dev(pdev, &header, quirks); |
11237 |
+- if (ret) { |
11238 |
+- dev_warn(&pdev->dev, |
11239 |
+- "Failed to add device for DVSEC id %d\n", |
11240 |
+- header.id); |
11241 |
++ if (ret) |
11242 |
+ continue; |
11243 |
+- } |
11244 |
+ |
11245 |
+ found_devices = true; |
11246 |
+ } while (true); |
11247 |
+diff --git a/drivers/mfd/stm32-timers.c b/drivers/mfd/stm32-timers.c |
11248 |
+index add6033591242..44ed2fce03196 100644 |
11249 |
+--- a/drivers/mfd/stm32-timers.c |
11250 |
++++ b/drivers/mfd/stm32-timers.c |
11251 |
+@@ -158,13 +158,18 @@ static const struct regmap_config stm32_timers_regmap_cfg = { |
11252 |
+ |
11253 |
+ static void stm32_timers_get_arr_size(struct stm32_timers *ddata) |
11254 |
+ { |
11255 |
++ u32 arr; |
11256 |
++ |
11257 |
++ /* Backup ARR to restore it after getting the maximum value */ |
11258 |
++ regmap_read(ddata->regmap, TIM_ARR, &arr); |
11259 |
++ |
11260 |
+ /* |
11261 |
+ * Only the available bits will be written so when readback |
11262 |
+ * we get the maximum value of auto reload register |
11263 |
+ */ |
11264 |
+ regmap_write(ddata->regmap, TIM_ARR, ~0L); |
11265 |
+ regmap_read(ddata->regmap, TIM_ARR, &ddata->max_arr); |
11266 |
+- regmap_write(ddata->regmap, TIM_ARR, 0x0); |
11267 |
++ regmap_write(ddata->regmap, TIM_ARR, arr); |
11268 |
+ } |
11269 |
+ |
11270 |
+ static int stm32_timers_dma_probe(struct device *dev, |
11271 |
+diff --git a/drivers/mfd/stmpe.c b/drivers/mfd/stmpe.c |
11272 |
+index 90f3292230c9c..1dd39483e7c14 100644 |
11273 |
+--- a/drivers/mfd/stmpe.c |
11274 |
++++ b/drivers/mfd/stmpe.c |
11275 |
+@@ -312,7 +312,7 @@ EXPORT_SYMBOL_GPL(stmpe_set_altfunc); |
11276 |
+ * GPIO (all variants) |
11277 |
+ */ |
11278 |
+ |
11279 |
+-static const struct resource stmpe_gpio_resources[] = { |
11280 |
++static struct resource stmpe_gpio_resources[] = { |
11281 |
+ /* Start and end filled dynamically */ |
11282 |
+ { |
11283 |
+ .flags = IORESOURCE_IRQ, |
11284 |
+@@ -336,7 +336,8 @@ static const struct mfd_cell stmpe_gpio_cell_noirq = { |
11285 |
+ * Keypad (1601, 2401, 2403) |
11286 |
+ */ |
11287 |
+ |
11288 |
+-static const struct resource stmpe_keypad_resources[] = { |
11289 |
++static struct resource stmpe_keypad_resources[] = { |
11290 |
++ /* Start and end filled dynamically */ |
11291 |
+ { |
11292 |
+ .name = "KEYPAD", |
11293 |
+ .flags = IORESOURCE_IRQ, |
11294 |
+@@ -357,7 +358,8 @@ static const struct mfd_cell stmpe_keypad_cell = { |
11295 |
+ /* |
11296 |
+ * PWM (1601, 2401, 2403) |
11297 |
+ */ |
11298 |
+-static const struct resource stmpe_pwm_resources[] = { |
11299 |
++static struct resource stmpe_pwm_resources[] = { |
11300 |
++ /* Start and end filled dynamically */ |
11301 |
+ { |
11302 |
+ .name = "PWM0", |
11303 |
+ .flags = IORESOURCE_IRQ, |
11304 |
+@@ -445,7 +447,8 @@ static struct stmpe_variant_info stmpe801_noirq = { |
11305 |
+ * Touchscreen (STMPE811 or STMPE610) |
11306 |
+ */ |
11307 |
+ |
11308 |
+-static const struct resource stmpe_ts_resources[] = { |
11309 |
++static struct resource stmpe_ts_resources[] = { |
11310 |
++ /* Start and end filled dynamically */ |
11311 |
+ { |
11312 |
+ .name = "TOUCH_DET", |
11313 |
+ .flags = IORESOURCE_IRQ, |
11314 |
+@@ -467,7 +470,8 @@ static const struct mfd_cell stmpe_ts_cell = { |
11315 |
+ * ADC (STMPE811) |
11316 |
+ */ |
11317 |
+ |
11318 |
+-static const struct resource stmpe_adc_resources[] = { |
11319 |
++static struct resource stmpe_adc_resources[] = { |
11320 |
++ /* Start and end filled dynamically */ |
11321 |
+ { |
11322 |
+ .name = "STMPE_TEMP_SENS", |
11323 |
+ .flags = IORESOURCE_IRQ, |
11324 |
+diff --git a/drivers/misc/lis3lv02d/lis3lv02d.c b/drivers/misc/lis3lv02d/lis3lv02d.c |
11325 |
+index dd65cedf3b125..9d14bf444481b 100644 |
11326 |
+--- a/drivers/misc/lis3lv02d/lis3lv02d.c |
11327 |
++++ b/drivers/misc/lis3lv02d/lis3lv02d.c |
11328 |
+@@ -208,7 +208,7 @@ static int lis3_3dc_rates[16] = {0, 1, 10, 25, 50, 100, 200, 400, 1600, 5000}; |
11329 |
+ static int lis3_3dlh_rates[4] = {50, 100, 400, 1000}; |
11330 |
+ |
11331 |
+ /* ODR is Output Data Rate */ |
11332 |
+-static int lis3lv02d_get_odr(struct lis3lv02d *lis3) |
11333 |
++static int lis3lv02d_get_odr_index(struct lis3lv02d *lis3) |
11334 |
+ { |
11335 |
+ u8 ctrl; |
11336 |
+ int shift; |
11337 |
+@@ -216,15 +216,23 @@ static int lis3lv02d_get_odr(struct lis3lv02d *lis3) |
11338 |
+ lis3->read(lis3, CTRL_REG1, &ctrl); |
11339 |
+ ctrl &= lis3->odr_mask; |
11340 |
+ shift = ffs(lis3->odr_mask) - 1; |
11341 |
+- return lis3->odrs[(ctrl >> shift)]; |
11342 |
++ return (ctrl >> shift); |
11343 |
+ } |
11344 |
+ |
11345 |
+ static int lis3lv02d_get_pwron_wait(struct lis3lv02d *lis3) |
11346 |
+ { |
11347 |
+- int div = lis3lv02d_get_odr(lis3); |
11348 |
++ int odr_idx = lis3lv02d_get_odr_index(lis3); |
11349 |
++ int div = lis3->odrs[odr_idx]; |
11350 |
+ |
11351 |
+- if (WARN_ONCE(div == 0, "device returned spurious data")) |
11352 |
++ if (div == 0) { |
11353 |
++ if (odr_idx == 0) { |
11354 |
++ /* Power-down mode, not sampling no need to sleep */ |
11355 |
++ return 0; |
11356 |
++ } |
11357 |
++ |
11358 |
++ dev_err(&lis3->pdev->dev, "Error unknown odrs-index: %d\n", odr_idx); |
11359 |
+ return -ENXIO; |
11360 |
++ } |
11361 |
+ |
11362 |
+ /* LIS3 power on delay is quite long */ |
11363 |
+ msleep(lis3->pwron_delay / div); |
11364 |
+@@ -816,9 +824,12 @@ static ssize_t lis3lv02d_rate_show(struct device *dev, |
11365 |
+ struct device_attribute *attr, char *buf) |
11366 |
+ { |
11367 |
+ struct lis3lv02d *lis3 = dev_get_drvdata(dev); |
11368 |
++ int odr_idx; |
11369 |
+ |
11370 |
+ lis3lv02d_sysfs_poweron(lis3); |
11371 |
+- return sprintf(buf, "%d\n", lis3lv02d_get_odr(lis3)); |
11372 |
++ |
11373 |
++ odr_idx = lis3lv02d_get_odr_index(lis3); |
11374 |
++ return sprintf(buf, "%d\n", lis3->odrs[odr_idx]); |
11375 |
+ } |
11376 |
+ |
11377 |
+ static ssize_t lis3lv02d_rate_set(struct device *dev, |
11378 |
+diff --git a/drivers/misc/vmw_vmci/vmci_doorbell.c b/drivers/misc/vmw_vmci/vmci_doorbell.c |
11379 |
+index 345addd9306de..fa8a7fce4481b 100644 |
11380 |
+--- a/drivers/misc/vmw_vmci/vmci_doorbell.c |
11381 |
++++ b/drivers/misc/vmw_vmci/vmci_doorbell.c |
11382 |
+@@ -326,7 +326,7 @@ int vmci_dbell_host_context_notify(u32 src_cid, struct vmci_handle handle) |
11383 |
+ bool vmci_dbell_register_notification_bitmap(u64 bitmap_ppn) |
11384 |
+ { |
11385 |
+ int result; |
11386 |
+- struct vmci_notify_bm_set_msg bitmap_set_msg; |
11387 |
++ struct vmci_notify_bm_set_msg bitmap_set_msg = { }; |
11388 |
+ |
11389 |
+ bitmap_set_msg.hdr.dst = vmci_make_handle(VMCI_HYPERVISOR_CONTEXT_ID, |
11390 |
+ VMCI_SET_NOTIFY_BITMAP); |
11391 |
+diff --git a/drivers/misc/vmw_vmci/vmci_guest.c b/drivers/misc/vmw_vmci/vmci_guest.c |
11392 |
+index cc8eeb361fcdb..1018dc77269d4 100644 |
11393 |
+--- a/drivers/misc/vmw_vmci/vmci_guest.c |
11394 |
++++ b/drivers/misc/vmw_vmci/vmci_guest.c |
11395 |
+@@ -168,7 +168,7 @@ static int vmci_check_host_caps(struct pci_dev *pdev) |
11396 |
+ VMCI_UTIL_NUM_RESOURCES * sizeof(u32); |
11397 |
+ struct vmci_datagram *check_msg; |
11398 |
+ |
11399 |
+- check_msg = kmalloc(msg_size, GFP_KERNEL); |
11400 |
++ check_msg = kzalloc(msg_size, GFP_KERNEL); |
11401 |
+ if (!check_msg) { |
11402 |
+ dev_err(&pdev->dev, "%s: Insufficient memory\n", __func__); |
11403 |
+ return -ENOMEM; |
11404 |
+diff --git a/drivers/mtd/maps/physmap-core.c b/drivers/mtd/maps/physmap-core.c |
11405 |
+index 001ed5deb622a..4f63b8430c710 100644 |
11406 |
+--- a/drivers/mtd/maps/physmap-core.c |
11407 |
++++ b/drivers/mtd/maps/physmap-core.c |
11408 |
+@@ -69,8 +69,10 @@ static int physmap_flash_remove(struct platform_device *dev) |
11409 |
+ int i, err = 0; |
11410 |
+ |
11411 |
+ info = platform_get_drvdata(dev); |
11412 |
+- if (!info) |
11413 |
++ if (!info) { |
11414 |
++ err = -EINVAL; |
11415 |
+ goto out; |
11416 |
++ } |
11417 |
+ |
11418 |
+ if (info->cmtd) { |
11419 |
+ err = mtd_device_unregister(info->cmtd); |
11420 |
+diff --git a/drivers/mtd/mtdchar.c b/drivers/mtd/mtdchar.c |
11421 |
+index 323035d4f2d01..688de663cabf6 100644 |
11422 |
+--- a/drivers/mtd/mtdchar.c |
11423 |
++++ b/drivers/mtd/mtdchar.c |
11424 |
+@@ -651,16 +651,12 @@ static int mtdchar_ioctl(struct file *file, u_int cmd, u_long arg) |
11425 |
+ case MEMGETINFO: |
11426 |
+ case MEMREADOOB: |
11427 |
+ case MEMREADOOB64: |
11428 |
+- case MEMLOCK: |
11429 |
+- case MEMUNLOCK: |
11430 |
+ case MEMISLOCKED: |
11431 |
+ case MEMGETOOBSEL: |
11432 |
+ case MEMGETBADBLOCK: |
11433 |
+- case MEMSETBADBLOCK: |
11434 |
+ case OTPSELECT: |
11435 |
+ case OTPGETREGIONCOUNT: |
11436 |
+ case OTPGETREGIONINFO: |
11437 |
+- case OTPLOCK: |
11438 |
+ case ECCGETLAYOUT: |
11439 |
+ case ECCGETSTATS: |
11440 |
+ case MTDFILEMODE: |
11441 |
+@@ -671,9 +667,13 @@ static int mtdchar_ioctl(struct file *file, u_int cmd, u_long arg) |
11442 |
+ /* "dangerous" commands */ |
11443 |
+ case MEMERASE: |
11444 |
+ case MEMERASE64: |
11445 |
++ case MEMLOCK: |
11446 |
++ case MEMUNLOCK: |
11447 |
++ case MEMSETBADBLOCK: |
11448 |
+ case MEMWRITEOOB: |
11449 |
+ case MEMWRITEOOB64: |
11450 |
+ case MEMWRITE: |
11451 |
++ case OTPLOCK: |
11452 |
+ if (!(file->f_mode & FMODE_WRITE)) |
11453 |
+ return -EPERM; |
11454 |
+ break; |
11455 |
+diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c |
11456 |
+index 2d6423d89a175..d97ddc65b5d43 100644 |
11457 |
+--- a/drivers/mtd/mtdcore.c |
11458 |
++++ b/drivers/mtd/mtdcore.c |
11459 |
+@@ -820,6 +820,9 @@ int mtd_device_parse_register(struct mtd_info *mtd, const char * const *types, |
11460 |
+ |
11461 |
+ /* Prefer parsed partitions over driver-provided fallback */ |
11462 |
+ ret = parse_mtd_partitions(mtd, types, parser_data); |
11463 |
++ if (ret == -EPROBE_DEFER) |
11464 |
++ goto out; |
11465 |
++ |
11466 |
+ if (ret > 0) |
11467 |
+ ret = 0; |
11468 |
+ else if (nr_parts) |
11469 |
+diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c |
11470 |
+index 12ca4f19cb14a..665fd9020b764 100644 |
11471 |
+--- a/drivers/mtd/mtdpart.c |
11472 |
++++ b/drivers/mtd/mtdpart.c |
11473 |
+@@ -331,7 +331,7 @@ static int __del_mtd_partitions(struct mtd_info *mtd) |
11474 |
+ |
11475 |
+ list_for_each_entry_safe(child, next, &mtd->partitions, part.node) { |
11476 |
+ if (mtd_has_partitions(child)) |
11477 |
+- del_mtd_partitions(child); |
11478 |
++ __del_mtd_partitions(child); |
11479 |
+ |
11480 |
+ pr_info("Deleting %s MTD partition\n", child->name); |
11481 |
+ ret = del_mtd_device(child); |
11482 |
+diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c |
11483 |
+index 659eaa6f0980c..5ff4291380c53 100644 |
11484 |
+--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c |
11485 |
++++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c |
11486 |
+@@ -2688,6 +2688,12 @@ static int brcmnand_attach_chip(struct nand_chip *chip) |
11487 |
+ |
11488 |
+ ret = brcmstb_choose_ecc_layout(host); |
11489 |
+ |
11490 |
++ /* If OOB is written with ECC enabled it will cause ECC errors */ |
11491 |
++ if (is_hamming_ecc(host->ctrl, &host->hwcfg)) { |
11492 |
++ chip->ecc.write_oob = brcmnand_write_oob_raw; |
11493 |
++ chip->ecc.read_oob = brcmnand_read_oob_raw; |
11494 |
++ } |
11495 |
++ |
11496 |
+ return ret; |
11497 |
+ } |
11498 |
+ |
11499 |
+diff --git a/drivers/mtd/nand/raw/fsmc_nand.c b/drivers/mtd/nand/raw/fsmc_nand.c |
11500 |
+index 0101c0fab50ad..a24e2f57fa68a 100644 |
11501 |
+--- a/drivers/mtd/nand/raw/fsmc_nand.c |
11502 |
++++ b/drivers/mtd/nand/raw/fsmc_nand.c |
11503 |
+@@ -1077,11 +1077,13 @@ static int __init fsmc_nand_probe(struct platform_device *pdev) |
11504 |
+ host->read_dma_chan = dma_request_channel(mask, filter, NULL); |
11505 |
+ if (!host->read_dma_chan) { |
11506 |
+ dev_err(&pdev->dev, "Unable to get read dma channel\n"); |
11507 |
++ ret = -ENODEV; |
11508 |
+ goto disable_clk; |
11509 |
+ } |
11510 |
+ host->write_dma_chan = dma_request_channel(mask, filter, NULL); |
11511 |
+ if (!host->write_dma_chan) { |
11512 |
+ dev_err(&pdev->dev, "Unable to get write dma channel\n"); |
11513 |
++ ret = -ENODEV; |
11514 |
+ goto release_dma_read_chan; |
11515 |
+ } |
11516 |
+ } |
11517 |
+diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c |
11518 |
+index 3fa8c22d3f36a..4d08e4ab5c1b6 100644 |
11519 |
+--- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c |
11520 |
++++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c |
11521 |
+@@ -2449,7 +2449,7 @@ static int gpmi_nand_init(struct gpmi_nand_data *this) |
11522 |
+ this->bch_geometry.auxiliary_size = 128; |
11523 |
+ ret = gpmi_alloc_dma_buffer(this); |
11524 |
+ if (ret) |
11525 |
+- goto err_out; |
11526 |
++ return ret; |
11527 |
+ |
11528 |
+ nand_controller_init(&this->base); |
11529 |
+ this->base.ops = &gpmi_nand_controller_ops; |
11530 |
+diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c |
11531 |
+index 667e4bfe369fc..0d2d4ec476fcf 100644 |
11532 |
+--- a/drivers/mtd/nand/raw/qcom_nandc.c |
11533 |
++++ b/drivers/mtd/nand/raw/qcom_nandc.c |
11534 |
+@@ -2896,7 +2896,7 @@ static int qcom_probe_nand_devices(struct qcom_nand_controller *nandc) |
11535 |
+ struct device *dev = nandc->dev; |
11536 |
+ struct device_node *dn = dev->of_node, *child; |
11537 |
+ struct qcom_nand_host *host; |
11538 |
+- int ret; |
11539 |
++ int ret = -ENODEV; |
11540 |
+ |
11541 |
+ for_each_available_child_of_node(dn, child) { |
11542 |
+ host = devm_kzalloc(dev, sizeof(*host), GFP_KERNEL); |
11543 |
+@@ -2914,10 +2914,7 @@ static int qcom_probe_nand_devices(struct qcom_nand_controller *nandc) |
11544 |
+ list_add_tail(&host->node, &nandc->host_list); |
11545 |
+ } |
11546 |
+ |
11547 |
+- if (list_empty(&nandc->host_list)) |
11548 |
+- return -ENODEV; |
11549 |
+- |
11550 |
+- return 0; |
11551 |
++ return ret; |
11552 |
+ } |
11553 |
+ |
11554 |
+ /* parse custom DT properties here */ |
11555 |
+diff --git a/drivers/net/dsa/mv88e6xxx/devlink.c b/drivers/net/dsa/mv88e6xxx/devlink.c |
11556 |
+index 21953d6d484c5..ada7a38d4d313 100644 |
11557 |
+--- a/drivers/net/dsa/mv88e6xxx/devlink.c |
11558 |
++++ b/drivers/net/dsa/mv88e6xxx/devlink.c |
11559 |
+@@ -678,7 +678,7 @@ static int mv88e6xxx_setup_devlink_regions_global(struct dsa_switch *ds, |
11560 |
+ sizeof(struct mv88e6xxx_devlink_atu_entry); |
11561 |
+ break; |
11562 |
+ case MV88E6XXX_REGION_VTU: |
11563 |
+- size = mv88e6xxx_max_vid(chip) * |
11564 |
++ size = (mv88e6xxx_max_vid(chip) + 1) * |
11565 |
+ sizeof(struct mv88e6xxx_devlink_vtu_entry); |
11566 |
+ break; |
11567 |
+ } |
11568 |
+diff --git a/drivers/net/dsa/mv88e6xxx/serdes.c b/drivers/net/dsa/mv88e6xxx/serdes.c |
11569 |
+index 3195936dc5be7..2ce04fef698de 100644 |
11570 |
+--- a/drivers/net/dsa/mv88e6xxx/serdes.c |
11571 |
++++ b/drivers/net/dsa/mv88e6xxx/serdes.c |
11572 |
+@@ -443,15 +443,15 @@ int mv88e6185_serdes_power(struct mv88e6xxx_chip *chip, int port, u8 lane, |
11573 |
+ u8 mv88e6185_serdes_get_lane(struct mv88e6xxx_chip *chip, int port) |
11574 |
+ { |
11575 |
+ /* There are no configurable serdes lanes on this switch chip but we |
11576 |
+- * need to return non-zero so that callers of |
11577 |
++ * need to return a non-negative lane number so that callers of |
11578 |
+ * mv88e6xxx_serdes_get_lane() know this is a serdes port. |
11579 |
+ */ |
11580 |
+ switch (chip->ports[port].cmode) { |
11581 |
+ case MV88E6185_PORT_STS_CMODE_SERDES: |
11582 |
+ case MV88E6185_PORT_STS_CMODE_1000BASE_X: |
11583 |
+- return 0xff; |
11584 |
+- default: |
11585 |
+ return 0; |
11586 |
++ default: |
11587 |
++ return -ENODEV; |
11588 |
+ } |
11589 |
+ } |
11590 |
+ |
11591 |
+diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt.c b/drivers/net/ethernet/broadcom/bnxt/bnxt.c |
11592 |
+index 80819d8fddb4b..f3c659bc6bb68 100644 |
11593 |
+--- a/drivers/net/ethernet/broadcom/bnxt/bnxt.c |
11594 |
++++ b/drivers/net/ethernet/broadcom/bnxt/bnxt.c |
11595 |
+@@ -1731,14 +1731,16 @@ static int bnxt_rx_pkt(struct bnxt *bp, struct bnxt_cp_ring_info *cpr, |
11596 |
+ |
11597 |
+ cons = rxcmp->rx_cmp_opaque; |
11598 |
+ if (unlikely(cons != rxr->rx_next_cons)) { |
11599 |
+- int rc1 = bnxt_discard_rx(bp, cpr, raw_cons, rxcmp); |
11600 |
++ int rc1 = bnxt_discard_rx(bp, cpr, &tmp_raw_cons, rxcmp); |
11601 |
+ |
11602 |
+ /* 0xffff is forced error, don't print it */ |
11603 |
+ if (rxr->rx_next_cons != 0xffff) |
11604 |
+ netdev_warn(bp->dev, "RX cons %x != expected cons %x\n", |
11605 |
+ cons, rxr->rx_next_cons); |
11606 |
+ bnxt_sched_reset(bp, rxr); |
11607 |
+- return rc1; |
11608 |
++ if (rc1) |
11609 |
++ return rc1; |
11610 |
++ goto next_rx_no_prod_no_len; |
11611 |
+ } |
11612 |
+ rx_buf = &rxr->rx_buf_ring[cons]; |
11613 |
+ data = rx_buf->data; |
11614 |
+@@ -9546,7 +9548,9 @@ static ssize_t bnxt_show_temp(struct device *dev, |
11615 |
+ if (!rc) |
11616 |
+ len = sprintf(buf, "%u\n", resp->temp * 1000); /* display millidegree */ |
11617 |
+ mutex_unlock(&bp->hwrm_cmd_lock); |
11618 |
+- return rc ?: len; |
11619 |
++ if (rc) |
11620 |
++ return rc; |
11621 |
++ return len; |
11622 |
+ } |
11623 |
+ static SENSOR_DEVICE_ATTR(temp1_input, 0444, bnxt_show_temp, NULL, 0); |
11624 |
+ |
11625 |
+diff --git a/drivers/net/ethernet/cavium/liquidio/cn23xx_pf_regs.h b/drivers/net/ethernet/cavium/liquidio/cn23xx_pf_regs.h |
11626 |
+index e6d4ad99cc387..3f1c189646f4e 100644 |
11627 |
+--- a/drivers/net/ethernet/cavium/liquidio/cn23xx_pf_regs.h |
11628 |
++++ b/drivers/net/ethernet/cavium/liquidio/cn23xx_pf_regs.h |
11629 |
+@@ -521,7 +521,7 @@ |
11630 |
+ #define CN23XX_BAR1_INDEX_OFFSET 3 |
11631 |
+ |
11632 |
+ #define CN23XX_PEM_BAR1_INDEX_REG(port, idx) \ |
11633 |
+- (CN23XX_PEM_BAR1_INDEX_START + ((port) << CN23XX_PEM_OFFSET) + \ |
11634 |
++ (CN23XX_PEM_BAR1_INDEX_START + (((u64)port) << CN23XX_PEM_OFFSET) + \ |
11635 |
+ ((idx) << CN23XX_BAR1_INDEX_OFFSET)) |
11636 |
+ |
11637 |
+ /*############################ DPI #########################*/ |
11638 |
+diff --git a/drivers/net/ethernet/cavium/thunder/nicvf_queues.c b/drivers/net/ethernet/cavium/thunder/nicvf_queues.c |
11639 |
+index f782e6af45e93..50bbe79fb93df 100644 |
11640 |
+--- a/drivers/net/ethernet/cavium/thunder/nicvf_queues.c |
11641 |
++++ b/drivers/net/ethernet/cavium/thunder/nicvf_queues.c |
11642 |
+@@ -776,7 +776,7 @@ static void nicvf_rcv_queue_config(struct nicvf *nic, struct queue_set *qs, |
11643 |
+ mbx.rq.msg = NIC_MBOX_MSG_RQ_CFG; |
11644 |
+ mbx.rq.qs_num = qs->vnic_id; |
11645 |
+ mbx.rq.rq_num = qidx; |
11646 |
+- mbx.rq.cfg = (rq->caching << 26) | (rq->cq_qs << 19) | |
11647 |
++ mbx.rq.cfg = ((u64)rq->caching << 26) | (rq->cq_qs << 19) | |
11648 |
+ (rq->cq_idx << 16) | (rq->cont_rbdr_qs << 9) | |
11649 |
+ (rq->cont_qs_rbdr_idx << 8) | |
11650 |
+ (rq->start_rbdr_qs << 1) | (rq->start_qs_rbdr_idx); |
11651 |
+diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_filter.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_filter.c |
11652 |
+index 83b46440408ba..bde8494215c41 100644 |
11653 |
+--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_filter.c |
11654 |
++++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_filter.c |
11655 |
+@@ -174,31 +174,31 @@ static void set_nat_params(struct adapter *adap, struct filter_entry *f, |
11656 |
+ WORD_MASK, f->fs.nat_lip[15] | |
11657 |
+ f->fs.nat_lip[14] << 8 | |
11658 |
+ f->fs.nat_lip[13] << 16 | |
11659 |
+- f->fs.nat_lip[12] << 24, 1); |
11660 |
++ (u64)f->fs.nat_lip[12] << 24, 1); |
11661 |
+ |
11662 |
+ set_tcb_field(adap, f, tid, TCB_SND_UNA_RAW_W + 1, |
11663 |
+ WORD_MASK, f->fs.nat_lip[11] | |
11664 |
+ f->fs.nat_lip[10] << 8 | |
11665 |
+ f->fs.nat_lip[9] << 16 | |
11666 |
+- f->fs.nat_lip[8] << 24, 1); |
11667 |
++ (u64)f->fs.nat_lip[8] << 24, 1); |
11668 |
+ |
11669 |
+ set_tcb_field(adap, f, tid, TCB_SND_UNA_RAW_W + 2, |
11670 |
+ WORD_MASK, f->fs.nat_lip[7] | |
11671 |
+ f->fs.nat_lip[6] << 8 | |
11672 |
+ f->fs.nat_lip[5] << 16 | |
11673 |
+- f->fs.nat_lip[4] << 24, 1); |
11674 |
++ (u64)f->fs.nat_lip[4] << 24, 1); |
11675 |
+ |
11676 |
+ set_tcb_field(adap, f, tid, TCB_SND_UNA_RAW_W + 3, |
11677 |
+ WORD_MASK, f->fs.nat_lip[3] | |
11678 |
+ f->fs.nat_lip[2] << 8 | |
11679 |
+ f->fs.nat_lip[1] << 16 | |
11680 |
+- f->fs.nat_lip[0] << 24, 1); |
11681 |
++ (u64)f->fs.nat_lip[0] << 24, 1); |
11682 |
+ } else { |
11683 |
+ set_tcb_field(adap, f, tid, TCB_RX_FRAG3_LEN_RAW_W, |
11684 |
+ WORD_MASK, f->fs.nat_lip[3] | |
11685 |
+ f->fs.nat_lip[2] << 8 | |
11686 |
+ f->fs.nat_lip[1] << 16 | |
11687 |
+- f->fs.nat_lip[0] << 24, 1); |
11688 |
++ (u64)f->fs.nat_lip[0] << 25, 1); |
11689 |
+ } |
11690 |
+ } |
11691 |
+ |
11692 |
+@@ -208,25 +208,25 @@ static void set_nat_params(struct adapter *adap, struct filter_entry *f, |
11693 |
+ WORD_MASK, f->fs.nat_fip[15] | |
11694 |
+ f->fs.nat_fip[14] << 8 | |
11695 |
+ f->fs.nat_fip[13] << 16 | |
11696 |
+- f->fs.nat_fip[12] << 24, 1); |
11697 |
++ (u64)f->fs.nat_fip[12] << 24, 1); |
11698 |
+ |
11699 |
+ set_tcb_field(adap, f, tid, TCB_RX_FRAG2_PTR_RAW_W + 1, |
11700 |
+ WORD_MASK, f->fs.nat_fip[11] | |
11701 |
+ f->fs.nat_fip[10] << 8 | |
11702 |
+ f->fs.nat_fip[9] << 16 | |
11703 |
+- f->fs.nat_fip[8] << 24, 1); |
11704 |
++ (u64)f->fs.nat_fip[8] << 24, 1); |
11705 |
+ |
11706 |
+ set_tcb_field(adap, f, tid, TCB_RX_FRAG2_PTR_RAW_W + 2, |
11707 |
+ WORD_MASK, f->fs.nat_fip[7] | |
11708 |
+ f->fs.nat_fip[6] << 8 | |
11709 |
+ f->fs.nat_fip[5] << 16 | |
11710 |
+- f->fs.nat_fip[4] << 24, 1); |
11711 |
++ (u64)f->fs.nat_fip[4] << 24, 1); |
11712 |
+ |
11713 |
+ set_tcb_field(adap, f, tid, TCB_RX_FRAG2_PTR_RAW_W + 3, |
11714 |
+ WORD_MASK, f->fs.nat_fip[3] | |
11715 |
+ f->fs.nat_fip[2] << 8 | |
11716 |
+ f->fs.nat_fip[1] << 16 | |
11717 |
+- f->fs.nat_fip[0] << 24, 1); |
11718 |
++ (u64)f->fs.nat_fip[0] << 24, 1); |
11719 |
+ |
11720 |
+ } else { |
11721 |
+ set_tcb_field(adap, f, tid, |
11722 |
+@@ -234,13 +234,13 @@ static void set_nat_params(struct adapter *adap, struct filter_entry *f, |
11723 |
+ WORD_MASK, f->fs.nat_fip[3] | |
11724 |
+ f->fs.nat_fip[2] << 8 | |
11725 |
+ f->fs.nat_fip[1] << 16 | |
11726 |
+- f->fs.nat_fip[0] << 24, 1); |
11727 |
++ (u64)f->fs.nat_fip[0] << 24, 1); |
11728 |
+ } |
11729 |
+ } |
11730 |
+ |
11731 |
+ set_tcb_field(adap, f, tid, TCB_PDU_HDR_LEN_W, WORD_MASK, |
11732 |
+ (dp ? (nat_lp[1] | nat_lp[0] << 8) : 0) | |
11733 |
+- (sp ? (nat_fp[1] << 16 | nat_fp[0] << 24) : 0), |
11734 |
++ (sp ? (nat_fp[1] << 16 | (u64)nat_fp[0] << 24) : 0), |
11735 |
+ 1); |
11736 |
+ } |
11737 |
+ |
11738 |
+diff --git a/drivers/net/ethernet/freescale/Makefile b/drivers/net/ethernet/freescale/Makefile |
11739 |
+index 67c436400352f..de7b318422330 100644 |
11740 |
+--- a/drivers/net/ethernet/freescale/Makefile |
11741 |
++++ b/drivers/net/ethernet/freescale/Makefile |
11742 |
+@@ -24,6 +24,4 @@ obj-$(CONFIG_FSL_DPAA_ETH) += dpaa/ |
11743 |
+ |
11744 |
+ obj-$(CONFIG_FSL_DPAA2_ETH) += dpaa2/ |
11745 |
+ |
11746 |
+-obj-$(CONFIG_FSL_ENETC) += enetc/ |
11747 |
+-obj-$(CONFIG_FSL_ENETC_MDIO) += enetc/ |
11748 |
+-obj-$(CONFIG_FSL_ENETC_VF) += enetc/ |
11749 |
++obj-y += enetc/ |
11750 |
+diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c |
11751 |
+index 405e490334178..c8a43a725ebcc 100644 |
11752 |
+--- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c |
11753 |
++++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c |
11754 |
+@@ -3709,7 +3709,6 @@ static void hns3_nic_set_cpumask(struct hns3_nic_priv *priv) |
11755 |
+ |
11756 |
+ static int hns3_nic_init_vector_data(struct hns3_nic_priv *priv) |
11757 |
+ { |
11758 |
+- struct hnae3_ring_chain_node vector_ring_chain; |
11759 |
+ struct hnae3_handle *h = priv->ae_handle; |
11760 |
+ struct hns3_enet_tqp_vector *tqp_vector; |
11761 |
+ int ret; |
11762 |
+@@ -3741,6 +3740,8 @@ static int hns3_nic_init_vector_data(struct hns3_nic_priv *priv) |
11763 |
+ } |
11764 |
+ |
11765 |
+ for (i = 0; i < priv->vector_num; i++) { |
11766 |
++ struct hnae3_ring_chain_node vector_ring_chain; |
11767 |
++ |
11768 |
+ tqp_vector = &priv->tqp_vector[i]; |
11769 |
+ |
11770 |
+ tqp_vector->rx_group.total_bytes = 0; |
11771 |
+diff --git a/drivers/net/ethernet/marvell/prestera/prestera_main.c b/drivers/net/ethernet/marvell/prestera/prestera_main.c |
11772 |
+index 25dd903a3e92c..d849b0f65de2d 100644 |
11773 |
+--- a/drivers/net/ethernet/marvell/prestera/prestera_main.c |
11774 |
++++ b/drivers/net/ethernet/marvell/prestera/prestera_main.c |
11775 |
+@@ -431,7 +431,8 @@ static void prestera_port_handle_event(struct prestera_switch *sw, |
11776 |
+ netif_carrier_on(port->dev); |
11777 |
+ if (!delayed_work_pending(caching_dw)) |
11778 |
+ queue_delayed_work(prestera_wq, caching_dw, 0); |
11779 |
+- } else { |
11780 |
++ } else if (netif_running(port->dev) && |
11781 |
++ netif_carrier_ok(port->dev)) { |
11782 |
+ netif_carrier_off(port->dev); |
11783 |
+ if (delayed_work_pending(caching_dw)) |
11784 |
+ cancel_delayed_work(caching_dw); |
11785 |
+diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.c b/drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.c |
11786 |
+index 22bee49902327..bb61f52d782d9 100644 |
11787 |
+--- a/drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.c |
11788 |
++++ b/drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.c |
11789 |
+@@ -850,7 +850,7 @@ mlx5_fpga_ipsec_release_sa_ctx(struct mlx5_fpga_ipsec_sa_ctx *sa_ctx) |
11790 |
+ return; |
11791 |
+ } |
11792 |
+ |
11793 |
+- if (sa_ctx->fpga_xfrm->accel_xfrm.attrs.action & |
11794 |
++ if (sa_ctx->fpga_xfrm->accel_xfrm.attrs.action == |
11795 |
+ MLX5_ACCEL_ESP_ACTION_DECRYPT) |
11796 |
+ ida_simple_remove(&fipsec->halloc, sa_ctx->sa_handle); |
11797 |
+ |
11798 |
+diff --git a/drivers/net/ethernet/netronome/nfp/nfp_devlink.c b/drivers/net/ethernet/netronome/nfp/nfp_devlink.c |
11799 |
+index 713ee3041d491..bea978df77138 100644 |
11800 |
+--- a/drivers/net/ethernet/netronome/nfp/nfp_devlink.c |
11801 |
++++ b/drivers/net/ethernet/netronome/nfp/nfp_devlink.c |
11802 |
+@@ -364,6 +364,7 @@ int nfp_devlink_port_register(struct nfp_app *app, struct nfp_port *port) |
11803 |
+ |
11804 |
+ attrs.split = eth_port.is_split; |
11805 |
+ attrs.splittable = !attrs.split; |
11806 |
++ attrs.lanes = eth_port.port_lanes; |
11807 |
+ attrs.flavour = DEVLINK_PORT_FLAVOUR_PHYSICAL; |
11808 |
+ attrs.phys.port_number = eth_port.label_port; |
11809 |
+ attrs.phys.split_subport_number = eth_port.label_subport; |
11810 |
+diff --git a/drivers/net/ethernet/qualcomm/emac/emac-mac.c b/drivers/net/ethernet/qualcomm/emac/emac-mac.c |
11811 |
+index 117188e3c7de2..87b8c032195d0 100644 |
11812 |
+--- a/drivers/net/ethernet/qualcomm/emac/emac-mac.c |
11813 |
++++ b/drivers/net/ethernet/qualcomm/emac/emac-mac.c |
11814 |
+@@ -1437,6 +1437,7 @@ netdev_tx_t emac_mac_tx_buf_send(struct emac_adapter *adpt, |
11815 |
+ { |
11816 |
+ struct emac_tpd tpd; |
11817 |
+ u32 prod_idx; |
11818 |
++ int len; |
11819 |
+ |
11820 |
+ memset(&tpd, 0, sizeof(tpd)); |
11821 |
+ |
11822 |
+@@ -1456,9 +1457,10 @@ netdev_tx_t emac_mac_tx_buf_send(struct emac_adapter *adpt, |
11823 |
+ if (skb_network_offset(skb) != ETH_HLEN) |
11824 |
+ TPD_TYP_SET(&tpd, 1); |
11825 |
+ |
11826 |
++ len = skb->len; |
11827 |
+ emac_tx_fill_tpd(adpt, tx_q, skb, &tpd); |
11828 |
+ |
11829 |
+- netdev_sent_queue(adpt->netdev, skb->len); |
11830 |
++ netdev_sent_queue(adpt->netdev, len); |
11831 |
+ |
11832 |
+ /* Make sure the are enough free descriptors to hold one |
11833 |
+ * maximum-sized SKB. We need one desc for each fragment, |
11834 |
+diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c |
11835 |
+index bd30505fbc57a..f96eed67e1a2b 100644 |
11836 |
+--- a/drivers/net/ethernet/renesas/ravb_main.c |
11837 |
++++ b/drivers/net/ethernet/renesas/ravb_main.c |
11838 |
+@@ -911,31 +911,20 @@ static int ravb_poll(struct napi_struct *napi, int budget) |
11839 |
+ int q = napi - priv->napi; |
11840 |
+ int mask = BIT(q); |
11841 |
+ int quota = budget; |
11842 |
+- u32 ris0, tis; |
11843 |
+ |
11844 |
+- for (;;) { |
11845 |
+- tis = ravb_read(ndev, TIS); |
11846 |
+- ris0 = ravb_read(ndev, RIS0); |
11847 |
+- if (!((ris0 & mask) || (tis & mask))) |
11848 |
+- break; |
11849 |
++ /* Processing RX Descriptor Ring */ |
11850 |
++ /* Clear RX interrupt */ |
11851 |
++ ravb_write(ndev, ~(mask | RIS0_RESERVED), RIS0); |
11852 |
++ if (ravb_rx(ndev, "a, q)) |
11853 |
++ goto out; |
11854 |
+ |
11855 |
+- /* Processing RX Descriptor Ring */ |
11856 |
+- if (ris0 & mask) { |
11857 |
+- /* Clear RX interrupt */ |
11858 |
+- ravb_write(ndev, ~(mask | RIS0_RESERVED), RIS0); |
11859 |
+- if (ravb_rx(ndev, "a, q)) |
11860 |
+- goto out; |
11861 |
+- } |
11862 |
+- /* Processing TX Descriptor Ring */ |
11863 |
+- if (tis & mask) { |
11864 |
+- spin_lock_irqsave(&priv->lock, flags); |
11865 |
+- /* Clear TX interrupt */ |
11866 |
+- ravb_write(ndev, ~(mask | TIS_RESERVED), TIS); |
11867 |
+- ravb_tx_free(ndev, q, true); |
11868 |
+- netif_wake_subqueue(ndev, q); |
11869 |
+- spin_unlock_irqrestore(&priv->lock, flags); |
11870 |
+- } |
11871 |
+- } |
11872 |
++ /* Processing RX Descriptor Ring */ |
11873 |
++ spin_lock_irqsave(&priv->lock, flags); |
11874 |
++ /* Clear TX interrupt */ |
11875 |
++ ravb_write(ndev, ~(mask | TIS_RESERVED), TIS); |
11876 |
++ ravb_tx_free(ndev, q, true); |
11877 |
++ netif_wake_subqueue(ndev, q); |
11878 |
++ spin_unlock_irqrestore(&priv->lock, flags); |
11879 |
+ |
11880 |
+ napi_complete(napi); |
11881 |
+ |
11882 |
+diff --git a/drivers/net/ethernet/sfc/ef10.c b/drivers/net/ethernet/sfc/ef10.c |
11883 |
+index da6886dcac37c..4fa72b573c172 100644 |
11884 |
+--- a/drivers/net/ethernet/sfc/ef10.c |
11885 |
++++ b/drivers/net/ethernet/sfc/ef10.c |
11886 |
+@@ -2928,8 +2928,7 @@ efx_ef10_handle_tx_event(struct efx_channel *channel, efx_qword_t *event) |
11887 |
+ |
11888 |
+ /* Get the transmit queue */ |
11889 |
+ tx_ev_q_label = EFX_QWORD_FIELD(*event, ESF_DZ_TX_QLABEL); |
11890 |
+- tx_queue = efx_channel_get_tx_queue(channel, |
11891 |
+- tx_ev_q_label % EFX_MAX_TXQ_PER_CHANNEL); |
11892 |
++ tx_queue = channel->tx_queue + (tx_ev_q_label % EFX_MAX_TXQ_PER_CHANNEL); |
11893 |
+ |
11894 |
+ if (!tx_queue->timestamping) { |
11895 |
+ /* Transmit completion */ |
11896 |
+diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c |
11897 |
+index 4749bd0af1607..c6f24abf64328 100644 |
11898 |
+--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c |
11899 |
++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c |
11900 |
+@@ -2757,8 +2757,15 @@ static int stmmac_hw_setup(struct net_device *dev, bool init_ptp) |
11901 |
+ |
11902 |
+ /* Enable TSO */ |
11903 |
+ if (priv->tso) { |
11904 |
+- for (chan = 0; chan < tx_cnt; chan++) |
11905 |
++ for (chan = 0; chan < tx_cnt; chan++) { |
11906 |
++ struct stmmac_tx_queue *tx_q = &priv->tx_queue[chan]; |
11907 |
++ |
11908 |
++ /* TSO and TBS cannot co-exist */ |
11909 |
++ if (tx_q->tbs & STMMAC_TBS_AVAIL) |
11910 |
++ continue; |
11911 |
++ |
11912 |
+ stmmac_enable_tso(priv, priv->ioaddr, 1, chan); |
11913 |
++ } |
11914 |
+ } |
11915 |
+ |
11916 |
+ /* Enable Split Header */ |
11917 |
+@@ -2850,9 +2857,8 @@ static int stmmac_open(struct net_device *dev) |
11918 |
+ struct stmmac_tx_queue *tx_q = &priv->tx_queue[chan]; |
11919 |
+ int tbs_en = priv->plat->tx_queues_cfg[chan].tbs_en; |
11920 |
+ |
11921 |
++ /* Setup per-TXQ tbs flag before TX descriptor alloc */ |
11922 |
+ tx_q->tbs |= tbs_en ? STMMAC_TBS_AVAIL : 0; |
11923 |
+- if (stmmac_enable_tbs(priv, priv->ioaddr, tbs_en, chan)) |
11924 |
+- tx_q->tbs &= ~STMMAC_TBS_AVAIL; |
11925 |
+ } |
11926 |
+ |
11927 |
+ ret = alloc_dma_desc_resources(priv); |
11928 |
+diff --git a/drivers/net/ethernet/ti/davinci_emac.c b/drivers/net/ethernet/ti/davinci_emac.c |
11929 |
+index c7031e1960d4a..03055c96f0760 100644 |
11930 |
+--- a/drivers/net/ethernet/ti/davinci_emac.c |
11931 |
++++ b/drivers/net/ethernet/ti/davinci_emac.c |
11932 |
+@@ -169,11 +169,11 @@ static const char emac_version_string[] = "TI DaVinci EMAC Linux v6.1"; |
11933 |
+ /* EMAC mac_status register */ |
11934 |
+ #define EMAC_MACSTATUS_TXERRCODE_MASK (0xF00000) |
11935 |
+ #define EMAC_MACSTATUS_TXERRCODE_SHIFT (20) |
11936 |
+-#define EMAC_MACSTATUS_TXERRCH_MASK (0x7) |
11937 |
++#define EMAC_MACSTATUS_TXERRCH_MASK (0x70000) |
11938 |
+ #define EMAC_MACSTATUS_TXERRCH_SHIFT (16) |
11939 |
+ #define EMAC_MACSTATUS_RXERRCODE_MASK (0xF000) |
11940 |
+ #define EMAC_MACSTATUS_RXERRCODE_SHIFT (12) |
11941 |
+-#define EMAC_MACSTATUS_RXERRCH_MASK (0x7) |
11942 |
++#define EMAC_MACSTATUS_RXERRCH_MASK (0x700) |
11943 |
+ #define EMAC_MACSTATUS_RXERRCH_SHIFT (8) |
11944 |
+ |
11945 |
+ /* EMAC RX register masks */ |
11946 |
+diff --git a/drivers/net/ethernet/xscale/ixp4xx_eth.c b/drivers/net/ethernet/xscale/ixp4xx_eth.c |
11947 |
+index 2e52029235104..403358f2c8536 100644 |
11948 |
+--- a/drivers/net/ethernet/xscale/ixp4xx_eth.c |
11949 |
++++ b/drivers/net/ethernet/xscale/ixp4xx_eth.c |
11950 |
+@@ -1086,7 +1086,7 @@ static int init_queues(struct port *port) |
11951 |
+ int i; |
11952 |
+ |
11953 |
+ if (!ports_open) { |
11954 |
+- dma_pool = dma_pool_create(DRV_NAME, port->netdev->dev.parent, |
11955 |
++ dma_pool = dma_pool_create(DRV_NAME, &port->netdev->dev, |
11956 |
+ POOL_ALLOC_SIZE, 32, 0); |
11957 |
+ if (!dma_pool) |
11958 |
+ return -ENOMEM; |
11959 |
+@@ -1436,6 +1436,9 @@ static int ixp4xx_eth_probe(struct platform_device *pdev) |
11960 |
+ ndev->netdev_ops = &ixp4xx_netdev_ops; |
11961 |
+ ndev->ethtool_ops = &ixp4xx_ethtool_ops; |
11962 |
+ ndev->tx_queue_len = 100; |
11963 |
++ /* Inherit the DMA masks from the platform device */ |
11964 |
++ ndev->dev.dma_mask = dev->dma_mask; |
11965 |
++ ndev->dev.coherent_dma_mask = dev->coherent_dma_mask; |
11966 |
+ |
11967 |
+ netif_napi_add(ndev, &port->napi, eth_poll, NAPI_WEIGHT); |
11968 |
+ |
11969 |
+diff --git a/drivers/net/fddi/Kconfig b/drivers/net/fddi/Kconfig |
11970 |
+index f722079dfb6ae..f99c1048c97e3 100644 |
11971 |
+--- a/drivers/net/fddi/Kconfig |
11972 |
++++ b/drivers/net/fddi/Kconfig |
11973 |
+@@ -40,17 +40,20 @@ config DEFXX |
11974 |
+ |
11975 |
+ config DEFXX_MMIO |
11976 |
+ bool |
11977 |
+- prompt "Use MMIO instead of PIO" if PCI || EISA |
11978 |
++ prompt "Use MMIO instead of IOP" if PCI || EISA |
11979 |
+ depends on DEFXX |
11980 |
+- default n if PCI || EISA |
11981 |
++ default n if EISA |
11982 |
+ default y |
11983 |
+ help |
11984 |
+ This instructs the driver to use EISA or PCI memory-mapped I/O |
11985 |
+- (MMIO) as appropriate instead of programmed I/O ports (PIO). |
11986 |
++ (MMIO) as appropriate instead of programmed I/O ports (IOP). |
11987 |
+ Enabling this gives an improvement in processing time in parts |
11988 |
+- of the driver, but it may cause problems with EISA (DEFEA) |
11989 |
+- adapters. TURBOchannel does not have the concept of I/O ports, |
11990 |
+- so MMIO is always used for these (DEFTA) adapters. |
11991 |
++ of the driver, but it requires a memory window to be configured |
11992 |
++ for EISA (DEFEA) adapters that may not always be available. |
11993 |
++ Conversely some PCIe host bridges do not support IOP, so MMIO |
11994 |
++ may be required to access PCI (DEFPA) adapters on downstream PCI |
11995 |
++ buses with some systems. TURBOchannel does not have the concept |
11996 |
++ of I/O ports, so MMIO is always used for these (DEFTA) adapters. |
11997 |
+ |
11998 |
+ If unsure, say N. |
11999 |
+ |
12000 |
+diff --git a/drivers/net/fddi/defxx.c b/drivers/net/fddi/defxx.c |
12001 |
+index 077c68498f048..c7ce6d5491afc 100644 |
12002 |
+--- a/drivers/net/fddi/defxx.c |
12003 |
++++ b/drivers/net/fddi/defxx.c |
12004 |
+@@ -495,6 +495,25 @@ static const struct net_device_ops dfx_netdev_ops = { |
12005 |
+ .ndo_set_mac_address = dfx_ctl_set_mac_address, |
12006 |
+ }; |
12007 |
+ |
12008 |
++static void dfx_register_res_alloc_err(const char *print_name, bool mmio, |
12009 |
++ bool eisa) |
12010 |
++{ |
12011 |
++ pr_err("%s: Cannot use %s, no address set, aborting\n", |
12012 |
++ print_name, mmio ? "MMIO" : "I/O"); |
12013 |
++ pr_err("%s: Recompile driver with \"CONFIG_DEFXX_MMIO=%c\"\n", |
12014 |
++ print_name, mmio ? 'n' : 'y'); |
12015 |
++ if (eisa && mmio) |
12016 |
++ pr_err("%s: Or run ECU and set adapter's MMIO location\n", |
12017 |
++ print_name); |
12018 |
++} |
12019 |
++ |
12020 |
++static void dfx_register_res_err(const char *print_name, bool mmio, |
12021 |
++ unsigned long start, unsigned long len) |
12022 |
++{ |
12023 |
++ pr_err("%s: Cannot reserve %s resource 0x%lx @ 0x%lx, aborting\n", |
12024 |
++ print_name, mmio ? "MMIO" : "I/O", len, start); |
12025 |
++} |
12026 |
++ |
12027 |
+ /* |
12028 |
+ * ================ |
12029 |
+ * = dfx_register = |
12030 |
+@@ -568,15 +587,12 @@ static int dfx_register(struct device *bdev) |
12031 |
+ dev_set_drvdata(bdev, dev); |
12032 |
+ |
12033 |
+ dfx_get_bars(bdev, bar_start, bar_len); |
12034 |
+- if (dfx_bus_eisa && dfx_use_mmio && bar_start[0] == 0) { |
12035 |
+- pr_err("%s: Cannot use MMIO, no address set, aborting\n", |
12036 |
+- print_name); |
12037 |
+- pr_err("%s: Run ECU and set adapter's MMIO location\n", |
12038 |
+- print_name); |
12039 |
+- pr_err("%s: Or recompile driver with \"CONFIG_DEFXX_MMIO=n\"" |
12040 |
+- "\n", print_name); |
12041 |
++ if (bar_len[0] == 0 || |
12042 |
++ (dfx_bus_eisa && dfx_use_mmio && bar_start[0] == 0)) { |
12043 |
++ dfx_register_res_alloc_err(print_name, dfx_use_mmio, |
12044 |
++ dfx_bus_eisa); |
12045 |
+ err = -ENXIO; |
12046 |
+- goto err_out; |
12047 |
++ goto err_out_disable; |
12048 |
+ } |
12049 |
+ |
12050 |
+ if (dfx_use_mmio) |
12051 |
+@@ -585,18 +601,16 @@ static int dfx_register(struct device *bdev) |
12052 |
+ else |
12053 |
+ region = request_region(bar_start[0], bar_len[0], print_name); |
12054 |
+ if (!region) { |
12055 |
+- pr_err("%s: Cannot reserve %s resource 0x%lx @ 0x%lx, " |
12056 |
+- "aborting\n", dfx_use_mmio ? "MMIO" : "I/O", print_name, |
12057 |
+- (long)bar_len[0], (long)bar_start[0]); |
12058 |
++ dfx_register_res_err(print_name, dfx_use_mmio, |
12059 |
++ bar_start[0], bar_len[0]); |
12060 |
+ err = -EBUSY; |
12061 |
+ goto err_out_disable; |
12062 |
+ } |
12063 |
+ if (bar_start[1] != 0) { |
12064 |
+ region = request_region(bar_start[1], bar_len[1], print_name); |
12065 |
+ if (!region) { |
12066 |
+- pr_err("%s: Cannot reserve I/O resource " |
12067 |
+- "0x%lx @ 0x%lx, aborting\n", print_name, |
12068 |
+- (long)bar_len[1], (long)bar_start[1]); |
12069 |
++ dfx_register_res_err(print_name, 0, |
12070 |
++ bar_start[1], bar_len[1]); |
12071 |
+ err = -EBUSY; |
12072 |
+ goto err_out_csr_region; |
12073 |
+ } |
12074 |
+@@ -604,9 +618,8 @@ static int dfx_register(struct device *bdev) |
12075 |
+ if (bar_start[2] != 0) { |
12076 |
+ region = request_region(bar_start[2], bar_len[2], print_name); |
12077 |
+ if (!region) { |
12078 |
+- pr_err("%s: Cannot reserve I/O resource " |
12079 |
+- "0x%lx @ 0x%lx, aborting\n", print_name, |
12080 |
+- (long)bar_len[2], (long)bar_start[2]); |
12081 |
++ dfx_register_res_err(print_name, 0, |
12082 |
++ bar_start[2], bar_len[2]); |
12083 |
+ err = -EBUSY; |
12084 |
+ goto err_out_bh_region; |
12085 |
+ } |
12086 |
+diff --git a/drivers/net/geneve.c b/drivers/net/geneve.c |
12087 |
+index 040edc6fc5609..0d8eb4a1dc2f3 100644 |
12088 |
+--- a/drivers/net/geneve.c |
12089 |
++++ b/drivers/net/geneve.c |
12090 |
+@@ -891,7 +891,7 @@ static int geneve_xmit_skb(struct sk_buff *skb, struct net_device *dev, |
12091 |
+ __be16 sport; |
12092 |
+ int err; |
12093 |
+ |
12094 |
+- if (!pskb_network_may_pull(skb, sizeof(struct iphdr))) |
12095 |
++ if (!pskb_inet_may_pull(skb)) |
12096 |
+ return -EINVAL; |
12097 |
+ |
12098 |
+ sport = udp_flow_src_port(geneve->net, skb, 1, USHRT_MAX, true); |
12099 |
+@@ -988,7 +988,7 @@ static int geneve6_xmit_skb(struct sk_buff *skb, struct net_device *dev, |
12100 |
+ __be16 sport; |
12101 |
+ int err; |
12102 |
+ |
12103 |
+- if (!pskb_network_may_pull(skb, sizeof(struct ipv6hdr))) |
12104 |
++ if (!pskb_inet_may_pull(skb)) |
12105 |
+ return -EINVAL; |
12106 |
+ |
12107 |
+ sport = udp_flow_src_port(geneve->net, skb, 1, USHRT_MAX, true); |
12108 |
+diff --git a/drivers/net/phy/intel-xway.c b/drivers/net/phy/intel-xway.c |
12109 |
+index 6eac50d4b42fc..d453ec0161688 100644 |
12110 |
+--- a/drivers/net/phy/intel-xway.c |
12111 |
++++ b/drivers/net/phy/intel-xway.c |
12112 |
+@@ -11,6 +11,18 @@ |
12113 |
+ |
12114 |
+ #define XWAY_MDIO_IMASK 0x19 /* interrupt mask */ |
12115 |
+ #define XWAY_MDIO_ISTAT 0x1A /* interrupt status */ |
12116 |
++#define XWAY_MDIO_LED 0x1B /* led control */ |
12117 |
++ |
12118 |
++/* bit 15:12 are reserved */ |
12119 |
++#define XWAY_MDIO_LED_LED3_EN BIT(11) /* Enable the integrated function of LED3 */ |
12120 |
++#define XWAY_MDIO_LED_LED2_EN BIT(10) /* Enable the integrated function of LED2 */ |
12121 |
++#define XWAY_MDIO_LED_LED1_EN BIT(9) /* Enable the integrated function of LED1 */ |
12122 |
++#define XWAY_MDIO_LED_LED0_EN BIT(8) /* Enable the integrated function of LED0 */ |
12123 |
++/* bit 7:4 are reserved */ |
12124 |
++#define XWAY_MDIO_LED_LED3_DA BIT(3) /* Direct Access to LED3 */ |
12125 |
++#define XWAY_MDIO_LED_LED2_DA BIT(2) /* Direct Access to LED2 */ |
12126 |
++#define XWAY_MDIO_LED_LED1_DA BIT(1) /* Direct Access to LED1 */ |
12127 |
++#define XWAY_MDIO_LED_LED0_DA BIT(0) /* Direct Access to LED0 */ |
12128 |
+ |
12129 |
+ #define XWAY_MDIO_INIT_WOL BIT(15) /* Wake-On-LAN */ |
12130 |
+ #define XWAY_MDIO_INIT_MSRE BIT(14) |
12131 |
+@@ -159,6 +171,15 @@ static int xway_gphy_config_init(struct phy_device *phydev) |
12132 |
+ /* Clear all pending interrupts */ |
12133 |
+ phy_read(phydev, XWAY_MDIO_ISTAT); |
12134 |
+ |
12135 |
++ /* Ensure that integrated led function is enabled for all leds */ |
12136 |
++ err = phy_write(phydev, XWAY_MDIO_LED, |
12137 |
++ XWAY_MDIO_LED_LED0_EN | |
12138 |
++ XWAY_MDIO_LED_LED1_EN | |
12139 |
++ XWAY_MDIO_LED_LED2_EN | |
12140 |
++ XWAY_MDIO_LED_LED3_EN); |
12141 |
++ if (err) |
12142 |
++ return err; |
12143 |
++ |
12144 |
+ phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LEDCH, |
12145 |
+ XWAY_MMD_LEDCH_NACS_NONE | |
12146 |
+ XWAY_MMD_LEDCH_SBF_F02HZ | |
12147 |
+diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c |
12148 |
+index 163767abceea9..47e5200eb039f 100644 |
12149 |
+--- a/drivers/net/phy/marvell.c |
12150 |
++++ b/drivers/net/phy/marvell.c |
12151 |
+@@ -964,22 +964,28 @@ static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data) |
12152 |
+ |
12153 |
+ static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt) |
12154 |
+ { |
12155 |
+- int val; |
12156 |
++ int val, err; |
12157 |
+ |
12158 |
+ if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX) |
12159 |
+ return -E2BIG; |
12160 |
+ |
12161 |
+- if (!cnt) |
12162 |
+- return phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR, |
12163 |
+- MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN); |
12164 |
++ if (!cnt) { |
12165 |
++ err = phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR, |
12166 |
++ MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN); |
12167 |
++ } else { |
12168 |
++ val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN; |
12169 |
++ val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1); |
12170 |
+ |
12171 |
+- val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN; |
12172 |
+- val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1); |
12173 |
++ err = phy_modify(phydev, MII_M1111_PHY_EXT_CR, |
12174 |
++ MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN | |
12175 |
++ MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, |
12176 |
++ val); |
12177 |
++ } |
12178 |
+ |
12179 |
+- return phy_modify(phydev, MII_M1111_PHY_EXT_CR, |
12180 |
+- MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN | |
12181 |
+- MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, |
12182 |
+- val); |
12183 |
++ if (err < 0) |
12184 |
++ return err; |
12185 |
++ |
12186 |
++ return genphy_soft_reset(phydev); |
12187 |
+ } |
12188 |
+ |
12189 |
+ static int m88e1111_get_tunable(struct phy_device *phydev, |
12190 |
+@@ -1022,22 +1028,28 @@ static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data) |
12191 |
+ |
12192 |
+ static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt) |
12193 |
+ { |
12194 |
+- int val; |
12195 |
++ int val, err; |
12196 |
+ |
12197 |
+ if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX) |
12198 |
+ return -E2BIG; |
12199 |
+ |
12200 |
+- if (!cnt) |
12201 |
+- return phy_clear_bits(phydev, MII_M1011_PHY_SCR, |
12202 |
+- MII_M1011_PHY_SCR_DOWNSHIFT_EN); |
12203 |
++ if (!cnt) { |
12204 |
++ err = phy_clear_bits(phydev, MII_M1011_PHY_SCR, |
12205 |
++ MII_M1011_PHY_SCR_DOWNSHIFT_EN); |
12206 |
++ } else { |
12207 |
++ val = MII_M1011_PHY_SCR_DOWNSHIFT_EN; |
12208 |
++ val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1); |
12209 |
+ |
12210 |
+- val = MII_M1011_PHY_SCR_DOWNSHIFT_EN; |
12211 |
+- val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1); |
12212 |
++ err = phy_modify(phydev, MII_M1011_PHY_SCR, |
12213 |
++ MII_M1011_PHY_SCR_DOWNSHIFT_EN | |
12214 |
++ MII_M1011_PHY_SCR_DOWNSHIFT_MASK, |
12215 |
++ val); |
12216 |
++ } |
12217 |
+ |
12218 |
+- return phy_modify(phydev, MII_M1011_PHY_SCR, |
12219 |
+- MII_M1011_PHY_SCR_DOWNSHIFT_EN | |
12220 |
+- MII_M1011_PHY_SCR_DOWNSHIFT_MASK, |
12221 |
+- val); |
12222 |
++ if (err < 0) |
12223 |
++ return err; |
12224 |
++ |
12225 |
++ return genphy_soft_reset(phydev); |
12226 |
+ } |
12227 |
+ |
12228 |
+ static int m88e1011_get_tunable(struct phy_device *phydev, |
12229 |
+diff --git a/drivers/net/phy/smsc.c b/drivers/net/phy/smsc.c |
12230 |
+index ddb78fb4d6dc3..d8cac02a79b95 100644 |
12231 |
+--- a/drivers/net/phy/smsc.c |
12232 |
++++ b/drivers/net/phy/smsc.c |
12233 |
+@@ -185,10 +185,13 @@ static int lan87xx_config_aneg(struct phy_device *phydev) |
12234 |
+ return genphy_config_aneg(phydev); |
12235 |
+ } |
12236 |
+ |
12237 |
+-static int lan87xx_config_aneg_ext(struct phy_device *phydev) |
12238 |
++static int lan95xx_config_aneg_ext(struct phy_device *phydev) |
12239 |
+ { |
12240 |
+ int rc; |
12241 |
+ |
12242 |
++ if (phydev->phy_id != 0x0007c0f0) /* not (LAN9500A or LAN9505A) */ |
12243 |
++ return lan87xx_config_aneg(phydev); |
12244 |
++ |
12245 |
+ /* Extend Manual AutoMDIX timer */ |
12246 |
+ rc = phy_read(phydev, PHY_EDPD_CONFIG); |
12247 |
+ if (rc < 0) |
12248 |
+@@ -441,7 +444,7 @@ static struct phy_driver smsc_phy_driver[] = { |
12249 |
+ .read_status = lan87xx_read_status, |
12250 |
+ .config_init = smsc_phy_config_init, |
12251 |
+ .soft_reset = smsc_phy_reset, |
12252 |
+- .config_aneg = lan87xx_config_aneg_ext, |
12253 |
++ .config_aneg = lan95xx_config_aneg_ext, |
12254 |
+ |
12255 |
+ /* IRQ related */ |
12256 |
+ .config_intr = smsc_phy_config_intr, |
12257 |
+diff --git a/drivers/net/wan/hdlc_fr.c b/drivers/net/wan/hdlc_fr.c |
12258 |
+index 4d9dc7d159089..0720f5f92caa7 100644 |
12259 |
+--- a/drivers/net/wan/hdlc_fr.c |
12260 |
++++ b/drivers/net/wan/hdlc_fr.c |
12261 |
+@@ -415,7 +415,7 @@ static netdev_tx_t pvc_xmit(struct sk_buff *skb, struct net_device *dev) |
12262 |
+ |
12263 |
+ if (pad > 0) { /* Pad the frame with zeros */ |
12264 |
+ if (__skb_pad(skb, pad, false)) |
12265 |
+- goto out; |
12266 |
++ goto drop; |
12267 |
+ skb_put(skb, pad); |
12268 |
+ } |
12269 |
+ } |
12270 |
+@@ -448,9 +448,8 @@ static netdev_tx_t pvc_xmit(struct sk_buff *skb, struct net_device *dev) |
12271 |
+ return NETDEV_TX_OK; |
12272 |
+ |
12273 |
+ drop: |
12274 |
+- kfree_skb(skb); |
12275 |
+-out: |
12276 |
+ dev->stats.tx_dropped++; |
12277 |
++ kfree_skb(skb); |
12278 |
+ return NETDEV_TX_OK; |
12279 |
+ } |
12280 |
+ |
12281 |
+diff --git a/drivers/net/wan/lapbether.c b/drivers/net/wan/lapbether.c |
12282 |
+index c3372498f4f15..8fda0446ff71e 100644 |
12283 |
+--- a/drivers/net/wan/lapbether.c |
12284 |
++++ b/drivers/net/wan/lapbether.c |
12285 |
+@@ -51,6 +51,8 @@ struct lapbethdev { |
12286 |
+ struct list_head node; |
12287 |
+ struct net_device *ethdev; /* link to ethernet device */ |
12288 |
+ struct net_device *axdev; /* lapbeth device (lapb#) */ |
12289 |
++ bool up; |
12290 |
++ spinlock_t up_lock; /* Protects "up" */ |
12291 |
+ }; |
12292 |
+ |
12293 |
+ static LIST_HEAD(lapbeth_devices); |
12294 |
+@@ -101,8 +103,9 @@ static int lapbeth_rcv(struct sk_buff *skb, struct net_device *dev, struct packe |
12295 |
+ rcu_read_lock(); |
12296 |
+ lapbeth = lapbeth_get_x25_dev(dev); |
12297 |
+ if (!lapbeth) |
12298 |
+- goto drop_unlock; |
12299 |
+- if (!netif_running(lapbeth->axdev)) |
12300 |
++ goto drop_unlock_rcu; |
12301 |
++ spin_lock_bh(&lapbeth->up_lock); |
12302 |
++ if (!lapbeth->up) |
12303 |
+ goto drop_unlock; |
12304 |
+ |
12305 |
+ len = skb->data[0] + skb->data[1] * 256; |
12306 |
+@@ -117,11 +120,14 @@ static int lapbeth_rcv(struct sk_buff *skb, struct net_device *dev, struct packe |
12307 |
+ goto drop_unlock; |
12308 |
+ } |
12309 |
+ out: |
12310 |
++ spin_unlock_bh(&lapbeth->up_lock); |
12311 |
+ rcu_read_unlock(); |
12312 |
+ return 0; |
12313 |
+ drop_unlock: |
12314 |
+ kfree_skb(skb); |
12315 |
+ goto out; |
12316 |
++drop_unlock_rcu: |
12317 |
++ rcu_read_unlock(); |
12318 |
+ drop: |
12319 |
+ kfree_skb(skb); |
12320 |
+ return 0; |
12321 |
+@@ -151,13 +157,11 @@ static int lapbeth_data_indication(struct net_device *dev, struct sk_buff *skb) |
12322 |
+ static netdev_tx_t lapbeth_xmit(struct sk_buff *skb, |
12323 |
+ struct net_device *dev) |
12324 |
+ { |
12325 |
++ struct lapbethdev *lapbeth = netdev_priv(dev); |
12326 |
+ int err; |
12327 |
+ |
12328 |
+- /* |
12329 |
+- * Just to be *really* sure not to send anything if the interface |
12330 |
+- * is down, the ethernet device may have gone. |
12331 |
+- */ |
12332 |
+- if (!netif_running(dev)) |
12333 |
++ spin_lock_bh(&lapbeth->up_lock); |
12334 |
++ if (!lapbeth->up) |
12335 |
+ goto drop; |
12336 |
+ |
12337 |
+ /* There should be a pseudo header of 1 byte added by upper layers. |
12338 |
+@@ -194,6 +198,7 @@ static netdev_tx_t lapbeth_xmit(struct sk_buff *skb, |
12339 |
+ goto drop; |
12340 |
+ } |
12341 |
+ out: |
12342 |
++ spin_unlock_bh(&lapbeth->up_lock); |
12343 |
+ return NETDEV_TX_OK; |
12344 |
+ drop: |
12345 |
+ kfree_skb(skb); |
12346 |
+@@ -285,6 +290,7 @@ static const struct lapb_register_struct lapbeth_callbacks = { |
12347 |
+ */ |
12348 |
+ static int lapbeth_open(struct net_device *dev) |
12349 |
+ { |
12350 |
++ struct lapbethdev *lapbeth = netdev_priv(dev); |
12351 |
+ int err; |
12352 |
+ |
12353 |
+ if ((err = lapb_register(dev, &lapbeth_callbacks)) != LAPB_OK) { |
12354 |
+@@ -292,13 +298,22 @@ static int lapbeth_open(struct net_device *dev) |
12355 |
+ return -ENODEV; |
12356 |
+ } |
12357 |
+ |
12358 |
++ spin_lock_bh(&lapbeth->up_lock); |
12359 |
++ lapbeth->up = true; |
12360 |
++ spin_unlock_bh(&lapbeth->up_lock); |
12361 |
++ |
12362 |
+ return 0; |
12363 |
+ } |
12364 |
+ |
12365 |
+ static int lapbeth_close(struct net_device *dev) |
12366 |
+ { |
12367 |
++ struct lapbethdev *lapbeth = netdev_priv(dev); |
12368 |
+ int err; |
12369 |
+ |
12370 |
++ spin_lock_bh(&lapbeth->up_lock); |
12371 |
++ lapbeth->up = false; |
12372 |
++ spin_unlock_bh(&lapbeth->up_lock); |
12373 |
++ |
12374 |
+ if ((err = lapb_unregister(dev)) != LAPB_OK) |
12375 |
+ pr_err("lapb_unregister error: %d\n", err); |
12376 |
+ |
12377 |
+@@ -356,6 +371,9 @@ static int lapbeth_new_device(struct net_device *dev) |
12378 |
+ dev_hold(dev); |
12379 |
+ lapbeth->ethdev = dev; |
12380 |
+ |
12381 |
++ lapbeth->up = false; |
12382 |
++ spin_lock_init(&lapbeth->up_lock); |
12383 |
++ |
12384 |
+ rc = -EIO; |
12385 |
+ if (register_netdevice(ndev)) |
12386 |
+ goto fail; |
12387 |
+diff --git a/drivers/net/wireless/ath/ath10k/htc.c b/drivers/net/wireless/ath/ath10k/htc.c |
12388 |
+index 31df6dd04bf6f..540dd59112a5c 100644 |
12389 |
+--- a/drivers/net/wireless/ath/ath10k/htc.c |
12390 |
++++ b/drivers/net/wireless/ath/ath10k/htc.c |
12391 |
+@@ -665,7 +665,7 @@ static int ath10k_htc_send_bundle(struct ath10k_htc_ep *ep, |
12392 |
+ |
12393 |
+ ath10k_dbg(ar, ATH10K_DBG_HTC, |
12394 |
+ "bundle tx status %d eid %d req count %d count %d len %d\n", |
12395 |
+- ret, ep->eid, skb_queue_len(&ep->tx_req_head), cn, bundle_skb->len); |
12396 |
++ ret, ep->eid, skb_queue_len(&ep->tx_req_head), cn, skb_len); |
12397 |
+ return ret; |
12398 |
+ } |
12399 |
+ |
12400 |
+diff --git a/drivers/net/wireless/ath/ath10k/wmi-tlv.c b/drivers/net/wireless/ath/ath10k/wmi-tlv.c |
12401 |
+index e7072fc4f487a..4f2fbc610d798 100644 |
12402 |
+--- a/drivers/net/wireless/ath/ath10k/wmi-tlv.c |
12403 |
++++ b/drivers/net/wireless/ath/ath10k/wmi-tlv.c |
12404 |
+@@ -592,6 +592,9 @@ static void ath10k_wmi_event_tdls_peer(struct ath10k *ar, struct sk_buff *skb) |
12405 |
+ GFP_ATOMIC |
12406 |
+ ); |
12407 |
+ break; |
12408 |
++ default: |
12409 |
++ kfree(tb); |
12410 |
++ return; |
12411 |
+ } |
12412 |
+ |
12413 |
+ exit: |
12414 |
+diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_init.c b/drivers/net/wireless/ath/ath9k/htc_drv_init.c |
12415 |
+index db0c6fa9c9dc4..ff61ae34ecdf0 100644 |
12416 |
+--- a/drivers/net/wireless/ath/ath9k/htc_drv_init.c |
12417 |
++++ b/drivers/net/wireless/ath/ath9k/htc_drv_init.c |
12418 |
+@@ -246,7 +246,7 @@ static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset) |
12419 |
+ if (unlikely(r)) { |
12420 |
+ ath_dbg(common, WMI, "REGISTER READ FAILED: (0x%04x, %d)\n", |
12421 |
+ reg_offset, r); |
12422 |
+- return -EIO; |
12423 |
++ return -1; |
12424 |
+ } |
12425 |
+ |
12426 |
+ return be32_to_cpu(val); |
12427 |
+diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c |
12428 |
+index b66eeb5772724..504e316d33946 100644 |
12429 |
+--- a/drivers/net/wireless/ath/ath9k/hw.c |
12430 |
++++ b/drivers/net/wireless/ath/ath9k/hw.c |
12431 |
+@@ -287,7 +287,7 @@ static bool ath9k_hw_read_revisions(struct ath_hw *ah) |
12432 |
+ |
12433 |
+ srev = REG_READ(ah, AR_SREV); |
12434 |
+ |
12435 |
+- if (srev == -EIO) { |
12436 |
++ if (srev == -1) { |
12437 |
+ ath_err(ath9k_hw_common(ah), |
12438 |
+ "Failed to read SREV register"); |
12439 |
+ return false; |
12440 |
+diff --git a/drivers/net/wireless/intel/ipw2x00/libipw_wx.c b/drivers/net/wireless/intel/ipw2x00/libipw_wx.c |
12441 |
+index a0cf78c418ac9..903de34028efb 100644 |
12442 |
+--- a/drivers/net/wireless/intel/ipw2x00/libipw_wx.c |
12443 |
++++ b/drivers/net/wireless/intel/ipw2x00/libipw_wx.c |
12444 |
+@@ -633,8 +633,10 @@ int libipw_wx_set_encodeext(struct libipw_device *ieee, |
12445 |
+ } |
12446 |
+ |
12447 |
+ if (ext->alg != IW_ENCODE_ALG_NONE) { |
12448 |
+- memcpy(sec.keys[idx], ext->key, ext->key_len); |
12449 |
+- sec.key_sizes[idx] = ext->key_len; |
12450 |
++ int key_len = clamp_val(ext->key_len, 0, SCM_KEY_LEN); |
12451 |
++ |
12452 |
++ memcpy(sec.keys[idx], ext->key, key_len); |
12453 |
++ sec.key_sizes[idx] = key_len; |
12454 |
+ sec.flags |= (1 << idx); |
12455 |
+ if (ext->alg == IW_ENCODE_ALG_WEP) { |
12456 |
+ sec.encode_alg[idx] = SEC_ALG_WEP; |
12457 |
+diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.c b/drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.c |
12458 |
+index a80a35a7740f3..900bf546d86ed 100644 |
12459 |
+--- a/drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.c |
12460 |
++++ b/drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.c |
12461 |
+@@ -1,6 +1,6 @@ |
12462 |
+ // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause |
12463 |
+ /* |
12464 |
+- * Copyright (C) 2018-2020 Intel Corporation |
12465 |
++ * Copyright (C) 2018-2021 Intel Corporation |
12466 |
+ */ |
12467 |
+ #include <linux/firmware.h> |
12468 |
+ #include "iwl-drv.h" |
12469 |
+@@ -424,7 +424,8 @@ void iwl_dbg_tlv_load_bin(struct device *dev, struct iwl_trans *trans) |
12470 |
+ const struct firmware *fw; |
12471 |
+ int res; |
12472 |
+ |
12473 |
+- if (!iwlwifi_mod_params.enable_ini) |
12474 |
++ if (!iwlwifi_mod_params.enable_ini || |
12475 |
++ trans->trans_cfg->device_family <= IWL_DEVICE_FAMILY_9000) |
12476 |
+ return; |
12477 |
+ |
12478 |
+ res = firmware_request_nowarn(&fw, "iwl-debug-yoyo.bin", dev); |
12479 |
+diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/rs-fw.c b/drivers/net/wireless/intel/iwlwifi/mvm/rs-fw.c |
12480 |
+index 490a561c71db3..cdfab7c0ca74c 100644 |
12481 |
+--- a/drivers/net/wireless/intel/iwlwifi/mvm/rs-fw.c |
12482 |
++++ b/drivers/net/wireless/intel/iwlwifi/mvm/rs-fw.c |
12483 |
+@@ -1,7 +1,7 @@ |
12484 |
+ // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause |
12485 |
+ /* |
12486 |
+ * Copyright (C) 2017 Intel Deutschland GmbH |
12487 |
+- * Copyright (C) 2018-2020 Intel Corporation |
12488 |
++ * Copyright (C) 2018-2021 Intel Corporation |
12489 |
+ */ |
12490 |
+ #include "rs.h" |
12491 |
+ #include "fw-api.h" |
12492 |
+@@ -72,19 +72,15 @@ static u16 rs_fw_get_config_flags(struct iwl_mvm *mvm, |
12493 |
+ bool vht_ena = vht_cap->vht_supported; |
12494 |
+ u16 flags = 0; |
12495 |
+ |
12496 |
++ /* get STBC flags */ |
12497 |
+ if (mvm->cfg->ht_params->stbc && |
12498 |
+ (num_of_ant(iwl_mvm_get_valid_tx_ant(mvm)) > 1)) { |
12499 |
+- if (he_cap->has_he) { |
12500 |
+- if (he_cap->he_cap_elem.phy_cap_info[2] & |
12501 |
+- IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ) |
12502 |
+- flags |= IWL_TLC_MNG_CFG_FLAGS_STBC_MSK; |
12503 |
+- |
12504 |
+- if (he_cap->he_cap_elem.phy_cap_info[7] & |
12505 |
+- IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ) |
12506 |
+- flags |= IWL_TLC_MNG_CFG_FLAGS_HE_STBC_160MHZ_MSK; |
12507 |
+- } else if ((ht_cap->cap & IEEE80211_HT_CAP_RX_STBC) || |
12508 |
+- (vht_ena && |
12509 |
+- (vht_cap->cap & IEEE80211_VHT_CAP_RXSTBC_MASK))) |
12510 |
++ if (he_cap->has_he && he_cap->he_cap_elem.phy_cap_info[2] & |
12511 |
++ IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ) |
12512 |
++ flags |= IWL_TLC_MNG_CFG_FLAGS_STBC_MSK; |
12513 |
++ else if (vht_cap->cap & IEEE80211_VHT_CAP_RXSTBC_MASK) |
12514 |
++ flags |= IWL_TLC_MNG_CFG_FLAGS_STBC_MSK; |
12515 |
++ else if (ht_cap->cap & IEEE80211_HT_CAP_RX_STBC) |
12516 |
+ flags |= IWL_TLC_MNG_CFG_FLAGS_STBC_MSK; |
12517 |
+ } |
12518 |
+ |
12519 |
+diff --git a/drivers/net/wireless/marvell/mwl8k.c b/drivers/net/wireless/marvell/mwl8k.c |
12520 |
+index abf3b0233ccce..e98e7680eb532 100644 |
12521 |
+--- a/drivers/net/wireless/marvell/mwl8k.c |
12522 |
++++ b/drivers/net/wireless/marvell/mwl8k.c |
12523 |
+@@ -1474,6 +1474,7 @@ static int mwl8k_txq_init(struct ieee80211_hw *hw, int index) |
12524 |
+ if (txq->skb == NULL) { |
12525 |
+ dma_free_coherent(&priv->pdev->dev, size, txq->txd, |
12526 |
+ txq->txd_dma); |
12527 |
++ txq->txd = NULL; |
12528 |
+ return -ENOMEM; |
12529 |
+ } |
12530 |
+ |
12531 |
+diff --git a/drivers/net/wireless/mediatek/mt76/dma.c b/drivers/net/wireless/mediatek/mt76/dma.c |
12532 |
+index 680c899a96d77..28611e7a4d392 100644 |
12533 |
+--- a/drivers/net/wireless/mediatek/mt76/dma.c |
12534 |
++++ b/drivers/net/wireless/mediatek/mt76/dma.c |
12535 |
+@@ -309,7 +309,7 @@ static int |
12536 |
+ mt76_dma_tx_queue_skb_raw(struct mt76_dev *dev, struct mt76_queue *q, |
12537 |
+ struct sk_buff *skb, u32 tx_info) |
12538 |
+ { |
12539 |
+- struct mt76_queue_buf buf; |
12540 |
++ struct mt76_queue_buf buf = {}; |
12541 |
+ dma_addr_t addr; |
12542 |
+ |
12543 |
+ if (q->queued + 1 >= q->ndesc - 1) |
12544 |
+diff --git a/drivers/net/wireless/mediatek/mt76/mt76.h b/drivers/net/wireless/mediatek/mt76/mt76.h |
12545 |
+index 3e496a188bf0f..5da6b74687ed6 100644 |
12546 |
+--- a/drivers/net/wireless/mediatek/mt76/mt76.h |
12547 |
++++ b/drivers/net/wireless/mediatek/mt76/mt76.h |
12548 |
+@@ -81,6 +81,7 @@ enum mt76_rxq_id { |
12549 |
+ MT_RXQ_MCU, |
12550 |
+ MT_RXQ_MCU_WA, |
12551 |
+ MT_RXQ_EXT, |
12552 |
++ MT_RXQ_EXT_WA, |
12553 |
+ __MT_RXQ_MAX |
12554 |
+ }; |
12555 |
+ |
12556 |
+diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/mac.c b/drivers/net/wireless/mediatek/mt76/mt7615/mac.c |
12557 |
+index fb10a6497ed05..2cb24c26a0745 100644 |
12558 |
+--- a/drivers/net/wireless/mediatek/mt76/mt7615/mac.c |
12559 |
++++ b/drivers/net/wireless/mediatek/mt76/mt7615/mac.c |
12560 |
+@@ -688,7 +688,7 @@ mt7615_txp_skb_unmap_fw(struct mt76_dev *dev, struct mt7615_fw_txp *txp) |
12561 |
+ { |
12562 |
+ int i; |
12563 |
+ |
12564 |
+- for (i = 1; i < txp->nbuf; i++) |
12565 |
++ for (i = 0; i < txp->nbuf; i++) |
12566 |
+ dma_unmap_single(dev->dev, le32_to_cpu(txp->buf[i]), |
12567 |
+ le16_to_cpu(txp->len[i]), DMA_TO_DEVICE); |
12568 |
+ } |
12569 |
+@@ -1819,10 +1819,8 @@ mt7615_mac_update_mib_stats(struct mt7615_phy *phy) |
12570 |
+ int i, aggr; |
12571 |
+ u32 val, val2; |
12572 |
+ |
12573 |
+- memset(mib, 0, sizeof(*mib)); |
12574 |
+- |
12575 |
+- mib->fcs_err_cnt = mt76_get_field(dev, MT_MIB_SDR3(ext_phy), |
12576 |
+- MT_MIB_SDR3_FCS_ERR_MASK); |
12577 |
++ mib->fcs_err_cnt += mt76_get_field(dev, MT_MIB_SDR3(ext_phy), |
12578 |
++ MT_MIB_SDR3_FCS_ERR_MASK); |
12579 |
+ |
12580 |
+ val = mt76_get_field(dev, MT_MIB_SDR14(ext_phy), |
12581 |
+ MT_MIB_AMPDU_MPDU_COUNT); |
12582 |
+@@ -1835,24 +1833,16 @@ mt7615_mac_update_mib_stats(struct mt7615_phy *phy) |
12583 |
+ aggr = ext_phy ? ARRAY_SIZE(dev->mt76.aggr_stats) / 2 : 0; |
12584 |
+ for (i = 0; i < 4; i++) { |
12585 |
+ val = mt76_rr(dev, MT_MIB_MB_SDR1(ext_phy, i)); |
12586 |
+- |
12587 |
+- val2 = FIELD_GET(MT_MIB_ACK_FAIL_COUNT_MASK, val); |
12588 |
+- if (val2 > mib->ack_fail_cnt) |
12589 |
+- mib->ack_fail_cnt = val2; |
12590 |
+- |
12591 |
+- val2 = FIELD_GET(MT_MIB_BA_MISS_COUNT_MASK, val); |
12592 |
+- if (val2 > mib->ba_miss_cnt) |
12593 |
+- mib->ba_miss_cnt = val2; |
12594 |
++ mib->ba_miss_cnt += FIELD_GET(MT_MIB_BA_MISS_COUNT_MASK, val); |
12595 |
++ mib->ack_fail_cnt += FIELD_GET(MT_MIB_ACK_FAIL_COUNT_MASK, |
12596 |
++ val); |
12597 |
+ |
12598 |
+ val = mt76_rr(dev, MT_MIB_MB_SDR0(ext_phy, i)); |
12599 |
+- val2 = FIELD_GET(MT_MIB_RTS_RETRIES_COUNT_MASK, val); |
12600 |
+- if (val2 > mib->rts_retries_cnt) { |
12601 |
+- mib->rts_cnt = FIELD_GET(MT_MIB_RTS_COUNT_MASK, val); |
12602 |
+- mib->rts_retries_cnt = val2; |
12603 |
+- } |
12604 |
++ mib->rts_cnt += FIELD_GET(MT_MIB_RTS_COUNT_MASK, val); |
12605 |
++ mib->rts_retries_cnt += FIELD_GET(MT_MIB_RTS_RETRIES_COUNT_MASK, |
12606 |
++ val); |
12607 |
+ |
12608 |
+ val = mt76_rr(dev, MT_TX_AGG_CNT(ext_phy, i)); |
12609 |
+- |
12610 |
+ dev->mt76.aggr_stats[aggr++] += val & 0xffff; |
12611 |
+ dev->mt76.aggr_stats[aggr++] += val >> 16; |
12612 |
+ } |
12613 |
+@@ -2042,15 +2032,17 @@ void mt7615_dma_reset(struct mt7615_dev *dev) |
12614 |
+ mt76_clear(dev, MT_WPDMA_GLO_CFG, |
12615 |
+ MT_WPDMA_GLO_CFG_RX_DMA_EN | MT_WPDMA_GLO_CFG_TX_DMA_EN | |
12616 |
+ MT_WPDMA_GLO_CFG_TX_WRITEBACK_DONE); |
12617 |
++ |
12618 |
+ usleep_range(1000, 2000); |
12619 |
+ |
12620 |
+- mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_WM], true); |
12621 |
+ for (i = 0; i < __MT_TXQ_MAX; i++) |
12622 |
+ mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[i], true); |
12623 |
+ |
12624 |
+- mt76_for_each_q_rx(&dev->mt76, i) { |
12625 |
++ for (i = 0; i < __MT_MCUQ_MAX; i++) |
12626 |
++ mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[i], true); |
12627 |
++ |
12628 |
++ mt76_for_each_q_rx(&dev->mt76, i) |
12629 |
+ mt76_queue_rx_reset(dev, i); |
12630 |
+- } |
12631 |
+ |
12632 |
+ mt76_set(dev, MT_WPDMA_GLO_CFG, |
12633 |
+ MT_WPDMA_GLO_CFG_RX_DMA_EN | MT_WPDMA_GLO_CFG_TX_DMA_EN | |
12634 |
+@@ -2066,8 +2058,12 @@ void mt7615_tx_token_put(struct mt7615_dev *dev) |
12635 |
+ spin_lock_bh(&dev->token_lock); |
12636 |
+ idr_for_each_entry(&dev->token, txwi, id) { |
12637 |
+ mt7615_txp_skb_unmap(&dev->mt76, txwi); |
12638 |
+- if (txwi->skb) |
12639 |
+- dev_kfree_skb_any(txwi->skb); |
12640 |
++ if (txwi->skb) { |
12641 |
++ struct ieee80211_hw *hw; |
12642 |
++ |
12643 |
++ hw = mt76_tx_status_get_hw(&dev->mt76, txwi->skb); |
12644 |
++ ieee80211_free_txskb(hw, txwi->skb); |
12645 |
++ } |
12646 |
+ mt76_put_txwi(&dev->mt76, txwi); |
12647 |
+ } |
12648 |
+ spin_unlock_bh(&dev->token_lock); |
12649 |
+diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/main.c b/drivers/net/wireless/mediatek/mt76/mt7615/main.c |
12650 |
+index 56dd0b4e44609..0ec836af211c0 100644 |
12651 |
+--- a/drivers/net/wireless/mediatek/mt76/mt7615/main.c |
12652 |
++++ b/drivers/net/wireless/mediatek/mt76/mt7615/main.c |
12653 |
+@@ -231,8 +231,6 @@ static int mt7615_add_interface(struct ieee80211_hw *hw, |
12654 |
+ ret = mt7615_mcu_add_dev_info(dev, vif, true); |
12655 |
+ if (ret) |
12656 |
+ goto out; |
12657 |
+- |
12658 |
+- mt7615_mac_set_beacon_filter(phy, vif, true); |
12659 |
+ out: |
12660 |
+ mt7615_mutex_release(dev); |
12661 |
+ |
12662 |
+@@ -258,7 +256,6 @@ static void mt7615_remove_interface(struct ieee80211_hw *hw, |
12663 |
+ |
12664 |
+ mt7615_free_pending_tx_skbs(dev, msta); |
12665 |
+ |
12666 |
+- mt7615_mac_set_beacon_filter(phy, vif, false); |
12667 |
+ mt7615_mcu_add_dev_info(dev, vif, false); |
12668 |
+ |
12669 |
+ rcu_assign_pointer(dev->mt76.wcid[idx], NULL); |
12670 |
+@@ -557,6 +554,9 @@ static void mt7615_bss_info_changed(struct ieee80211_hw *hw, |
12671 |
+ if (changed & BSS_CHANGED_ARP_FILTER) |
12672 |
+ mt7615_mcu_update_arp_filter(hw, vif, info); |
12673 |
+ |
12674 |
++ if (changed & BSS_CHANGED_ASSOC) |
12675 |
++ mt7615_mac_set_beacon_filter(phy, vif, info->assoc); |
12676 |
++ |
12677 |
+ mt7615_mutex_release(dev); |
12678 |
+ } |
12679 |
+ |
12680 |
+@@ -827,11 +827,17 @@ mt7615_get_stats(struct ieee80211_hw *hw, |
12681 |
+ struct mt7615_phy *phy = mt7615_hw_phy(hw); |
12682 |
+ struct mib_stats *mib = &phy->mib; |
12683 |
+ |
12684 |
++ mt7615_mutex_acquire(phy->dev); |
12685 |
++ |
12686 |
+ stats->dot11RTSSuccessCount = mib->rts_cnt; |
12687 |
+ stats->dot11RTSFailureCount = mib->rts_retries_cnt; |
12688 |
+ stats->dot11FCSErrorCount = mib->fcs_err_cnt; |
12689 |
+ stats->dot11ACKFailureCount = mib->ack_fail_cnt; |
12690 |
+ |
12691 |
++ memset(mib, 0, sizeof(*mib)); |
12692 |
++ |
12693 |
++ mt7615_mutex_release(phy->dev); |
12694 |
++ |
12695 |
+ return 0; |
12696 |
+ } |
12697 |
+ |
12698 |
+diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/mt7615.h b/drivers/net/wireless/mediatek/mt76/mt7615/mt7615.h |
12699 |
+index d697ff2ea56e8..b56b82279f980 100644 |
12700 |
+--- a/drivers/net/wireless/mediatek/mt76/mt7615/mt7615.h |
12701 |
++++ b/drivers/net/wireless/mediatek/mt76/mt7615/mt7615.h |
12702 |
+@@ -143,11 +143,11 @@ struct mt7615_vif { |
12703 |
+ }; |
12704 |
+ |
12705 |
+ struct mib_stats { |
12706 |
+- u16 ack_fail_cnt; |
12707 |
+- u16 fcs_err_cnt; |
12708 |
+- u16 rts_cnt; |
12709 |
+- u16 rts_retries_cnt; |
12710 |
+- u16 ba_miss_cnt; |
12711 |
++ u32 ack_fail_cnt; |
12712 |
++ u32 fcs_err_cnt; |
12713 |
++ u32 rts_cnt; |
12714 |
++ u32 rts_retries_cnt; |
12715 |
++ u32 ba_miss_cnt; |
12716 |
+ unsigned long aggr_per; |
12717 |
+ }; |
12718 |
+ |
12719 |
+diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/pci_init.c b/drivers/net/wireless/mediatek/mt76/mt7615/pci_init.c |
12720 |
+index 58a0ec1bf8d7b..5dd1c6d501ade 100644 |
12721 |
+--- a/drivers/net/wireless/mediatek/mt76/mt7615/pci_init.c |
12722 |
++++ b/drivers/net/wireless/mediatek/mt76/mt7615/pci_init.c |
12723 |
+@@ -168,10 +168,9 @@ void mt7615_unregister_device(struct mt7615_dev *dev) |
12724 |
+ mt76_unregister_device(&dev->mt76); |
12725 |
+ if (mcu_running) |
12726 |
+ mt7615_mcu_exit(dev); |
12727 |
+- mt7615_dma_cleanup(dev); |
12728 |
+ |
12729 |
+ mt7615_tx_token_put(dev); |
12730 |
+- |
12731 |
++ mt7615_dma_cleanup(dev); |
12732 |
+ tasklet_disable(&dev->irq_tasklet); |
12733 |
+ |
12734 |
+ mt76_free_device(&dev->mt76); |
12735 |
+diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/sdio_txrx.c b/drivers/net/wireless/mediatek/mt76/mt7615/sdio_txrx.c |
12736 |
+index 9fb506f2ace6d..4393dd21ebbbb 100644 |
12737 |
+--- a/drivers/net/wireless/mediatek/mt76/mt7615/sdio_txrx.c |
12738 |
++++ b/drivers/net/wireless/mediatek/mt76/mt7615/sdio_txrx.c |
12739 |
+@@ -218,12 +218,15 @@ static int mt7663s_tx_run_queue(struct mt76_dev *dev, struct mt76_queue *q) |
12740 |
+ int qid, err, nframes = 0, len = 0, pse_sz = 0, ple_sz = 0; |
12741 |
+ bool mcu = q == dev->q_mcu[MT_MCUQ_WM]; |
12742 |
+ struct mt76_sdio *sdio = &dev->sdio; |
12743 |
++ u8 pad; |
12744 |
+ |
12745 |
+ qid = mcu ? ARRAY_SIZE(sdio->xmit_buf) - 1 : q->qid; |
12746 |
+ while (q->first != q->head) { |
12747 |
+ struct mt76_queue_entry *e = &q->entry[q->first]; |
12748 |
+ struct sk_buff *iter; |
12749 |
+ |
12750 |
++ smp_rmb(); |
12751 |
++ |
12752 |
+ if (!test_bit(MT76_STATE_MCU_RUNNING, &dev->phy.state)) { |
12753 |
+ __skb_put_zero(e->skb, 4); |
12754 |
+ err = __mt7663s_xmit_queue(dev, e->skb->data, |
12755 |
+@@ -234,7 +237,8 @@ static int mt7663s_tx_run_queue(struct mt76_dev *dev, struct mt76_queue *q) |
12756 |
+ goto next; |
12757 |
+ } |
12758 |
+ |
12759 |
+- if (len + e->skb->len + 4 > MT76S_XMIT_BUF_SZ) |
12760 |
++ pad = roundup(e->skb->len, 4) - e->skb->len; |
12761 |
++ if (len + e->skb->len + pad + 4 > MT76S_XMIT_BUF_SZ) |
12762 |
+ break; |
12763 |
+ |
12764 |
+ if (mt7663s_tx_pick_quota(sdio, mcu, e->buf_sz, &pse_sz, |
12765 |
+@@ -252,6 +256,11 @@ static int mt7663s_tx_run_queue(struct mt76_dev *dev, struct mt76_queue *q) |
12766 |
+ len += iter->len; |
12767 |
+ nframes++; |
12768 |
+ } |
12769 |
++ |
12770 |
++ if (unlikely(pad)) { |
12771 |
++ memset(sdio->xmit_buf[qid] + len, 0, pad); |
12772 |
++ len += pad; |
12773 |
++ } |
12774 |
+ next: |
12775 |
+ q->first = (q->first + 1) % q->ndesc; |
12776 |
+ e->done = true; |
12777 |
+diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/debugfs.c b/drivers/net/wireless/mediatek/mt76/mt7915/debugfs.c |
12778 |
+index 7d810fbf28625..a2d2b56a8eb92 100644 |
12779 |
+--- a/drivers/net/wireless/mediatek/mt76/mt7915/debugfs.c |
12780 |
++++ b/drivers/net/wireless/mediatek/mt76/mt7915/debugfs.c |
12781 |
+@@ -98,7 +98,7 @@ mt7915_ampdu_stat_read_phy(struct mt7915_phy *phy, |
12782 |
+ range[i] = mt76_rr(dev, MT_MIB_ARNG(ext_phy, i)); |
12783 |
+ |
12784 |
+ for (i = 0; i < ARRAY_SIZE(bound); i++) |
12785 |
+- bound[i] = MT_MIB_ARNCR_RANGE(range[i / 4], i) + 1; |
12786 |
++ bound[i] = MT_MIB_ARNCR_RANGE(range[i / 4], i % 4) + 1; |
12787 |
+ |
12788 |
+ seq_printf(file, "\nPhy %d\n", ext_phy); |
12789 |
+ |
12790 |
+diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/dma.c b/drivers/net/wireless/mediatek/mt76/mt7915/dma.c |
12791 |
+index 8c1f9c77b14f8..d47d8f4376c6f 100644 |
12792 |
+--- a/drivers/net/wireless/mediatek/mt76/mt7915/dma.c |
12793 |
++++ b/drivers/net/wireless/mediatek/mt76/mt7915/dma.c |
12794 |
+@@ -286,6 +286,14 @@ int mt7915_dma_init(struct mt7915_dev *dev) |
12795 |
+ rx_buf_size, MT_RX_DATA_RING_BASE); |
12796 |
+ if (ret) |
12797 |
+ return ret; |
12798 |
++ |
12799 |
++ /* event from WA */ |
12800 |
++ ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_EXT_WA], |
12801 |
++ MT7915_RXQ_MCU_WA_EXT, |
12802 |
++ MT7915_RX_MCU_RING_SIZE, |
12803 |
++ rx_buf_size, MT_RX_EVENT_RING_BASE); |
12804 |
++ if (ret) |
12805 |
++ return ret; |
12806 |
+ } |
12807 |
+ |
12808 |
+ ret = mt76_init_queues(dev); |
12809 |
+diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/init.c b/drivers/net/wireless/mediatek/mt76/mt7915/init.c |
12810 |
+index 2ec18aaa82807..148a92efdd4ee 100644 |
12811 |
+--- a/drivers/net/wireless/mediatek/mt76/mt7915/init.c |
12812 |
++++ b/drivers/net/wireless/mediatek/mt76/mt7915/init.c |
12813 |
+@@ -675,9 +675,8 @@ void mt7915_unregister_device(struct mt7915_dev *dev) |
12814 |
+ mt7915_unregister_ext_phy(dev); |
12815 |
+ mt76_unregister_device(&dev->mt76); |
12816 |
+ mt7915_mcu_exit(dev); |
12817 |
+- mt7915_dma_cleanup(dev); |
12818 |
+- |
12819 |
+ mt7915_tx_token_put(dev); |
12820 |
++ mt7915_dma_cleanup(dev); |
12821 |
+ |
12822 |
+ mt76_free_device(&dev->mt76); |
12823 |
+ } |
12824 |
+diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/mac.c b/drivers/net/wireless/mediatek/mt76/mt7915/mac.c |
12825 |
+index c9dd6867e1251..2dedca6f24e45 100644 |
12826 |
+--- a/drivers/net/wireless/mediatek/mt76/mt7915/mac.c |
12827 |
++++ b/drivers/net/wireless/mediatek/mt76/mt7915/mac.c |
12828 |
+@@ -1082,7 +1082,7 @@ void mt7915_txp_skb_unmap(struct mt76_dev *dev, |
12829 |
+ int i; |
12830 |
+ |
12831 |
+ txp = mt7915_txwi_to_txp(dev, t); |
12832 |
+- for (i = 1; i < txp->nbuf; i++) |
12833 |
++ for (i = 0; i < txp->nbuf; i++) |
12834 |
+ dma_unmap_single(dev->dev, le32_to_cpu(txp->buf[i]), |
12835 |
+ le16_to_cpu(txp->len[i]), DMA_TO_DEVICE); |
12836 |
+ } |
12837 |
+@@ -1453,9 +1453,8 @@ mt7915_update_beacons(struct mt7915_dev *dev) |
12838 |
+ } |
12839 |
+ |
12840 |
+ static void |
12841 |
+-mt7915_dma_reset(struct mt7915_phy *phy) |
12842 |
++mt7915_dma_reset(struct mt7915_dev *dev) |
12843 |
+ { |
12844 |
+- struct mt7915_dev *dev = phy->dev; |
12845 |
+ struct mt76_phy *mphy_ext = dev->mt76.phy2; |
12846 |
+ int i; |
12847 |
+ |
12848 |
+@@ -1463,18 +1462,20 @@ mt7915_dma_reset(struct mt7915_phy *phy) |
12849 |
+ MT_WFDMA0_GLO_CFG_TX_DMA_EN | MT_WFDMA0_GLO_CFG_RX_DMA_EN); |
12850 |
+ mt76_clear(dev, MT_WFDMA1_GLO_CFG, |
12851 |
+ MT_WFDMA1_GLO_CFG_TX_DMA_EN | MT_WFDMA1_GLO_CFG_RX_DMA_EN); |
12852 |
++ |
12853 |
+ usleep_range(1000, 2000); |
12854 |
+ |
12855 |
+- mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_WA], true); |
12856 |
+ for (i = 0; i < __MT_TXQ_MAX; i++) { |
12857 |
+- mt76_queue_tx_cleanup(dev, phy->mt76->q_tx[i], true); |
12858 |
++ mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[i], true); |
12859 |
+ if (mphy_ext) |
12860 |
+ mt76_queue_tx_cleanup(dev, mphy_ext->q_tx[i], true); |
12861 |
+ } |
12862 |
+ |
12863 |
+- mt76_for_each_q_rx(&dev->mt76, i) { |
12864 |
++ for (i = 0; i < __MT_MCUQ_MAX; i++) |
12865 |
++ mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[i], true); |
12866 |
++ |
12867 |
++ mt76_for_each_q_rx(&dev->mt76, i) |
12868 |
+ mt76_queue_rx_reset(dev, i); |
12869 |
+- } |
12870 |
+ |
12871 |
+ /* re-init prefetch settings after reset */ |
12872 |
+ mt7915_dma_prefetch(dev); |
12873 |
+@@ -1550,7 +1551,7 @@ void mt7915_mac_reset_work(struct work_struct *work) |
12874 |
+ idr_init(&dev->token); |
12875 |
+ |
12876 |
+ if (mt7915_wait_reset_state(dev, MT_MCU_CMD_RESET_DONE)) { |
12877 |
+- mt7915_dma_reset(&dev->phy); |
12878 |
++ mt7915_dma_reset(dev); |
12879 |
+ |
12880 |
+ mt76_wr(dev, MT_MCU_INT_EVENT, MT_MCU_INT_EVENT_DMA_INIT); |
12881 |
+ mt7915_wait_reset_state(dev, MT_MCU_CMD_RECOVERY_DONE); |
12882 |
+@@ -1598,39 +1599,30 @@ mt7915_mac_update_mib_stats(struct mt7915_phy *phy) |
12883 |
+ bool ext_phy = phy != &dev->phy; |
12884 |
+ int i, aggr0, aggr1; |
12885 |
+ |
12886 |
+- memset(mib, 0, sizeof(*mib)); |
12887 |
+- |
12888 |
+- mib->fcs_err_cnt = mt76_get_field(dev, MT_MIB_SDR3(ext_phy), |
12889 |
+- MT_MIB_SDR3_FCS_ERR_MASK); |
12890 |
++ mib->fcs_err_cnt += mt76_get_field(dev, MT_MIB_SDR3(ext_phy), |
12891 |
++ MT_MIB_SDR3_FCS_ERR_MASK); |
12892 |
+ |
12893 |
+ aggr0 = ext_phy ? ARRAY_SIZE(dev->mt76.aggr_stats) / 2 : 0; |
12894 |
+ for (i = 0, aggr1 = aggr0 + 4; i < 4; i++) { |
12895 |
+- u32 val, val2; |
12896 |
++ u32 val; |
12897 |
+ |
12898 |
+ val = mt76_rr(dev, MT_MIB_MB_SDR1(ext_phy, i)); |
12899 |
+- |
12900 |
+- val2 = FIELD_GET(MT_MIB_ACK_FAIL_COUNT_MASK, val); |
12901 |
+- if (val2 > mib->ack_fail_cnt) |
12902 |
+- mib->ack_fail_cnt = val2; |
12903 |
+- |
12904 |
+- val2 = FIELD_GET(MT_MIB_BA_MISS_COUNT_MASK, val); |
12905 |
+- if (val2 > mib->ba_miss_cnt) |
12906 |
+- mib->ba_miss_cnt = val2; |
12907 |
++ mib->ba_miss_cnt += FIELD_GET(MT_MIB_BA_MISS_COUNT_MASK, val); |
12908 |
++ mib->ack_fail_cnt += |
12909 |
++ FIELD_GET(MT_MIB_ACK_FAIL_COUNT_MASK, val); |
12910 |
+ |
12911 |
+ val = mt76_rr(dev, MT_MIB_MB_SDR0(ext_phy, i)); |
12912 |
+- val2 = FIELD_GET(MT_MIB_RTS_RETRIES_COUNT_MASK, val); |
12913 |
+- if (val2 > mib->rts_retries_cnt) { |
12914 |
+- mib->rts_cnt = FIELD_GET(MT_MIB_RTS_COUNT_MASK, val); |
12915 |
+- mib->rts_retries_cnt = val2; |
12916 |
+- } |
12917 |
++ mib->rts_cnt += FIELD_GET(MT_MIB_RTS_COUNT_MASK, val); |
12918 |
++ mib->rts_retries_cnt += |
12919 |
++ FIELD_GET(MT_MIB_RTS_RETRIES_COUNT_MASK, val); |
12920 |
+ |
12921 |
+ val = mt76_rr(dev, MT_TX_AGG_CNT(ext_phy, i)); |
12922 |
+- val2 = mt76_rr(dev, MT_TX_AGG_CNT2(ext_phy, i)); |
12923 |
+- |
12924 |
+ dev->mt76.aggr_stats[aggr0++] += val & 0xffff; |
12925 |
+ dev->mt76.aggr_stats[aggr0++] += val >> 16; |
12926 |
+- dev->mt76.aggr_stats[aggr1++] += val2 & 0xffff; |
12927 |
+- dev->mt76.aggr_stats[aggr1++] += val2 >> 16; |
12928 |
++ |
12929 |
++ val = mt76_rr(dev, MT_TX_AGG_CNT2(ext_phy, i)); |
12930 |
++ dev->mt76.aggr_stats[aggr1++] += val & 0xffff; |
12931 |
++ dev->mt76.aggr_stats[aggr1++] += val >> 16; |
12932 |
+ } |
12933 |
+ } |
12934 |
+ |
12935 |
+diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/main.c b/drivers/net/wireless/mediatek/mt76/mt7915/main.c |
12936 |
+index 0c82aa2ef219d..0721e9d85b655 100644 |
12937 |
+--- a/drivers/net/wireless/mediatek/mt76/mt7915/main.c |
12938 |
++++ b/drivers/net/wireless/mediatek/mt76/mt7915/main.c |
12939 |
+@@ -711,13 +711,19 @@ mt7915_get_stats(struct ieee80211_hw *hw, |
12940 |
+ struct ieee80211_low_level_stats *stats) |
12941 |
+ { |
12942 |
+ struct mt7915_phy *phy = mt7915_hw_phy(hw); |
12943 |
++ struct mt7915_dev *dev = mt7915_hw_dev(hw); |
12944 |
+ struct mib_stats *mib = &phy->mib; |
12945 |
+ |
12946 |
++ mutex_lock(&dev->mt76.mutex); |
12947 |
+ stats->dot11RTSSuccessCount = mib->rts_cnt; |
12948 |
+ stats->dot11RTSFailureCount = mib->rts_retries_cnt; |
12949 |
+ stats->dot11FCSErrorCount = mib->fcs_err_cnt; |
12950 |
+ stats->dot11ACKFailureCount = mib->ack_fail_cnt; |
12951 |
+ |
12952 |
++ memset(mib, 0, sizeof(*mib)); |
12953 |
++ |
12954 |
++ mutex_unlock(&dev->mt76.mutex); |
12955 |
++ |
12956 |
+ return 0; |
12957 |
+ } |
12958 |
+ |
12959 |
+@@ -827,9 +833,12 @@ static void mt7915_sta_statistics(struct ieee80211_hw *hw, |
12960 |
+ struct mt7915_phy *phy = mt7915_hw_phy(hw); |
12961 |
+ struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; |
12962 |
+ struct mt7915_sta_stats *stats = &msta->stats; |
12963 |
++ struct rate_info rxrate = {}; |
12964 |
+ |
12965 |
+- if (mt7915_mcu_get_rx_rate(phy, vif, sta, &sinfo->rxrate) == 0) |
12966 |
++ if (!mt7915_mcu_get_rx_rate(phy, vif, sta, &rxrate)) { |
12967 |
++ sinfo->rxrate = rxrate; |
12968 |
+ sinfo->filled |= BIT_ULL(NL80211_STA_INFO_RX_BITRATE); |
12969 |
++ } |
12970 |
+ |
12971 |
+ if (!stats->tx_rate.legacy && !stats->tx_rate.flags) |
12972 |
+ return; |
12973 |
+diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/mcu.c b/drivers/net/wireless/mediatek/mt76/mt7915/mcu.c |
12974 |
+index e211a2bd4d3c0..35bfa197dff6d 100644 |
12975 |
+--- a/drivers/net/wireless/mediatek/mt76/mt7915/mcu.c |
12976 |
++++ b/drivers/net/wireless/mediatek/mt76/mt7915/mcu.c |
12977 |
+@@ -351,54 +351,62 @@ mt7915_mcu_rx_radar_detected(struct mt7915_dev *dev, struct sk_buff *skb) |
12978 |
+ dev->hw_pattern++; |
12979 |
+ } |
12980 |
+ |
12981 |
+-static void |
12982 |
++static int |
12983 |
+ mt7915_mcu_tx_rate_parse(struct mt76_phy *mphy, struct mt7915_mcu_ra_info *ra, |
12984 |
+ struct rate_info *rate, u16 r) |
12985 |
+ { |
12986 |
+ struct ieee80211_supported_band *sband; |
12987 |
+ u16 ru_idx = le16_to_cpu(ra->ru_idx); |
12988 |
+- u16 flags = 0; |
12989 |
++ bool cck = false; |
12990 |
+ |
12991 |
+ rate->mcs = FIELD_GET(MT_RA_RATE_MCS, r); |
12992 |
+ rate->nss = FIELD_GET(MT_RA_RATE_NSS, r) + 1; |
12993 |
+ |
12994 |
+ switch (FIELD_GET(MT_RA_RATE_TX_MODE, r)) { |
12995 |
+ case MT_PHY_TYPE_CCK: |
12996 |
++ cck = true; |
12997 |
++ fallthrough; |
12998 |
+ case MT_PHY_TYPE_OFDM: |
12999 |
+ if (mphy->chandef.chan->band == NL80211_BAND_5GHZ) |
13000 |
+ sband = &mphy->sband_5g.sband; |
13001 |
+ else |
13002 |
+ sband = &mphy->sband_2g.sband; |
13003 |
+ |
13004 |
++ rate->mcs = mt76_get_rate(mphy->dev, sband, rate->mcs, cck); |
13005 |
+ rate->legacy = sband->bitrates[rate->mcs].bitrate; |
13006 |
+ break; |
13007 |
+ case MT_PHY_TYPE_HT: |
13008 |
+ case MT_PHY_TYPE_HT_GF: |
13009 |
+ rate->mcs += (rate->nss - 1) * 8; |
13010 |
+- flags |= RATE_INFO_FLAGS_MCS; |
13011 |
++ if (rate->mcs > 31) |
13012 |
++ return -EINVAL; |
13013 |
+ |
13014 |
++ rate->flags = RATE_INFO_FLAGS_MCS; |
13015 |
+ if (ra->gi) |
13016 |
+- flags |= RATE_INFO_FLAGS_SHORT_GI; |
13017 |
++ rate->flags |= RATE_INFO_FLAGS_SHORT_GI; |
13018 |
+ break; |
13019 |
+ case MT_PHY_TYPE_VHT: |
13020 |
+- flags |= RATE_INFO_FLAGS_VHT_MCS; |
13021 |
++ if (rate->mcs > 9) |
13022 |
++ return -EINVAL; |
13023 |
+ |
13024 |
++ rate->flags = RATE_INFO_FLAGS_VHT_MCS; |
13025 |
+ if (ra->gi) |
13026 |
+- flags |= RATE_INFO_FLAGS_SHORT_GI; |
13027 |
++ rate->flags |= RATE_INFO_FLAGS_SHORT_GI; |
13028 |
+ break; |
13029 |
+ case MT_PHY_TYPE_HE_SU: |
13030 |
+ case MT_PHY_TYPE_HE_EXT_SU: |
13031 |
+ case MT_PHY_TYPE_HE_TB: |
13032 |
+ case MT_PHY_TYPE_HE_MU: |
13033 |
++ if (ra->gi > NL80211_RATE_INFO_HE_GI_3_2 || rate->mcs > 11) |
13034 |
++ return -EINVAL; |
13035 |
++ |
13036 |
+ rate->he_gi = ra->gi; |
13037 |
+ rate->he_dcm = FIELD_GET(MT_RA_RATE_DCM_EN, r); |
13038 |
+- |
13039 |
+- flags |= RATE_INFO_FLAGS_HE_MCS; |
13040 |
++ rate->flags = RATE_INFO_FLAGS_HE_MCS; |
13041 |
+ break; |
13042 |
+ default: |
13043 |
+- break; |
13044 |
++ return -EINVAL; |
13045 |
+ } |
13046 |
+- rate->flags = flags; |
13047 |
+ |
13048 |
+ if (ru_idx) { |
13049 |
+ switch (ru_idx) { |
13050 |
+@@ -435,6 +443,8 @@ mt7915_mcu_tx_rate_parse(struct mt76_phy *mphy, struct mt7915_mcu_ra_info *ra, |
13051 |
+ break; |
13052 |
+ } |
13053 |
+ } |
13054 |
++ |
13055 |
++ return 0; |
13056 |
+ } |
13057 |
+ |
13058 |
+ static void |
13059 |
+@@ -465,12 +475,12 @@ mt7915_mcu_tx_rate_report(struct mt7915_dev *dev, struct sk_buff *skb) |
13060 |
+ mphy = dev->mt76.phy2; |
13061 |
+ |
13062 |
+ /* current rate */ |
13063 |
+- mt7915_mcu_tx_rate_parse(mphy, ra, &rate, curr); |
13064 |
+- stats->tx_rate = rate; |
13065 |
++ if (!mt7915_mcu_tx_rate_parse(mphy, ra, &rate, curr)) |
13066 |
++ stats->tx_rate = rate; |
13067 |
+ |
13068 |
+ /* probing rate */ |
13069 |
+- mt7915_mcu_tx_rate_parse(mphy, ra, &prob_rate, probe); |
13070 |
+- stats->prob_rate = prob_rate; |
13071 |
++ if (!mt7915_mcu_tx_rate_parse(mphy, ra, &prob_rate, probe)) |
13072 |
++ stats->prob_rate = prob_rate; |
13073 |
+ |
13074 |
+ if (attempts) { |
13075 |
+ u16 success = le16_to_cpu(ra->success); |
13076 |
+@@ -3469,9 +3479,8 @@ int mt7915_mcu_get_rx_rate(struct mt7915_phy *phy, struct ieee80211_vif *vif, |
13077 |
+ struct ieee80211_supported_band *sband; |
13078 |
+ struct mt7915_mcu_phy_rx_info *res; |
13079 |
+ struct sk_buff *skb; |
13080 |
+- u16 flags = 0; |
13081 |
+ int ret; |
13082 |
+- int i; |
13083 |
++ bool cck = false; |
13084 |
+ |
13085 |
+ ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD_PHY_STAT_INFO, |
13086 |
+ &req, sizeof(req), true, &skb); |
13087 |
+@@ -3485,48 +3494,53 @@ int mt7915_mcu_get_rx_rate(struct mt7915_phy *phy, struct ieee80211_vif *vif, |
13088 |
+ |
13089 |
+ switch (res->mode) { |
13090 |
+ case MT_PHY_TYPE_CCK: |
13091 |
++ cck = true; |
13092 |
++ fallthrough; |
13093 |
+ case MT_PHY_TYPE_OFDM: |
13094 |
+ if (mphy->chandef.chan->band == NL80211_BAND_5GHZ) |
13095 |
+ sband = &mphy->sband_5g.sband; |
13096 |
+ else |
13097 |
+ sband = &mphy->sband_2g.sband; |
13098 |
+ |
13099 |
+- for (i = 0; i < sband->n_bitrates; i++) { |
13100 |
+- if (rate->mcs != (sband->bitrates[i].hw_value & 0xf)) |
13101 |
+- continue; |
13102 |
+- |
13103 |
+- rate->legacy = sband->bitrates[i].bitrate; |
13104 |
+- break; |
13105 |
+- } |
13106 |
++ rate->mcs = mt76_get_rate(&dev->mt76, sband, rate->mcs, cck); |
13107 |
++ rate->legacy = sband->bitrates[rate->mcs].bitrate; |
13108 |
+ break; |
13109 |
+ case MT_PHY_TYPE_HT: |
13110 |
+ case MT_PHY_TYPE_HT_GF: |
13111 |
+- if (rate->mcs > 31) |
13112 |
+- return -EINVAL; |
13113 |
+- |
13114 |
+- flags |= RATE_INFO_FLAGS_MCS; |
13115 |
++ if (rate->mcs > 31) { |
13116 |
++ ret = -EINVAL; |
13117 |
++ goto out; |
13118 |
++ } |
13119 |
+ |
13120 |
++ rate->flags = RATE_INFO_FLAGS_MCS; |
13121 |
+ if (res->gi) |
13122 |
+- flags |= RATE_INFO_FLAGS_SHORT_GI; |
13123 |
++ rate->flags |= RATE_INFO_FLAGS_SHORT_GI; |
13124 |
+ break; |
13125 |
+ case MT_PHY_TYPE_VHT: |
13126 |
+- flags |= RATE_INFO_FLAGS_VHT_MCS; |
13127 |
++ if (rate->mcs > 9) { |
13128 |
++ ret = -EINVAL; |
13129 |
++ goto out; |
13130 |
++ } |
13131 |
+ |
13132 |
++ rate->flags = RATE_INFO_FLAGS_VHT_MCS; |
13133 |
+ if (res->gi) |
13134 |
+- flags |= RATE_INFO_FLAGS_SHORT_GI; |
13135 |
++ rate->flags |= RATE_INFO_FLAGS_SHORT_GI; |
13136 |
+ break; |
13137 |
+ case MT_PHY_TYPE_HE_SU: |
13138 |
+ case MT_PHY_TYPE_HE_EXT_SU: |
13139 |
+ case MT_PHY_TYPE_HE_TB: |
13140 |
+ case MT_PHY_TYPE_HE_MU: |
13141 |
++ if (res->gi > NL80211_RATE_INFO_HE_GI_3_2 || rate->mcs > 11) { |
13142 |
++ ret = -EINVAL; |
13143 |
++ goto out; |
13144 |
++ } |
13145 |
+ rate->he_gi = res->gi; |
13146 |
+- |
13147 |
+- flags |= RATE_INFO_FLAGS_HE_MCS; |
13148 |
++ rate->flags = RATE_INFO_FLAGS_HE_MCS; |
13149 |
+ break; |
13150 |
+ default: |
13151 |
+- break; |
13152 |
++ ret = -EINVAL; |
13153 |
++ goto out; |
13154 |
+ } |
13155 |
+- rate->flags = flags; |
13156 |
+ |
13157 |
+ switch (res->bw) { |
13158 |
+ case IEEE80211_STA_RX_BW_160: |
13159 |
+@@ -3543,7 +3557,8 @@ int mt7915_mcu_get_rx_rate(struct mt7915_phy *phy, struct ieee80211_vif *vif, |
13160 |
+ break; |
13161 |
+ } |
13162 |
+ |
13163 |
++out: |
13164 |
+ dev_kfree_skb(skb); |
13165 |
+ |
13166 |
+- return 0; |
13167 |
++ return ret; |
13168 |
+ } |
13169 |
+diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/mt7915.h b/drivers/net/wireless/mediatek/mt76/mt7915/mt7915.h |
13170 |
+index 94bed8a3a050a..6bfb6f1bb878b 100644 |
13171 |
+--- a/drivers/net/wireless/mediatek/mt76/mt7915/mt7915.h |
13172 |
++++ b/drivers/net/wireless/mediatek/mt76/mt7915/mt7915.h |
13173 |
+@@ -61,6 +61,7 @@ enum mt7915_rxq_id { |
13174 |
+ MT7915_RXQ_BAND1, |
13175 |
+ MT7915_RXQ_MCU_WM = 0, |
13176 |
+ MT7915_RXQ_MCU_WA, |
13177 |
++ MT7915_RXQ_MCU_WA_EXT, |
13178 |
+ }; |
13179 |
+ |
13180 |
+ struct mt7915_sta_stats { |
13181 |
+@@ -100,11 +101,11 @@ struct mt7915_vif { |
13182 |
+ }; |
13183 |
+ |
13184 |
+ struct mib_stats { |
13185 |
+- u16 ack_fail_cnt; |
13186 |
+- u16 fcs_err_cnt; |
13187 |
+- u16 rts_cnt; |
13188 |
+- u16 rts_retries_cnt; |
13189 |
+- u16 ba_miss_cnt; |
13190 |
++ u32 ack_fail_cnt; |
13191 |
++ u32 fcs_err_cnt; |
13192 |
++ u32 rts_cnt; |
13193 |
++ u32 rts_retries_cnt; |
13194 |
++ u32 ba_miss_cnt; |
13195 |
+ }; |
13196 |
+ |
13197 |
+ struct mt7915_phy { |
13198 |
+diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/pci.c b/drivers/net/wireless/mediatek/mt76/mt7915/pci.c |
13199 |
+index aeb86fbea41ca..99f11588601d5 100644 |
13200 |
+--- a/drivers/net/wireless/mediatek/mt76/mt7915/pci.c |
13201 |
++++ b/drivers/net/wireless/mediatek/mt76/mt7915/pci.c |
13202 |
+@@ -26,6 +26,7 @@ mt7915_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q) |
13203 |
+ [MT_RXQ_EXT] = MT_INT_RX_DONE_DATA1, |
13204 |
+ [MT_RXQ_MCU] = MT_INT_RX_DONE_WM, |
13205 |
+ [MT_RXQ_MCU_WA] = MT_INT_RX_DONE_WA, |
13206 |
++ [MT_RXQ_EXT_WA] = MT_INT_RX_DONE_WA_EXT, |
13207 |
+ }; |
13208 |
+ |
13209 |
+ mt7915_irq_enable(dev, rx_irq_mask[q]); |
13210 |
+@@ -67,6 +68,9 @@ static irqreturn_t mt7915_irq_handler(int irq, void *dev_instance) |
13211 |
+ if (intr & MT_INT_RX_DONE_WA) |
13212 |
+ napi_schedule(&dev->mt76.napi[MT_RXQ_MCU_WA]); |
13213 |
+ |
13214 |
++ if (intr & MT_INT_RX_DONE_WA_EXT) |
13215 |
++ napi_schedule(&dev->mt76.napi[MT_RXQ_EXT_WA]); |
13216 |
++ |
13217 |
+ if (intr & MT_INT_MCU_CMD) { |
13218 |
+ u32 val = mt76_rr(dev, MT_MCU_CMD); |
13219 |
+ |
13220 |
+diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/regs.h b/drivers/net/wireless/mediatek/mt76/mt7915/regs.h |
13221 |
+index 848703e6eb7ce..294cc07693315 100644 |
13222 |
+--- a/drivers/net/wireless/mediatek/mt76/mt7915/regs.h |
13223 |
++++ b/drivers/net/wireless/mediatek/mt76/mt7915/regs.h |
13224 |
+@@ -342,7 +342,8 @@ |
13225 |
+ #define MT_INT_RX_DONE_DATA1 BIT(17) |
13226 |
+ #define MT_INT_RX_DONE_WM BIT(0) |
13227 |
+ #define MT_INT_RX_DONE_WA BIT(1) |
13228 |
+-#define MT_INT_RX_DONE_ALL (BIT(0) | BIT(1) | GENMASK(17, 16)) |
13229 |
++#define MT_INT_RX_DONE_WA_EXT BIT(2) |
13230 |
++#define MT_INT_RX_DONE_ALL (GENMASK(2, 0) | GENMASK(17, 16)) |
13231 |
+ #define MT_INT_TX_DONE_MCU_WA BIT(15) |
13232 |
+ #define MT_INT_TX_DONE_FWDL BIT(26) |
13233 |
+ #define MT_INT_TX_DONE_MCU_WM BIT(27) |
13234 |
+diff --git a/drivers/net/wireless/mediatek/mt76/sdio.c b/drivers/net/wireless/mediatek/mt76/sdio.c |
13235 |
+index 0b6facb17ff72..a18d2896ee1fb 100644 |
13236 |
+--- a/drivers/net/wireless/mediatek/mt76/sdio.c |
13237 |
++++ b/drivers/net/wireless/mediatek/mt76/sdio.c |
13238 |
+@@ -256,6 +256,9 @@ mt76s_tx_queue_skb(struct mt76_dev *dev, struct mt76_queue *q, |
13239 |
+ |
13240 |
+ q->entry[q->head].skb = tx_info.skb; |
13241 |
+ q->entry[q->head].buf_sz = len; |
13242 |
++ |
13243 |
++ smp_wmb(); |
13244 |
++ |
13245 |
+ q->head = (q->head + 1) % q->ndesc; |
13246 |
+ q->queued++; |
13247 |
+ |
13248 |
+diff --git a/drivers/net/wireless/mediatek/mt76/tx.c b/drivers/net/wireless/mediatek/mt76/tx.c |
13249 |
+index 25627e70bdad2..c678f3e01311d 100644 |
13250 |
+--- a/drivers/net/wireless/mediatek/mt76/tx.c |
13251 |
++++ b/drivers/net/wireless/mediatek/mt76/tx.c |
13252 |
+@@ -454,24 +454,18 @@ mt76_txq_schedule_list(struct mt76_phy *phy, enum mt76_txq_id qid) |
13253 |
+ struct mt76_wcid *wcid; |
13254 |
+ int ret = 0; |
13255 |
+ |
13256 |
+- spin_lock_bh(&q->lock); |
13257 |
+ while (1) { |
13258 |
++ int n_frames = 0; |
13259 |
++ |
13260 |
+ if (test_bit(MT76_STATE_PM, &phy->state) || |
13261 |
+- test_bit(MT76_RESET, &phy->state)) { |
13262 |
+- ret = -EBUSY; |
13263 |
+- break; |
13264 |
+- } |
13265 |
++ test_bit(MT76_RESET, &phy->state)) |
13266 |
++ return -EBUSY; |
13267 |
+ |
13268 |
+ if (dev->queue_ops->tx_cleanup && |
13269 |
+ q->queued + 2 * MT_TXQ_FREE_THR >= q->ndesc) { |
13270 |
+- spin_unlock_bh(&q->lock); |
13271 |
+ dev->queue_ops->tx_cleanup(dev, q, false); |
13272 |
+- spin_lock_bh(&q->lock); |
13273 |
+ } |
13274 |
+ |
13275 |
+- if (mt76_txq_stopped(q)) |
13276 |
+- break; |
13277 |
+- |
13278 |
+ txq = ieee80211_next_txq(phy->hw, qid); |
13279 |
+ if (!txq) |
13280 |
+ break; |
13281 |
+@@ -481,6 +475,8 @@ mt76_txq_schedule_list(struct mt76_phy *phy, enum mt76_txq_id qid) |
13282 |
+ if (wcid && test_bit(MT_WCID_FLAG_PS, &wcid->flags)) |
13283 |
+ continue; |
13284 |
+ |
13285 |
++ spin_lock_bh(&q->lock); |
13286 |
++ |
13287 |
+ if (mtxq->send_bar && mtxq->aggr) { |
13288 |
+ struct ieee80211_txq *txq = mtxq_to_txq(mtxq); |
13289 |
+ struct ieee80211_sta *sta = txq->sta; |
13290 |
+@@ -494,10 +490,18 @@ mt76_txq_schedule_list(struct mt76_phy *phy, enum mt76_txq_id qid) |
13291 |
+ spin_lock_bh(&q->lock); |
13292 |
+ } |
13293 |
+ |
13294 |
+- ret += mt76_txq_send_burst(phy, q, mtxq); |
13295 |
++ if (!mt76_txq_stopped(q)) |
13296 |
++ n_frames = mt76_txq_send_burst(phy, q, mtxq); |
13297 |
++ |
13298 |
++ spin_unlock_bh(&q->lock); |
13299 |
++ |
13300 |
+ ieee80211_return_txq(phy->hw, txq, false); |
13301 |
++ |
13302 |
++ if (unlikely(n_frames < 0)) |
13303 |
++ return n_frames; |
13304 |
++ |
13305 |
++ ret += n_frames; |
13306 |
+ } |
13307 |
+- spin_unlock_bh(&q->lock); |
13308 |
+ |
13309 |
+ return ret; |
13310 |
+ } |
13311 |
+diff --git a/drivers/net/wireless/mediatek/mt7601u/eeprom.c b/drivers/net/wireless/mediatek/mt7601u/eeprom.c |
13312 |
+index c868582c5d225..aa3b64902cf9b 100644 |
13313 |
+--- a/drivers/net/wireless/mediatek/mt7601u/eeprom.c |
13314 |
++++ b/drivers/net/wireless/mediatek/mt7601u/eeprom.c |
13315 |
+@@ -99,7 +99,7 @@ mt7601u_has_tssi(struct mt7601u_dev *dev, u8 *eeprom) |
13316 |
+ { |
13317 |
+ u16 nic_conf1 = get_unaligned_le16(eeprom + MT_EE_NIC_CONF_1); |
13318 |
+ |
13319 |
+- return ~nic_conf1 && (nic_conf1 & MT_EE_NIC_CONF_1_TX_ALC_EN); |
13320 |
++ return (u16)~nic_conf1 && (nic_conf1 & MT_EE_NIC_CONF_1_TX_ALC_EN); |
13321 |
+ } |
13322 |
+ |
13323 |
+ static void |
13324 |
+diff --git a/drivers/net/wireless/microchip/wilc1000/sdio.c b/drivers/net/wireless/microchip/wilc1000/sdio.c |
13325 |
+index 351ff909ab1c7..e14b9fc2c67ac 100644 |
13326 |
+--- a/drivers/net/wireless/microchip/wilc1000/sdio.c |
13327 |
++++ b/drivers/net/wireless/microchip/wilc1000/sdio.c |
13328 |
+@@ -947,7 +947,7 @@ static int wilc_sdio_sync_ext(struct wilc *wilc, int nint) |
13329 |
+ for (i = 0; (i < 3) && (nint > 0); i++, nint--) |
13330 |
+ reg |= BIT(i); |
13331 |
+ |
13332 |
+- ret = wilc_sdio_read_reg(wilc, WILC_INTR2_ENABLE, ®); |
13333 |
++ ret = wilc_sdio_write_reg(wilc, WILC_INTR2_ENABLE, reg); |
13334 |
+ if (ret) { |
13335 |
+ dev_err(&func->dev, |
13336 |
+ "Failed write reg (%08x)...\n", |
13337 |
+diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/table.c b/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/table.c |
13338 |
+index 27c8a5d965208..fcaaf664cbec5 100644 |
13339 |
+--- a/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/table.c |
13340 |
++++ b/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/table.c |
13341 |
+@@ -249,7 +249,7 @@ u32 RTL8821AE_PHY_REG_ARRAY[] = { |
13342 |
+ 0x824, 0x00030FE0, |
13343 |
+ 0x828, 0x00000000, |
13344 |
+ 0x82C, 0x002081DD, |
13345 |
+- 0x830, 0x2AAA8E24, |
13346 |
++ 0x830, 0x2AAAEEC8, |
13347 |
+ 0x834, 0x0037A706, |
13348 |
+ 0x838, 0x06489B44, |
13349 |
+ 0x83C, 0x0000095B, |
13350 |
+@@ -324,10 +324,10 @@ u32 RTL8821AE_PHY_REG_ARRAY[] = { |
13351 |
+ 0x9D8, 0x00000000, |
13352 |
+ 0x9DC, 0x00000000, |
13353 |
+ 0x9E0, 0x00005D00, |
13354 |
+- 0x9E4, 0x00000002, |
13355 |
++ 0x9E4, 0x00000003, |
13356 |
+ 0x9E8, 0x00000001, |
13357 |
+ 0xA00, 0x00D047C8, |
13358 |
+- 0xA04, 0x01FF000C, |
13359 |
++ 0xA04, 0x01FF800C, |
13360 |
+ 0xA08, 0x8C8A8300, |
13361 |
+ 0xA0C, 0x2E68000F, |
13362 |
+ 0xA10, 0x9500BB78, |
13363 |
+@@ -1320,7 +1320,11 @@ u32 RTL8821AE_RADIOA_ARRAY[] = { |
13364 |
+ 0x083, 0x00021800, |
13365 |
+ 0x084, 0x00028000, |
13366 |
+ 0x085, 0x00048000, |
13367 |
++ 0x80000111, 0x00000000, 0x40000000, 0x00000000, |
13368 |
++ 0x086, 0x0009483A, |
13369 |
++ 0xA0000000, 0x00000000, |
13370 |
+ 0x086, 0x00094838, |
13371 |
++ 0xB0000000, 0x00000000, |
13372 |
+ 0x087, 0x00044980, |
13373 |
+ 0x088, 0x00048000, |
13374 |
+ 0x089, 0x0000D480, |
13375 |
+@@ -1409,36 +1413,32 @@ u32 RTL8821AE_RADIOA_ARRAY[] = { |
13376 |
+ 0x03C, 0x000CA000, |
13377 |
+ 0x0EF, 0x00000000, |
13378 |
+ 0x0EF, 0x00001100, |
13379 |
+- 0xFF0F0104, 0xABCD, |
13380 |
++ 0x80000111, 0x00000000, 0x40000000, 0x00000000, |
13381 |
+ 0x034, 0x0004ADF3, |
13382 |
+ 0x034, 0x00049DF0, |
13383 |
+- 0xFF0F0204, 0xCDEF, |
13384 |
++ 0x90000110, 0x00000000, 0x40000000, 0x00000000, |
13385 |
+ 0x034, 0x0004ADF3, |
13386 |
+ 0x034, 0x00049DF0, |
13387 |
+- 0xFF0F0404, 0xCDEF, |
13388 |
+- 0x034, 0x0004ADF3, |
13389 |
+- 0x034, 0x00049DF0, |
13390 |
+- 0xFF0F0200, 0xCDEF, |
13391 |
++ 0x90000210, 0x00000000, 0x40000000, 0x00000000, |
13392 |
+ 0x034, 0x0004ADF5, |
13393 |
+ 0x034, 0x00049DF2, |
13394 |
+- 0xFF0F02C0, 0xCDEF, |
13395 |
++ 0x9000020c, 0x00000000, 0x40000000, 0x00000000, |
13396 |
++ 0x034, 0x0004A0F3, |
13397 |
++ 0x034, 0x000490B1, |
13398 |
++ 0x9000040c, 0x00000000, 0x40000000, 0x00000000, |
13399 |
+ 0x034, 0x0004A0F3, |
13400 |
+ 0x034, 0x000490B1, |
13401 |
+- 0xCDCDCDCD, 0xCDCD, |
13402 |
++ 0x90000200, 0x00000000, 0x40000000, 0x00000000, |
13403 |
++ 0x034, 0x0004ADF5, |
13404 |
++ 0x034, 0x00049DF2, |
13405 |
++ 0x90000410, 0x00000000, 0x40000000, 0x00000000, |
13406 |
++ 0x034, 0x0004ADF3, |
13407 |
++ 0x034, 0x00049DF0, |
13408 |
++ 0xA0000000, 0x00000000, |
13409 |
+ 0x034, 0x0004ADF7, |
13410 |
+ 0x034, 0x00049DF3, |
13411 |
+- 0xFF0F0104, 0xDEAD, |
13412 |
+- 0xFF0F0104, 0xABCD, |
13413 |
+- 0x034, 0x00048DED, |
13414 |
+- 0x034, 0x00047DEA, |
13415 |
+- 0x034, 0x00046DE7, |
13416 |
+- 0x034, 0x00045CE9, |
13417 |
+- 0x034, 0x00044CE6, |
13418 |
+- 0x034, 0x000438C6, |
13419 |
+- 0x034, 0x00042886, |
13420 |
+- 0x034, 0x00041486, |
13421 |
+- 0x034, 0x00040447, |
13422 |
+- 0xFF0F0204, 0xCDEF, |
13423 |
++ 0xB0000000, 0x00000000, |
13424 |
++ 0x80000111, 0x00000000, 0x40000000, 0x00000000, |
13425 |
+ 0x034, 0x00048DED, |
13426 |
+ 0x034, 0x00047DEA, |
13427 |
+ 0x034, 0x00046DE7, |
13428 |
+@@ -1448,7 +1448,7 @@ u32 RTL8821AE_RADIOA_ARRAY[] = { |
13429 |
+ 0x034, 0x00042886, |
13430 |
+ 0x034, 0x00041486, |
13431 |
+ 0x034, 0x00040447, |
13432 |
+- 0xFF0F0404, 0xCDEF, |
13433 |
++ 0x90000110, 0x00000000, 0x40000000, 0x00000000, |
13434 |
+ 0x034, 0x00048DED, |
13435 |
+ 0x034, 0x00047DEA, |
13436 |
+ 0x034, 0x00046DE7, |
13437 |
+@@ -1458,7 +1458,17 @@ u32 RTL8821AE_RADIOA_ARRAY[] = { |
13438 |
+ 0x034, 0x00042886, |
13439 |
+ 0x034, 0x00041486, |
13440 |
+ 0x034, 0x00040447, |
13441 |
+- 0xFF0F02C0, 0xCDEF, |
13442 |
++ 0x9000020c, 0x00000000, 0x40000000, 0x00000000, |
13443 |
++ 0x034, 0x000480AE, |
13444 |
++ 0x034, 0x000470AB, |
13445 |
++ 0x034, 0x0004608B, |
13446 |
++ 0x034, 0x00045069, |
13447 |
++ 0x034, 0x00044048, |
13448 |
++ 0x034, 0x00043045, |
13449 |
++ 0x034, 0x00042026, |
13450 |
++ 0x034, 0x00041023, |
13451 |
++ 0x034, 0x00040002, |
13452 |
++ 0x9000040c, 0x00000000, 0x40000000, 0x00000000, |
13453 |
+ 0x034, 0x000480AE, |
13454 |
+ 0x034, 0x000470AB, |
13455 |
+ 0x034, 0x0004608B, |
13456 |
+@@ -1468,7 +1478,17 @@ u32 RTL8821AE_RADIOA_ARRAY[] = { |
13457 |
+ 0x034, 0x00042026, |
13458 |
+ 0x034, 0x00041023, |
13459 |
+ 0x034, 0x00040002, |
13460 |
+- 0xCDCDCDCD, 0xCDCD, |
13461 |
++ 0x90000410, 0x00000000, 0x40000000, 0x00000000, |
13462 |
++ 0x034, 0x00048DED, |
13463 |
++ 0x034, 0x00047DEA, |
13464 |
++ 0x034, 0x00046DE7, |
13465 |
++ 0x034, 0x00045CE9, |
13466 |
++ 0x034, 0x00044CE6, |
13467 |
++ 0x034, 0x000438C6, |
13468 |
++ 0x034, 0x00042886, |
13469 |
++ 0x034, 0x00041486, |
13470 |
++ 0x034, 0x00040447, |
13471 |
++ 0xA0000000, 0x00000000, |
13472 |
+ 0x034, 0x00048DEF, |
13473 |
+ 0x034, 0x00047DEC, |
13474 |
+ 0x034, 0x00046DE9, |
13475 |
+@@ -1478,38 +1498,36 @@ u32 RTL8821AE_RADIOA_ARRAY[] = { |
13476 |
+ 0x034, 0x0004248A, |
13477 |
+ 0x034, 0x0004108D, |
13478 |
+ 0x034, 0x0004008A, |
13479 |
+- 0xFF0F0104, 0xDEAD, |
13480 |
+- 0xFF0F0200, 0xABCD, |
13481 |
++ 0xB0000000, 0x00000000, |
13482 |
++ 0x80000210, 0x00000000, 0x40000000, 0x00000000, |
13483 |
+ 0x034, 0x0002ADF4, |
13484 |
+- 0xFF0F02C0, 0xCDEF, |
13485 |
++ 0x9000020c, 0x00000000, 0x40000000, 0x00000000, |
13486 |
++ 0x034, 0x0002A0F3, |
13487 |
++ 0x9000040c, 0x00000000, 0x40000000, 0x00000000, |
13488 |
+ 0x034, 0x0002A0F3, |
13489 |
+- 0xCDCDCDCD, 0xCDCD, |
13490 |
++ 0x90000200, 0x00000000, 0x40000000, 0x00000000, |
13491 |
++ 0x034, 0x0002ADF4, |
13492 |
++ 0xA0000000, 0x00000000, |
13493 |
+ 0x034, 0x0002ADF7, |
13494 |
+- 0xFF0F0200, 0xDEAD, |
13495 |
+- 0xFF0F0104, 0xABCD, |
13496 |
+- 0x034, 0x00029DF4, |
13497 |
+- 0xFF0F0204, 0xCDEF, |
13498 |
++ 0xB0000000, 0x00000000, |
13499 |
++ 0x80000111, 0x00000000, 0x40000000, 0x00000000, |
13500 |
+ 0x034, 0x00029DF4, |
13501 |
+- 0xFF0F0404, 0xCDEF, |
13502 |
++ 0x90000110, 0x00000000, 0x40000000, 0x00000000, |
13503 |
+ 0x034, 0x00029DF4, |
13504 |
+- 0xFF0F0200, 0xCDEF, |
13505 |
++ 0x90000210, 0x00000000, 0x40000000, 0x00000000, |
13506 |
+ 0x034, 0x00029DF1, |
13507 |
+- 0xFF0F02C0, 0xCDEF, |
13508 |
++ 0x9000020c, 0x00000000, 0x40000000, 0x00000000, |
13509 |
++ 0x034, 0x000290F0, |
13510 |
++ 0x9000040c, 0x00000000, 0x40000000, 0x00000000, |
13511 |
+ 0x034, 0x000290F0, |
13512 |
+- 0xCDCDCDCD, 0xCDCD, |
13513 |
++ 0x90000200, 0x00000000, 0x40000000, 0x00000000, |
13514 |
++ 0x034, 0x00029DF1, |
13515 |
++ 0x90000410, 0x00000000, 0x40000000, 0x00000000, |
13516 |
++ 0x034, 0x00029DF4, |
13517 |
++ 0xA0000000, 0x00000000, |
13518 |
+ 0x034, 0x00029DF2, |
13519 |
+- 0xFF0F0104, 0xDEAD, |
13520 |
+- 0xFF0F0104, 0xABCD, |
13521 |
+- 0x034, 0x00028DF1, |
13522 |
+- 0x034, 0x00027DEE, |
13523 |
+- 0x034, 0x00026DEB, |
13524 |
+- 0x034, 0x00025CEC, |
13525 |
+- 0x034, 0x00024CE9, |
13526 |
+- 0x034, 0x000238CA, |
13527 |
+- 0x034, 0x00022889, |
13528 |
+- 0x034, 0x00021489, |
13529 |
+- 0x034, 0x0002044A, |
13530 |
+- 0xFF0F0204, 0xCDEF, |
13531 |
++ 0xB0000000, 0x00000000, |
13532 |
++ 0x80000111, 0x00000000, 0x40000000, 0x00000000, |
13533 |
+ 0x034, 0x00028DF1, |
13534 |
+ 0x034, 0x00027DEE, |
13535 |
+ 0x034, 0x00026DEB, |
13536 |
+@@ -1519,7 +1537,7 @@ u32 RTL8821AE_RADIOA_ARRAY[] = { |
13537 |
+ 0x034, 0x00022889, |
13538 |
+ 0x034, 0x00021489, |
13539 |
+ 0x034, 0x0002044A, |
13540 |
+- 0xFF0F0404, 0xCDEF, |
13541 |
++ 0x90000110, 0x00000000, 0x40000000, 0x00000000, |
13542 |
+ 0x034, 0x00028DF1, |
13543 |
+ 0x034, 0x00027DEE, |
13544 |
+ 0x034, 0x00026DEB, |
13545 |
+@@ -1529,7 +1547,7 @@ u32 RTL8821AE_RADIOA_ARRAY[] = { |
13546 |
+ 0x034, 0x00022889, |
13547 |
+ 0x034, 0x00021489, |
13548 |
+ 0x034, 0x0002044A, |
13549 |
+- 0xFF0F02C0, 0xCDEF, |
13550 |
++ 0x9000020c, 0x00000000, 0x40000000, 0x00000000, |
13551 |
+ 0x034, 0x000280AF, |
13552 |
+ 0x034, 0x000270AC, |
13553 |
+ 0x034, 0x0002608B, |
13554 |
+@@ -1539,7 +1557,27 @@ u32 RTL8821AE_RADIOA_ARRAY[] = { |
13555 |
+ 0x034, 0x00022026, |
13556 |
+ 0x034, 0x00021023, |
13557 |
+ 0x034, 0x00020002, |
13558 |
+- 0xCDCDCDCD, 0xCDCD, |
13559 |
++ 0x9000040c, 0x00000000, 0x40000000, 0x00000000, |
13560 |
++ 0x034, 0x000280AF, |
13561 |
++ 0x034, 0x000270AC, |
13562 |
++ 0x034, 0x0002608B, |
13563 |
++ 0x034, 0x00025069, |
13564 |
++ 0x034, 0x00024048, |
13565 |
++ 0x034, 0x00023045, |
13566 |
++ 0x034, 0x00022026, |
13567 |
++ 0x034, 0x00021023, |
13568 |
++ 0x034, 0x00020002, |
13569 |
++ 0x90000410, 0x00000000, 0x40000000, 0x00000000, |
13570 |
++ 0x034, 0x00028DF1, |
13571 |
++ 0x034, 0x00027DEE, |
13572 |
++ 0x034, 0x00026DEB, |
13573 |
++ 0x034, 0x00025CEC, |
13574 |
++ 0x034, 0x00024CE9, |
13575 |
++ 0x034, 0x000238CA, |
13576 |
++ 0x034, 0x00022889, |
13577 |
++ 0x034, 0x00021489, |
13578 |
++ 0x034, 0x0002044A, |
13579 |
++ 0xA0000000, 0x00000000, |
13580 |
+ 0x034, 0x00028DEE, |
13581 |
+ 0x034, 0x00027DEB, |
13582 |
+ 0x034, 0x00026CCD, |
13583 |
+@@ -1549,27 +1587,24 @@ u32 RTL8821AE_RADIOA_ARRAY[] = { |
13584 |
+ 0x034, 0x00022849, |
13585 |
+ 0x034, 0x00021449, |
13586 |
+ 0x034, 0x0002004D, |
13587 |
+- 0xFF0F0104, 0xDEAD, |
13588 |
+- 0xFF0F02C0, 0xABCD, |
13589 |
++ 0xB0000000, 0x00000000, |
13590 |
++ 0x8000020c, 0x00000000, 0x40000000, 0x00000000, |
13591 |
++ 0x034, 0x0000A0D7, |
13592 |
++ 0x034, 0x000090D3, |
13593 |
++ 0x034, 0x000080B1, |
13594 |
++ 0x034, 0x000070AE, |
13595 |
++ 0x9000040c, 0x00000000, 0x40000000, 0x00000000, |
13596 |
+ 0x034, 0x0000A0D7, |
13597 |
+ 0x034, 0x000090D3, |
13598 |
+ 0x034, 0x000080B1, |
13599 |
+ 0x034, 0x000070AE, |
13600 |
+- 0xCDCDCDCD, 0xCDCD, |
13601 |
++ 0xA0000000, 0x00000000, |
13602 |
+ 0x034, 0x0000ADF7, |
13603 |
+ 0x034, 0x00009DF4, |
13604 |
+ 0x034, 0x00008DF1, |
13605 |
+ 0x034, 0x00007DEE, |
13606 |
+- 0xFF0F02C0, 0xDEAD, |
13607 |
+- 0xFF0F0104, 0xABCD, |
13608 |
+- 0x034, 0x00006DEB, |
13609 |
+- 0x034, 0x00005CEC, |
13610 |
+- 0x034, 0x00004CE9, |
13611 |
+- 0x034, 0x000038CA, |
13612 |
+- 0x034, 0x00002889, |
13613 |
+- 0x034, 0x00001489, |
13614 |
+- 0x034, 0x0000044A, |
13615 |
+- 0xFF0F0204, 0xCDEF, |
13616 |
++ 0xB0000000, 0x00000000, |
13617 |
++ 0x80000111, 0x00000000, 0x40000000, 0x00000000, |
13618 |
+ 0x034, 0x00006DEB, |
13619 |
+ 0x034, 0x00005CEC, |
13620 |
+ 0x034, 0x00004CE9, |
13621 |
+@@ -1577,7 +1612,7 @@ u32 RTL8821AE_RADIOA_ARRAY[] = { |
13622 |
+ 0x034, 0x00002889, |
13623 |
+ 0x034, 0x00001489, |
13624 |
+ 0x034, 0x0000044A, |
13625 |
+- 0xFF0F0404, 0xCDEF, |
13626 |
++ 0x90000110, 0x00000000, 0x40000000, 0x00000000, |
13627 |
+ 0x034, 0x00006DEB, |
13628 |
+ 0x034, 0x00005CEC, |
13629 |
+ 0x034, 0x00004CE9, |
13630 |
+@@ -1585,7 +1620,7 @@ u32 RTL8821AE_RADIOA_ARRAY[] = { |
13631 |
+ 0x034, 0x00002889, |
13632 |
+ 0x034, 0x00001489, |
13633 |
+ 0x034, 0x0000044A, |
13634 |
+- 0xFF0F02C0, 0xCDEF, |
13635 |
++ 0x9000020c, 0x00000000, 0x40000000, 0x00000000, |
13636 |
+ 0x034, 0x0000608D, |
13637 |
+ 0x034, 0x0000506B, |
13638 |
+ 0x034, 0x0000404A, |
13639 |
+@@ -1593,7 +1628,23 @@ u32 RTL8821AE_RADIOA_ARRAY[] = { |
13640 |
+ 0x034, 0x00002044, |
13641 |
+ 0x034, 0x00001025, |
13642 |
+ 0x034, 0x00000004, |
13643 |
+- 0xCDCDCDCD, 0xCDCD, |
13644 |
++ 0x9000040c, 0x00000000, 0x40000000, 0x00000000, |
13645 |
++ 0x034, 0x0000608D, |
13646 |
++ 0x034, 0x0000506B, |
13647 |
++ 0x034, 0x0000404A, |
13648 |
++ 0x034, 0x00003047, |
13649 |
++ 0x034, 0x00002044, |
13650 |
++ 0x034, 0x00001025, |
13651 |
++ 0x034, 0x00000004, |
13652 |
++ 0x90000410, 0x00000000, 0x40000000, 0x00000000, |
13653 |
++ 0x034, 0x00006DEB, |
13654 |
++ 0x034, 0x00005CEC, |
13655 |
++ 0x034, 0x00004CE9, |
13656 |
++ 0x034, 0x000038CA, |
13657 |
++ 0x034, 0x00002889, |
13658 |
++ 0x034, 0x00001489, |
13659 |
++ 0x034, 0x0000044A, |
13660 |
++ 0xA0000000, 0x00000000, |
13661 |
+ 0x034, 0x00006DCD, |
13662 |
+ 0x034, 0x00005CCD, |
13663 |
+ 0x034, 0x00004CCA, |
13664 |
+@@ -1601,11 +1652,11 @@ u32 RTL8821AE_RADIOA_ARRAY[] = { |
13665 |
+ 0x034, 0x00002888, |
13666 |
+ 0x034, 0x00001488, |
13667 |
+ 0x034, 0x00000486, |
13668 |
+- 0xFF0F0104, 0xDEAD, |
13669 |
++ 0xB0000000, 0x00000000, |
13670 |
+ 0x0EF, 0x00000000, |
13671 |
+ 0x018, 0x0001712A, |
13672 |
+ 0x0EF, 0x00000040, |
13673 |
+- 0xFF0F0104, 0xABCD, |
13674 |
++ 0x80000111, 0x00000000, 0x40000000, 0x00000000, |
13675 |
+ 0x035, 0x00000187, |
13676 |
+ 0x035, 0x00008187, |
13677 |
+ 0x035, 0x00010187, |
13678 |
+@@ -1615,7 +1666,7 @@ u32 RTL8821AE_RADIOA_ARRAY[] = { |
13679 |
+ 0x035, 0x00040188, |
13680 |
+ 0x035, 0x00048188, |
13681 |
+ 0x035, 0x00050188, |
13682 |
+- 0xFF0F0204, 0xCDEF, |
13683 |
++ 0x90000110, 0x00000000, 0x40000000, 0x00000000, |
13684 |
+ 0x035, 0x00000187, |
13685 |
+ 0x035, 0x00008187, |
13686 |
+ 0x035, 0x00010187, |
13687 |
+@@ -1625,7 +1676,37 @@ u32 RTL8821AE_RADIOA_ARRAY[] = { |
13688 |
+ 0x035, 0x00040188, |
13689 |
+ 0x035, 0x00048188, |
13690 |
+ 0x035, 0x00050188, |
13691 |
+- 0xFF0F0404, 0xCDEF, |
13692 |
++ 0x90000210, 0x00000000, 0x40000000, 0x00000000, |
13693 |
++ 0x035, 0x00000128, |
13694 |
++ 0x035, 0x00008128, |
13695 |
++ 0x035, 0x00010128, |
13696 |
++ 0x035, 0x000201C8, |
13697 |
++ 0x035, 0x000281C8, |
13698 |
++ 0x035, 0x000301C8, |
13699 |
++ 0x035, 0x000401C8, |
13700 |
++ 0x035, 0x000481C8, |
13701 |
++ 0x035, 0x000501C8, |
13702 |
++ 0x9000040c, 0x00000000, 0x40000000, 0x00000000, |
13703 |
++ 0x035, 0x00000145, |
13704 |
++ 0x035, 0x00008145, |
13705 |
++ 0x035, 0x00010145, |
13706 |
++ 0x035, 0x00020196, |
13707 |
++ 0x035, 0x00028196, |
13708 |
++ 0x035, 0x00030196, |
13709 |
++ 0x035, 0x000401C7, |
13710 |
++ 0x035, 0x000481C7, |
13711 |
++ 0x035, 0x000501C7, |
13712 |
++ 0x90000200, 0x00000000, 0x40000000, 0x00000000, |
13713 |
++ 0x035, 0x00000128, |
13714 |
++ 0x035, 0x00008128, |
13715 |
++ 0x035, 0x00010128, |
13716 |
++ 0x035, 0x000201C8, |
13717 |
++ 0x035, 0x000281C8, |
13718 |
++ 0x035, 0x000301C8, |
13719 |
++ 0x035, 0x000401C8, |
13720 |
++ 0x035, 0x000481C8, |
13721 |
++ 0x035, 0x000501C8, |
13722 |
++ 0x90000410, 0x00000000, 0x40000000, 0x00000000, |
13723 |
+ 0x035, 0x00000187, |
13724 |
+ 0x035, 0x00008187, |
13725 |
+ 0x035, 0x00010187, |
13726 |
+@@ -1635,7 +1716,7 @@ u32 RTL8821AE_RADIOA_ARRAY[] = { |
13727 |
+ 0x035, 0x00040188, |
13728 |
+ 0x035, 0x00048188, |
13729 |
+ 0x035, 0x00050188, |
13730 |
+- 0xCDCDCDCD, 0xCDCD, |
13731 |
++ 0xA0000000, 0x00000000, |
13732 |
+ 0x035, 0x00000145, |
13733 |
+ 0x035, 0x00008145, |
13734 |
+ 0x035, 0x00010145, |
13735 |
+@@ -1645,11 +1726,11 @@ u32 RTL8821AE_RADIOA_ARRAY[] = { |
13736 |
+ 0x035, 0x000401C7, |
13737 |
+ 0x035, 0x000481C7, |
13738 |
+ 0x035, 0x000501C7, |
13739 |
+- 0xFF0F0104, 0xDEAD, |
13740 |
++ 0xB0000000, 0x00000000, |
13741 |
+ 0x0EF, 0x00000000, |
13742 |
+ 0x018, 0x0001712A, |
13743 |
+ 0x0EF, 0x00000010, |
13744 |
+- 0xFF0F0104, 0xABCD, |
13745 |
++ 0x80000111, 0x00000000, 0x40000000, 0x00000000, |
13746 |
+ 0x036, 0x00085733, |
13747 |
+ 0x036, 0x0008D733, |
13748 |
+ 0x036, 0x00095733, |
13749 |
+@@ -1662,7 +1743,7 @@ u32 RTL8821AE_RADIOA_ARRAY[] = { |
13750 |
+ 0x036, 0x000CE4B4, |
13751 |
+ 0x036, 0x000D64B4, |
13752 |
+ 0x036, 0x000DE4B4, |
13753 |
+- 0xFF0F0204, 0xCDEF, |
13754 |
++ 0x90000110, 0x00000000, 0x40000000, 0x00000000, |
13755 |
+ 0x036, 0x00085733, |
13756 |
+ 0x036, 0x0008D733, |
13757 |
+ 0x036, 0x00095733, |
13758 |
+@@ -1675,7 +1756,46 @@ u32 RTL8821AE_RADIOA_ARRAY[] = { |
13759 |
+ 0x036, 0x000CE4B4, |
13760 |
+ 0x036, 0x000D64B4, |
13761 |
+ 0x036, 0x000DE4B4, |
13762 |
+- 0xFF0F0404, 0xCDEF, |
13763 |
++ 0x90000210, 0x00000000, 0x40000000, 0x00000000, |
13764 |
++ 0x036, 0x000063B5, |
13765 |
++ 0x036, 0x0000E3B5, |
13766 |
++ 0x036, 0x000163B5, |
13767 |
++ 0x036, 0x0001E3B5, |
13768 |
++ 0x036, 0x000263B5, |
13769 |
++ 0x036, 0x0002E3B5, |
13770 |
++ 0x036, 0x000363B5, |
13771 |
++ 0x036, 0x0003E3B5, |
13772 |
++ 0x036, 0x000463B5, |
13773 |
++ 0x036, 0x0004E3B5, |
13774 |
++ 0x036, 0x000563B5, |
13775 |
++ 0x036, 0x0005E3B5, |
13776 |
++ 0x9000040c, 0x00000000, 0x40000000, 0x00000000, |
13777 |
++ 0x036, 0x000056B3, |
13778 |
++ 0x036, 0x0000D6B3, |
13779 |
++ 0x036, 0x000156B3, |
13780 |
++ 0x036, 0x0001D6B3, |
13781 |
++ 0x036, 0x00026634, |
13782 |
++ 0x036, 0x0002E634, |
13783 |
++ 0x036, 0x00036634, |
13784 |
++ 0x036, 0x0003E634, |
13785 |
++ 0x036, 0x000467B4, |
13786 |
++ 0x036, 0x0004E7B4, |
13787 |
++ 0x036, 0x000567B4, |
13788 |
++ 0x036, 0x0005E7B4, |
13789 |
++ 0x90000200, 0x00000000, 0x40000000, 0x00000000, |
13790 |
++ 0x036, 0x000063B5, |
13791 |
++ 0x036, 0x0000E3B5, |
13792 |
++ 0x036, 0x000163B5, |
13793 |
++ 0x036, 0x0001E3B5, |
13794 |
++ 0x036, 0x000263B5, |
13795 |
++ 0x036, 0x0002E3B5, |
13796 |
++ 0x036, 0x000363B5, |
13797 |
++ 0x036, 0x0003E3B5, |
13798 |
++ 0x036, 0x000463B5, |
13799 |
++ 0x036, 0x0004E3B5, |
13800 |
++ 0x036, 0x000563B5, |
13801 |
++ 0x036, 0x0005E3B5, |
13802 |
++ 0x90000410, 0x00000000, 0x40000000, 0x00000000, |
13803 |
+ 0x036, 0x00085733, |
13804 |
+ 0x036, 0x0008D733, |
13805 |
+ 0x036, 0x00095733, |
13806 |
+@@ -1688,7 +1808,7 @@ u32 RTL8821AE_RADIOA_ARRAY[] = { |
13807 |
+ 0x036, 0x000CE4B4, |
13808 |
+ 0x036, 0x000D64B4, |
13809 |
+ 0x036, 0x000DE4B4, |
13810 |
+- 0xCDCDCDCD, 0xCDCD, |
13811 |
++ 0xA0000000, 0x00000000, |
13812 |
+ 0x036, 0x000056B3, |
13813 |
+ 0x036, 0x0000D6B3, |
13814 |
+ 0x036, 0x000156B3, |
13815 |
+@@ -1701,103 +1821,162 @@ u32 RTL8821AE_RADIOA_ARRAY[] = { |
13816 |
+ 0x036, 0x0004E7B4, |
13817 |
+ 0x036, 0x000567B4, |
13818 |
+ 0x036, 0x0005E7B4, |
13819 |
+- 0xFF0F0104, 0xDEAD, |
13820 |
++ 0xB0000000, 0x00000000, |
13821 |
+ 0x0EF, 0x00000000, |
13822 |
+ 0x0EF, 0x00000008, |
13823 |
+- 0xFF0F0104, 0xABCD, |
13824 |
++ 0x80000111, 0x00000000, 0x40000000, 0x00000000, |
13825 |
+ 0x03C, 0x000001C8, |
13826 |
+ 0x03C, 0x00000492, |
13827 |
+- 0xFF0F0204, 0xCDEF, |
13828 |
++ 0x90000110, 0x00000000, 0x40000000, 0x00000000, |
13829 |
+ 0x03C, 0x000001C8, |
13830 |
+ 0x03C, 0x00000492, |
13831 |
+- 0xFF0F0404, 0xCDEF, |
13832 |
++ 0x90000210, 0x00000000, 0x40000000, 0x00000000, |
13833 |
++ 0x03C, 0x000001B6, |
13834 |
++ 0x03C, 0x00000492, |
13835 |
++ 0x9000040c, 0x00000000, 0x40000000, 0x00000000, |
13836 |
++ 0x03C, 0x0000022A, |
13837 |
++ 0x03C, 0x00000594, |
13838 |
++ 0x90000200, 0x00000000, 0x40000000, 0x00000000, |
13839 |
++ 0x03C, 0x000001B6, |
13840 |
++ 0x03C, 0x00000492, |
13841 |
++ 0x90000410, 0x00000000, 0x40000000, 0x00000000, |
13842 |
+ 0x03C, 0x000001C8, |
13843 |
+ 0x03C, 0x00000492, |
13844 |
+- 0xCDCDCDCD, 0xCDCD, |
13845 |
++ 0xA0000000, 0x00000000, |
13846 |
+ 0x03C, 0x0000022A, |
13847 |
+ 0x03C, 0x00000594, |
13848 |
+- 0xFF0F0104, 0xDEAD, |
13849 |
+- 0xFF0F0104, 0xABCD, |
13850 |
++ 0xB0000000, 0x00000000, |
13851 |
++ 0x80000111, 0x00000000, 0x40000000, 0x00000000, |
13852 |
+ 0x03C, 0x00000800, |
13853 |
+- 0xFF0F0204, 0xCDEF, |
13854 |
++ 0x90000110, 0x00000000, 0x40000000, 0x00000000, |
13855 |
+ 0x03C, 0x00000800, |
13856 |
+- 0xFF0F0404, 0xCDEF, |
13857 |
++ 0x90000210, 0x00000000, 0x40000000, 0x00000000, |
13858 |
+ 0x03C, 0x00000800, |
13859 |
+- 0xFF0F02C0, 0xCDEF, |
13860 |
++ 0x9000020c, 0x00000000, 0x40000000, 0x00000000, |
13861 |
+ 0x03C, 0x00000820, |
13862 |
+- 0xCDCDCDCD, 0xCDCD, |
13863 |
++ 0x9000040c, 0x00000000, 0x40000000, 0x00000000, |
13864 |
++ 0x03C, 0x00000820, |
13865 |
++ 0x90000200, 0x00000000, 0x40000000, 0x00000000, |
13866 |
++ 0x03C, 0x00000800, |
13867 |
++ 0x90000410, 0x00000000, 0x40000000, 0x00000000, |
13868 |
++ 0x03C, 0x00000800, |
13869 |
++ 0xA0000000, 0x00000000, |
13870 |
+ 0x03C, 0x00000900, |
13871 |
+- 0xFF0F0104, 0xDEAD, |
13872 |
++ 0xB0000000, 0x00000000, |
13873 |
+ 0x0EF, 0x00000000, |
13874 |
+ 0x018, 0x0001712A, |
13875 |
+ 0x0EF, 0x00000002, |
13876 |
+- 0xFF0F0104, 0xABCD, |
13877 |
++ 0x80000111, 0x00000000, 0x40000000, 0x00000000, |
13878 |
+ 0x008, 0x0004E400, |
13879 |
+- 0xFF0F0204, 0xCDEF, |
13880 |
++ 0x90000110, 0x00000000, 0x40000000, 0x00000000, |
13881 |
+ 0x008, 0x0004E400, |
13882 |
+- 0xFF0F0404, 0xCDEF, |
13883 |
++ 0x90000210, 0x00000000, 0x40000000, 0x00000000, |
13884 |
++ 0x008, 0x00002000, |
13885 |
++ 0x9000020c, 0x00000000, 0x40000000, 0x00000000, |
13886 |
++ 0x008, 0x00002000, |
13887 |
++ 0x9000040c, 0x00000000, 0x40000000, 0x00000000, |
13888 |
++ 0x008, 0x00002000, |
13889 |
++ 0x90000200, 0x00000000, 0x40000000, 0x00000000, |
13890 |
++ 0x008, 0x00002000, |
13891 |
++ 0x90000410, 0x00000000, 0x40000000, 0x00000000, |
13892 |
+ 0x008, 0x0004E400, |
13893 |
+- 0xCDCDCDCD, 0xCDCD, |
13894 |
++ 0xA0000000, 0x00000000, |
13895 |
+ 0x008, 0x00002000, |
13896 |
+- 0xFF0F0104, 0xDEAD, |
13897 |
++ 0xB0000000, 0x00000000, |
13898 |
+ 0x0EF, 0x00000000, |
13899 |
+ 0x0DF, 0x000000C0, |
13900 |
+- 0x01F, 0x00040064, |
13901 |
+- 0xFF0F0104, 0xABCD, |
13902 |
++ 0x01F, 0x00000064, |
13903 |
++ 0x80000111, 0x00000000, 0x40000000, 0x00000000, |
13904 |
+ 0x058, 0x000A7284, |
13905 |
+ 0x059, 0x000600EC, |
13906 |
+- 0xFF0F0204, 0xCDEF, |
13907 |
++ 0x90000110, 0x00000000, 0x40000000, 0x00000000, |
13908 |
+ 0x058, 0x000A7284, |
13909 |
+ 0x059, 0x000600EC, |
13910 |
+- 0xFF0F0404, 0xCDEF, |
13911 |
++ 0x9000020c, 0x00000000, 0x40000000, 0x00000000, |
13912 |
++ 0x058, 0x00081184, |
13913 |
++ 0x059, 0x0006016C, |
13914 |
++ 0x9000040c, 0x00000000, 0x40000000, 0x00000000, |
13915 |
++ 0x058, 0x00081184, |
13916 |
++ 0x059, 0x0006016C, |
13917 |
++ 0x90000200, 0x00000000, 0x40000000, 0x00000000, |
13918 |
++ 0x058, 0x00081184, |
13919 |
++ 0x059, 0x0006016C, |
13920 |
++ 0x90000410, 0x00000000, 0x40000000, 0x00000000, |
13921 |
+ 0x058, 0x000A7284, |
13922 |
+ 0x059, 0x000600EC, |
13923 |
+- 0xCDCDCDCD, 0xCDCD, |
13924 |
++ 0xA0000000, 0x00000000, |
13925 |
+ 0x058, 0x00081184, |
13926 |
+ 0x059, 0x0006016C, |
13927 |
+- 0xFF0F0104, 0xDEAD, |
13928 |
+- 0xFF0F0104, 0xABCD, |
13929 |
++ 0xB0000000, 0x00000000, |
13930 |
++ 0x80000111, 0x00000000, 0x40000000, 0x00000000, |
13931 |
+ 0x061, 0x000E8D73, |
13932 |
+ 0x062, 0x00093FC5, |
13933 |
+- 0xFF0F0204, 0xCDEF, |
13934 |
++ 0x90000110, 0x00000000, 0x40000000, 0x00000000, |
13935 |
+ 0x061, 0x000E8D73, |
13936 |
+ 0x062, 0x00093FC5, |
13937 |
+- 0xFF0F0404, 0xCDEF, |
13938 |
++ 0x90000210, 0x00000000, 0x40000000, 0x00000000, |
13939 |
++ 0x061, 0x000EFD83, |
13940 |
++ 0x062, 0x00093FCC, |
13941 |
++ 0x9000040c, 0x00000000, 0x40000000, 0x00000000, |
13942 |
++ 0x061, 0x000EAD53, |
13943 |
++ 0x062, 0x00093BC4, |
13944 |
++ 0x90000200, 0x00000000, 0x40000000, 0x00000000, |
13945 |
++ 0x061, 0x000EFD83, |
13946 |
++ 0x062, 0x00093FCC, |
13947 |
++ 0x90000410, 0x00000000, 0x40000000, 0x00000000, |
13948 |
+ 0x061, 0x000E8D73, |
13949 |
+ 0x062, 0x00093FC5, |
13950 |
+- 0xCDCDCDCD, 0xCDCD, |
13951 |
++ 0xA0000000, 0x00000000, |
13952 |
+ 0x061, 0x000EAD53, |
13953 |
+ 0x062, 0x00093BC4, |
13954 |
+- 0xFF0F0104, 0xDEAD, |
13955 |
+- 0xFF0F0104, 0xABCD, |
13956 |
++ 0xB0000000, 0x00000000, |
13957 |
++ 0x80000111, 0x00000000, 0x40000000, 0x00000000, |
13958 |
+ 0x063, 0x000110E9, |
13959 |
+- 0xFF0F0204, 0xCDEF, |
13960 |
++ 0x90000110, 0x00000000, 0x40000000, 0x00000000, |
13961 |
+ 0x063, 0x000110E9, |
13962 |
+- 0xFF0F0404, 0xCDEF, |
13963 |
++ 0x90000210, 0x00000000, 0x40000000, 0x00000000, |
13964 |
++ 0x063, 0x000110EB, |
13965 |
++ 0x9000020c, 0x00000000, 0x40000000, 0x00000000, |
13966 |
+ 0x063, 0x000110E9, |
13967 |
+- 0xFF0F0200, 0xCDEF, |
13968 |
+- 0x063, 0x000710E9, |
13969 |
+- 0xFF0F02C0, 0xCDEF, |
13970 |
++ 0x9000040c, 0x00000000, 0x40000000, 0x00000000, |
13971 |
+ 0x063, 0x000110E9, |
13972 |
+- 0xCDCDCDCD, 0xCDCD, |
13973 |
++ 0x90000200, 0x00000000, 0x40000000, 0x00000000, |
13974 |
++ 0x063, 0x000110EB, |
13975 |
++ 0x90000410, 0x00000000, 0x40000000, 0x00000000, |
13976 |
++ 0x063, 0x000110E9, |
13977 |
++ 0xA0000000, 0x00000000, |
13978 |
+ 0x063, 0x000714E9, |
13979 |
+- 0xFF0F0104, 0xDEAD, |
13980 |
+- 0xFF0F0104, 0xABCD, |
13981 |
++ 0xB0000000, 0x00000000, |
13982 |
++ 0x80000111, 0x00000000, 0x40000000, 0x00000000, |
13983 |
++ 0x064, 0x0001C27C, |
13984 |
++ 0x90000110, 0x00000000, 0x40000000, 0x00000000, |
13985 |
++ 0x064, 0x0001C27C, |
13986 |
++ 0x90000210, 0x00000000, 0x40000000, 0x00000000, |
13987 |
+ 0x064, 0x0001C27C, |
13988 |
+- 0xFF0F0204, 0xCDEF, |
13989 |
++ 0x9000040c, 0x00000000, 0x40000000, 0x00000000, |
13990 |
++ 0x064, 0x0001C67C, |
13991 |
++ 0x90000200, 0x00000000, 0x40000000, 0x00000000, |
13992 |
+ 0x064, 0x0001C27C, |
13993 |
+- 0xFF0F0404, 0xCDEF, |
13994 |
++ 0x90000410, 0x00000000, 0x40000000, 0x00000000, |
13995 |
+ 0x064, 0x0001C27C, |
13996 |
+- 0xCDCDCDCD, 0xCDCD, |
13997 |
++ 0xA0000000, 0x00000000, |
13998 |
+ 0x064, 0x0001C67C, |
13999 |
+- 0xFF0F0104, 0xDEAD, |
14000 |
+- 0xFF0F0200, 0xABCD, |
14001 |
++ 0xB0000000, 0x00000000, |
14002 |
++ 0x80000111, 0x00000000, 0x40000000, 0x00000000, |
14003 |
++ 0x065, 0x00091016, |
14004 |
++ 0x90000110, 0x00000000, 0x40000000, 0x00000000, |
14005 |
++ 0x065, 0x00091016, |
14006 |
++ 0x90000210, 0x00000000, 0x40000000, 0x00000000, |
14007 |
+ 0x065, 0x00093016, |
14008 |
+- 0xFF0F02C0, 0xCDEF, |
14009 |
++ 0x9000020c, 0x00000000, 0x40000000, 0x00000000, |
14010 |
+ 0x065, 0x00093015, |
14011 |
+- 0xCDCDCDCD, 0xCDCD, |
14012 |
++ 0x9000040c, 0x00000000, 0x40000000, 0x00000000, |
14013 |
++ 0x065, 0x00093015, |
14014 |
++ 0x90000200, 0x00000000, 0x40000000, 0x00000000, |
14015 |
++ 0x065, 0x00093016, |
14016 |
++ 0xA0000000, 0x00000000, |
14017 |
+ 0x065, 0x00091016, |
14018 |
+- 0xFF0F0200, 0xDEAD, |
14019 |
++ 0xB0000000, 0x00000000, |
14020 |
+ 0x018, 0x00000006, |
14021 |
+ 0x0EF, 0x00002000, |
14022 |
+ 0x03B, 0x0003824B, |
14023 |
+@@ -1895,9 +2074,10 @@ u32 RTL8821AE_RADIOA_ARRAY[] = { |
14024 |
+ 0x0B4, 0x0001214C, |
14025 |
+ 0x0B7, 0x0003000C, |
14026 |
+ 0x01C, 0x000539D2, |
14027 |
++ 0x0C4, 0x000AFE00, |
14028 |
+ 0x018, 0x0001F12A, |
14029 |
+- 0x0FE, 0x00000000, |
14030 |
+- 0x0FE, 0x00000000, |
14031 |
++ 0xFFE, 0x00000000, |
14032 |
++ 0xFFE, 0x00000000, |
14033 |
+ 0x018, 0x0001712A, |
14034 |
+ |
14035 |
+ }; |
14036 |
+@@ -2017,6 +2197,7 @@ u32 RTL8812AE_MAC_REG_ARRAY[] = { |
14037 |
+ u32 RTL8812AE_MAC_1T_ARRAYLEN = ARRAY_SIZE(RTL8812AE_MAC_REG_ARRAY); |
14038 |
+ |
14039 |
+ u32 RTL8821AE_MAC_REG_ARRAY[] = { |
14040 |
++ 0x421, 0x0000000F, |
14041 |
+ 0x428, 0x0000000A, |
14042 |
+ 0x429, 0x00000010, |
14043 |
+ 0x430, 0x00000000, |
14044 |
+@@ -2485,7 +2666,7 @@ u32 RTL8821AE_AGC_TAB_ARRAY[] = { |
14045 |
+ 0x81C, 0xA6360001, |
14046 |
+ 0x81C, 0xA5380001, |
14047 |
+ 0x81C, 0xA43A0001, |
14048 |
+- 0x81C, 0xA33C0001, |
14049 |
++ 0x81C, 0x683C0001, |
14050 |
+ 0x81C, 0x673E0001, |
14051 |
+ 0x81C, 0x66400001, |
14052 |
+ 0x81C, 0x65420001, |
14053 |
+@@ -2519,7 +2700,66 @@ u32 RTL8821AE_AGC_TAB_ARRAY[] = { |
14054 |
+ 0x81C, 0x017A0001, |
14055 |
+ 0x81C, 0x017C0001, |
14056 |
+ 0x81C, 0x017E0001, |
14057 |
+- 0xFF0F02C0, 0xABCD, |
14058 |
++ 0x8000020c, 0x00000000, 0x40000000, 0x00000000, |
14059 |
++ 0x81C, 0xFB000101, |
14060 |
++ 0x81C, 0xFA020101, |
14061 |
++ 0x81C, 0xF9040101, |
14062 |
++ 0x81C, 0xF8060101, |
14063 |
++ 0x81C, 0xF7080101, |
14064 |
++ 0x81C, 0xF60A0101, |
14065 |
++ 0x81C, 0xF50C0101, |
14066 |
++ 0x81C, 0xF40E0101, |
14067 |
++ 0x81C, 0xF3100101, |
14068 |
++ 0x81C, 0xF2120101, |
14069 |
++ 0x81C, 0xF1140101, |
14070 |
++ 0x81C, 0xF0160101, |
14071 |
++ 0x81C, 0xEF180101, |
14072 |
++ 0x81C, 0xEE1A0101, |
14073 |
++ 0x81C, 0xED1C0101, |
14074 |
++ 0x81C, 0xEC1E0101, |
14075 |
++ 0x81C, 0xEB200101, |
14076 |
++ 0x81C, 0xEA220101, |
14077 |
++ 0x81C, 0xE9240101, |
14078 |
++ 0x81C, 0xE8260101, |
14079 |
++ 0x81C, 0xE7280101, |
14080 |
++ 0x81C, 0xE62A0101, |
14081 |
++ 0x81C, 0xE52C0101, |
14082 |
++ 0x81C, 0xE42E0101, |
14083 |
++ 0x81C, 0xE3300101, |
14084 |
++ 0x81C, 0xA5320101, |
14085 |
++ 0x81C, 0xA4340101, |
14086 |
++ 0x81C, 0xA3360101, |
14087 |
++ 0x81C, 0x87380101, |
14088 |
++ 0x81C, 0x863A0101, |
14089 |
++ 0x81C, 0x853C0101, |
14090 |
++ 0x81C, 0x843E0101, |
14091 |
++ 0x81C, 0x69400101, |
14092 |
++ 0x81C, 0x68420101, |
14093 |
++ 0x81C, 0x67440101, |
14094 |
++ 0x81C, 0x66460101, |
14095 |
++ 0x81C, 0x49480101, |
14096 |
++ 0x81C, 0x484A0101, |
14097 |
++ 0x81C, 0x474C0101, |
14098 |
++ 0x81C, 0x2A4E0101, |
14099 |
++ 0x81C, 0x29500101, |
14100 |
++ 0x81C, 0x28520101, |
14101 |
++ 0x81C, 0x27540101, |
14102 |
++ 0x81C, 0x26560101, |
14103 |
++ 0x81C, 0x25580101, |
14104 |
++ 0x81C, 0x245A0101, |
14105 |
++ 0x81C, 0x235C0101, |
14106 |
++ 0x81C, 0x055E0101, |
14107 |
++ 0x81C, 0x04600101, |
14108 |
++ 0x81C, 0x03620101, |
14109 |
++ 0x81C, 0x02640101, |
14110 |
++ 0x81C, 0x01660101, |
14111 |
++ 0x81C, 0x01680101, |
14112 |
++ 0x81C, 0x016A0101, |
14113 |
++ 0x81C, 0x016C0101, |
14114 |
++ 0x81C, 0x016E0101, |
14115 |
++ 0x81C, 0x01700101, |
14116 |
++ 0x81C, 0x01720101, |
14117 |
++ 0x9000040c, 0x00000000, 0x40000000, 0x00000000, |
14118 |
+ 0x81C, 0xFB000101, |
14119 |
+ 0x81C, 0xFA020101, |
14120 |
+ 0x81C, 0xF9040101, |
14121 |
+@@ -2578,7 +2818,7 @@ u32 RTL8821AE_AGC_TAB_ARRAY[] = { |
14122 |
+ 0x81C, 0x016E0101, |
14123 |
+ 0x81C, 0x01700101, |
14124 |
+ 0x81C, 0x01720101, |
14125 |
+- 0xCDCDCDCD, 0xCDCD, |
14126 |
++ 0xA0000000, 0x00000000, |
14127 |
+ 0x81C, 0xFF000101, |
14128 |
+ 0x81C, 0xFF020101, |
14129 |
+ 0x81C, 0xFE040101, |
14130 |
+@@ -2637,7 +2877,7 @@ u32 RTL8821AE_AGC_TAB_ARRAY[] = { |
14131 |
+ 0x81C, 0x046E0101, |
14132 |
+ 0x81C, 0x03700101, |
14133 |
+ 0x81C, 0x02720101, |
14134 |
+- 0xFF0F02C0, 0xDEAD, |
14135 |
++ 0xB0000000, 0x00000000, |
14136 |
+ 0x81C, 0x01740101, |
14137 |
+ 0x81C, 0x01760101, |
14138 |
+ 0x81C, 0x01780101, |
14139 |
+diff --git a/drivers/net/wireless/realtek/rtw88/debug.c b/drivers/net/wireless/realtek/rtw88/debug.c |
14140 |
+index 19fc2d8bf3e93..f872fcd156998 100644 |
14141 |
+--- a/drivers/net/wireless/realtek/rtw88/debug.c |
14142 |
++++ b/drivers/net/wireless/realtek/rtw88/debug.c |
14143 |
+@@ -270,7 +270,7 @@ static ssize_t rtw_debugfs_set_rsvd_page(struct file *filp, |
14144 |
+ |
14145 |
+ if (num != 2) { |
14146 |
+ rtw_warn(rtwdev, "invalid arguments\n"); |
14147 |
+- return num; |
14148 |
++ return -EINVAL; |
14149 |
+ } |
14150 |
+ |
14151 |
+ debugfs_priv->rsvd_page.page_offset = offset; |
14152 |
+diff --git a/drivers/net/wireless/realtek/rtw88/phy.c b/drivers/net/wireless/realtek/rtw88/phy.c |
14153 |
+index d44960cd940c3..a76aac514fc80 100644 |
14154 |
+--- a/drivers/net/wireless/realtek/rtw88/phy.c |
14155 |
++++ b/drivers/net/wireless/realtek/rtw88/phy.c |
14156 |
+@@ -1524,7 +1524,7 @@ void rtw_phy_load_tables(struct rtw_dev *rtwdev) |
14157 |
+ } |
14158 |
+ EXPORT_SYMBOL(rtw_phy_load_tables); |
14159 |
+ |
14160 |
+-static u8 rtw_get_channel_group(u8 channel) |
14161 |
++static u8 rtw_get_channel_group(u8 channel, u8 rate) |
14162 |
+ { |
14163 |
+ switch (channel) { |
14164 |
+ default: |
14165 |
+@@ -1568,6 +1568,7 @@ static u8 rtw_get_channel_group(u8 channel) |
14166 |
+ case 106: |
14167 |
+ return 4; |
14168 |
+ case 14: |
14169 |
++ return rate <= DESC_RATE11M ? 5 : 4; |
14170 |
+ case 108: |
14171 |
+ case 110: |
14172 |
+ case 112: |
14173 |
+@@ -1819,7 +1820,7 @@ void rtw_get_tx_power_params(struct rtw_dev *rtwdev, u8 path, u8 rate, u8 bw, |
14174 |
+ s8 *remnant = &pwr_param->pwr_remnant; |
14175 |
+ |
14176 |
+ pwr_idx = &rtwdev->efuse.txpwr_idx_table[path]; |
14177 |
+- group = rtw_get_channel_group(ch); |
14178 |
++ group = rtw_get_channel_group(ch, rate); |
14179 |
+ |
14180 |
+ /* base power index for 2.4G/5G */ |
14181 |
+ if (IS_CH_2G_BAND(ch)) { |
14182 |
+diff --git a/drivers/net/wireless/ti/wlcore/boot.c b/drivers/net/wireless/ti/wlcore/boot.c |
14183 |
+index e14d88e558f04..85abd0a2d1c90 100644 |
14184 |
+--- a/drivers/net/wireless/ti/wlcore/boot.c |
14185 |
++++ b/drivers/net/wireless/ti/wlcore/boot.c |
14186 |
+@@ -72,6 +72,7 @@ static int wlcore_validate_fw_ver(struct wl1271 *wl) |
14187 |
+ unsigned int *min_ver = (wl->fw_type == WL12XX_FW_TYPE_MULTI) ? |
14188 |
+ wl->min_mr_fw_ver : wl->min_sr_fw_ver; |
14189 |
+ char min_fw_str[32] = ""; |
14190 |
++ int off = 0; |
14191 |
+ int i; |
14192 |
+ |
14193 |
+ /* the chip must be exactly equal */ |
14194 |
+@@ -105,13 +106,15 @@ static int wlcore_validate_fw_ver(struct wl1271 *wl) |
14195 |
+ return 0; |
14196 |
+ |
14197 |
+ fail: |
14198 |
+- for (i = 0; i < NUM_FW_VER; i++) |
14199 |
++ for (i = 0; i < NUM_FW_VER && off < sizeof(min_fw_str); i++) |
14200 |
+ if (min_ver[i] == WLCORE_FW_VER_IGNORE) |
14201 |
+- snprintf(min_fw_str, sizeof(min_fw_str), |
14202 |
+- "%s*.", min_fw_str); |
14203 |
++ off += snprintf(min_fw_str + off, |
14204 |
++ sizeof(min_fw_str) - off, |
14205 |
++ "*."); |
14206 |
+ else |
14207 |
+- snprintf(min_fw_str, sizeof(min_fw_str), |
14208 |
+- "%s%u.", min_fw_str, min_ver[i]); |
14209 |
++ off += snprintf(min_fw_str + off, |
14210 |
++ sizeof(min_fw_str) - off, |
14211 |
++ "%u.", min_ver[i]); |
14212 |
+ |
14213 |
+ wl1271_error("Your WiFi FW version (%u.%u.%u.%u.%u) is invalid.\n" |
14214 |
+ "Please use at least FW %s\n" |
14215 |
+diff --git a/drivers/net/wireless/ti/wlcore/debugfs.h b/drivers/net/wireless/ti/wlcore/debugfs.h |
14216 |
+index b143293e694f9..a9e13e6d65c50 100644 |
14217 |
+--- a/drivers/net/wireless/ti/wlcore/debugfs.h |
14218 |
++++ b/drivers/net/wireless/ti/wlcore/debugfs.h |
14219 |
+@@ -78,13 +78,14 @@ static ssize_t sub## _ ##name## _read(struct file *file, \ |
14220 |
+ struct wl1271 *wl = file->private_data; \ |
14221 |
+ struct struct_type *stats = wl->stats.fw_stats; \ |
14222 |
+ char buf[DEBUGFS_FORMAT_BUFFER_SIZE] = ""; \ |
14223 |
++ int pos = 0; \ |
14224 |
+ int i; \ |
14225 |
+ \ |
14226 |
+ wl1271_debugfs_update_stats(wl); \ |
14227 |
+ \ |
14228 |
+- for (i = 0; i < len; i++) \ |
14229 |
+- snprintf(buf, sizeof(buf), "%s[%d] = %d\n", \ |
14230 |
+- buf, i, stats->sub.name[i]); \ |
14231 |
++ for (i = 0; i < len && pos < sizeof(buf); i++) \ |
14232 |
++ pos += snprintf(buf + pos, sizeof(buf) - pos, \ |
14233 |
++ "[%d] = %d\n", i, stats->sub.name[i]); \ |
14234 |
+ \ |
14235 |
+ return wl1271_format_buffer(userbuf, count, ppos, "%s", buf); \ |
14236 |
+ } \ |
14237 |
+diff --git a/drivers/nfc/pn533/pn533.c b/drivers/nfc/pn533/pn533.c |
14238 |
+index f7464bd6d57cb..18e3435ab8f33 100644 |
14239 |
+--- a/drivers/nfc/pn533/pn533.c |
14240 |
++++ b/drivers/nfc/pn533/pn533.c |
14241 |
+@@ -706,6 +706,9 @@ static bool pn533_target_type_a_is_valid(struct pn533_target_type_a *type_a, |
14242 |
+ if (PN533_TYPE_A_SEL_CASCADE(type_a->sel_res) != 0) |
14243 |
+ return false; |
14244 |
+ |
14245 |
++ if (type_a->nfcid_len > NFC_NFCID1_MAXSIZE) |
14246 |
++ return false; |
14247 |
++ |
14248 |
+ return true; |
14249 |
+ } |
14250 |
+ |
14251 |
+diff --git a/drivers/nvme/host/multipath.c b/drivers/nvme/host/multipath.c |
14252 |
+index fdfc18a222cc3..c563efe0671e0 100644 |
14253 |
+--- a/drivers/nvme/host/multipath.c |
14254 |
++++ b/drivers/nvme/host/multipath.c |
14255 |
+@@ -668,6 +668,10 @@ void nvme_mpath_add_disk(struct nvme_ns *ns, struct nvme_id_ns *id) |
14256 |
+ if (desc.state) { |
14257 |
+ /* found the group desc: update */ |
14258 |
+ nvme_update_ns_ana_state(&desc, ns); |
14259 |
++ } else { |
14260 |
++ /* group desc not found: trigger a re-read */ |
14261 |
++ set_bit(NVME_NS_ANA_PENDING, &ns->flags); |
14262 |
++ queue_work(nvme_wq, &ns->ctrl->ana_work); |
14263 |
+ } |
14264 |
+ } else { |
14265 |
+ ns->ana_state = NVME_ANA_OPTIMIZED; |
14266 |
+diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c |
14267 |
+index 999378fb4d760..0cf84aa1c3207 100644 |
14268 |
+--- a/drivers/nvme/host/pci.c |
14269 |
++++ b/drivers/nvme/host/pci.c |
14270 |
+@@ -852,7 +852,7 @@ static blk_status_t nvme_map_data(struct nvme_dev *dev, struct request *req, |
14271 |
+ return nvme_setup_prp_simple(dev, req, |
14272 |
+ &cmnd->rw, &bv); |
14273 |
+ |
14274 |
+- if (iod->nvmeq->qid && |
14275 |
++ if (iod->nvmeq->qid && sgl_threshold && |
14276 |
+ dev->ctrl.sgls & ((1 << 0) | (1 << 1))) |
14277 |
+ return nvme_setup_sgl_simple(dev, req, |
14278 |
+ &cmnd->rw, &bv); |
14279 |
+diff --git a/drivers/nvme/host/tcp.c b/drivers/nvme/host/tcp.c |
14280 |
+index c6958e5bc91d5..709a573183a20 100644 |
14281 |
+--- a/drivers/nvme/host/tcp.c |
14282 |
++++ b/drivers/nvme/host/tcp.c |
14283 |
+@@ -874,7 +874,7 @@ static void nvme_tcp_state_change(struct sock *sk) |
14284 |
+ { |
14285 |
+ struct nvme_tcp_queue *queue; |
14286 |
+ |
14287 |
+- read_lock(&sk->sk_callback_lock); |
14288 |
++ read_lock_bh(&sk->sk_callback_lock); |
14289 |
+ queue = sk->sk_user_data; |
14290 |
+ if (!queue) |
14291 |
+ goto done; |
14292 |
+@@ -895,7 +895,7 @@ static void nvme_tcp_state_change(struct sock *sk) |
14293 |
+ |
14294 |
+ queue->state_change(sk); |
14295 |
+ done: |
14296 |
+- read_unlock(&sk->sk_callback_lock); |
14297 |
++ read_unlock_bh(&sk->sk_callback_lock); |
14298 |
+ } |
14299 |
+ |
14300 |
+ static inline bool nvme_tcp_queue_more(struct nvme_tcp_queue *queue) |
14301 |
+diff --git a/drivers/nvme/target/tcp.c b/drivers/nvme/target/tcp.c |
14302 |
+index d658c6e8263af..d958b5da9b88a 100644 |
14303 |
+--- a/drivers/nvme/target/tcp.c |
14304 |
++++ b/drivers/nvme/target/tcp.c |
14305 |
+@@ -525,11 +525,36 @@ static void nvmet_tcp_queue_response(struct nvmet_req *req) |
14306 |
+ struct nvmet_tcp_cmd *cmd = |
14307 |
+ container_of(req, struct nvmet_tcp_cmd, req); |
14308 |
+ struct nvmet_tcp_queue *queue = cmd->queue; |
14309 |
++ struct nvme_sgl_desc *sgl; |
14310 |
++ u32 len; |
14311 |
++ |
14312 |
++ if (unlikely(cmd == queue->cmd)) { |
14313 |
++ sgl = &cmd->req.cmd->common.dptr.sgl; |
14314 |
++ len = le32_to_cpu(sgl->length); |
14315 |
++ |
14316 |
++ /* |
14317 |
++ * Wait for inline data before processing the response. |
14318 |
++ * Avoid using helpers, this might happen before |
14319 |
++ * nvmet_req_init is completed. |
14320 |
++ */ |
14321 |
++ if (queue->rcv_state == NVMET_TCP_RECV_PDU && |
14322 |
++ len && len < cmd->req.port->inline_data_size && |
14323 |
++ nvme_is_write(cmd->req.cmd)) |
14324 |
++ return; |
14325 |
++ } |
14326 |
+ |
14327 |
+ llist_add(&cmd->lentry, &queue->resp_list); |
14328 |
+ queue_work_on(queue_cpu(queue), nvmet_tcp_wq, &cmd->queue->io_work); |
14329 |
+ } |
14330 |
+ |
14331 |
++static void nvmet_tcp_execute_request(struct nvmet_tcp_cmd *cmd) |
14332 |
++{ |
14333 |
++ if (unlikely(cmd->flags & NVMET_TCP_F_INIT_FAILED)) |
14334 |
++ nvmet_tcp_queue_response(&cmd->req); |
14335 |
++ else |
14336 |
++ cmd->req.execute(&cmd->req); |
14337 |
++} |
14338 |
++ |
14339 |
+ static int nvmet_try_send_data_pdu(struct nvmet_tcp_cmd *cmd) |
14340 |
+ { |
14341 |
+ u8 hdgst = nvmet_tcp_hdgst_len(cmd->queue); |
14342 |
+@@ -961,7 +986,7 @@ static int nvmet_tcp_done_recv_pdu(struct nvmet_tcp_queue *queue) |
14343 |
+ le32_to_cpu(req->cmd->common.dptr.sgl.length)); |
14344 |
+ |
14345 |
+ nvmet_tcp_handle_req_failure(queue, queue->cmd, req); |
14346 |
+- return -EAGAIN; |
14347 |
++ return 0; |
14348 |
+ } |
14349 |
+ |
14350 |
+ ret = nvmet_tcp_map_data(queue->cmd); |
14351 |
+@@ -1104,10 +1129,8 @@ static int nvmet_tcp_try_recv_data(struct nvmet_tcp_queue *queue) |
14352 |
+ return 0; |
14353 |
+ } |
14354 |
+ |
14355 |
+- if (!(cmd->flags & NVMET_TCP_F_INIT_FAILED) && |
14356 |
+- cmd->rbytes_done == cmd->req.transfer_len) { |
14357 |
+- cmd->req.execute(&cmd->req); |
14358 |
+- } |
14359 |
++ if (cmd->rbytes_done == cmd->req.transfer_len) |
14360 |
++ nvmet_tcp_execute_request(cmd); |
14361 |
+ |
14362 |
+ nvmet_prepare_receive_pdu(queue); |
14363 |
+ return 0; |
14364 |
+@@ -1144,9 +1167,9 @@ static int nvmet_tcp_try_recv_ddgst(struct nvmet_tcp_queue *queue) |
14365 |
+ goto out; |
14366 |
+ } |
14367 |
+ |
14368 |
+- if (!(cmd->flags & NVMET_TCP_F_INIT_FAILED) && |
14369 |
+- cmd->rbytes_done == cmd->req.transfer_len) |
14370 |
+- cmd->req.execute(&cmd->req); |
14371 |
++ if (cmd->rbytes_done == cmd->req.transfer_len) |
14372 |
++ nvmet_tcp_execute_request(cmd); |
14373 |
++ |
14374 |
+ ret = 0; |
14375 |
+ out: |
14376 |
+ nvmet_prepare_receive_pdu(queue); |
14377 |
+@@ -1434,7 +1457,7 @@ static void nvmet_tcp_state_change(struct sock *sk) |
14378 |
+ { |
14379 |
+ struct nvmet_tcp_queue *queue; |
14380 |
+ |
14381 |
+- write_lock_bh(&sk->sk_callback_lock); |
14382 |
++ read_lock_bh(&sk->sk_callback_lock); |
14383 |
+ queue = sk->sk_user_data; |
14384 |
+ if (!queue) |
14385 |
+ goto done; |
14386 |
+@@ -1452,7 +1475,7 @@ static void nvmet_tcp_state_change(struct sock *sk) |
14387 |
+ queue->idx, sk->sk_state); |
14388 |
+ } |
14389 |
+ done: |
14390 |
+- write_unlock_bh(&sk->sk_callback_lock); |
14391 |
++ read_unlock_bh(&sk->sk_callback_lock); |
14392 |
+ } |
14393 |
+ |
14394 |
+ static int nvmet_tcp_set_queue_sock(struct nvmet_tcp_queue *queue) |
14395 |
+diff --git a/drivers/nvmem/qfprom.c b/drivers/nvmem/qfprom.c |
14396 |
+index 6cace24dfbf73..100d69d8f2e1c 100644 |
14397 |
+--- a/drivers/nvmem/qfprom.c |
14398 |
++++ b/drivers/nvmem/qfprom.c |
14399 |
+@@ -127,6 +127,16 @@ static void qfprom_disable_fuse_blowing(const struct qfprom_priv *priv, |
14400 |
+ { |
14401 |
+ int ret; |
14402 |
+ |
14403 |
++ /* |
14404 |
++ * This may be a shared rail and may be able to run at a lower rate |
14405 |
++ * when we're not blowing fuses. At the moment, the regulator framework |
14406 |
++ * applies voltage constraints even on disabled rails, so remove our |
14407 |
++ * constraints and allow the rail to be adjusted by other users. |
14408 |
++ */ |
14409 |
++ ret = regulator_set_voltage(priv->vcc, 0, INT_MAX); |
14410 |
++ if (ret) |
14411 |
++ dev_warn(priv->dev, "Failed to set 0 voltage (ignoring)\n"); |
14412 |
++ |
14413 |
+ ret = regulator_disable(priv->vcc); |
14414 |
+ if (ret) |
14415 |
+ dev_warn(priv->dev, "Failed to disable regulator (ignoring)\n"); |
14416 |
+@@ -172,6 +182,17 @@ static int qfprom_enable_fuse_blowing(const struct qfprom_priv *priv, |
14417 |
+ goto err_clk_prepared; |
14418 |
+ } |
14419 |
+ |
14420 |
++ /* |
14421 |
++ * Hardware requires 1.8V min for fuse blowing; this may be |
14422 |
++ * a rail shared do don't specify a max--regulator constraints |
14423 |
++ * will handle. |
14424 |
++ */ |
14425 |
++ ret = regulator_set_voltage(priv->vcc, 1800000, INT_MAX); |
14426 |
++ if (ret) { |
14427 |
++ dev_err(priv->dev, "Failed to set 1.8 voltage\n"); |
14428 |
++ goto err_clk_rate_set; |
14429 |
++ } |
14430 |
++ |
14431 |
+ ret = regulator_enable(priv->vcc); |
14432 |
+ if (ret) { |
14433 |
+ dev_err(priv->dev, "Failed to enable regulator\n"); |
14434 |
+diff --git a/drivers/of/overlay.c b/drivers/of/overlay.c |
14435 |
+index 50bbe0edf5380..43a77d7200087 100644 |
14436 |
+--- a/drivers/of/overlay.c |
14437 |
++++ b/drivers/of/overlay.c |
14438 |
+@@ -796,6 +796,7 @@ static int init_overlay_changeset(struct overlay_changeset *ovcs, |
14439 |
+ if (!fragment->target) { |
14440 |
+ of_node_put(fragment->overlay); |
14441 |
+ ret = -EINVAL; |
14442 |
++ of_node_put(node); |
14443 |
+ goto err_free_fragments; |
14444 |
+ } |
14445 |
+ |
14446 |
+diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c |
14447 |
+index 53aa35cb3a493..a59ecbec601fc 100644 |
14448 |
+--- a/drivers/pci/controller/dwc/pci-keystone.c |
14449 |
++++ b/drivers/pci/controller/dwc/pci-keystone.c |
14450 |
+@@ -798,7 +798,8 @@ static int __init ks_pcie_host_init(struct pcie_port *pp) |
14451 |
+ int ret; |
14452 |
+ |
14453 |
+ pp->bridge->ops = &ks_pcie_ops; |
14454 |
+- pp->bridge->child_ops = &ks_child_pcie_ops; |
14455 |
++ if (!ks_pcie->is_am6) |
14456 |
++ pp->bridge->child_ops = &ks_child_pcie_ops; |
14457 |
+ |
14458 |
+ ret = ks_pcie_config_legacy_irq(ks_pcie); |
14459 |
+ if (ret) |
14460 |
+diff --git a/drivers/pci/controller/pci-xgene.c b/drivers/pci/controller/pci-xgene.c |
14461 |
+index 85e7c98265e81..20be246cd4d4e 100644 |
14462 |
+--- a/drivers/pci/controller/pci-xgene.c |
14463 |
++++ b/drivers/pci/controller/pci-xgene.c |
14464 |
+@@ -353,7 +353,8 @@ static int xgene_pcie_map_reg(struct xgene_pcie_port *port, |
14465 |
+ if (IS_ERR(port->csr_base)) |
14466 |
+ return PTR_ERR(port->csr_base); |
14467 |
+ |
14468 |
+- port->cfg_base = devm_platform_ioremap_resource_byname(pdev, "cfg"); |
14469 |
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cfg"); |
14470 |
++ port->cfg_base = devm_ioremap_resource(dev, res); |
14471 |
+ if (IS_ERR(port->cfg_base)) |
14472 |
+ return PTR_ERR(port->cfg_base); |
14473 |
+ port->cfg_addr = res->start; |
14474 |
+diff --git a/drivers/pci/vpd.c b/drivers/pci/vpd.c |
14475 |
+index 7915d10f9aa10..bd549070c0112 100644 |
14476 |
+--- a/drivers/pci/vpd.c |
14477 |
++++ b/drivers/pci/vpd.c |
14478 |
+@@ -570,7 +570,6 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x005d, quirk_blacklist_vpd); |
14479 |
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x005f, quirk_blacklist_vpd); |
14480 |
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, PCI_ANY_ID, |
14481 |
+ quirk_blacklist_vpd); |
14482 |
+-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_QLOGIC, 0x2261, quirk_blacklist_vpd); |
14483 |
+ /* |
14484 |
+ * The Amazon Annapurna Labs 0x0031 device id is reused for other non Root Port |
14485 |
+ * device types, so the quirk is registered for the PCI_CLASS_BRIDGE_PCI class. |
14486 |
+diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c |
14487 |
+index 26a0badabe38b..19f32ae877b94 100644 |
14488 |
+--- a/drivers/phy/cadence/phy-cadence-sierra.c |
14489 |
++++ b/drivers/phy/cadence/phy-cadence-sierra.c |
14490 |
+@@ -319,6 +319,12 @@ static int cdns_sierra_phy_on(struct phy *gphy) |
14491 |
+ u32 val; |
14492 |
+ int ret; |
14493 |
+ |
14494 |
++ ret = reset_control_deassert(sp->phy_rst); |
14495 |
++ if (ret) { |
14496 |
++ dev_err(dev, "Failed to take the PHY out of reset\n"); |
14497 |
++ return ret; |
14498 |
++ } |
14499 |
++ |
14500 |
+ /* Take the PHY lane group out of reset */ |
14501 |
+ ret = reset_control_deassert(ins->lnk_rst); |
14502 |
+ if (ret) { |
14503 |
+@@ -616,7 +622,6 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) |
14504 |
+ |
14505 |
+ pm_runtime_enable(dev); |
14506 |
+ phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); |
14507 |
+- reset_control_deassert(sp->phy_rst); |
14508 |
+ return PTR_ERR_OR_ZERO(phy_provider); |
14509 |
+ |
14510 |
+ put_child: |
14511 |
+diff --git a/drivers/phy/ingenic/phy-ingenic-usb.c b/drivers/phy/ingenic/phy-ingenic-usb.c |
14512 |
+index 4d1587d822861..878cd4cbb91af 100644 |
14513 |
+--- a/drivers/phy/ingenic/phy-ingenic-usb.c |
14514 |
++++ b/drivers/phy/ingenic/phy-ingenic-usb.c |
14515 |
+@@ -375,8 +375,8 @@ static int ingenic_usb_phy_probe(struct platform_device *pdev) |
14516 |
+ } |
14517 |
+ |
14518 |
+ priv->phy = devm_phy_create(dev, NULL, &ingenic_usb_phy_ops); |
14519 |
+- if (IS_ERR(priv)) |
14520 |
+- return PTR_ERR(priv); |
14521 |
++ if (IS_ERR(priv->phy)) |
14522 |
++ return PTR_ERR(priv->phy); |
14523 |
+ |
14524 |
+ phy_set_drvdata(priv->phy, priv); |
14525 |
+ |
14526 |
+diff --git a/drivers/phy/marvell/Kconfig b/drivers/phy/marvell/Kconfig |
14527 |
+index 6c96f2bf52665..c8ee23fc3a83d 100644 |
14528 |
+--- a/drivers/phy/marvell/Kconfig |
14529 |
++++ b/drivers/phy/marvell/Kconfig |
14530 |
+@@ -3,8 +3,8 @@ |
14531 |
+ # Phy drivers for Marvell platforms |
14532 |
+ # |
14533 |
+ config ARMADA375_USBCLUSTER_PHY |
14534 |
+- def_bool y |
14535 |
+- depends on MACH_ARMADA_375 || COMPILE_TEST |
14536 |
++ bool "Armada 375 USB cluster PHY support" if COMPILE_TEST |
14537 |
++ default y if MACH_ARMADA_375 |
14538 |
+ depends on OF && HAS_IOMEM |
14539 |
+ select GENERIC_PHY |
14540 |
+ |
14541 |
+diff --git a/drivers/phy/ralink/phy-mt7621-pci.c b/drivers/phy/ralink/phy-mt7621-pci.c |
14542 |
+index 9a610b414b1fb..753cb5bab9308 100644 |
14543 |
+--- a/drivers/phy/ralink/phy-mt7621-pci.c |
14544 |
++++ b/drivers/phy/ralink/phy-mt7621-pci.c |
14545 |
+@@ -62,7 +62,7 @@ |
14546 |
+ |
14547 |
+ #define RG_PE1_FRC_MSTCKDIV BIT(5) |
14548 |
+ |
14549 |
+-#define XTAL_MASK GENMASK(7, 6) |
14550 |
++#define XTAL_MASK GENMASK(8, 6) |
14551 |
+ |
14552 |
+ #define MAX_PHYS 2 |
14553 |
+ |
14554 |
+@@ -319,9 +319,9 @@ static int mt7621_pci_phy_probe(struct platform_device *pdev) |
14555 |
+ return PTR_ERR(phy->regmap); |
14556 |
+ |
14557 |
+ phy->phy = devm_phy_create(dev, dev->of_node, &mt7621_pci_phy_ops); |
14558 |
+- if (IS_ERR(phy)) { |
14559 |
++ if (IS_ERR(phy->phy)) { |
14560 |
+ dev_err(dev, "failed to create phy\n"); |
14561 |
+- return PTR_ERR(phy); |
14562 |
++ return PTR_ERR(phy->phy); |
14563 |
+ } |
14564 |
+ |
14565 |
+ phy_set_drvdata(phy->phy, phy); |
14566 |
+diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c |
14567 |
+index c9cfafe89cbf1..e28e25f98708c 100644 |
14568 |
+--- a/drivers/phy/ti/phy-j721e-wiz.c |
14569 |
++++ b/drivers/phy/ti/phy-j721e-wiz.c |
14570 |
+@@ -615,6 +615,12 @@ static void wiz_clock_cleanup(struct wiz *wiz, struct device_node *node) |
14571 |
+ of_clk_del_provider(clk_node); |
14572 |
+ of_node_put(clk_node); |
14573 |
+ } |
14574 |
++ |
14575 |
++ for (i = 0; i < wiz->clk_div_sel_num; i++) { |
14576 |
++ clk_node = of_get_child_by_name(node, clk_div_sel[i].node_name); |
14577 |
++ of_clk_del_provider(clk_node); |
14578 |
++ of_node_put(clk_node); |
14579 |
++ } |
14580 |
+ } |
14581 |
+ |
14582 |
+ static int wiz_clock_init(struct wiz *wiz, struct device_node *node) |
14583 |
+@@ -947,27 +953,24 @@ static int wiz_probe(struct platform_device *pdev) |
14584 |
+ goto err_get_sync; |
14585 |
+ } |
14586 |
+ |
14587 |
++ ret = wiz_init(wiz); |
14588 |
++ if (ret) { |
14589 |
++ dev_err(dev, "WIZ initialization failed\n"); |
14590 |
++ goto err_wiz_init; |
14591 |
++ } |
14592 |
++ |
14593 |
+ serdes_pdev = of_platform_device_create(child_node, NULL, dev); |
14594 |
+ if (!serdes_pdev) { |
14595 |
+ dev_WARN(dev, "Unable to create SERDES platform device\n"); |
14596 |
+ ret = -ENOMEM; |
14597 |
+- goto err_pdev_create; |
14598 |
+- } |
14599 |
+- wiz->serdes_pdev = serdes_pdev; |
14600 |
+- |
14601 |
+- ret = wiz_init(wiz); |
14602 |
+- if (ret) { |
14603 |
+- dev_err(dev, "WIZ initialization failed\n"); |
14604 |
+ goto err_wiz_init; |
14605 |
+ } |
14606 |
++ wiz->serdes_pdev = serdes_pdev; |
14607 |
+ |
14608 |
+ of_node_put(child_node); |
14609 |
+ return 0; |
14610 |
+ |
14611 |
+ err_wiz_init: |
14612 |
+- of_platform_device_destroy(&serdes_pdev->dev, NULL); |
14613 |
+- |
14614 |
+-err_pdev_create: |
14615 |
+ wiz_clock_cleanup(wiz, node); |
14616 |
+ |
14617 |
+ err_get_sync: |
14618 |
+diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c |
14619 |
+index f3cd7e2967126..12cc4eb186377 100644 |
14620 |
+--- a/drivers/pinctrl/pinctrl-single.c |
14621 |
++++ b/drivers/pinctrl/pinctrl-single.c |
14622 |
+@@ -270,20 +270,44 @@ static void __maybe_unused pcs_writel(unsigned val, void __iomem *reg) |
14623 |
+ writel(val, reg); |
14624 |
+ } |
14625 |
+ |
14626 |
++static unsigned int pcs_pin_reg_offset_get(struct pcs_device *pcs, |
14627 |
++ unsigned int pin) |
14628 |
++{ |
14629 |
++ unsigned int mux_bytes = pcs->width / BITS_PER_BYTE; |
14630 |
++ |
14631 |
++ if (pcs->bits_per_mux) { |
14632 |
++ unsigned int pin_offset_bytes; |
14633 |
++ |
14634 |
++ pin_offset_bytes = (pcs->bits_per_pin * pin) / BITS_PER_BYTE; |
14635 |
++ return (pin_offset_bytes / mux_bytes) * mux_bytes; |
14636 |
++ } |
14637 |
++ |
14638 |
++ return pin * mux_bytes; |
14639 |
++} |
14640 |
++ |
14641 |
++static unsigned int pcs_pin_shift_reg_get(struct pcs_device *pcs, |
14642 |
++ unsigned int pin) |
14643 |
++{ |
14644 |
++ return (pin % (pcs->width / pcs->bits_per_pin)) * pcs->bits_per_pin; |
14645 |
++} |
14646 |
++ |
14647 |
+ static void pcs_pin_dbg_show(struct pinctrl_dev *pctldev, |
14648 |
+ struct seq_file *s, |
14649 |
+ unsigned pin) |
14650 |
+ { |
14651 |
+ struct pcs_device *pcs; |
14652 |
+- unsigned val, mux_bytes; |
14653 |
++ unsigned int val; |
14654 |
+ unsigned long offset; |
14655 |
+ size_t pa; |
14656 |
+ |
14657 |
+ pcs = pinctrl_dev_get_drvdata(pctldev); |
14658 |
+ |
14659 |
+- mux_bytes = pcs->width / BITS_PER_BYTE; |
14660 |
+- offset = pin * mux_bytes; |
14661 |
++ offset = pcs_pin_reg_offset_get(pcs, pin); |
14662 |
+ val = pcs->read(pcs->base + offset); |
14663 |
++ |
14664 |
++ if (pcs->bits_per_mux) |
14665 |
++ val &= pcs->fmask << pcs_pin_shift_reg_get(pcs, pin); |
14666 |
++ |
14667 |
+ pa = pcs->res->start + offset; |
14668 |
+ |
14669 |
+ seq_printf(s, "%zx %08x %s ", pa, val, DRIVER_NAME); |
14670 |
+@@ -384,7 +408,6 @@ static int pcs_request_gpio(struct pinctrl_dev *pctldev, |
14671 |
+ struct pcs_device *pcs = pinctrl_dev_get_drvdata(pctldev); |
14672 |
+ struct pcs_gpiofunc_range *frange = NULL; |
14673 |
+ struct list_head *pos, *tmp; |
14674 |
+- int mux_bytes = 0; |
14675 |
+ unsigned data; |
14676 |
+ |
14677 |
+ /* If function mask is null, return directly. */ |
14678 |
+@@ -392,29 +415,27 @@ static int pcs_request_gpio(struct pinctrl_dev *pctldev, |
14679 |
+ return -ENOTSUPP; |
14680 |
+ |
14681 |
+ list_for_each_safe(pos, tmp, &pcs->gpiofuncs) { |
14682 |
++ u32 offset; |
14683 |
++ |
14684 |
+ frange = list_entry(pos, struct pcs_gpiofunc_range, node); |
14685 |
+ if (pin >= frange->offset + frange->npins |
14686 |
+ || pin < frange->offset) |
14687 |
+ continue; |
14688 |
+- mux_bytes = pcs->width / BITS_PER_BYTE; |
14689 |
+ |
14690 |
+- if (pcs->bits_per_mux) { |
14691 |
+- int byte_num, offset, pin_shift; |
14692 |
++ offset = pcs_pin_reg_offset_get(pcs, pin); |
14693 |
+ |
14694 |
+- byte_num = (pcs->bits_per_pin * pin) / BITS_PER_BYTE; |
14695 |
+- offset = (byte_num / mux_bytes) * mux_bytes; |
14696 |
+- pin_shift = pin % (pcs->width / pcs->bits_per_pin) * |
14697 |
+- pcs->bits_per_pin; |
14698 |
++ if (pcs->bits_per_mux) { |
14699 |
++ int pin_shift = pcs_pin_shift_reg_get(pcs, pin); |
14700 |
+ |
14701 |
+ data = pcs->read(pcs->base + offset); |
14702 |
+ data &= ~(pcs->fmask << pin_shift); |
14703 |
+ data |= frange->gpiofunc << pin_shift; |
14704 |
+ pcs->write(data, pcs->base + offset); |
14705 |
+ } else { |
14706 |
+- data = pcs->read(pcs->base + pin * mux_bytes); |
14707 |
++ data = pcs->read(pcs->base + offset); |
14708 |
+ data &= ~pcs->fmask; |
14709 |
+ data |= frange->gpiofunc; |
14710 |
+- pcs->write(data, pcs->base + pin * mux_bytes); |
14711 |
++ pcs->write(data, pcs->base + offset); |
14712 |
+ } |
14713 |
+ break; |
14714 |
+ } |
14715 |
+@@ -656,10 +677,8 @@ static const struct pinconf_ops pcs_pinconf_ops = { |
14716 |
+ * pcs_add_pin() - add a pin to the static per controller pin array |
14717 |
+ * @pcs: pcs driver instance |
14718 |
+ * @offset: register offset from base |
14719 |
+- * @pin_pos: unused |
14720 |
+ */ |
14721 |
+-static int pcs_add_pin(struct pcs_device *pcs, unsigned offset, |
14722 |
+- unsigned pin_pos) |
14723 |
++static int pcs_add_pin(struct pcs_device *pcs, unsigned int offset) |
14724 |
+ { |
14725 |
+ struct pcs_soc_data *pcs_soc = &pcs->socdata; |
14726 |
+ struct pinctrl_pin_desc *pin; |
14727 |
+@@ -728,17 +747,9 @@ static int pcs_allocate_pin_table(struct pcs_device *pcs) |
14728 |
+ for (i = 0; i < pcs->desc.npins; i++) { |
14729 |
+ unsigned offset; |
14730 |
+ int res; |
14731 |
+- int byte_num; |
14732 |
+- int pin_pos = 0; |
14733 |
+ |
14734 |
+- if (pcs->bits_per_mux) { |
14735 |
+- byte_num = (pcs->bits_per_pin * i) / BITS_PER_BYTE; |
14736 |
+- offset = (byte_num / mux_bytes) * mux_bytes; |
14737 |
+- pin_pos = i % num_pins_in_register; |
14738 |
+- } else { |
14739 |
+- offset = i * mux_bytes; |
14740 |
+- } |
14741 |
+- res = pcs_add_pin(pcs, offset, pin_pos); |
14742 |
++ offset = pcs_pin_reg_offset_get(pcs, i); |
14743 |
++ res = pcs_add_pin(pcs, offset); |
14744 |
+ if (res < 0) { |
14745 |
+ dev_err(pcs->dev, "error adding pins: %i\n", res); |
14746 |
+ return res; |
14747 |
+diff --git a/drivers/platform/x86/dell-wmi-sysman/sysman.c b/drivers/platform/x86/dell-wmi-sysman/sysman.c |
14748 |
+index 7410ccae650c2..a90ae6ba4a73b 100644 |
14749 |
+--- a/drivers/platform/x86/dell-wmi-sysman/sysman.c |
14750 |
++++ b/drivers/platform/x86/dell-wmi-sysman/sysman.c |
14751 |
+@@ -399,6 +399,7 @@ static int init_bios_attributes(int attr_type, const char *guid) |
14752 |
+ union acpi_object *obj = NULL; |
14753 |
+ union acpi_object *elements; |
14754 |
+ struct kset *tmp_set; |
14755 |
++ int min_elements; |
14756 |
+ |
14757 |
+ /* instance_id needs to be reset for each type GUID |
14758 |
+ * also, instance IDs are unique within GUID but not across |
14759 |
+@@ -409,14 +410,38 @@ static int init_bios_attributes(int attr_type, const char *guid) |
14760 |
+ retval = alloc_attributes_data(attr_type); |
14761 |
+ if (retval) |
14762 |
+ return retval; |
14763 |
++ |
14764 |
++ switch (attr_type) { |
14765 |
++ case ENUM: min_elements = 8; break; |
14766 |
++ case INT: min_elements = 9; break; |
14767 |
++ case STR: min_elements = 8; break; |
14768 |
++ case PO: min_elements = 4; break; |
14769 |
++ default: |
14770 |
++ pr_err("Error: Unknown attr_type: %d\n", attr_type); |
14771 |
++ return -EINVAL; |
14772 |
++ } |
14773 |
++ |
14774 |
+ /* need to use specific instance_id and guid combination to get right data */ |
14775 |
+ obj = get_wmiobj_pointer(instance_id, guid); |
14776 |
+- if (!obj || obj->type != ACPI_TYPE_PACKAGE) |
14777 |
++ if (!obj) |
14778 |
+ return -ENODEV; |
14779 |
+- elements = obj->package.elements; |
14780 |
+ |
14781 |
+ mutex_lock(&wmi_priv.mutex); |
14782 |
+- while (elements) { |
14783 |
++ while (obj) { |
14784 |
++ if (obj->type != ACPI_TYPE_PACKAGE) { |
14785 |
++ pr_err("Error: Expected ACPI-package type, got: %d\n", obj->type); |
14786 |
++ retval = -EIO; |
14787 |
++ goto err_attr_init; |
14788 |
++ } |
14789 |
++ |
14790 |
++ if (obj->package.count < min_elements) { |
14791 |
++ pr_err("Error: ACPI-package does not have enough elements: %d < %d\n", |
14792 |
++ obj->package.count, min_elements); |
14793 |
++ goto nextobj; |
14794 |
++ } |
14795 |
++ |
14796 |
++ elements = obj->package.elements; |
14797 |
++ |
14798 |
+ /* sanity checking */ |
14799 |
+ if (elements[ATTR_NAME].type != ACPI_TYPE_STRING) { |
14800 |
+ pr_debug("incorrect element type\n"); |
14801 |
+@@ -481,7 +506,6 @@ nextobj: |
14802 |
+ kfree(obj); |
14803 |
+ instance_id++; |
14804 |
+ obj = get_wmiobj_pointer(instance_id, guid); |
14805 |
+- elements = obj ? obj->package.elements : NULL; |
14806 |
+ } |
14807 |
+ |
14808 |
+ mutex_unlock(&wmi_priv.mutex); |
14809 |
+diff --git a/drivers/platform/x86/pmc_atom.c b/drivers/platform/x86/pmc_atom.c |
14810 |
+index ca684ed760d14..a9d2a4b98e570 100644 |
14811 |
+--- a/drivers/platform/x86/pmc_atom.c |
14812 |
++++ b/drivers/platform/x86/pmc_atom.c |
14813 |
+@@ -393,34 +393,10 @@ static const struct dmi_system_id critclk_systems[] = { |
14814 |
+ }, |
14815 |
+ { |
14816 |
+ /* pmc_plt_clk* - are used for ethernet controllers */ |
14817 |
+- .ident = "Beckhoff CB3163", |
14818 |
++ .ident = "Beckhoff Baytrail", |
14819 |
+ .matches = { |
14820 |
+ DMI_MATCH(DMI_SYS_VENDOR, "Beckhoff Automation"), |
14821 |
+- DMI_MATCH(DMI_BOARD_NAME, "CB3163"), |
14822 |
+- }, |
14823 |
+- }, |
14824 |
+- { |
14825 |
+- /* pmc_plt_clk* - are used for ethernet controllers */ |
14826 |
+- .ident = "Beckhoff CB4063", |
14827 |
+- .matches = { |
14828 |
+- DMI_MATCH(DMI_SYS_VENDOR, "Beckhoff Automation"), |
14829 |
+- DMI_MATCH(DMI_BOARD_NAME, "CB4063"), |
14830 |
+- }, |
14831 |
+- }, |
14832 |
+- { |
14833 |
+- /* pmc_plt_clk* - are used for ethernet controllers */ |
14834 |
+- .ident = "Beckhoff CB6263", |
14835 |
+- .matches = { |
14836 |
+- DMI_MATCH(DMI_SYS_VENDOR, "Beckhoff Automation"), |
14837 |
+- DMI_MATCH(DMI_BOARD_NAME, "CB6263"), |
14838 |
+- }, |
14839 |
+- }, |
14840 |
+- { |
14841 |
+- /* pmc_plt_clk* - are used for ethernet controllers */ |
14842 |
+- .ident = "Beckhoff CB6363", |
14843 |
+- .matches = { |
14844 |
+- DMI_MATCH(DMI_SYS_VENDOR, "Beckhoff Automation"), |
14845 |
+- DMI_MATCH(DMI_BOARD_NAME, "CB6363"), |
14846 |
++ DMI_MATCH(DMI_PRODUCT_FAMILY, "CBxx63"), |
14847 |
+ }, |
14848 |
+ }, |
14849 |
+ { |
14850 |
+diff --git a/drivers/power/supply/bq25980_charger.c b/drivers/power/supply/bq25980_charger.c |
14851 |
+index c936f311eb4f0..b94ecf814e434 100644 |
14852 |
+--- a/drivers/power/supply/bq25980_charger.c |
14853 |
++++ b/drivers/power/supply/bq25980_charger.c |
14854 |
+@@ -606,33 +606,6 @@ static int bq25980_get_state(struct bq25980_device *bq, |
14855 |
+ return 0; |
14856 |
+ } |
14857 |
+ |
14858 |
+-static int bq25980_set_battery_property(struct power_supply *psy, |
14859 |
+- enum power_supply_property psp, |
14860 |
+- const union power_supply_propval *val) |
14861 |
+-{ |
14862 |
+- struct bq25980_device *bq = power_supply_get_drvdata(psy); |
14863 |
+- int ret = 0; |
14864 |
+- |
14865 |
+- switch (psp) { |
14866 |
+- case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT: |
14867 |
+- ret = bq25980_set_const_charge_curr(bq, val->intval); |
14868 |
+- if (ret) |
14869 |
+- return ret; |
14870 |
+- break; |
14871 |
+- |
14872 |
+- case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE: |
14873 |
+- ret = bq25980_set_const_charge_volt(bq, val->intval); |
14874 |
+- if (ret) |
14875 |
+- return ret; |
14876 |
+- break; |
14877 |
+- |
14878 |
+- default: |
14879 |
+- return -EINVAL; |
14880 |
+- } |
14881 |
+- |
14882 |
+- return ret; |
14883 |
+-} |
14884 |
+- |
14885 |
+ static int bq25980_get_battery_property(struct power_supply *psy, |
14886 |
+ enum power_supply_property psp, |
14887 |
+ union power_supply_propval *val) |
14888 |
+@@ -701,6 +674,18 @@ static int bq25980_set_charger_property(struct power_supply *psy, |
14889 |
+ return ret; |
14890 |
+ break; |
14891 |
+ |
14892 |
++ case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT: |
14893 |
++ ret = bq25980_set_const_charge_curr(bq, val->intval); |
14894 |
++ if (ret) |
14895 |
++ return ret; |
14896 |
++ break; |
14897 |
++ |
14898 |
++ case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE: |
14899 |
++ ret = bq25980_set_const_charge_volt(bq, val->intval); |
14900 |
++ if (ret) |
14901 |
++ return ret; |
14902 |
++ break; |
14903 |
++ |
14904 |
+ default: |
14905 |
+ return -EINVAL; |
14906 |
+ } |
14907 |
+@@ -922,7 +907,6 @@ static struct power_supply_desc bq25980_battery_desc = { |
14908 |
+ .name = "bq25980-battery", |
14909 |
+ .type = POWER_SUPPLY_TYPE_BATTERY, |
14910 |
+ .get_property = bq25980_get_battery_property, |
14911 |
+- .set_property = bq25980_set_battery_property, |
14912 |
+ .properties = bq25980_battery_props, |
14913 |
+ .num_properties = ARRAY_SIZE(bq25980_battery_props), |
14914 |
+ .property_is_writeable = bq25980_property_is_writeable, |
14915 |
+diff --git a/drivers/regulator/bd9576-regulator.c b/drivers/regulator/bd9576-regulator.c |
14916 |
+index a8b5832a5a1bb..204a2da054f53 100644 |
14917 |
+--- a/drivers/regulator/bd9576-regulator.c |
14918 |
++++ b/drivers/regulator/bd9576-regulator.c |
14919 |
+@@ -206,7 +206,7 @@ static int bd957x_probe(struct platform_device *pdev) |
14920 |
+ { |
14921 |
+ struct regmap *regmap; |
14922 |
+ struct regulator_config config = { 0 }; |
14923 |
+- int i, err; |
14924 |
++ int i; |
14925 |
+ bool vout_mode, ddr_sel; |
14926 |
+ const struct bd957x_regulator_data *reg_data = &bd9576_regulators[0]; |
14927 |
+ unsigned int num_reg_data = ARRAY_SIZE(bd9576_regulators); |
14928 |
+@@ -279,8 +279,7 @@ static int bd957x_probe(struct platform_device *pdev) |
14929 |
+ break; |
14930 |
+ default: |
14931 |
+ dev_err(&pdev->dev, "Unsupported chip type\n"); |
14932 |
+- err = -EINVAL; |
14933 |
+- goto err; |
14934 |
++ return -EINVAL; |
14935 |
+ } |
14936 |
+ |
14937 |
+ config.dev = pdev->dev.parent; |
14938 |
+@@ -300,8 +299,7 @@ static int bd957x_probe(struct platform_device *pdev) |
14939 |
+ dev_err(&pdev->dev, |
14940 |
+ "failed to register %s regulator\n", |
14941 |
+ desc->name); |
14942 |
+- err = PTR_ERR(rdev); |
14943 |
+- goto err; |
14944 |
++ return PTR_ERR(rdev); |
14945 |
+ } |
14946 |
+ /* |
14947 |
+ * Clear the VOUT1 GPIO setting - rest of the regulators do not |
14948 |
+@@ -310,8 +308,7 @@ static int bd957x_probe(struct platform_device *pdev) |
14949 |
+ config.ena_gpiod = NULL; |
14950 |
+ } |
14951 |
+ |
14952 |
+-err: |
14953 |
+- return err; |
14954 |
++ return 0; |
14955 |
+ } |
14956 |
+ |
14957 |
+ static const struct platform_device_id bd957x_pmic_id[] = { |
14958 |
+diff --git a/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c |
14959 |
+index 22eecc89d41bd..6c2a97f80b120 100644 |
14960 |
+--- a/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c |
14961 |
++++ b/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c |
14962 |
+@@ -1644,7 +1644,7 @@ static int interrupt_init_v1_hw(struct hisi_hba *hisi_hba) |
14963 |
+ idx = i * HISI_SAS_PHY_INT_NR; |
14964 |
+ for (j = 0; j < HISI_SAS_PHY_INT_NR; j++, idx++) { |
14965 |
+ irq = platform_get_irq(pdev, idx); |
14966 |
+- if (!irq) { |
14967 |
++ if (irq < 0) { |
14968 |
+ dev_err(dev, "irq init: fail map phy interrupt %d\n", |
14969 |
+ idx); |
14970 |
+ return -ENOENT; |
14971 |
+@@ -1663,7 +1663,7 @@ static int interrupt_init_v1_hw(struct hisi_hba *hisi_hba) |
14972 |
+ idx = hisi_hba->n_phy * HISI_SAS_PHY_INT_NR; |
14973 |
+ for (i = 0; i < hisi_hba->queue_count; i++, idx++) { |
14974 |
+ irq = platform_get_irq(pdev, idx); |
14975 |
+- if (!irq) { |
14976 |
++ if (irq < 0) { |
14977 |
+ dev_err(dev, "irq init: could not map cq interrupt %d\n", |
14978 |
+ idx); |
14979 |
+ return -ENOENT; |
14980 |
+@@ -1681,7 +1681,7 @@ static int interrupt_init_v1_hw(struct hisi_hba *hisi_hba) |
14981 |
+ idx = (hisi_hba->n_phy * HISI_SAS_PHY_INT_NR) + hisi_hba->queue_count; |
14982 |
+ for (i = 0; i < HISI_SAS_FATAL_INT_NR; i++, idx++) { |
14983 |
+ irq = platform_get_irq(pdev, idx); |
14984 |
+- if (!irq) { |
14985 |
++ if (irq < 0) { |
14986 |
+ dev_err(dev, "irq init: could not map fatal interrupt %d\n", |
14987 |
+ idx); |
14988 |
+ return -ENOENT; |
14989 |
+diff --git a/drivers/scsi/ibmvscsi/ibmvfc.c b/drivers/scsi/ibmvscsi/ibmvfc.c |
14990 |
+index 65f168c41d233..8ac9eb962bffe 100644 |
14991 |
+--- a/drivers/scsi/ibmvscsi/ibmvfc.c |
14992 |
++++ b/drivers/scsi/ibmvscsi/ibmvfc.c |
14993 |
+@@ -560,8 +560,17 @@ static void ibmvfc_set_host_action(struct ibmvfc_host *vhost, |
14994 |
+ if (vhost->action == IBMVFC_HOST_ACTION_ALLOC_TGTS) |
14995 |
+ vhost->action = action; |
14996 |
+ break; |
14997 |
++ case IBMVFC_HOST_ACTION_REENABLE: |
14998 |
++ case IBMVFC_HOST_ACTION_RESET: |
14999 |
++ vhost->action = action; |
15000 |
++ break; |
15001 |
+ case IBMVFC_HOST_ACTION_INIT: |
15002 |
+ case IBMVFC_HOST_ACTION_TGT_DEL: |
15003 |
++ case IBMVFC_HOST_ACTION_LOGO: |
15004 |
++ case IBMVFC_HOST_ACTION_QUERY_TGTS: |
15005 |
++ case IBMVFC_HOST_ACTION_TGT_DEL_FAILED: |
15006 |
++ case IBMVFC_HOST_ACTION_NONE: |
15007 |
++ default: |
15008 |
+ switch (vhost->action) { |
15009 |
+ case IBMVFC_HOST_ACTION_RESET: |
15010 |
+ case IBMVFC_HOST_ACTION_REENABLE: |
15011 |
+@@ -571,15 +580,6 @@ static void ibmvfc_set_host_action(struct ibmvfc_host *vhost, |
15012 |
+ break; |
15013 |
+ } |
15014 |
+ break; |
15015 |
+- case IBMVFC_HOST_ACTION_LOGO: |
15016 |
+- case IBMVFC_HOST_ACTION_QUERY_TGTS: |
15017 |
+- case IBMVFC_HOST_ACTION_TGT_DEL_FAILED: |
15018 |
+- case IBMVFC_HOST_ACTION_NONE: |
15019 |
+- case IBMVFC_HOST_ACTION_RESET: |
15020 |
+- case IBMVFC_HOST_ACTION_REENABLE: |
15021 |
+- default: |
15022 |
+- vhost->action = action; |
15023 |
+- break; |
15024 |
+ } |
15025 |
+ } |
15026 |
+ |
15027 |
+@@ -4723,26 +4723,45 @@ static void ibmvfc_do_work(struct ibmvfc_host *vhost) |
15028 |
+ case IBMVFC_HOST_ACTION_INIT_WAIT: |
15029 |
+ break; |
15030 |
+ case IBMVFC_HOST_ACTION_RESET: |
15031 |
+- vhost->action = IBMVFC_HOST_ACTION_TGT_DEL; |
15032 |
+ spin_unlock_irqrestore(vhost->host->host_lock, flags); |
15033 |
+ rc = ibmvfc_reset_crq(vhost); |
15034 |
++ |
15035 |
+ spin_lock_irqsave(vhost->host->host_lock, flags); |
15036 |
+- if (rc == H_CLOSED) |
15037 |
++ if (!rc || rc == H_CLOSED) |
15038 |
+ vio_enable_interrupts(to_vio_dev(vhost->dev)); |
15039 |
+- if (rc || (rc = ibmvfc_send_crq_init(vhost)) || |
15040 |
+- (rc = vio_enable_interrupts(to_vio_dev(vhost->dev)))) { |
15041 |
+- ibmvfc_link_down(vhost, IBMVFC_LINK_DEAD); |
15042 |
+- dev_err(vhost->dev, "Error after reset (rc=%d)\n", rc); |
15043 |
++ if (vhost->action == IBMVFC_HOST_ACTION_RESET) { |
15044 |
++ /* |
15045 |
++ * The only action we could have changed to would have |
15046 |
++ * been reenable, in which case, we skip the rest of |
15047 |
++ * this path and wait until we've done the re-enable |
15048 |
++ * before sending the crq init. |
15049 |
++ */ |
15050 |
++ vhost->action = IBMVFC_HOST_ACTION_TGT_DEL; |
15051 |
++ |
15052 |
++ if (rc || (rc = ibmvfc_send_crq_init(vhost)) || |
15053 |
++ (rc = vio_enable_interrupts(to_vio_dev(vhost->dev)))) { |
15054 |
++ ibmvfc_link_down(vhost, IBMVFC_LINK_DEAD); |
15055 |
++ dev_err(vhost->dev, "Error after reset (rc=%d)\n", rc); |
15056 |
++ } |
15057 |
+ } |
15058 |
+ break; |
15059 |
+ case IBMVFC_HOST_ACTION_REENABLE: |
15060 |
+- vhost->action = IBMVFC_HOST_ACTION_TGT_DEL; |
15061 |
+ spin_unlock_irqrestore(vhost->host->host_lock, flags); |
15062 |
+ rc = ibmvfc_reenable_crq_queue(vhost); |
15063 |
++ |
15064 |
+ spin_lock_irqsave(vhost->host->host_lock, flags); |
15065 |
+- if (rc || (rc = ibmvfc_send_crq_init(vhost))) { |
15066 |
+- ibmvfc_link_down(vhost, IBMVFC_LINK_DEAD); |
15067 |
+- dev_err(vhost->dev, "Error after enable (rc=%d)\n", rc); |
15068 |
++ if (vhost->action == IBMVFC_HOST_ACTION_REENABLE) { |
15069 |
++ /* |
15070 |
++ * The only action we could have changed to would have |
15071 |
++ * been reset, in which case, we skip the rest of this |
15072 |
++ * path and wait until we've done the reset before |
15073 |
++ * sending the crq init. |
15074 |
++ */ |
15075 |
++ vhost->action = IBMVFC_HOST_ACTION_TGT_DEL; |
15076 |
++ if (rc || (rc = ibmvfc_send_crq_init(vhost))) { |
15077 |
++ ibmvfc_link_down(vhost, IBMVFC_LINK_DEAD); |
15078 |
++ dev_err(vhost->dev, "Error after enable (rc=%d)\n", rc); |
15079 |
++ } |
15080 |
+ } |
15081 |
+ break; |
15082 |
+ case IBMVFC_HOST_ACTION_LOGO: |
15083 |
+diff --git a/drivers/scsi/jazz_esp.c b/drivers/scsi/jazz_esp.c |
15084 |
+index f0ed6863cc700..60a88a95a8e23 100644 |
15085 |
+--- a/drivers/scsi/jazz_esp.c |
15086 |
++++ b/drivers/scsi/jazz_esp.c |
15087 |
+@@ -143,7 +143,9 @@ static int esp_jazz_probe(struct platform_device *dev) |
15088 |
+ if (!esp->command_block) |
15089 |
+ goto fail_unmap_regs; |
15090 |
+ |
15091 |
+- host->irq = platform_get_irq(dev, 0); |
15092 |
++ host->irq = err = platform_get_irq(dev, 0); |
15093 |
++ if (err < 0) |
15094 |
++ goto fail_unmap_command_block; |
15095 |
+ err = request_irq(host->irq, scsi_esp_intr, IRQF_SHARED, "ESP", esp); |
15096 |
+ if (err < 0) |
15097 |
+ goto fail_unmap_command_block; |
15098 |
+diff --git a/drivers/scsi/lpfc/lpfc_els.c b/drivers/scsi/lpfc/lpfc_els.c |
15099 |
+index 2dce17827504f..7359d4f118dfa 100644 |
15100 |
+--- a/drivers/scsi/lpfc/lpfc_els.c |
15101 |
++++ b/drivers/scsi/lpfc/lpfc_els.c |
15102 |
+@@ -1,7 +1,7 @@ |
15103 |
+ /******************************************************************* |
15104 |
+ * This file is part of the Emulex Linux Device Driver for * |
15105 |
+ * Fibre Channel Host Bus Adapters. * |
15106 |
+- * Copyright (C) 2017-2020 Broadcom. All Rights Reserved. The term * |
15107 |
++ * Copyright (C) 2017-2021 Broadcom. All Rights Reserved. The term * |
15108 |
+ * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * |
15109 |
+ * Copyright (C) 2004-2016 Emulex. All rights reserved. * |
15110 |
+ * EMULEX and SLI are trademarks of Emulex. * |
15111 |
+@@ -2041,13 +2041,12 @@ out_freeiocb: |
15112 |
+ * This routine issues a Port Login (PLOGI) command to a remote N_Port |
15113 |
+ * (with the @did) for a @vport. Before issuing a PLOGI to a remote N_Port, |
15114 |
+ * the ndlp with the remote N_Port DID must exist on the @vport's ndlp list. |
15115 |
+- * This routine constructs the proper feilds of the PLOGI IOCB and invokes |
15116 |
++ * This routine constructs the proper fields of the PLOGI IOCB and invokes |
15117 |
+ * the lpfc_sli_issue_iocb() routine to send out PLOGI ELS command. |
15118 |
+ * |
15119 |
+- * Note that, in lpfc_prep_els_iocb() routine, the reference count of ndlp |
15120 |
+- * will be incremented by 1 for holding the ndlp and the reference to ndlp |
15121 |
+- * will be stored into the context1 field of the IOCB for the completion |
15122 |
+- * callback function to the PLOGI ELS command. |
15123 |
++ * Note that the ndlp reference count will be incremented by 1 for holding |
15124 |
++ * the ndlp and the reference to ndlp will be stored into the context1 field |
15125 |
++ * of the IOCB for the completion callback function to the PLOGI ELS command. |
15126 |
+ * |
15127 |
+ * Return code |
15128 |
+ * 0 - Successfully issued a plogi for @vport |
15129 |
+@@ -2065,29 +2064,28 @@ lpfc_issue_els_plogi(struct lpfc_vport *vport, uint32_t did, uint8_t retry) |
15130 |
+ int ret; |
15131 |
+ |
15132 |
+ ndlp = lpfc_findnode_did(vport, did); |
15133 |
++ if (!ndlp) |
15134 |
++ return 1; |
15135 |
+ |
15136 |
+- if (ndlp) { |
15137 |
+- /* Defer the processing of the issue PLOGI until after the |
15138 |
+- * outstanding UNREG_RPI mbox command completes, unless we |
15139 |
+- * are going offline. This logic does not apply for Fabric DIDs |
15140 |
+- */ |
15141 |
+- if ((ndlp->nlp_flag & NLP_UNREG_INP) && |
15142 |
+- ((ndlp->nlp_DID & Fabric_DID_MASK) != Fabric_DID_MASK) && |
15143 |
+- !(vport->fc_flag & FC_OFFLINE_MODE)) { |
15144 |
+- lpfc_printf_vlog(vport, KERN_INFO, LOG_DISCOVERY, |
15145 |
+- "4110 Issue PLOGI x%x deferred " |
15146 |
+- "on NPort x%x rpi x%x Data: x%px\n", |
15147 |
+- ndlp->nlp_defer_did, ndlp->nlp_DID, |
15148 |
+- ndlp->nlp_rpi, ndlp); |
15149 |
+- |
15150 |
+- /* We can only defer 1st PLOGI */ |
15151 |
+- if (ndlp->nlp_defer_did == NLP_EVT_NOTHING_PENDING) |
15152 |
+- ndlp->nlp_defer_did = did; |
15153 |
+- return 0; |
15154 |
+- } |
15155 |
++ /* Defer the processing of the issue PLOGI until after the |
15156 |
++ * outstanding UNREG_RPI mbox command completes, unless we |
15157 |
++ * are going offline. This logic does not apply for Fabric DIDs |
15158 |
++ */ |
15159 |
++ if ((ndlp->nlp_flag & NLP_UNREG_INP) && |
15160 |
++ ((ndlp->nlp_DID & Fabric_DID_MASK) != Fabric_DID_MASK) && |
15161 |
++ !(vport->fc_flag & FC_OFFLINE_MODE)) { |
15162 |
++ lpfc_printf_vlog(vport, KERN_INFO, LOG_DISCOVERY, |
15163 |
++ "4110 Issue PLOGI x%x deferred " |
15164 |
++ "on NPort x%x rpi x%x Data: x%px\n", |
15165 |
++ ndlp->nlp_defer_did, ndlp->nlp_DID, |
15166 |
++ ndlp->nlp_rpi, ndlp); |
15167 |
++ |
15168 |
++ /* We can only defer 1st PLOGI */ |
15169 |
++ if (ndlp->nlp_defer_did == NLP_EVT_NOTHING_PENDING) |
15170 |
++ ndlp->nlp_defer_did = did; |
15171 |
++ return 0; |
15172 |
+ } |
15173 |
+ |
15174 |
+- /* If ndlp is not NULL, we will bump the reference count on it */ |
15175 |
+ cmdsize = (sizeof(uint32_t) + sizeof(struct serv_parm)); |
15176 |
+ elsiocb = lpfc_prep_els_iocb(vport, 1, cmdsize, retry, ndlp, did, |
15177 |
+ ELS_CMD_PLOGI); |
15178 |
+diff --git a/drivers/scsi/pm8001/pm8001_hwi.c b/drivers/scsi/pm8001/pm8001_hwi.c |
15179 |
+index 6fa739c92beb3..a28813d2683ae 100644 |
15180 |
+--- a/drivers/scsi/pm8001/pm8001_hwi.c |
15181 |
++++ b/drivers/scsi/pm8001/pm8001_hwi.c |
15182 |
+@@ -643,7 +643,7 @@ static void init_pci_device_addresses(struct pm8001_hba_info *pm8001_ha) |
15183 |
+ */ |
15184 |
+ static int pm8001_chip_init(struct pm8001_hba_info *pm8001_ha) |
15185 |
+ { |
15186 |
+- u8 i = 0; |
15187 |
++ u32 i = 0; |
15188 |
+ u16 deviceid; |
15189 |
+ pci_read_config_word(pm8001_ha->pdev, PCI_DEVICE_ID, &deviceid); |
15190 |
+ /* 8081 controllers need BAR shift to access MPI space |
15191 |
+diff --git a/drivers/scsi/pm8001/pm80xx_hwi.c b/drivers/scsi/pm8001/pm80xx_hwi.c |
15192 |
+index f617177b7bb33..60c7d215726bc 100644 |
15193 |
+--- a/drivers/scsi/pm8001/pm80xx_hwi.c |
15194 |
++++ b/drivers/scsi/pm8001/pm80xx_hwi.c |
15195 |
+@@ -1489,9 +1489,9 @@ static int mpi_uninit_check(struct pm8001_hba_info *pm8001_ha) |
15196 |
+ |
15197 |
+ /* wait until Inbound DoorBell Clear Register toggled */ |
15198 |
+ if (IS_SPCV_12G(pm8001_ha->pdev)) { |
15199 |
+- max_wait_count = 4 * 1000 * 1000;/* 4 sec */ |
15200 |
++ max_wait_count = 30 * 1000 * 1000; /* 30 sec */ |
15201 |
+ } else { |
15202 |
+- max_wait_count = 2 * 1000 * 1000;/* 2 sec */ |
15203 |
++ max_wait_count = 15 * 1000 * 1000; /* 15 sec */ |
15204 |
+ } |
15205 |
+ do { |
15206 |
+ udelay(1); |
15207 |
+diff --git a/drivers/scsi/sni_53c710.c b/drivers/scsi/sni_53c710.c |
15208 |
+index 9e2e196bc2026..97c6f81b1d2a6 100644 |
15209 |
+--- a/drivers/scsi/sni_53c710.c |
15210 |
++++ b/drivers/scsi/sni_53c710.c |
15211 |
+@@ -58,6 +58,7 @@ static int snirm710_probe(struct platform_device *dev) |
15212 |
+ struct NCR_700_Host_Parameters *hostdata; |
15213 |
+ struct Scsi_Host *host; |
15214 |
+ struct resource *res; |
15215 |
++ int rc; |
15216 |
+ |
15217 |
+ res = platform_get_resource(dev, IORESOURCE_MEM, 0); |
15218 |
+ if (!res) |
15219 |
+@@ -83,7 +84,9 @@ static int snirm710_probe(struct platform_device *dev) |
15220 |
+ goto out_kfree; |
15221 |
+ host->this_id = 7; |
15222 |
+ host->base = base; |
15223 |
+- host->irq = platform_get_irq(dev, 0); |
15224 |
++ host->irq = rc = platform_get_irq(dev, 0); |
15225 |
++ if (rc < 0) |
15226 |
++ goto out_put_host; |
15227 |
+ if(request_irq(host->irq, NCR_700_intr, IRQF_SHARED, "snirm710", host)) { |
15228 |
+ printk(KERN_ERR "snirm710: request_irq failed!\n"); |
15229 |
+ goto out_put_host; |
15230 |
+diff --git a/drivers/scsi/sun3x_esp.c b/drivers/scsi/sun3x_esp.c |
15231 |
+index 7de82f2c97579..d3489ac7ab28b 100644 |
15232 |
+--- a/drivers/scsi/sun3x_esp.c |
15233 |
++++ b/drivers/scsi/sun3x_esp.c |
15234 |
+@@ -206,7 +206,9 @@ static int esp_sun3x_probe(struct platform_device *dev) |
15235 |
+ if (!esp->command_block) |
15236 |
+ goto fail_unmap_regs_dma; |
15237 |
+ |
15238 |
+- host->irq = platform_get_irq(dev, 0); |
15239 |
++ host->irq = err = platform_get_irq(dev, 0); |
15240 |
++ if (err < 0) |
15241 |
++ goto fail_unmap_command_block; |
15242 |
+ err = request_irq(host->irq, scsi_esp_intr, IRQF_SHARED, |
15243 |
+ "SUN3X ESP", esp); |
15244 |
+ if (err < 0) |
15245 |
+diff --git a/drivers/scsi/ufs/ufshcd-pltfrm.c b/drivers/scsi/ufs/ufshcd-pltfrm.c |
15246 |
+index 1a69949a4ea1c..b56d9b4e5f033 100644 |
15247 |
+--- a/drivers/scsi/ufs/ufshcd-pltfrm.c |
15248 |
++++ b/drivers/scsi/ufs/ufshcd-pltfrm.c |
15249 |
+@@ -377,7 +377,7 @@ int ufshcd_pltfrm_init(struct platform_device *pdev, |
15250 |
+ |
15251 |
+ irq = platform_get_irq(pdev, 0); |
15252 |
+ if (irq < 0) { |
15253 |
+- err = -ENODEV; |
15254 |
++ err = irq; |
15255 |
+ goto out; |
15256 |
+ } |
15257 |
+ |
15258 |
+diff --git a/drivers/soc/aspeed/aspeed-lpc-snoop.c b/drivers/soc/aspeed/aspeed-lpc-snoop.c |
15259 |
+index 20acac6342eff..5828f94b8a7df 100644 |
15260 |
+--- a/drivers/soc/aspeed/aspeed-lpc-snoop.c |
15261 |
++++ b/drivers/soc/aspeed/aspeed-lpc-snoop.c |
15262 |
+@@ -95,8 +95,10 @@ static ssize_t snoop_file_read(struct file *file, char __user *buffer, |
15263 |
+ return -EINTR; |
15264 |
+ } |
15265 |
+ ret = kfifo_to_user(&chan->fifo, buffer, count, &copied); |
15266 |
++ if (ret) |
15267 |
++ return ret; |
15268 |
+ |
15269 |
+- return ret ? ret : copied; |
15270 |
++ return copied; |
15271 |
+ } |
15272 |
+ |
15273 |
+ static __poll_t snoop_file_poll(struct file *file, |
15274 |
+diff --git a/drivers/soc/qcom/mdt_loader.c b/drivers/soc/qcom/mdt_loader.c |
15275 |
+index 24cd193dec550..eba7f76f9d61a 100644 |
15276 |
+--- a/drivers/soc/qcom/mdt_loader.c |
15277 |
++++ b/drivers/soc/qcom/mdt_loader.c |
15278 |
+@@ -230,6 +230,14 @@ static int __qcom_mdt_load(struct device *dev, const struct firmware *fw, |
15279 |
+ break; |
15280 |
+ } |
15281 |
+ |
15282 |
++ if (phdr->p_filesz > phdr->p_memsz) { |
15283 |
++ dev_err(dev, |
15284 |
++ "refusing to load segment %d with p_filesz > p_memsz\n", |
15285 |
++ i); |
15286 |
++ ret = -EINVAL; |
15287 |
++ break; |
15288 |
++ } |
15289 |
++ |
15290 |
+ ptr = mem_region + offset; |
15291 |
+ |
15292 |
+ if (phdr->p_filesz && phdr->p_offset < fw->size) { |
15293 |
+@@ -253,6 +261,15 @@ static int __qcom_mdt_load(struct device *dev, const struct firmware *fw, |
15294 |
+ break; |
15295 |
+ } |
15296 |
+ |
15297 |
++ if (seg_fw->size != phdr->p_filesz) { |
15298 |
++ dev_err(dev, |
15299 |
++ "failed to load segment %d from truncated file %s\n", |
15300 |
++ i, fw_name); |
15301 |
++ release_firmware(seg_fw); |
15302 |
++ ret = -EINVAL; |
15303 |
++ break; |
15304 |
++ } |
15305 |
++ |
15306 |
+ release_firmware(seg_fw); |
15307 |
+ } |
15308 |
+ |
15309 |
+diff --git a/drivers/soc/qcom/pdr_interface.c b/drivers/soc/qcom/pdr_interface.c |
15310 |
+index 209dcdca923f9..915d5bc3d46e6 100644 |
15311 |
+--- a/drivers/soc/qcom/pdr_interface.c |
15312 |
++++ b/drivers/soc/qcom/pdr_interface.c |
15313 |
+@@ -153,7 +153,7 @@ static int pdr_register_listener(struct pdr_handle *pdr, |
15314 |
+ if (resp.resp.result != QMI_RESULT_SUCCESS_V01) { |
15315 |
+ pr_err("PDR: %s register listener failed: 0x%x\n", |
15316 |
+ pds->service_path, resp.resp.error); |
15317 |
+- return ret; |
15318 |
++ return -EREMOTEIO; |
15319 |
+ } |
15320 |
+ |
15321 |
+ pds->state = resp.curr_state; |
15322 |
+diff --git a/drivers/soc/tegra/regulators-tegra30.c b/drivers/soc/tegra/regulators-tegra30.c |
15323 |
+index 7f21f31de09d6..0e776b20f6252 100644 |
15324 |
+--- a/drivers/soc/tegra/regulators-tegra30.c |
15325 |
++++ b/drivers/soc/tegra/regulators-tegra30.c |
15326 |
+@@ -178,7 +178,7 @@ static int tegra30_voltage_update(struct tegra_regulator_coupler *tegra, |
15327 |
+ * survive the voltage drop if it's running on a higher frequency. |
15328 |
+ */ |
15329 |
+ if (!cpu_min_uV_consumers) |
15330 |
+- cpu_min_uV = cpu_uV; |
15331 |
++ cpu_min_uV = max(cpu_uV, cpu_min_uV); |
15332 |
+ |
15333 |
+ /* |
15334 |
+ * Bootloader shall set up voltages correctly, but if it |
15335 |
+diff --git a/drivers/soundwire/bus.c b/drivers/soundwire/bus.c |
15336 |
+index 662b3b0302467..03ed618ffc59b 100644 |
15337 |
+--- a/drivers/soundwire/bus.c |
15338 |
++++ b/drivers/soundwire/bus.c |
15339 |
+@@ -703,7 +703,7 @@ static int sdw_program_device_num(struct sdw_bus *bus) |
15340 |
+ struct sdw_slave *slave, *_s; |
15341 |
+ struct sdw_slave_id id; |
15342 |
+ struct sdw_msg msg; |
15343 |
+- bool found = false; |
15344 |
++ bool found; |
15345 |
+ int count = 0, ret; |
15346 |
+ u64 addr; |
15347 |
+ |
15348 |
+@@ -735,6 +735,7 @@ static int sdw_program_device_num(struct sdw_bus *bus) |
15349 |
+ |
15350 |
+ sdw_extract_slave_id(bus, addr, &id); |
15351 |
+ |
15352 |
++ found = false; |
15353 |
+ /* Now compare with entries */ |
15354 |
+ list_for_each_entry_safe(slave, _s, &bus->slaves, node) { |
15355 |
+ if (sdw_compare_devid(slave, id) == 0) { |
15356 |
+diff --git a/drivers/soundwire/stream.c b/drivers/soundwire/stream.c |
15357 |
+index 1099b5d1262be..a418c3c7001c0 100644 |
15358 |
+--- a/drivers/soundwire/stream.c |
15359 |
++++ b/drivers/soundwire/stream.c |
15360 |
+@@ -1375,8 +1375,16 @@ int sdw_stream_add_slave(struct sdw_slave *slave, |
15361 |
+ } |
15362 |
+ |
15363 |
+ ret = sdw_config_stream(&slave->dev, stream, stream_config, true); |
15364 |
+- if (ret) |
15365 |
++ if (ret) { |
15366 |
++ /* |
15367 |
++ * sdw_release_master_stream will release s_rt in slave_rt_list in |
15368 |
++ * stream_error case, but s_rt is only added to slave_rt_list |
15369 |
++ * when sdw_config_stream is successful, so free s_rt explicitly |
15370 |
++ * when sdw_config_stream is failed. |
15371 |
++ */ |
15372 |
++ kfree(s_rt); |
15373 |
+ goto stream_error; |
15374 |
++ } |
15375 |
+ |
15376 |
+ list_add_tail(&s_rt->m_rt_node, &m_rt->slave_rt_list); |
15377 |
+ |
15378 |
+diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c |
15379 |
+index a2886ee44e4cb..5d98611dd999d 100644 |
15380 |
+--- a/drivers/spi/spi-fsl-lpspi.c |
15381 |
++++ b/drivers/spi/spi-fsl-lpspi.c |
15382 |
+@@ -200,7 +200,7 @@ static int lpspi_prepare_xfer_hardware(struct spi_controller *controller) |
15383 |
+ spi_controller_get_devdata(controller); |
15384 |
+ int ret; |
15385 |
+ |
15386 |
+- ret = pm_runtime_get_sync(fsl_lpspi->dev); |
15387 |
++ ret = pm_runtime_resume_and_get(fsl_lpspi->dev); |
15388 |
+ if (ret < 0) { |
15389 |
+ dev_err(fsl_lpspi->dev, "failed to enable clock\n"); |
15390 |
+ return ret; |
15391 |
+diff --git a/drivers/spi/spi-fsl-spi.c b/drivers/spi/spi-fsl-spi.c |
15392 |
+index e4a8d203f9408..d0e5aa18b7bad 100644 |
15393 |
+--- a/drivers/spi/spi-fsl-spi.c |
15394 |
++++ b/drivers/spi/spi-fsl-spi.c |
15395 |
+@@ -707,6 +707,11 @@ static int of_fsl_spi_probe(struct platform_device *ofdev) |
15396 |
+ struct resource mem; |
15397 |
+ int irq, type; |
15398 |
+ int ret; |
15399 |
++ bool spisel_boot = false; |
15400 |
++#if IS_ENABLED(CONFIG_FSL_SOC) |
15401 |
++ struct mpc8xxx_spi_probe_info *pinfo = NULL; |
15402 |
++#endif |
15403 |
++ |
15404 |
+ |
15405 |
+ ret = of_mpc8xxx_spi_probe(ofdev); |
15406 |
+ if (ret) |
15407 |
+@@ -715,9 +720,8 @@ static int of_fsl_spi_probe(struct platform_device *ofdev) |
15408 |
+ type = fsl_spi_get_type(&ofdev->dev); |
15409 |
+ if (type == TYPE_FSL) { |
15410 |
+ struct fsl_spi_platform_data *pdata = dev_get_platdata(dev); |
15411 |
+- bool spisel_boot = false; |
15412 |
+ #if IS_ENABLED(CONFIG_FSL_SOC) |
15413 |
+- struct mpc8xxx_spi_probe_info *pinfo = to_of_pinfo(pdata); |
15414 |
++ pinfo = to_of_pinfo(pdata); |
15415 |
+ |
15416 |
+ spisel_boot = of_property_read_bool(np, "fsl,spisel_boot"); |
15417 |
+ if (spisel_boot) { |
15418 |
+@@ -746,15 +750,24 @@ static int of_fsl_spi_probe(struct platform_device *ofdev) |
15419 |
+ |
15420 |
+ ret = of_address_to_resource(np, 0, &mem); |
15421 |
+ if (ret) |
15422 |
+- return ret; |
15423 |
++ goto unmap_out; |
15424 |
+ |
15425 |
+ irq = platform_get_irq(ofdev, 0); |
15426 |
+- if (irq < 0) |
15427 |
+- return irq; |
15428 |
++ if (irq < 0) { |
15429 |
++ ret = irq; |
15430 |
++ goto unmap_out; |
15431 |
++ } |
15432 |
+ |
15433 |
+ master = fsl_spi_probe(dev, &mem, irq); |
15434 |
+ |
15435 |
+ return PTR_ERR_OR_ZERO(master); |
15436 |
++ |
15437 |
++unmap_out: |
15438 |
++#if IS_ENABLED(CONFIG_FSL_SOC) |
15439 |
++ if (spisel_boot) |
15440 |
++ iounmap(pinfo->immr_spi_cs); |
15441 |
++#endif |
15442 |
++ return ret; |
15443 |
+ } |
15444 |
+ |
15445 |
+ static int of_fsl_spi_remove(struct platform_device *ofdev) |
15446 |
+diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c |
15447 |
+index 09d8e92400eb8..0e2c377e9e55c 100644 |
15448 |
+--- a/drivers/spi/spi-rockchip.c |
15449 |
++++ b/drivers/spi/spi-rockchip.c |
15450 |
+@@ -476,7 +476,7 @@ static int rockchip_spi_prepare_dma(struct rockchip_spi *rs, |
15451 |
+ return 1; |
15452 |
+ } |
15453 |
+ |
15454 |
+-static void rockchip_spi_config(struct rockchip_spi *rs, |
15455 |
++static int rockchip_spi_config(struct rockchip_spi *rs, |
15456 |
+ struct spi_device *spi, struct spi_transfer *xfer, |
15457 |
+ bool use_dma, bool slave_mode) |
15458 |
+ { |
15459 |
+@@ -521,7 +521,9 @@ static void rockchip_spi_config(struct rockchip_spi *rs, |
15460 |
+ * ctlr->bits_per_word_mask, so this shouldn't |
15461 |
+ * happen |
15462 |
+ */ |
15463 |
+- unreachable(); |
15464 |
++ dev_err(rs->dev, "unknown bits per word: %d\n", |
15465 |
++ xfer->bits_per_word); |
15466 |
++ return -EINVAL; |
15467 |
+ } |
15468 |
+ |
15469 |
+ if (use_dma) { |
15470 |
+@@ -554,6 +556,8 @@ static void rockchip_spi_config(struct rockchip_spi *rs, |
15471 |
+ */ |
15472 |
+ writel_relaxed(2 * DIV_ROUND_UP(rs->freq, 2 * xfer->speed_hz), |
15473 |
+ rs->regs + ROCKCHIP_SPI_BAUDR); |
15474 |
++ |
15475 |
++ return 0; |
15476 |
+ } |
15477 |
+ |
15478 |
+ static size_t rockchip_spi_max_transfer_size(struct spi_device *spi) |
15479 |
+@@ -577,6 +581,7 @@ static int rockchip_spi_transfer_one( |
15480 |
+ struct spi_transfer *xfer) |
15481 |
+ { |
15482 |
+ struct rockchip_spi *rs = spi_controller_get_devdata(ctlr); |
15483 |
++ int ret; |
15484 |
+ bool use_dma; |
15485 |
+ |
15486 |
+ WARN_ON(readl_relaxed(rs->regs + ROCKCHIP_SPI_SSIENR) && |
15487 |
+@@ -596,7 +601,9 @@ static int rockchip_spi_transfer_one( |
15488 |
+ |
15489 |
+ use_dma = ctlr->can_dma ? ctlr->can_dma(ctlr, spi, xfer) : false; |
15490 |
+ |
15491 |
+- rockchip_spi_config(rs, spi, xfer, use_dma, ctlr->slave); |
15492 |
++ ret = rockchip_spi_config(rs, spi, xfer, use_dma, ctlr->slave); |
15493 |
++ if (ret) |
15494 |
++ return ret; |
15495 |
+ |
15496 |
+ if (use_dma) |
15497 |
+ return rockchip_spi_prepare_dma(rs, ctlr, xfer); |
15498 |
+diff --git a/drivers/spi/spi-stm32.c b/drivers/spi/spi-stm32.c |
15499 |
+index 53c4311cc6ab5..0318f02d62123 100644 |
15500 |
+--- a/drivers/spi/spi-stm32.c |
15501 |
++++ b/drivers/spi/spi-stm32.c |
15502 |
+@@ -1830,7 +1830,7 @@ static int stm32_spi_probe(struct platform_device *pdev) |
15503 |
+ struct resource *res; |
15504 |
+ int ret; |
15505 |
+ |
15506 |
+- master = spi_alloc_master(&pdev->dev, sizeof(struct stm32_spi)); |
15507 |
++ master = devm_spi_alloc_master(&pdev->dev, sizeof(struct stm32_spi)); |
15508 |
+ if (!master) { |
15509 |
+ dev_err(&pdev->dev, "spi master allocation failed\n"); |
15510 |
+ return -ENOMEM; |
15511 |
+@@ -1848,18 +1848,16 @@ static int stm32_spi_probe(struct platform_device *pdev) |
15512 |
+ |
15513 |
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
15514 |
+ spi->base = devm_ioremap_resource(&pdev->dev, res); |
15515 |
+- if (IS_ERR(spi->base)) { |
15516 |
+- ret = PTR_ERR(spi->base); |
15517 |
+- goto err_master_put; |
15518 |
+- } |
15519 |
++ if (IS_ERR(spi->base)) |
15520 |
++ return PTR_ERR(spi->base); |
15521 |
+ |
15522 |
+ spi->phys_addr = (dma_addr_t)res->start; |
15523 |
+ |
15524 |
+ spi->irq = platform_get_irq(pdev, 0); |
15525 |
+- if (spi->irq <= 0) { |
15526 |
+- ret = dev_err_probe(&pdev->dev, spi->irq, "failed to get irq\n"); |
15527 |
+- goto err_master_put; |
15528 |
+- } |
15529 |
++ if (spi->irq <= 0) |
15530 |
++ return dev_err_probe(&pdev->dev, spi->irq, |
15531 |
++ "failed to get irq\n"); |
15532 |
++ |
15533 |
+ ret = devm_request_threaded_irq(&pdev->dev, spi->irq, |
15534 |
+ spi->cfg->irq_handler_event, |
15535 |
+ spi->cfg->irq_handler_thread, |
15536 |
+@@ -1867,20 +1865,20 @@ static int stm32_spi_probe(struct platform_device *pdev) |
15537 |
+ if (ret) { |
15538 |
+ dev_err(&pdev->dev, "irq%d request failed: %d\n", spi->irq, |
15539 |
+ ret); |
15540 |
+- goto err_master_put; |
15541 |
++ return ret; |
15542 |
+ } |
15543 |
+ |
15544 |
+ spi->clk = devm_clk_get(&pdev->dev, NULL); |
15545 |
+ if (IS_ERR(spi->clk)) { |
15546 |
+ ret = PTR_ERR(spi->clk); |
15547 |
+ dev_err(&pdev->dev, "clk get failed: %d\n", ret); |
15548 |
+- goto err_master_put; |
15549 |
++ return ret; |
15550 |
+ } |
15551 |
+ |
15552 |
+ ret = clk_prepare_enable(spi->clk); |
15553 |
+ if (ret) { |
15554 |
+ dev_err(&pdev->dev, "clk enable failed: %d\n", ret); |
15555 |
+- goto err_master_put; |
15556 |
++ return ret; |
15557 |
+ } |
15558 |
+ spi->clk_rate = clk_get_rate(spi->clk); |
15559 |
+ if (!spi->clk_rate) { |
15560 |
+@@ -1950,7 +1948,7 @@ static int stm32_spi_probe(struct platform_device *pdev) |
15561 |
+ pm_runtime_set_active(&pdev->dev); |
15562 |
+ pm_runtime_enable(&pdev->dev); |
15563 |
+ |
15564 |
+- ret = devm_spi_register_master(&pdev->dev, master); |
15565 |
++ ret = spi_register_master(master); |
15566 |
+ if (ret) { |
15567 |
+ dev_err(&pdev->dev, "spi master registration failed: %d\n", |
15568 |
+ ret); |
15569 |
+@@ -1976,8 +1974,6 @@ err_dma_release: |
15570 |
+ dma_release_channel(spi->dma_rx); |
15571 |
+ err_clk_disable: |
15572 |
+ clk_disable_unprepare(spi->clk); |
15573 |
+-err_master_put: |
15574 |
+- spi_master_put(master); |
15575 |
+ |
15576 |
+ return ret; |
15577 |
+ } |
15578 |
+@@ -1987,6 +1983,7 @@ static int stm32_spi_remove(struct platform_device *pdev) |
15579 |
+ struct spi_master *master = platform_get_drvdata(pdev); |
15580 |
+ struct stm32_spi *spi = spi_master_get_devdata(master); |
15581 |
+ |
15582 |
++ spi_unregister_master(master); |
15583 |
+ spi->cfg->disable(spi); |
15584 |
+ |
15585 |
+ if (master->dma_tx) |
15586 |
+diff --git a/drivers/spi/spi-zynqmp-gqspi.c b/drivers/spi/spi-zynqmp-gqspi.c |
15587 |
+index c8fa6ee18ae77..1dd2af9cc2374 100644 |
15588 |
+--- a/drivers/spi/spi-zynqmp-gqspi.c |
15589 |
++++ b/drivers/spi/spi-zynqmp-gqspi.c |
15590 |
+@@ -157,6 +157,7 @@ enum mode_type {GQSPI_MODE_IO, GQSPI_MODE_DMA}; |
15591 |
+ * @data_completion: completion structure |
15592 |
+ */ |
15593 |
+ struct zynqmp_qspi { |
15594 |
++ struct spi_controller *ctlr; |
15595 |
+ void __iomem *regs; |
15596 |
+ struct clk *refclk; |
15597 |
+ struct clk *pclk; |
15598 |
+@@ -173,6 +174,7 @@ struct zynqmp_qspi { |
15599 |
+ u32 genfifoentry; |
15600 |
+ enum mode_type mode; |
15601 |
+ struct completion data_completion; |
15602 |
++ struct mutex op_lock; |
15603 |
+ }; |
15604 |
+ |
15605 |
+ /** |
15606 |
+@@ -486,24 +488,10 @@ static int zynqmp_qspi_setup_op(struct spi_device *qspi) |
15607 |
+ { |
15608 |
+ struct spi_controller *ctlr = qspi->master; |
15609 |
+ struct zynqmp_qspi *xqspi = spi_controller_get_devdata(ctlr); |
15610 |
+- struct device *dev = &ctlr->dev; |
15611 |
+- int ret; |
15612 |
+ |
15613 |
+ if (ctlr->busy) |
15614 |
+ return -EBUSY; |
15615 |
+ |
15616 |
+- ret = clk_enable(xqspi->refclk); |
15617 |
+- if (ret) { |
15618 |
+- dev_err(dev, "Cannot enable device clock.\n"); |
15619 |
+- return ret; |
15620 |
+- } |
15621 |
+- |
15622 |
+- ret = clk_enable(xqspi->pclk); |
15623 |
+- if (ret) { |
15624 |
+- dev_err(dev, "Cannot enable APB clock.\n"); |
15625 |
+- clk_disable(xqspi->refclk); |
15626 |
+- return ret; |
15627 |
+- } |
15628 |
+ zynqmp_gqspi_write(xqspi, GQSPI_EN_OFST, GQSPI_EN_MASK); |
15629 |
+ |
15630 |
+ return 0; |
15631 |
+@@ -520,7 +508,7 @@ static void zynqmp_qspi_filltxfifo(struct zynqmp_qspi *xqspi, int size) |
15632 |
+ { |
15633 |
+ u32 count = 0, intermediate; |
15634 |
+ |
15635 |
+- while ((xqspi->bytes_to_transfer > 0) && (count < size)) { |
15636 |
++ while ((xqspi->bytes_to_transfer > 0) && (count < size) && (xqspi->txbuf)) { |
15637 |
+ memcpy(&intermediate, xqspi->txbuf, 4); |
15638 |
+ zynqmp_gqspi_write(xqspi, GQSPI_TXD_OFST, intermediate); |
15639 |
+ |
15640 |
+@@ -579,7 +567,7 @@ static void zynqmp_qspi_fillgenfifo(struct zynqmp_qspi *xqspi, u8 nbits, |
15641 |
+ genfifoentry |= GQSPI_GENFIFO_DATA_XFER; |
15642 |
+ genfifoentry |= GQSPI_GENFIFO_TX; |
15643 |
+ transfer_len = xqspi->bytes_to_transfer; |
15644 |
+- } else { |
15645 |
++ } else if (xqspi->rxbuf) { |
15646 |
+ genfifoentry &= ~GQSPI_GENFIFO_TX; |
15647 |
+ genfifoentry |= GQSPI_GENFIFO_DATA_XFER; |
15648 |
+ genfifoentry |= GQSPI_GENFIFO_RX; |
15649 |
+@@ -587,6 +575,11 @@ static void zynqmp_qspi_fillgenfifo(struct zynqmp_qspi *xqspi, u8 nbits, |
15650 |
+ transfer_len = xqspi->dma_rx_bytes; |
15651 |
+ else |
15652 |
+ transfer_len = xqspi->bytes_to_receive; |
15653 |
++ } else { |
15654 |
++ /* Sending dummy circles here */ |
15655 |
++ genfifoentry &= ~(GQSPI_GENFIFO_TX | GQSPI_GENFIFO_RX); |
15656 |
++ genfifoentry |= GQSPI_GENFIFO_DATA_XFER; |
15657 |
++ transfer_len = xqspi->bytes_to_transfer; |
15658 |
+ } |
15659 |
+ genfifoentry |= zynqmp_qspi_selectspimode(xqspi, nbits); |
15660 |
+ xqspi->genfifoentry = genfifoentry; |
15661 |
+@@ -738,7 +731,7 @@ static irqreturn_t zynqmp_qspi_irq(int irq, void *dev_id) |
15662 |
+ * zynqmp_qspi_setuprxdma - This function sets up the RX DMA operation |
15663 |
+ * @xqspi: xqspi is a pointer to the GQSPI instance. |
15664 |
+ */ |
15665 |
+-static void zynqmp_qspi_setuprxdma(struct zynqmp_qspi *xqspi) |
15666 |
++static int zynqmp_qspi_setuprxdma(struct zynqmp_qspi *xqspi) |
15667 |
+ { |
15668 |
+ u32 rx_bytes, rx_rem, config_reg; |
15669 |
+ dma_addr_t addr; |
15670 |
+@@ -752,7 +745,7 @@ static void zynqmp_qspi_setuprxdma(struct zynqmp_qspi *xqspi) |
15671 |
+ zynqmp_gqspi_write(xqspi, GQSPI_CONFIG_OFST, config_reg); |
15672 |
+ xqspi->mode = GQSPI_MODE_IO; |
15673 |
+ xqspi->dma_rx_bytes = 0; |
15674 |
+- return; |
15675 |
++ return 0; |
15676 |
+ } |
15677 |
+ |
15678 |
+ rx_rem = xqspi->bytes_to_receive % 4; |
15679 |
+@@ -760,8 +753,10 @@ static void zynqmp_qspi_setuprxdma(struct zynqmp_qspi *xqspi) |
15680 |
+ |
15681 |
+ addr = dma_map_single(xqspi->dev, (void *)xqspi->rxbuf, |
15682 |
+ rx_bytes, DMA_FROM_DEVICE); |
15683 |
+- if (dma_mapping_error(xqspi->dev, addr)) |
15684 |
++ if (dma_mapping_error(xqspi->dev, addr)) { |
15685 |
+ dev_err(xqspi->dev, "ERR:rxdma:memory not mapped\n"); |
15686 |
++ return -ENOMEM; |
15687 |
++ } |
15688 |
+ |
15689 |
+ xqspi->dma_rx_bytes = rx_bytes; |
15690 |
+ xqspi->dma_addr = addr; |
15691 |
+@@ -782,6 +777,8 @@ static void zynqmp_qspi_setuprxdma(struct zynqmp_qspi *xqspi) |
15692 |
+ |
15693 |
+ /* Write the number of bytes to transfer */ |
15694 |
+ zynqmp_gqspi_write(xqspi, GQSPI_QSPIDMA_DST_SIZE_OFST, rx_bytes); |
15695 |
++ |
15696 |
++ return 0; |
15697 |
+ } |
15698 |
+ |
15699 |
+ /** |
15700 |
+@@ -818,11 +815,17 @@ static void zynqmp_qspi_write_op(struct zynqmp_qspi *xqspi, u8 tx_nbits, |
15701 |
+ * @genfifoentry: genfifoentry is pointer to the variable in which |
15702 |
+ * GENFIFO mask is returned to calling function |
15703 |
+ */ |
15704 |
+-static void zynqmp_qspi_read_op(struct zynqmp_qspi *xqspi, u8 rx_nbits, |
15705 |
++static int zynqmp_qspi_read_op(struct zynqmp_qspi *xqspi, u8 rx_nbits, |
15706 |
+ u32 genfifoentry) |
15707 |
+ { |
15708 |
++ int ret; |
15709 |
++ |
15710 |
++ ret = zynqmp_qspi_setuprxdma(xqspi); |
15711 |
++ if (ret) |
15712 |
++ return ret; |
15713 |
+ zynqmp_qspi_fillgenfifo(xqspi, rx_nbits, genfifoentry); |
15714 |
+- zynqmp_qspi_setuprxdma(xqspi); |
15715 |
++ |
15716 |
++ return 0; |
15717 |
+ } |
15718 |
+ |
15719 |
+ /** |
15720 |
+@@ -835,10 +838,13 @@ static void zynqmp_qspi_read_op(struct zynqmp_qspi *xqspi, u8 rx_nbits, |
15721 |
+ */ |
15722 |
+ static int __maybe_unused zynqmp_qspi_suspend(struct device *dev) |
15723 |
+ { |
15724 |
+- struct spi_controller *ctlr = dev_get_drvdata(dev); |
15725 |
+- struct zynqmp_qspi *xqspi = spi_controller_get_devdata(ctlr); |
15726 |
++ struct zynqmp_qspi *xqspi = dev_get_drvdata(dev); |
15727 |
++ struct spi_controller *ctlr = xqspi->ctlr; |
15728 |
++ int ret; |
15729 |
+ |
15730 |
+- spi_controller_suspend(ctlr); |
15731 |
++ ret = spi_controller_suspend(ctlr); |
15732 |
++ if (ret) |
15733 |
++ return ret; |
15734 |
+ |
15735 |
+ zynqmp_gqspi_write(xqspi, GQSPI_EN_OFST, 0x0); |
15736 |
+ |
15737 |
+@@ -856,27 +862,13 @@ static int __maybe_unused zynqmp_qspi_suspend(struct device *dev) |
15738 |
+ */ |
15739 |
+ static int __maybe_unused zynqmp_qspi_resume(struct device *dev) |
15740 |
+ { |
15741 |
+- struct spi_controller *ctlr = dev_get_drvdata(dev); |
15742 |
+- struct zynqmp_qspi *xqspi = spi_controller_get_devdata(ctlr); |
15743 |
+- int ret = 0; |
15744 |
++ struct zynqmp_qspi *xqspi = dev_get_drvdata(dev); |
15745 |
++ struct spi_controller *ctlr = xqspi->ctlr; |
15746 |
+ |
15747 |
+- ret = clk_enable(xqspi->pclk); |
15748 |
+- if (ret) { |
15749 |
+- dev_err(dev, "Cannot enable APB clock.\n"); |
15750 |
+- return ret; |
15751 |
+- } |
15752 |
+- |
15753 |
+- ret = clk_enable(xqspi->refclk); |
15754 |
+- if (ret) { |
15755 |
+- dev_err(dev, "Cannot enable device clock.\n"); |
15756 |
+- clk_disable(xqspi->pclk); |
15757 |
+- return ret; |
15758 |
+- } |
15759 |
++ zynqmp_gqspi_write(xqspi, GQSPI_EN_OFST, GQSPI_EN_MASK); |
15760 |
+ |
15761 |
+ spi_controller_resume(ctlr); |
15762 |
+ |
15763 |
+- clk_disable(xqspi->refclk); |
15764 |
+- clk_disable(xqspi->pclk); |
15765 |
+ return 0; |
15766 |
+ } |
15767 |
+ |
15768 |
+@@ -890,10 +882,10 @@ static int __maybe_unused zynqmp_qspi_resume(struct device *dev) |
15769 |
+ */ |
15770 |
+ static int __maybe_unused zynqmp_runtime_suspend(struct device *dev) |
15771 |
+ { |
15772 |
+- struct zynqmp_qspi *xqspi = (struct zynqmp_qspi *)dev_get_drvdata(dev); |
15773 |
++ struct zynqmp_qspi *xqspi = dev_get_drvdata(dev); |
15774 |
+ |
15775 |
+- clk_disable(xqspi->refclk); |
15776 |
+- clk_disable(xqspi->pclk); |
15777 |
++ clk_disable_unprepare(xqspi->refclk); |
15778 |
++ clk_disable_unprepare(xqspi->pclk); |
15779 |
+ |
15780 |
+ return 0; |
15781 |
+ } |
15782 |
+@@ -908,19 +900,19 @@ static int __maybe_unused zynqmp_runtime_suspend(struct device *dev) |
15783 |
+ */ |
15784 |
+ static int __maybe_unused zynqmp_runtime_resume(struct device *dev) |
15785 |
+ { |
15786 |
+- struct zynqmp_qspi *xqspi = (struct zynqmp_qspi *)dev_get_drvdata(dev); |
15787 |
++ struct zynqmp_qspi *xqspi = dev_get_drvdata(dev); |
15788 |
+ int ret; |
15789 |
+ |
15790 |
+- ret = clk_enable(xqspi->pclk); |
15791 |
++ ret = clk_prepare_enable(xqspi->pclk); |
15792 |
+ if (ret) { |
15793 |
+ dev_err(dev, "Cannot enable APB clock.\n"); |
15794 |
+ return ret; |
15795 |
+ } |
15796 |
+ |
15797 |
+- ret = clk_enable(xqspi->refclk); |
15798 |
++ ret = clk_prepare_enable(xqspi->refclk); |
15799 |
+ if (ret) { |
15800 |
+ dev_err(dev, "Cannot enable device clock.\n"); |
15801 |
+- clk_disable(xqspi->pclk); |
15802 |
++ clk_disable_unprepare(xqspi->pclk); |
15803 |
+ return ret; |
15804 |
+ } |
15805 |
+ |
15806 |
+@@ -944,25 +936,23 @@ static int zynqmp_qspi_exec_op(struct spi_mem *mem, |
15807 |
+ struct zynqmp_qspi *xqspi = spi_controller_get_devdata |
15808 |
+ (mem->spi->master); |
15809 |
+ int err = 0, i; |
15810 |
+- u8 *tmpbuf; |
15811 |
+ u32 genfifoentry = 0; |
15812 |
++ u16 opcode = op->cmd.opcode; |
15813 |
++ u64 opaddr; |
15814 |
+ |
15815 |
+ dev_dbg(xqspi->dev, "cmd:%#x mode:%d.%d.%d.%d\n", |
15816 |
+ op->cmd.opcode, op->cmd.buswidth, op->addr.buswidth, |
15817 |
+ op->dummy.buswidth, op->data.buswidth); |
15818 |
+ |
15819 |
++ mutex_lock(&xqspi->op_lock); |
15820 |
+ zynqmp_qspi_config_op(xqspi, mem->spi); |
15821 |
+ zynqmp_qspi_chipselect(mem->spi, false); |
15822 |
+ genfifoentry |= xqspi->genfifocs; |
15823 |
+ genfifoentry |= xqspi->genfifobus; |
15824 |
+ |
15825 |
+ if (op->cmd.opcode) { |
15826 |
+- tmpbuf = kzalloc(op->cmd.nbytes, GFP_KERNEL | GFP_DMA); |
15827 |
+- if (!tmpbuf) |
15828 |
+- return -ENOMEM; |
15829 |
+- tmpbuf[0] = op->cmd.opcode; |
15830 |
+ reinit_completion(&xqspi->data_completion); |
15831 |
+- xqspi->txbuf = tmpbuf; |
15832 |
++ xqspi->txbuf = &opcode; |
15833 |
+ xqspi->rxbuf = NULL; |
15834 |
+ xqspi->bytes_to_transfer = op->cmd.nbytes; |
15835 |
+ xqspi->bytes_to_receive = 0; |
15836 |
+@@ -973,16 +963,15 @@ static int zynqmp_qspi_exec_op(struct spi_mem *mem, |
15837 |
+ zynqmp_gqspi_write(xqspi, GQSPI_IER_OFST, |
15838 |
+ GQSPI_IER_GENFIFOEMPTY_MASK | |
15839 |
+ GQSPI_IER_TXNOT_FULL_MASK); |
15840 |
+- if (!wait_for_completion_interruptible_timeout |
15841 |
++ if (!wait_for_completion_timeout |
15842 |
+ (&xqspi->data_completion, msecs_to_jiffies(1000))) { |
15843 |
+ err = -ETIMEDOUT; |
15844 |
+- kfree(tmpbuf); |
15845 |
+ goto return_err; |
15846 |
+ } |
15847 |
+- kfree(tmpbuf); |
15848 |
+ } |
15849 |
+ |
15850 |
+ if (op->addr.nbytes) { |
15851 |
++ xqspi->txbuf = &opaddr; |
15852 |
+ for (i = 0; i < op->addr.nbytes; i++) { |
15853 |
+ *(((u8 *)xqspi->txbuf) + i) = op->addr.val >> |
15854 |
+ (8 * (op->addr.nbytes - i - 1)); |
15855 |
+@@ -1001,7 +990,7 @@ static int zynqmp_qspi_exec_op(struct spi_mem *mem, |
15856 |
+ GQSPI_IER_TXEMPTY_MASK | |
15857 |
+ GQSPI_IER_GENFIFOEMPTY_MASK | |
15858 |
+ GQSPI_IER_TXNOT_FULL_MASK); |
15859 |
+- if (!wait_for_completion_interruptible_timeout |
15860 |
++ if (!wait_for_completion_timeout |
15861 |
+ (&xqspi->data_completion, msecs_to_jiffies(1000))) { |
15862 |
+ err = -ETIMEDOUT; |
15863 |
+ goto return_err; |
15864 |
+@@ -1009,32 +998,23 @@ static int zynqmp_qspi_exec_op(struct spi_mem *mem, |
15865 |
+ } |
15866 |
+ |
15867 |
+ if (op->dummy.nbytes) { |
15868 |
+- tmpbuf = kzalloc(op->dummy.nbytes, GFP_KERNEL | GFP_DMA); |
15869 |
+- if (!tmpbuf) |
15870 |
+- return -ENOMEM; |
15871 |
+- memset(tmpbuf, 0xff, op->dummy.nbytes); |
15872 |
+- reinit_completion(&xqspi->data_completion); |
15873 |
+- xqspi->txbuf = tmpbuf; |
15874 |
++ xqspi->txbuf = NULL; |
15875 |
+ xqspi->rxbuf = NULL; |
15876 |
+- xqspi->bytes_to_transfer = op->dummy.nbytes; |
15877 |
++ /* |
15878 |
++ * xqspi->bytes_to_transfer here represents the dummy circles |
15879 |
++ * which need to be sent. |
15880 |
++ */ |
15881 |
++ xqspi->bytes_to_transfer = op->dummy.nbytes * 8 / op->dummy.buswidth; |
15882 |
+ xqspi->bytes_to_receive = 0; |
15883 |
+- zynqmp_qspi_write_op(xqspi, op->dummy.buswidth, |
15884 |
++ /* |
15885 |
++ * Using op->data.buswidth instead of op->dummy.buswidth here because |
15886 |
++ * we need to use it to configure the correct SPI mode. |
15887 |
++ */ |
15888 |
++ zynqmp_qspi_write_op(xqspi, op->data.buswidth, |
15889 |
+ genfifoentry); |
15890 |
+ zynqmp_gqspi_write(xqspi, GQSPI_CONFIG_OFST, |
15891 |
+ zynqmp_gqspi_read(xqspi, GQSPI_CONFIG_OFST) | |
15892 |
+ GQSPI_CFG_START_GEN_FIFO_MASK); |
15893 |
+- zynqmp_gqspi_write(xqspi, GQSPI_IER_OFST, |
15894 |
+- GQSPI_IER_TXEMPTY_MASK | |
15895 |
+- GQSPI_IER_GENFIFOEMPTY_MASK | |
15896 |
+- GQSPI_IER_TXNOT_FULL_MASK); |
15897 |
+- if (!wait_for_completion_interruptible_timeout |
15898 |
+- (&xqspi->data_completion, msecs_to_jiffies(1000))) { |
15899 |
+- err = -ETIMEDOUT; |
15900 |
+- kfree(tmpbuf); |
15901 |
+- goto return_err; |
15902 |
+- } |
15903 |
+- |
15904 |
+- kfree(tmpbuf); |
15905 |
+ } |
15906 |
+ |
15907 |
+ if (op->data.nbytes) { |
15908 |
+@@ -1059,8 +1039,11 @@ static int zynqmp_qspi_exec_op(struct spi_mem *mem, |
15909 |
+ xqspi->rxbuf = (u8 *)op->data.buf.in; |
15910 |
+ xqspi->bytes_to_receive = op->data.nbytes; |
15911 |
+ xqspi->bytes_to_transfer = 0; |
15912 |
+- zynqmp_qspi_read_op(xqspi, op->data.buswidth, |
15913 |
++ err = zynqmp_qspi_read_op(xqspi, op->data.buswidth, |
15914 |
+ genfifoentry); |
15915 |
++ if (err) |
15916 |
++ goto return_err; |
15917 |
++ |
15918 |
+ zynqmp_gqspi_write(xqspi, GQSPI_CONFIG_OFST, |
15919 |
+ zynqmp_gqspi_read |
15920 |
+ (xqspi, GQSPI_CONFIG_OFST) | |
15921 |
+@@ -1076,7 +1059,7 @@ static int zynqmp_qspi_exec_op(struct spi_mem *mem, |
15922 |
+ GQSPI_IER_RXEMPTY_MASK); |
15923 |
+ } |
15924 |
+ } |
15925 |
+- if (!wait_for_completion_interruptible_timeout |
15926 |
++ if (!wait_for_completion_timeout |
15927 |
+ (&xqspi->data_completion, msecs_to_jiffies(1000))) |
15928 |
+ err = -ETIMEDOUT; |
15929 |
+ } |
15930 |
+@@ -1084,6 +1067,7 @@ static int zynqmp_qspi_exec_op(struct spi_mem *mem, |
15931 |
+ return_err: |
15932 |
+ |
15933 |
+ zynqmp_qspi_chipselect(mem->spi, true); |
15934 |
++ mutex_unlock(&xqspi->op_lock); |
15935 |
+ |
15936 |
+ return err; |
15937 |
+ } |
15938 |
+@@ -1120,6 +1104,7 @@ static int zynqmp_qspi_probe(struct platform_device *pdev) |
15939 |
+ |
15940 |
+ xqspi = spi_controller_get_devdata(ctlr); |
15941 |
+ xqspi->dev = dev; |
15942 |
++ xqspi->ctlr = ctlr; |
15943 |
+ platform_set_drvdata(pdev, xqspi); |
15944 |
+ |
15945 |
+ xqspi->regs = devm_platform_ioremap_resource(pdev, 0); |
15946 |
+@@ -1135,13 +1120,11 @@ static int zynqmp_qspi_probe(struct platform_device *pdev) |
15947 |
+ goto remove_master; |
15948 |
+ } |
15949 |
+ |
15950 |
+- init_completion(&xqspi->data_completion); |
15951 |
+- |
15952 |
+ xqspi->refclk = devm_clk_get(&pdev->dev, "ref_clk"); |
15953 |
+ if (IS_ERR(xqspi->refclk)) { |
15954 |
+ dev_err(dev, "ref_clk clock not found.\n"); |
15955 |
+ ret = PTR_ERR(xqspi->refclk); |
15956 |
+- goto clk_dis_pclk; |
15957 |
++ goto remove_master; |
15958 |
+ } |
15959 |
+ |
15960 |
+ ret = clk_prepare_enable(xqspi->pclk); |
15961 |
+@@ -1156,6 +1139,10 @@ static int zynqmp_qspi_probe(struct platform_device *pdev) |
15962 |
+ goto clk_dis_pclk; |
15963 |
+ } |
15964 |
+ |
15965 |
++ init_completion(&xqspi->data_completion); |
15966 |
++ |
15967 |
++ mutex_init(&xqspi->op_lock); |
15968 |
++ |
15969 |
+ pm_runtime_use_autosuspend(&pdev->dev); |
15970 |
+ pm_runtime_set_autosuspend_delay(&pdev->dev, SPI_AUTOSUSPEND_TIMEOUT); |
15971 |
+ pm_runtime_set_active(&pdev->dev); |
15972 |
+@@ -1178,6 +1165,7 @@ static int zynqmp_qspi_probe(struct platform_device *pdev) |
15973 |
+ goto clk_dis_all; |
15974 |
+ } |
15975 |
+ |
15976 |
++ dma_set_mask(&pdev->dev, DMA_BIT_MASK(44)); |
15977 |
+ ctlr->bits_per_word_mask = SPI_BPW_MASK(8); |
15978 |
+ ctlr->num_chipselect = GQSPI_DEFAULT_NUM_CS; |
15979 |
+ ctlr->mem_ops = &zynqmp_qspi_mem_ops; |
15980 |
+diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c |
15981 |
+index 6f81a3c4c7e04..8131302cd204a 100644 |
15982 |
+--- a/drivers/spi/spi.c |
15983 |
++++ b/drivers/spi/spi.c |
15984 |
+@@ -2488,6 +2488,7 @@ struct spi_controller *__devm_spi_alloc_controller(struct device *dev, |
15985 |
+ |
15986 |
+ ctlr = __spi_alloc_controller(dev, size, slave); |
15987 |
+ if (ctlr) { |
15988 |
++ ctlr->devm_allocated = true; |
15989 |
+ *ptr = ctlr; |
15990 |
+ devres_add(dev, ptr); |
15991 |
+ } else { |
15992 |
+@@ -2834,11 +2835,6 @@ int devm_spi_register_controller(struct device *dev, |
15993 |
+ } |
15994 |
+ EXPORT_SYMBOL_GPL(devm_spi_register_controller); |
15995 |
+ |
15996 |
+-static int devm_spi_match_controller(struct device *dev, void *res, void *ctlr) |
15997 |
+-{ |
15998 |
+- return *(struct spi_controller **)res == ctlr; |
15999 |
+-} |
16000 |
+- |
16001 |
+ static int __unregister(struct device *dev, void *null) |
16002 |
+ { |
16003 |
+ spi_unregister_device(to_spi_device(dev)); |
16004 |
+@@ -2885,8 +2881,7 @@ void spi_unregister_controller(struct spi_controller *ctlr) |
16005 |
+ /* Release the last reference on the controller if its driver |
16006 |
+ * has not yet been converted to devm_spi_alloc_master/slave(). |
16007 |
+ */ |
16008 |
+- if (!devres_find(ctlr->dev.parent, devm_spi_release_controller, |
16009 |
+- devm_spi_match_controller, ctlr)) |
16010 |
++ if (!ctlr->devm_allocated) |
16011 |
+ put_device(&ctlr->dev); |
16012 |
+ |
16013 |
+ /* free bus id */ |
16014 |
+diff --git a/drivers/staging/comedi/drivers/tests/ni_routes_test.c b/drivers/staging/comedi/drivers/tests/ni_routes_test.c |
16015 |
+index 4061b3b5f8e9b..68defeb53de4a 100644 |
16016 |
+--- a/drivers/staging/comedi/drivers/tests/ni_routes_test.c |
16017 |
++++ b/drivers/staging/comedi/drivers/tests/ni_routes_test.c |
16018 |
+@@ -217,7 +217,8 @@ void test_ni_assign_device_routes(void) |
16019 |
+ const u8 *table, *oldtable; |
16020 |
+ |
16021 |
+ init_pci_6070e(); |
16022 |
+- ni_assign_device_routes(ni_eseries, pci_6070e, &private.routing_tables); |
16023 |
++ ni_assign_device_routes(ni_eseries, pci_6070e, NULL, |
16024 |
++ &private.routing_tables); |
16025 |
+ devroutes = private.routing_tables.valid_routes; |
16026 |
+ table = private.routing_tables.route_values; |
16027 |
+ |
16028 |
+@@ -253,7 +254,8 @@ void test_ni_assign_device_routes(void) |
16029 |
+ olddevroutes = devroutes; |
16030 |
+ oldtable = table; |
16031 |
+ init_pci_6220(); |
16032 |
+- ni_assign_device_routes(ni_mseries, pci_6220, &private.routing_tables); |
16033 |
++ ni_assign_device_routes(ni_mseries, pci_6220, NULL, |
16034 |
++ &private.routing_tables); |
16035 |
+ devroutes = private.routing_tables.valid_routes; |
16036 |
+ table = private.routing_tables.route_values; |
16037 |
+ |
16038 |
+diff --git a/drivers/staging/fwserial/fwserial.c b/drivers/staging/fwserial/fwserial.c |
16039 |
+index c368082aae1aa..0f4655d7d520a 100644 |
16040 |
+--- a/drivers/staging/fwserial/fwserial.c |
16041 |
++++ b/drivers/staging/fwserial/fwserial.c |
16042 |
+@@ -1218,13 +1218,12 @@ static int get_serial_info(struct tty_struct *tty, |
16043 |
+ struct fwtty_port *port = tty->driver_data; |
16044 |
+ |
16045 |
+ mutex_lock(&port->port.mutex); |
16046 |
+- ss->type = PORT_UNKNOWN; |
16047 |
+- ss->line = port->port.tty->index; |
16048 |
+- ss->flags = port->port.flags; |
16049 |
+- ss->xmit_fifo_size = FWTTY_PORT_TXFIFO_LEN; |
16050 |
++ ss->line = port->index; |
16051 |
+ ss->baud_base = 400000000; |
16052 |
+- ss->close_delay = port->port.close_delay; |
16053 |
++ ss->close_delay = jiffies_to_msecs(port->port.close_delay) / 10; |
16054 |
++ ss->closing_wait = 3000; |
16055 |
+ mutex_unlock(&port->port.mutex); |
16056 |
++ |
16057 |
+ return 0; |
16058 |
+ } |
16059 |
+ |
16060 |
+@@ -1232,20 +1231,20 @@ static int set_serial_info(struct tty_struct *tty, |
16061 |
+ struct serial_struct *ss) |
16062 |
+ { |
16063 |
+ struct fwtty_port *port = tty->driver_data; |
16064 |
++ unsigned int cdelay; |
16065 |
+ |
16066 |
+- if (ss->irq != 0 || ss->port != 0 || ss->custom_divisor != 0 || |
16067 |
+- ss->baud_base != 400000000) |
16068 |
+- return -EPERM; |
16069 |
++ cdelay = msecs_to_jiffies(ss->close_delay * 10); |
16070 |
+ |
16071 |
+ mutex_lock(&port->port.mutex); |
16072 |
+ if (!capable(CAP_SYS_ADMIN)) { |
16073 |
+- if (((ss->flags & ~ASYNC_USR_MASK) != |
16074 |
++ if (cdelay != port->port.close_delay || |
16075 |
++ ((ss->flags & ~ASYNC_USR_MASK) != |
16076 |
+ (port->port.flags & ~ASYNC_USR_MASK))) { |
16077 |
+ mutex_unlock(&port->port.mutex); |
16078 |
+ return -EPERM; |
16079 |
+ } |
16080 |
+ } |
16081 |
+- port->port.close_delay = ss->close_delay * HZ / 100; |
16082 |
++ port->port.close_delay = cdelay; |
16083 |
+ mutex_unlock(&port->port.mutex); |
16084 |
+ |
16085 |
+ return 0; |
16086 |
+diff --git a/drivers/staging/greybus/uart.c b/drivers/staging/greybus/uart.c |
16087 |
+index 607378bfebb7e..a520f7f213db0 100644 |
16088 |
+--- a/drivers/staging/greybus/uart.c |
16089 |
++++ b/drivers/staging/greybus/uart.c |
16090 |
+@@ -614,10 +614,12 @@ static int get_serial_info(struct tty_struct *tty, |
16091 |
+ ss->line = gb_tty->minor; |
16092 |
+ ss->xmit_fifo_size = 16; |
16093 |
+ ss->baud_base = 9600; |
16094 |
+- ss->close_delay = gb_tty->port.close_delay / 10; |
16095 |
++ ss->close_delay = jiffies_to_msecs(gb_tty->port.close_delay) / 10; |
16096 |
+ ss->closing_wait = |
16097 |
+ gb_tty->port.closing_wait == ASYNC_CLOSING_WAIT_NONE ? |
16098 |
+- ASYNC_CLOSING_WAIT_NONE : gb_tty->port.closing_wait / 10; |
16099 |
++ ASYNC_CLOSING_WAIT_NONE : |
16100 |
++ jiffies_to_msecs(gb_tty->port.closing_wait) / 10; |
16101 |
++ |
16102 |
+ return 0; |
16103 |
+ } |
16104 |
+ |
16105 |
+@@ -629,17 +631,16 @@ static int set_serial_info(struct tty_struct *tty, |
16106 |
+ unsigned int close_delay; |
16107 |
+ int retval = 0; |
16108 |
+ |
16109 |
+- close_delay = ss->close_delay * 10; |
16110 |
++ close_delay = msecs_to_jiffies(ss->close_delay * 10); |
16111 |
+ closing_wait = ss->closing_wait == ASYNC_CLOSING_WAIT_NONE ? |
16112 |
+- ASYNC_CLOSING_WAIT_NONE : ss->closing_wait * 10; |
16113 |
++ ASYNC_CLOSING_WAIT_NONE : |
16114 |
++ msecs_to_jiffies(ss->closing_wait * 10); |
16115 |
+ |
16116 |
+ mutex_lock(&gb_tty->port.mutex); |
16117 |
+ if (!capable(CAP_SYS_ADMIN)) { |
16118 |
+ if ((close_delay != gb_tty->port.close_delay) || |
16119 |
+ (closing_wait != gb_tty->port.closing_wait)) |
16120 |
+ retval = -EPERM; |
16121 |
+- else |
16122 |
+- retval = -EOPNOTSUPP; |
16123 |
+ } else { |
16124 |
+ gb_tty->port.close_delay = close_delay; |
16125 |
+ gb_tty->port.closing_wait = closing_wait; |
16126 |
+diff --git a/drivers/staging/media/atomisp/i2c/atomisp-lm3554.c b/drivers/staging/media/atomisp/i2c/atomisp-lm3554.c |
16127 |
+index 7ca7378b18592..0ab67b2aec671 100644 |
16128 |
+--- a/drivers/staging/media/atomisp/i2c/atomisp-lm3554.c |
16129 |
++++ b/drivers/staging/media/atomisp/i2c/atomisp-lm3554.c |
16130 |
+@@ -843,8 +843,10 @@ static int lm3554_probe(struct i2c_client *client) |
16131 |
+ return -ENOMEM; |
16132 |
+ |
16133 |
+ flash->pdata = lm3554_platform_data_func(client); |
16134 |
+- if (IS_ERR(flash->pdata)) |
16135 |
+- return PTR_ERR(flash->pdata); |
16136 |
++ if (IS_ERR(flash->pdata)) { |
16137 |
++ err = PTR_ERR(flash->pdata); |
16138 |
++ goto fail1; |
16139 |
++ } |
16140 |
+ |
16141 |
+ v4l2_i2c_subdev_init(&flash->sd, client, &lm3554_ops); |
16142 |
+ flash->sd.internal_ops = &lm3554_internal_ops; |
16143 |
+@@ -856,7 +858,7 @@ static int lm3554_probe(struct i2c_client *client) |
16144 |
+ ARRAY_SIZE(lm3554_controls)); |
16145 |
+ if (ret) { |
16146 |
+ dev_err(&client->dev, "error initialize a ctrl_handler.\n"); |
16147 |
+- goto fail2; |
16148 |
++ goto fail3; |
16149 |
+ } |
16150 |
+ |
16151 |
+ for (i = 0; i < ARRAY_SIZE(lm3554_controls); i++) |
16152 |
+@@ -865,14 +867,14 @@ static int lm3554_probe(struct i2c_client *client) |
16153 |
+ |
16154 |
+ if (flash->ctrl_handler.error) { |
16155 |
+ dev_err(&client->dev, "ctrl_handler error.\n"); |
16156 |
+- goto fail2; |
16157 |
++ goto fail3; |
16158 |
+ } |
16159 |
+ |
16160 |
+ flash->sd.ctrl_handler = &flash->ctrl_handler; |
16161 |
+ err = media_entity_pads_init(&flash->sd.entity, 0, NULL); |
16162 |
+ if (err) { |
16163 |
+ dev_err(&client->dev, "error initialize a media entity.\n"); |
16164 |
+- goto fail1; |
16165 |
++ goto fail2; |
16166 |
+ } |
16167 |
+ |
16168 |
+ flash->sd.entity.function = MEDIA_ENT_F_FLASH; |
16169 |
+@@ -884,14 +886,15 @@ static int lm3554_probe(struct i2c_client *client) |
16170 |
+ err = lm3554_gpio_init(client); |
16171 |
+ if (err) { |
16172 |
+ dev_err(&client->dev, "gpio request/direction_output fail"); |
16173 |
+- goto fail2; |
16174 |
++ goto fail3; |
16175 |
+ } |
16176 |
+ return atomisp_register_i2c_module(&flash->sd, NULL, LED_FLASH); |
16177 |
+-fail2: |
16178 |
++fail3: |
16179 |
+ media_entity_cleanup(&flash->sd.entity); |
16180 |
+ v4l2_ctrl_handler_free(&flash->ctrl_handler); |
16181 |
+-fail1: |
16182 |
++fail2: |
16183 |
+ v4l2_device_unregister_subdev(&flash->sd); |
16184 |
++fail1: |
16185 |
+ kfree(flash); |
16186 |
+ |
16187 |
+ return err; |
16188 |
+diff --git a/drivers/staging/media/atomisp/pci/atomisp_ioctl.c b/drivers/staging/media/atomisp/pci/atomisp_ioctl.c |
16189 |
+index 2ae50decfc8bd..9da82855552de 100644 |
16190 |
+--- a/drivers/staging/media/atomisp/pci/atomisp_ioctl.c |
16191 |
++++ b/drivers/staging/media/atomisp/pci/atomisp_ioctl.c |
16192 |
+@@ -948,10 +948,8 @@ int atomisp_alloc_css_stat_bufs(struct atomisp_sub_device *asd, |
16193 |
+ dev_dbg(isp->dev, "allocating %d dis buffers\n", count); |
16194 |
+ while (count--) { |
16195 |
+ dis_buf = kzalloc(sizeof(struct atomisp_dis_buf), GFP_KERNEL); |
16196 |
+- if (!dis_buf) { |
16197 |
+- kfree(s3a_buf); |
16198 |
++ if (!dis_buf) |
16199 |
+ goto error; |
16200 |
+- } |
16201 |
+ if (atomisp_css_allocate_stat_buffers( |
16202 |
+ asd, stream_id, NULL, dis_buf, NULL)) { |
16203 |
+ kfree(dis_buf); |
16204 |
+diff --git a/drivers/staging/media/atomisp/pci/hmm/hmm_bo.c b/drivers/staging/media/atomisp/pci/hmm/hmm_bo.c |
16205 |
+index f13af2329f486..0168f9839c905 100644 |
16206 |
+--- a/drivers/staging/media/atomisp/pci/hmm/hmm_bo.c |
16207 |
++++ b/drivers/staging/media/atomisp/pci/hmm/hmm_bo.c |
16208 |
+@@ -857,16 +857,17 @@ static void free_private_pages(struct hmm_buffer_object *bo, |
16209 |
+ kfree(bo->page_obj); |
16210 |
+ } |
16211 |
+ |
16212 |
+-static void free_user_pages(struct hmm_buffer_object *bo) |
16213 |
++static void free_user_pages(struct hmm_buffer_object *bo, |
16214 |
++ unsigned int page_nr) |
16215 |
+ { |
16216 |
+ int i; |
16217 |
+ |
16218 |
+ hmm_mem_stat.usr_size -= bo->pgnr; |
16219 |
+ |
16220 |
+ if (bo->mem_type == HMM_BO_MEM_TYPE_PFN) { |
16221 |
+- unpin_user_pages(bo->pages, bo->pgnr); |
16222 |
++ unpin_user_pages(bo->pages, page_nr); |
16223 |
+ } else { |
16224 |
+- for (i = 0; i < bo->pgnr; i++) |
16225 |
++ for (i = 0; i < page_nr; i++) |
16226 |
+ put_page(bo->pages[i]); |
16227 |
+ } |
16228 |
+ kfree(bo->pages); |
16229 |
+@@ -942,6 +943,8 @@ static int alloc_user_pages(struct hmm_buffer_object *bo, |
16230 |
+ dev_err(atomisp_dev, |
16231 |
+ "get_user_pages err: bo->pgnr = %d, pgnr actually pinned = %d.\n", |
16232 |
+ bo->pgnr, page_nr); |
16233 |
++ if (page_nr < 0) |
16234 |
++ page_nr = 0; |
16235 |
+ goto out_of_mem; |
16236 |
+ } |
16237 |
+ |
16238 |
+@@ -954,7 +957,7 @@ static int alloc_user_pages(struct hmm_buffer_object *bo, |
16239 |
+ |
16240 |
+ out_of_mem: |
16241 |
+ |
16242 |
+- free_user_pages(bo); |
16243 |
++ free_user_pages(bo, page_nr); |
16244 |
+ |
16245 |
+ return -ENOMEM; |
16246 |
+ } |
16247 |
+@@ -1037,7 +1040,7 @@ void hmm_bo_free_pages(struct hmm_buffer_object *bo) |
16248 |
+ if (bo->type == HMM_BO_PRIVATE) |
16249 |
+ free_private_pages(bo, &dynamic_pool, &reserved_pool); |
16250 |
+ else if (bo->type == HMM_BO_USER) |
16251 |
+- free_user_pages(bo); |
16252 |
++ free_user_pages(bo, bo->pgnr); |
16253 |
+ else |
16254 |
+ dev_err(atomisp_dev, "invalid buffer type.\n"); |
16255 |
+ mutex_unlock(&bo->mutex); |
16256 |
+diff --git a/drivers/staging/media/omap4iss/iss.c b/drivers/staging/media/omap4iss/iss.c |
16257 |
+index e06ea7ea1e502..3dac35f682388 100644 |
16258 |
+--- a/drivers/staging/media/omap4iss/iss.c |
16259 |
++++ b/drivers/staging/media/omap4iss/iss.c |
16260 |
+@@ -1236,8 +1236,10 @@ static int iss_probe(struct platform_device *pdev) |
16261 |
+ if (ret < 0) |
16262 |
+ goto error; |
16263 |
+ |
16264 |
+- if (!omap4iss_get(iss)) |
16265 |
++ if (!omap4iss_get(iss)) { |
16266 |
++ ret = -EINVAL; |
16267 |
+ goto error; |
16268 |
++ } |
16269 |
+ |
16270 |
+ ret = iss_reset(iss); |
16271 |
+ if (ret < 0) |
16272 |
+diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c |
16273 |
+index aa4f8c2876186..b1507f29fcc56 100644 |
16274 |
+--- a/drivers/staging/media/rkvdec/rkvdec.c |
16275 |
++++ b/drivers/staging/media/rkvdec/rkvdec.c |
16276 |
+@@ -55,16 +55,13 @@ static const struct v4l2_ctrl_ops rkvdec_ctrl_ops = { |
16277 |
+ |
16278 |
+ static const struct rkvdec_ctrl_desc rkvdec_h264_ctrl_descs[] = { |
16279 |
+ { |
16280 |
+- .mandatory = true, |
16281 |
+ .cfg.id = V4L2_CID_STATELESS_H264_DECODE_PARAMS, |
16282 |
+ }, |
16283 |
+ { |
16284 |
+- .mandatory = true, |
16285 |
+ .cfg.id = V4L2_CID_STATELESS_H264_SPS, |
16286 |
+ .cfg.ops = &rkvdec_ctrl_ops, |
16287 |
+ }, |
16288 |
+ { |
16289 |
+- .mandatory = true, |
16290 |
+ .cfg.id = V4L2_CID_STATELESS_H264_PPS, |
16291 |
+ }, |
16292 |
+ { |
16293 |
+@@ -585,25 +582,7 @@ static const struct vb2_ops rkvdec_queue_ops = { |
16294 |
+ |
16295 |
+ static int rkvdec_request_validate(struct media_request *req) |
16296 |
+ { |
16297 |
+- struct media_request_object *obj; |
16298 |
+- const struct rkvdec_ctrls *ctrls; |
16299 |
+- struct v4l2_ctrl_handler *hdl; |
16300 |
+- struct rkvdec_ctx *ctx = NULL; |
16301 |
+- unsigned int count, i; |
16302 |
+- int ret; |
16303 |
+- |
16304 |
+- list_for_each_entry(obj, &req->objects, list) { |
16305 |
+- if (vb2_request_object_is_buffer(obj)) { |
16306 |
+- struct vb2_buffer *vb; |
16307 |
+- |
16308 |
+- vb = container_of(obj, struct vb2_buffer, req_obj); |
16309 |
+- ctx = vb2_get_drv_priv(vb->vb2_queue); |
16310 |
+- break; |
16311 |
+- } |
16312 |
+- } |
16313 |
+- |
16314 |
+- if (!ctx) |
16315 |
+- return -EINVAL; |
16316 |
++ unsigned int count; |
16317 |
+ |
16318 |
+ count = vb2_request_buffer_cnt(req); |
16319 |
+ if (!count) |
16320 |
+@@ -611,31 +590,6 @@ static int rkvdec_request_validate(struct media_request *req) |
16321 |
+ else if (count > 1) |
16322 |
+ return -EINVAL; |
16323 |
+ |
16324 |
+- hdl = v4l2_ctrl_request_hdl_find(req, &ctx->ctrl_hdl); |
16325 |
+- if (!hdl) |
16326 |
+- return -ENOENT; |
16327 |
+- |
16328 |
+- ret = 0; |
16329 |
+- ctrls = ctx->coded_fmt_desc->ctrls; |
16330 |
+- for (i = 0; ctrls && i < ctrls->num_ctrls; i++) { |
16331 |
+- u32 id = ctrls->ctrls[i].cfg.id; |
16332 |
+- struct v4l2_ctrl *ctrl; |
16333 |
+- |
16334 |
+- if (!ctrls->ctrls[i].mandatory) |
16335 |
+- continue; |
16336 |
+- |
16337 |
+- ctrl = v4l2_ctrl_request_hdl_ctrl_find(hdl, id); |
16338 |
+- if (!ctrl) { |
16339 |
+- ret = -ENOENT; |
16340 |
+- break; |
16341 |
+- } |
16342 |
+- } |
16343 |
+- |
16344 |
+- v4l2_ctrl_request_hdl_put(hdl); |
16345 |
+- |
16346 |
+- if (ret) |
16347 |
+- return ret; |
16348 |
+- |
16349 |
+ return vb2_request_validate(req); |
16350 |
+ } |
16351 |
+ |
16352 |
+diff --git a/drivers/staging/media/rkvdec/rkvdec.h b/drivers/staging/media/rkvdec/rkvdec.h |
16353 |
+index 77a137cca88ea..52ac3874c5e54 100644 |
16354 |
+--- a/drivers/staging/media/rkvdec/rkvdec.h |
16355 |
++++ b/drivers/staging/media/rkvdec/rkvdec.h |
16356 |
+@@ -25,7 +25,6 @@ |
16357 |
+ struct rkvdec_ctx; |
16358 |
+ |
16359 |
+ struct rkvdec_ctrl_desc { |
16360 |
+- u32 mandatory : 1; |
16361 |
+ struct v4l2_ctrl_config cfg; |
16362 |
+ }; |
16363 |
+ |
16364 |
+diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h |
16365 |
+index 7718c561823f6..92ace87c1c7d1 100644 |
16366 |
+--- a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h |
16367 |
++++ b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h |
16368 |
+@@ -443,16 +443,17 @@ |
16369 |
+ #define VE_DEC_H265_STATUS_STCD_BUSY BIT(21) |
16370 |
+ #define VE_DEC_H265_STATUS_WB_BUSY BIT(20) |
16371 |
+ #define VE_DEC_H265_STATUS_BS_DMA_BUSY BIT(19) |
16372 |
+-#define VE_DEC_H265_STATUS_IQIT_BUSY BIT(18) |
16373 |
++#define VE_DEC_H265_STATUS_IT_BUSY BIT(18) |
16374 |
+ #define VE_DEC_H265_STATUS_INTER_BUSY BIT(17) |
16375 |
+ #define VE_DEC_H265_STATUS_MORE_DATA BIT(16) |
16376 |
+-#define VE_DEC_H265_STATUS_VLD_BUSY BIT(14) |
16377 |
+-#define VE_DEC_H265_STATUS_DEBLOCKING_BUSY BIT(13) |
16378 |
+-#define VE_DEC_H265_STATUS_DEBLOCKING_DRAM_BUSY BIT(12) |
16379 |
+-#define VE_DEC_H265_STATUS_INTRA_BUSY BIT(11) |
16380 |
+-#define VE_DEC_H265_STATUS_SAO_BUSY BIT(10) |
16381 |
+-#define VE_DEC_H265_STATUS_MVP_BUSY BIT(9) |
16382 |
+-#define VE_DEC_H265_STATUS_SWDEC_BUSY BIT(8) |
16383 |
++#define VE_DEC_H265_STATUS_DBLK_BUSY BIT(15) |
16384 |
++#define VE_DEC_H265_STATUS_IREC_BUSY BIT(14) |
16385 |
++#define VE_DEC_H265_STATUS_INTRA_BUSY BIT(13) |
16386 |
++#define VE_DEC_H265_STATUS_MCRI_BUSY BIT(12) |
16387 |
++#define VE_DEC_H265_STATUS_IQIT_BUSY BIT(11) |
16388 |
++#define VE_DEC_H265_STATUS_MVP_BUSY BIT(10) |
16389 |
++#define VE_DEC_H265_STATUS_IS_BUSY BIT(9) |
16390 |
++#define VE_DEC_H265_STATUS_VLD_BUSY BIT(8) |
16391 |
+ #define VE_DEC_H265_STATUS_OVER_TIME BIT(3) |
16392 |
+ #define VE_DEC_H265_STATUS_VLD_DATA_REQ BIT(2) |
16393 |
+ #define VE_DEC_H265_STATUS_ERROR BIT(1) |
16394 |
+diff --git a/drivers/staging/rtl8192u/r8192U_core.c b/drivers/staging/rtl8192u/r8192U_core.c |
16395 |
+index 93676af986290..60935c739476c 100644 |
16396 |
+--- a/drivers/staging/rtl8192u/r8192U_core.c |
16397 |
++++ b/drivers/staging/rtl8192u/r8192U_core.c |
16398 |
+@@ -3208,7 +3208,7 @@ static void rtl819x_update_rxcounts(struct r8192_priv *priv, u32 *TotalRxBcnNum, |
16399 |
+ u32 *TotalRxDataNum) |
16400 |
+ { |
16401 |
+ u16 SlotIndex; |
16402 |
+- u8 i; |
16403 |
++ u16 i; |
16404 |
+ |
16405 |
+ *TotalRxBcnNum = 0; |
16406 |
+ *TotalRxDataNum = 0; |
16407 |
+diff --git a/drivers/tty/amiserial.c b/drivers/tty/amiserial.c |
16408 |
+index 13f63c01c5894..f60db967bf7b5 100644 |
16409 |
+--- a/drivers/tty/amiserial.c |
16410 |
++++ b/drivers/tty/amiserial.c |
16411 |
+@@ -970,6 +970,7 @@ static int set_serial_info(struct tty_struct *tty, struct serial_struct *ss) |
16412 |
+ if (!serial_isroot()) { |
16413 |
+ if ((ss->baud_base != state->baud_base) || |
16414 |
+ (ss->close_delay != port->close_delay) || |
16415 |
++ (ss->closing_wait != port->closing_wait) || |
16416 |
+ (ss->xmit_fifo_size != state->xmit_fifo_size) || |
16417 |
+ ((ss->flags & ~ASYNC_USR_MASK) != |
16418 |
+ (port->flags & ~ASYNC_USR_MASK))) { |
16419 |
+diff --git a/drivers/tty/moxa.c b/drivers/tty/moxa.c |
16420 |
+index 9f13f7d49dd78..f9f14104bd2c0 100644 |
16421 |
+--- a/drivers/tty/moxa.c |
16422 |
++++ b/drivers/tty/moxa.c |
16423 |
+@@ -2040,7 +2040,7 @@ static int moxa_get_serial_info(struct tty_struct *tty, |
16424 |
+ ss->line = info->port.tty->index, |
16425 |
+ ss->flags = info->port.flags, |
16426 |
+ ss->baud_base = 921600, |
16427 |
+- ss->close_delay = info->port.close_delay; |
16428 |
++ ss->close_delay = jiffies_to_msecs(info->port.close_delay) / 10; |
16429 |
+ mutex_unlock(&info->port.mutex); |
16430 |
+ return 0; |
16431 |
+ } |
16432 |
+@@ -2050,6 +2050,7 @@ static int moxa_set_serial_info(struct tty_struct *tty, |
16433 |
+ struct serial_struct *ss) |
16434 |
+ { |
16435 |
+ struct moxa_port *info = tty->driver_data; |
16436 |
++ unsigned int close_delay; |
16437 |
+ |
16438 |
+ if (tty->index == MAX_PORTS) |
16439 |
+ return -EINVAL; |
16440 |
+@@ -2061,19 +2062,24 @@ static int moxa_set_serial_info(struct tty_struct *tty, |
16441 |
+ ss->baud_base != 921600) |
16442 |
+ return -EPERM; |
16443 |
+ |
16444 |
++ close_delay = msecs_to_jiffies(ss->close_delay * 10); |
16445 |
++ |
16446 |
+ mutex_lock(&info->port.mutex); |
16447 |
+ if (!capable(CAP_SYS_ADMIN)) { |
16448 |
+- if (((ss->flags & ~ASYNC_USR_MASK) != |
16449 |
++ if (close_delay != info->port.close_delay || |
16450 |
++ ss->type != info->type || |
16451 |
++ ((ss->flags & ~ASYNC_USR_MASK) != |
16452 |
+ (info->port.flags & ~ASYNC_USR_MASK))) { |
16453 |
+ mutex_unlock(&info->port.mutex); |
16454 |
+ return -EPERM; |
16455 |
+ } |
16456 |
+- } |
16457 |
+- info->port.close_delay = ss->close_delay * HZ / 100; |
16458 |
++ } else { |
16459 |
++ info->port.close_delay = close_delay; |
16460 |
+ |
16461 |
+- MoxaSetFifo(info, ss->type == PORT_16550A); |
16462 |
++ MoxaSetFifo(info, ss->type == PORT_16550A); |
16463 |
+ |
16464 |
+- info->type = ss->type; |
16465 |
++ info->type = ss->type; |
16466 |
++ } |
16467 |
+ mutex_unlock(&info->port.mutex); |
16468 |
+ return 0; |
16469 |
+ } |
16470 |
+diff --git a/drivers/tty/serial/liteuart.c b/drivers/tty/serial/liteuart.c |
16471 |
+index 64842f3539e19..0b06770642cb3 100644 |
16472 |
+--- a/drivers/tty/serial/liteuart.c |
16473 |
++++ b/drivers/tty/serial/liteuart.c |
16474 |
+@@ -270,8 +270,8 @@ static int liteuart_probe(struct platform_device *pdev) |
16475 |
+ |
16476 |
+ /* get membase */ |
16477 |
+ port->membase = devm_platform_get_and_ioremap_resource(pdev, 0, NULL); |
16478 |
+- if (!port->membase) |
16479 |
+- return -ENXIO; |
16480 |
++ if (IS_ERR(port->membase)) |
16481 |
++ return PTR_ERR(port->membase); |
16482 |
+ |
16483 |
+ /* values not from device tree */ |
16484 |
+ port->dev = &pdev->dev; |
16485 |
+diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c |
16486 |
+index 76b94d0ff5865..84e8158088cd2 100644 |
16487 |
+--- a/drivers/tty/serial/omap-serial.c |
16488 |
++++ b/drivers/tty/serial/omap-serial.c |
16489 |
+@@ -159,6 +159,8 @@ struct uart_omap_port { |
16490 |
+ u32 calc_latency; |
16491 |
+ struct work_struct qos_work; |
16492 |
+ bool is_suspending; |
16493 |
++ |
16494 |
++ unsigned int rs485_tx_filter_count; |
16495 |
+ }; |
16496 |
+ |
16497 |
+ #define to_uart_omap_port(p) ((container_of((p), struct uart_omap_port, port))) |
16498 |
+@@ -302,7 +304,8 @@ static void serial_omap_stop_tx(struct uart_port *port) |
16499 |
+ serial_out(up, UART_OMAP_SCR, up->scr); |
16500 |
+ res = (port->rs485.flags & SER_RS485_RTS_AFTER_SEND) ? |
16501 |
+ 1 : 0; |
16502 |
+- if (gpiod_get_value(up->rts_gpiod) != res) { |
16503 |
++ if (up->rts_gpiod && |
16504 |
++ gpiod_get_value(up->rts_gpiod) != res) { |
16505 |
+ if (port->rs485.delay_rts_after_send > 0) |
16506 |
+ mdelay( |
16507 |
+ port->rs485.delay_rts_after_send); |
16508 |
+@@ -328,19 +331,6 @@ static void serial_omap_stop_tx(struct uart_port *port) |
16509 |
+ serial_out(up, UART_IER, up->ier); |
16510 |
+ } |
16511 |
+ |
16512 |
+- if ((port->rs485.flags & SER_RS485_ENABLED) && |
16513 |
+- !(port->rs485.flags & SER_RS485_RX_DURING_TX)) { |
16514 |
+- /* |
16515 |
+- * Empty the RX FIFO, we are not interested in anything |
16516 |
+- * received during the half-duplex transmission. |
16517 |
+- */ |
16518 |
+- serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_RCVR); |
16519 |
+- /* Re-enable RX interrupts */ |
16520 |
+- up->ier |= UART_IER_RLSI | UART_IER_RDI; |
16521 |
+- up->port.read_status_mask |= UART_LSR_DR; |
16522 |
+- serial_out(up, UART_IER, up->ier); |
16523 |
+- } |
16524 |
+- |
16525 |
+ pm_runtime_mark_last_busy(up->dev); |
16526 |
+ pm_runtime_put_autosuspend(up->dev); |
16527 |
+ } |
16528 |
+@@ -366,6 +356,10 @@ static void transmit_chars(struct uart_omap_port *up, unsigned int lsr) |
16529 |
+ serial_out(up, UART_TX, up->port.x_char); |
16530 |
+ up->port.icount.tx++; |
16531 |
+ up->port.x_char = 0; |
16532 |
++ if ((up->port.rs485.flags & SER_RS485_ENABLED) && |
16533 |
++ !(up->port.rs485.flags & SER_RS485_RX_DURING_TX)) |
16534 |
++ up->rs485_tx_filter_count++; |
16535 |
++ |
16536 |
+ return; |
16537 |
+ } |
16538 |
+ if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { |
16539 |
+@@ -377,6 +371,10 @@ static void transmit_chars(struct uart_omap_port *up, unsigned int lsr) |
16540 |
+ serial_out(up, UART_TX, xmit->buf[xmit->tail]); |
16541 |
+ xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); |
16542 |
+ up->port.icount.tx++; |
16543 |
++ if ((up->port.rs485.flags & SER_RS485_ENABLED) && |
16544 |
++ !(up->port.rs485.flags & SER_RS485_RX_DURING_TX)) |
16545 |
++ up->rs485_tx_filter_count++; |
16546 |
++ |
16547 |
+ if (uart_circ_empty(xmit)) |
16548 |
+ break; |
16549 |
+ } while (--count > 0); |
16550 |
+@@ -411,7 +409,7 @@ static void serial_omap_start_tx(struct uart_port *port) |
16551 |
+ |
16552 |
+ /* if rts not already enabled */ |
16553 |
+ res = (port->rs485.flags & SER_RS485_RTS_ON_SEND) ? 1 : 0; |
16554 |
+- if (gpiod_get_value(up->rts_gpiod) != res) { |
16555 |
++ if (up->rts_gpiod && gpiod_get_value(up->rts_gpiod) != res) { |
16556 |
+ gpiod_set_value(up->rts_gpiod, res); |
16557 |
+ if (port->rs485.delay_rts_before_send > 0) |
16558 |
+ mdelay(port->rs485.delay_rts_before_send); |
16559 |
+@@ -420,7 +418,7 @@ static void serial_omap_start_tx(struct uart_port *port) |
16560 |
+ |
16561 |
+ if ((port->rs485.flags & SER_RS485_ENABLED) && |
16562 |
+ !(port->rs485.flags & SER_RS485_RX_DURING_TX)) |
16563 |
+- serial_omap_stop_rx(port); |
16564 |
++ up->rs485_tx_filter_count = 0; |
16565 |
+ |
16566 |
+ serial_omap_enable_ier_thri(up); |
16567 |
+ pm_runtime_mark_last_busy(up->dev); |
16568 |
+@@ -491,8 +489,13 @@ static void serial_omap_rlsi(struct uart_omap_port *up, unsigned int lsr) |
16569 |
+ * Read one data character out to avoid stalling the receiver according |
16570 |
+ * to the table 23-246 of the omap4 TRM. |
16571 |
+ */ |
16572 |
+- if (likely(lsr & UART_LSR_DR)) |
16573 |
++ if (likely(lsr & UART_LSR_DR)) { |
16574 |
+ serial_in(up, UART_RX); |
16575 |
++ if ((up->port.rs485.flags & SER_RS485_ENABLED) && |
16576 |
++ !(up->port.rs485.flags & SER_RS485_RX_DURING_TX) && |
16577 |
++ up->rs485_tx_filter_count) |
16578 |
++ up->rs485_tx_filter_count--; |
16579 |
++ } |
16580 |
+ |
16581 |
+ up->port.icount.rx++; |
16582 |
+ flag = TTY_NORMAL; |
16583 |
+@@ -543,6 +546,13 @@ static void serial_omap_rdi(struct uart_omap_port *up, unsigned int lsr) |
16584 |
+ return; |
16585 |
+ |
16586 |
+ ch = serial_in(up, UART_RX); |
16587 |
++ if ((up->port.rs485.flags & SER_RS485_ENABLED) && |
16588 |
++ !(up->port.rs485.flags & SER_RS485_RX_DURING_TX) && |
16589 |
++ up->rs485_tx_filter_count) { |
16590 |
++ up->rs485_tx_filter_count--; |
16591 |
++ return; |
16592 |
++ } |
16593 |
++ |
16594 |
+ flag = TTY_NORMAL; |
16595 |
+ up->port.icount.rx++; |
16596 |
+ |
16597 |
+@@ -1407,18 +1417,13 @@ serial_omap_config_rs485(struct uart_port *port, struct serial_rs485 *rs485) |
16598 |
+ /* store new config */ |
16599 |
+ port->rs485 = *rs485; |
16600 |
+ |
16601 |
+- /* |
16602 |
+- * Just as a precaution, only allow rs485 |
16603 |
+- * to be enabled if the gpio pin is valid |
16604 |
+- */ |
16605 |
+ if (up->rts_gpiod) { |
16606 |
+ /* enable / disable rts */ |
16607 |
+ val = (port->rs485.flags & SER_RS485_ENABLED) ? |
16608 |
+ SER_RS485_RTS_AFTER_SEND : SER_RS485_RTS_ON_SEND; |
16609 |
+ val = (port->rs485.flags & val) ? 1 : 0; |
16610 |
+ gpiod_set_value(up->rts_gpiod, val); |
16611 |
+- } else |
16612 |
+- port->rs485.flags &= ~SER_RS485_ENABLED; |
16613 |
++ } |
16614 |
+ |
16615 |
+ /* Enable interrupts */ |
16616 |
+ up->ier = mode; |
16617 |
+diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c |
16618 |
+index f86ec2d2635b7..9adb8362578c5 100644 |
16619 |
+--- a/drivers/tty/serial/sc16is7xx.c |
16620 |
++++ b/drivers/tty/serial/sc16is7xx.c |
16621 |
+@@ -1196,7 +1196,7 @@ static int sc16is7xx_probe(struct device *dev, |
16622 |
+ ret = regmap_read(regmap, |
16623 |
+ SC16IS7XX_LSR_REG << SC16IS7XX_REG_SHIFT, &val); |
16624 |
+ if (ret < 0) |
16625 |
+- return ret; |
16626 |
++ return -EPROBE_DEFER; |
16627 |
+ |
16628 |
+ /* Alloc port structure */ |
16629 |
+ s = devm_kzalloc(dev, struct_size(s, p, devtype->nr_uart), GFP_KERNEL); |
16630 |
+diff --git a/drivers/tty/serial/serial_core.c b/drivers/tty/serial/serial_core.c |
16631 |
+index 828f9ad1be49c..c6cbaccc19b0d 100644 |
16632 |
+--- a/drivers/tty/serial/serial_core.c |
16633 |
++++ b/drivers/tty/serial/serial_core.c |
16634 |
+@@ -1306,7 +1306,7 @@ static int uart_set_rs485_config(struct uart_port *port, |
16635 |
+ unsigned long flags; |
16636 |
+ |
16637 |
+ if (!port->rs485_config) |
16638 |
+- return -ENOIOCTLCMD; |
16639 |
++ return -ENOTTY; |
16640 |
+ |
16641 |
+ if (copy_from_user(&rs485, rs485_user, sizeof(*rs485_user))) |
16642 |
+ return -EFAULT; |
16643 |
+@@ -1330,7 +1330,7 @@ static int uart_get_iso7816_config(struct uart_port *port, |
16644 |
+ struct serial_iso7816 aux; |
16645 |
+ |
16646 |
+ if (!port->iso7816_config) |
16647 |
+- return -ENOIOCTLCMD; |
16648 |
++ return -ENOTTY; |
16649 |
+ |
16650 |
+ spin_lock_irqsave(&port->lock, flags); |
16651 |
+ aux = port->iso7816; |
16652 |
+@@ -1350,7 +1350,7 @@ static int uart_set_iso7816_config(struct uart_port *port, |
16653 |
+ unsigned long flags; |
16654 |
+ |
16655 |
+ if (!port->iso7816_config) |
16656 |
+- return -ENOIOCTLCMD; |
16657 |
++ return -ENOTTY; |
16658 |
+ |
16659 |
+ if (copy_from_user(&iso7816, iso7816_user, sizeof(*iso7816_user))) |
16660 |
+ return -EFAULT; |
16661 |
+diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c |
16662 |
+index 6248304a001f4..2cf9fc915510c 100644 |
16663 |
+--- a/drivers/tty/serial/stm32-usart.c |
16664 |
++++ b/drivers/tty/serial/stm32-usart.c |
16665 |
+@@ -34,15 +34,15 @@ |
16666 |
+ #include "serial_mctrl_gpio.h" |
16667 |
+ #include "stm32-usart.h" |
16668 |
+ |
16669 |
+-static void stm32_stop_tx(struct uart_port *port); |
16670 |
+-static void stm32_transmit_chars(struct uart_port *port); |
16671 |
++static void stm32_usart_stop_tx(struct uart_port *port); |
16672 |
++static void stm32_usart_transmit_chars(struct uart_port *port); |
16673 |
+ |
16674 |
+ static inline struct stm32_port *to_stm32_port(struct uart_port *port) |
16675 |
+ { |
16676 |
+ return container_of(port, struct stm32_port, port); |
16677 |
+ } |
16678 |
+ |
16679 |
+-static void stm32_set_bits(struct uart_port *port, u32 reg, u32 bits) |
16680 |
++static void stm32_usart_set_bits(struct uart_port *port, u32 reg, u32 bits) |
16681 |
+ { |
16682 |
+ u32 val; |
16683 |
+ |
16684 |
+@@ -51,7 +51,7 @@ static void stm32_set_bits(struct uart_port *port, u32 reg, u32 bits) |
16685 |
+ writel_relaxed(val, port->membase + reg); |
16686 |
+ } |
16687 |
+ |
16688 |
+-static void stm32_clr_bits(struct uart_port *port, u32 reg, u32 bits) |
16689 |
++static void stm32_usart_clr_bits(struct uart_port *port, u32 reg, u32 bits) |
16690 |
+ { |
16691 |
+ u32 val; |
16692 |
+ |
16693 |
+@@ -60,8 +60,8 @@ static void stm32_clr_bits(struct uart_port *port, u32 reg, u32 bits) |
16694 |
+ writel_relaxed(val, port->membase + reg); |
16695 |
+ } |
16696 |
+ |
16697 |
+-static void stm32_config_reg_rs485(u32 *cr1, u32 *cr3, u32 delay_ADE, |
16698 |
+- u32 delay_DDE, u32 baud) |
16699 |
++static void stm32_usart_config_reg_rs485(u32 *cr1, u32 *cr3, u32 delay_ADE, |
16700 |
++ u32 delay_DDE, u32 baud) |
16701 |
+ { |
16702 |
+ u32 rs485_deat_dedt; |
16703 |
+ u32 rs485_deat_dedt_max = (USART_CR1_DEAT_MASK >> USART_CR1_DEAT_SHIFT); |
16704 |
+@@ -95,16 +95,16 @@ static void stm32_config_reg_rs485(u32 *cr1, u32 *cr3, u32 delay_ADE, |
16705 |
+ *cr1 |= rs485_deat_dedt; |
16706 |
+ } |
16707 |
+ |
16708 |
+-static int stm32_config_rs485(struct uart_port *port, |
16709 |
+- struct serial_rs485 *rs485conf) |
16710 |
++static int stm32_usart_config_rs485(struct uart_port *port, |
16711 |
++ struct serial_rs485 *rs485conf) |
16712 |
+ { |
16713 |
+ struct stm32_port *stm32_port = to_stm32_port(port); |
16714 |
+- struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
16715 |
+- struct stm32_usart_config *cfg = &stm32_port->info->cfg; |
16716 |
++ const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
16717 |
++ const struct stm32_usart_config *cfg = &stm32_port->info->cfg; |
16718 |
+ u32 usartdiv, baud, cr1, cr3; |
16719 |
+ bool over8; |
16720 |
+ |
16721 |
+- stm32_clr_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit)); |
16722 |
++ stm32_usart_clr_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit)); |
16723 |
+ |
16724 |
+ port->rs485 = *rs485conf; |
16725 |
+ |
16726 |
+@@ -122,9 +122,10 @@ static int stm32_config_rs485(struct uart_port *port, |
16727 |
+ << USART_BRR_04_R_SHIFT; |
16728 |
+ |
16729 |
+ baud = DIV_ROUND_CLOSEST(port->uartclk, usartdiv); |
16730 |
+- stm32_config_reg_rs485(&cr1, &cr3, |
16731 |
+- rs485conf->delay_rts_before_send, |
16732 |
+- rs485conf->delay_rts_after_send, baud); |
16733 |
++ stm32_usart_config_reg_rs485(&cr1, &cr3, |
16734 |
++ rs485conf->delay_rts_before_send, |
16735 |
++ rs485conf->delay_rts_after_send, |
16736 |
++ baud); |
16737 |
+ |
16738 |
+ if (rs485conf->flags & SER_RS485_RTS_ON_SEND) { |
16739 |
+ cr3 &= ~USART_CR3_DEP; |
16740 |
+@@ -137,18 +138,19 @@ static int stm32_config_rs485(struct uart_port *port, |
16741 |
+ writel_relaxed(cr3, port->membase + ofs->cr3); |
16742 |
+ writel_relaxed(cr1, port->membase + ofs->cr1); |
16743 |
+ } else { |
16744 |
+- stm32_clr_bits(port, ofs->cr3, USART_CR3_DEM | USART_CR3_DEP); |
16745 |
+- stm32_clr_bits(port, ofs->cr1, |
16746 |
+- USART_CR1_DEDT_MASK | USART_CR1_DEAT_MASK); |
16747 |
++ stm32_usart_clr_bits(port, ofs->cr3, |
16748 |
++ USART_CR3_DEM | USART_CR3_DEP); |
16749 |
++ stm32_usart_clr_bits(port, ofs->cr1, |
16750 |
++ USART_CR1_DEDT_MASK | USART_CR1_DEAT_MASK); |
16751 |
+ } |
16752 |
+ |
16753 |
+- stm32_set_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit)); |
16754 |
++ stm32_usart_set_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit)); |
16755 |
+ |
16756 |
+ return 0; |
16757 |
+ } |
16758 |
+ |
16759 |
+-static int stm32_init_rs485(struct uart_port *port, |
16760 |
+- struct platform_device *pdev) |
16761 |
++static int stm32_usart_init_rs485(struct uart_port *port, |
16762 |
++ struct platform_device *pdev) |
16763 |
+ { |
16764 |
+ struct serial_rs485 *rs485conf = &port->rs485; |
16765 |
+ |
16766 |
+@@ -162,11 +164,11 @@ static int stm32_init_rs485(struct uart_port *port, |
16767 |
+ return uart_get_rs485_mode(port); |
16768 |
+ } |
16769 |
+ |
16770 |
+-static int stm32_pending_rx(struct uart_port *port, u32 *sr, int *last_res, |
16771 |
+- bool threaded) |
16772 |
++static int stm32_usart_pending_rx(struct uart_port *port, u32 *sr, |
16773 |
++ int *last_res, bool threaded) |
16774 |
+ { |
16775 |
+ struct stm32_port *stm32_port = to_stm32_port(port); |
16776 |
+- struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
16777 |
++ const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
16778 |
+ enum dma_status status; |
16779 |
+ struct dma_tx_state state; |
16780 |
+ |
16781 |
+@@ -176,8 +178,7 @@ static int stm32_pending_rx(struct uart_port *port, u32 *sr, int *last_res, |
16782 |
+ status = dmaengine_tx_status(stm32_port->rx_ch, |
16783 |
+ stm32_port->rx_ch->cookie, |
16784 |
+ &state); |
16785 |
+- if ((status == DMA_IN_PROGRESS) && |
16786 |
+- (*last_res != state.residue)) |
16787 |
++ if (status == DMA_IN_PROGRESS && (*last_res != state.residue)) |
16788 |
+ return 1; |
16789 |
+ else |
16790 |
+ return 0; |
16791 |
+@@ -187,11 +188,11 @@ static int stm32_pending_rx(struct uart_port *port, u32 *sr, int *last_res, |
16792 |
+ return 0; |
16793 |
+ } |
16794 |
+ |
16795 |
+-static unsigned long stm32_get_char(struct uart_port *port, u32 *sr, |
16796 |
+- int *last_res) |
16797 |
++static unsigned long stm32_usart_get_char(struct uart_port *port, u32 *sr, |
16798 |
++ int *last_res) |
16799 |
+ { |
16800 |
+ struct stm32_port *stm32_port = to_stm32_port(port); |
16801 |
+- struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
16802 |
++ const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
16803 |
+ unsigned long c; |
16804 |
+ |
16805 |
+ if (stm32_port->rx_ch) { |
16806 |
+@@ -207,19 +208,22 @@ static unsigned long stm32_get_char(struct uart_port *port, u32 *sr, |
16807 |
+ return c; |
16808 |
+ } |
16809 |
+ |
16810 |
+-static void stm32_receive_chars(struct uart_port *port, bool threaded) |
16811 |
++static void stm32_usart_receive_chars(struct uart_port *port, bool threaded) |
16812 |
+ { |
16813 |
+ struct tty_port *tport = &port->state->port; |
16814 |
+ struct stm32_port *stm32_port = to_stm32_port(port); |
16815 |
+- struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
16816 |
+- unsigned long c; |
16817 |
++ const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
16818 |
++ unsigned long c, flags; |
16819 |
+ u32 sr; |
16820 |
+ char flag; |
16821 |
+ |
16822 |
+- if (irqd_is_wakeup_set(irq_get_irq_data(port->irq))) |
16823 |
+- pm_wakeup_event(tport->tty->dev, 0); |
16824 |
++ if (threaded) |
16825 |
++ spin_lock_irqsave(&port->lock, flags); |
16826 |
++ else |
16827 |
++ spin_lock(&port->lock); |
16828 |
+ |
16829 |
+- while (stm32_pending_rx(port, &sr, &stm32_port->last_res, threaded)) { |
16830 |
++ while (stm32_usart_pending_rx(port, &sr, &stm32_port->last_res, |
16831 |
++ threaded)) { |
16832 |
+ sr |= USART_SR_DUMMY_RX; |
16833 |
+ flag = TTY_NORMAL; |
16834 |
+ |
16835 |
+@@ -238,7 +242,7 @@ static void stm32_receive_chars(struct uart_port *port, bool threaded) |
16836 |
+ writel_relaxed(sr & USART_SR_ERR_MASK, |
16837 |
+ port->membase + ofs->icr); |
16838 |
+ |
16839 |
+- c = stm32_get_char(port, &sr, &stm32_port->last_res); |
16840 |
++ c = stm32_usart_get_char(port, &sr, &stm32_port->last_res); |
16841 |
+ port->icount.rx++; |
16842 |
+ if (sr & USART_SR_ERR_MASK) { |
16843 |
+ if (sr & USART_SR_ORE) { |
16844 |
+@@ -273,58 +277,65 @@ static void stm32_receive_chars(struct uart_port *port, bool threaded) |
16845 |
+ uart_insert_char(port, sr, USART_SR_ORE, c, flag); |
16846 |
+ } |
16847 |
+ |
16848 |
+- spin_unlock(&port->lock); |
16849 |
++ if (threaded) |
16850 |
++ spin_unlock_irqrestore(&port->lock, flags); |
16851 |
++ else |
16852 |
++ spin_unlock(&port->lock); |
16853 |
++ |
16854 |
+ tty_flip_buffer_push(tport); |
16855 |
+- spin_lock(&port->lock); |
16856 |
+ } |
16857 |
+ |
16858 |
+-static void stm32_tx_dma_complete(void *arg) |
16859 |
++static void stm32_usart_tx_dma_complete(void *arg) |
16860 |
+ { |
16861 |
+ struct uart_port *port = arg; |
16862 |
+ struct stm32_port *stm32port = to_stm32_port(port); |
16863 |
+- struct stm32_usart_offsets *ofs = &stm32port->info->ofs; |
16864 |
++ const struct stm32_usart_offsets *ofs = &stm32port->info->ofs; |
16865 |
++ unsigned long flags; |
16866 |
+ |
16867 |
+- stm32_clr_bits(port, ofs->cr3, USART_CR3_DMAT); |
16868 |
++ dmaengine_terminate_async(stm32port->tx_ch); |
16869 |
++ stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_DMAT); |
16870 |
+ stm32port->tx_dma_busy = false; |
16871 |
+ |
16872 |
+ /* Let's see if we have pending data to send */ |
16873 |
+- stm32_transmit_chars(port); |
16874 |
++ spin_lock_irqsave(&port->lock, flags); |
16875 |
++ stm32_usart_transmit_chars(port); |
16876 |
++ spin_unlock_irqrestore(&port->lock, flags); |
16877 |
+ } |
16878 |
+ |
16879 |
+-static void stm32_tx_interrupt_enable(struct uart_port *port) |
16880 |
++static void stm32_usart_tx_interrupt_enable(struct uart_port *port) |
16881 |
+ { |
16882 |
+ struct stm32_port *stm32_port = to_stm32_port(port); |
16883 |
+- struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
16884 |
++ const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
16885 |
+ |
16886 |
+ /* |
16887 |
+ * Enables TX FIFO threashold irq when FIFO is enabled, |
16888 |
+ * or TX empty irq when FIFO is disabled |
16889 |
+ */ |
16890 |
+ if (stm32_port->fifoen) |
16891 |
+- stm32_set_bits(port, ofs->cr3, USART_CR3_TXFTIE); |
16892 |
++ stm32_usart_set_bits(port, ofs->cr3, USART_CR3_TXFTIE); |
16893 |
+ else |
16894 |
+- stm32_set_bits(port, ofs->cr1, USART_CR1_TXEIE); |
16895 |
++ stm32_usart_set_bits(port, ofs->cr1, USART_CR1_TXEIE); |
16896 |
+ } |
16897 |
+ |
16898 |
+-static void stm32_tx_interrupt_disable(struct uart_port *port) |
16899 |
++static void stm32_usart_tx_interrupt_disable(struct uart_port *port) |
16900 |
+ { |
16901 |
+ struct stm32_port *stm32_port = to_stm32_port(port); |
16902 |
+- struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
16903 |
++ const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
16904 |
+ |
16905 |
+ if (stm32_port->fifoen) |
16906 |
+- stm32_clr_bits(port, ofs->cr3, USART_CR3_TXFTIE); |
16907 |
++ stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_TXFTIE); |
16908 |
+ else |
16909 |
+- stm32_clr_bits(port, ofs->cr1, USART_CR1_TXEIE); |
16910 |
++ stm32_usart_clr_bits(port, ofs->cr1, USART_CR1_TXEIE); |
16911 |
+ } |
16912 |
+ |
16913 |
+-static void stm32_transmit_chars_pio(struct uart_port *port) |
16914 |
++static void stm32_usart_transmit_chars_pio(struct uart_port *port) |
16915 |
+ { |
16916 |
+ struct stm32_port *stm32_port = to_stm32_port(port); |
16917 |
+- struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
16918 |
++ const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
16919 |
+ struct circ_buf *xmit = &port->state->xmit; |
16920 |
+ |
16921 |
+ if (stm32_port->tx_dma_busy) { |
16922 |
+- stm32_clr_bits(port, ofs->cr3, USART_CR3_DMAT); |
16923 |
++ stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_DMAT); |
16924 |
+ stm32_port->tx_dma_busy = false; |
16925 |
+ } |
16926 |
+ |
16927 |
+@@ -339,15 +350,15 @@ static void stm32_transmit_chars_pio(struct uart_port *port) |
16928 |
+ |
16929 |
+ /* rely on TXE irq (mask or unmask) for sending remaining data */ |
16930 |
+ if (uart_circ_empty(xmit)) |
16931 |
+- stm32_tx_interrupt_disable(port); |
16932 |
++ stm32_usart_tx_interrupt_disable(port); |
16933 |
+ else |
16934 |
+- stm32_tx_interrupt_enable(port); |
16935 |
++ stm32_usart_tx_interrupt_enable(port); |
16936 |
+ } |
16937 |
+ |
16938 |
+-static void stm32_transmit_chars_dma(struct uart_port *port) |
16939 |
++static void stm32_usart_transmit_chars_dma(struct uart_port *port) |
16940 |
+ { |
16941 |
+ struct stm32_port *stm32port = to_stm32_port(port); |
16942 |
+- struct stm32_usart_offsets *ofs = &stm32port->info->ofs; |
16943 |
++ const struct stm32_usart_offsets *ofs = &stm32port->info->ofs; |
16944 |
+ struct circ_buf *xmit = &port->state->xmit; |
16945 |
+ struct dma_async_tx_descriptor *desc = NULL; |
16946 |
+ unsigned int count, i; |
16947 |
+@@ -386,7 +397,7 @@ static void stm32_transmit_chars_dma(struct uart_port *port) |
16948 |
+ if (!desc) |
16949 |
+ goto fallback_err; |
16950 |
+ |
16951 |
+- desc->callback = stm32_tx_dma_complete; |
16952 |
++ desc->callback = stm32_usart_tx_dma_complete; |
16953 |
+ desc->callback_param = port; |
16954 |
+ |
16955 |
+ /* Push current DMA TX transaction in the pending queue */ |
16956 |
+@@ -399,7 +410,7 @@ static void stm32_transmit_chars_dma(struct uart_port *port) |
16957 |
+ /* Issue pending DMA TX requests */ |
16958 |
+ dma_async_issue_pending(stm32port->tx_ch); |
16959 |
+ |
16960 |
+- stm32_set_bits(port, ofs->cr3, USART_CR3_DMAT); |
16961 |
++ stm32_usart_set_bits(port, ofs->cr3, USART_CR3_DMAT); |
16962 |
+ |
16963 |
+ xmit->tail = (xmit->tail + count) & (UART_XMIT_SIZE - 1); |
16964 |
+ port->icount.tx += count; |
16965 |
+@@ -407,74 +418,79 @@ static void stm32_transmit_chars_dma(struct uart_port *port) |
16966 |
+ |
16967 |
+ fallback_err: |
16968 |
+ for (i = count; i > 0; i--) |
16969 |
+- stm32_transmit_chars_pio(port); |
16970 |
++ stm32_usart_transmit_chars_pio(port); |
16971 |
+ } |
16972 |
+ |
16973 |
+-static void stm32_transmit_chars(struct uart_port *port) |
16974 |
++static void stm32_usart_transmit_chars(struct uart_port *port) |
16975 |
+ { |
16976 |
+ struct stm32_port *stm32_port = to_stm32_port(port); |
16977 |
+- struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
16978 |
++ const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
16979 |
+ struct circ_buf *xmit = &port->state->xmit; |
16980 |
+ |
16981 |
+ if (port->x_char) { |
16982 |
+ if (stm32_port->tx_dma_busy) |
16983 |
+- stm32_clr_bits(port, ofs->cr3, USART_CR3_DMAT); |
16984 |
++ stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_DMAT); |
16985 |
+ writel_relaxed(port->x_char, port->membase + ofs->tdr); |
16986 |
+ port->x_char = 0; |
16987 |
+ port->icount.tx++; |
16988 |
+ if (stm32_port->tx_dma_busy) |
16989 |
+- stm32_set_bits(port, ofs->cr3, USART_CR3_DMAT); |
16990 |
++ stm32_usart_set_bits(port, ofs->cr3, USART_CR3_DMAT); |
16991 |
+ return; |
16992 |
+ } |
16993 |
+ |
16994 |
+ if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { |
16995 |
+- stm32_tx_interrupt_disable(port); |
16996 |
++ stm32_usart_tx_interrupt_disable(port); |
16997 |
+ return; |
16998 |
+ } |
16999 |
+ |
17000 |
+ if (ofs->icr == UNDEF_REG) |
17001 |
+- stm32_clr_bits(port, ofs->isr, USART_SR_TC); |
17002 |
++ stm32_usart_clr_bits(port, ofs->isr, USART_SR_TC); |
17003 |
+ else |
17004 |
+ writel_relaxed(USART_ICR_TCCF, port->membase + ofs->icr); |
17005 |
+ |
17006 |
+ if (stm32_port->tx_ch) |
17007 |
+- stm32_transmit_chars_dma(port); |
17008 |
++ stm32_usart_transmit_chars_dma(port); |
17009 |
+ else |
17010 |
+- stm32_transmit_chars_pio(port); |
17011 |
++ stm32_usart_transmit_chars_pio(port); |
17012 |
+ |
17013 |
+ if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) |
17014 |
+ uart_write_wakeup(port); |
17015 |
+ |
17016 |
+ if (uart_circ_empty(xmit)) |
17017 |
+- stm32_tx_interrupt_disable(port); |
17018 |
++ stm32_usart_tx_interrupt_disable(port); |
17019 |
+ } |
17020 |
+ |
17021 |
+-static irqreturn_t stm32_interrupt(int irq, void *ptr) |
17022 |
++static irqreturn_t stm32_usart_interrupt(int irq, void *ptr) |
17023 |
+ { |
17024 |
+ struct uart_port *port = ptr; |
17025 |
++ struct tty_port *tport = &port->state->port; |
17026 |
+ struct stm32_port *stm32_port = to_stm32_port(port); |
17027 |
+- struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
17028 |
++ const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
17029 |
+ u32 sr; |
17030 |
+ |
17031 |
+- spin_lock(&port->lock); |
17032 |
+- |
17033 |
+ sr = readl_relaxed(port->membase + ofs->isr); |
17034 |
+ |
17035 |
+ if ((sr & USART_SR_RTOF) && ofs->icr != UNDEF_REG) |
17036 |
+ writel_relaxed(USART_ICR_RTOCF, |
17037 |
+ port->membase + ofs->icr); |
17038 |
+ |
17039 |
+- if ((sr & USART_SR_WUF) && (ofs->icr != UNDEF_REG)) |
17040 |
++ if ((sr & USART_SR_WUF) && ofs->icr != UNDEF_REG) { |
17041 |
++ /* Clear wake up flag and disable wake up interrupt */ |
17042 |
+ writel_relaxed(USART_ICR_WUCF, |
17043 |
+ port->membase + ofs->icr); |
17044 |
++ stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_WUFIE); |
17045 |
++ if (irqd_is_wakeup_set(irq_get_irq_data(port->irq))) |
17046 |
++ pm_wakeup_event(tport->tty->dev, 0); |
17047 |
++ } |
17048 |
+ |
17049 |
+ if ((sr & USART_SR_RXNE) && !(stm32_port->rx_ch)) |
17050 |
+- stm32_receive_chars(port, false); |
17051 |
+- |
17052 |
+- if ((sr & USART_SR_TXE) && !(stm32_port->tx_ch)) |
17053 |
+- stm32_transmit_chars(port); |
17054 |
++ stm32_usart_receive_chars(port, false); |
17055 |
+ |
17056 |
+- spin_unlock(&port->lock); |
17057 |
++ if ((sr & USART_SR_TXE) && !(stm32_port->tx_ch)) { |
17058 |
++ spin_lock(&port->lock); |
17059 |
++ stm32_usart_transmit_chars(port); |
17060 |
++ spin_unlock(&port->lock); |
17061 |
++ } |
17062 |
+ |
17063 |
+ if (stm32_port->rx_ch) |
17064 |
+ return IRQ_WAKE_THREAD; |
17065 |
+@@ -482,43 +498,42 @@ static irqreturn_t stm32_interrupt(int irq, void *ptr) |
17066 |
+ return IRQ_HANDLED; |
17067 |
+ } |
17068 |
+ |
17069 |
+-static irqreturn_t stm32_threaded_interrupt(int irq, void *ptr) |
17070 |
++static irqreturn_t stm32_usart_threaded_interrupt(int irq, void *ptr) |
17071 |
+ { |
17072 |
+ struct uart_port *port = ptr; |
17073 |
+ struct stm32_port *stm32_port = to_stm32_port(port); |
17074 |
+ |
17075 |
+- spin_lock(&port->lock); |
17076 |
+- |
17077 |
+ if (stm32_port->rx_ch) |
17078 |
+- stm32_receive_chars(port, true); |
17079 |
+- |
17080 |
+- spin_unlock(&port->lock); |
17081 |
++ stm32_usart_receive_chars(port, true); |
17082 |
+ |
17083 |
+ return IRQ_HANDLED; |
17084 |
+ } |
17085 |
+ |
17086 |
+-static unsigned int stm32_tx_empty(struct uart_port *port) |
17087 |
++static unsigned int stm32_usart_tx_empty(struct uart_port *port) |
17088 |
+ { |
17089 |
+ struct stm32_port *stm32_port = to_stm32_port(port); |
17090 |
+- struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
17091 |
++ const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
17092 |
+ |
17093 |
+- return readl_relaxed(port->membase + ofs->isr) & USART_SR_TXE; |
17094 |
++ if (readl_relaxed(port->membase + ofs->isr) & USART_SR_TC) |
17095 |
++ return TIOCSER_TEMT; |
17096 |
++ |
17097 |
++ return 0; |
17098 |
+ } |
17099 |
+ |
17100 |
+-static void stm32_set_mctrl(struct uart_port *port, unsigned int mctrl) |
17101 |
++static void stm32_usart_set_mctrl(struct uart_port *port, unsigned int mctrl) |
17102 |
+ { |
17103 |
+ struct stm32_port *stm32_port = to_stm32_port(port); |
17104 |
+- struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
17105 |
++ const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
17106 |
+ |
17107 |
+ if ((mctrl & TIOCM_RTS) && (port->status & UPSTAT_AUTORTS)) |
17108 |
+- stm32_set_bits(port, ofs->cr3, USART_CR3_RTSE); |
17109 |
++ stm32_usart_set_bits(port, ofs->cr3, USART_CR3_RTSE); |
17110 |
+ else |
17111 |
+- stm32_clr_bits(port, ofs->cr3, USART_CR3_RTSE); |
17112 |
++ stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_RTSE); |
17113 |
+ |
17114 |
+ mctrl_gpio_set(stm32_port->gpios, mctrl); |
17115 |
+ } |
17116 |
+ |
17117 |
+-static unsigned int stm32_get_mctrl(struct uart_port *port) |
17118 |
++static unsigned int stm32_usart_get_mctrl(struct uart_port *port) |
17119 |
+ { |
17120 |
+ struct stm32_port *stm32_port = to_stm32_port(port); |
17121 |
+ unsigned int ret; |
17122 |
+@@ -529,23 +544,23 @@ static unsigned int stm32_get_mctrl(struct uart_port *port) |
17123 |
+ return mctrl_gpio_get(stm32_port->gpios, &ret); |
17124 |
+ } |
17125 |
+ |
17126 |
+-static void stm32_enable_ms(struct uart_port *port) |
17127 |
++static void stm32_usart_enable_ms(struct uart_port *port) |
17128 |
+ { |
17129 |
+ mctrl_gpio_enable_ms(to_stm32_port(port)->gpios); |
17130 |
+ } |
17131 |
+ |
17132 |
+-static void stm32_disable_ms(struct uart_port *port) |
17133 |
++static void stm32_usart_disable_ms(struct uart_port *port) |
17134 |
+ { |
17135 |
+ mctrl_gpio_disable_ms(to_stm32_port(port)->gpios); |
17136 |
+ } |
17137 |
+ |
17138 |
+ /* Transmit stop */ |
17139 |
+-static void stm32_stop_tx(struct uart_port *port) |
17140 |
++static void stm32_usart_stop_tx(struct uart_port *port) |
17141 |
+ { |
17142 |
+ struct stm32_port *stm32_port = to_stm32_port(port); |
17143 |
+ struct serial_rs485 *rs485conf = &port->rs485; |
17144 |
+ |
17145 |
+- stm32_tx_interrupt_disable(port); |
17146 |
++ stm32_usart_tx_interrupt_disable(port); |
17147 |
+ |
17148 |
+ if (rs485conf->flags & SER_RS485_ENABLED) { |
17149 |
+ if (rs485conf->flags & SER_RS485_RTS_ON_SEND) { |
17150 |
+@@ -559,7 +574,7 @@ static void stm32_stop_tx(struct uart_port *port) |
17151 |
+ } |
17152 |
+ |
17153 |
+ /* There are probably characters waiting to be transmitted. */ |
17154 |
+-static void stm32_start_tx(struct uart_port *port) |
17155 |
++static void stm32_usart_start_tx(struct uart_port *port) |
17156 |
+ { |
17157 |
+ struct stm32_port *stm32_port = to_stm32_port(port); |
17158 |
+ struct serial_rs485 *rs485conf = &port->rs485; |
17159 |
+@@ -578,102 +593,91 @@ static void stm32_start_tx(struct uart_port *port) |
17160 |
+ } |
17161 |
+ } |
17162 |
+ |
17163 |
+- stm32_transmit_chars(port); |
17164 |
++ stm32_usart_transmit_chars(port); |
17165 |
+ } |
17166 |
+ |
17167 |
+ /* Throttle the remote when input buffer is about to overflow. */ |
17168 |
+-static void stm32_throttle(struct uart_port *port) |
17169 |
++static void stm32_usart_throttle(struct uart_port *port) |
17170 |
+ { |
17171 |
+ struct stm32_port *stm32_port = to_stm32_port(port); |
17172 |
+- struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
17173 |
++ const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
17174 |
+ unsigned long flags; |
17175 |
+ |
17176 |
+ spin_lock_irqsave(&port->lock, flags); |
17177 |
+- stm32_clr_bits(port, ofs->cr1, stm32_port->cr1_irq); |
17178 |
++ stm32_usart_clr_bits(port, ofs->cr1, stm32_port->cr1_irq); |
17179 |
+ if (stm32_port->cr3_irq) |
17180 |
+- stm32_clr_bits(port, ofs->cr3, stm32_port->cr3_irq); |
17181 |
++ stm32_usart_clr_bits(port, ofs->cr3, stm32_port->cr3_irq); |
17182 |
+ |
17183 |
+ spin_unlock_irqrestore(&port->lock, flags); |
17184 |
+ } |
17185 |
+ |
17186 |
+ /* Unthrottle the remote, the input buffer can now accept data. */ |
17187 |
+-static void stm32_unthrottle(struct uart_port *port) |
17188 |
++static void stm32_usart_unthrottle(struct uart_port *port) |
17189 |
+ { |
17190 |
+ struct stm32_port *stm32_port = to_stm32_port(port); |
17191 |
+- struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
17192 |
++ const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
17193 |
+ unsigned long flags; |
17194 |
+ |
17195 |
+ spin_lock_irqsave(&port->lock, flags); |
17196 |
+- stm32_set_bits(port, ofs->cr1, stm32_port->cr1_irq); |
17197 |
++ stm32_usart_set_bits(port, ofs->cr1, stm32_port->cr1_irq); |
17198 |
+ if (stm32_port->cr3_irq) |
17199 |
+- stm32_set_bits(port, ofs->cr3, stm32_port->cr3_irq); |
17200 |
++ stm32_usart_set_bits(port, ofs->cr3, stm32_port->cr3_irq); |
17201 |
+ |
17202 |
+ spin_unlock_irqrestore(&port->lock, flags); |
17203 |
+ } |
17204 |
+ |
17205 |
+ /* Receive stop */ |
17206 |
+-static void stm32_stop_rx(struct uart_port *port) |
17207 |
++static void stm32_usart_stop_rx(struct uart_port *port) |
17208 |
+ { |
17209 |
+ struct stm32_port *stm32_port = to_stm32_port(port); |
17210 |
+- struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
17211 |
++ const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
17212 |
+ |
17213 |
+- stm32_clr_bits(port, ofs->cr1, stm32_port->cr1_irq); |
17214 |
++ stm32_usart_clr_bits(port, ofs->cr1, stm32_port->cr1_irq); |
17215 |
+ if (stm32_port->cr3_irq) |
17216 |
+- stm32_clr_bits(port, ofs->cr3, stm32_port->cr3_irq); |
17217 |
+- |
17218 |
++ stm32_usart_clr_bits(port, ofs->cr3, stm32_port->cr3_irq); |
17219 |
+ } |
17220 |
+ |
17221 |
+ /* Handle breaks - ignored by us */ |
17222 |
+-static void stm32_break_ctl(struct uart_port *port, int break_state) |
17223 |
++static void stm32_usart_break_ctl(struct uart_port *port, int break_state) |
17224 |
+ { |
17225 |
+ } |
17226 |
+ |
17227 |
+-static int stm32_startup(struct uart_port *port) |
17228 |
++static int stm32_usart_startup(struct uart_port *port) |
17229 |
+ { |
17230 |
+ struct stm32_port *stm32_port = to_stm32_port(port); |
17231 |
+- struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
17232 |
++ const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
17233 |
++ const struct stm32_usart_config *cfg = &stm32_port->info->cfg; |
17234 |
+ const char *name = to_platform_device(port->dev)->name; |
17235 |
+ u32 val; |
17236 |
+ int ret; |
17237 |
+ |
17238 |
+- ret = request_threaded_irq(port->irq, stm32_interrupt, |
17239 |
+- stm32_threaded_interrupt, |
17240 |
++ ret = request_threaded_irq(port->irq, stm32_usart_interrupt, |
17241 |
++ stm32_usart_threaded_interrupt, |
17242 |
+ IRQF_NO_SUSPEND, name, port); |
17243 |
+ if (ret) |
17244 |
+ return ret; |
17245 |
+ |
17246 |
+ /* RX FIFO Flush */ |
17247 |
+ if (ofs->rqr != UNDEF_REG) |
17248 |
+- stm32_set_bits(port, ofs->rqr, USART_RQR_RXFRQ); |
17249 |
++ writel_relaxed(USART_RQR_RXFRQ, port->membase + ofs->rqr); |
17250 |
+ |
17251 |
+- /* Tx and RX FIFO configuration */ |
17252 |
+- if (stm32_port->fifoen) { |
17253 |
+- val = readl_relaxed(port->membase + ofs->cr3); |
17254 |
+- val &= ~(USART_CR3_TXFTCFG_MASK | USART_CR3_RXFTCFG_MASK); |
17255 |
+- val |= USART_CR3_TXFTCFG_HALF << USART_CR3_TXFTCFG_SHIFT; |
17256 |
+- val |= USART_CR3_RXFTCFG_HALF << USART_CR3_RXFTCFG_SHIFT; |
17257 |
+- writel_relaxed(val, port->membase + ofs->cr3); |
17258 |
+- } |
17259 |
+- |
17260 |
+- /* RX FIFO enabling */ |
17261 |
+- val = stm32_port->cr1_irq | USART_CR1_RE; |
17262 |
+- if (stm32_port->fifoen) |
17263 |
+- val |= USART_CR1_FIFOEN; |
17264 |
+- stm32_set_bits(port, ofs->cr1, val); |
17265 |
++ /* RX enabling */ |
17266 |
++ val = stm32_port->cr1_irq | USART_CR1_RE | BIT(cfg->uart_enable_bit); |
17267 |
++ stm32_usart_set_bits(port, ofs->cr1, val); |
17268 |
+ |
17269 |
+ return 0; |
17270 |
+ } |
17271 |
+ |
17272 |
+-static void stm32_shutdown(struct uart_port *port) |
17273 |
++static void stm32_usart_shutdown(struct uart_port *port) |
17274 |
+ { |
17275 |
+ struct stm32_port *stm32_port = to_stm32_port(port); |
17276 |
+- struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
17277 |
+- struct stm32_usart_config *cfg = &stm32_port->info->cfg; |
17278 |
++ const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
17279 |
++ const struct stm32_usart_config *cfg = &stm32_port->info->cfg; |
17280 |
+ u32 val, isr; |
17281 |
+ int ret; |
17282 |
+ |
17283 |
+ /* Disable modem control interrupts */ |
17284 |
+- stm32_disable_ms(port); |
17285 |
++ stm32_usart_disable_ms(port); |
17286 |
+ |
17287 |
+ val = USART_CR1_TXEIE | USART_CR1_TE; |
17288 |
+ val |= stm32_port->cr1_irq | USART_CR1_RE; |
17289 |
+@@ -688,12 +692,17 @@ static void stm32_shutdown(struct uart_port *port) |
17290 |
+ if (ret) |
17291 |
+ dev_err(port->dev, "transmission complete not set\n"); |
17292 |
+ |
17293 |
+- stm32_clr_bits(port, ofs->cr1, val); |
17294 |
++ /* flush RX & TX FIFO */ |
17295 |
++ if (ofs->rqr != UNDEF_REG) |
17296 |
++ writel_relaxed(USART_RQR_TXFRQ | USART_RQR_RXFRQ, |
17297 |
++ port->membase + ofs->rqr); |
17298 |
++ |
17299 |
++ stm32_usart_clr_bits(port, ofs->cr1, val); |
17300 |
+ |
17301 |
+ free_irq(port->irq, port); |
17302 |
+ } |
17303 |
+ |
17304 |
+-static unsigned int stm32_get_databits(struct ktermios *termios) |
17305 |
++static unsigned int stm32_usart_get_databits(struct ktermios *termios) |
17306 |
+ { |
17307 |
+ unsigned int bits; |
17308 |
+ |
17309 |
+@@ -723,18 +732,20 @@ static unsigned int stm32_get_databits(struct ktermios *termios) |
17310 |
+ return bits; |
17311 |
+ } |
17312 |
+ |
17313 |
+-static void stm32_set_termios(struct uart_port *port, struct ktermios *termios, |
17314 |
+- struct ktermios *old) |
17315 |
++static void stm32_usart_set_termios(struct uart_port *port, |
17316 |
++ struct ktermios *termios, |
17317 |
++ struct ktermios *old) |
17318 |
+ { |
17319 |
+ struct stm32_port *stm32_port = to_stm32_port(port); |
17320 |
+- struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
17321 |
+- struct stm32_usart_config *cfg = &stm32_port->info->cfg; |
17322 |
++ const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
17323 |
++ const struct stm32_usart_config *cfg = &stm32_port->info->cfg; |
17324 |
+ struct serial_rs485 *rs485conf = &port->rs485; |
17325 |
+ unsigned int baud, bits; |
17326 |
+ u32 usartdiv, mantissa, fraction, oversampling; |
17327 |
+ tcflag_t cflag = termios->c_cflag; |
17328 |
+- u32 cr1, cr2, cr3; |
17329 |
++ u32 cr1, cr2, cr3, isr; |
17330 |
+ unsigned long flags; |
17331 |
++ int ret; |
17332 |
+ |
17333 |
+ if (!stm32_port->hw_flow_control) |
17334 |
+ cflag &= ~CRTSCTS; |
17335 |
+@@ -743,26 +754,41 @@ static void stm32_set_termios(struct uart_port *port, struct ktermios *termios, |
17336 |
+ |
17337 |
+ spin_lock_irqsave(&port->lock, flags); |
17338 |
+ |
17339 |
++ ret = readl_relaxed_poll_timeout_atomic(port->membase + ofs->isr, |
17340 |
++ isr, |
17341 |
++ (isr & USART_SR_TC), |
17342 |
++ 10, 100000); |
17343 |
++ |
17344 |
++ /* Send the TC error message only when ISR_TC is not set. */ |
17345 |
++ if (ret) |
17346 |
++ dev_err(port->dev, "Transmission is not complete\n"); |
17347 |
++ |
17348 |
+ /* Stop serial port and reset value */ |
17349 |
+ writel_relaxed(0, port->membase + ofs->cr1); |
17350 |
+ |
17351 |
+ /* flush RX & TX FIFO */ |
17352 |
+ if (ofs->rqr != UNDEF_REG) |
17353 |
+- stm32_set_bits(port, ofs->rqr, |
17354 |
+- USART_RQR_TXFRQ | USART_RQR_RXFRQ); |
17355 |
++ writel_relaxed(USART_RQR_TXFRQ | USART_RQR_RXFRQ, |
17356 |
++ port->membase + ofs->rqr); |
17357 |
+ |
17358 |
+ cr1 = USART_CR1_TE | USART_CR1_RE; |
17359 |
+ if (stm32_port->fifoen) |
17360 |
+ cr1 |= USART_CR1_FIFOEN; |
17361 |
+ cr2 = 0; |
17362 |
++ |
17363 |
++ /* Tx and RX FIFO configuration */ |
17364 |
+ cr3 = readl_relaxed(port->membase + ofs->cr3); |
17365 |
+- cr3 &= USART_CR3_TXFTIE | USART_CR3_RXFTCFG_MASK | USART_CR3_RXFTIE |
17366 |
+- | USART_CR3_TXFTCFG_MASK; |
17367 |
++ cr3 &= USART_CR3_TXFTIE | USART_CR3_RXFTIE; |
17368 |
++ if (stm32_port->fifoen) { |
17369 |
++ cr3 &= ~(USART_CR3_TXFTCFG_MASK | USART_CR3_RXFTCFG_MASK); |
17370 |
++ cr3 |= USART_CR3_TXFTCFG_HALF << USART_CR3_TXFTCFG_SHIFT; |
17371 |
++ cr3 |= USART_CR3_RXFTCFG_HALF << USART_CR3_RXFTCFG_SHIFT; |
17372 |
++ } |
17373 |
+ |
17374 |
+ if (cflag & CSTOPB) |
17375 |
+ cr2 |= USART_CR2_STOP_2B; |
17376 |
+ |
17377 |
+- bits = stm32_get_databits(termios); |
17378 |
++ bits = stm32_usart_get_databits(termios); |
17379 |
+ stm32_port->rdr_mask = (BIT(bits) - 1); |
17380 |
+ |
17381 |
+ if (cflag & PARENB) { |
17382 |
+@@ -813,12 +839,6 @@ static void stm32_set_termios(struct uart_port *port, struct ktermios *termios, |
17383 |
+ cr3 |= USART_CR3_CTSE | USART_CR3_RTSE; |
17384 |
+ } |
17385 |
+ |
17386 |
+- /* Handle modem control interrupts */ |
17387 |
+- if (UART_ENABLE_MS(port, termios->c_cflag)) |
17388 |
+- stm32_enable_ms(port); |
17389 |
+- else |
17390 |
+- stm32_disable_ms(port); |
17391 |
+- |
17392 |
+ usartdiv = DIV_ROUND_CLOSEST(port->uartclk, baud); |
17393 |
+ |
17394 |
+ /* |
17395 |
+@@ -830,11 +850,11 @@ static void stm32_set_termios(struct uart_port *port, struct ktermios *termios, |
17396 |
+ if (usartdiv < 16) { |
17397 |
+ oversampling = 8; |
17398 |
+ cr1 |= USART_CR1_OVER8; |
17399 |
+- stm32_set_bits(port, ofs->cr1, USART_CR1_OVER8); |
17400 |
++ stm32_usart_set_bits(port, ofs->cr1, USART_CR1_OVER8); |
17401 |
+ } else { |
17402 |
+ oversampling = 16; |
17403 |
+ cr1 &= ~USART_CR1_OVER8; |
17404 |
+- stm32_clr_bits(port, ofs->cr1, USART_CR1_OVER8); |
17405 |
++ stm32_usart_clr_bits(port, ofs->cr1, USART_CR1_OVER8); |
17406 |
+ } |
17407 |
+ |
17408 |
+ mantissa = (usartdiv / oversampling) << USART_BRR_DIV_M_SHIFT; |
17409 |
+@@ -871,9 +891,10 @@ static void stm32_set_termios(struct uart_port *port, struct ktermios *termios, |
17410 |
+ cr3 |= USART_CR3_DMAR; |
17411 |
+ |
17412 |
+ if (rs485conf->flags & SER_RS485_ENABLED) { |
17413 |
+- stm32_config_reg_rs485(&cr1, &cr3, |
17414 |
+- rs485conf->delay_rts_before_send, |
17415 |
+- rs485conf->delay_rts_after_send, baud); |
17416 |
++ stm32_usart_config_reg_rs485(&cr1, &cr3, |
17417 |
++ rs485conf->delay_rts_before_send, |
17418 |
++ rs485conf->delay_rts_after_send, |
17419 |
++ baud); |
17420 |
+ if (rs485conf->flags & SER_RS485_RTS_ON_SEND) { |
17421 |
+ cr3 &= ~USART_CR3_DEP; |
17422 |
+ rs485conf->flags &= ~SER_RS485_RTS_AFTER_SEND; |
17423 |
+@@ -887,48 +908,60 @@ static void stm32_set_termios(struct uart_port *port, struct ktermios *termios, |
17424 |
+ cr1 &= ~(USART_CR1_DEDT_MASK | USART_CR1_DEAT_MASK); |
17425 |
+ } |
17426 |
+ |
17427 |
++ /* Configure wake up from low power on start bit detection */ |
17428 |
++ if (stm32_port->wakeirq > 0) { |
17429 |
++ cr3 &= ~USART_CR3_WUS_MASK; |
17430 |
++ cr3 |= USART_CR3_WUS_START_BIT; |
17431 |
++ } |
17432 |
++ |
17433 |
+ writel_relaxed(cr3, port->membase + ofs->cr3); |
17434 |
+ writel_relaxed(cr2, port->membase + ofs->cr2); |
17435 |
+ writel_relaxed(cr1, port->membase + ofs->cr1); |
17436 |
+ |
17437 |
+- stm32_set_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit)); |
17438 |
++ stm32_usart_set_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit)); |
17439 |
+ spin_unlock_irqrestore(&port->lock, flags); |
17440 |
++ |
17441 |
++ /* Handle modem control interrupts */ |
17442 |
++ if (UART_ENABLE_MS(port, termios->c_cflag)) |
17443 |
++ stm32_usart_enable_ms(port); |
17444 |
++ else |
17445 |
++ stm32_usart_disable_ms(port); |
17446 |
+ } |
17447 |
+ |
17448 |
+-static const char *stm32_type(struct uart_port *port) |
17449 |
++static const char *stm32_usart_type(struct uart_port *port) |
17450 |
+ { |
17451 |
+ return (port->type == PORT_STM32) ? DRIVER_NAME : NULL; |
17452 |
+ } |
17453 |
+ |
17454 |
+-static void stm32_release_port(struct uart_port *port) |
17455 |
++static void stm32_usart_release_port(struct uart_port *port) |
17456 |
+ { |
17457 |
+ } |
17458 |
+ |
17459 |
+-static int stm32_request_port(struct uart_port *port) |
17460 |
++static int stm32_usart_request_port(struct uart_port *port) |
17461 |
+ { |
17462 |
+ return 0; |
17463 |
+ } |
17464 |
+ |
17465 |
+-static void stm32_config_port(struct uart_port *port, int flags) |
17466 |
++static void stm32_usart_config_port(struct uart_port *port, int flags) |
17467 |
+ { |
17468 |
+ if (flags & UART_CONFIG_TYPE) |
17469 |
+ port->type = PORT_STM32; |
17470 |
+ } |
17471 |
+ |
17472 |
+ static int |
17473 |
+-stm32_verify_port(struct uart_port *port, struct serial_struct *ser) |
17474 |
++stm32_usart_verify_port(struct uart_port *port, struct serial_struct *ser) |
17475 |
+ { |
17476 |
+ /* No user changeable parameters */ |
17477 |
+ return -EINVAL; |
17478 |
+ } |
17479 |
+ |
17480 |
+-static void stm32_pm(struct uart_port *port, unsigned int state, |
17481 |
+- unsigned int oldstate) |
17482 |
++static void stm32_usart_pm(struct uart_port *port, unsigned int state, |
17483 |
++ unsigned int oldstate) |
17484 |
+ { |
17485 |
+ struct stm32_port *stm32port = container_of(port, |
17486 |
+ struct stm32_port, port); |
17487 |
+- struct stm32_usart_offsets *ofs = &stm32port->info->ofs; |
17488 |
+- struct stm32_usart_config *cfg = &stm32port->info->cfg; |
17489 |
++ const struct stm32_usart_offsets *ofs = &stm32port->info->ofs; |
17490 |
++ const struct stm32_usart_config *cfg = &stm32port->info->cfg; |
17491 |
+ unsigned long flags = 0; |
17492 |
+ |
17493 |
+ switch (state) { |
17494 |
+@@ -937,7 +970,7 @@ static void stm32_pm(struct uart_port *port, unsigned int state, |
17495 |
+ break; |
17496 |
+ case UART_PM_STATE_OFF: |
17497 |
+ spin_lock_irqsave(&port->lock, flags); |
17498 |
+- stm32_clr_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit)); |
17499 |
++ stm32_usart_clr_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit)); |
17500 |
+ spin_unlock_irqrestore(&port->lock, flags); |
17501 |
+ pm_runtime_put_sync(port->dev); |
17502 |
+ break; |
17503 |
+@@ -945,49 +978,48 @@ static void stm32_pm(struct uart_port *port, unsigned int state, |
17504 |
+ } |
17505 |
+ |
17506 |
+ static const struct uart_ops stm32_uart_ops = { |
17507 |
+- .tx_empty = stm32_tx_empty, |
17508 |
+- .set_mctrl = stm32_set_mctrl, |
17509 |
+- .get_mctrl = stm32_get_mctrl, |
17510 |
+- .stop_tx = stm32_stop_tx, |
17511 |
+- .start_tx = stm32_start_tx, |
17512 |
+- .throttle = stm32_throttle, |
17513 |
+- .unthrottle = stm32_unthrottle, |
17514 |
+- .stop_rx = stm32_stop_rx, |
17515 |
+- .enable_ms = stm32_enable_ms, |
17516 |
+- .break_ctl = stm32_break_ctl, |
17517 |
+- .startup = stm32_startup, |
17518 |
+- .shutdown = stm32_shutdown, |
17519 |
+- .set_termios = stm32_set_termios, |
17520 |
+- .pm = stm32_pm, |
17521 |
+- .type = stm32_type, |
17522 |
+- .release_port = stm32_release_port, |
17523 |
+- .request_port = stm32_request_port, |
17524 |
+- .config_port = stm32_config_port, |
17525 |
+- .verify_port = stm32_verify_port, |
17526 |
++ .tx_empty = stm32_usart_tx_empty, |
17527 |
++ .set_mctrl = stm32_usart_set_mctrl, |
17528 |
++ .get_mctrl = stm32_usart_get_mctrl, |
17529 |
++ .stop_tx = stm32_usart_stop_tx, |
17530 |
++ .start_tx = stm32_usart_start_tx, |
17531 |
++ .throttle = stm32_usart_throttle, |
17532 |
++ .unthrottle = stm32_usart_unthrottle, |
17533 |
++ .stop_rx = stm32_usart_stop_rx, |
17534 |
++ .enable_ms = stm32_usart_enable_ms, |
17535 |
++ .break_ctl = stm32_usart_break_ctl, |
17536 |
++ .startup = stm32_usart_startup, |
17537 |
++ .shutdown = stm32_usart_shutdown, |
17538 |
++ .set_termios = stm32_usart_set_termios, |
17539 |
++ .pm = stm32_usart_pm, |
17540 |
++ .type = stm32_usart_type, |
17541 |
++ .release_port = stm32_usart_release_port, |
17542 |
++ .request_port = stm32_usart_request_port, |
17543 |
++ .config_port = stm32_usart_config_port, |
17544 |
++ .verify_port = stm32_usart_verify_port, |
17545 |
+ }; |
17546 |
+ |
17547 |
+-static int stm32_init_port(struct stm32_port *stm32port, |
17548 |
+- struct platform_device *pdev) |
17549 |
++static int stm32_usart_init_port(struct stm32_port *stm32port, |
17550 |
++ struct platform_device *pdev) |
17551 |
+ { |
17552 |
+ struct uart_port *port = &stm32port->port; |
17553 |
+ struct resource *res; |
17554 |
+ int ret; |
17555 |
+ |
17556 |
++ ret = platform_get_irq(pdev, 0); |
17557 |
++ if (ret <= 0) |
17558 |
++ return ret ? : -ENODEV; |
17559 |
++ |
17560 |
+ port->iotype = UPIO_MEM; |
17561 |
+ port->flags = UPF_BOOT_AUTOCONF; |
17562 |
+ port->ops = &stm32_uart_ops; |
17563 |
+ port->dev = &pdev->dev; |
17564 |
+ port->fifosize = stm32port->info->cfg.fifosize; |
17565 |
+ port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_STM32_CONSOLE); |
17566 |
+- |
17567 |
+- ret = platform_get_irq(pdev, 0); |
17568 |
+- if (ret <= 0) |
17569 |
+- return ret ? : -ENODEV; |
17570 |
+ port->irq = ret; |
17571 |
++ port->rs485_config = stm32_usart_config_rs485; |
17572 |
+ |
17573 |
+- port->rs485_config = stm32_config_rs485; |
17574 |
+- |
17575 |
+- ret = stm32_init_rs485(port, pdev); |
17576 |
++ ret = stm32_usart_init_rs485(port, pdev); |
17577 |
+ if (ret) |
17578 |
+ return ret; |
17579 |
+ |
17580 |
+@@ -1046,7 +1078,7 @@ err_clk: |
17581 |
+ return ret; |
17582 |
+ } |
17583 |
+ |
17584 |
+-static struct stm32_port *stm32_of_get_stm32_port(struct platform_device *pdev) |
17585 |
++static struct stm32_port *stm32_usart_of_get_port(struct platform_device *pdev) |
17586 |
+ { |
17587 |
+ struct device_node *np = pdev->dev.of_node; |
17588 |
+ int id; |
17589 |
+@@ -1084,10 +1116,10 @@ static const struct of_device_id stm32_match[] = { |
17590 |
+ MODULE_DEVICE_TABLE(of, stm32_match); |
17591 |
+ #endif |
17592 |
+ |
17593 |
+-static int stm32_of_dma_rx_probe(struct stm32_port *stm32port, |
17594 |
+- struct platform_device *pdev) |
17595 |
++static int stm32_usart_of_dma_rx_probe(struct stm32_port *stm32port, |
17596 |
++ struct platform_device *pdev) |
17597 |
+ { |
17598 |
+- struct stm32_usart_offsets *ofs = &stm32port->info->ofs; |
17599 |
++ const struct stm32_usart_offsets *ofs = &stm32port->info->ofs; |
17600 |
+ struct uart_port *port = &stm32port->port; |
17601 |
+ struct device *dev = &pdev->dev; |
17602 |
+ struct dma_slave_config config; |
17603 |
+@@ -1101,8 +1133,8 @@ static int stm32_of_dma_rx_probe(struct stm32_port *stm32port, |
17604 |
+ return -ENODEV; |
17605 |
+ } |
17606 |
+ stm32port->rx_buf = dma_alloc_coherent(&pdev->dev, RX_BUF_L, |
17607 |
+- &stm32port->rx_dma_buf, |
17608 |
+- GFP_KERNEL); |
17609 |
++ &stm32port->rx_dma_buf, |
17610 |
++ GFP_KERNEL); |
17611 |
+ if (!stm32port->rx_buf) { |
17612 |
+ ret = -ENOMEM; |
17613 |
+ goto alloc_err; |
17614 |
+@@ -1159,10 +1191,10 @@ alloc_err: |
17615 |
+ return ret; |
17616 |
+ } |
17617 |
+ |
17618 |
+-static int stm32_of_dma_tx_probe(struct stm32_port *stm32port, |
17619 |
+- struct platform_device *pdev) |
17620 |
++static int stm32_usart_of_dma_tx_probe(struct stm32_port *stm32port, |
17621 |
++ struct platform_device *pdev) |
17622 |
+ { |
17623 |
+- struct stm32_usart_offsets *ofs = &stm32port->info->ofs; |
17624 |
++ const struct stm32_usart_offsets *ofs = &stm32port->info->ofs; |
17625 |
+ struct uart_port *port = &stm32port->port; |
17626 |
+ struct device *dev = &pdev->dev; |
17627 |
+ struct dma_slave_config config; |
17628 |
+@@ -1177,8 +1209,8 @@ static int stm32_of_dma_tx_probe(struct stm32_port *stm32port, |
17629 |
+ return -ENODEV; |
17630 |
+ } |
17631 |
+ stm32port->tx_buf = dma_alloc_coherent(&pdev->dev, TX_BUF_L, |
17632 |
+- &stm32port->tx_dma_buf, |
17633 |
+- GFP_KERNEL); |
17634 |
++ &stm32port->tx_dma_buf, |
17635 |
++ GFP_KERNEL); |
17636 |
+ if (!stm32port->tx_buf) { |
17637 |
+ ret = -ENOMEM; |
17638 |
+ goto alloc_err; |
17639 |
+@@ -1210,23 +1242,20 @@ alloc_err: |
17640 |
+ return ret; |
17641 |
+ } |
17642 |
+ |
17643 |
+-static int stm32_serial_probe(struct platform_device *pdev) |
17644 |
++static int stm32_usart_serial_probe(struct platform_device *pdev) |
17645 |
+ { |
17646 |
+- const struct of_device_id *match; |
17647 |
+ struct stm32_port *stm32port; |
17648 |
+ int ret; |
17649 |
+ |
17650 |
+- stm32port = stm32_of_get_stm32_port(pdev); |
17651 |
++ stm32port = stm32_usart_of_get_port(pdev); |
17652 |
+ if (!stm32port) |
17653 |
+ return -ENODEV; |
17654 |
+ |
17655 |
+- match = of_match_device(stm32_match, &pdev->dev); |
17656 |
+- if (match && match->data) |
17657 |
+- stm32port->info = (struct stm32_usart_info *)match->data; |
17658 |
+- else |
17659 |
++ stm32port->info = of_device_get_match_data(&pdev->dev); |
17660 |
++ if (!stm32port->info) |
17661 |
+ return -EINVAL; |
17662 |
+ |
17663 |
+- ret = stm32_init_port(stm32port, pdev); |
17664 |
++ ret = stm32_usart_init_port(stm32port, pdev); |
17665 |
+ if (ret) |
17666 |
+ return ret; |
17667 |
+ |
17668 |
+@@ -1243,15 +1272,11 @@ static int stm32_serial_probe(struct platform_device *pdev) |
17669 |
+ device_set_wakeup_enable(&pdev->dev, false); |
17670 |
+ } |
17671 |
+ |
17672 |
+- ret = uart_add_one_port(&stm32_usart_driver, &stm32port->port); |
17673 |
+- if (ret) |
17674 |
+- goto err_wirq; |
17675 |
+- |
17676 |
+- ret = stm32_of_dma_rx_probe(stm32port, pdev); |
17677 |
++ ret = stm32_usart_of_dma_rx_probe(stm32port, pdev); |
17678 |
+ if (ret) |
17679 |
+ dev_info(&pdev->dev, "interrupt mode used for rx (no dma)\n"); |
17680 |
+ |
17681 |
+- ret = stm32_of_dma_tx_probe(stm32port, pdev); |
17682 |
++ ret = stm32_usart_of_dma_tx_probe(stm32port, pdev); |
17683 |
+ if (ret) |
17684 |
+ dev_info(&pdev->dev, "interrupt mode used for tx (no dma)\n"); |
17685 |
+ |
17686 |
+@@ -1260,11 +1285,40 @@ static int stm32_serial_probe(struct platform_device *pdev) |
17687 |
+ pm_runtime_get_noresume(&pdev->dev); |
17688 |
+ pm_runtime_set_active(&pdev->dev); |
17689 |
+ pm_runtime_enable(&pdev->dev); |
17690 |
++ |
17691 |
++ ret = uart_add_one_port(&stm32_usart_driver, &stm32port->port); |
17692 |
++ if (ret) |
17693 |
++ goto err_port; |
17694 |
++ |
17695 |
+ pm_runtime_put_sync(&pdev->dev); |
17696 |
+ |
17697 |
+ return 0; |
17698 |
+ |
17699 |
+-err_wirq: |
17700 |
++err_port: |
17701 |
++ pm_runtime_disable(&pdev->dev); |
17702 |
++ pm_runtime_set_suspended(&pdev->dev); |
17703 |
++ pm_runtime_put_noidle(&pdev->dev); |
17704 |
++ |
17705 |
++ if (stm32port->rx_ch) { |
17706 |
++ dmaengine_terminate_async(stm32port->rx_ch); |
17707 |
++ dma_release_channel(stm32port->rx_ch); |
17708 |
++ } |
17709 |
++ |
17710 |
++ if (stm32port->rx_dma_buf) |
17711 |
++ dma_free_coherent(&pdev->dev, |
17712 |
++ RX_BUF_L, stm32port->rx_buf, |
17713 |
++ stm32port->rx_dma_buf); |
17714 |
++ |
17715 |
++ if (stm32port->tx_ch) { |
17716 |
++ dmaengine_terminate_async(stm32port->tx_ch); |
17717 |
++ dma_release_channel(stm32port->tx_ch); |
17718 |
++ } |
17719 |
++ |
17720 |
++ if (stm32port->tx_dma_buf) |
17721 |
++ dma_free_coherent(&pdev->dev, |
17722 |
++ TX_BUF_L, stm32port->tx_buf, |
17723 |
++ stm32port->tx_dma_buf); |
17724 |
++ |
17725 |
+ if (stm32port->wakeirq > 0) |
17726 |
+ dev_pm_clear_wake_irq(&pdev->dev); |
17727 |
+ |
17728 |
+@@ -1278,29 +1332,40 @@ err_uninit: |
17729 |
+ return ret; |
17730 |
+ } |
17731 |
+ |
17732 |
+-static int stm32_serial_remove(struct platform_device *pdev) |
17733 |
++static int stm32_usart_serial_remove(struct platform_device *pdev) |
17734 |
+ { |
17735 |
+ struct uart_port *port = platform_get_drvdata(pdev); |
17736 |
+ struct stm32_port *stm32_port = to_stm32_port(port); |
17737 |
+- struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
17738 |
++ const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
17739 |
+ int err; |
17740 |
+ |
17741 |
+ pm_runtime_get_sync(&pdev->dev); |
17742 |
++ err = uart_remove_one_port(&stm32_usart_driver, port); |
17743 |
++ if (err) |
17744 |
++ return(err); |
17745 |
+ |
17746 |
+- stm32_clr_bits(port, ofs->cr3, USART_CR3_DMAR); |
17747 |
++ pm_runtime_disable(&pdev->dev); |
17748 |
++ pm_runtime_set_suspended(&pdev->dev); |
17749 |
++ pm_runtime_put_noidle(&pdev->dev); |
17750 |
+ |
17751 |
+- if (stm32_port->rx_ch) |
17752 |
++ stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_DMAR); |
17753 |
++ |
17754 |
++ if (stm32_port->rx_ch) { |
17755 |
++ dmaengine_terminate_async(stm32_port->rx_ch); |
17756 |
+ dma_release_channel(stm32_port->rx_ch); |
17757 |
++ } |
17758 |
+ |
17759 |
+ if (stm32_port->rx_dma_buf) |
17760 |
+ dma_free_coherent(&pdev->dev, |
17761 |
+ RX_BUF_L, stm32_port->rx_buf, |
17762 |
+ stm32_port->rx_dma_buf); |
17763 |
+ |
17764 |
+- stm32_clr_bits(port, ofs->cr3, USART_CR3_DMAT); |
17765 |
++ stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_DMAT); |
17766 |
+ |
17767 |
+- if (stm32_port->tx_ch) |
17768 |
++ if (stm32_port->tx_ch) { |
17769 |
++ dmaengine_terminate_async(stm32_port->tx_ch); |
17770 |
+ dma_release_channel(stm32_port->tx_ch); |
17771 |
++ } |
17772 |
+ |
17773 |
+ if (stm32_port->tx_dma_buf) |
17774 |
+ dma_free_coherent(&pdev->dev, |
17775 |
+@@ -1314,20 +1379,14 @@ static int stm32_serial_remove(struct platform_device *pdev) |
17776 |
+ |
17777 |
+ clk_disable_unprepare(stm32_port->clk); |
17778 |
+ |
17779 |
+- err = uart_remove_one_port(&stm32_usart_driver, port); |
17780 |
+- |
17781 |
+- pm_runtime_disable(&pdev->dev); |
17782 |
+- pm_runtime_put_noidle(&pdev->dev); |
17783 |
+- |
17784 |
+- return err; |
17785 |
++ return 0; |
17786 |
+ } |
17787 |
+ |
17788 |
+- |
17789 |
+ #ifdef CONFIG_SERIAL_STM32_CONSOLE |
17790 |
+-static void stm32_console_putchar(struct uart_port *port, int ch) |
17791 |
++static void stm32_usart_console_putchar(struct uart_port *port, int ch) |
17792 |
+ { |
17793 |
+ struct stm32_port *stm32_port = to_stm32_port(port); |
17794 |
+- struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
17795 |
++ const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
17796 |
+ |
17797 |
+ while (!(readl_relaxed(port->membase + ofs->isr) & USART_SR_TXE)) |
17798 |
+ cpu_relax(); |
17799 |
+@@ -1335,12 +1394,13 @@ static void stm32_console_putchar(struct uart_port *port, int ch) |
17800 |
+ writel_relaxed(ch, port->membase + ofs->tdr); |
17801 |
+ } |
17802 |
+ |
17803 |
+-static void stm32_console_write(struct console *co, const char *s, unsigned cnt) |
17804 |
++static void stm32_usart_console_write(struct console *co, const char *s, |
17805 |
++ unsigned int cnt) |
17806 |
+ { |
17807 |
+ struct uart_port *port = &stm32_ports[co->index].port; |
17808 |
+ struct stm32_port *stm32_port = to_stm32_port(port); |
17809 |
+- struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
17810 |
+- struct stm32_usart_config *cfg = &stm32_port->info->cfg; |
17811 |
++ const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
17812 |
++ const struct stm32_usart_config *cfg = &stm32_port->info->cfg; |
17813 |
+ unsigned long flags; |
17814 |
+ u32 old_cr1, new_cr1; |
17815 |
+ int locked = 1; |
17816 |
+@@ -1359,7 +1419,7 @@ static void stm32_console_write(struct console *co, const char *s, unsigned cnt) |
17817 |
+ new_cr1 |= USART_CR1_TE | BIT(cfg->uart_enable_bit); |
17818 |
+ writel_relaxed(new_cr1, port->membase + ofs->cr1); |
17819 |
+ |
17820 |
+- uart_console_write(port, s, cnt, stm32_console_putchar); |
17821 |
++ uart_console_write(port, s, cnt, stm32_usart_console_putchar); |
17822 |
+ |
17823 |
+ /* Restore interrupt state */ |
17824 |
+ writel_relaxed(old_cr1, port->membase + ofs->cr1); |
17825 |
+@@ -1369,7 +1429,7 @@ static void stm32_console_write(struct console *co, const char *s, unsigned cnt) |
17826 |
+ local_irq_restore(flags); |
17827 |
+ } |
17828 |
+ |
17829 |
+-static int stm32_console_setup(struct console *co, char *options) |
17830 |
++static int stm32_usart_console_setup(struct console *co, char *options) |
17831 |
+ { |
17832 |
+ struct stm32_port *stm32port; |
17833 |
+ int baud = 9600; |
17834 |
+@@ -1388,7 +1448,7 @@ static int stm32_console_setup(struct console *co, char *options) |
17835 |
+ * this to be called during the uart port registration when the |
17836 |
+ * driver gets probed and the port should be mapped at that point. |
17837 |
+ */ |
17838 |
+- if (stm32port->port.mapbase == 0 || stm32port->port.membase == NULL) |
17839 |
++ if (stm32port->port.mapbase == 0 || !stm32port->port.membase) |
17840 |
+ return -ENXIO; |
17841 |
+ |
17842 |
+ if (options) |
17843 |
+@@ -1400,8 +1460,8 @@ static int stm32_console_setup(struct console *co, char *options) |
17844 |
+ static struct console stm32_console = { |
17845 |
+ .name = STM32_SERIAL_NAME, |
17846 |
+ .device = uart_console_device, |
17847 |
+- .write = stm32_console_write, |
17848 |
+- .setup = stm32_console_setup, |
17849 |
++ .write = stm32_usart_console_write, |
17850 |
++ .setup = stm32_usart_console_setup, |
17851 |
+ .flags = CON_PRINTBUFFER, |
17852 |
+ .index = -1, |
17853 |
+ .data = &stm32_usart_driver, |
17854 |
+@@ -1422,41 +1482,38 @@ static struct uart_driver stm32_usart_driver = { |
17855 |
+ .cons = STM32_SERIAL_CONSOLE, |
17856 |
+ }; |
17857 |
+ |
17858 |
+-static void __maybe_unused stm32_serial_enable_wakeup(struct uart_port *port, |
17859 |
+- bool enable) |
17860 |
++static void __maybe_unused stm32_usart_serial_en_wakeup(struct uart_port *port, |
17861 |
++ bool enable) |
17862 |
+ { |
17863 |
+ struct stm32_port *stm32_port = to_stm32_port(port); |
17864 |
+- struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
17865 |
+- struct stm32_usart_config *cfg = &stm32_port->info->cfg; |
17866 |
+- u32 val; |
17867 |
++ const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
17868 |
+ |
17869 |
+ if (stm32_port->wakeirq <= 0) |
17870 |
+ return; |
17871 |
+ |
17872 |
++ /* |
17873 |
++ * Enable low-power wake-up and wake-up irq if argument is set to |
17874 |
++ * "enable", disable low-power wake-up and wake-up irq otherwise |
17875 |
++ */ |
17876 |
+ if (enable) { |
17877 |
+- stm32_clr_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit)); |
17878 |
+- stm32_set_bits(port, ofs->cr1, USART_CR1_UESM); |
17879 |
+- val = readl_relaxed(port->membase + ofs->cr3); |
17880 |
+- val &= ~USART_CR3_WUS_MASK; |
17881 |
+- /* Enable Wake up interrupt from low power on start bit */ |
17882 |
+- val |= USART_CR3_WUS_START_BIT | USART_CR3_WUFIE; |
17883 |
+- writel_relaxed(val, port->membase + ofs->cr3); |
17884 |
+- stm32_set_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit)); |
17885 |
++ stm32_usart_set_bits(port, ofs->cr1, USART_CR1_UESM); |
17886 |
++ stm32_usart_set_bits(port, ofs->cr3, USART_CR3_WUFIE); |
17887 |
+ } else { |
17888 |
+- stm32_clr_bits(port, ofs->cr1, USART_CR1_UESM); |
17889 |
++ stm32_usart_clr_bits(port, ofs->cr1, USART_CR1_UESM); |
17890 |
++ stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_WUFIE); |
17891 |
+ } |
17892 |
+ } |
17893 |
+ |
17894 |
+-static int __maybe_unused stm32_serial_suspend(struct device *dev) |
17895 |
++static int __maybe_unused stm32_usart_serial_suspend(struct device *dev) |
17896 |
+ { |
17897 |
+ struct uart_port *port = dev_get_drvdata(dev); |
17898 |
+ |
17899 |
+ uart_suspend_port(&stm32_usart_driver, port); |
17900 |
+ |
17901 |
+ if (device_may_wakeup(dev)) |
17902 |
+- stm32_serial_enable_wakeup(port, true); |
17903 |
++ stm32_usart_serial_en_wakeup(port, true); |
17904 |
+ else |
17905 |
+- stm32_serial_enable_wakeup(port, false); |
17906 |
++ stm32_usart_serial_en_wakeup(port, false); |
17907 |
+ |
17908 |
+ /* |
17909 |
+ * When "no_console_suspend" is enabled, keep the pinctrl default state |
17910 |
+@@ -1474,19 +1531,19 @@ static int __maybe_unused stm32_serial_suspend(struct device *dev) |
17911 |
+ return 0; |
17912 |
+ } |
17913 |
+ |
17914 |
+-static int __maybe_unused stm32_serial_resume(struct device *dev) |
17915 |
++static int __maybe_unused stm32_usart_serial_resume(struct device *dev) |
17916 |
+ { |
17917 |
+ struct uart_port *port = dev_get_drvdata(dev); |
17918 |
+ |
17919 |
+ pinctrl_pm_select_default_state(dev); |
17920 |
+ |
17921 |
+ if (device_may_wakeup(dev)) |
17922 |
+- stm32_serial_enable_wakeup(port, false); |
17923 |
++ stm32_usart_serial_en_wakeup(port, false); |
17924 |
+ |
17925 |
+ return uart_resume_port(&stm32_usart_driver, port); |
17926 |
+ } |
17927 |
+ |
17928 |
+-static int __maybe_unused stm32_serial_runtime_suspend(struct device *dev) |
17929 |
++static int __maybe_unused stm32_usart_runtime_suspend(struct device *dev) |
17930 |
+ { |
17931 |
+ struct uart_port *port = dev_get_drvdata(dev); |
17932 |
+ struct stm32_port *stm32port = container_of(port, |
17933 |
+@@ -1497,7 +1554,7 @@ static int __maybe_unused stm32_serial_runtime_suspend(struct device *dev) |
17934 |
+ return 0; |
17935 |
+ } |
17936 |
+ |
17937 |
+-static int __maybe_unused stm32_serial_runtime_resume(struct device *dev) |
17938 |
++static int __maybe_unused stm32_usart_runtime_resume(struct device *dev) |
17939 |
+ { |
17940 |
+ struct uart_port *port = dev_get_drvdata(dev); |
17941 |
+ struct stm32_port *stm32port = container_of(port, |
17942 |
+@@ -1507,14 +1564,15 @@ static int __maybe_unused stm32_serial_runtime_resume(struct device *dev) |
17943 |
+ } |
17944 |
+ |
17945 |
+ static const struct dev_pm_ops stm32_serial_pm_ops = { |
17946 |
+- SET_RUNTIME_PM_OPS(stm32_serial_runtime_suspend, |
17947 |
+- stm32_serial_runtime_resume, NULL) |
17948 |
+- SET_SYSTEM_SLEEP_PM_OPS(stm32_serial_suspend, stm32_serial_resume) |
17949 |
++ SET_RUNTIME_PM_OPS(stm32_usart_runtime_suspend, |
17950 |
++ stm32_usart_runtime_resume, NULL) |
17951 |
++ SET_SYSTEM_SLEEP_PM_OPS(stm32_usart_serial_suspend, |
17952 |
++ stm32_usart_serial_resume) |
17953 |
+ }; |
17954 |
+ |
17955 |
+ static struct platform_driver stm32_serial_driver = { |
17956 |
+- .probe = stm32_serial_probe, |
17957 |
+- .remove = stm32_serial_remove, |
17958 |
++ .probe = stm32_usart_serial_probe, |
17959 |
++ .remove = stm32_usart_serial_remove, |
17960 |
+ .driver = { |
17961 |
+ .name = DRIVER_NAME, |
17962 |
+ .pm = &stm32_serial_pm_ops, |
17963 |
+@@ -1522,7 +1580,7 @@ static struct platform_driver stm32_serial_driver = { |
17964 |
+ }, |
17965 |
+ }; |
17966 |
+ |
17967 |
+-static int __init usart_init(void) |
17968 |
++static int __init stm32_usart_init(void) |
17969 |
+ { |
17970 |
+ static char banner[] __initdata = "STM32 USART driver initialized"; |
17971 |
+ int ret; |
17972 |
+@@ -1540,14 +1598,14 @@ static int __init usart_init(void) |
17973 |
+ return ret; |
17974 |
+ } |
17975 |
+ |
17976 |
+-static void __exit usart_exit(void) |
17977 |
++static void __exit stm32_usart_exit(void) |
17978 |
+ { |
17979 |
+ platform_driver_unregister(&stm32_serial_driver); |
17980 |
+ uart_unregister_driver(&stm32_usart_driver); |
17981 |
+ } |
17982 |
+ |
17983 |
+-module_init(usart_init); |
17984 |
+-module_exit(usart_exit); |
17985 |
++module_init(stm32_usart_init); |
17986 |
++module_exit(stm32_usart_exit); |
17987 |
+ |
17988 |
+ MODULE_ALIAS("platform:" DRIVER_NAME); |
17989 |
+ MODULE_DESCRIPTION("STMicroelectronics STM32 serial port driver"); |
17990 |
+diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h |
17991 |
+index d4c916e78d403..94b568aa46bbd 100644 |
17992 |
+--- a/drivers/tty/serial/stm32-usart.h |
17993 |
++++ b/drivers/tty/serial/stm32-usart.h |
17994 |
+@@ -127,9 +127,6 @@ struct stm32_usart_info stm32h7_info = { |
17995 |
+ /* Dummy bits */ |
17996 |
+ #define USART_SR_DUMMY_RX BIT(16) |
17997 |
+ |
17998 |
+-/* USART_ICR (F7) */ |
17999 |
+-#define USART_CR_TC BIT(6) |
18000 |
+- |
18001 |
+ /* USART_DR */ |
18002 |
+ #define USART_DR_MASK GENMASK(8, 0) |
18003 |
+ |
18004 |
+@@ -259,7 +256,7 @@ struct stm32_usart_info stm32h7_info = { |
18005 |
+ struct stm32_port { |
18006 |
+ struct uart_port port; |
18007 |
+ struct clk *clk; |
18008 |
+- struct stm32_usart_info *info; |
18009 |
++ const struct stm32_usart_info *info; |
18010 |
+ struct dma_chan *rx_ch; /* dma rx channel */ |
18011 |
+ dma_addr_t rx_dma_buf; /* dma rx buffer bus address */ |
18012 |
+ unsigned char *rx_buf; /* dma rx buffer cpu address */ |
18013 |
+diff --git a/drivers/tty/tty_io.c b/drivers/tty/tty_io.c |
18014 |
+index 5fd87941ac712..51bc4e5a4020f 100644 |
18015 |
+--- a/drivers/tty/tty_io.c |
18016 |
++++ b/drivers/tty/tty_io.c |
18017 |
+@@ -2494,14 +2494,14 @@ out: |
18018 |
+ * @p: pointer to result |
18019 |
+ * |
18020 |
+ * Obtain the modem status bits from the tty driver if the feature |
18021 |
+- * is supported. Return -EINVAL if it is not available. |
18022 |
++ * is supported. Return -ENOTTY if it is not available. |
18023 |
+ * |
18024 |
+ * Locking: none (up to the driver) |
18025 |
+ */ |
18026 |
+ |
18027 |
+ static int tty_tiocmget(struct tty_struct *tty, int __user *p) |
18028 |
+ { |
18029 |
+- int retval = -EINVAL; |
18030 |
++ int retval = -ENOTTY; |
18031 |
+ |
18032 |
+ if (tty->ops->tiocmget) { |
18033 |
+ retval = tty->ops->tiocmget(tty); |
18034 |
+@@ -2519,7 +2519,7 @@ static int tty_tiocmget(struct tty_struct *tty, int __user *p) |
18035 |
+ * @p: pointer to desired bits |
18036 |
+ * |
18037 |
+ * Set the modem status bits from the tty driver if the feature |
18038 |
+- * is supported. Return -EINVAL if it is not available. |
18039 |
++ * is supported. Return -ENOTTY if it is not available. |
18040 |
+ * |
18041 |
+ * Locking: none (up to the driver) |
18042 |
+ */ |
18043 |
+@@ -2531,7 +2531,7 @@ static int tty_tiocmset(struct tty_struct *tty, unsigned int cmd, |
18044 |
+ unsigned int set, clear, val; |
18045 |
+ |
18046 |
+ if (tty->ops->tiocmset == NULL) |
18047 |
+- return -EINVAL; |
18048 |
++ return -ENOTTY; |
18049 |
+ |
18050 |
+ retval = get_user(val, p); |
18051 |
+ if (retval) |
18052 |
+diff --git a/drivers/tty/tty_ioctl.c b/drivers/tty/tty_ioctl.c |
18053 |
+index 4de1c6ddb8ffb..803da2d111c8c 100644 |
18054 |
+--- a/drivers/tty/tty_ioctl.c |
18055 |
++++ b/drivers/tty/tty_ioctl.c |
18056 |
+@@ -774,8 +774,8 @@ int tty_mode_ioctl(struct tty_struct *tty, struct file *file, |
18057 |
+ case TCSETX: |
18058 |
+ case TCSETXW: |
18059 |
+ case TCSETXF: |
18060 |
+- return -EINVAL; |
18061 |
+-#endif |
18062 |
++ return -ENOTTY; |
18063 |
++#endif |
18064 |
+ case TIOCGSOFTCAR: |
18065 |
+ copy_termios(real_tty, &kterm); |
18066 |
+ ret = put_user((kterm.c_cflag & CLOCAL) ? 1 : 0, |
18067 |
+diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c |
18068 |
+index bc035ba6e0105..6fbabf56dbb76 100644 |
18069 |
+--- a/drivers/usb/class/cdc-acm.c |
18070 |
++++ b/drivers/usb/class/cdc-acm.c |
18071 |
+@@ -929,8 +929,7 @@ static int get_serial_info(struct tty_struct *tty, struct serial_struct *ss) |
18072 |
+ { |
18073 |
+ struct acm *acm = tty->driver_data; |
18074 |
+ |
18075 |
+- ss->xmit_fifo_size = acm->writesize; |
18076 |
+- ss->baud_base = le32_to_cpu(acm->line.dwDTERate); |
18077 |
++ ss->line = acm->minor; |
18078 |
+ ss->close_delay = jiffies_to_msecs(acm->port.close_delay) / 10; |
18079 |
+ ss->closing_wait = acm->port.closing_wait == ASYNC_CLOSING_WAIT_NONE ? |
18080 |
+ ASYNC_CLOSING_WAIT_NONE : |
18081 |
+@@ -942,7 +941,6 @@ static int set_serial_info(struct tty_struct *tty, struct serial_struct *ss) |
18082 |
+ { |
18083 |
+ struct acm *acm = tty->driver_data; |
18084 |
+ unsigned int closing_wait, close_delay; |
18085 |
+- unsigned int old_closing_wait, old_close_delay; |
18086 |
+ int retval = 0; |
18087 |
+ |
18088 |
+ close_delay = msecs_to_jiffies(ss->close_delay * 10); |
18089 |
+@@ -950,20 +948,12 @@ static int set_serial_info(struct tty_struct *tty, struct serial_struct *ss) |
18090 |
+ ASYNC_CLOSING_WAIT_NONE : |
18091 |
+ msecs_to_jiffies(ss->closing_wait * 10); |
18092 |
+ |
18093 |
+- /* we must redo the rounding here, so that the values match */ |
18094 |
+- old_close_delay = jiffies_to_msecs(acm->port.close_delay) / 10; |
18095 |
+- old_closing_wait = acm->port.closing_wait == ASYNC_CLOSING_WAIT_NONE ? |
18096 |
+- ASYNC_CLOSING_WAIT_NONE : |
18097 |
+- jiffies_to_msecs(acm->port.closing_wait) / 10; |
18098 |
+- |
18099 |
+ mutex_lock(&acm->port.mutex); |
18100 |
+ |
18101 |
+ if (!capable(CAP_SYS_ADMIN)) { |
18102 |
+- if ((ss->close_delay != old_close_delay) || |
18103 |
+- (ss->closing_wait != old_closing_wait)) |
18104 |
++ if ((close_delay != acm->port.close_delay) || |
18105 |
++ (closing_wait != acm->port.closing_wait)) |
18106 |
+ retval = -EPERM; |
18107 |
+- else |
18108 |
+- retval = -EOPNOTSUPP; |
18109 |
+ } else { |
18110 |
+ acm->port.close_delay = close_delay; |
18111 |
+ acm->port.closing_wait = closing_wait; |
18112 |
+diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c |
18113 |
+index 800c8b6c55ff1..510fd0572feb1 100644 |
18114 |
+--- a/drivers/usb/dwc2/core_intr.c |
18115 |
++++ b/drivers/usb/dwc2/core_intr.c |
18116 |
+@@ -660,6 +660,71 @@ static u32 dwc2_read_common_intr(struct dwc2_hsotg *hsotg) |
18117 |
+ return 0; |
18118 |
+ } |
18119 |
+ |
18120 |
++/** |
18121 |
++ * dwc_handle_gpwrdn_disc_det() - Handles the gpwrdn disconnect detect. |
18122 |
++ * Exits hibernation without restoring registers. |
18123 |
++ * |
18124 |
++ * @hsotg: Programming view of DWC_otg controller |
18125 |
++ * @gpwrdn: GPWRDN register |
18126 |
++ */ |
18127 |
++static inline void dwc_handle_gpwrdn_disc_det(struct dwc2_hsotg *hsotg, |
18128 |
++ u32 gpwrdn) |
18129 |
++{ |
18130 |
++ u32 gpwrdn_tmp; |
18131 |
++ |
18132 |
++ /* Switch-on voltage to the core */ |
18133 |
++ gpwrdn_tmp = dwc2_readl(hsotg, GPWRDN); |
18134 |
++ gpwrdn_tmp &= ~GPWRDN_PWRDNSWTCH; |
18135 |
++ dwc2_writel(hsotg, gpwrdn_tmp, GPWRDN); |
18136 |
++ udelay(5); |
18137 |
++ |
18138 |
++ /* Reset core */ |
18139 |
++ gpwrdn_tmp = dwc2_readl(hsotg, GPWRDN); |
18140 |
++ gpwrdn_tmp &= ~GPWRDN_PWRDNRSTN; |
18141 |
++ dwc2_writel(hsotg, gpwrdn_tmp, GPWRDN); |
18142 |
++ udelay(5); |
18143 |
++ |
18144 |
++ /* Disable Power Down Clamp */ |
18145 |
++ gpwrdn_tmp = dwc2_readl(hsotg, GPWRDN); |
18146 |
++ gpwrdn_tmp &= ~GPWRDN_PWRDNCLMP; |
18147 |
++ dwc2_writel(hsotg, gpwrdn_tmp, GPWRDN); |
18148 |
++ udelay(5); |
18149 |
++ |
18150 |
++ /* Deassert reset core */ |
18151 |
++ gpwrdn_tmp = dwc2_readl(hsotg, GPWRDN); |
18152 |
++ gpwrdn_tmp |= GPWRDN_PWRDNRSTN; |
18153 |
++ dwc2_writel(hsotg, gpwrdn_tmp, GPWRDN); |
18154 |
++ udelay(5); |
18155 |
++ |
18156 |
++ /* Disable PMU interrupt */ |
18157 |
++ gpwrdn_tmp = dwc2_readl(hsotg, GPWRDN); |
18158 |
++ gpwrdn_tmp &= ~GPWRDN_PMUINTSEL; |
18159 |
++ dwc2_writel(hsotg, gpwrdn_tmp, GPWRDN); |
18160 |
++ |
18161 |
++ /* De-assert Wakeup Logic */ |
18162 |
++ gpwrdn_tmp = dwc2_readl(hsotg, GPWRDN); |
18163 |
++ gpwrdn_tmp &= ~GPWRDN_PMUACTV; |
18164 |
++ dwc2_writel(hsotg, gpwrdn_tmp, GPWRDN); |
18165 |
++ |
18166 |
++ hsotg->hibernated = 0; |
18167 |
++ hsotg->bus_suspended = 0; |
18168 |
++ |
18169 |
++ if (gpwrdn & GPWRDN_IDSTS) { |
18170 |
++ hsotg->op_state = OTG_STATE_B_PERIPHERAL; |
18171 |
++ dwc2_core_init(hsotg, false); |
18172 |
++ dwc2_enable_global_interrupts(hsotg); |
18173 |
++ dwc2_hsotg_core_init_disconnected(hsotg, false); |
18174 |
++ dwc2_hsotg_core_connect(hsotg); |
18175 |
++ } else { |
18176 |
++ hsotg->op_state = OTG_STATE_A_HOST; |
18177 |
++ |
18178 |
++ /* Initialize the Core for Host mode */ |
18179 |
++ dwc2_core_init(hsotg, false); |
18180 |
++ dwc2_enable_global_interrupts(hsotg); |
18181 |
++ dwc2_hcd_start(hsotg); |
18182 |
++ } |
18183 |
++} |
18184 |
++ |
18185 |
+ /* |
18186 |
+ * GPWRDN interrupt handler. |
18187 |
+ * |
18188 |
+@@ -681,64 +746,14 @@ static void dwc2_handle_gpwrdn_intr(struct dwc2_hsotg *hsotg) |
18189 |
+ |
18190 |
+ if ((gpwrdn & GPWRDN_DISCONN_DET) && |
18191 |
+ (gpwrdn & GPWRDN_DISCONN_DET_MSK) && !linestate) { |
18192 |
+- u32 gpwrdn_tmp; |
18193 |
+- |
18194 |
+ dev_dbg(hsotg->dev, "%s: GPWRDN_DISCONN_DET\n", __func__); |
18195 |
+- |
18196 |
+- /* Switch-on voltage to the core */ |
18197 |
+- gpwrdn_tmp = dwc2_readl(hsotg, GPWRDN); |
18198 |
+- gpwrdn_tmp &= ~GPWRDN_PWRDNSWTCH; |
18199 |
+- dwc2_writel(hsotg, gpwrdn_tmp, GPWRDN); |
18200 |
+- udelay(10); |
18201 |
+- |
18202 |
+- /* Reset core */ |
18203 |
+- gpwrdn_tmp = dwc2_readl(hsotg, GPWRDN); |
18204 |
+- gpwrdn_tmp &= ~GPWRDN_PWRDNRSTN; |
18205 |
+- dwc2_writel(hsotg, gpwrdn_tmp, GPWRDN); |
18206 |
+- udelay(10); |
18207 |
+- |
18208 |
+- /* Disable Power Down Clamp */ |
18209 |
+- gpwrdn_tmp = dwc2_readl(hsotg, GPWRDN); |
18210 |
+- gpwrdn_tmp &= ~GPWRDN_PWRDNCLMP; |
18211 |
+- dwc2_writel(hsotg, gpwrdn_tmp, GPWRDN); |
18212 |
+- udelay(10); |
18213 |
+- |
18214 |
+- /* Deassert reset core */ |
18215 |
+- gpwrdn_tmp = dwc2_readl(hsotg, GPWRDN); |
18216 |
+- gpwrdn_tmp |= GPWRDN_PWRDNRSTN; |
18217 |
+- dwc2_writel(hsotg, gpwrdn_tmp, GPWRDN); |
18218 |
+- udelay(10); |
18219 |
+- |
18220 |
+- /* Disable PMU interrupt */ |
18221 |
+- gpwrdn_tmp = dwc2_readl(hsotg, GPWRDN); |
18222 |
+- gpwrdn_tmp &= ~GPWRDN_PMUINTSEL; |
18223 |
+- dwc2_writel(hsotg, gpwrdn_tmp, GPWRDN); |
18224 |
+- |
18225 |
+- /* De-assert Wakeup Logic */ |
18226 |
+- gpwrdn_tmp = dwc2_readl(hsotg, GPWRDN); |
18227 |
+- gpwrdn_tmp &= ~GPWRDN_PMUACTV; |
18228 |
+- dwc2_writel(hsotg, gpwrdn_tmp, GPWRDN); |
18229 |
+- |
18230 |
+- hsotg->hibernated = 0; |
18231 |
+- |
18232 |
+- if (gpwrdn & GPWRDN_IDSTS) { |
18233 |
+- hsotg->op_state = OTG_STATE_B_PERIPHERAL; |
18234 |
+- dwc2_core_init(hsotg, false); |
18235 |
+- dwc2_enable_global_interrupts(hsotg); |
18236 |
+- dwc2_hsotg_core_init_disconnected(hsotg, false); |
18237 |
+- dwc2_hsotg_core_connect(hsotg); |
18238 |
+- } else { |
18239 |
+- hsotg->op_state = OTG_STATE_A_HOST; |
18240 |
+- |
18241 |
+- /* Initialize the Core for Host mode */ |
18242 |
+- dwc2_core_init(hsotg, false); |
18243 |
+- dwc2_enable_global_interrupts(hsotg); |
18244 |
+- dwc2_hcd_start(hsotg); |
18245 |
+- } |
18246 |
+- } |
18247 |
+- |
18248 |
+- if ((gpwrdn & GPWRDN_LNSTSCHG) && |
18249 |
+- (gpwrdn & GPWRDN_LNSTSCHG_MSK) && linestate) { |
18250 |
++ /* |
18251 |
++ * Call disconnect detect function to exit from |
18252 |
++ * hibernation |
18253 |
++ */ |
18254 |
++ dwc_handle_gpwrdn_disc_det(hsotg, gpwrdn); |
18255 |
++ } else if ((gpwrdn & GPWRDN_LNSTSCHG) && |
18256 |
++ (gpwrdn & GPWRDN_LNSTSCHG_MSK) && linestate) { |
18257 |
+ dev_dbg(hsotg->dev, "%s: GPWRDN_LNSTSCHG\n", __func__); |
18258 |
+ if (hsotg->hw_params.hibernation && |
18259 |
+ hsotg->hibernated) { |
18260 |
+@@ -749,24 +764,21 @@ static void dwc2_handle_gpwrdn_intr(struct dwc2_hsotg *hsotg) |
18261 |
+ dwc2_exit_hibernation(hsotg, 1, 0, 1); |
18262 |
+ } |
18263 |
+ } |
18264 |
+- } |
18265 |
+- if ((gpwrdn & GPWRDN_RST_DET) && (gpwrdn & GPWRDN_RST_DET_MSK)) { |
18266 |
++ } else if ((gpwrdn & GPWRDN_RST_DET) && |
18267 |
++ (gpwrdn & GPWRDN_RST_DET_MSK)) { |
18268 |
+ dev_dbg(hsotg->dev, "%s: GPWRDN_RST_DET\n", __func__); |
18269 |
+ if (!linestate && (gpwrdn & GPWRDN_BSESSVLD)) |
18270 |
+ dwc2_exit_hibernation(hsotg, 0, 1, 0); |
18271 |
+- } |
18272 |
+- if ((gpwrdn & GPWRDN_STS_CHGINT) && |
18273 |
+- (gpwrdn & GPWRDN_STS_CHGINT_MSK) && linestate) { |
18274 |
++ } else if ((gpwrdn & GPWRDN_STS_CHGINT) && |
18275 |
++ (gpwrdn & GPWRDN_STS_CHGINT_MSK)) { |
18276 |
+ dev_dbg(hsotg->dev, "%s: GPWRDN_STS_CHGINT\n", __func__); |
18277 |
+- if (hsotg->hw_params.hibernation && |
18278 |
+- hsotg->hibernated) { |
18279 |
+- if (gpwrdn & GPWRDN_IDSTS) { |
18280 |
+- dwc2_exit_hibernation(hsotg, 0, 0, 0); |
18281 |
+- call_gadget(hsotg, resume); |
18282 |
+- } else { |
18283 |
+- dwc2_exit_hibernation(hsotg, 1, 0, 1); |
18284 |
+- } |
18285 |
+- } |
18286 |
++ /* |
18287 |
++ * As GPWRDN_STS_CHGINT exit from hibernation flow is |
18288 |
++ * the same as in GPWRDN_DISCONN_DET flow. Call |
18289 |
++ * disconnect detect helper function to exit from |
18290 |
++ * hibernation. |
18291 |
++ */ |
18292 |
++ dwc_handle_gpwrdn_disc_det(hsotg, gpwrdn); |
18293 |
+ } |
18294 |
+ } |
18295 |
+ |
18296 |
+diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c |
18297 |
+index 1a9789ec5847f..6af1dcbc36564 100644 |
18298 |
+--- a/drivers/usb/dwc2/hcd.c |
18299 |
++++ b/drivers/usb/dwc2/hcd.c |
18300 |
+@@ -5580,7 +5580,15 @@ int dwc2_host_exit_hibernation(struct dwc2_hsotg *hsotg, int rem_wakeup, |
18301 |
+ return ret; |
18302 |
+ } |
18303 |
+ |
18304 |
+- dwc2_hcd_rem_wakeup(hsotg); |
18305 |
++ if (rem_wakeup) { |
18306 |
++ dwc2_hcd_rem_wakeup(hsotg); |
18307 |
++ /* |
18308 |
++ * Change "port_connect_status_change" flag to re-enumerate, |
18309 |
++ * because after exit from hibernation port connection status |
18310 |
++ * is not detected. |
18311 |
++ */ |
18312 |
++ hsotg->flags.b.port_connect_status_change = 1; |
18313 |
++ } |
18314 |
+ |
18315 |
+ hsotg->hibernated = 0; |
18316 |
+ hsotg->bus_suspended = 0; |
18317 |
+diff --git a/drivers/usb/gadget/udc/aspeed-vhub/core.c b/drivers/usb/gadget/udc/aspeed-vhub/core.c |
18318 |
+index be7bb64e3594d..d11d3d14313f9 100644 |
18319 |
+--- a/drivers/usb/gadget/udc/aspeed-vhub/core.c |
18320 |
++++ b/drivers/usb/gadget/udc/aspeed-vhub/core.c |
18321 |
+@@ -36,6 +36,7 @@ void ast_vhub_done(struct ast_vhub_ep *ep, struct ast_vhub_req *req, |
18322 |
+ int status) |
18323 |
+ { |
18324 |
+ bool internal = req->internal; |
18325 |
++ struct ast_vhub *vhub = ep->vhub; |
18326 |
+ |
18327 |
+ EPVDBG(ep, "completing request @%p, status %d\n", req, status); |
18328 |
+ |
18329 |
+@@ -46,7 +47,7 @@ void ast_vhub_done(struct ast_vhub_ep *ep, struct ast_vhub_req *req, |
18330 |
+ |
18331 |
+ if (req->req.dma) { |
18332 |
+ if (!WARN_ON(!ep->dev)) |
18333 |
+- usb_gadget_unmap_request(&ep->dev->gadget, |
18334 |
++ usb_gadget_unmap_request_by_dev(&vhub->pdev->dev, |
18335 |
+ &req->req, ep->epn.is_in); |
18336 |
+ req->req.dma = 0; |
18337 |
+ } |
18338 |
+diff --git a/drivers/usb/gadget/udc/aspeed-vhub/epn.c b/drivers/usb/gadget/udc/aspeed-vhub/epn.c |
18339 |
+index 02d8bfae58fb1..cb164c615e6fc 100644 |
18340 |
+--- a/drivers/usb/gadget/udc/aspeed-vhub/epn.c |
18341 |
++++ b/drivers/usb/gadget/udc/aspeed-vhub/epn.c |
18342 |
+@@ -376,7 +376,7 @@ static int ast_vhub_epn_queue(struct usb_ep* u_ep, struct usb_request *u_req, |
18343 |
+ if (ep->epn.desc_mode || |
18344 |
+ ((((unsigned long)u_req->buf & 7) == 0) && |
18345 |
+ (ep->epn.is_in || !(u_req->length & (u_ep->maxpacket - 1))))) { |
18346 |
+- rc = usb_gadget_map_request(&ep->dev->gadget, u_req, |
18347 |
++ rc = usb_gadget_map_request_by_dev(&vhub->pdev->dev, u_req, |
18348 |
+ ep->epn.is_in); |
18349 |
+ if (rc) { |
18350 |
+ dev_warn(&vhub->pdev->dev, |
18351 |
+diff --git a/drivers/usb/gadget/udc/fotg210-udc.c b/drivers/usb/gadget/udc/fotg210-udc.c |
18352 |
+index d6ca50f019853..75bf446f4a666 100644 |
18353 |
+--- a/drivers/usb/gadget/udc/fotg210-udc.c |
18354 |
++++ b/drivers/usb/gadget/udc/fotg210-udc.c |
18355 |
+@@ -338,15 +338,16 @@ static void fotg210_start_dma(struct fotg210_ep *ep, |
18356 |
+ } else { |
18357 |
+ buffer = req->req.buf + req->req.actual; |
18358 |
+ length = ioread32(ep->fotg210->reg + |
18359 |
+- FOTG210_FIBCR(ep->epnum - 1)); |
18360 |
+- length &= FIBCR_BCFX; |
18361 |
++ FOTG210_FIBCR(ep->epnum - 1)) & FIBCR_BCFX; |
18362 |
++ if (length > req->req.length - req->req.actual) |
18363 |
++ length = req->req.length - req->req.actual; |
18364 |
+ } |
18365 |
+ } else { |
18366 |
+ buffer = req->req.buf + req->req.actual; |
18367 |
+ if (req->req.length - req->req.actual > ep->ep.maxpacket) |
18368 |
+ length = ep->ep.maxpacket; |
18369 |
+ else |
18370 |
+- length = req->req.length; |
18371 |
++ length = req->req.length - req->req.actual; |
18372 |
+ } |
18373 |
+ |
18374 |
+ d = dma_map_single(dev, buffer, length, |
18375 |
+@@ -379,8 +380,7 @@ static void fotg210_ep0_queue(struct fotg210_ep *ep, |
18376 |
+ } |
18377 |
+ if (ep->dir_in) { /* if IN */ |
18378 |
+ fotg210_start_dma(ep, req); |
18379 |
+- if ((req->req.length == req->req.actual) || |
18380 |
+- (req->req.actual < ep->ep.maxpacket)) |
18381 |
++ if (req->req.length == req->req.actual) |
18382 |
+ fotg210_done(ep, req, 0); |
18383 |
+ } else { /* OUT */ |
18384 |
+ u32 value = ioread32(ep->fotg210->reg + FOTG210_DMISGR0); |
18385 |
+@@ -820,7 +820,7 @@ static void fotg210_ep0in(struct fotg210_udc *fotg210) |
18386 |
+ if (req->req.length) |
18387 |
+ fotg210_start_dma(ep, req); |
18388 |
+ |
18389 |
+- if ((req->req.length - req->req.actual) < ep->ep.maxpacket) |
18390 |
++ if (req->req.actual == req->req.length) |
18391 |
+ fotg210_done(ep, req, 0); |
18392 |
+ } else { |
18393 |
+ fotg210_set_cxdone(fotg210); |
18394 |
+@@ -849,12 +849,16 @@ static void fotg210_out_fifo_handler(struct fotg210_ep *ep) |
18395 |
+ { |
18396 |
+ struct fotg210_request *req = list_entry(ep->queue.next, |
18397 |
+ struct fotg210_request, queue); |
18398 |
++ int disgr1 = ioread32(ep->fotg210->reg + FOTG210_DISGR1); |
18399 |
+ |
18400 |
+ fotg210_start_dma(ep, req); |
18401 |
+ |
18402 |
+- /* finish out transfer */ |
18403 |
++ /* Complete the request when it's full or a short packet arrived. |
18404 |
++ * Like other drivers, short_not_ok isn't handled. |
18405 |
++ */ |
18406 |
++ |
18407 |
+ if (req->req.length == req->req.actual || |
18408 |
+- req->req.actual < ep->ep.maxpacket) |
18409 |
++ (disgr1 & DISGR1_SPK_INT(ep->epnum - 1))) |
18410 |
+ fotg210_done(ep, req, 0); |
18411 |
+ } |
18412 |
+ |
18413 |
+@@ -1027,6 +1031,12 @@ static void fotg210_init(struct fotg210_udc *fotg210) |
18414 |
+ value &= ~DMCR_GLINT_EN; |
18415 |
+ iowrite32(value, fotg210->reg + FOTG210_DMCR); |
18416 |
+ |
18417 |
++ /* enable only grp2 irqs we handle */ |
18418 |
++ iowrite32(~(DISGR2_DMA_ERROR | DISGR2_RX0BYTE_INT | DISGR2_TX0BYTE_INT |
18419 |
++ | DISGR2_ISO_SEQ_ABORT_INT | DISGR2_ISO_SEQ_ERR_INT |
18420 |
++ | DISGR2_RESM_INT | DISGR2_SUSP_INT | DISGR2_USBRST_INT), |
18421 |
++ fotg210->reg + FOTG210_DMISGR2); |
18422 |
++ |
18423 |
+ /* disable all fifo interrupt */ |
18424 |
+ iowrite32(~(u32)0, fotg210->reg + FOTG210_DMISGR1); |
18425 |
+ |
18426 |
+diff --git a/drivers/usb/gadget/udc/pch_udc.c b/drivers/usb/gadget/udc/pch_udc.c |
18427 |
+index a3c1fc9242686..fd3656d0f760c 100644 |
18428 |
+--- a/drivers/usb/gadget/udc/pch_udc.c |
18429 |
++++ b/drivers/usb/gadget/udc/pch_udc.c |
18430 |
+@@ -7,12 +7,14 @@ |
18431 |
+ #include <linux/module.h> |
18432 |
+ #include <linux/pci.h> |
18433 |
+ #include <linux/delay.h> |
18434 |
++#include <linux/dmi.h> |
18435 |
+ #include <linux/errno.h> |
18436 |
++#include <linux/gpio/consumer.h> |
18437 |
++#include <linux/gpio/machine.h> |
18438 |
+ #include <linux/list.h> |
18439 |
+ #include <linux/interrupt.h> |
18440 |
+ #include <linux/usb/ch9.h> |
18441 |
+ #include <linux/usb/gadget.h> |
18442 |
+-#include <linux/gpio/consumer.h> |
18443 |
+ #include <linux/irq.h> |
18444 |
+ |
18445 |
+ #define PCH_VBUS_PERIOD 3000 /* VBUS polling period (msec) */ |
18446 |
+@@ -596,18 +598,22 @@ static void pch_udc_reconnect(struct pch_udc_dev *dev) |
18447 |
+ static inline void pch_udc_vbus_session(struct pch_udc_dev *dev, |
18448 |
+ int is_active) |
18449 |
+ { |
18450 |
++ unsigned long iflags; |
18451 |
++ |
18452 |
++ spin_lock_irqsave(&dev->lock, iflags); |
18453 |
+ if (is_active) { |
18454 |
+ pch_udc_reconnect(dev); |
18455 |
+ dev->vbus_session = 1; |
18456 |
+ } else { |
18457 |
+ if (dev->driver && dev->driver->disconnect) { |
18458 |
+- spin_lock(&dev->lock); |
18459 |
++ spin_unlock_irqrestore(&dev->lock, iflags); |
18460 |
+ dev->driver->disconnect(&dev->gadget); |
18461 |
+- spin_unlock(&dev->lock); |
18462 |
++ spin_lock_irqsave(&dev->lock, iflags); |
18463 |
+ } |
18464 |
+ pch_udc_set_disconnect(dev); |
18465 |
+ dev->vbus_session = 0; |
18466 |
+ } |
18467 |
++ spin_unlock_irqrestore(&dev->lock, iflags); |
18468 |
+ } |
18469 |
+ |
18470 |
+ /** |
18471 |
+@@ -1166,20 +1172,25 @@ static int pch_udc_pcd_selfpowered(struct usb_gadget *gadget, int value) |
18472 |
+ static int pch_udc_pcd_pullup(struct usb_gadget *gadget, int is_on) |
18473 |
+ { |
18474 |
+ struct pch_udc_dev *dev; |
18475 |
++ unsigned long iflags; |
18476 |
+ |
18477 |
+ if (!gadget) |
18478 |
+ return -EINVAL; |
18479 |
++ |
18480 |
+ dev = container_of(gadget, struct pch_udc_dev, gadget); |
18481 |
++ |
18482 |
++ spin_lock_irqsave(&dev->lock, iflags); |
18483 |
+ if (is_on) { |
18484 |
+ pch_udc_reconnect(dev); |
18485 |
+ } else { |
18486 |
+ if (dev->driver && dev->driver->disconnect) { |
18487 |
+- spin_lock(&dev->lock); |
18488 |
++ spin_unlock_irqrestore(&dev->lock, iflags); |
18489 |
+ dev->driver->disconnect(&dev->gadget); |
18490 |
+- spin_unlock(&dev->lock); |
18491 |
++ spin_lock_irqsave(&dev->lock, iflags); |
18492 |
+ } |
18493 |
+ pch_udc_set_disconnect(dev); |
18494 |
+ } |
18495 |
++ spin_unlock_irqrestore(&dev->lock, iflags); |
18496 |
+ |
18497 |
+ return 0; |
18498 |
+ } |
18499 |
+@@ -1350,6 +1361,43 @@ static irqreturn_t pch_vbus_gpio_irq(int irq, void *data) |
18500 |
+ return IRQ_HANDLED; |
18501 |
+ } |
18502 |
+ |
18503 |
++static struct gpiod_lookup_table minnowboard_udc_gpios = { |
18504 |
++ .dev_id = "0000:02:02.4", |
18505 |
++ .table = { |
18506 |
++ GPIO_LOOKUP("sch_gpio.33158", 12, NULL, GPIO_ACTIVE_HIGH), |
18507 |
++ {} |
18508 |
++ }, |
18509 |
++}; |
18510 |
++ |
18511 |
++static const struct dmi_system_id pch_udc_gpio_dmi_table[] = { |
18512 |
++ { |
18513 |
++ .ident = "MinnowBoard", |
18514 |
++ .matches = { |
18515 |
++ DMI_MATCH(DMI_BOARD_NAME, "MinnowBoard"), |
18516 |
++ }, |
18517 |
++ .driver_data = &minnowboard_udc_gpios, |
18518 |
++ }, |
18519 |
++ { } |
18520 |
++}; |
18521 |
++ |
18522 |
++static void pch_vbus_gpio_remove_table(void *table) |
18523 |
++{ |
18524 |
++ gpiod_remove_lookup_table(table); |
18525 |
++} |
18526 |
++ |
18527 |
++static int pch_vbus_gpio_add_table(struct pch_udc_dev *dev) |
18528 |
++{ |
18529 |
++ struct device *d = &dev->pdev->dev; |
18530 |
++ const struct dmi_system_id *dmi; |
18531 |
++ |
18532 |
++ dmi = dmi_first_match(pch_udc_gpio_dmi_table); |
18533 |
++ if (!dmi) |
18534 |
++ return 0; |
18535 |
++ |
18536 |
++ gpiod_add_lookup_table(dmi->driver_data); |
18537 |
++ return devm_add_action_or_reset(d, pch_vbus_gpio_remove_table, dmi->driver_data); |
18538 |
++} |
18539 |
++ |
18540 |
+ /** |
18541 |
+ * pch_vbus_gpio_init() - This API initializes GPIO port detecting VBUS. |
18542 |
+ * @dev: Reference to the driver structure |
18543 |
+@@ -1360,6 +1408,7 @@ static irqreturn_t pch_vbus_gpio_irq(int irq, void *data) |
18544 |
+ */ |
18545 |
+ static int pch_vbus_gpio_init(struct pch_udc_dev *dev) |
18546 |
+ { |
18547 |
++ struct device *d = &dev->pdev->dev; |
18548 |
+ int err; |
18549 |
+ int irq_num = 0; |
18550 |
+ struct gpio_desc *gpiod; |
18551 |
+@@ -1367,8 +1416,12 @@ static int pch_vbus_gpio_init(struct pch_udc_dev *dev) |
18552 |
+ dev->vbus_gpio.port = NULL; |
18553 |
+ dev->vbus_gpio.intr = 0; |
18554 |
+ |
18555 |
++ err = pch_vbus_gpio_add_table(dev); |
18556 |
++ if (err) |
18557 |
++ return err; |
18558 |
++ |
18559 |
+ /* Retrieve the GPIO line from the USB gadget device */ |
18560 |
+- gpiod = devm_gpiod_get(dev->gadget.dev.parent, NULL, GPIOD_IN); |
18561 |
++ gpiod = devm_gpiod_get_optional(d, NULL, GPIOD_IN); |
18562 |
+ if (IS_ERR(gpiod)) |
18563 |
+ return PTR_ERR(gpiod); |
18564 |
+ gpiod_set_consumer_name(gpiod, "pch_vbus"); |
18565 |
+@@ -1756,7 +1809,7 @@ static struct usb_request *pch_udc_alloc_request(struct usb_ep *usbep, |
18566 |
+ } |
18567 |
+ /* prevent from using desc. - set HOST BUSY */ |
18568 |
+ dma_desc->status |= PCH_UDC_BS_HST_BSY; |
18569 |
+- dma_desc->dataptr = cpu_to_le32(DMA_ADDR_INVALID); |
18570 |
++ dma_desc->dataptr = lower_32_bits(DMA_ADDR_INVALID); |
18571 |
+ req->td_data = dma_desc; |
18572 |
+ req->td_data_last = dma_desc; |
18573 |
+ req->chain_len = 1; |
18574 |
+@@ -2298,6 +2351,21 @@ static void pch_udc_svc_data_out(struct pch_udc_dev *dev, int ep_num) |
18575 |
+ pch_udc_set_dma(dev, DMA_DIR_RX); |
18576 |
+ } |
18577 |
+ |
18578 |
++static int pch_udc_gadget_setup(struct pch_udc_dev *dev) |
18579 |
++ __must_hold(&dev->lock) |
18580 |
++{ |
18581 |
++ int rc; |
18582 |
++ |
18583 |
++ /* In some cases we can get an interrupt before driver gets setup */ |
18584 |
++ if (!dev->driver) |
18585 |
++ return -ESHUTDOWN; |
18586 |
++ |
18587 |
++ spin_unlock(&dev->lock); |
18588 |
++ rc = dev->driver->setup(&dev->gadget, &dev->setup_data); |
18589 |
++ spin_lock(&dev->lock); |
18590 |
++ return rc; |
18591 |
++} |
18592 |
++ |
18593 |
+ /** |
18594 |
+ * pch_udc_svc_control_in() - Handle Control IN endpoint interrupts |
18595 |
+ * @dev: Reference to the device structure |
18596 |
+@@ -2369,15 +2437,12 @@ static void pch_udc_svc_control_out(struct pch_udc_dev *dev) |
18597 |
+ dev->gadget.ep0 = &dev->ep[UDC_EP0IN_IDX].ep; |
18598 |
+ else /* OUT */ |
18599 |
+ dev->gadget.ep0 = &ep->ep; |
18600 |
+- spin_lock(&dev->lock); |
18601 |
+ /* If Mass storage Reset */ |
18602 |
+ if ((dev->setup_data.bRequestType == 0x21) && |
18603 |
+ (dev->setup_data.bRequest == 0xFF)) |
18604 |
+ dev->prot_stall = 0; |
18605 |
+ /* call gadget with setup data received */ |
18606 |
+- setup_supported = dev->driver->setup(&dev->gadget, |
18607 |
+- &dev->setup_data); |
18608 |
+- spin_unlock(&dev->lock); |
18609 |
++ setup_supported = pch_udc_gadget_setup(dev); |
18610 |
+ |
18611 |
+ if (dev->setup_data.bRequestType & USB_DIR_IN) { |
18612 |
+ ep->td_data->status = (ep->td_data->status & |
18613 |
+@@ -2625,9 +2690,7 @@ static void pch_udc_svc_intf_interrupt(struct pch_udc_dev *dev) |
18614 |
+ dev->ep[i].halted = 0; |
18615 |
+ } |
18616 |
+ dev->stall = 0; |
18617 |
+- spin_unlock(&dev->lock); |
18618 |
+- dev->driver->setup(&dev->gadget, &dev->setup_data); |
18619 |
+- spin_lock(&dev->lock); |
18620 |
++ pch_udc_gadget_setup(dev); |
18621 |
+ } |
18622 |
+ |
18623 |
+ /** |
18624 |
+@@ -2662,9 +2725,7 @@ static void pch_udc_svc_cfg_interrupt(struct pch_udc_dev *dev) |
18625 |
+ dev->stall = 0; |
18626 |
+ |
18627 |
+ /* call gadget zero with setup data received */ |
18628 |
+- spin_unlock(&dev->lock); |
18629 |
+- dev->driver->setup(&dev->gadget, &dev->setup_data); |
18630 |
+- spin_lock(&dev->lock); |
18631 |
++ pch_udc_gadget_setup(dev); |
18632 |
+ } |
18633 |
+ |
18634 |
+ /** |
18635 |
+@@ -2870,14 +2931,20 @@ static void pch_udc_pcd_reinit(struct pch_udc_dev *dev) |
18636 |
+ * @dev: Reference to the driver structure |
18637 |
+ * |
18638 |
+ * Return codes: |
18639 |
+- * 0: Success |
18640 |
++ * 0: Success |
18641 |
++ * -%ERRNO: All kind of errors when retrieving VBUS GPIO |
18642 |
+ */ |
18643 |
+ static int pch_udc_pcd_init(struct pch_udc_dev *dev) |
18644 |
+ { |
18645 |
++ int ret; |
18646 |
++ |
18647 |
+ pch_udc_init(dev); |
18648 |
+ pch_udc_pcd_reinit(dev); |
18649 |
+- pch_vbus_gpio_init(dev); |
18650 |
+- return 0; |
18651 |
++ |
18652 |
++ ret = pch_vbus_gpio_init(dev); |
18653 |
++ if (ret) |
18654 |
++ pch_udc_exit(dev); |
18655 |
++ return ret; |
18656 |
+ } |
18657 |
+ |
18658 |
+ /** |
18659 |
+@@ -2938,7 +3005,7 @@ static int init_dma_pools(struct pch_udc_dev *dev) |
18660 |
+ dev->dma_addr = dma_map_single(&dev->pdev->dev, ep0out_buf, |
18661 |
+ UDC_EP0OUT_BUFF_SIZE * 4, |
18662 |
+ DMA_FROM_DEVICE); |
18663 |
+- return 0; |
18664 |
++ return dma_mapping_error(&dev->pdev->dev, dev->dma_addr); |
18665 |
+ } |
18666 |
+ |
18667 |
+ static int pch_udc_start(struct usb_gadget *g, |
18668 |
+@@ -3063,6 +3130,7 @@ static int pch_udc_probe(struct pci_dev *pdev, |
18669 |
+ if (retval) |
18670 |
+ return retval; |
18671 |
+ |
18672 |
++ dev->pdev = pdev; |
18673 |
+ pci_set_drvdata(pdev, dev); |
18674 |
+ |
18675 |
+ /* Determine BAR based on PCI ID */ |
18676 |
+@@ -3078,16 +3146,10 @@ static int pch_udc_probe(struct pci_dev *pdev, |
18677 |
+ |
18678 |
+ dev->base_addr = pcim_iomap_table(pdev)[bar]; |
18679 |
+ |
18680 |
+- /* |
18681 |
+- * FIXME: add a GPIO descriptor table to pdev.dev using |
18682 |
+- * gpiod_add_descriptor_table() from <linux/gpio/machine.h> based on |
18683 |
+- * the PCI subsystem ID. The system-dependent GPIO is necessary for |
18684 |
+- * VBUS operation. |
18685 |
+- */ |
18686 |
+- |
18687 |
+ /* initialize the hardware */ |
18688 |
+- if (pch_udc_pcd_init(dev)) |
18689 |
+- return -ENODEV; |
18690 |
++ retval = pch_udc_pcd_init(dev); |
18691 |
++ if (retval) |
18692 |
++ return retval; |
18693 |
+ |
18694 |
+ pci_enable_msi(pdev); |
18695 |
+ |
18696 |
+@@ -3104,7 +3166,6 @@ static int pch_udc_probe(struct pci_dev *pdev, |
18697 |
+ |
18698 |
+ /* device struct setup */ |
18699 |
+ spin_lock_init(&dev->lock); |
18700 |
+- dev->pdev = pdev; |
18701 |
+ dev->gadget.ops = &pch_udc_ops; |
18702 |
+ |
18703 |
+ retval = init_dma_pools(dev); |
18704 |
+diff --git a/drivers/usb/gadget/udc/r8a66597-udc.c b/drivers/usb/gadget/udc/r8a66597-udc.c |
18705 |
+index 896c1a016d550..65cae48834545 100644 |
18706 |
+--- a/drivers/usb/gadget/udc/r8a66597-udc.c |
18707 |
++++ b/drivers/usb/gadget/udc/r8a66597-udc.c |
18708 |
+@@ -1849,6 +1849,8 @@ static int r8a66597_probe(struct platform_device *pdev) |
18709 |
+ return PTR_ERR(reg); |
18710 |
+ |
18711 |
+ ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
18712 |
++ if (!ires) |
18713 |
++ return -EINVAL; |
18714 |
+ irq = ires->start; |
18715 |
+ irq_trigger = ires->flags & IRQF_TRIGGER_MASK; |
18716 |
+ |
18717 |
+diff --git a/drivers/usb/gadget/udc/s3c2410_udc.c b/drivers/usb/gadget/udc/s3c2410_udc.c |
18718 |
+index 1d3ebb07ccd4d..b154b62abefa1 100644 |
18719 |
+--- a/drivers/usb/gadget/udc/s3c2410_udc.c |
18720 |
++++ b/drivers/usb/gadget/udc/s3c2410_udc.c |
18721 |
+@@ -54,8 +54,6 @@ static struct clk *udc_clock; |
18722 |
+ static struct clk *usb_bus_clock; |
18723 |
+ static void __iomem *base_addr; |
18724 |
+ static int irq_usbd; |
18725 |
+-static u64 rsrc_start; |
18726 |
+-static u64 rsrc_len; |
18727 |
+ static struct dentry *s3c2410_udc_debugfs_root; |
18728 |
+ |
18729 |
+ static inline u32 udc_read(u32 reg) |
18730 |
+@@ -1752,7 +1750,8 @@ static int s3c2410_udc_probe(struct platform_device *pdev) |
18731 |
+ udc_clock = clk_get(NULL, "usb-device"); |
18732 |
+ if (IS_ERR(udc_clock)) { |
18733 |
+ dev_err(dev, "failed to get udc clock source\n"); |
18734 |
+- return PTR_ERR(udc_clock); |
18735 |
++ retval = PTR_ERR(udc_clock); |
18736 |
++ goto err_usb_bus_clk; |
18737 |
+ } |
18738 |
+ |
18739 |
+ clk_prepare_enable(udc_clock); |
18740 |
+@@ -1775,7 +1774,7 @@ static int s3c2410_udc_probe(struct platform_device *pdev) |
18741 |
+ base_addr = devm_platform_ioremap_resource(pdev, 0); |
18742 |
+ if (IS_ERR(base_addr)) { |
18743 |
+ retval = PTR_ERR(base_addr); |
18744 |
+- goto err_mem; |
18745 |
++ goto err_udc_clk; |
18746 |
+ } |
18747 |
+ |
18748 |
+ the_controller = udc; |
18749 |
+@@ -1793,7 +1792,7 @@ static int s3c2410_udc_probe(struct platform_device *pdev) |
18750 |
+ if (retval != 0) { |
18751 |
+ dev_err(dev, "cannot get irq %i, err %d\n", irq_usbd, retval); |
18752 |
+ retval = -EBUSY; |
18753 |
+- goto err_map; |
18754 |
++ goto err_udc_clk; |
18755 |
+ } |
18756 |
+ |
18757 |
+ dev_dbg(dev, "got irq %i\n", irq_usbd); |
18758 |
+@@ -1864,10 +1863,14 @@ err_gpio_claim: |
18759 |
+ gpio_free(udc_info->vbus_pin); |
18760 |
+ err_int: |
18761 |
+ free_irq(irq_usbd, udc); |
18762 |
+-err_map: |
18763 |
+- iounmap(base_addr); |
18764 |
+-err_mem: |
18765 |
+- release_mem_region(rsrc_start, rsrc_len); |
18766 |
++err_udc_clk: |
18767 |
++ clk_disable_unprepare(udc_clock); |
18768 |
++ clk_put(udc_clock); |
18769 |
++ udc_clock = NULL; |
18770 |
++err_usb_bus_clk: |
18771 |
++ clk_disable_unprepare(usb_bus_clock); |
18772 |
++ clk_put(usb_bus_clock); |
18773 |
++ usb_bus_clock = NULL; |
18774 |
+ |
18775 |
+ return retval; |
18776 |
+ } |
18777 |
+@@ -1899,9 +1902,6 @@ static int s3c2410_udc_remove(struct platform_device *pdev) |
18778 |
+ |
18779 |
+ free_irq(irq_usbd, udc); |
18780 |
+ |
18781 |
+- iounmap(base_addr); |
18782 |
+- release_mem_region(rsrc_start, rsrc_len); |
18783 |
+- |
18784 |
+ if (!IS_ERR(udc_clock) && udc_clock != NULL) { |
18785 |
+ clk_disable_unprepare(udc_clock); |
18786 |
+ clk_put(udc_clock); |
18787 |
+diff --git a/drivers/usb/gadget/udc/snps_udc_plat.c b/drivers/usb/gadget/udc/snps_udc_plat.c |
18788 |
+index 32f1d3e90c264..99805d60a7ab3 100644 |
18789 |
+--- a/drivers/usb/gadget/udc/snps_udc_plat.c |
18790 |
++++ b/drivers/usb/gadget/udc/snps_udc_plat.c |
18791 |
+@@ -114,8 +114,8 @@ static int udc_plat_probe(struct platform_device *pdev) |
18792 |
+ |
18793 |
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
18794 |
+ udc->virt_addr = devm_ioremap_resource(dev, res); |
18795 |
+- if (IS_ERR(udc->regs)) |
18796 |
+- return PTR_ERR(udc->regs); |
18797 |
++ if (IS_ERR(udc->virt_addr)) |
18798 |
++ return PTR_ERR(udc->virt_addr); |
18799 |
+ |
18800 |
+ /* udc csr registers base */ |
18801 |
+ udc->csr = udc->virt_addr + UDC_CSR_ADDR; |
18802 |
+diff --git a/drivers/usb/host/xhci-mtk-sch.c b/drivers/usb/host/xhci-mtk-sch.c |
18803 |
+index b45e5bf089979..8950d1f10a7fb 100644 |
18804 |
+--- a/drivers/usb/host/xhci-mtk-sch.c |
18805 |
++++ b/drivers/usb/host/xhci-mtk-sch.c |
18806 |
+@@ -378,6 +378,31 @@ static void update_bus_bw(struct mu3h_sch_bw_info *sch_bw, |
18807 |
+ sch_ep->allocated = used; |
18808 |
+ } |
18809 |
+ |
18810 |
++static int check_fs_bus_bw(struct mu3h_sch_ep_info *sch_ep, int offset) |
18811 |
++{ |
18812 |
++ struct mu3h_sch_tt *tt = sch_ep->sch_tt; |
18813 |
++ u32 num_esit, tmp; |
18814 |
++ int base; |
18815 |
++ int i, j; |
18816 |
++ |
18817 |
++ num_esit = XHCI_MTK_MAX_ESIT / sch_ep->esit; |
18818 |
++ for (i = 0; i < num_esit; i++) { |
18819 |
++ base = offset + i * sch_ep->esit; |
18820 |
++ |
18821 |
++ /* |
18822 |
++ * Compared with hs bus, no matter what ep type, |
18823 |
++ * the hub will always delay one uframe to send data |
18824 |
++ */ |
18825 |
++ for (j = 0; j < sch_ep->cs_count; j++) { |
18826 |
++ tmp = tt->fs_bus_bw[base + j] + sch_ep->bw_cost_per_microframe; |
18827 |
++ if (tmp > FS_PAYLOAD_MAX) |
18828 |
++ return -ERANGE; |
18829 |
++ } |
18830 |
++ } |
18831 |
++ |
18832 |
++ return 0; |
18833 |
++} |
18834 |
++ |
18835 |
+ static int check_sch_tt(struct usb_device *udev, |
18836 |
+ struct mu3h_sch_ep_info *sch_ep, u32 offset) |
18837 |
+ { |
18838 |
+@@ -402,7 +427,7 @@ static int check_sch_tt(struct usb_device *udev, |
18839 |
+ return -ERANGE; |
18840 |
+ |
18841 |
+ for (i = 0; i < sch_ep->cs_count; i++) |
18842 |
+- if (test_bit(offset + i, tt->split_bit_map)) |
18843 |
++ if (test_bit(offset + i, tt->ss_bit_map)) |
18844 |
+ return -ERANGE; |
18845 |
+ |
18846 |
+ } else { |
18847 |
+@@ -432,7 +457,7 @@ static int check_sch_tt(struct usb_device *udev, |
18848 |
+ cs_count = 7; /* HW limit */ |
18849 |
+ |
18850 |
+ for (i = 0; i < cs_count + 2; i++) { |
18851 |
+- if (test_bit(offset + i, tt->split_bit_map)) |
18852 |
++ if (test_bit(offset + i, tt->ss_bit_map)) |
18853 |
+ return -ERANGE; |
18854 |
+ } |
18855 |
+ |
18856 |
+@@ -448,24 +473,44 @@ static int check_sch_tt(struct usb_device *udev, |
18857 |
+ sch_ep->num_budget_microframes = sch_ep->esit; |
18858 |
+ } |
18859 |
+ |
18860 |
+- return 0; |
18861 |
++ return check_fs_bus_bw(sch_ep, offset); |
18862 |
+ } |
18863 |
+ |
18864 |
+ static void update_sch_tt(struct usb_device *udev, |
18865 |
+- struct mu3h_sch_ep_info *sch_ep) |
18866 |
++ struct mu3h_sch_ep_info *sch_ep, bool used) |
18867 |
+ { |
18868 |
+ struct mu3h_sch_tt *tt = sch_ep->sch_tt; |
18869 |
+ u32 base, num_esit; |
18870 |
++ int bw_updated; |
18871 |
++ int bits; |
18872 |
+ int i, j; |
18873 |
+ |
18874 |
+ num_esit = XHCI_MTK_MAX_ESIT / sch_ep->esit; |
18875 |
++ bits = (sch_ep->ep_type == ISOC_OUT_EP) ? sch_ep->cs_count : 1; |
18876 |
++ |
18877 |
++ if (used) |
18878 |
++ bw_updated = sch_ep->bw_cost_per_microframe; |
18879 |
++ else |
18880 |
++ bw_updated = -sch_ep->bw_cost_per_microframe; |
18881 |
++ |
18882 |
+ for (i = 0; i < num_esit; i++) { |
18883 |
+ base = sch_ep->offset + i * sch_ep->esit; |
18884 |
+- for (j = 0; j < sch_ep->num_budget_microframes; j++) |
18885 |
+- set_bit(base + j, tt->split_bit_map); |
18886 |
++ |
18887 |
++ for (j = 0; j < bits; j++) { |
18888 |
++ if (used) |
18889 |
++ set_bit(base + j, tt->ss_bit_map); |
18890 |
++ else |
18891 |
++ clear_bit(base + j, tt->ss_bit_map); |
18892 |
++ } |
18893 |
++ |
18894 |
++ for (j = 0; j < sch_ep->cs_count; j++) |
18895 |
++ tt->fs_bus_bw[base + j] += bw_updated; |
18896 |
+ } |
18897 |
+ |
18898 |
+- list_add_tail(&sch_ep->tt_endpoint, &tt->ep_list); |
18899 |
++ if (used) |
18900 |
++ list_add_tail(&sch_ep->tt_endpoint, &tt->ep_list); |
18901 |
++ else |
18902 |
++ list_del(&sch_ep->tt_endpoint); |
18903 |
+ } |
18904 |
+ |
18905 |
+ static int check_sch_bw(struct usb_device *udev, |
18906 |
+@@ -535,7 +580,7 @@ static int check_sch_bw(struct usb_device *udev, |
18907 |
+ if (!tt_offset_ok) |
18908 |
+ return -ERANGE; |
18909 |
+ |
18910 |
+- update_sch_tt(udev, sch_ep); |
18911 |
++ update_sch_tt(udev, sch_ep, 1); |
18912 |
+ } |
18913 |
+ |
18914 |
+ /* update bus bandwidth info */ |
18915 |
+@@ -548,15 +593,16 @@ static void destroy_sch_ep(struct usb_device *udev, |
18916 |
+ struct mu3h_sch_bw_info *sch_bw, struct mu3h_sch_ep_info *sch_ep) |
18917 |
+ { |
18918 |
+ /* only release ep bw check passed by check_sch_bw() */ |
18919 |
+- if (sch_ep->allocated) |
18920 |
++ if (sch_ep->allocated) { |
18921 |
+ update_bus_bw(sch_bw, sch_ep, 0); |
18922 |
++ if (sch_ep->sch_tt) |
18923 |
++ update_sch_tt(udev, sch_ep, 0); |
18924 |
++ } |
18925 |
+ |
18926 |
+- list_del(&sch_ep->endpoint); |
18927 |
+- |
18928 |
+- if (sch_ep->sch_tt) { |
18929 |
+- list_del(&sch_ep->tt_endpoint); |
18930 |
++ if (sch_ep->sch_tt) |
18931 |
+ drop_tt(udev); |
18932 |
+- } |
18933 |
++ |
18934 |
++ list_del(&sch_ep->endpoint); |
18935 |
+ kfree(sch_ep); |
18936 |
+ } |
18937 |
+ |
18938 |
+@@ -643,7 +689,7 @@ int xhci_mtk_add_ep_quirk(struct usb_hcd *hcd, struct usb_device *udev, |
18939 |
+ */ |
18940 |
+ if (usb_endpoint_xfer_int(&ep->desc) |
18941 |
+ || usb_endpoint_xfer_isoc(&ep->desc)) |
18942 |
+- ep_ctx->reserved[0] |= cpu_to_le32(EP_BPKTS(1)); |
18943 |
++ ep_ctx->reserved[0] = cpu_to_le32(EP_BPKTS(1)); |
18944 |
+ |
18945 |
+ return 0; |
18946 |
+ } |
18947 |
+@@ -730,10 +776,10 @@ int xhci_mtk_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev) |
18948 |
+ list_move_tail(&sch_ep->endpoint, &sch_bw->bw_ep_list); |
18949 |
+ |
18950 |
+ ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index); |
18951 |
+- ep_ctx->reserved[0] |= cpu_to_le32(EP_BPKTS(sch_ep->pkts) |
18952 |
++ ep_ctx->reserved[0] = cpu_to_le32(EP_BPKTS(sch_ep->pkts) |
18953 |
+ | EP_BCSCOUNT(sch_ep->cs_count) |
18954 |
+ | EP_BBM(sch_ep->burst_mode)); |
18955 |
+- ep_ctx->reserved[1] |= cpu_to_le32(EP_BOFFSET(sch_ep->offset) |
18956 |
++ ep_ctx->reserved[1] = cpu_to_le32(EP_BOFFSET(sch_ep->offset) |
18957 |
+ | EP_BREPEAT(sch_ep->repeat)); |
18958 |
+ |
18959 |
+ xhci_dbg(xhci, " PKTS:%x, CSCOUNT:%x, BM:%x, OFFSET:%x, REPEAT:%x\n", |
18960 |
+diff --git a/drivers/usb/host/xhci-mtk.h b/drivers/usb/host/xhci-mtk.h |
18961 |
+index 080109012b9ac..2fc0568ba054e 100644 |
18962 |
+--- a/drivers/usb/host/xhci-mtk.h |
18963 |
++++ b/drivers/usb/host/xhci-mtk.h |
18964 |
+@@ -20,13 +20,15 @@ |
18965 |
+ #define XHCI_MTK_MAX_ESIT 64 |
18966 |
+ |
18967 |
+ /** |
18968 |
+- * @split_bit_map: used to avoid split microframes overlay |
18969 |
++ * @ss_bit_map: used to avoid start split microframes overlay |
18970 |
++ * @fs_bus_bw: array to keep track of bandwidth already used for FS |
18971 |
+ * @ep_list: Endpoints using this TT |
18972 |
+ * @usb_tt: usb TT related |
18973 |
+ * @tt_port: TT port number |
18974 |
+ */ |
18975 |
+ struct mu3h_sch_tt { |
18976 |
+- DECLARE_BITMAP(split_bit_map, XHCI_MTK_MAX_ESIT); |
18977 |
++ DECLARE_BITMAP(ss_bit_map, XHCI_MTK_MAX_ESIT); |
18978 |
++ u32 fs_bus_bw[XHCI_MTK_MAX_ESIT]; |
18979 |
+ struct list_head ep_list; |
18980 |
+ struct usb_tt *usb_tt; |
18981 |
+ int tt_port; |
18982 |
+diff --git a/drivers/usb/roles/class.c b/drivers/usb/roles/class.c |
18983 |
+index 97f37077b7f97..33b637d0d8d99 100644 |
18984 |
+--- a/drivers/usb/roles/class.c |
18985 |
++++ b/drivers/usb/roles/class.c |
18986 |
+@@ -189,6 +189,8 @@ usb_role_switch_find_by_fwnode(const struct fwnode_handle *fwnode) |
18987 |
+ return NULL; |
18988 |
+ |
18989 |
+ dev = class_find_device_by_fwnode(role_class, fwnode); |
18990 |
++ if (dev) |
18991 |
++ WARN_ON(!try_module_get(dev->parent->driver->owner)); |
18992 |
+ |
18993 |
+ return dev ? to_role_switch(dev) : NULL; |
18994 |
+ } |
18995 |
+diff --git a/drivers/usb/serial/ti_usb_3410_5052.c b/drivers/usb/serial/ti_usb_3410_5052.c |
18996 |
+index 73075b9351c58..622e24b06b4b7 100644 |
18997 |
+--- a/drivers/usb/serial/ti_usb_3410_5052.c |
18998 |
++++ b/drivers/usb/serial/ti_usb_3410_5052.c |
18999 |
+@@ -1420,14 +1420,19 @@ static int ti_set_serial_info(struct tty_struct *tty, |
19000 |
+ struct serial_struct *ss) |
19001 |
+ { |
19002 |
+ struct usb_serial_port *port = tty->driver_data; |
19003 |
+- struct ti_port *tport = usb_get_serial_port_data(port); |
19004 |
++ struct tty_port *tport = &port->port; |
19005 |
+ unsigned cwait; |
19006 |
+ |
19007 |
+ cwait = ss->closing_wait; |
19008 |
+ if (cwait != ASYNC_CLOSING_WAIT_NONE) |
19009 |
+ cwait = msecs_to_jiffies(10 * ss->closing_wait); |
19010 |
+ |
19011 |
+- tport->tp_port->port.closing_wait = cwait; |
19012 |
++ if (!capable(CAP_SYS_ADMIN)) { |
19013 |
++ if (cwait != tport->closing_wait) |
19014 |
++ return -EPERM; |
19015 |
++ } |
19016 |
++ |
19017 |
++ tport->closing_wait = cwait; |
19018 |
+ |
19019 |
+ return 0; |
19020 |
+ } |
19021 |
+diff --git a/drivers/usb/serial/usb_wwan.c b/drivers/usb/serial/usb_wwan.c |
19022 |
+index 4b9845807bee1..b2285d5a869de 100644 |
19023 |
+--- a/drivers/usb/serial/usb_wwan.c |
19024 |
++++ b/drivers/usb/serial/usb_wwan.c |
19025 |
+@@ -140,10 +140,10 @@ int usb_wwan_get_serial_info(struct tty_struct *tty, |
19026 |
+ ss->line = port->minor; |
19027 |
+ ss->port = port->port_number; |
19028 |
+ ss->baud_base = tty_get_baud_rate(port->port.tty); |
19029 |
+- ss->close_delay = port->port.close_delay / 10; |
19030 |
++ ss->close_delay = jiffies_to_msecs(port->port.close_delay) / 10; |
19031 |
+ ss->closing_wait = port->port.closing_wait == ASYNC_CLOSING_WAIT_NONE ? |
19032 |
+ ASYNC_CLOSING_WAIT_NONE : |
19033 |
+- port->port.closing_wait / 10; |
19034 |
++ jiffies_to_msecs(port->port.closing_wait) / 10; |
19035 |
+ return 0; |
19036 |
+ } |
19037 |
+ EXPORT_SYMBOL(usb_wwan_get_serial_info); |
19038 |
+@@ -155,9 +155,10 @@ int usb_wwan_set_serial_info(struct tty_struct *tty, |
19039 |
+ unsigned int closing_wait, close_delay; |
19040 |
+ int retval = 0; |
19041 |
+ |
19042 |
+- close_delay = ss->close_delay * 10; |
19043 |
++ close_delay = msecs_to_jiffies(ss->close_delay * 10); |
19044 |
+ closing_wait = ss->closing_wait == ASYNC_CLOSING_WAIT_NONE ? |
19045 |
+- ASYNC_CLOSING_WAIT_NONE : ss->closing_wait * 10; |
19046 |
++ ASYNC_CLOSING_WAIT_NONE : |
19047 |
++ msecs_to_jiffies(ss->closing_wait * 10); |
19048 |
+ |
19049 |
+ mutex_lock(&port->port.mutex); |
19050 |
+ |
19051 |
+diff --git a/drivers/usb/typec/stusb160x.c b/drivers/usb/typec/stusb160x.c |
19052 |
+index d21750bbbb44d..6eaeba9b096e1 100644 |
19053 |
+--- a/drivers/usb/typec/stusb160x.c |
19054 |
++++ b/drivers/usb/typec/stusb160x.c |
19055 |
+@@ -682,8 +682,8 @@ static int stusb160x_probe(struct i2c_client *client) |
19056 |
+ } |
19057 |
+ |
19058 |
+ fwnode = device_get_named_child_node(chip->dev, "connector"); |
19059 |
+- if (IS_ERR(fwnode)) |
19060 |
+- return PTR_ERR(fwnode); |
19061 |
++ if (!fwnode) |
19062 |
++ return -ENODEV; |
19063 |
+ |
19064 |
+ /* |
19065 |
+ * When both VDD and VSYS power supplies are present, the low power |
19066 |
+diff --git a/drivers/usb/typec/tcpm/tcpci.c b/drivers/usb/typec/tcpm/tcpci.c |
19067 |
+index f676abab044bb..577cd8c6966c8 100644 |
19068 |
+--- a/drivers/usb/typec/tcpm/tcpci.c |
19069 |
++++ b/drivers/usb/typec/tcpm/tcpci.c |
19070 |
+@@ -24,6 +24,15 @@ |
19071 |
+ #define AUTO_DISCHARGE_PD_HEADROOM_MV 850 |
19072 |
+ #define AUTO_DISCHARGE_PPS_HEADROOM_MV 1250 |
19073 |
+ |
19074 |
++#define tcpc_presenting_cc1_rd(reg) \ |
19075 |
++ (!(TCPC_ROLE_CTRL_DRP & (reg)) && \ |
19076 |
++ (((reg) & (TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT)) == \ |
19077 |
++ (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT))) |
19078 |
++#define tcpc_presenting_cc2_rd(reg) \ |
19079 |
++ (!(TCPC_ROLE_CTRL_DRP & (reg)) && \ |
19080 |
++ (((reg) & (TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT)) == \ |
19081 |
++ (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT))) |
19082 |
++ |
19083 |
+ struct tcpci { |
19084 |
+ struct device *dev; |
19085 |
+ |
19086 |
+@@ -178,19 +187,25 @@ static int tcpci_get_cc(struct tcpc_dev *tcpc, |
19087 |
+ enum typec_cc_status *cc1, enum typec_cc_status *cc2) |
19088 |
+ { |
19089 |
+ struct tcpci *tcpci = tcpc_to_tcpci(tcpc); |
19090 |
+- unsigned int reg; |
19091 |
++ unsigned int reg, role_control; |
19092 |
+ int ret; |
19093 |
+ |
19094 |
++ ret = regmap_read(tcpci->regmap, TCPC_ROLE_CTRL, &role_control); |
19095 |
++ if (ret < 0) |
19096 |
++ return ret; |
19097 |
++ |
19098 |
+ ret = regmap_read(tcpci->regmap, TCPC_CC_STATUS, ®); |
19099 |
+ if (ret < 0) |
19100 |
+ return ret; |
19101 |
+ |
19102 |
+ *cc1 = tcpci_to_typec_cc((reg >> TCPC_CC_STATUS_CC1_SHIFT) & |
19103 |
+ TCPC_CC_STATUS_CC1_MASK, |
19104 |
+- reg & TCPC_CC_STATUS_TERM); |
19105 |
++ reg & TCPC_CC_STATUS_TERM || |
19106 |
++ tcpc_presenting_cc1_rd(role_control)); |
19107 |
+ *cc2 = tcpci_to_typec_cc((reg >> TCPC_CC_STATUS_CC2_SHIFT) & |
19108 |
+ TCPC_CC_STATUS_CC2_MASK, |
19109 |
+- reg & TCPC_CC_STATUS_TERM); |
19110 |
++ reg & TCPC_CC_STATUS_TERM || |
19111 |
++ tcpc_presenting_cc2_rd(role_control)); |
19112 |
+ |
19113 |
+ return 0; |
19114 |
+ } |
19115 |
+diff --git a/drivers/usb/typec/tcpm/tcpm.c b/drivers/usb/typec/tcpm/tcpm.c |
19116 |
+index 3cd4859ffab58..c2bdfeb60e4f3 100644 |
19117 |
+--- a/drivers/usb/typec/tcpm/tcpm.c |
19118 |
++++ b/drivers/usb/typec/tcpm/tcpm.c |
19119 |
+@@ -218,12 +218,27 @@ struct pd_mode_data { |
19120 |
+ struct typec_altmode_desc altmode_desc[ALTMODE_DISCOVERY_MAX]; |
19121 |
+ }; |
19122 |
+ |
19123 |
++/* |
19124 |
++ * @min_volt: Actual min voltage at the local port |
19125 |
++ * @req_min_volt: Requested min voltage to the port partner |
19126 |
++ * @max_volt: Actual max voltage at the local port |
19127 |
++ * @req_max_volt: Requested max voltage to the port partner |
19128 |
++ * @max_curr: Actual max current at the local port |
19129 |
++ * @req_max_curr: Requested max current of the port partner |
19130 |
++ * @req_out_volt: Requested output voltage to the port partner |
19131 |
++ * @req_op_curr: Requested operating current to the port partner |
19132 |
++ * @supported: Parter has atleast one APDO hence supports PPS |
19133 |
++ * @active: PPS mode is active |
19134 |
++ */ |
19135 |
+ struct pd_pps_data { |
19136 |
+ u32 min_volt; |
19137 |
++ u32 req_min_volt; |
19138 |
+ u32 max_volt; |
19139 |
++ u32 req_max_volt; |
19140 |
+ u32 max_curr; |
19141 |
+- u32 out_volt; |
19142 |
+- u32 op_curr; |
19143 |
++ u32 req_max_curr; |
19144 |
++ u32 req_out_volt; |
19145 |
++ u32 req_op_curr; |
19146 |
+ bool supported; |
19147 |
+ bool active; |
19148 |
+ }; |
19149 |
+@@ -338,7 +353,10 @@ struct tcpm_port { |
19150 |
+ unsigned int operating_snk_mw; |
19151 |
+ bool update_sink_caps; |
19152 |
+ |
19153 |
+- /* Requested current / voltage */ |
19154 |
++ /* Requested current / voltage to the port partner */ |
19155 |
++ u32 req_current_limit; |
19156 |
++ u32 req_supply_voltage; |
19157 |
++ /* Actual current / voltage limit of the local port */ |
19158 |
+ u32 current_limit; |
19159 |
+ u32 supply_voltage; |
19160 |
+ |
19161 |
+@@ -1904,8 +1922,8 @@ static void tcpm_pd_ctrl_request(struct tcpm_port *port, |
19162 |
+ case SNK_TRANSITION_SINK: |
19163 |
+ if (port->vbus_present) { |
19164 |
+ tcpm_set_current_limit(port, |
19165 |
+- port->current_limit, |
19166 |
+- port->supply_voltage); |
19167 |
++ port->req_current_limit, |
19168 |
++ port->req_supply_voltage); |
19169 |
+ port->explicit_contract = true; |
19170 |
+ tcpm_set_auto_vbus_discharge_threshold(port, |
19171 |
+ TYPEC_PWR_MODE_PD, |
19172 |
+@@ -1951,8 +1969,8 @@ static void tcpm_pd_ctrl_request(struct tcpm_port *port, |
19173 |
+ break; |
19174 |
+ case SNK_NEGOTIATE_PPS_CAPABILITIES: |
19175 |
+ /* Revert data back from any requested PPS updates */ |
19176 |
+- port->pps_data.out_volt = port->supply_voltage; |
19177 |
+- port->pps_data.op_curr = port->current_limit; |
19178 |
++ port->pps_data.req_out_volt = port->supply_voltage; |
19179 |
++ port->pps_data.req_op_curr = port->current_limit; |
19180 |
+ port->pps_status = (type == PD_CTRL_WAIT ? |
19181 |
+ -EAGAIN : -EOPNOTSUPP); |
19182 |
+ tcpm_set_state(port, SNK_READY, 0); |
19183 |
+@@ -1991,8 +2009,12 @@ static void tcpm_pd_ctrl_request(struct tcpm_port *port, |
19184 |
+ break; |
19185 |
+ case SNK_NEGOTIATE_PPS_CAPABILITIES: |
19186 |
+ port->pps_data.active = true; |
19187 |
+- port->supply_voltage = port->pps_data.out_volt; |
19188 |
+- port->current_limit = port->pps_data.op_curr; |
19189 |
++ port->pps_data.min_volt = port->pps_data.req_min_volt; |
19190 |
++ port->pps_data.max_volt = port->pps_data.req_max_volt; |
19191 |
++ port->pps_data.max_curr = port->pps_data.req_max_curr; |
19192 |
++ port->req_supply_voltage = port->pps_data.req_out_volt; |
19193 |
++ port->req_current_limit = port->pps_data.req_op_curr; |
19194 |
++ power_supply_changed(port->psy); |
19195 |
+ tcpm_set_state(port, SNK_TRANSITION_SINK, 0); |
19196 |
+ break; |
19197 |
+ case SOFT_RESET_SEND: |
19198 |
+@@ -2519,17 +2541,16 @@ static unsigned int tcpm_pd_select_pps_apdo(struct tcpm_port *port) |
19199 |
+ src = port->source_caps[src_pdo]; |
19200 |
+ snk = port->snk_pdo[snk_pdo]; |
19201 |
+ |
19202 |
+- port->pps_data.min_volt = max(pdo_pps_apdo_min_voltage(src), |
19203 |
+- pdo_pps_apdo_min_voltage(snk)); |
19204 |
+- port->pps_data.max_volt = min(pdo_pps_apdo_max_voltage(src), |
19205 |
+- pdo_pps_apdo_max_voltage(snk)); |
19206 |
+- port->pps_data.max_curr = min_pps_apdo_current(src, snk); |
19207 |
+- port->pps_data.out_volt = min(port->pps_data.max_volt, |
19208 |
+- max(port->pps_data.min_volt, |
19209 |
+- port->pps_data.out_volt)); |
19210 |
+- port->pps_data.op_curr = min(port->pps_data.max_curr, |
19211 |
+- port->pps_data.op_curr); |
19212 |
+- power_supply_changed(port->psy); |
19213 |
++ port->pps_data.req_min_volt = max(pdo_pps_apdo_min_voltage(src), |
19214 |
++ pdo_pps_apdo_min_voltage(snk)); |
19215 |
++ port->pps_data.req_max_volt = min(pdo_pps_apdo_max_voltage(src), |
19216 |
++ pdo_pps_apdo_max_voltage(snk)); |
19217 |
++ port->pps_data.req_max_curr = min_pps_apdo_current(src, snk); |
19218 |
++ port->pps_data.req_out_volt = min(port->pps_data.max_volt, |
19219 |
++ max(port->pps_data.min_volt, |
19220 |
++ port->pps_data.req_out_volt)); |
19221 |
++ port->pps_data.req_op_curr = min(port->pps_data.max_curr, |
19222 |
++ port->pps_data.req_op_curr); |
19223 |
+ } |
19224 |
+ |
19225 |
+ return src_pdo; |
19226 |
+@@ -2609,8 +2630,8 @@ static int tcpm_pd_build_request(struct tcpm_port *port, u32 *rdo) |
19227 |
+ flags & RDO_CAP_MISMATCH ? " [mismatch]" : ""); |
19228 |
+ } |
19229 |
+ |
19230 |
+- port->current_limit = ma; |
19231 |
+- port->supply_voltage = mv; |
19232 |
++ port->req_current_limit = ma; |
19233 |
++ port->req_supply_voltage = mv; |
19234 |
+ |
19235 |
+ return 0; |
19236 |
+ } |
19237 |
+@@ -2656,10 +2677,10 @@ static int tcpm_pd_build_pps_request(struct tcpm_port *port, u32 *rdo) |
19238 |
+ tcpm_log(port, "Invalid APDO selected!"); |
19239 |
+ return -EINVAL; |
19240 |
+ } |
19241 |
+- max_mv = port->pps_data.max_volt; |
19242 |
+- max_ma = port->pps_data.max_curr; |
19243 |
+- out_mv = port->pps_data.out_volt; |
19244 |
+- op_ma = port->pps_data.op_curr; |
19245 |
++ max_mv = port->pps_data.req_max_volt; |
19246 |
++ max_ma = port->pps_data.req_max_curr; |
19247 |
++ out_mv = port->pps_data.req_out_volt; |
19248 |
++ op_ma = port->pps_data.req_op_curr; |
19249 |
+ break; |
19250 |
+ default: |
19251 |
+ tcpm_log(port, "Invalid PDO selected!"); |
19252 |
+@@ -2706,8 +2727,8 @@ static int tcpm_pd_build_pps_request(struct tcpm_port *port, u32 *rdo) |
19253 |
+ tcpm_log(port, "Requesting APDO %d: %u mV, %u mA", |
19254 |
+ src_pdo_index, out_mv, op_ma); |
19255 |
+ |
19256 |
+- port->pps_data.op_curr = op_ma; |
19257 |
+- port->pps_data.out_volt = out_mv; |
19258 |
++ port->pps_data.req_op_curr = op_ma; |
19259 |
++ port->pps_data.req_out_volt = out_mv; |
19260 |
+ |
19261 |
+ return 0; |
19262 |
+ } |
19263 |
+@@ -2945,8 +2966,6 @@ static void tcpm_reset_port(struct tcpm_port *port) |
19264 |
+ port->sink_cap_done = false; |
19265 |
+ if (port->tcpc->enable_frs) |
19266 |
+ port->tcpc->enable_frs(port->tcpc, false); |
19267 |
+- |
19268 |
+- power_supply_changed(port->psy); |
19269 |
+ } |
19270 |
+ |
19271 |
+ static void tcpm_detach(struct tcpm_port *port) |
19272 |
+@@ -4268,6 +4287,17 @@ static void _tcpm_pd_vbus_off(struct tcpm_port *port) |
19273 |
+ /* Do nothing, waiting for sink detection */ |
19274 |
+ break; |
19275 |
+ |
19276 |
++ case SRC_STARTUP: |
19277 |
++ case SRC_SEND_CAPABILITIES: |
19278 |
++ case SRC_SEND_CAPABILITIES_TIMEOUT: |
19279 |
++ case SRC_NEGOTIATE_CAPABILITIES: |
19280 |
++ case SRC_TRANSITION_SUPPLY: |
19281 |
++ case SRC_READY: |
19282 |
++ case SRC_WAIT_NEW_CAPABILITIES: |
19283 |
++ /* Force to unattached state to re-initiate connection */ |
19284 |
++ tcpm_set_state(port, SRC_UNATTACHED, 0); |
19285 |
++ break; |
19286 |
++ |
19287 |
+ case PORT_RESET: |
19288 |
+ /* |
19289 |
+ * State set back to default mode once the timer completes. |
19290 |
+@@ -4631,7 +4661,7 @@ static int tcpm_try_role(struct typec_port *p, int role) |
19291 |
+ return ret; |
19292 |
+ } |
19293 |
+ |
19294 |
+-static int tcpm_pps_set_op_curr(struct tcpm_port *port, u16 op_curr) |
19295 |
++static int tcpm_pps_set_op_curr(struct tcpm_port *port, u16 req_op_curr) |
19296 |
+ { |
19297 |
+ unsigned int target_mw; |
19298 |
+ int ret; |
19299 |
+@@ -4649,22 +4679,22 @@ static int tcpm_pps_set_op_curr(struct tcpm_port *port, u16 op_curr) |
19300 |
+ goto port_unlock; |
19301 |
+ } |
19302 |
+ |
19303 |
+- if (op_curr > port->pps_data.max_curr) { |
19304 |
++ if (req_op_curr > port->pps_data.max_curr) { |
19305 |
+ ret = -EINVAL; |
19306 |
+ goto port_unlock; |
19307 |
+ } |
19308 |
+ |
19309 |
+- target_mw = (op_curr * port->pps_data.out_volt) / 1000; |
19310 |
++ target_mw = (req_op_curr * port->supply_voltage) / 1000; |
19311 |
+ if (target_mw < port->operating_snk_mw) { |
19312 |
+ ret = -EINVAL; |
19313 |
+ goto port_unlock; |
19314 |
+ } |
19315 |
+ |
19316 |
+ /* Round down operating current to align with PPS valid steps */ |
19317 |
+- op_curr = op_curr - (op_curr % RDO_PROG_CURR_MA_STEP); |
19318 |
++ req_op_curr = req_op_curr - (req_op_curr % RDO_PROG_CURR_MA_STEP); |
19319 |
+ |
19320 |
+ reinit_completion(&port->pps_complete); |
19321 |
+- port->pps_data.op_curr = op_curr; |
19322 |
++ port->pps_data.req_op_curr = req_op_curr; |
19323 |
+ port->pps_status = 0; |
19324 |
+ port->pps_pending = true; |
19325 |
+ tcpm_set_state(port, SNK_NEGOTIATE_PPS_CAPABILITIES, 0); |
19326 |
+@@ -4686,7 +4716,7 @@ swap_unlock: |
19327 |
+ return ret; |
19328 |
+ } |
19329 |
+ |
19330 |
+-static int tcpm_pps_set_out_volt(struct tcpm_port *port, u16 out_volt) |
19331 |
++static int tcpm_pps_set_out_volt(struct tcpm_port *port, u16 req_out_volt) |
19332 |
+ { |
19333 |
+ unsigned int target_mw; |
19334 |
+ int ret; |
19335 |
+@@ -4704,23 +4734,23 @@ static int tcpm_pps_set_out_volt(struct tcpm_port *port, u16 out_volt) |
19336 |
+ goto port_unlock; |
19337 |
+ } |
19338 |
+ |
19339 |
+- if (out_volt < port->pps_data.min_volt || |
19340 |
+- out_volt > port->pps_data.max_volt) { |
19341 |
++ if (req_out_volt < port->pps_data.min_volt || |
19342 |
++ req_out_volt > port->pps_data.max_volt) { |
19343 |
+ ret = -EINVAL; |
19344 |
+ goto port_unlock; |
19345 |
+ } |
19346 |
+ |
19347 |
+- target_mw = (port->pps_data.op_curr * out_volt) / 1000; |
19348 |
++ target_mw = (port->current_limit * req_out_volt) / 1000; |
19349 |
+ if (target_mw < port->operating_snk_mw) { |
19350 |
+ ret = -EINVAL; |
19351 |
+ goto port_unlock; |
19352 |
+ } |
19353 |
+ |
19354 |
+ /* Round down output voltage to align with PPS valid steps */ |
19355 |
+- out_volt = out_volt - (out_volt % RDO_PROG_VOLT_MV_STEP); |
19356 |
++ req_out_volt = req_out_volt - (req_out_volt % RDO_PROG_VOLT_MV_STEP); |
19357 |
+ |
19358 |
+ reinit_completion(&port->pps_complete); |
19359 |
+- port->pps_data.out_volt = out_volt; |
19360 |
++ port->pps_data.req_out_volt = req_out_volt; |
19361 |
+ port->pps_status = 0; |
19362 |
+ port->pps_pending = true; |
19363 |
+ tcpm_set_state(port, SNK_NEGOTIATE_PPS_CAPABILITIES, 0); |
19364 |
+@@ -4769,8 +4799,8 @@ static int tcpm_pps_activate(struct tcpm_port *port, bool activate) |
19365 |
+ |
19366 |
+ /* Trigger PPS request or move back to standard PDO contract */ |
19367 |
+ if (activate) { |
19368 |
+- port->pps_data.out_volt = port->supply_voltage; |
19369 |
+- port->pps_data.op_curr = port->current_limit; |
19370 |
++ port->pps_data.req_out_volt = port->supply_voltage; |
19371 |
++ port->pps_data.req_op_curr = port->current_limit; |
19372 |
+ tcpm_set_state(port, SNK_NEGOTIATE_PPS_CAPABILITIES, 0); |
19373 |
+ } else { |
19374 |
+ tcpm_set_state(port, SNK_NEGOTIATE_CAPABILITIES, 0); |
19375 |
+diff --git a/drivers/usb/typec/tps6598x.c b/drivers/usb/typec/tps6598x.c |
19376 |
+index 29bd1c5a283cd..4038104568f5a 100644 |
19377 |
+--- a/drivers/usb/typec/tps6598x.c |
19378 |
++++ b/drivers/usb/typec/tps6598x.c |
19379 |
+@@ -614,8 +614,8 @@ static int tps6598x_probe(struct i2c_client *client) |
19380 |
+ return ret; |
19381 |
+ |
19382 |
+ fwnode = device_get_named_child_node(&client->dev, "connector"); |
19383 |
+- if (IS_ERR(fwnode)) |
19384 |
+- return PTR_ERR(fwnode); |
19385 |
++ if (!fwnode) |
19386 |
++ return -ENODEV; |
19387 |
+ |
19388 |
+ tps->role_sw = fwnode_usb_role_switch_get(fwnode); |
19389 |
+ if (IS_ERR(tps->role_sw)) { |
19390 |
+diff --git a/drivers/usb/usbip/vudc_sysfs.c b/drivers/usb/usbip/vudc_sysfs.c |
19391 |
+index f7633ee655a17..d1cf6b51bf85d 100644 |
19392 |
+--- a/drivers/usb/usbip/vudc_sysfs.c |
19393 |
++++ b/drivers/usb/usbip/vudc_sysfs.c |
19394 |
+@@ -156,12 +156,14 @@ static ssize_t usbip_sockfd_store(struct device *dev, |
19395 |
+ tcp_rx = kthread_create(&v_rx_loop, &udc->ud, "vudc_rx"); |
19396 |
+ if (IS_ERR(tcp_rx)) { |
19397 |
+ sockfd_put(socket); |
19398 |
++ mutex_unlock(&udc->ud.sysfs_lock); |
19399 |
+ return -EINVAL; |
19400 |
+ } |
19401 |
+ tcp_tx = kthread_create(&v_tx_loop, &udc->ud, "vudc_tx"); |
19402 |
+ if (IS_ERR(tcp_tx)) { |
19403 |
+ kthread_stop(tcp_rx); |
19404 |
+ sockfd_put(socket); |
19405 |
++ mutex_unlock(&udc->ud.sysfs_lock); |
19406 |
+ return -EINVAL; |
19407 |
+ } |
19408 |
+ |
19409 |
+diff --git a/drivers/vfio/fsl-mc/vfio_fsl_mc.c b/drivers/vfio/fsl-mc/vfio_fsl_mc.c |
19410 |
+index f27e25112c403..8722f5effacd4 100644 |
19411 |
+--- a/drivers/vfio/fsl-mc/vfio_fsl_mc.c |
19412 |
++++ b/drivers/vfio/fsl-mc/vfio_fsl_mc.c |
19413 |
+@@ -568,23 +568,39 @@ static int vfio_fsl_mc_init_device(struct vfio_fsl_mc_device *vdev) |
19414 |
+ dev_err(&mc_dev->dev, "VFIO_FSL_MC: Failed to setup DPRC (%d)\n", ret); |
19415 |
+ goto out_nc_unreg; |
19416 |
+ } |
19417 |
++ return 0; |
19418 |
++ |
19419 |
++out_nc_unreg: |
19420 |
++ bus_unregister_notifier(&fsl_mc_bus_type, &vdev->nb); |
19421 |
++ return ret; |
19422 |
++} |
19423 |
+ |
19424 |
++static int vfio_fsl_mc_scan_container(struct fsl_mc_device *mc_dev) |
19425 |
++{ |
19426 |
++ int ret; |
19427 |
++ |
19428 |
++ /* non dprc devices do not scan for other devices */ |
19429 |
++ if (!is_fsl_mc_bus_dprc(mc_dev)) |
19430 |
++ return 0; |
19431 |
+ ret = dprc_scan_container(mc_dev, false); |
19432 |
+ if (ret) { |
19433 |
+- dev_err(&mc_dev->dev, "VFIO_FSL_MC: Container scanning failed (%d)\n", ret); |
19434 |
+- goto out_dprc_cleanup; |
19435 |
++ dev_err(&mc_dev->dev, |
19436 |
++ "VFIO_FSL_MC: Container scanning failed (%d)\n", ret); |
19437 |
++ dprc_remove_devices(mc_dev, NULL, 0); |
19438 |
++ return ret; |
19439 |
+ } |
19440 |
+- |
19441 |
+ return 0; |
19442 |
++} |
19443 |
++ |
19444 |
++static void vfio_fsl_uninit_device(struct vfio_fsl_mc_device *vdev) |
19445 |
++{ |
19446 |
++ struct fsl_mc_device *mc_dev = vdev->mc_dev; |
19447 |
++ |
19448 |
++ if (!is_fsl_mc_bus_dprc(mc_dev)) |
19449 |
++ return; |
19450 |
+ |
19451 |
+-out_dprc_cleanup: |
19452 |
+- dprc_remove_devices(mc_dev, NULL, 0); |
19453 |
+ dprc_cleanup(mc_dev); |
19454 |
+-out_nc_unreg: |
19455 |
+ bus_unregister_notifier(&fsl_mc_bus_type, &vdev->nb); |
19456 |
+- vdev->nb.notifier_call = NULL; |
19457 |
+- |
19458 |
+- return ret; |
19459 |
+ } |
19460 |
+ |
19461 |
+ static int vfio_fsl_mc_probe(struct fsl_mc_device *mc_dev) |
19462 |
+@@ -607,29 +623,39 @@ static int vfio_fsl_mc_probe(struct fsl_mc_device *mc_dev) |
19463 |
+ } |
19464 |
+ |
19465 |
+ vdev->mc_dev = mc_dev; |
19466 |
+- |
19467 |
+- ret = vfio_add_group_dev(dev, &vfio_fsl_mc_ops, vdev); |
19468 |
+- if (ret) { |
19469 |
+- dev_err(dev, "VFIO_FSL_MC: Failed to add to vfio group\n"); |
19470 |
+- goto out_group_put; |
19471 |
+- } |
19472 |
++ mutex_init(&vdev->igate); |
19473 |
+ |
19474 |
+ ret = vfio_fsl_mc_reflck_attach(vdev); |
19475 |
+ if (ret) |
19476 |
+- goto out_group_dev; |
19477 |
++ goto out_group_put; |
19478 |
+ |
19479 |
+ ret = vfio_fsl_mc_init_device(vdev); |
19480 |
+ if (ret) |
19481 |
+ goto out_reflck; |
19482 |
+ |
19483 |
+- mutex_init(&vdev->igate); |
19484 |
++ ret = vfio_add_group_dev(dev, &vfio_fsl_mc_ops, vdev); |
19485 |
++ if (ret) { |
19486 |
++ dev_err(dev, "VFIO_FSL_MC: Failed to add to vfio group\n"); |
19487 |
++ goto out_device; |
19488 |
++ } |
19489 |
+ |
19490 |
++ /* |
19491 |
++ * This triggers recursion into vfio_fsl_mc_probe() on another device |
19492 |
++ * and the vfio_fsl_mc_reflck_attach() must succeed, which relies on the |
19493 |
++ * vfio_add_group_dev() above. It has no impact on this vdev, so it is |
19494 |
++ * safe to be after the vfio device is made live. |
19495 |
++ */ |
19496 |
++ ret = vfio_fsl_mc_scan_container(mc_dev); |
19497 |
++ if (ret) |
19498 |
++ goto out_group_dev; |
19499 |
+ return 0; |
19500 |
+ |
19501 |
+-out_reflck: |
19502 |
+- vfio_fsl_mc_reflck_put(vdev->reflck); |
19503 |
+ out_group_dev: |
19504 |
+ vfio_del_group_dev(dev); |
19505 |
++out_device: |
19506 |
++ vfio_fsl_uninit_device(vdev); |
19507 |
++out_reflck: |
19508 |
++ vfio_fsl_mc_reflck_put(vdev->reflck); |
19509 |
+ out_group_put: |
19510 |
+ vfio_iommu_group_put(group, dev); |
19511 |
+ return ret; |
19512 |
+@@ -646,16 +672,10 @@ static int vfio_fsl_mc_remove(struct fsl_mc_device *mc_dev) |
19513 |
+ |
19514 |
+ mutex_destroy(&vdev->igate); |
19515 |
+ |
19516 |
++ dprc_remove_devices(mc_dev, NULL, 0); |
19517 |
++ vfio_fsl_uninit_device(vdev); |
19518 |
+ vfio_fsl_mc_reflck_put(vdev->reflck); |
19519 |
+ |
19520 |
+- if (is_fsl_mc_bus_dprc(mc_dev)) { |
19521 |
+- dprc_remove_devices(mc_dev, NULL, 0); |
19522 |
+- dprc_cleanup(mc_dev); |
19523 |
+- } |
19524 |
+- |
19525 |
+- if (vdev->nb.notifier_call) |
19526 |
+- bus_unregister_notifier(&fsl_mc_bus_type, &vdev->nb); |
19527 |
+- |
19528 |
+ vfio_iommu_group_put(mc_dev->dev.iommu_group, dev); |
19529 |
+ |
19530 |
+ return 0; |
19531 |
+diff --git a/drivers/vfio/mdev/mdev_sysfs.c b/drivers/vfio/mdev/mdev_sysfs.c |
19532 |
+index 917fd84c1c6f2..367ff5412a387 100644 |
19533 |
+--- a/drivers/vfio/mdev/mdev_sysfs.c |
19534 |
++++ b/drivers/vfio/mdev/mdev_sysfs.c |
19535 |
+@@ -105,6 +105,7 @@ static struct mdev_type *add_mdev_supported_type(struct mdev_parent *parent, |
19536 |
+ return ERR_PTR(-ENOMEM); |
19537 |
+ |
19538 |
+ type->kobj.kset = parent->mdev_types_kset; |
19539 |
++ type->parent = parent; |
19540 |
+ |
19541 |
+ ret = kobject_init_and_add(&type->kobj, &mdev_type_ktype, NULL, |
19542 |
+ "%s-%s", dev_driver_string(parent->dev), |
19543 |
+@@ -132,7 +133,6 @@ static struct mdev_type *add_mdev_supported_type(struct mdev_parent *parent, |
19544 |
+ } |
19545 |
+ |
19546 |
+ type->group = group; |
19547 |
+- type->parent = parent; |
19548 |
+ return type; |
19549 |
+ |
19550 |
+ attrs_failed: |
19551 |
+diff --git a/drivers/vfio/pci/vfio_pci.c b/drivers/vfio/pci/vfio_pci.c |
19552 |
+index 465f646e33298..48b048edf1ee8 100644 |
19553 |
+--- a/drivers/vfio/pci/vfio_pci.c |
19554 |
++++ b/drivers/vfio/pci/vfio_pci.c |
19555 |
+@@ -1926,6 +1926,68 @@ static int vfio_pci_bus_notifier(struct notifier_block *nb, |
19556 |
+ return 0; |
19557 |
+ } |
19558 |
+ |
19559 |
++static int vfio_pci_vf_init(struct vfio_pci_device *vdev) |
19560 |
++{ |
19561 |
++ struct pci_dev *pdev = vdev->pdev; |
19562 |
++ int ret; |
19563 |
++ |
19564 |
++ if (!pdev->is_physfn) |
19565 |
++ return 0; |
19566 |
++ |
19567 |
++ vdev->vf_token = kzalloc(sizeof(*vdev->vf_token), GFP_KERNEL); |
19568 |
++ if (!vdev->vf_token) |
19569 |
++ return -ENOMEM; |
19570 |
++ |
19571 |
++ mutex_init(&vdev->vf_token->lock); |
19572 |
++ uuid_gen(&vdev->vf_token->uuid); |
19573 |
++ |
19574 |
++ vdev->nb.notifier_call = vfio_pci_bus_notifier; |
19575 |
++ ret = bus_register_notifier(&pci_bus_type, &vdev->nb); |
19576 |
++ if (ret) { |
19577 |
++ kfree(vdev->vf_token); |
19578 |
++ return ret; |
19579 |
++ } |
19580 |
++ return 0; |
19581 |
++} |
19582 |
++ |
19583 |
++static void vfio_pci_vf_uninit(struct vfio_pci_device *vdev) |
19584 |
++{ |
19585 |
++ if (!vdev->vf_token) |
19586 |
++ return; |
19587 |
++ |
19588 |
++ bus_unregister_notifier(&pci_bus_type, &vdev->nb); |
19589 |
++ WARN_ON(vdev->vf_token->users); |
19590 |
++ mutex_destroy(&vdev->vf_token->lock); |
19591 |
++ kfree(vdev->vf_token); |
19592 |
++} |
19593 |
++ |
19594 |
++static int vfio_pci_vga_init(struct vfio_pci_device *vdev) |
19595 |
++{ |
19596 |
++ struct pci_dev *pdev = vdev->pdev; |
19597 |
++ int ret; |
19598 |
++ |
19599 |
++ if (!vfio_pci_is_vga(pdev)) |
19600 |
++ return 0; |
19601 |
++ |
19602 |
++ ret = vga_client_register(pdev, vdev, NULL, vfio_pci_set_vga_decode); |
19603 |
++ if (ret) |
19604 |
++ return ret; |
19605 |
++ vga_set_legacy_decoding(pdev, vfio_pci_set_vga_decode(vdev, false)); |
19606 |
++ return 0; |
19607 |
++} |
19608 |
++ |
19609 |
++static void vfio_pci_vga_uninit(struct vfio_pci_device *vdev) |
19610 |
++{ |
19611 |
++ struct pci_dev *pdev = vdev->pdev; |
19612 |
++ |
19613 |
++ if (!vfio_pci_is_vga(pdev)) |
19614 |
++ return; |
19615 |
++ vga_client_register(pdev, NULL, NULL, NULL); |
19616 |
++ vga_set_legacy_decoding(pdev, VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM | |
19617 |
++ VGA_RSRC_LEGACY_IO | |
19618 |
++ VGA_RSRC_LEGACY_MEM); |
19619 |
++} |
19620 |
++ |
19621 |
+ static int vfio_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) |
19622 |
+ { |
19623 |
+ struct vfio_pci_device *vdev; |
19624 |
+@@ -1972,35 +2034,15 @@ static int vfio_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) |
19625 |
+ INIT_LIST_HEAD(&vdev->vma_list); |
19626 |
+ init_rwsem(&vdev->memory_lock); |
19627 |
+ |
19628 |
+- ret = vfio_add_group_dev(&pdev->dev, &vfio_pci_ops, vdev); |
19629 |
++ ret = vfio_pci_reflck_attach(vdev); |
19630 |
+ if (ret) |
19631 |
+ goto out_free; |
19632 |
+- |
19633 |
+- ret = vfio_pci_reflck_attach(vdev); |
19634 |
++ ret = vfio_pci_vf_init(vdev); |
19635 |
+ if (ret) |
19636 |
+- goto out_del_group_dev; |
19637 |
+- |
19638 |
+- if (pdev->is_physfn) { |
19639 |
+- vdev->vf_token = kzalloc(sizeof(*vdev->vf_token), GFP_KERNEL); |
19640 |
+- if (!vdev->vf_token) { |
19641 |
+- ret = -ENOMEM; |
19642 |
+- goto out_reflck; |
19643 |
+- } |
19644 |
+- |
19645 |
+- mutex_init(&vdev->vf_token->lock); |
19646 |
+- uuid_gen(&vdev->vf_token->uuid); |
19647 |
+- |
19648 |
+- vdev->nb.notifier_call = vfio_pci_bus_notifier; |
19649 |
+- ret = bus_register_notifier(&pci_bus_type, &vdev->nb); |
19650 |
+- if (ret) |
19651 |
+- goto out_vf_token; |
19652 |
+- } |
19653 |
+- |
19654 |
+- if (vfio_pci_is_vga(pdev)) { |
19655 |
+- vga_client_register(pdev, vdev, NULL, vfio_pci_set_vga_decode); |
19656 |
+- vga_set_legacy_decoding(pdev, |
19657 |
+- vfio_pci_set_vga_decode(vdev, false)); |
19658 |
+- } |
19659 |
++ goto out_reflck; |
19660 |
++ ret = vfio_pci_vga_init(vdev); |
19661 |
++ if (ret) |
19662 |
++ goto out_vf; |
19663 |
+ |
19664 |
+ vfio_pci_probe_power_state(vdev); |
19665 |
+ |
19666 |
+@@ -2018,15 +2060,20 @@ static int vfio_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) |
19667 |
+ vfio_pci_set_power_state(vdev, PCI_D3hot); |
19668 |
+ } |
19669 |
+ |
19670 |
+- return ret; |
19671 |
++ ret = vfio_add_group_dev(&pdev->dev, &vfio_pci_ops, vdev); |
19672 |
++ if (ret) |
19673 |
++ goto out_power; |
19674 |
++ return 0; |
19675 |
+ |
19676 |
+-out_vf_token: |
19677 |
+- kfree(vdev->vf_token); |
19678 |
++out_power: |
19679 |
++ if (!disable_idle_d3) |
19680 |
++ vfio_pci_set_power_state(vdev, PCI_D0); |
19681 |
++out_vf: |
19682 |
++ vfio_pci_vf_uninit(vdev); |
19683 |
+ out_reflck: |
19684 |
+ vfio_pci_reflck_put(vdev->reflck); |
19685 |
+-out_del_group_dev: |
19686 |
+- vfio_del_group_dev(&pdev->dev); |
19687 |
+ out_free: |
19688 |
++ kfree(vdev->pm_save); |
19689 |
+ kfree(vdev); |
19690 |
+ out_group_put: |
19691 |
+ vfio_iommu_group_put(group, &pdev->dev); |
19692 |
+@@ -2043,33 +2090,19 @@ static void vfio_pci_remove(struct pci_dev *pdev) |
19693 |
+ if (!vdev) |
19694 |
+ return; |
19695 |
+ |
19696 |
+- if (vdev->vf_token) { |
19697 |
+- WARN_ON(vdev->vf_token->users); |
19698 |
+- mutex_destroy(&vdev->vf_token->lock); |
19699 |
+- kfree(vdev->vf_token); |
19700 |
+- } |
19701 |
+- |
19702 |
+- if (vdev->nb.notifier_call) |
19703 |
+- bus_unregister_notifier(&pci_bus_type, &vdev->nb); |
19704 |
+- |
19705 |
++ vfio_pci_vf_uninit(vdev); |
19706 |
+ vfio_pci_reflck_put(vdev->reflck); |
19707 |
++ vfio_pci_vga_uninit(vdev); |
19708 |
+ |
19709 |
+ vfio_iommu_group_put(pdev->dev.iommu_group, &pdev->dev); |
19710 |
+- kfree(vdev->region); |
19711 |
+- mutex_destroy(&vdev->ioeventfds_lock); |
19712 |
+ |
19713 |
+ if (!disable_idle_d3) |
19714 |
+ vfio_pci_set_power_state(vdev, PCI_D0); |
19715 |
+ |
19716 |
++ mutex_destroy(&vdev->ioeventfds_lock); |
19717 |
++ kfree(vdev->region); |
19718 |
+ kfree(vdev->pm_save); |
19719 |
+ kfree(vdev); |
19720 |
+- |
19721 |
+- if (vfio_pci_is_vga(pdev)) { |
19722 |
+- vga_client_register(pdev, NULL, NULL, NULL); |
19723 |
+- vga_set_legacy_decoding(pdev, |
19724 |
+- VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM | |
19725 |
+- VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM); |
19726 |
+- } |
19727 |
+ } |
19728 |
+ |
19729 |
+ static pci_ers_result_t vfio_pci_aer_err_detected(struct pci_dev *pdev, |
19730 |
+diff --git a/fs/afs/dir.c b/fs/afs/dir.c |
19731 |
+index 7cb0604e2841f..978a09d96e44d 100644 |
19732 |
+--- a/fs/afs/dir.c |
19733 |
++++ b/fs/afs/dir.c |
19734 |
+@@ -1340,6 +1340,7 @@ static int afs_mkdir(struct inode *dir, struct dentry *dentry, umode_t mode) |
19735 |
+ |
19736 |
+ afs_op_set_vnode(op, 0, dvnode); |
19737 |
+ op->file[0].dv_delta = 1; |
19738 |
++ op->file[0].modification = true; |
19739 |
+ op->file[0].update_ctime = true; |
19740 |
+ op->dentry = dentry; |
19741 |
+ op->create.mode = S_IFDIR | mode; |
19742 |
+@@ -1421,6 +1422,7 @@ static int afs_rmdir(struct inode *dir, struct dentry *dentry) |
19743 |
+ |
19744 |
+ afs_op_set_vnode(op, 0, dvnode); |
19745 |
+ op->file[0].dv_delta = 1; |
19746 |
++ op->file[0].modification = true; |
19747 |
+ op->file[0].update_ctime = true; |
19748 |
+ |
19749 |
+ op->dentry = dentry; |
19750 |
+@@ -1557,6 +1559,7 @@ static int afs_unlink(struct inode *dir, struct dentry *dentry) |
19751 |
+ |
19752 |
+ afs_op_set_vnode(op, 0, dvnode); |
19753 |
+ op->file[0].dv_delta = 1; |
19754 |
++ op->file[0].modification = true; |
19755 |
+ op->file[0].update_ctime = true; |
19756 |
+ |
19757 |
+ /* Try to make sure we have a callback promise on the victim. */ |
19758 |
+@@ -1639,6 +1642,7 @@ static int afs_create(struct inode *dir, struct dentry *dentry, umode_t mode, |
19759 |
+ |
19760 |
+ afs_op_set_vnode(op, 0, dvnode); |
19761 |
+ op->file[0].dv_delta = 1; |
19762 |
++ op->file[0].modification = true; |
19763 |
+ op->file[0].update_ctime = true; |
19764 |
+ |
19765 |
+ op->dentry = dentry; |
19766 |
+@@ -1713,6 +1717,7 @@ static int afs_link(struct dentry *from, struct inode *dir, |
19767 |
+ afs_op_set_vnode(op, 0, dvnode); |
19768 |
+ afs_op_set_vnode(op, 1, vnode); |
19769 |
+ op->file[0].dv_delta = 1; |
19770 |
++ op->file[0].modification = true; |
19771 |
+ op->file[0].update_ctime = true; |
19772 |
+ op->file[1].update_ctime = true; |
19773 |
+ |
19774 |
+@@ -1908,6 +1913,8 @@ static int afs_rename(struct inode *old_dir, struct dentry *old_dentry, |
19775 |
+ afs_op_set_vnode(op, 1, new_dvnode); /* May be same as orig_dvnode */ |
19776 |
+ op->file[0].dv_delta = 1; |
19777 |
+ op->file[1].dv_delta = 1; |
19778 |
++ op->file[0].modification = true; |
19779 |
++ op->file[1].modification = true; |
19780 |
+ op->file[0].update_ctime = true; |
19781 |
+ op->file[1].update_ctime = true; |
19782 |
+ |
19783 |
+diff --git a/fs/afs/dir_silly.c b/fs/afs/dir_silly.c |
19784 |
+index 04f75a44f2432..dae9a57d7ec0c 100644 |
19785 |
+--- a/fs/afs/dir_silly.c |
19786 |
++++ b/fs/afs/dir_silly.c |
19787 |
+@@ -73,6 +73,8 @@ static int afs_do_silly_rename(struct afs_vnode *dvnode, struct afs_vnode *vnode |
19788 |
+ afs_op_set_vnode(op, 1, dvnode); |
19789 |
+ op->file[0].dv_delta = 1; |
19790 |
+ op->file[1].dv_delta = 1; |
19791 |
++ op->file[0].modification = true; |
19792 |
++ op->file[1].modification = true; |
19793 |
+ op->file[0].update_ctime = true; |
19794 |
+ op->file[1].update_ctime = true; |
19795 |
+ |
19796 |
+@@ -201,6 +203,7 @@ static int afs_do_silly_unlink(struct afs_vnode *dvnode, struct afs_vnode *vnode |
19797 |
+ afs_op_set_vnode(op, 0, dvnode); |
19798 |
+ afs_op_set_vnode(op, 1, vnode); |
19799 |
+ op->file[0].dv_delta = 1; |
19800 |
++ op->file[0].modification = true; |
19801 |
+ op->file[0].update_ctime = true; |
19802 |
+ op->file[1].op_unlinked = true; |
19803 |
+ op->file[1].update_ctime = true; |
19804 |
+diff --git a/fs/afs/fs_operation.c b/fs/afs/fs_operation.c |
19805 |
+index 71c58723763d2..a82515b47350e 100644 |
19806 |
+--- a/fs/afs/fs_operation.c |
19807 |
++++ b/fs/afs/fs_operation.c |
19808 |
+@@ -118,6 +118,8 @@ static void afs_prepare_vnode(struct afs_operation *op, struct afs_vnode_param * |
19809 |
+ vp->cb_break_before = afs_calc_vnode_cb_break(vnode); |
19810 |
+ if (vnode->lock_state != AFS_VNODE_LOCK_NONE) |
19811 |
+ op->flags |= AFS_OPERATION_CUR_ONLY; |
19812 |
++ if (vp->modification) |
19813 |
++ set_bit(AFS_VNODE_MODIFYING, &vnode->flags); |
19814 |
+ } |
19815 |
+ |
19816 |
+ if (vp->fid.vnode) |
19817 |
+@@ -223,6 +225,10 @@ int afs_put_operation(struct afs_operation *op) |
19818 |
+ |
19819 |
+ if (op->ops && op->ops->put) |
19820 |
+ op->ops->put(op); |
19821 |
++ if (op->file[0].modification) |
19822 |
++ clear_bit(AFS_VNODE_MODIFYING, &op->file[0].vnode->flags); |
19823 |
++ if (op->file[1].modification && op->file[1].vnode != op->file[0].vnode) |
19824 |
++ clear_bit(AFS_VNODE_MODIFYING, &op->file[1].vnode->flags); |
19825 |
+ if (op->file[0].put_vnode) |
19826 |
+ iput(&op->file[0].vnode->vfs_inode); |
19827 |
+ if (op->file[1].put_vnode) |
19828 |
+diff --git a/fs/afs/inode.c b/fs/afs/inode.c |
19829 |
+index 1d03eb1920ec0..ae3016a9fb23c 100644 |
19830 |
+--- a/fs/afs/inode.c |
19831 |
++++ b/fs/afs/inode.c |
19832 |
+@@ -102,13 +102,13 @@ static int afs_inode_init_from_status(struct afs_operation *op, |
19833 |
+ |
19834 |
+ switch (status->type) { |
19835 |
+ case AFS_FTYPE_FILE: |
19836 |
+- inode->i_mode = S_IFREG | status->mode; |
19837 |
++ inode->i_mode = S_IFREG | (status->mode & S_IALLUGO); |
19838 |
+ inode->i_op = &afs_file_inode_operations; |
19839 |
+ inode->i_fop = &afs_file_operations; |
19840 |
+ inode->i_mapping->a_ops = &afs_fs_aops; |
19841 |
+ break; |
19842 |
+ case AFS_FTYPE_DIR: |
19843 |
+- inode->i_mode = S_IFDIR | status->mode; |
19844 |
++ inode->i_mode = S_IFDIR | (status->mode & S_IALLUGO); |
19845 |
+ inode->i_op = &afs_dir_inode_operations; |
19846 |
+ inode->i_fop = &afs_dir_file_operations; |
19847 |
+ inode->i_mapping->a_ops = &afs_dir_aops; |
19848 |
+@@ -198,7 +198,7 @@ static void afs_apply_status(struct afs_operation *op, |
19849 |
+ if (status->mode != vnode->status.mode) { |
19850 |
+ mode = inode->i_mode; |
19851 |
+ mode &= ~S_IALLUGO; |
19852 |
+- mode |= status->mode; |
19853 |
++ mode |= status->mode & S_IALLUGO; |
19854 |
+ WRITE_ONCE(inode->i_mode, mode); |
19855 |
+ } |
19856 |
+ |
19857 |
+@@ -293,8 +293,9 @@ void afs_vnode_commit_status(struct afs_operation *op, struct afs_vnode_param *v |
19858 |
+ op->flags &= ~AFS_OPERATION_DIR_CONFLICT; |
19859 |
+ } |
19860 |
+ } else if (vp->scb.have_status) { |
19861 |
+- if (vp->dv_before + vp->dv_delta != vp->scb.status.data_version && |
19862 |
+- vp->speculative) |
19863 |
++ if (vp->speculative && |
19864 |
++ (test_bit(AFS_VNODE_MODIFYING, &vnode->flags) || |
19865 |
++ vp->dv_before != vnode->status.data_version)) |
19866 |
+ /* Ignore the result of a speculative bulk status fetch |
19867 |
+ * if it splits around a modification op, thereby |
19868 |
+ * appearing to regress the data version. |
19869 |
+@@ -909,6 +910,7 @@ int afs_setattr(struct dentry *dentry, struct iattr *attr) |
19870 |
+ } |
19871 |
+ op->ctime = attr->ia_ctime; |
19872 |
+ op->file[0].update_ctime = 1; |
19873 |
++ op->file[0].modification = true; |
19874 |
+ |
19875 |
+ op->ops = &afs_setattr_operation; |
19876 |
+ ret = afs_do_sync_operation(op); |
19877 |
+diff --git a/fs/afs/internal.h b/fs/afs/internal.h |
19878 |
+index 525ef075fcd90..ffe318ad2e026 100644 |
19879 |
+--- a/fs/afs/internal.h |
19880 |
++++ b/fs/afs/internal.h |
19881 |
+@@ -640,6 +640,7 @@ struct afs_vnode { |
19882 |
+ #define AFS_VNODE_PSEUDODIR 7 /* set if Vnode is a pseudo directory */ |
19883 |
+ #define AFS_VNODE_NEW_CONTENT 8 /* Set if file has new content (create/trunc-0) */ |
19884 |
+ #define AFS_VNODE_SILLY_DELETED 9 /* Set if file has been silly-deleted */ |
19885 |
++#define AFS_VNODE_MODIFYING 10 /* Set if we're performing a modification op */ |
19886 |
+ |
19887 |
+ struct list_head wb_keys; /* List of keys available for writeback */ |
19888 |
+ struct list_head pending_locks; /* locks waiting to be granted */ |
19889 |
+@@ -756,6 +757,7 @@ struct afs_vnode_param { |
19890 |
+ bool set_size:1; /* Must update i_size */ |
19891 |
+ bool op_unlinked:1; /* True if file was unlinked by op */ |
19892 |
+ bool speculative:1; /* T if speculative status fetch (no vnode lock) */ |
19893 |
++ bool modification:1; /* Set if the content gets modified */ |
19894 |
+ }; |
19895 |
+ |
19896 |
+ /* |
19897 |
+diff --git a/fs/afs/write.c b/fs/afs/write.c |
19898 |
+index c9195fc67fd8f..d37b5cfcf28f5 100644 |
19899 |
+--- a/fs/afs/write.c |
19900 |
++++ b/fs/afs/write.c |
19901 |
+@@ -450,6 +450,7 @@ static int afs_store_data(struct address_space *mapping, |
19902 |
+ afs_op_set_vnode(op, 0, vnode); |
19903 |
+ op->file[0].dv_delta = 1; |
19904 |
+ op->store.mapping = mapping; |
19905 |
++ op->file[0].modification = true; |
19906 |
+ op->store.first = first; |
19907 |
+ op->store.last = last; |
19908 |
+ op->store.first_offset = offset; |
19909 |
+diff --git a/fs/dlm/lowcomms.c b/fs/dlm/lowcomms.c |
19910 |
+index 372c34ff8594f..f7d2c52791f8f 100644 |
19911 |
+--- a/fs/dlm/lowcomms.c |
19912 |
++++ b/fs/dlm/lowcomms.c |
19913 |
+@@ -908,6 +908,7 @@ static int accept_from_sock(struct listen_connection *con) |
19914 |
+ result = dlm_con_init(othercon, nodeid); |
19915 |
+ if (result < 0) { |
19916 |
+ kfree(othercon); |
19917 |
++ mutex_unlock(&newcon->sock_mutex); |
19918 |
+ goto accept_err; |
19919 |
+ } |
19920 |
+ |
19921 |
+diff --git a/fs/io_uring.c b/fs/io_uring.c |
19922 |
+index 95b4a89dad4e9..c42c2e9570e58 100644 |
19923 |
+--- a/fs/io_uring.c |
19924 |
++++ b/fs/io_uring.c |
19925 |
+@@ -222,7 +222,7 @@ struct fixed_file_data { |
19926 |
+ struct io_buffer { |
19927 |
+ struct list_head list; |
19928 |
+ __u64 addr; |
19929 |
+- __s32 len; |
19930 |
++ __u32 len; |
19931 |
+ __u16 bid; |
19932 |
+ }; |
19933 |
+ |
19934 |
+@@ -535,7 +535,7 @@ struct io_splice { |
19935 |
+ struct io_provide_buf { |
19936 |
+ struct file *file; |
19937 |
+ __u64 addr; |
19938 |
+- __s32 len; |
19939 |
++ __u32 len; |
19940 |
+ __u32 bgid; |
19941 |
+ __u16 nbufs; |
19942 |
+ __u16 bid; |
19943 |
+@@ -4214,7 +4214,7 @@ static int io_remove_buffers(struct io_kiocb *req, bool force_nonblock, |
19944 |
+ static int io_provide_buffers_prep(struct io_kiocb *req, |
19945 |
+ const struct io_uring_sqe *sqe) |
19946 |
+ { |
19947 |
+- unsigned long size; |
19948 |
++ unsigned long size, tmp_check; |
19949 |
+ struct io_provide_buf *p = &req->pbuf; |
19950 |
+ u64 tmp; |
19951 |
+ |
19952 |
+@@ -4228,6 +4228,12 @@ static int io_provide_buffers_prep(struct io_kiocb *req, |
19953 |
+ p->addr = READ_ONCE(sqe->addr); |
19954 |
+ p->len = READ_ONCE(sqe->len); |
19955 |
+ |
19956 |
++ if (check_mul_overflow((unsigned long)p->len, (unsigned long)p->nbufs, |
19957 |
++ &size)) |
19958 |
++ return -EOVERFLOW; |
19959 |
++ if (check_add_overflow((unsigned long)p->addr, size, &tmp_check)) |
19960 |
++ return -EOVERFLOW; |
19961 |
++ |
19962 |
+ size = (unsigned long)p->len * p->nbufs; |
19963 |
+ if (!access_ok(u64_to_user_ptr(p->addr), size)) |
19964 |
+ return -EFAULT; |
19965 |
+@@ -4252,7 +4258,7 @@ static int io_add_buffers(struct io_provide_buf *pbuf, struct io_buffer **head) |
19966 |
+ break; |
19967 |
+ |
19968 |
+ buf->addr = addr; |
19969 |
+- buf->len = pbuf->len; |
19970 |
++ buf->len = min_t(__u32, pbuf->len, MAX_RW_COUNT); |
19971 |
+ buf->bid = bid; |
19972 |
+ addr += pbuf->len; |
19973 |
+ bid++; |
19974 |
+diff --git a/fs/nfsd/nfs4proc.c b/fs/nfsd/nfs4proc.c |
19975 |
+index 3581ce737e853..400cfb70f9367 100644 |
19976 |
+--- a/fs/nfsd/nfs4proc.c |
19977 |
++++ b/fs/nfsd/nfs4proc.c |
19978 |
+@@ -1540,8 +1540,8 @@ nfsd4_copy(struct svc_rqst *rqstp, struct nfsd4_compound_state *cstate, |
19979 |
+ if (!nfs4_init_copy_state(nn, copy)) |
19980 |
+ goto out_err; |
19981 |
+ refcount_set(&async_copy->refcount, 1); |
19982 |
+- memcpy(©->cp_res.cb_stateid, ©->cp_stateid, |
19983 |
+- sizeof(copy->cp_stateid)); |
19984 |
++ memcpy(©->cp_res.cb_stateid, ©->cp_stateid.stid, |
19985 |
++ sizeof(copy->cp_res.cb_stateid)); |
19986 |
+ dup_copy_fields(copy, async_copy); |
19987 |
+ async_copy->copy_task = kthread_create(nfsd4_do_async_copy, |
19988 |
+ async_copy, "%s", "copy thread"); |
19989 |
+diff --git a/fs/overlayfs/copy_up.c b/fs/overlayfs/copy_up.c |
19990 |
+index 0fed532efa68d..e2ae8f4e99c23 100644 |
19991 |
+--- a/fs/overlayfs/copy_up.c |
19992 |
++++ b/fs/overlayfs/copy_up.c |
19993 |
+@@ -932,7 +932,7 @@ static int ovl_copy_up_one(struct dentry *parent, struct dentry *dentry, |
19994 |
+ static int ovl_copy_up_flags(struct dentry *dentry, int flags) |
19995 |
+ { |
19996 |
+ int err = 0; |
19997 |
+- const struct cred *old_cred = ovl_override_creds(dentry->d_sb); |
19998 |
++ const struct cred *old_cred; |
19999 |
+ bool disconnected = (dentry->d_flags & DCACHE_DISCONNECTED); |
20000 |
+ |
20001 |
+ /* |
20002 |
+@@ -943,6 +943,7 @@ static int ovl_copy_up_flags(struct dentry *dentry, int flags) |
20003 |
+ if (WARN_ON(disconnected && d_is_dir(dentry))) |
20004 |
+ return -EIO; |
20005 |
+ |
20006 |
++ old_cred = ovl_override_creds(dentry->d_sb); |
20007 |
+ while (!err) { |
20008 |
+ struct dentry *next; |
20009 |
+ struct dentry *parent = NULL; |
20010 |
+diff --git a/fs/overlayfs/overlayfs.h b/fs/overlayfs/overlayfs.h |
20011 |
+index cb4e2d60ecf9c..cf0c5ea2f2fc9 100644 |
20012 |
+--- a/fs/overlayfs/overlayfs.h |
20013 |
++++ b/fs/overlayfs/overlayfs.h |
20014 |
+@@ -310,9 +310,6 @@ int ovl_check_setxattr(struct dentry *dentry, struct dentry *upperdentry, |
20015 |
+ enum ovl_xattr ox, const void *value, size_t size, |
20016 |
+ int xerr); |
20017 |
+ int ovl_set_impure(struct dentry *dentry, struct dentry *upperdentry); |
20018 |
+-void ovl_set_flag(unsigned long flag, struct inode *inode); |
20019 |
+-void ovl_clear_flag(unsigned long flag, struct inode *inode); |
20020 |
+-bool ovl_test_flag(unsigned long flag, struct inode *inode); |
20021 |
+ bool ovl_inuse_trylock(struct dentry *dentry); |
20022 |
+ void ovl_inuse_unlock(struct dentry *dentry); |
20023 |
+ bool ovl_is_inuse(struct dentry *dentry); |
20024 |
+@@ -326,6 +323,21 @@ char *ovl_get_redirect_xattr(struct ovl_fs *ofs, struct dentry *dentry, |
20025 |
+ int padding); |
20026 |
+ int ovl_sync_status(struct ovl_fs *ofs); |
20027 |
+ |
20028 |
++static inline void ovl_set_flag(unsigned long flag, struct inode *inode) |
20029 |
++{ |
20030 |
++ set_bit(flag, &OVL_I(inode)->flags); |
20031 |
++} |
20032 |
++ |
20033 |
++static inline void ovl_clear_flag(unsigned long flag, struct inode *inode) |
20034 |
++{ |
20035 |
++ clear_bit(flag, &OVL_I(inode)->flags); |
20036 |
++} |
20037 |
++ |
20038 |
++static inline bool ovl_test_flag(unsigned long flag, struct inode *inode) |
20039 |
++{ |
20040 |
++ return test_bit(flag, &OVL_I(inode)->flags); |
20041 |
++} |
20042 |
++ |
20043 |
+ static inline bool ovl_is_impuredir(struct super_block *sb, |
20044 |
+ struct dentry *dentry) |
20045 |
+ { |
20046 |
+@@ -430,6 +442,18 @@ int ovl_workdir_cleanup(struct inode *dir, struct vfsmount *mnt, |
20047 |
+ struct dentry *dentry, int level); |
20048 |
+ int ovl_indexdir_cleanup(struct ovl_fs *ofs); |
20049 |
+ |
20050 |
++/* |
20051 |
++ * Can we iterate real dir directly? |
20052 |
++ * |
20053 |
++ * Non-merge dir may contain whiteouts from a time it was a merge upper, before |
20054 |
++ * lower dir was removed under it and possibly before it was rotated from upper |
20055 |
++ * to lower layer. |
20056 |
++ */ |
20057 |
++static inline bool ovl_dir_is_real(struct dentry *dir) |
20058 |
++{ |
20059 |
++ return !ovl_test_flag(OVL_WHITEOUTS, d_inode(dir)); |
20060 |
++} |
20061 |
++ |
20062 |
+ /* inode.c */ |
20063 |
+ int ovl_set_nlink_upper(struct dentry *dentry); |
20064 |
+ int ovl_set_nlink_lower(struct dentry *dentry); |
20065 |
+diff --git a/fs/overlayfs/readdir.c b/fs/overlayfs/readdir.c |
20066 |
+index f404a78e6b607..cc1e802570644 100644 |
20067 |
+--- a/fs/overlayfs/readdir.c |
20068 |
++++ b/fs/overlayfs/readdir.c |
20069 |
+@@ -319,18 +319,6 @@ static inline int ovl_dir_read(struct path *realpath, |
20070 |
+ return err; |
20071 |
+ } |
20072 |
+ |
20073 |
+-/* |
20074 |
+- * Can we iterate real dir directly? |
20075 |
+- * |
20076 |
+- * Non-merge dir may contain whiteouts from a time it was a merge upper, before |
20077 |
+- * lower dir was removed under it and possibly before it was rotated from upper |
20078 |
+- * to lower layer. |
20079 |
+- */ |
20080 |
+-static bool ovl_dir_is_real(struct dentry *dir) |
20081 |
+-{ |
20082 |
+- return !ovl_test_flag(OVL_WHITEOUTS, d_inode(dir)); |
20083 |
+-} |
20084 |
+- |
20085 |
+ static void ovl_dir_reset(struct file *file) |
20086 |
+ { |
20087 |
+ struct ovl_dir_file *od = file->private_data; |
20088 |
+diff --git a/fs/overlayfs/super.c b/fs/overlayfs/super.c |
20089 |
+index 3ff33e1ad6f30..ce274d4e6700a 100644 |
20090 |
+--- a/fs/overlayfs/super.c |
20091 |
++++ b/fs/overlayfs/super.c |
20092 |
+@@ -380,6 +380,8 @@ static int ovl_show_options(struct seq_file *m, struct dentry *dentry) |
20093 |
+ ofs->config.metacopy ? "on" : "off"); |
20094 |
+ if (ofs->config.ovl_volatile) |
20095 |
+ seq_puts(m, ",volatile"); |
20096 |
++ if (ofs->config.userxattr) |
20097 |
++ seq_puts(m, ",userxattr"); |
20098 |
+ return 0; |
20099 |
+ } |
20100 |
+ |
20101 |
+diff --git a/fs/overlayfs/util.c b/fs/overlayfs/util.c |
20102 |
+index 9826b003f1d27..47dab5a709dbb 100644 |
20103 |
+--- a/fs/overlayfs/util.c |
20104 |
++++ b/fs/overlayfs/util.c |
20105 |
+@@ -422,18 +422,20 @@ void ovl_inode_update(struct inode *inode, struct dentry *upperdentry) |
20106 |
+ } |
20107 |
+ } |
20108 |
+ |
20109 |
+-static void ovl_dentry_version_inc(struct dentry *dentry, bool impurity) |
20110 |
++static void ovl_dir_version_inc(struct dentry *dentry, bool impurity) |
20111 |
+ { |
20112 |
+ struct inode *inode = d_inode(dentry); |
20113 |
+ |
20114 |
+ WARN_ON(!inode_is_locked(inode)); |
20115 |
++ WARN_ON(!d_is_dir(dentry)); |
20116 |
+ /* |
20117 |
+- * Version is used by readdir code to keep cache consistent. For merge |
20118 |
+- * dirs all changes need to be noted. For non-merge dirs, cache only |
20119 |
+- * contains impure (ones which have been copied up and have origins) |
20120 |
+- * entries, so only need to note changes to impure entries. |
20121 |
++ * Version is used by readdir code to keep cache consistent. |
20122 |
++ * For merge dirs (or dirs with origin) all changes need to be noted. |
20123 |
++ * For non-merge dirs, cache contains only impure entries (i.e. ones |
20124 |
++ * which have been copied up and have origins), so only need to note |
20125 |
++ * changes to impure entries. |
20126 |
+ */ |
20127 |
+- if (OVL_TYPE_MERGE(ovl_path_type(dentry)) || impurity) |
20128 |
++ if (!ovl_dir_is_real(dentry) || impurity) |
20129 |
+ OVL_I(inode)->version++; |
20130 |
+ } |
20131 |
+ |
20132 |
+@@ -442,7 +444,7 @@ void ovl_dir_modified(struct dentry *dentry, bool impurity) |
20133 |
+ /* Copy mtime/ctime */ |
20134 |
+ ovl_copyattr(d_inode(ovl_dentry_upper(dentry)), d_inode(dentry)); |
20135 |
+ |
20136 |
+- ovl_dentry_version_inc(dentry, impurity); |
20137 |
++ ovl_dir_version_inc(dentry, impurity); |
20138 |
+ } |
20139 |
+ |
20140 |
+ u64 ovl_dentry_version_get(struct dentry *dentry) |
20141 |
+@@ -638,21 +640,6 @@ int ovl_set_impure(struct dentry *dentry, struct dentry *upperdentry) |
20142 |
+ return err; |
20143 |
+ } |
20144 |
+ |
20145 |
+-void ovl_set_flag(unsigned long flag, struct inode *inode) |
20146 |
+-{ |
20147 |
+- set_bit(flag, &OVL_I(inode)->flags); |
20148 |
+-} |
20149 |
+- |
20150 |
+-void ovl_clear_flag(unsigned long flag, struct inode *inode) |
20151 |
+-{ |
20152 |
+- clear_bit(flag, &OVL_I(inode)->flags); |
20153 |
+-} |
20154 |
+- |
20155 |
+-bool ovl_test_flag(unsigned long flag, struct inode *inode) |
20156 |
+-{ |
20157 |
+- return test_bit(flag, &OVL_I(inode)->flags); |
20158 |
+-} |
20159 |
+- |
20160 |
+ /** |
20161 |
+ * Caller must hold a reference to inode to prevent it from being freed while |
20162 |
+ * it is marked inuse. |
20163 |
+diff --git a/fs/proc/array.c b/fs/proc/array.c |
20164 |
+index bb87e4d89cd8f..7ec59171f197f 100644 |
20165 |
+--- a/fs/proc/array.c |
20166 |
++++ b/fs/proc/array.c |
20167 |
+@@ -342,8 +342,10 @@ static inline void task_seccomp(struct seq_file *m, struct task_struct *p) |
20168 |
+ seq_put_decimal_ull(m, "NoNewPrivs:\t", task_no_new_privs(p)); |
20169 |
+ #ifdef CONFIG_SECCOMP |
20170 |
+ seq_put_decimal_ull(m, "\nSeccomp:\t", p->seccomp.mode); |
20171 |
++#ifdef CONFIG_SECCOMP_FILTER |
20172 |
+ seq_put_decimal_ull(m, "\nSeccomp_filters:\t", |
20173 |
+ atomic_read(&p->seccomp.filter_count)); |
20174 |
++#endif |
20175 |
+ #endif |
20176 |
+ seq_puts(m, "\nSpeculation_Store_Bypass:\t"); |
20177 |
+ switch (arch_prctl_spec_ctrl_get(p, PR_SPEC_STORE_BYPASS)) { |
20178 |
+diff --git a/fs/xfs/libxfs/xfs_attr.c b/fs/xfs/libxfs/xfs_attr.c |
20179 |
+index fd8e6418a0d31..96ac7e562b871 100644 |
20180 |
+--- a/fs/xfs/libxfs/xfs_attr.c |
20181 |
++++ b/fs/xfs/libxfs/xfs_attr.c |
20182 |
+@@ -928,6 +928,7 @@ restart: |
20183 |
+ * Search to see if name already exists, and get back a pointer |
20184 |
+ * to where it should go. |
20185 |
+ */ |
20186 |
++ error = 0; |
20187 |
+ retval = xfs_attr_node_hasname(args, &state); |
20188 |
+ if (retval != -ENOATTR && retval != -EEXIST) |
20189 |
+ goto out; |
20190 |
+diff --git a/include/crypto/internal/poly1305.h b/include/crypto/internal/poly1305.h |
20191 |
+index 064e52ca52480..196aa769f2968 100644 |
20192 |
+--- a/include/crypto/internal/poly1305.h |
20193 |
++++ b/include/crypto/internal/poly1305.h |
20194 |
+@@ -18,7 +18,8 @@ |
20195 |
+ * only the ε-almost-∆-universal hash function (not the full MAC) is computed. |
20196 |
+ */ |
20197 |
+ |
20198 |
+-void poly1305_core_setkey(struct poly1305_core_key *key, const u8 *raw_key); |
20199 |
++void poly1305_core_setkey(struct poly1305_core_key *key, |
20200 |
++ const u8 raw_key[POLY1305_BLOCK_SIZE]); |
20201 |
+ static inline void poly1305_core_init(struct poly1305_state *state) |
20202 |
+ { |
20203 |
+ *state = (struct poly1305_state){}; |
20204 |
+diff --git a/include/crypto/poly1305.h b/include/crypto/poly1305.h |
20205 |
+index f1f67fc749cf4..090692ec3bc73 100644 |
20206 |
+--- a/include/crypto/poly1305.h |
20207 |
++++ b/include/crypto/poly1305.h |
20208 |
+@@ -58,8 +58,10 @@ struct poly1305_desc_ctx { |
20209 |
+ }; |
20210 |
+ }; |
20211 |
+ |
20212 |
+-void poly1305_init_arch(struct poly1305_desc_ctx *desc, const u8 *key); |
20213 |
+-void poly1305_init_generic(struct poly1305_desc_ctx *desc, const u8 *key); |
20214 |
++void poly1305_init_arch(struct poly1305_desc_ctx *desc, |
20215 |
++ const u8 key[POLY1305_KEY_SIZE]); |
20216 |
++void poly1305_init_generic(struct poly1305_desc_ctx *desc, |
20217 |
++ const u8 key[POLY1305_KEY_SIZE]); |
20218 |
+ |
20219 |
+ static inline void poly1305_init(struct poly1305_desc_ctx *desc, const u8 *key) |
20220 |
+ { |
20221 |
+diff --git a/include/keys/trusted-type.h b/include/keys/trusted-type.h |
20222 |
+index a94c03a61d8f9..b2ed3481c6a02 100644 |
20223 |
+--- a/include/keys/trusted-type.h |
20224 |
++++ b/include/keys/trusted-type.h |
20225 |
+@@ -30,6 +30,7 @@ struct trusted_key_options { |
20226 |
+ uint16_t keytype; |
20227 |
+ uint32_t keyhandle; |
20228 |
+ unsigned char keyauth[TPM_DIGEST_SIZE]; |
20229 |
++ uint32_t blobauth_len; |
20230 |
+ unsigned char blobauth[TPM_DIGEST_SIZE]; |
20231 |
+ uint32_t pcrinfo_len; |
20232 |
+ unsigned char pcrinfo[MAX_PCRINFO_SIZE]; |
20233 |
+diff --git a/include/linux/dma-iommu.h b/include/linux/dma-iommu.h |
20234 |
+index 706b68d1359be..13d1f4c14d7ba 100644 |
20235 |
+--- a/include/linux/dma-iommu.h |
20236 |
++++ b/include/linux/dma-iommu.h |
20237 |
+@@ -40,6 +40,8 @@ void iommu_dma_get_resv_regions(struct device *dev, struct list_head *list); |
20238 |
+ void iommu_dma_free_cpu_cached_iovas(unsigned int cpu, |
20239 |
+ struct iommu_domain *domain); |
20240 |
+ |
20241 |
++extern bool iommu_dma_forcedac; |
20242 |
++ |
20243 |
+ #else /* CONFIG_IOMMU_DMA */ |
20244 |
+ |
20245 |
+ struct iommu_domain; |
20246 |
+diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h |
20247 |
+index 2a0da841c942f..4ef77deaf7918 100644 |
20248 |
+--- a/include/linux/firmware/xlnx-zynqmp.h |
20249 |
++++ b/include/linux/firmware/xlnx-zynqmp.h |
20250 |
+@@ -355,11 +355,6 @@ int zynqmp_pm_read_pggs(u32 index, u32 *value); |
20251 |
+ int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype); |
20252 |
+ int zynqmp_pm_set_boot_health_status(u32 value); |
20253 |
+ #else |
20254 |
+-static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void) |
20255 |
+-{ |
20256 |
+- return ERR_PTR(-ENODEV); |
20257 |
+-} |
20258 |
+- |
20259 |
+ static inline int zynqmp_pm_get_api_version(u32 *version) |
20260 |
+ { |
20261 |
+ return -ENODEV; |
20262 |
+diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h |
20263 |
+index 286de0520574e..ecf0032a09954 100644 |
20264 |
+--- a/include/linux/gpio/driver.h |
20265 |
++++ b/include/linux/gpio/driver.h |
20266 |
+@@ -624,8 +624,17 @@ void gpiochip_irq_domain_deactivate(struct irq_domain *domain, |
20267 |
+ bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gc, |
20268 |
+ unsigned int offset); |
20269 |
+ |
20270 |
++#ifdef CONFIG_GPIOLIB_IRQCHIP |
20271 |
+ int gpiochip_irqchip_add_domain(struct gpio_chip *gc, |
20272 |
+ struct irq_domain *domain); |
20273 |
++#else |
20274 |
++static inline int gpiochip_irqchip_add_domain(struct gpio_chip *gc, |
20275 |
++ struct irq_domain *domain) |
20276 |
++{ |
20277 |
++ WARN_ON(1); |
20278 |
++ return -EINVAL; |
20279 |
++} |
20280 |
++#endif |
20281 |
+ |
20282 |
+ int gpiochip_generic_request(struct gpio_chip *gc, unsigned int offset); |
20283 |
+ void gpiochip_generic_free(struct gpio_chip *gc, unsigned int offset); |
20284 |
+diff --git a/include/linux/hid.h b/include/linux/hid.h |
20285 |
+index c39d71eb1fd0a..6bf6feb3db7c1 100644 |
20286 |
+--- a/include/linux/hid.h |
20287 |
++++ b/include/linux/hid.h |
20288 |
+@@ -262,6 +262,8 @@ struct hid_item { |
20289 |
+ #define HID_CP_SELECTION 0x000c0080 |
20290 |
+ #define HID_CP_MEDIASELECTION 0x000c0087 |
20291 |
+ #define HID_CP_SELECTDISC 0x000c00ba |
20292 |
++#define HID_CP_VOLUMEUP 0x000c00e9 |
20293 |
++#define HID_CP_VOLUMEDOWN 0x000c00ea |
20294 |
+ #define HID_CP_PLAYBACKSPEED 0x000c00f1 |
20295 |
+ #define HID_CP_PROXIMITY 0x000c0109 |
20296 |
+ #define HID_CP_SPEAKERSYSTEM 0x000c0160 |
20297 |
+diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h |
20298 |
+index 09c6a0bf38928..ce30ea103b8d6 100644 |
20299 |
+--- a/include/linux/intel-iommu.h |
20300 |
++++ b/include/linux/intel-iommu.h |
20301 |
+@@ -42,6 +42,8 @@ |
20302 |
+ |
20303 |
+ #define DMA_FL_PTE_PRESENT BIT_ULL(0) |
20304 |
+ #define DMA_FL_PTE_US BIT_ULL(2) |
20305 |
++#define DMA_FL_PTE_ACCESS BIT_ULL(5) |
20306 |
++#define DMA_FL_PTE_DIRTY BIT_ULL(6) |
20307 |
+ #define DMA_FL_PTE_XD BIT_ULL(63) |
20308 |
+ |
20309 |
+ #define ADDR_WIDTH_5LEVEL (57) |
20310 |
+@@ -367,6 +369,7 @@ enum { |
20311 |
+ /* PASID cache invalidation granu */ |
20312 |
+ #define QI_PC_ALL_PASIDS 0 |
20313 |
+ #define QI_PC_PASID_SEL 1 |
20314 |
++#define QI_PC_GLOBAL 3 |
20315 |
+ |
20316 |
+ #define QI_EIOTLB_ADDR(addr) ((u64)(addr) & VTD_PAGE_MASK) |
20317 |
+ #define QI_EIOTLB_IH(ih) (((u64)ih) << 6) |
20318 |
+diff --git a/include/linux/iommu.h b/include/linux/iommu.h |
20319 |
+index d63d3e9cc7b67..3e82f0dce3cce 100644 |
20320 |
+--- a/include/linux/iommu.h |
20321 |
++++ b/include/linux/iommu.h |
20322 |
+@@ -546,7 +546,7 @@ static inline void iommu_iotlb_gather_add_page(struct iommu_domain *domain, |
20323 |
+ * structure can be rewritten. |
20324 |
+ */ |
20325 |
+ if (gather->pgsize != size || |
20326 |
+- end < gather->start || start > gather->end) { |
20327 |
++ end + 1 < gather->start || start > gather->end + 1) { |
20328 |
+ if (gather->pgsize) |
20329 |
+ iommu_iotlb_sync(domain, gather); |
20330 |
+ gather->pgsize = size; |
20331 |
+diff --git a/include/linux/kvm_host.h b/include/linux/kvm_host.h |
20332 |
+index f3b1013fb22cf..aa9dd308996b9 100644 |
20333 |
+--- a/include/linux/kvm_host.h |
20334 |
++++ b/include/linux/kvm_host.h |
20335 |
+@@ -191,8 +191,8 @@ int kvm_io_bus_read(struct kvm_vcpu *vcpu, enum kvm_bus bus_idx, gpa_t addr, |
20336 |
+ int len, void *val); |
20337 |
+ int kvm_io_bus_register_dev(struct kvm *kvm, enum kvm_bus bus_idx, gpa_t addr, |
20338 |
+ int len, struct kvm_io_device *dev); |
20339 |
+-void kvm_io_bus_unregister_dev(struct kvm *kvm, enum kvm_bus bus_idx, |
20340 |
+- struct kvm_io_device *dev); |
20341 |
++int kvm_io_bus_unregister_dev(struct kvm *kvm, enum kvm_bus bus_idx, |
20342 |
++ struct kvm_io_device *dev); |
20343 |
+ struct kvm_io_device *kvm_io_bus_get_dev(struct kvm *kvm, enum kvm_bus bus_idx, |
20344 |
+ gpa_t addr); |
20345 |
+ |
20346 |
+diff --git a/include/linux/platform_device.h b/include/linux/platform_device.h |
20347 |
+index 3f23f6e430bfa..cd81e060863c9 100644 |
20348 |
+--- a/include/linux/platform_device.h |
20349 |
++++ b/include/linux/platform_device.h |
20350 |
+@@ -359,4 +359,7 @@ static inline int is_sh_early_platform_device(struct platform_device *pdev) |
20351 |
+ } |
20352 |
+ #endif /* CONFIG_SUPERH */ |
20353 |
+ |
20354 |
++/* For now only SuperH uses it */ |
20355 |
++void early_platform_cleanup(void); |
20356 |
++ |
20357 |
+ #endif /* _PLATFORM_DEVICE_H_ */ |
20358 |
+diff --git a/include/linux/pm_runtime.h b/include/linux/pm_runtime.h |
20359 |
+index b492ae00cc908..6c08a085367bf 100644 |
20360 |
+--- a/include/linux/pm_runtime.h |
20361 |
++++ b/include/linux/pm_runtime.h |
20362 |
+@@ -265,7 +265,7 @@ static inline void pm_runtime_no_callbacks(struct device *dev) {} |
20363 |
+ static inline void pm_runtime_irq_safe(struct device *dev) {} |
20364 |
+ static inline bool pm_runtime_is_irq_safe(struct device *dev) { return false; } |
20365 |
+ |
20366 |
+-static inline bool pm_runtime_callbacks_present(struct device *dev) { return false; } |
20367 |
++static inline bool pm_runtime_has_no_callbacks(struct device *dev) { return false; } |
20368 |
+ static inline void pm_runtime_mark_last_busy(struct device *dev) {} |
20369 |
+ static inline void __pm_runtime_use_autosuspend(struct device *dev, |
20370 |
+ bool use) {} |
20371 |
+diff --git a/include/linux/smp.h b/include/linux/smp.h |
20372 |
+index 70c6f6284dcf6..238a3f97a415b 100644 |
20373 |
+--- a/include/linux/smp.h |
20374 |
++++ b/include/linux/smp.h |
20375 |
+@@ -73,7 +73,7 @@ void on_each_cpu_cond(smp_cond_func_t cond_func, smp_call_func_t func, |
20376 |
+ void on_each_cpu_cond_mask(smp_cond_func_t cond_func, smp_call_func_t func, |
20377 |
+ void *info, bool wait, const struct cpumask *mask); |
20378 |
+ |
20379 |
+-int smp_call_function_single_async(int cpu, call_single_data_t *csd); |
20380 |
++int smp_call_function_single_async(int cpu, struct __call_single_data *csd); |
20381 |
+ |
20382 |
+ #ifdef CONFIG_SMP |
20383 |
+ |
20384 |
+diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h |
20385 |
+index aa09fdc8042db..f939d8d665d3a 100644 |
20386 |
+--- a/include/linux/spi/spi.h |
20387 |
++++ b/include/linux/spi/spi.h |
20388 |
+@@ -512,6 +512,9 @@ struct spi_controller { |
20389 |
+ |
20390 |
+ #define SPI_MASTER_GPIO_SS BIT(5) /* GPIO CS must select slave */ |
20391 |
+ |
20392 |
++ /* flag indicating this is a non-devres managed controller */ |
20393 |
++ bool devm_allocated; |
20394 |
++ |
20395 |
+ /* flag indicating this is an SPI slave controller */ |
20396 |
+ bool slave; |
20397 |
+ |
20398 |
+diff --git a/include/linux/tty_driver.h b/include/linux/tty_driver.h |
20399 |
+index 61c3372d3f328..2f719b471d524 100644 |
20400 |
+--- a/include/linux/tty_driver.h |
20401 |
++++ b/include/linux/tty_driver.h |
20402 |
+@@ -228,7 +228,7 @@ |
20403 |
+ * |
20404 |
+ * Called when the device receives a TIOCGICOUNT ioctl. Passed a kernel |
20405 |
+ * structure to complete. This method is optional and will only be called |
20406 |
+- * if provided (otherwise EINVAL will be returned). |
20407 |
++ * if provided (otherwise ENOTTY will be returned). |
20408 |
+ */ |
20409 |
+ |
20410 |
+ #include <linux/export.h> |
20411 |
+diff --git a/include/linux/udp.h b/include/linux/udp.h |
20412 |
+index aa84597bdc33c..ae58ff3b6b5b8 100644 |
20413 |
+--- a/include/linux/udp.h |
20414 |
++++ b/include/linux/udp.h |
20415 |
+@@ -51,7 +51,9 @@ struct udp_sock { |
20416 |
+ * different encapsulation layer set |
20417 |
+ * this |
20418 |
+ */ |
20419 |
+- gro_enabled:1; /* Can accept GRO packets */ |
20420 |
++ gro_enabled:1, /* Request GRO aggregation */ |
20421 |
++ accept_udp_l4:1, |
20422 |
++ accept_udp_fraglist:1; |
20423 |
+ /* |
20424 |
+ * Following member retains the information to create a UDP header |
20425 |
+ * when the socket is uncorked. |
20426 |
+@@ -131,8 +133,16 @@ static inline void udp_cmsg_recv(struct msghdr *msg, struct sock *sk, |
20427 |
+ |
20428 |
+ static inline bool udp_unexpected_gso(struct sock *sk, struct sk_buff *skb) |
20429 |
+ { |
20430 |
+- return !udp_sk(sk)->gro_enabled && skb_is_gso(skb) && |
20431 |
+- skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4; |
20432 |
++ if (!skb_is_gso(skb)) |
20433 |
++ return false; |
20434 |
++ |
20435 |
++ if (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4 && !udp_sk(sk)->accept_udp_l4) |
20436 |
++ return true; |
20437 |
++ |
20438 |
++ if (skb_shinfo(skb)->gso_type & SKB_GSO_FRAGLIST && !udp_sk(sk)->accept_udp_fraglist) |
20439 |
++ return true; |
20440 |
++ |
20441 |
++ return false; |
20442 |
+ } |
20443 |
+ |
20444 |
+ #define udp_portaddr_for_each_entry(__sk, list) \ |
20445 |
+diff --git a/include/net/addrconf.h b/include/net/addrconf.h |
20446 |
+index 18f783dcd55fa..78ea3e332688f 100644 |
20447 |
+--- a/include/net/addrconf.h |
20448 |
++++ b/include/net/addrconf.h |
20449 |
+@@ -233,7 +233,6 @@ void ipv6_mc_unmap(struct inet6_dev *idev); |
20450 |
+ void ipv6_mc_remap(struct inet6_dev *idev); |
20451 |
+ void ipv6_mc_init_dev(struct inet6_dev *idev); |
20452 |
+ void ipv6_mc_destroy_dev(struct inet6_dev *idev); |
20453 |
+-int ipv6_mc_check_icmpv6(struct sk_buff *skb); |
20454 |
+ int ipv6_mc_check_mld(struct sk_buff *skb); |
20455 |
+ void addrconf_dad_failure(struct sk_buff *skb, struct inet6_ifaddr *ifp); |
20456 |
+ |
20457 |
+diff --git a/include/net/bluetooth/hci_core.h b/include/net/bluetooth/hci_core.h |
20458 |
+index 677a8c50b2ad0..431ba5d1b506b 100644 |
20459 |
+--- a/include/net/bluetooth/hci_core.h |
20460 |
++++ b/include/net/bluetooth/hci_core.h |
20461 |
+@@ -686,6 +686,7 @@ struct hci_chan { |
20462 |
+ struct sk_buff_head data_q; |
20463 |
+ unsigned int sent; |
20464 |
+ __u8 state; |
20465 |
++ bool amp; |
20466 |
+ }; |
20467 |
+ |
20468 |
+ struct hci_conn_params { |
20469 |
+diff --git a/include/net/netfilter/nf_tables_offload.h b/include/net/netfilter/nf_tables_offload.h |
20470 |
+index 1d34fe154fe0b..434a6158852f3 100644 |
20471 |
+--- a/include/net/netfilter/nf_tables_offload.h |
20472 |
++++ b/include/net/netfilter/nf_tables_offload.h |
20473 |
+@@ -4,11 +4,16 @@ |
20474 |
+ #include <net/flow_offload.h> |
20475 |
+ #include <net/netfilter/nf_tables.h> |
20476 |
+ |
20477 |
++enum nft_offload_reg_flags { |
20478 |
++ NFT_OFFLOAD_F_NETWORK2HOST = (1 << 0), |
20479 |
++}; |
20480 |
++ |
20481 |
+ struct nft_offload_reg { |
20482 |
+ u32 key; |
20483 |
+ u32 len; |
20484 |
+ u32 base_offset; |
20485 |
+ u32 offset; |
20486 |
++ u32 flags; |
20487 |
+ struct nft_data data; |
20488 |
+ struct nft_data mask; |
20489 |
+ }; |
20490 |
+@@ -45,6 +50,7 @@ struct nft_flow_key { |
20491 |
+ struct flow_dissector_key_ports tp; |
20492 |
+ struct flow_dissector_key_ip ip; |
20493 |
+ struct flow_dissector_key_vlan vlan; |
20494 |
++ struct flow_dissector_key_vlan cvlan; |
20495 |
+ struct flow_dissector_key_eth_addrs eth_addrs; |
20496 |
+ struct flow_dissector_key_meta meta; |
20497 |
+ } __aligned(BITS_PER_LONG / 8); /* Ensure that we can do comparisons as longs. */ |
20498 |
+@@ -71,13 +77,17 @@ struct nft_flow_rule *nft_flow_rule_create(struct net *net, const struct nft_rul |
20499 |
+ void nft_flow_rule_destroy(struct nft_flow_rule *flow); |
20500 |
+ int nft_flow_rule_offload_commit(struct net *net); |
20501 |
+ |
20502 |
+-#define NFT_OFFLOAD_MATCH(__key, __base, __field, __len, __reg) \ |
20503 |
++#define NFT_OFFLOAD_MATCH_FLAGS(__key, __base, __field, __len, __reg, __flags) \ |
20504 |
+ (__reg)->base_offset = \ |
20505 |
+ offsetof(struct nft_flow_key, __base); \ |
20506 |
+ (__reg)->offset = \ |
20507 |
+ offsetof(struct nft_flow_key, __base.__field); \ |
20508 |
+ (__reg)->len = __len; \ |
20509 |
+ (__reg)->key = __key; \ |
20510 |
++ (__reg)->flags = __flags; |
20511 |
++ |
20512 |
++#define NFT_OFFLOAD_MATCH(__key, __base, __field, __len, __reg) \ |
20513 |
++ NFT_OFFLOAD_MATCH_FLAGS(__key, __base, __field, __len, __reg, 0) |
20514 |
+ |
20515 |
+ #define NFT_OFFLOAD_MATCH_EXACT(__key, __base, __field, __len, __reg) \ |
20516 |
+ NFT_OFFLOAD_MATCH(__key, __base, __field, __len, __reg) \ |
20517 |
+diff --git a/include/uapi/linux/tty_flags.h b/include/uapi/linux/tty_flags.h |
20518 |
+index 900a32e634247..6a3ac496a56c1 100644 |
20519 |
+--- a/include/uapi/linux/tty_flags.h |
20520 |
++++ b/include/uapi/linux/tty_flags.h |
20521 |
+@@ -39,7 +39,7 @@ |
20522 |
+ * WARNING: These flags are no longer used and have been superceded by the |
20523 |
+ * TTY_PORT_ flags in the iflags field (and not userspace-visible) |
20524 |
+ */ |
20525 |
+-#ifndef _KERNEL_ |
20526 |
++#ifndef __KERNEL__ |
20527 |
+ #define ASYNCB_INITIALIZED 31 /* Serial port was initialized */ |
20528 |
+ #define ASYNCB_SUSPENDED 30 /* Serial port is suspended */ |
20529 |
+ #define ASYNCB_NORMAL_ACTIVE 29 /* Normal device is active */ |
20530 |
+@@ -81,7 +81,7 @@ |
20531 |
+ #define ASYNC_SPD_WARP (ASYNC_SPD_HI|ASYNC_SPD_SHI) |
20532 |
+ #define ASYNC_SPD_MASK (ASYNC_SPD_HI|ASYNC_SPD_VHI|ASYNC_SPD_SHI) |
20533 |
+ |
20534 |
+-#ifndef _KERNEL_ |
20535 |
++#ifndef __KERNEL__ |
20536 |
+ /* These flags are no longer used (and were always masked from userspace) */ |
20537 |
+ #define ASYNC_INITIALIZED (1U << ASYNCB_INITIALIZED) |
20538 |
+ #define ASYNC_NORMAL_ACTIVE (1U << ASYNCB_NORMAL_ACTIVE) |
20539 |
+diff --git a/init/init_task.c b/init/init_task.c |
20540 |
+index 3711cdaafed2f..8b08c2e19cbb5 100644 |
20541 |
+--- a/init/init_task.c |
20542 |
++++ b/init/init_task.c |
20543 |
+@@ -210,7 +210,7 @@ struct task_struct init_task |
20544 |
+ #ifdef CONFIG_SECURITY |
20545 |
+ .security = NULL, |
20546 |
+ #endif |
20547 |
+-#ifdef CONFIG_SECCOMP |
20548 |
++#ifdef CONFIG_SECCOMP_FILTER |
20549 |
+ .seccomp = { .filter_count = ATOMIC_INIT(0) }, |
20550 |
+ #endif |
20551 |
+ }; |
20552 |
+diff --git a/kernel/bpf/ringbuf.c b/kernel/bpf/ringbuf.c |
20553 |
+index f25b719ac7868..84b3b35fc0d05 100644 |
20554 |
+--- a/kernel/bpf/ringbuf.c |
20555 |
++++ b/kernel/bpf/ringbuf.c |
20556 |
+@@ -221,25 +221,20 @@ static int ringbuf_map_get_next_key(struct bpf_map *map, void *key, |
20557 |
+ return -ENOTSUPP; |
20558 |
+ } |
20559 |
+ |
20560 |
+-static size_t bpf_ringbuf_mmap_page_cnt(const struct bpf_ringbuf *rb) |
20561 |
+-{ |
20562 |
+- size_t data_pages = (rb->mask + 1) >> PAGE_SHIFT; |
20563 |
+- |
20564 |
+- /* consumer page + producer page + 2 x data pages */ |
20565 |
+- return RINGBUF_POS_PAGES + 2 * data_pages; |
20566 |
+-} |
20567 |
+- |
20568 |
+ static int ringbuf_map_mmap(struct bpf_map *map, struct vm_area_struct *vma) |
20569 |
+ { |
20570 |
+ struct bpf_ringbuf_map *rb_map; |
20571 |
+- size_t mmap_sz; |
20572 |
+ |
20573 |
+ rb_map = container_of(map, struct bpf_ringbuf_map, map); |
20574 |
+- mmap_sz = bpf_ringbuf_mmap_page_cnt(rb_map->rb) << PAGE_SHIFT; |
20575 |
+- |
20576 |
+- if (vma->vm_pgoff * PAGE_SIZE + (vma->vm_end - vma->vm_start) > mmap_sz) |
20577 |
+- return -EINVAL; |
20578 |
+ |
20579 |
++ if (vma->vm_flags & VM_WRITE) { |
20580 |
++ /* allow writable mapping for the consumer_pos only */ |
20581 |
++ if (vma->vm_pgoff != 0 || vma->vm_end - vma->vm_start != PAGE_SIZE) |
20582 |
++ return -EPERM; |
20583 |
++ } else { |
20584 |
++ vma->vm_flags &= ~VM_MAYWRITE; |
20585 |
++ } |
20586 |
++ /* remap_vmalloc_range() checks size and offset constraints */ |
20587 |
+ return remap_vmalloc_range(vma, rb_map->rb, |
20588 |
+ vma->vm_pgoff + RINGBUF_PGOFF); |
20589 |
+ } |
20590 |
+@@ -315,6 +310,9 @@ static void *__bpf_ringbuf_reserve(struct bpf_ringbuf *rb, u64 size) |
20591 |
+ return NULL; |
20592 |
+ |
20593 |
+ len = round_up(size + BPF_RINGBUF_HDR_SZ, 8); |
20594 |
++ if (len > rb->mask + 1) |
20595 |
++ return NULL; |
20596 |
++ |
20597 |
+ cons_pos = smp_load_acquire(&rb->consumer_pos); |
20598 |
+ |
20599 |
+ if (in_nmi()) { |
20600 |
+diff --git a/kernel/bpf/verifier.c b/kernel/bpf/verifier.c |
20601 |
+index 4e4a844a68c30..80dbb5da73380 100644 |
20602 |
+--- a/kernel/bpf/verifier.c |
20603 |
++++ b/kernel/bpf/verifier.c |
20604 |
+@@ -1304,9 +1304,7 @@ static bool __reg64_bound_s32(s64 a) |
20605 |
+ |
20606 |
+ static bool __reg64_bound_u32(u64 a) |
20607 |
+ { |
20608 |
+- if (a > U32_MIN && a < U32_MAX) |
20609 |
+- return true; |
20610 |
+- return false; |
20611 |
++ return a > U32_MIN && a < U32_MAX; |
20612 |
+ } |
20613 |
+ |
20614 |
+ static void __reg_combine_64_into_32(struct bpf_reg_state *reg) |
20615 |
+@@ -1317,10 +1315,10 @@ static void __reg_combine_64_into_32(struct bpf_reg_state *reg) |
20616 |
+ reg->s32_min_value = (s32)reg->smin_value; |
20617 |
+ reg->s32_max_value = (s32)reg->smax_value; |
20618 |
+ } |
20619 |
+- if (__reg64_bound_u32(reg->umin_value)) |
20620 |
++ if (__reg64_bound_u32(reg->umin_value) && __reg64_bound_u32(reg->umax_value)) { |
20621 |
+ reg->u32_min_value = (u32)reg->umin_value; |
20622 |
+- if (__reg64_bound_u32(reg->umax_value)) |
20623 |
+ reg->u32_max_value = (u32)reg->umax_value; |
20624 |
++ } |
20625 |
+ |
20626 |
+ /* Intersecting with the old var_off might have improved our bounds |
20627 |
+ * slightly. e.g. if umax was 0x7f...f and var_off was (0; 0xf...fc), |
20628 |
+@@ -6398,11 +6396,10 @@ static void scalar32_min_max_and(struct bpf_reg_state *dst_reg, |
20629 |
+ s32 smin_val = src_reg->s32_min_value; |
20630 |
+ u32 umax_val = src_reg->u32_max_value; |
20631 |
+ |
20632 |
+- /* Assuming scalar64_min_max_and will be called so its safe |
20633 |
+- * to skip updating register for known 32-bit case. |
20634 |
+- */ |
20635 |
+- if (src_known && dst_known) |
20636 |
++ if (src_known && dst_known) { |
20637 |
++ __mark_reg32_known(dst_reg, var32_off.value); |
20638 |
+ return; |
20639 |
++ } |
20640 |
+ |
20641 |
+ /* We get our minimum from the var_off, since that's inherently |
20642 |
+ * bitwise. Our maximum is the minimum of the operands' maxima. |
20643 |
+@@ -6422,7 +6419,6 @@ static void scalar32_min_max_and(struct bpf_reg_state *dst_reg, |
20644 |
+ dst_reg->s32_min_value = dst_reg->u32_min_value; |
20645 |
+ dst_reg->s32_max_value = dst_reg->u32_max_value; |
20646 |
+ } |
20647 |
+- |
20648 |
+ } |
20649 |
+ |
20650 |
+ static void scalar_min_max_and(struct bpf_reg_state *dst_reg, |
20651 |
+@@ -6469,11 +6465,10 @@ static void scalar32_min_max_or(struct bpf_reg_state *dst_reg, |
20652 |
+ s32 smin_val = src_reg->s32_min_value; |
20653 |
+ u32 umin_val = src_reg->u32_min_value; |
20654 |
+ |
20655 |
+- /* Assuming scalar64_min_max_or will be called so it is safe |
20656 |
+- * to skip updating register for known case. |
20657 |
+- */ |
20658 |
+- if (src_known && dst_known) |
20659 |
++ if (src_known && dst_known) { |
20660 |
++ __mark_reg32_known(dst_reg, var32_off.value); |
20661 |
+ return; |
20662 |
++ } |
20663 |
+ |
20664 |
+ /* We get our maximum from the var_off, and our minimum is the |
20665 |
+ * maximum of the operands' minima |
20666 |
+@@ -6538,11 +6533,10 @@ static void scalar32_min_max_xor(struct bpf_reg_state *dst_reg, |
20667 |
+ struct tnum var32_off = tnum_subreg(dst_reg->var_off); |
20668 |
+ s32 smin_val = src_reg->s32_min_value; |
20669 |
+ |
20670 |
+- /* Assuming scalar64_min_max_xor will be called so it is safe |
20671 |
+- * to skip updating register for known case. |
20672 |
+- */ |
20673 |
+- if (src_known && dst_known) |
20674 |
++ if (src_known && dst_known) { |
20675 |
++ __mark_reg32_known(dst_reg, var32_off.value); |
20676 |
+ return; |
20677 |
++ } |
20678 |
+ |
20679 |
+ /* We get both minimum and maximum from the var32_off. */ |
20680 |
+ dst_reg->u32_min_value = var32_off.value; |
20681 |
+diff --git a/kernel/kthread.c b/kernel/kthread.c |
20682 |
+index 1578973c57409..6d3c488a0f824 100644 |
20683 |
+--- a/kernel/kthread.c |
20684 |
++++ b/kernel/kthread.c |
20685 |
+@@ -84,6 +84,25 @@ static inline struct kthread *to_kthread(struct task_struct *k) |
20686 |
+ return (__force void *)k->set_child_tid; |
20687 |
+ } |
20688 |
+ |
20689 |
++/* |
20690 |
++ * Variant of to_kthread() that doesn't assume @p is a kthread. |
20691 |
++ * |
20692 |
++ * Per construction; when: |
20693 |
++ * |
20694 |
++ * (p->flags & PF_KTHREAD) && p->set_child_tid |
20695 |
++ * |
20696 |
++ * the task is both a kthread and struct kthread is persistent. However |
20697 |
++ * PF_KTHREAD on it's own is not, kernel_thread() can exec() (See umh.c and |
20698 |
++ * begin_new_exec()). |
20699 |
++ */ |
20700 |
++static inline struct kthread *__to_kthread(struct task_struct *p) |
20701 |
++{ |
20702 |
++ void *kthread = (__force void *)p->set_child_tid; |
20703 |
++ if (kthread && !(p->flags & PF_KTHREAD)) |
20704 |
++ kthread = NULL; |
20705 |
++ return kthread; |
20706 |
++} |
20707 |
++ |
20708 |
+ void free_kthread_struct(struct task_struct *k) |
20709 |
+ { |
20710 |
+ struct kthread *kthread; |
20711 |
+@@ -168,8 +187,9 @@ EXPORT_SYMBOL_GPL(kthread_freezable_should_stop); |
20712 |
+ */ |
20713 |
+ void *kthread_func(struct task_struct *task) |
20714 |
+ { |
20715 |
+- if (task->flags & PF_KTHREAD) |
20716 |
+- return to_kthread(task)->threadfn; |
20717 |
++ struct kthread *kthread = __to_kthread(task); |
20718 |
++ if (kthread) |
20719 |
++ return kthread->threadfn; |
20720 |
+ return NULL; |
20721 |
+ } |
20722 |
+ EXPORT_SYMBOL_GPL(kthread_func); |
20723 |
+@@ -199,10 +219,11 @@ EXPORT_SYMBOL_GPL(kthread_data); |
20724 |
+ */ |
20725 |
+ void *kthread_probe_data(struct task_struct *task) |
20726 |
+ { |
20727 |
+- struct kthread *kthread = to_kthread(task); |
20728 |
++ struct kthread *kthread = __to_kthread(task); |
20729 |
+ void *data = NULL; |
20730 |
+ |
20731 |
+- copy_from_kernel_nofault(&data, &kthread->data, sizeof(data)); |
20732 |
++ if (kthread) |
20733 |
++ copy_from_kernel_nofault(&data, &kthread->data, sizeof(data)); |
20734 |
+ return data; |
20735 |
+ } |
20736 |
+ |
20737 |
+@@ -514,9 +535,9 @@ void kthread_set_per_cpu(struct task_struct *k, int cpu) |
20738 |
+ set_bit(KTHREAD_IS_PER_CPU, &kthread->flags); |
20739 |
+ } |
20740 |
+ |
20741 |
+-bool kthread_is_per_cpu(struct task_struct *k) |
20742 |
++bool kthread_is_per_cpu(struct task_struct *p) |
20743 |
+ { |
20744 |
+- struct kthread *kthread = to_kthread(k); |
20745 |
++ struct kthread *kthread = __to_kthread(p); |
20746 |
+ if (!kthread) |
20747 |
+ return false; |
20748 |
+ |
20749 |
+diff --git a/kernel/printk/printk.c b/kernel/printk/printk.c |
20750 |
+index 575a34b88936f..77ae2704e979c 100644 |
20751 |
+--- a/kernel/printk/printk.c |
20752 |
++++ b/kernel/printk/printk.c |
20753 |
+@@ -1494,6 +1494,7 @@ static int syslog_print_all(char __user *buf, int size, bool clear) |
20754 |
+ struct printk_info info; |
20755 |
+ unsigned int line_count; |
20756 |
+ struct printk_record r; |
20757 |
++ u64 max_seq; |
20758 |
+ char *text; |
20759 |
+ int len = 0; |
20760 |
+ u64 seq; |
20761 |
+@@ -1512,9 +1513,15 @@ static int syslog_print_all(char __user *buf, int size, bool clear) |
20762 |
+ prb_for_each_info(clear_seq, prb, seq, &info, &line_count) |
20763 |
+ len += get_record_print_text_size(&info, line_count, true, time); |
20764 |
+ |
20765 |
++ /* |
20766 |
++ * Set an upper bound for the next loop to avoid subtracting lengths |
20767 |
++ * that were never added. |
20768 |
++ */ |
20769 |
++ max_seq = seq; |
20770 |
++ |
20771 |
+ /* move first record forward until length fits into the buffer */ |
20772 |
+ prb_for_each_info(clear_seq, prb, seq, &info, &line_count) { |
20773 |
+- if (len <= size) |
20774 |
++ if (len <= size || info.seq >= max_seq) |
20775 |
+ break; |
20776 |
+ len -= get_record_print_text_size(&info, line_count, true, time); |
20777 |
+ } |
20778 |
+diff --git a/kernel/rcu/tree.c b/kernel/rcu/tree.c |
20779 |
+index 84a3fe09630b3..e7d8a0d8ea7cc 100644 |
20780 |
+--- a/kernel/rcu/tree.c |
20781 |
++++ b/kernel/rcu/tree.c |
20782 |
+@@ -1072,7 +1072,6 @@ noinstr void rcu_nmi_enter(void) |
20783 |
+ } else if (!in_nmi()) { |
20784 |
+ instrumentation_begin(); |
20785 |
+ rcu_irq_enter_check_tick(); |
20786 |
+- instrumentation_end(); |
20787 |
+ } else { |
20788 |
+ instrumentation_begin(); |
20789 |
+ } |
20790 |
+diff --git a/kernel/sched/core.c b/kernel/sched/core.c |
20791 |
+index f0056507a373d..c5fcb5ce21944 100644 |
20792 |
+--- a/kernel/sched/core.c |
20793 |
++++ b/kernel/sched/core.c |
20794 |
+@@ -7290,7 +7290,7 @@ static void balance_push(struct rq *rq) |
20795 |
+ * histerical raisins. |
20796 |
+ */ |
20797 |
+ if (rq->idle == push_task || |
20798 |
+- ((push_task->flags & PF_KTHREAD) && kthread_is_per_cpu(push_task)) || |
20799 |
++ kthread_is_per_cpu(push_task) || |
20800 |
+ is_migration_disabled(push_task)) { |
20801 |
+ |
20802 |
+ /* |
20803 |
+diff --git a/kernel/sched/debug.c b/kernel/sched/debug.c |
20804 |
+index 2357921580f9c..6264584b51c25 100644 |
20805 |
+--- a/kernel/sched/debug.c |
20806 |
++++ b/kernel/sched/debug.c |
20807 |
+@@ -8,8 +8,6 @@ |
20808 |
+ */ |
20809 |
+ #include "sched.h" |
20810 |
+ |
20811 |
+-static DEFINE_SPINLOCK(sched_debug_lock); |
20812 |
+- |
20813 |
+ /* |
20814 |
+ * This allows printing both to /proc/sched_debug and |
20815 |
+ * to the console |
20816 |
+@@ -470,16 +468,37 @@ static void print_cfs_group_stats(struct seq_file *m, int cpu, struct task_group |
20817 |
+ #endif |
20818 |
+ |
20819 |
+ #ifdef CONFIG_CGROUP_SCHED |
20820 |
++static DEFINE_SPINLOCK(sched_debug_lock); |
20821 |
+ static char group_path[PATH_MAX]; |
20822 |
+ |
20823 |
+-static char *task_group_path(struct task_group *tg) |
20824 |
++static void task_group_path(struct task_group *tg, char *path, int plen) |
20825 |
+ { |
20826 |
+- if (autogroup_path(tg, group_path, PATH_MAX)) |
20827 |
+- return group_path; |
20828 |
++ if (autogroup_path(tg, path, plen)) |
20829 |
++ return; |
20830 |
+ |
20831 |
+- cgroup_path(tg->css.cgroup, group_path, PATH_MAX); |
20832 |
++ cgroup_path(tg->css.cgroup, path, plen); |
20833 |
++} |
20834 |
+ |
20835 |
+- return group_path; |
20836 |
++/* |
20837 |
++ * Only 1 SEQ_printf_task_group_path() caller can use the full length |
20838 |
++ * group_path[] for cgroup path. Other simultaneous callers will have |
20839 |
++ * to use a shorter stack buffer. A "..." suffix is appended at the end |
20840 |
++ * of the stack buffer so that it will show up in case the output length |
20841 |
++ * matches the given buffer size to indicate possible path name truncation. |
20842 |
++ */ |
20843 |
++#define SEQ_printf_task_group_path(m, tg, fmt...) \ |
20844 |
++{ \ |
20845 |
++ if (spin_trylock(&sched_debug_lock)) { \ |
20846 |
++ task_group_path(tg, group_path, sizeof(group_path)); \ |
20847 |
++ SEQ_printf(m, fmt, group_path); \ |
20848 |
++ spin_unlock(&sched_debug_lock); \ |
20849 |
++ } else { \ |
20850 |
++ char buf[128]; \ |
20851 |
++ char *bufend = buf + sizeof(buf) - 3; \ |
20852 |
++ task_group_path(tg, buf, bufend - buf); \ |
20853 |
++ strcpy(bufend - 1, "..."); \ |
20854 |
++ SEQ_printf(m, fmt, buf); \ |
20855 |
++ } \ |
20856 |
+ } |
20857 |
+ #endif |
20858 |
+ |
20859 |
+@@ -506,7 +525,7 @@ print_task(struct seq_file *m, struct rq *rq, struct task_struct *p) |
20860 |
+ SEQ_printf(m, " %d %d", task_node(p), task_numa_group_id(p)); |
20861 |
+ #endif |
20862 |
+ #ifdef CONFIG_CGROUP_SCHED |
20863 |
+- SEQ_printf(m, " %s", task_group_path(task_group(p))); |
20864 |
++ SEQ_printf_task_group_path(m, task_group(p), " %s") |
20865 |
+ #endif |
20866 |
+ |
20867 |
+ SEQ_printf(m, "\n"); |
20868 |
+@@ -543,7 +562,7 @@ void print_cfs_rq(struct seq_file *m, int cpu, struct cfs_rq *cfs_rq) |
20869 |
+ |
20870 |
+ #ifdef CONFIG_FAIR_GROUP_SCHED |
20871 |
+ SEQ_printf(m, "\n"); |
20872 |
+- SEQ_printf(m, "cfs_rq[%d]:%s\n", cpu, task_group_path(cfs_rq->tg)); |
20873 |
++ SEQ_printf_task_group_path(m, cfs_rq->tg, "cfs_rq[%d]:%s\n", cpu); |
20874 |
+ #else |
20875 |
+ SEQ_printf(m, "\n"); |
20876 |
+ SEQ_printf(m, "cfs_rq[%d]:\n", cpu); |
20877 |
+@@ -614,7 +633,7 @@ void print_rt_rq(struct seq_file *m, int cpu, struct rt_rq *rt_rq) |
20878 |
+ { |
20879 |
+ #ifdef CONFIG_RT_GROUP_SCHED |
20880 |
+ SEQ_printf(m, "\n"); |
20881 |
+- SEQ_printf(m, "rt_rq[%d]:%s\n", cpu, task_group_path(rt_rq->tg)); |
20882 |
++ SEQ_printf_task_group_path(m, rt_rq->tg, "rt_rq[%d]:%s\n", cpu); |
20883 |
+ #else |
20884 |
+ SEQ_printf(m, "\n"); |
20885 |
+ SEQ_printf(m, "rt_rq[%d]:\n", cpu); |
20886 |
+@@ -666,7 +685,6 @@ void print_dl_rq(struct seq_file *m, int cpu, struct dl_rq *dl_rq) |
20887 |
+ static void print_cpu(struct seq_file *m, int cpu) |
20888 |
+ { |
20889 |
+ struct rq *rq = cpu_rq(cpu); |
20890 |
+- unsigned long flags; |
20891 |
+ |
20892 |
+ #ifdef CONFIG_X86 |
20893 |
+ { |
20894 |
+@@ -717,13 +735,11 @@ do { \ |
20895 |
+ } |
20896 |
+ #undef P |
20897 |
+ |
20898 |
+- spin_lock_irqsave(&sched_debug_lock, flags); |
20899 |
+ print_cfs_stats(m, cpu); |
20900 |
+ print_rt_stats(m, cpu); |
20901 |
+ print_dl_stats(m, cpu); |
20902 |
+ |
20903 |
+ print_rq(m, rq, cpu); |
20904 |
+- spin_unlock_irqrestore(&sched_debug_lock, flags); |
20905 |
+ SEQ_printf(m, "\n"); |
20906 |
+ } |
20907 |
+ |
20908 |
+diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c |
20909 |
+index 828978320e447..f217e5251fb2f 100644 |
20910 |
+--- a/kernel/sched/fair.c |
20911 |
++++ b/kernel/sched/fair.c |
20912 |
+@@ -7588,7 +7588,7 @@ int can_migrate_task(struct task_struct *p, struct lb_env *env) |
20913 |
+ return 0; |
20914 |
+ |
20915 |
+ /* Disregard pcpu kthreads; they are where they need to be. */ |
20916 |
+- if ((p->flags & PF_KTHREAD) && kthread_is_per_cpu(p)) |
20917 |
++ if (kthread_is_per_cpu(p)) |
20918 |
+ return 0; |
20919 |
+ |
20920 |
+ if (!cpumask_test_cpu(env->dst_cpu, p->cpus_ptr)) { |
20921 |
+@@ -7760,8 +7760,7 @@ static int detach_tasks(struct lb_env *env) |
20922 |
+ * scheduler fails to find a good waiting task to |
20923 |
+ * migrate. |
20924 |
+ */ |
20925 |
+- |
20926 |
+- if ((load >> env->sd->nr_balance_failed) > env->imbalance) |
20927 |
++ if (shr_bound(load, env->sd->nr_balance_failed) > env->imbalance) |
20928 |
+ goto next; |
20929 |
+ |
20930 |
+ env->imbalance -= load; |
20931 |
+diff --git a/kernel/sched/sched.h b/kernel/sched/sched.h |
20932 |
+index 282a6bbaacd73..d52c6bb6ed7de 100644 |
20933 |
+--- a/kernel/sched/sched.h |
20934 |
++++ b/kernel/sched/sched.h |
20935 |
+@@ -204,6 +204,13 @@ static inline void update_avg(u64 *avg, u64 sample) |
20936 |
+ *avg += diff / 8; |
20937 |
+ } |
20938 |
+ |
20939 |
++/* |
20940 |
++ * Shifting a value by an exponent greater *or equal* to the size of said value |
20941 |
++ * is UB; cap at size-1. |
20942 |
++ */ |
20943 |
++#define shr_bound(val, shift) \ |
20944 |
++ (val >> min_t(typeof(shift), shift, BITS_PER_TYPE(typeof(val)) - 1)) |
20945 |
++ |
20946 |
+ /* |
20947 |
+ * !! For sched_setattr_nocheck() (kernel) only !! |
20948 |
+ * |
20949 |
+diff --git a/kernel/smp.c b/kernel/smp.c |
20950 |
+index aeb0adfa06063..c678589fbb767 100644 |
20951 |
+--- a/kernel/smp.c |
20952 |
++++ b/kernel/smp.c |
20953 |
+@@ -110,7 +110,7 @@ static DEFINE_PER_CPU(void *, cur_csd_info); |
20954 |
+ static atomic_t csd_bug_count = ATOMIC_INIT(0); |
20955 |
+ |
20956 |
+ /* Record current CSD work for current CPU, NULL to erase. */ |
20957 |
+-static void csd_lock_record(call_single_data_t *csd) |
20958 |
++static void csd_lock_record(struct __call_single_data *csd) |
20959 |
+ { |
20960 |
+ if (!csd) { |
20961 |
+ smp_mb(); /* NULL cur_csd after unlock. */ |
20962 |
+@@ -125,7 +125,7 @@ static void csd_lock_record(call_single_data_t *csd) |
20963 |
+ /* Or before unlock, as the case may be. */ |
20964 |
+ } |
20965 |
+ |
20966 |
+-static __always_inline int csd_lock_wait_getcpu(call_single_data_t *csd) |
20967 |
++static __always_inline int csd_lock_wait_getcpu(struct __call_single_data *csd) |
20968 |
+ { |
20969 |
+ unsigned int csd_type; |
20970 |
+ |
20971 |
+@@ -140,7 +140,7 @@ static __always_inline int csd_lock_wait_getcpu(call_single_data_t *csd) |
20972 |
+ * the CSD_TYPE_SYNC/ASYNC types provide the destination CPU, |
20973 |
+ * so waiting on other types gets much less information. |
20974 |
+ */ |
20975 |
+-static __always_inline bool csd_lock_wait_toolong(call_single_data_t *csd, u64 ts0, u64 *ts1, int *bug_id) |
20976 |
++static __always_inline bool csd_lock_wait_toolong(struct __call_single_data *csd, u64 ts0, u64 *ts1, int *bug_id) |
20977 |
+ { |
20978 |
+ int cpu = -1; |
20979 |
+ int cpux; |
20980 |
+@@ -204,7 +204,7 @@ static __always_inline bool csd_lock_wait_toolong(call_single_data_t *csd, u64 t |
20981 |
+ * previous function call. For multi-cpu calls its even more interesting |
20982 |
+ * as we'll have to ensure no other cpu is observing our csd. |
20983 |
+ */ |
20984 |
+-static __always_inline void csd_lock_wait(call_single_data_t *csd) |
20985 |
++static __always_inline void csd_lock_wait(struct __call_single_data *csd) |
20986 |
+ { |
20987 |
+ int bug_id = 0; |
20988 |
+ u64 ts0, ts1; |
20989 |
+@@ -219,17 +219,17 @@ static __always_inline void csd_lock_wait(call_single_data_t *csd) |
20990 |
+ } |
20991 |
+ |
20992 |
+ #else |
20993 |
+-static void csd_lock_record(call_single_data_t *csd) |
20994 |
++static void csd_lock_record(struct __call_single_data *csd) |
20995 |
+ { |
20996 |
+ } |
20997 |
+ |
20998 |
+-static __always_inline void csd_lock_wait(call_single_data_t *csd) |
20999 |
++static __always_inline void csd_lock_wait(struct __call_single_data *csd) |
21000 |
+ { |
21001 |
+ smp_cond_load_acquire(&csd->node.u_flags, !(VAL & CSD_FLAG_LOCK)); |
21002 |
+ } |
21003 |
+ #endif |
21004 |
+ |
21005 |
+-static __always_inline void csd_lock(call_single_data_t *csd) |
21006 |
++static __always_inline void csd_lock(struct __call_single_data *csd) |
21007 |
+ { |
21008 |
+ csd_lock_wait(csd); |
21009 |
+ csd->node.u_flags |= CSD_FLAG_LOCK; |
21010 |
+@@ -242,7 +242,7 @@ static __always_inline void csd_lock(call_single_data_t *csd) |
21011 |
+ smp_wmb(); |
21012 |
+ } |
21013 |
+ |
21014 |
+-static __always_inline void csd_unlock(call_single_data_t *csd) |
21015 |
++static __always_inline void csd_unlock(struct __call_single_data *csd) |
21016 |
+ { |
21017 |
+ WARN_ON(!(csd->node.u_flags & CSD_FLAG_LOCK)); |
21018 |
+ |
21019 |
+@@ -276,7 +276,7 @@ void __smp_call_single_queue(int cpu, struct llist_node *node) |
21020 |
+ * for execution on the given CPU. data must already have |
21021 |
+ * ->func, ->info, and ->flags set. |
21022 |
+ */ |
21023 |
+-static int generic_exec_single(int cpu, call_single_data_t *csd) |
21024 |
++static int generic_exec_single(int cpu, struct __call_single_data *csd) |
21025 |
+ { |
21026 |
+ if (cpu == smp_processor_id()) { |
21027 |
+ smp_call_func_t func = csd->func; |
21028 |
+@@ -542,7 +542,7 @@ EXPORT_SYMBOL(smp_call_function_single); |
21029 |
+ * NOTE: Be careful, there is unfortunately no current debugging facility to |
21030 |
+ * validate the correctness of this serialization. |
21031 |
+ */ |
21032 |
+-int smp_call_function_single_async(int cpu, call_single_data_t *csd) |
21033 |
++int smp_call_function_single_async(int cpu, struct __call_single_data *csd) |
21034 |
+ { |
21035 |
+ int err = 0; |
21036 |
+ |
21037 |
+diff --git a/kernel/up.c b/kernel/up.c |
21038 |
+index c6f323dcd45bb..4edd5493eba24 100644 |
21039 |
+--- a/kernel/up.c |
21040 |
++++ b/kernel/up.c |
21041 |
+@@ -25,7 +25,7 @@ int smp_call_function_single(int cpu, void (*func) (void *info), void *info, |
21042 |
+ } |
21043 |
+ EXPORT_SYMBOL(smp_call_function_single); |
21044 |
+ |
21045 |
+-int smp_call_function_single_async(int cpu, call_single_data_t *csd) |
21046 |
++int smp_call_function_single_async(int cpu, struct __call_single_data *csd) |
21047 |
+ { |
21048 |
+ unsigned long flags; |
21049 |
+ |
21050 |
+diff --git a/lib/bug.c b/lib/bug.c |
21051 |
+index 7103440c0ee1a..4ab398a2de938 100644 |
21052 |
+--- a/lib/bug.c |
21053 |
++++ b/lib/bug.c |
21054 |
+@@ -158,30 +158,27 @@ enum bug_trap_type report_bug(unsigned long bugaddr, struct pt_regs *regs) |
21055 |
+ |
21056 |
+ file = NULL; |
21057 |
+ line = 0; |
21058 |
+- warning = 0; |
21059 |
+ |
21060 |
+- if (bug) { |
21061 |
+ #ifdef CONFIG_DEBUG_BUGVERBOSE |
21062 |
+ #ifndef CONFIG_GENERIC_BUG_RELATIVE_POINTERS |
21063 |
+- file = bug->file; |
21064 |
++ file = bug->file; |
21065 |
+ #else |
21066 |
+- file = (const char *)bug + bug->file_disp; |
21067 |
++ file = (const char *)bug + bug->file_disp; |
21068 |
+ #endif |
21069 |
+- line = bug->line; |
21070 |
++ line = bug->line; |
21071 |
+ #endif |
21072 |
+- warning = (bug->flags & BUGFLAG_WARNING) != 0; |
21073 |
+- once = (bug->flags & BUGFLAG_ONCE) != 0; |
21074 |
+- done = (bug->flags & BUGFLAG_DONE) != 0; |
21075 |
+- |
21076 |
+- if (warning && once) { |
21077 |
+- if (done) |
21078 |
+- return BUG_TRAP_TYPE_WARN; |
21079 |
+- |
21080 |
+- /* |
21081 |
+- * Since this is the only store, concurrency is not an issue. |
21082 |
+- */ |
21083 |
+- bug->flags |= BUGFLAG_DONE; |
21084 |
+- } |
21085 |
++ warning = (bug->flags & BUGFLAG_WARNING) != 0; |
21086 |
++ once = (bug->flags & BUGFLAG_ONCE) != 0; |
21087 |
++ done = (bug->flags & BUGFLAG_DONE) != 0; |
21088 |
++ |
21089 |
++ if (warning && once) { |
21090 |
++ if (done) |
21091 |
++ return BUG_TRAP_TYPE_WARN; |
21092 |
++ |
21093 |
++ /* |
21094 |
++ * Since this is the only store, concurrency is not an issue. |
21095 |
++ */ |
21096 |
++ bug->flags |= BUGFLAG_DONE; |
21097 |
+ } |
21098 |
+ |
21099 |
+ /* |
21100 |
+diff --git a/lib/crypto/poly1305-donna32.c b/lib/crypto/poly1305-donna32.c |
21101 |
+index 3cc77d94390b2..7fb71845cc846 100644 |
21102 |
+--- a/lib/crypto/poly1305-donna32.c |
21103 |
++++ b/lib/crypto/poly1305-donna32.c |
21104 |
+@@ -10,7 +10,8 @@ |
21105 |
+ #include <asm/unaligned.h> |
21106 |
+ #include <crypto/internal/poly1305.h> |
21107 |
+ |
21108 |
+-void poly1305_core_setkey(struct poly1305_core_key *key, const u8 raw_key[16]) |
21109 |
++void poly1305_core_setkey(struct poly1305_core_key *key, |
21110 |
++ const u8 raw_key[POLY1305_BLOCK_SIZE]) |
21111 |
+ { |
21112 |
+ /* r &= 0xffffffc0ffffffc0ffffffc0fffffff */ |
21113 |
+ key->key.r[0] = (get_unaligned_le32(&raw_key[0])) & 0x3ffffff; |
21114 |
+diff --git a/lib/crypto/poly1305-donna64.c b/lib/crypto/poly1305-donna64.c |
21115 |
+index 6ae181bb43450..d34cf40536689 100644 |
21116 |
+--- a/lib/crypto/poly1305-donna64.c |
21117 |
++++ b/lib/crypto/poly1305-donna64.c |
21118 |
+@@ -12,7 +12,8 @@ |
21119 |
+ |
21120 |
+ typedef __uint128_t u128; |
21121 |
+ |
21122 |
+-void poly1305_core_setkey(struct poly1305_core_key *key, const u8 raw_key[16]) |
21123 |
++void poly1305_core_setkey(struct poly1305_core_key *key, |
21124 |
++ const u8 raw_key[POLY1305_BLOCK_SIZE]) |
21125 |
+ { |
21126 |
+ u64 t0, t1; |
21127 |
+ |
21128 |
+diff --git a/lib/crypto/poly1305.c b/lib/crypto/poly1305.c |
21129 |
+index 9d2d14df0fee5..26d87fc3823e8 100644 |
21130 |
+--- a/lib/crypto/poly1305.c |
21131 |
++++ b/lib/crypto/poly1305.c |
21132 |
+@@ -12,7 +12,8 @@ |
21133 |
+ #include <linux/module.h> |
21134 |
+ #include <asm/unaligned.h> |
21135 |
+ |
21136 |
+-void poly1305_init_generic(struct poly1305_desc_ctx *desc, const u8 *key) |
21137 |
++void poly1305_init_generic(struct poly1305_desc_ctx *desc, |
21138 |
++ const u8 key[POLY1305_KEY_SIZE]) |
21139 |
+ { |
21140 |
+ poly1305_core_setkey(&desc->core_r, key); |
21141 |
+ desc->s[0] = get_unaligned_le32(key + 16); |
21142 |
+diff --git a/mm/memcontrol.c b/mm/memcontrol.c |
21143 |
+index aa9b9536649ab..a98a5a5316658 100644 |
21144 |
+--- a/mm/memcontrol.c |
21145 |
++++ b/mm/memcontrol.c |
21146 |
+@@ -3190,9 +3190,17 @@ static void drain_obj_stock(struct memcg_stock_pcp *stock) |
21147 |
+ unsigned int nr_bytes = stock->nr_bytes & (PAGE_SIZE - 1); |
21148 |
+ |
21149 |
+ if (nr_pages) { |
21150 |
++ struct mem_cgroup *memcg; |
21151 |
++ |
21152 |
+ rcu_read_lock(); |
21153 |
+- __memcg_kmem_uncharge(obj_cgroup_memcg(old), nr_pages); |
21154 |
++retry: |
21155 |
++ memcg = obj_cgroup_memcg(old); |
21156 |
++ if (unlikely(!css_tryget(&memcg->css))) |
21157 |
++ goto retry; |
21158 |
+ rcu_read_unlock(); |
21159 |
++ |
21160 |
++ __memcg_kmem_uncharge(memcg, nr_pages); |
21161 |
++ css_put(&memcg->css); |
21162 |
+ } |
21163 |
+ |
21164 |
+ /* |
21165 |
+diff --git a/mm/memory-failure.c b/mm/memory-failure.c |
21166 |
+index 4e3684d694c12..39db9f84b85cc 100644 |
21167 |
+--- a/mm/memory-failure.c |
21168 |
++++ b/mm/memory-failure.c |
21169 |
+@@ -1364,7 +1364,7 @@ static int memory_failure_dev_pagemap(unsigned long pfn, int flags, |
21170 |
+ * communicated in siginfo, see kill_proc() |
21171 |
+ */ |
21172 |
+ start = (page->index << PAGE_SHIFT) & ~(size - 1); |
21173 |
+- unmap_mapping_range(page->mapping, start, start + size, 0); |
21174 |
++ unmap_mapping_range(page->mapping, start, size, 0); |
21175 |
+ } |
21176 |
+ kill_procs(&tokill, flags & MF_MUST_KILL, !unmap_success, pfn, flags); |
21177 |
+ rc = 0; |
21178 |
+diff --git a/mm/slab.c b/mm/slab.c |
21179 |
+index d7c8da9319c78..e2d2044389eaa 100644 |
21180 |
+--- a/mm/slab.c |
21181 |
++++ b/mm/slab.c |
21182 |
+@@ -1790,8 +1790,7 @@ static int __ref setup_cpu_cache(struct kmem_cache *cachep, gfp_t gfp) |
21183 |
+ } |
21184 |
+ |
21185 |
+ slab_flags_t kmem_cache_flags(unsigned int object_size, |
21186 |
+- slab_flags_t flags, const char *name, |
21187 |
+- void (*ctor)(void *)) |
21188 |
++ slab_flags_t flags, const char *name) |
21189 |
+ { |
21190 |
+ return flags; |
21191 |
+ } |
21192 |
+diff --git a/mm/slab.h b/mm/slab.h |
21193 |
+index 1a756a359fa8b..9e83616bb5b4a 100644 |
21194 |
+--- a/mm/slab.h |
21195 |
++++ b/mm/slab.h |
21196 |
+@@ -110,8 +110,7 @@ __kmem_cache_alias(const char *name, unsigned int size, unsigned int align, |
21197 |
+ slab_flags_t flags, void (*ctor)(void *)); |
21198 |
+ |
21199 |
+ slab_flags_t kmem_cache_flags(unsigned int object_size, |
21200 |
+- slab_flags_t flags, const char *name, |
21201 |
+- void (*ctor)(void *)); |
21202 |
++ slab_flags_t flags, const char *name); |
21203 |
+ #else |
21204 |
+ static inline struct kmem_cache * |
21205 |
+ __kmem_cache_alias(const char *name, unsigned int size, unsigned int align, |
21206 |
+@@ -119,8 +118,7 @@ __kmem_cache_alias(const char *name, unsigned int size, unsigned int align, |
21207 |
+ { return NULL; } |
21208 |
+ |
21209 |
+ static inline slab_flags_t kmem_cache_flags(unsigned int object_size, |
21210 |
+- slab_flags_t flags, const char *name, |
21211 |
+- void (*ctor)(void *)) |
21212 |
++ slab_flags_t flags, const char *name) |
21213 |
+ { |
21214 |
+ return flags; |
21215 |
+ } |
21216 |
+diff --git a/mm/slab_common.c b/mm/slab_common.c |
21217 |
+index 0b775cb5c1089..174d8652d9fed 100644 |
21218 |
+--- a/mm/slab_common.c |
21219 |
++++ b/mm/slab_common.c |
21220 |
+@@ -197,7 +197,7 @@ struct kmem_cache *find_mergeable(unsigned int size, unsigned int align, |
21221 |
+ size = ALIGN(size, sizeof(void *)); |
21222 |
+ align = calculate_alignment(flags, align, size); |
21223 |
+ size = ALIGN(size, align); |
21224 |
+- flags = kmem_cache_flags(size, flags, name, NULL); |
21225 |
++ flags = kmem_cache_flags(size, flags, name); |
21226 |
+ |
21227 |
+ if (flags & SLAB_NEVER_MERGE) |
21228 |
+ return NULL; |
21229 |
+diff --git a/mm/slub.c b/mm/slub.c |
21230 |
+index c86037b382531..d62db41710bfa 100644 |
21231 |
+--- a/mm/slub.c |
21232 |
++++ b/mm/slub.c |
21233 |
+@@ -1400,7 +1400,6 @@ __setup("slub_debug", setup_slub_debug); |
21234 |
+ * @object_size: the size of an object without meta data |
21235 |
+ * @flags: flags to set |
21236 |
+ * @name: name of the cache |
21237 |
+- * @ctor: constructor function |
21238 |
+ * |
21239 |
+ * Debug option(s) are applied to @flags. In addition to the debug |
21240 |
+ * option(s), if a slab name (or multiple) is specified i.e. |
21241 |
+@@ -1408,8 +1407,7 @@ __setup("slub_debug", setup_slub_debug); |
21242 |
+ * then only the select slabs will receive the debug option(s). |
21243 |
+ */ |
21244 |
+ slab_flags_t kmem_cache_flags(unsigned int object_size, |
21245 |
+- slab_flags_t flags, const char *name, |
21246 |
+- void (*ctor)(void *)) |
21247 |
++ slab_flags_t flags, const char *name) |
21248 |
+ { |
21249 |
+ char *iter; |
21250 |
+ size_t len; |
21251 |
+@@ -1474,8 +1472,7 @@ static inline void add_full(struct kmem_cache *s, struct kmem_cache_node *n, |
21252 |
+ static inline void remove_full(struct kmem_cache *s, struct kmem_cache_node *n, |
21253 |
+ struct page *page) {} |
21254 |
+ slab_flags_t kmem_cache_flags(unsigned int object_size, |
21255 |
+- slab_flags_t flags, const char *name, |
21256 |
+- void (*ctor)(void *)) |
21257 |
++ slab_flags_t flags, const char *name) |
21258 |
+ { |
21259 |
+ return flags; |
21260 |
+ } |
21261 |
+@@ -3797,7 +3794,7 @@ static int calculate_sizes(struct kmem_cache *s, int forced_order) |
21262 |
+ |
21263 |
+ static int kmem_cache_open(struct kmem_cache *s, slab_flags_t flags) |
21264 |
+ { |
21265 |
+- s->flags = kmem_cache_flags(s->size, flags, s->name, s->ctor); |
21266 |
++ s->flags = kmem_cache_flags(s->size, flags, s->name); |
21267 |
+ #ifdef CONFIG_SLAB_FREELIST_HARDENED |
21268 |
+ s->random = get_random_long(); |
21269 |
+ #endif |
21270 |
+diff --git a/mm/sparse.c b/mm/sparse.c |
21271 |
+index 7bd23f9d6cef6..33406ea2ecc44 100644 |
21272 |
+--- a/mm/sparse.c |
21273 |
++++ b/mm/sparse.c |
21274 |
+@@ -547,6 +547,7 @@ static void __init sparse_init_nid(int nid, unsigned long pnum_begin, |
21275 |
+ pr_err("%s: node[%d] memory map backing failed. Some memory will not be available.", |
21276 |
+ __func__, nid); |
21277 |
+ pnum_begin = pnum; |
21278 |
++ sparse_buffer_fini(); |
21279 |
+ goto failed; |
21280 |
+ } |
21281 |
+ check_usemap_section_nr(nid, usage); |
21282 |
+diff --git a/net/bluetooth/hci_conn.c b/net/bluetooth/hci_conn.c |
21283 |
+index 4f1cd8063e720..6bd222443f15b 100644 |
21284 |
+--- a/net/bluetooth/hci_conn.c |
21285 |
++++ b/net/bluetooth/hci_conn.c |
21286 |
+@@ -1797,8 +1797,6 @@ u32 hci_conn_get_phy(struct hci_conn *conn) |
21287 |
+ { |
21288 |
+ u32 phys = 0; |
21289 |
+ |
21290 |
+- hci_dev_lock(conn->hdev); |
21291 |
+- |
21292 |
+ /* BLUETOOTH CORE SPECIFICATION Version 5.2 | Vol 2, Part B page 471: |
21293 |
+ * Table 6.2: Packets defined for synchronous, asynchronous, and |
21294 |
+ * CSB logical transport types. |
21295 |
+@@ -1895,7 +1893,5 @@ u32 hci_conn_get_phy(struct hci_conn *conn) |
21296 |
+ break; |
21297 |
+ } |
21298 |
+ |
21299 |
+- hci_dev_unlock(conn->hdev); |
21300 |
+- |
21301 |
+ return phys; |
21302 |
+ } |
21303 |
+diff --git a/net/bluetooth/hci_event.c b/net/bluetooth/hci_event.c |
21304 |
+index 67668be3461e9..7a3e42e752350 100644 |
21305 |
+--- a/net/bluetooth/hci_event.c |
21306 |
++++ b/net/bluetooth/hci_event.c |
21307 |
+@@ -5005,6 +5005,7 @@ static void hci_loglink_complete_evt(struct hci_dev *hdev, struct sk_buff *skb) |
21308 |
+ return; |
21309 |
+ |
21310 |
+ hchan->handle = le16_to_cpu(ev->handle); |
21311 |
++ hchan->amp = true; |
21312 |
+ |
21313 |
+ BT_DBG("hcon %p mgr %p hchan %p", hcon, hcon->amp_mgr, hchan); |
21314 |
+ |
21315 |
+@@ -5037,7 +5038,7 @@ static void hci_disconn_loglink_complete_evt(struct hci_dev *hdev, |
21316 |
+ hci_dev_lock(hdev); |
21317 |
+ |
21318 |
+ hchan = hci_chan_lookup_handle(hdev, le16_to_cpu(ev->handle)); |
21319 |
+- if (!hchan) |
21320 |
++ if (!hchan || !hchan->amp) |
21321 |
+ goto unlock; |
21322 |
+ |
21323 |
+ amp_destroy_logical_link(hchan, ev->reason); |
21324 |
+diff --git a/net/bluetooth/hci_request.c b/net/bluetooth/hci_request.c |
21325 |
+index 5aa7bd5030a21..e2646cf2f1234 100644 |
21326 |
+--- a/net/bluetooth/hci_request.c |
21327 |
++++ b/net/bluetooth/hci_request.c |
21328 |
+@@ -271,12 +271,16 @@ int hci_req_sync(struct hci_dev *hdev, int (*req)(struct hci_request *req, |
21329 |
+ { |
21330 |
+ int ret; |
21331 |
+ |
21332 |
+- if (!test_bit(HCI_UP, &hdev->flags)) |
21333 |
+- return -ENETDOWN; |
21334 |
+- |
21335 |
+ /* Serialize all requests */ |
21336 |
+ hci_req_sync_lock(hdev); |
21337 |
+- ret = __hci_req_sync(hdev, req, opt, timeout, hci_status); |
21338 |
++ /* check the state after obtaing the lock to protect the HCI_UP |
21339 |
++ * against any races from hci_dev_do_close when the controller |
21340 |
++ * gets removed. |
21341 |
++ */ |
21342 |
++ if (test_bit(HCI_UP, &hdev->flags)) |
21343 |
++ ret = __hci_req_sync(hdev, req, opt, timeout, hci_status); |
21344 |
++ else |
21345 |
++ ret = -ENETDOWN; |
21346 |
+ hci_req_sync_unlock(hdev); |
21347 |
+ |
21348 |
+ return ret; |
21349 |
+diff --git a/net/bridge/br_multicast.c b/net/bridge/br_multicast.c |
21350 |
+index 257ac4e25f6d9..5f89ae3ae4d8f 100644 |
21351 |
+--- a/net/bridge/br_multicast.c |
21352 |
++++ b/net/bridge/br_multicast.c |
21353 |
+@@ -3075,25 +3075,14 @@ static int br_multicast_ipv4_rcv(struct net_bridge *br, |
21354 |
+ } |
21355 |
+ |
21356 |
+ #if IS_ENABLED(CONFIG_IPV6) |
21357 |
+-static int br_ip6_multicast_mrd_rcv(struct net_bridge *br, |
21358 |
+- struct net_bridge_port *port, |
21359 |
+- struct sk_buff *skb) |
21360 |
++static void br_ip6_multicast_mrd_rcv(struct net_bridge *br, |
21361 |
++ struct net_bridge_port *port, |
21362 |
++ struct sk_buff *skb) |
21363 |
+ { |
21364 |
+- int ret; |
21365 |
+- |
21366 |
+- if (ipv6_hdr(skb)->nexthdr != IPPROTO_ICMPV6) |
21367 |
+- return -ENOMSG; |
21368 |
+- |
21369 |
+- ret = ipv6_mc_check_icmpv6(skb); |
21370 |
+- if (ret < 0) |
21371 |
+- return ret; |
21372 |
+- |
21373 |
+ if (icmp6_hdr(skb)->icmp6_type != ICMPV6_MRDISC_ADV) |
21374 |
+- return -ENOMSG; |
21375 |
++ return; |
21376 |
+ |
21377 |
+ br_multicast_mark_router(br, port); |
21378 |
+- |
21379 |
+- return 0; |
21380 |
+ } |
21381 |
+ |
21382 |
+ static int br_multicast_ipv6_rcv(struct net_bridge *br, |
21383 |
+@@ -3107,18 +3096,12 @@ static int br_multicast_ipv6_rcv(struct net_bridge *br, |
21384 |
+ |
21385 |
+ err = ipv6_mc_check_mld(skb); |
21386 |
+ |
21387 |
+- if (err == -ENOMSG) { |
21388 |
++ if (err == -ENOMSG || err == -ENODATA) { |
21389 |
+ if (!ipv6_addr_is_ll_all_nodes(&ipv6_hdr(skb)->daddr)) |
21390 |
+ BR_INPUT_SKB_CB(skb)->mrouters_only = 1; |
21391 |
+- |
21392 |
+- if (ipv6_addr_is_all_snoopers(&ipv6_hdr(skb)->daddr)) { |
21393 |
+- err = br_ip6_multicast_mrd_rcv(br, port, skb); |
21394 |
+- |
21395 |
+- if (err < 0 && err != -ENOMSG) { |
21396 |
+- br_multicast_err_count(br, port, skb->protocol); |
21397 |
+- return err; |
21398 |
+- } |
21399 |
+- } |
21400 |
++ if (err == -ENODATA && |
21401 |
++ ipv6_addr_is_all_snoopers(&ipv6_hdr(skb)->daddr)) |
21402 |
++ br_ip6_multicast_mrd_rcv(br, port, skb); |
21403 |
+ |
21404 |
+ return 0; |
21405 |
+ } else if (err < 0) { |
21406 |
+diff --git a/net/core/dev.c b/net/core/dev.c |
21407 |
+index 3c0d3b6d674da..633c2d6f1a353 100644 |
21408 |
+--- a/net/core/dev.c |
21409 |
++++ b/net/core/dev.c |
21410 |
+@@ -5867,7 +5867,7 @@ static struct list_head *gro_list_prepare(struct napi_struct *napi, |
21411 |
+ return head; |
21412 |
+ } |
21413 |
+ |
21414 |
+-static void skb_gro_reset_offset(struct sk_buff *skb) |
21415 |
++static inline void skb_gro_reset_offset(struct sk_buff *skb, u32 nhoff) |
21416 |
+ { |
21417 |
+ const struct skb_shared_info *pinfo = skb_shinfo(skb); |
21418 |
+ const skb_frag_t *frag0 = &pinfo->frags[0]; |
21419 |
+@@ -5878,7 +5878,7 @@ static void skb_gro_reset_offset(struct sk_buff *skb) |
21420 |
+ |
21421 |
+ if (!skb_headlen(skb) && pinfo->nr_frags && |
21422 |
+ !PageHighMem(skb_frag_page(frag0)) && |
21423 |
+- (!NET_IP_ALIGN || !(skb_frag_off(frag0) & 3))) { |
21424 |
++ (!NET_IP_ALIGN || !((skb_frag_off(frag0) + nhoff) & 3))) { |
21425 |
+ NAPI_GRO_CB(skb)->frag0 = skb_frag_address(frag0); |
21426 |
+ NAPI_GRO_CB(skb)->frag0_len = min_t(unsigned int, |
21427 |
+ skb_frag_size(frag0), |
21428 |
+@@ -6111,7 +6111,7 @@ gro_result_t napi_gro_receive(struct napi_struct *napi, struct sk_buff *skb) |
21429 |
+ skb_mark_napi_id(skb, napi); |
21430 |
+ trace_napi_gro_receive_entry(skb); |
21431 |
+ |
21432 |
+- skb_gro_reset_offset(skb); |
21433 |
++ skb_gro_reset_offset(skb, 0); |
21434 |
+ |
21435 |
+ ret = napi_skb_finish(napi, skb, dev_gro_receive(napi, skb)); |
21436 |
+ trace_napi_gro_receive_exit(ret); |
21437 |
+@@ -6204,7 +6204,7 @@ static struct sk_buff *napi_frags_skb(struct napi_struct *napi) |
21438 |
+ napi->skb = NULL; |
21439 |
+ |
21440 |
+ skb_reset_mac_header(skb); |
21441 |
+- skb_gro_reset_offset(skb); |
21442 |
++ skb_gro_reset_offset(skb, hlen); |
21443 |
+ |
21444 |
+ if (unlikely(skb_gro_header_hard(skb, hlen))) { |
21445 |
+ eth = skb_gro_header_slow(skb, hlen, 0); |
21446 |
+diff --git a/net/ipv4/route.c b/net/ipv4/route.c |
21447 |
+index 983b4db1868fd..9028205f59f21 100644 |
21448 |
+--- a/net/ipv4/route.c |
21449 |
++++ b/net/ipv4/route.c |
21450 |
+@@ -66,6 +66,7 @@ |
21451 |
+ #include <linux/types.h> |
21452 |
+ #include <linux/kernel.h> |
21453 |
+ #include <linux/mm.h> |
21454 |
++#include <linux/memblock.h> |
21455 |
+ #include <linux/string.h> |
21456 |
+ #include <linux/socket.h> |
21457 |
+ #include <linux/sockios.h> |
21458 |
+@@ -476,8 +477,10 @@ static void ipv4_confirm_neigh(const struct dst_entry *dst, const void *daddr) |
21459 |
+ __ipv4_confirm_neigh(dev, *(__force u32 *)pkey); |
21460 |
+ } |
21461 |
+ |
21462 |
+-#define IP_IDENTS_SZ 2048u |
21463 |
+- |
21464 |
++/* Hash tables of size 2048..262144 depending on RAM size. |
21465 |
++ * Each bucket uses 8 bytes. |
21466 |
++ */ |
21467 |
++static u32 ip_idents_mask __read_mostly; |
21468 |
+ static atomic_t *ip_idents __read_mostly; |
21469 |
+ static u32 *ip_tstamps __read_mostly; |
21470 |
+ |
21471 |
+@@ -487,12 +490,16 @@ static u32 *ip_tstamps __read_mostly; |
21472 |
+ */ |
21473 |
+ u32 ip_idents_reserve(u32 hash, int segs) |
21474 |
+ { |
21475 |
+- u32 *p_tstamp = ip_tstamps + hash % IP_IDENTS_SZ; |
21476 |
+- atomic_t *p_id = ip_idents + hash % IP_IDENTS_SZ; |
21477 |
+- u32 old = READ_ONCE(*p_tstamp); |
21478 |
+- u32 now = (u32)jiffies; |
21479 |
++ u32 bucket, old, now = (u32)jiffies; |
21480 |
++ atomic_t *p_id; |
21481 |
++ u32 *p_tstamp; |
21482 |
+ u32 delta = 0; |
21483 |
+ |
21484 |
++ bucket = hash & ip_idents_mask; |
21485 |
++ p_tstamp = ip_tstamps + bucket; |
21486 |
++ p_id = ip_idents + bucket; |
21487 |
++ old = READ_ONCE(*p_tstamp); |
21488 |
++ |
21489 |
+ if (old != now && cmpxchg(p_tstamp, old, now) == old) |
21490 |
+ delta = prandom_u32_max(now - old); |
21491 |
+ |
21492 |
+@@ -3547,18 +3554,25 @@ struct ip_rt_acct __percpu *ip_rt_acct __read_mostly; |
21493 |
+ |
21494 |
+ int __init ip_rt_init(void) |
21495 |
+ { |
21496 |
++ void *idents_hash; |
21497 |
+ int cpu; |
21498 |
+ |
21499 |
+- ip_idents = kmalloc_array(IP_IDENTS_SZ, sizeof(*ip_idents), |
21500 |
+- GFP_KERNEL); |
21501 |
+- if (!ip_idents) |
21502 |
+- panic("IP: failed to allocate ip_idents\n"); |
21503 |
++ /* For modern hosts, this will use 2 MB of memory */ |
21504 |
++ idents_hash = alloc_large_system_hash("IP idents", |
21505 |
++ sizeof(*ip_idents) + sizeof(*ip_tstamps), |
21506 |
++ 0, |
21507 |
++ 16, /* one bucket per 64 KB */ |
21508 |
++ HASH_ZERO, |
21509 |
++ NULL, |
21510 |
++ &ip_idents_mask, |
21511 |
++ 2048, |
21512 |
++ 256*1024); |
21513 |
++ |
21514 |
++ ip_idents = idents_hash; |
21515 |
+ |
21516 |
+- prandom_bytes(ip_idents, IP_IDENTS_SZ * sizeof(*ip_idents)); |
21517 |
++ prandom_bytes(ip_idents, (ip_idents_mask + 1) * sizeof(*ip_idents)); |
21518 |
+ |
21519 |
+- ip_tstamps = kcalloc(IP_IDENTS_SZ, sizeof(*ip_tstamps), GFP_KERNEL); |
21520 |
+- if (!ip_tstamps) |
21521 |
+- panic("IP: failed to allocate ip_tstamps\n"); |
21522 |
++ ip_tstamps = idents_hash + (ip_idents_mask + 1) * sizeof(*ip_idents); |
21523 |
+ |
21524 |
+ for_each_possible_cpu(cpu) { |
21525 |
+ struct uncached_list *ul = &per_cpu(rt_uncached_list, cpu); |
21526 |
+diff --git a/net/ipv4/tcp_cong.c b/net/ipv4/tcp_cong.c |
21527 |
+index 563d016e74783..db5831e6c136a 100644 |
21528 |
+--- a/net/ipv4/tcp_cong.c |
21529 |
++++ b/net/ipv4/tcp_cong.c |
21530 |
+@@ -230,6 +230,10 @@ int tcp_set_default_congestion_control(struct net *net, const char *name) |
21531 |
+ ret = -ENOENT; |
21532 |
+ } else if (!bpf_try_module_get(ca, ca->owner)) { |
21533 |
+ ret = -EBUSY; |
21534 |
++ } else if (!net_eq(net, &init_net) && |
21535 |
++ !(ca->flags & TCP_CONG_NON_RESTRICTED)) { |
21536 |
++ /* Only init netns can set default to a restricted algorithm */ |
21537 |
++ ret = -EPERM; |
21538 |
+ } else { |
21539 |
+ prev = xchg(&net->ipv4.tcp_congestion_control, ca); |
21540 |
+ if (prev) |
21541 |
+diff --git a/net/ipv4/udp.c b/net/ipv4/udp.c |
21542 |
+index 9d2a1a247cec6..a5d716f185f6e 100644 |
21543 |
+--- a/net/ipv4/udp.c |
21544 |
++++ b/net/ipv4/udp.c |
21545 |
+@@ -2659,9 +2659,12 @@ int udp_lib_setsockopt(struct sock *sk, int level, int optname, |
21546 |
+ |
21547 |
+ case UDP_GRO: |
21548 |
+ lock_sock(sk); |
21549 |
++ |
21550 |
++ /* when enabling GRO, accept the related GSO packet type */ |
21551 |
+ if (valbool) |
21552 |
+ udp_tunnel_encap_enable(sk->sk_socket); |
21553 |
+ up->gro_enabled = valbool; |
21554 |
++ up->accept_udp_l4 = valbool; |
21555 |
+ release_sock(sk); |
21556 |
+ break; |
21557 |
+ |
21558 |
+diff --git a/net/ipv6/mcast_snoop.c b/net/ipv6/mcast_snoop.c |
21559 |
+index d3d6b6a66e5fa..04d5fcdfa6e00 100644 |
21560 |
+--- a/net/ipv6/mcast_snoop.c |
21561 |
++++ b/net/ipv6/mcast_snoop.c |
21562 |
+@@ -109,7 +109,7 @@ static int ipv6_mc_check_mld_msg(struct sk_buff *skb) |
21563 |
+ struct mld_msg *mld; |
21564 |
+ |
21565 |
+ if (!ipv6_mc_may_pull(skb, len)) |
21566 |
+- return -EINVAL; |
21567 |
++ return -ENODATA; |
21568 |
+ |
21569 |
+ mld = (struct mld_msg *)skb_transport_header(skb); |
21570 |
+ |
21571 |
+@@ -122,7 +122,7 @@ static int ipv6_mc_check_mld_msg(struct sk_buff *skb) |
21572 |
+ case ICMPV6_MGM_QUERY: |
21573 |
+ return ipv6_mc_check_mld_query(skb); |
21574 |
+ default: |
21575 |
+- return -ENOMSG; |
21576 |
++ return -ENODATA; |
21577 |
+ } |
21578 |
+ } |
21579 |
+ |
21580 |
+@@ -131,7 +131,7 @@ static inline __sum16 ipv6_mc_validate_checksum(struct sk_buff *skb) |
21581 |
+ return skb_checksum_validate(skb, IPPROTO_ICMPV6, ip6_compute_pseudo); |
21582 |
+ } |
21583 |
+ |
21584 |
+-int ipv6_mc_check_icmpv6(struct sk_buff *skb) |
21585 |
++static int ipv6_mc_check_icmpv6(struct sk_buff *skb) |
21586 |
+ { |
21587 |
+ unsigned int len = skb_transport_offset(skb) + sizeof(struct icmp6hdr); |
21588 |
+ unsigned int transport_len = ipv6_transport_len(skb); |
21589 |
+@@ -150,7 +150,6 @@ int ipv6_mc_check_icmpv6(struct sk_buff *skb) |
21590 |
+ |
21591 |
+ return 0; |
21592 |
+ } |
21593 |
+-EXPORT_SYMBOL(ipv6_mc_check_icmpv6); |
21594 |
+ |
21595 |
+ /** |
21596 |
+ * ipv6_mc_check_mld - checks whether this is a sane MLD packet |
21597 |
+@@ -161,7 +160,10 @@ EXPORT_SYMBOL(ipv6_mc_check_icmpv6); |
21598 |
+ * |
21599 |
+ * -EINVAL: A broken packet was detected, i.e. it violates some internet |
21600 |
+ * standard |
21601 |
+- * -ENOMSG: IP header validation succeeded but it is not an MLD packet. |
21602 |
++ * -ENOMSG: IP header validation succeeded but it is not an ICMPv6 packet |
21603 |
++ * with a hop-by-hop option. |
21604 |
++ * -ENODATA: IP+ICMPv6 header with hop-by-hop option validation succeeded |
21605 |
++ * but it is not an MLD packet. |
21606 |
+ * -ENOMEM: A memory allocation failure happened. |
21607 |
+ * |
21608 |
+ * Caller needs to set the skb network header and free any returned skb if it |
21609 |
+diff --git a/net/mac80211/main.c b/net/mac80211/main.c |
21610 |
+index d1023188ef373..891d2b6f233e2 100644 |
21611 |
+--- a/net/mac80211/main.c |
21612 |
++++ b/net/mac80211/main.c |
21613 |
+@@ -1138,8 +1138,11 @@ int ieee80211_register_hw(struct ieee80211_hw *hw) |
21614 |
+ if (local->hw.wiphy->max_scan_ie_len) |
21615 |
+ local->hw.wiphy->max_scan_ie_len -= local->scan_ies_len; |
21616 |
+ |
21617 |
+- WARN_ON(!ieee80211_cs_list_valid(local->hw.cipher_schemes, |
21618 |
+- local->hw.n_cipher_schemes)); |
21619 |
++ if (WARN_ON(!ieee80211_cs_list_valid(local->hw.cipher_schemes, |
21620 |
++ local->hw.n_cipher_schemes))) { |
21621 |
++ result = -EINVAL; |
21622 |
++ goto fail_workqueue; |
21623 |
++ } |
21624 |
+ |
21625 |
+ result = ieee80211_init_cipher_suites(local); |
21626 |
+ if (result < 0) |
21627 |
+diff --git a/net/mptcp/protocol.c b/net/mptcp/protocol.c |
21628 |
+index e337b35a368f9..a1fda2ce2f830 100644 |
21629 |
+--- a/net/mptcp/protocol.c |
21630 |
++++ b/net/mptcp/protocol.c |
21631 |
+@@ -1258,7 +1258,7 @@ static int mptcp_sendmsg_frag(struct sock *sk, struct sock *ssk, |
21632 |
+ int avail_size; |
21633 |
+ size_t ret = 0; |
21634 |
+ |
21635 |
+- pr_debug("msk=%p ssk=%p sending dfrag at seq=%lld len=%d already sent=%d", |
21636 |
++ pr_debug("msk=%p ssk=%p sending dfrag at seq=%llu len=%u already sent=%u", |
21637 |
+ msk, ssk, dfrag->data_seq, dfrag->data_len, info->sent); |
21638 |
+ |
21639 |
+ /* compute send limit */ |
21640 |
+@@ -1671,7 +1671,7 @@ static int mptcp_sendmsg(struct sock *sk, struct msghdr *msg, size_t len) |
21641 |
+ if (!msk->first_pending) |
21642 |
+ WRITE_ONCE(msk->first_pending, dfrag); |
21643 |
+ } |
21644 |
+- pr_debug("msk=%p dfrag at seq=%lld len=%d sent=%d new=%d", msk, |
21645 |
++ pr_debug("msk=%p dfrag at seq=%llu len=%u sent=%u new=%d", msk, |
21646 |
+ dfrag->data_seq, dfrag->data_len, dfrag->already_sent, |
21647 |
+ !dfrag_collapsed); |
21648 |
+ |
21649 |
+diff --git a/net/netfilter/nf_tables_offload.c b/net/netfilter/nf_tables_offload.c |
21650 |
+index 9ae14270c543e..2b00f7f47693b 100644 |
21651 |
+--- a/net/netfilter/nf_tables_offload.c |
21652 |
++++ b/net/netfilter/nf_tables_offload.c |
21653 |
+@@ -45,6 +45,48 @@ void nft_flow_rule_set_addr_type(struct nft_flow_rule *flow, |
21654 |
+ offsetof(struct nft_flow_key, control); |
21655 |
+ } |
21656 |
+ |
21657 |
++struct nft_offload_ethertype { |
21658 |
++ __be16 value; |
21659 |
++ __be16 mask; |
21660 |
++}; |
21661 |
++ |
21662 |
++static void nft_flow_rule_transfer_vlan(struct nft_offload_ctx *ctx, |
21663 |
++ struct nft_flow_rule *flow) |
21664 |
++{ |
21665 |
++ struct nft_flow_match *match = &flow->match; |
21666 |
++ struct nft_offload_ethertype ethertype; |
21667 |
++ |
21668 |
++ if (match->dissector.used_keys & BIT(FLOW_DISSECTOR_KEY_CONTROL) && |
21669 |
++ match->key.basic.n_proto != htons(ETH_P_8021Q) && |
21670 |
++ match->key.basic.n_proto != htons(ETH_P_8021AD)) |
21671 |
++ return; |
21672 |
++ |
21673 |
++ ethertype.value = match->key.basic.n_proto; |
21674 |
++ ethertype.mask = match->mask.basic.n_proto; |
21675 |
++ |
21676 |
++ if (match->dissector.used_keys & BIT(FLOW_DISSECTOR_KEY_VLAN) && |
21677 |
++ (match->key.vlan.vlan_tpid == htons(ETH_P_8021Q) || |
21678 |
++ match->key.vlan.vlan_tpid == htons(ETH_P_8021AD))) { |
21679 |
++ match->key.basic.n_proto = match->key.cvlan.vlan_tpid; |
21680 |
++ match->mask.basic.n_proto = match->mask.cvlan.vlan_tpid; |
21681 |
++ match->key.cvlan.vlan_tpid = match->key.vlan.vlan_tpid; |
21682 |
++ match->mask.cvlan.vlan_tpid = match->mask.vlan.vlan_tpid; |
21683 |
++ match->key.vlan.vlan_tpid = ethertype.value; |
21684 |
++ match->mask.vlan.vlan_tpid = ethertype.mask; |
21685 |
++ match->dissector.offset[FLOW_DISSECTOR_KEY_CVLAN] = |
21686 |
++ offsetof(struct nft_flow_key, cvlan); |
21687 |
++ match->dissector.used_keys |= BIT(FLOW_DISSECTOR_KEY_CVLAN); |
21688 |
++ } else { |
21689 |
++ match->key.basic.n_proto = match->key.vlan.vlan_tpid; |
21690 |
++ match->mask.basic.n_proto = match->mask.vlan.vlan_tpid; |
21691 |
++ match->key.vlan.vlan_tpid = ethertype.value; |
21692 |
++ match->mask.vlan.vlan_tpid = ethertype.mask; |
21693 |
++ match->dissector.offset[FLOW_DISSECTOR_KEY_VLAN] = |
21694 |
++ offsetof(struct nft_flow_key, vlan); |
21695 |
++ match->dissector.used_keys |= BIT(FLOW_DISSECTOR_KEY_VLAN); |
21696 |
++ } |
21697 |
++} |
21698 |
++ |
21699 |
+ struct nft_flow_rule *nft_flow_rule_create(struct net *net, |
21700 |
+ const struct nft_rule *rule) |
21701 |
+ { |
21702 |
+@@ -89,6 +131,8 @@ struct nft_flow_rule *nft_flow_rule_create(struct net *net, |
21703 |
+ |
21704 |
+ expr = nft_expr_next(expr); |
21705 |
+ } |
21706 |
++ nft_flow_rule_transfer_vlan(ctx, flow); |
21707 |
++ |
21708 |
+ flow->proto = ctx->dep.l3num; |
21709 |
+ kfree(ctx); |
21710 |
+ |
21711 |
+diff --git a/net/netfilter/nft_cmp.c b/net/netfilter/nft_cmp.c |
21712 |
+index 00e563a72d3d7..1d42d06f5b64b 100644 |
21713 |
+--- a/net/netfilter/nft_cmp.c |
21714 |
++++ b/net/netfilter/nft_cmp.c |
21715 |
+@@ -115,19 +115,56 @@ nla_put_failure: |
21716 |
+ return -1; |
21717 |
+ } |
21718 |
+ |
21719 |
++union nft_cmp_offload_data { |
21720 |
++ u16 val16; |
21721 |
++ u32 val32; |
21722 |
++ u64 val64; |
21723 |
++}; |
21724 |
++ |
21725 |
++static void nft_payload_n2h(union nft_cmp_offload_data *data, |
21726 |
++ const u8 *val, u32 len) |
21727 |
++{ |
21728 |
++ switch (len) { |
21729 |
++ case 2: |
21730 |
++ data->val16 = ntohs(*((u16 *)val)); |
21731 |
++ break; |
21732 |
++ case 4: |
21733 |
++ data->val32 = ntohl(*((u32 *)val)); |
21734 |
++ break; |
21735 |
++ case 8: |
21736 |
++ data->val64 = be64_to_cpu(*((u64 *)val)); |
21737 |
++ break; |
21738 |
++ default: |
21739 |
++ WARN_ON_ONCE(1); |
21740 |
++ break; |
21741 |
++ } |
21742 |
++} |
21743 |
++ |
21744 |
+ static int __nft_cmp_offload(struct nft_offload_ctx *ctx, |
21745 |
+ struct nft_flow_rule *flow, |
21746 |
+ const struct nft_cmp_expr *priv) |
21747 |
+ { |
21748 |
+ struct nft_offload_reg *reg = &ctx->regs[priv->sreg]; |
21749 |
++ union nft_cmp_offload_data _data, _datamask; |
21750 |
+ u8 *mask = (u8 *)&flow->match.mask; |
21751 |
+ u8 *key = (u8 *)&flow->match.key; |
21752 |
++ u8 *data, *datamask; |
21753 |
+ |
21754 |
+ if (priv->op != NFT_CMP_EQ || priv->len > reg->len) |
21755 |
+ return -EOPNOTSUPP; |
21756 |
+ |
21757 |
+- memcpy(key + reg->offset, &priv->data, reg->len); |
21758 |
+- memcpy(mask + reg->offset, ®->mask, reg->len); |
21759 |
++ if (reg->flags & NFT_OFFLOAD_F_NETWORK2HOST) { |
21760 |
++ nft_payload_n2h(&_data, (u8 *)&priv->data, reg->len); |
21761 |
++ nft_payload_n2h(&_datamask, (u8 *)®->mask, reg->len); |
21762 |
++ data = (u8 *)&_data; |
21763 |
++ datamask = (u8 *)&_datamask; |
21764 |
++ } else { |
21765 |
++ data = (u8 *)&priv->data; |
21766 |
++ datamask = (u8 *)®->mask; |
21767 |
++ } |
21768 |
++ |
21769 |
++ memcpy(key + reg->offset, data, reg->len); |
21770 |
++ memcpy(mask + reg->offset, datamask, reg->len); |
21771 |
+ |
21772 |
+ flow->match.dissector.used_keys |= BIT(reg->key); |
21773 |
+ flow->match.dissector.offset[reg->key] = reg->base_offset; |
21774 |
+diff --git a/net/netfilter/nft_payload.c b/net/netfilter/nft_payload.c |
21775 |
+index 47d4e0e216514..1ebee25de6772 100644 |
21776 |
+--- a/net/netfilter/nft_payload.c |
21777 |
++++ b/net/netfilter/nft_payload.c |
21778 |
+@@ -226,8 +226,9 @@ static int nft_payload_offload_ll(struct nft_offload_ctx *ctx, |
21779 |
+ if (!nft_payload_offload_mask(reg, priv->len, sizeof(__be16))) |
21780 |
+ return -EOPNOTSUPP; |
21781 |
+ |
21782 |
+- NFT_OFFLOAD_MATCH(FLOW_DISSECTOR_KEY_VLAN, vlan, |
21783 |
+- vlan_tci, sizeof(__be16), reg); |
21784 |
++ NFT_OFFLOAD_MATCH_FLAGS(FLOW_DISSECTOR_KEY_VLAN, vlan, |
21785 |
++ vlan_tci, sizeof(__be16), reg, |
21786 |
++ NFT_OFFLOAD_F_NETWORK2HOST); |
21787 |
+ break; |
21788 |
+ case offsetof(struct vlan_ethhdr, h_vlan_encapsulated_proto): |
21789 |
+ if (!nft_payload_offload_mask(reg, priv->len, sizeof(__be16))) |
21790 |
+@@ -241,16 +242,18 @@ static int nft_payload_offload_ll(struct nft_offload_ctx *ctx, |
21791 |
+ if (!nft_payload_offload_mask(reg, priv->len, sizeof(__be16))) |
21792 |
+ return -EOPNOTSUPP; |
21793 |
+ |
21794 |
+- NFT_OFFLOAD_MATCH(FLOW_DISSECTOR_KEY_CVLAN, vlan, |
21795 |
+- vlan_tci, sizeof(__be16), reg); |
21796 |
++ NFT_OFFLOAD_MATCH_FLAGS(FLOW_DISSECTOR_KEY_CVLAN, cvlan, |
21797 |
++ vlan_tci, sizeof(__be16), reg, |
21798 |
++ NFT_OFFLOAD_F_NETWORK2HOST); |
21799 |
+ break; |
21800 |
+ case offsetof(struct vlan_ethhdr, h_vlan_encapsulated_proto) + |
21801 |
+ sizeof(struct vlan_hdr): |
21802 |
+ if (!nft_payload_offload_mask(reg, priv->len, sizeof(__be16))) |
21803 |
+ return -EOPNOTSUPP; |
21804 |
+ |
21805 |
+- NFT_OFFLOAD_MATCH(FLOW_DISSECTOR_KEY_CVLAN, vlan, |
21806 |
++ NFT_OFFLOAD_MATCH(FLOW_DISSECTOR_KEY_CVLAN, cvlan, |
21807 |
+ vlan_tpid, sizeof(__be16), reg); |
21808 |
++ nft_offload_set_dependency(ctx, NFT_OFFLOAD_DEP_NETWORK); |
21809 |
+ break; |
21810 |
+ default: |
21811 |
+ return -EOPNOTSUPP; |
21812 |
+diff --git a/net/nfc/digital_dep.c b/net/nfc/digital_dep.c |
21813 |
+index 5971fb6f51cc7..dc21b4141b0af 100644 |
21814 |
+--- a/net/nfc/digital_dep.c |
21815 |
++++ b/net/nfc/digital_dep.c |
21816 |
+@@ -1273,6 +1273,8 @@ static void digital_tg_recv_dep_req(struct nfc_digital_dev *ddev, void *arg, |
21817 |
+ } |
21818 |
+ |
21819 |
+ rc = nfc_tm_data_received(ddev->nfc_dev, resp); |
21820 |
++ if (rc) |
21821 |
++ resp = NULL; |
21822 |
+ |
21823 |
+ exit: |
21824 |
+ kfree_skb(ddev->chaining_skb); |
21825 |
+diff --git a/net/nfc/llcp_sock.c b/net/nfc/llcp_sock.c |
21826 |
+index a3b46f8888033..53dbe733f9981 100644 |
21827 |
+--- a/net/nfc/llcp_sock.c |
21828 |
++++ b/net/nfc/llcp_sock.c |
21829 |
+@@ -109,12 +109,14 @@ static int llcp_sock_bind(struct socket *sock, struct sockaddr *addr, int alen) |
21830 |
+ GFP_KERNEL); |
21831 |
+ if (!llcp_sock->service_name) { |
21832 |
+ nfc_llcp_local_put(llcp_sock->local); |
21833 |
++ llcp_sock->local = NULL; |
21834 |
+ ret = -ENOMEM; |
21835 |
+ goto put_dev; |
21836 |
+ } |
21837 |
+ llcp_sock->ssap = nfc_llcp_get_sdp_ssap(local, llcp_sock); |
21838 |
+ if (llcp_sock->ssap == LLCP_SAP_MAX) { |
21839 |
+ nfc_llcp_local_put(llcp_sock->local); |
21840 |
++ llcp_sock->local = NULL; |
21841 |
+ kfree(llcp_sock->service_name); |
21842 |
+ llcp_sock->service_name = NULL; |
21843 |
+ ret = -EADDRINUSE; |
21844 |
+@@ -709,6 +711,7 @@ static int llcp_sock_connect(struct socket *sock, struct sockaddr *_addr, |
21845 |
+ llcp_sock->ssap = nfc_llcp_get_local_ssap(local); |
21846 |
+ if (llcp_sock->ssap == LLCP_SAP_MAX) { |
21847 |
+ nfc_llcp_local_put(llcp_sock->local); |
21848 |
++ llcp_sock->local = NULL; |
21849 |
+ ret = -ENOMEM; |
21850 |
+ goto put_dev; |
21851 |
+ } |
21852 |
+@@ -756,6 +759,7 @@ sock_unlink: |
21853 |
+ sock_llcp_release: |
21854 |
+ nfc_llcp_put_ssap(local, llcp_sock->ssap); |
21855 |
+ nfc_llcp_local_put(llcp_sock->local); |
21856 |
++ llcp_sock->local = NULL; |
21857 |
+ |
21858 |
+ put_dev: |
21859 |
+ nfc_put_device(dev); |
21860 |
+diff --git a/net/packet/af_packet.c b/net/packet/af_packet.c |
21861 |
+index 6bbc7a4485938..b6b0024c5fac9 100644 |
21862 |
+--- a/net/packet/af_packet.c |
21863 |
++++ b/net/packet/af_packet.c |
21864 |
+@@ -1359,7 +1359,7 @@ static unsigned int fanout_demux_rollover(struct packet_fanout *f, |
21865 |
+ struct packet_sock *po, *po_next, *po_skip = NULL; |
21866 |
+ unsigned int i, j, room = ROOM_NONE; |
21867 |
+ |
21868 |
+- po = pkt_sk(f->arr[idx]); |
21869 |
++ po = pkt_sk(rcu_dereference(f->arr[idx])); |
21870 |
+ |
21871 |
+ if (try_self) { |
21872 |
+ room = packet_rcv_has_room(po, skb); |
21873 |
+@@ -1371,7 +1371,7 @@ static unsigned int fanout_demux_rollover(struct packet_fanout *f, |
21874 |
+ |
21875 |
+ i = j = min_t(int, po->rollover->sock, num - 1); |
21876 |
+ do { |
21877 |
+- po_next = pkt_sk(f->arr[i]); |
21878 |
++ po_next = pkt_sk(rcu_dereference(f->arr[i])); |
21879 |
+ if (po_next != po_skip && !READ_ONCE(po_next->pressure) && |
21880 |
+ packet_rcv_has_room(po_next, skb) == ROOM_NORMAL) { |
21881 |
+ if (i != j) |
21882 |
+@@ -1466,7 +1466,7 @@ static int packet_rcv_fanout(struct sk_buff *skb, struct net_device *dev, |
21883 |
+ if (fanout_has_flag(f, PACKET_FANOUT_FLAG_ROLLOVER)) |
21884 |
+ idx = fanout_demux_rollover(f, skb, idx, true, num); |
21885 |
+ |
21886 |
+- po = pkt_sk(f->arr[idx]); |
21887 |
++ po = pkt_sk(rcu_dereference(f->arr[idx])); |
21888 |
+ return po->prot_hook.func(skb, dev, &po->prot_hook, orig_dev); |
21889 |
+ } |
21890 |
+ |
21891 |
+@@ -1480,7 +1480,7 @@ static void __fanout_link(struct sock *sk, struct packet_sock *po) |
21892 |
+ struct packet_fanout *f = po->fanout; |
21893 |
+ |
21894 |
+ spin_lock(&f->lock); |
21895 |
+- f->arr[f->num_members] = sk; |
21896 |
++ rcu_assign_pointer(f->arr[f->num_members], sk); |
21897 |
+ smp_wmb(); |
21898 |
+ f->num_members++; |
21899 |
+ if (f->num_members == 1) |
21900 |
+@@ -1495,11 +1495,14 @@ static void __fanout_unlink(struct sock *sk, struct packet_sock *po) |
21901 |
+ |
21902 |
+ spin_lock(&f->lock); |
21903 |
+ for (i = 0; i < f->num_members; i++) { |
21904 |
+- if (f->arr[i] == sk) |
21905 |
++ if (rcu_dereference_protected(f->arr[i], |
21906 |
++ lockdep_is_held(&f->lock)) == sk) |
21907 |
+ break; |
21908 |
+ } |
21909 |
+ BUG_ON(i >= f->num_members); |
21910 |
+- f->arr[i] = f->arr[f->num_members - 1]; |
21911 |
++ rcu_assign_pointer(f->arr[i], |
21912 |
++ rcu_dereference_protected(f->arr[f->num_members - 1], |
21913 |
++ lockdep_is_held(&f->lock))); |
21914 |
+ f->num_members--; |
21915 |
+ if (f->num_members == 0) |
21916 |
+ __dev_remove_pack(&f->prot_hook); |
21917 |
+diff --git a/net/packet/internal.h b/net/packet/internal.h |
21918 |
+index baafc3f3fa252..7af1e9179385f 100644 |
21919 |
+--- a/net/packet/internal.h |
21920 |
++++ b/net/packet/internal.h |
21921 |
+@@ -94,7 +94,7 @@ struct packet_fanout { |
21922 |
+ spinlock_t lock; |
21923 |
+ refcount_t sk_ref; |
21924 |
+ struct packet_type prot_hook ____cacheline_aligned_in_smp; |
21925 |
+- struct sock *arr[]; |
21926 |
++ struct sock __rcu *arr[]; |
21927 |
+ }; |
21928 |
+ |
21929 |
+ struct packet_rollover { |
21930 |
+diff --git a/net/sctp/socket.c b/net/sctp/socket.c |
21931 |
+index b9b3d899a611c..4ae428f2f2c57 100644 |
21932 |
+--- a/net/sctp/socket.c |
21933 |
++++ b/net/sctp/socket.c |
21934 |
+@@ -357,6 +357,18 @@ static struct sctp_af *sctp_sockaddr_af(struct sctp_sock *opt, |
21935 |
+ return af; |
21936 |
+ } |
21937 |
+ |
21938 |
++static void sctp_auto_asconf_init(struct sctp_sock *sp) |
21939 |
++{ |
21940 |
++ struct net *net = sock_net(&sp->inet.sk); |
21941 |
++ |
21942 |
++ if (net->sctp.default_auto_asconf) { |
21943 |
++ spin_lock(&net->sctp.addr_wq_lock); |
21944 |
++ list_add_tail(&sp->auto_asconf_list, &net->sctp.auto_asconf_splist); |
21945 |
++ spin_unlock(&net->sctp.addr_wq_lock); |
21946 |
++ sp->do_auto_asconf = 1; |
21947 |
++ } |
21948 |
++} |
21949 |
++ |
21950 |
+ /* Bind a local address either to an endpoint or to an association. */ |
21951 |
+ static int sctp_do_bind(struct sock *sk, union sctp_addr *addr, int len) |
21952 |
+ { |
21953 |
+@@ -418,8 +430,10 @@ static int sctp_do_bind(struct sock *sk, union sctp_addr *addr, int len) |
21954 |
+ return -EADDRINUSE; |
21955 |
+ |
21956 |
+ /* Refresh ephemeral port. */ |
21957 |
+- if (!bp->port) |
21958 |
++ if (!bp->port) { |
21959 |
+ bp->port = inet_sk(sk)->inet_num; |
21960 |
++ sctp_auto_asconf_init(sp); |
21961 |
++ } |
21962 |
+ |
21963 |
+ /* Add the address to the bind address list. |
21964 |
+ * Use GFP_ATOMIC since BHs will be disabled. |
21965 |
+@@ -1520,9 +1534,11 @@ static void sctp_close(struct sock *sk, long timeout) |
21966 |
+ |
21967 |
+ /* Supposedly, no process has access to the socket, but |
21968 |
+ * the net layers still may. |
21969 |
++ * Also, sctp_destroy_sock() needs to be called with addr_wq_lock |
21970 |
++ * held and that should be grabbed before socket lock. |
21971 |
+ */ |
21972 |
+- local_bh_disable(); |
21973 |
+- bh_lock_sock(sk); |
21974 |
++ spin_lock_bh(&net->sctp.addr_wq_lock); |
21975 |
++ bh_lock_sock_nested(sk); |
21976 |
+ |
21977 |
+ /* Hold the sock, since sk_common_release() will put sock_put() |
21978 |
+ * and we have just a little more cleanup. |
21979 |
+@@ -1531,7 +1547,7 @@ static void sctp_close(struct sock *sk, long timeout) |
21980 |
+ sk_common_release(sk); |
21981 |
+ |
21982 |
+ bh_unlock_sock(sk); |
21983 |
+- local_bh_enable(); |
21984 |
++ spin_unlock_bh(&net->sctp.addr_wq_lock); |
21985 |
+ |
21986 |
+ sock_put(sk); |
21987 |
+ |
21988 |
+@@ -4991,16 +5007,6 @@ static int sctp_init_sock(struct sock *sk) |
21989 |
+ sk_sockets_allocated_inc(sk); |
21990 |
+ sock_prot_inuse_add(net, sk->sk_prot, 1); |
21991 |
+ |
21992 |
+- if (net->sctp.default_auto_asconf) { |
21993 |
+- spin_lock(&sock_net(sk)->sctp.addr_wq_lock); |
21994 |
+- list_add_tail(&sp->auto_asconf_list, |
21995 |
+- &net->sctp.auto_asconf_splist); |
21996 |
+- sp->do_auto_asconf = 1; |
21997 |
+- spin_unlock(&sock_net(sk)->sctp.addr_wq_lock); |
21998 |
+- } else { |
21999 |
+- sp->do_auto_asconf = 0; |
22000 |
+- } |
22001 |
+- |
22002 |
+ local_bh_enable(); |
22003 |
+ |
22004 |
+ return 0; |
22005 |
+@@ -5025,9 +5031,7 @@ static void sctp_destroy_sock(struct sock *sk) |
22006 |
+ |
22007 |
+ if (sp->do_auto_asconf) { |
22008 |
+ sp->do_auto_asconf = 0; |
22009 |
+- spin_lock_bh(&sock_net(sk)->sctp.addr_wq_lock); |
22010 |
+ list_del(&sp->auto_asconf_list); |
22011 |
+- spin_unlock_bh(&sock_net(sk)->sctp.addr_wq_lock); |
22012 |
+ } |
22013 |
+ sctp_endpoint_free(sp->ep); |
22014 |
+ local_bh_disable(); |
22015 |
+@@ -9398,6 +9402,8 @@ static int sctp_sock_migrate(struct sock *oldsk, struct sock *newsk, |
22016 |
+ return err; |
22017 |
+ } |
22018 |
+ |
22019 |
++ sctp_auto_asconf_init(newsp); |
22020 |
++ |
22021 |
+ /* Move any messages in the old socket's receive queue that are for the |
22022 |
+ * peeled off association to the new socket's receive queue. |
22023 |
+ */ |
22024 |
+diff --git a/net/tipc/crypto.c b/net/tipc/crypto.c |
22025 |
+index 97710ce36047c..c89ce47c56cf2 100644 |
22026 |
+--- a/net/tipc/crypto.c |
22027 |
++++ b/net/tipc/crypto.c |
22028 |
+@@ -1492,6 +1492,8 @@ int tipc_crypto_start(struct tipc_crypto **crypto, struct net *net, |
22029 |
+ /* Allocate statistic structure */ |
22030 |
+ c->stats = alloc_percpu_gfp(struct tipc_crypto_stats, GFP_ATOMIC); |
22031 |
+ if (!c->stats) { |
22032 |
++ if (c->wq) |
22033 |
++ destroy_workqueue(c->wq); |
22034 |
+ kfree_sensitive(c); |
22035 |
+ return -ENOMEM; |
22036 |
+ } |
22037 |
+diff --git a/net/vmw_vsock/virtio_transport_common.c b/net/vmw_vsock/virtio_transport_common.c |
22038 |
+index e4370b1b74947..902cb6dd710bd 100644 |
22039 |
+--- a/net/vmw_vsock/virtio_transport_common.c |
22040 |
++++ b/net/vmw_vsock/virtio_transport_common.c |
22041 |
+@@ -733,6 +733,23 @@ static int virtio_transport_reset_no_sock(const struct virtio_transport *t, |
22042 |
+ return t->send_pkt(reply); |
22043 |
+ } |
22044 |
+ |
22045 |
++/* This function should be called with sk_lock held and SOCK_DONE set */ |
22046 |
++static void virtio_transport_remove_sock(struct vsock_sock *vsk) |
22047 |
++{ |
22048 |
++ struct virtio_vsock_sock *vvs = vsk->trans; |
22049 |
++ struct virtio_vsock_pkt *pkt, *tmp; |
22050 |
++ |
22051 |
++ /* We don't need to take rx_lock, as the socket is closing and we are |
22052 |
++ * removing it. |
22053 |
++ */ |
22054 |
++ list_for_each_entry_safe(pkt, tmp, &vvs->rx_queue, list) { |
22055 |
++ list_del(&pkt->list); |
22056 |
++ virtio_transport_free_pkt(pkt); |
22057 |
++ } |
22058 |
++ |
22059 |
++ vsock_remove_sock(vsk); |
22060 |
++} |
22061 |
++ |
22062 |
+ static void virtio_transport_wait_close(struct sock *sk, long timeout) |
22063 |
+ { |
22064 |
+ if (timeout) { |
22065 |
+@@ -765,7 +782,7 @@ static void virtio_transport_do_close(struct vsock_sock *vsk, |
22066 |
+ (!cancel_timeout || cancel_delayed_work(&vsk->close_work))) { |
22067 |
+ vsk->close_work_scheduled = false; |
22068 |
+ |
22069 |
+- vsock_remove_sock(vsk); |
22070 |
++ virtio_transport_remove_sock(vsk); |
22071 |
+ |
22072 |
+ /* Release refcnt obtained when we scheduled the timeout */ |
22073 |
+ sock_put(sk); |
22074 |
+@@ -828,22 +845,15 @@ static bool virtio_transport_close(struct vsock_sock *vsk) |
22075 |
+ |
22076 |
+ void virtio_transport_release(struct vsock_sock *vsk) |
22077 |
+ { |
22078 |
+- struct virtio_vsock_sock *vvs = vsk->trans; |
22079 |
+- struct virtio_vsock_pkt *pkt, *tmp; |
22080 |
+ struct sock *sk = &vsk->sk; |
22081 |
+ bool remove_sock = true; |
22082 |
+ |
22083 |
+ if (sk->sk_type == SOCK_STREAM) |
22084 |
+ remove_sock = virtio_transport_close(vsk); |
22085 |
+ |
22086 |
+- list_for_each_entry_safe(pkt, tmp, &vvs->rx_queue, list) { |
22087 |
+- list_del(&pkt->list); |
22088 |
+- virtio_transport_free_pkt(pkt); |
22089 |
+- } |
22090 |
+- |
22091 |
+ if (remove_sock) { |
22092 |
+ sock_set_flag(sk, SOCK_DONE); |
22093 |
+- vsock_remove_sock(vsk); |
22094 |
++ virtio_transport_remove_sock(vsk); |
22095 |
+ } |
22096 |
+ } |
22097 |
+ EXPORT_SYMBOL_GPL(virtio_transport_release); |
22098 |
+diff --git a/net/vmw_vsock/vmci_transport.c b/net/vmw_vsock/vmci_transport.c |
22099 |
+index 8b65323207db5..1c9ecb18b8e64 100644 |
22100 |
+--- a/net/vmw_vsock/vmci_transport.c |
22101 |
++++ b/net/vmw_vsock/vmci_transport.c |
22102 |
+@@ -568,8 +568,7 @@ vmci_transport_queue_pair_alloc(struct vmci_qp **qpair, |
22103 |
+ peer, flags, VMCI_NO_PRIVILEGE_FLAGS); |
22104 |
+ out: |
22105 |
+ if (err < 0) { |
22106 |
+- pr_err("Could not attach to queue pair with %d\n", |
22107 |
+- err); |
22108 |
++ pr_err_once("Could not attach to queue pair with %d\n", err); |
22109 |
+ err = vmci_transport_error_to_vsock_error(err); |
22110 |
+ } |
22111 |
+ |
22112 |
+diff --git a/net/wireless/scan.c b/net/wireless/scan.c |
22113 |
+index 1f1241443a1cc..341294dadaf14 100644 |
22114 |
+--- a/net/wireless/scan.c |
22115 |
++++ b/net/wireless/scan.c |
22116 |
+@@ -1751,6 +1751,8 @@ cfg80211_bss_update(struct cfg80211_registered_device *rdev, |
22117 |
+ |
22118 |
+ if (rdev->bss_entries >= bss_entries_limit && |
22119 |
+ !cfg80211_bss_expire_oldest(rdev)) { |
22120 |
++ if (!list_empty(&new->hidden_list)) |
22121 |
++ list_del(&new->hidden_list); |
22122 |
+ kfree(new); |
22123 |
+ goto drop; |
22124 |
+ } |
22125 |
+diff --git a/net/xdp/xsk.c b/net/xdp/xsk.c |
22126 |
+index 4a83117507f5a..9e865fe864b70 100644 |
22127 |
+--- a/net/xdp/xsk.c |
22128 |
++++ b/net/xdp/xsk.c |
22129 |
+@@ -439,12 +439,16 @@ static int xsk_generic_xmit(struct sock *sk) |
22130 |
+ struct sk_buff *skb; |
22131 |
+ unsigned long flags; |
22132 |
+ int err = 0; |
22133 |
++ u32 hr, tr; |
22134 |
+ |
22135 |
+ mutex_lock(&xs->mutex); |
22136 |
+ |
22137 |
+ if (xs->queue_id >= xs->dev->real_num_tx_queues) |
22138 |
+ goto out; |
22139 |
+ |
22140 |
++ hr = max(NET_SKB_PAD, L1_CACHE_ALIGN(xs->dev->needed_headroom)); |
22141 |
++ tr = xs->dev->needed_tailroom; |
22142 |
++ |
22143 |
+ while (xskq_cons_peek_desc(xs->tx, &desc, xs->pool)) { |
22144 |
+ char *buffer; |
22145 |
+ u64 addr; |
22146 |
+@@ -456,11 +460,13 @@ static int xsk_generic_xmit(struct sock *sk) |
22147 |
+ } |
22148 |
+ |
22149 |
+ len = desc.len; |
22150 |
+- skb = sock_alloc_send_skb(sk, len, 1, &err); |
22151 |
++ skb = sock_alloc_send_skb(sk, hr + len + tr, 1, &err); |
22152 |
+ if (unlikely(!skb)) |
22153 |
+ goto out; |
22154 |
+ |
22155 |
++ skb_reserve(skb, hr); |
22156 |
+ skb_put(skb, len); |
22157 |
++ |
22158 |
+ addr = desc.addr; |
22159 |
+ buffer = xsk_buff_raw_get_data(xs->pool, addr); |
22160 |
+ err = skb_store_bits(skb, 0, buffer, len); |
22161 |
+diff --git a/samples/kfifo/bytestream-example.c b/samples/kfifo/bytestream-example.c |
22162 |
+index c406f03ee5519..5a90aa5278775 100644 |
22163 |
+--- a/samples/kfifo/bytestream-example.c |
22164 |
++++ b/samples/kfifo/bytestream-example.c |
22165 |
+@@ -122,8 +122,10 @@ static ssize_t fifo_write(struct file *file, const char __user *buf, |
22166 |
+ ret = kfifo_from_user(&test, buf, count, &copied); |
22167 |
+ |
22168 |
+ mutex_unlock(&write_lock); |
22169 |
++ if (ret) |
22170 |
++ return ret; |
22171 |
+ |
22172 |
+- return ret ? ret : copied; |
22173 |
++ return copied; |
22174 |
+ } |
22175 |
+ |
22176 |
+ static ssize_t fifo_read(struct file *file, char __user *buf, |
22177 |
+@@ -138,8 +140,10 @@ static ssize_t fifo_read(struct file *file, char __user *buf, |
22178 |
+ ret = kfifo_to_user(&test, buf, count, &copied); |
22179 |
+ |
22180 |
+ mutex_unlock(&read_lock); |
22181 |
++ if (ret) |
22182 |
++ return ret; |
22183 |
+ |
22184 |
+- return ret ? ret : copied; |
22185 |
++ return copied; |
22186 |
+ } |
22187 |
+ |
22188 |
+ static const struct proc_ops fifo_proc_ops = { |
22189 |
+diff --git a/samples/kfifo/inttype-example.c b/samples/kfifo/inttype-example.c |
22190 |
+index 78977fc4a23f7..e5403d8c971a5 100644 |
22191 |
+--- a/samples/kfifo/inttype-example.c |
22192 |
++++ b/samples/kfifo/inttype-example.c |
22193 |
+@@ -115,8 +115,10 @@ static ssize_t fifo_write(struct file *file, const char __user *buf, |
22194 |
+ ret = kfifo_from_user(&test, buf, count, &copied); |
22195 |
+ |
22196 |
+ mutex_unlock(&write_lock); |
22197 |
++ if (ret) |
22198 |
++ return ret; |
22199 |
+ |
22200 |
+- return ret ? ret : copied; |
22201 |
++ return copied; |
22202 |
+ } |
22203 |
+ |
22204 |
+ static ssize_t fifo_read(struct file *file, char __user *buf, |
22205 |
+@@ -131,8 +133,10 @@ static ssize_t fifo_read(struct file *file, char __user *buf, |
22206 |
+ ret = kfifo_to_user(&test, buf, count, &copied); |
22207 |
+ |
22208 |
+ mutex_unlock(&read_lock); |
22209 |
++ if (ret) |
22210 |
++ return ret; |
22211 |
+ |
22212 |
+- return ret ? ret : copied; |
22213 |
++ return copied; |
22214 |
+ } |
22215 |
+ |
22216 |
+ static const struct proc_ops fifo_proc_ops = { |
22217 |
+diff --git a/samples/kfifo/record-example.c b/samples/kfifo/record-example.c |
22218 |
+index c507998a2617c..f64f3d62d6c2a 100644 |
22219 |
+--- a/samples/kfifo/record-example.c |
22220 |
++++ b/samples/kfifo/record-example.c |
22221 |
+@@ -129,8 +129,10 @@ static ssize_t fifo_write(struct file *file, const char __user *buf, |
22222 |
+ ret = kfifo_from_user(&test, buf, count, &copied); |
22223 |
+ |
22224 |
+ mutex_unlock(&write_lock); |
22225 |
++ if (ret) |
22226 |
++ return ret; |
22227 |
+ |
22228 |
+- return ret ? ret : copied; |
22229 |
++ return copied; |
22230 |
+ } |
22231 |
+ |
22232 |
+ static ssize_t fifo_read(struct file *file, char __user *buf, |
22233 |
+@@ -145,8 +147,10 @@ static ssize_t fifo_read(struct file *file, char __user *buf, |
22234 |
+ ret = kfifo_to_user(&test, buf, count, &copied); |
22235 |
+ |
22236 |
+ mutex_unlock(&read_lock); |
22237 |
++ if (ret) |
22238 |
++ return ret; |
22239 |
+ |
22240 |
+- return ret ? ret : copied; |
22241 |
++ return copied; |
22242 |
+ } |
22243 |
+ |
22244 |
+ static const struct proc_ops fifo_proc_ops = { |
22245 |
+diff --git a/security/integrity/ima/ima_template.c b/security/integrity/ima/ima_template.c |
22246 |
+index e22e510ae92d4..4e081e6500476 100644 |
22247 |
+--- a/security/integrity/ima/ima_template.c |
22248 |
++++ b/security/integrity/ima/ima_template.c |
22249 |
+@@ -494,8 +494,8 @@ int ima_restore_measurement_list(loff_t size, void *buf) |
22250 |
+ } |
22251 |
+ } |
22252 |
+ |
22253 |
+- entry->pcr = !ima_canonical_fmt ? *(hdr[HDR_PCR].data) : |
22254 |
+- le32_to_cpu(*(hdr[HDR_PCR].data)); |
22255 |
++ entry->pcr = !ima_canonical_fmt ? *(u32 *)(hdr[HDR_PCR].data) : |
22256 |
++ le32_to_cpu(*(u32 *)(hdr[HDR_PCR].data)); |
22257 |
+ ret = ima_restore_measurement_entry(entry); |
22258 |
+ if (ret < 0) |
22259 |
+ break; |
22260 |
+diff --git a/security/keys/trusted-keys/trusted_tpm1.c b/security/keys/trusted-keys/trusted_tpm1.c |
22261 |
+index 493eb91ed017f..1e13c9f7ea8c1 100644 |
22262 |
+--- a/security/keys/trusted-keys/trusted_tpm1.c |
22263 |
++++ b/security/keys/trusted-keys/trusted_tpm1.c |
22264 |
+@@ -791,13 +791,33 @@ static int getoptions(char *c, struct trusted_key_payload *pay, |
22265 |
+ return -EINVAL; |
22266 |
+ break; |
22267 |
+ case Opt_blobauth: |
22268 |
+- if (strlen(args[0].from) != 2 * SHA1_DIGEST_SIZE) |
22269 |
+- return -EINVAL; |
22270 |
+- res = hex2bin(opt->blobauth, args[0].from, |
22271 |
+- SHA1_DIGEST_SIZE); |
22272 |
+- if (res < 0) |
22273 |
+- return -EINVAL; |
22274 |
++ /* |
22275 |
++ * TPM 1.2 authorizations are sha1 hashes passed in as |
22276 |
++ * hex strings. TPM 2.0 authorizations are simple |
22277 |
++ * passwords (although it can take a hash as well) |
22278 |
++ */ |
22279 |
++ opt->blobauth_len = strlen(args[0].from); |
22280 |
++ |
22281 |
++ if (opt->blobauth_len == 2 * TPM_DIGEST_SIZE) { |
22282 |
++ res = hex2bin(opt->blobauth, args[0].from, |
22283 |
++ TPM_DIGEST_SIZE); |
22284 |
++ if (res < 0) |
22285 |
++ return -EINVAL; |
22286 |
++ |
22287 |
++ opt->blobauth_len = TPM_DIGEST_SIZE; |
22288 |
++ break; |
22289 |
++ } |
22290 |
++ |
22291 |
++ if (tpm2 && opt->blobauth_len <= sizeof(opt->blobauth)) { |
22292 |
++ memcpy(opt->blobauth, args[0].from, |
22293 |
++ opt->blobauth_len); |
22294 |
++ break; |
22295 |
++ } |
22296 |
++ |
22297 |
++ return -EINVAL; |
22298 |
++ |
22299 |
+ break; |
22300 |
++ |
22301 |
+ case Opt_migratable: |
22302 |
+ if (*args[0].from == '0') |
22303 |
+ pay->migratable = 0; |
22304 |
+diff --git a/security/keys/trusted-keys/trusted_tpm2.c b/security/keys/trusted-keys/trusted_tpm2.c |
22305 |
+index c87c4df8703d4..4c19d3abddbee 100644 |
22306 |
+--- a/security/keys/trusted-keys/trusted_tpm2.c |
22307 |
++++ b/security/keys/trusted-keys/trusted_tpm2.c |
22308 |
+@@ -97,10 +97,12 @@ int tpm2_seal_trusted(struct tpm_chip *chip, |
22309 |
+ TPM_DIGEST_SIZE); |
22310 |
+ |
22311 |
+ /* sensitive */ |
22312 |
+- tpm_buf_append_u16(&buf, 4 + TPM_DIGEST_SIZE + payload->key_len + 1); |
22313 |
++ tpm_buf_append_u16(&buf, 4 + options->blobauth_len + payload->key_len + 1); |
22314 |
++ |
22315 |
++ tpm_buf_append_u16(&buf, options->blobauth_len); |
22316 |
++ if (options->blobauth_len) |
22317 |
++ tpm_buf_append(&buf, options->blobauth, options->blobauth_len); |
22318 |
+ |
22319 |
+- tpm_buf_append_u16(&buf, TPM_DIGEST_SIZE); |
22320 |
+- tpm_buf_append(&buf, options->blobauth, TPM_DIGEST_SIZE); |
22321 |
+ tpm_buf_append_u16(&buf, payload->key_len + 1); |
22322 |
+ tpm_buf_append(&buf, payload->key, payload->key_len); |
22323 |
+ tpm_buf_append_u8(&buf, payload->migratable); |
22324 |
+@@ -265,7 +267,7 @@ static int tpm2_unseal_cmd(struct tpm_chip *chip, |
22325 |
+ NULL /* nonce */, 0, |
22326 |
+ TPM2_SA_CONTINUE_SESSION, |
22327 |
+ options->blobauth /* hmac */, |
22328 |
+- TPM_DIGEST_SIZE); |
22329 |
++ options->blobauth_len); |
22330 |
+ |
22331 |
+ rc = tpm_transmit_cmd(chip, &buf, 6, "unsealing"); |
22332 |
+ if (rc > 0) |
22333 |
+diff --git a/security/selinux/include/classmap.h b/security/selinux/include/classmap.h |
22334 |
+index 40cebde62856a..b9fdba2ff4163 100644 |
22335 |
+--- a/security/selinux/include/classmap.h |
22336 |
++++ b/security/selinux/include/classmap.h |
22337 |
+@@ -242,11 +242,12 @@ struct security_class_mapping secclass_map[] = { |
22338 |
+ { "infiniband_endport", |
22339 |
+ { "manage_subnet", NULL } }, |
22340 |
+ { "bpf", |
22341 |
+- {"map_create", "map_read", "map_write", "prog_load", "prog_run"} }, |
22342 |
++ { "map_create", "map_read", "map_write", "prog_load", "prog_run", |
22343 |
++ NULL } }, |
22344 |
+ { "xdp_socket", |
22345 |
+ { COMMON_SOCK_PERMS, NULL } }, |
22346 |
+ { "perf_event", |
22347 |
+- {"open", "cpu", "kernel", "tracepoint", "read", "write"} }, |
22348 |
++ { "open", "cpu", "kernel", "tracepoint", "read", "write", NULL } }, |
22349 |
+ { "lockdown", |
22350 |
+ { "integrity", "confidentiality", NULL } }, |
22351 |
+ { NULL } |
22352 |
+diff --git a/sound/core/init.c b/sound/core/init.c |
22353 |
+index cc8208df26f39..29f1ed707fd10 100644 |
22354 |
+--- a/sound/core/init.c |
22355 |
++++ b/sound/core/init.c |
22356 |
+@@ -388,10 +388,8 @@ int snd_card_disconnect(struct snd_card *card) |
22357 |
+ return 0; |
22358 |
+ } |
22359 |
+ card->shutdown = 1; |
22360 |
+- spin_unlock(&card->files_lock); |
22361 |
+ |
22362 |
+ /* replace file->f_op with special dummy operations */ |
22363 |
+- spin_lock(&card->files_lock); |
22364 |
+ list_for_each_entry(mfile, &card->files_list, list) { |
22365 |
+ /* it's critical part, use endless loop */ |
22366 |
+ /* we have no room to fail */ |
22367 |
+diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c |
22368 |
+index d05d16ddbdf2c..8ec57bd351dfe 100644 |
22369 |
+--- a/sound/pci/hda/patch_realtek.c |
22370 |
++++ b/sound/pci/hda/patch_realtek.c |
22371 |
+@@ -2470,13 +2470,13 @@ static const struct snd_pci_quirk alc882_fixup_tbl[] = { |
22372 |
+ ALC882_FIXUP_ACER_ASPIRE_8930G), |
22373 |
+ SND_PCI_QUIRK(0x1025, 0x0146, "Acer Aspire 6935G", |
22374 |
+ ALC882_FIXUP_ACER_ASPIRE_8930G), |
22375 |
++ SND_PCI_QUIRK(0x1025, 0x0142, "Acer Aspire 7730G", |
22376 |
++ ALC882_FIXUP_ACER_ASPIRE_4930G), |
22377 |
++ SND_PCI_QUIRK(0x1025, 0x0155, "Packard-Bell M5120", ALC882_FIXUP_PB_M5210), |
22378 |
+ SND_PCI_QUIRK(0x1025, 0x015e, "Acer Aspire 6930G", |
22379 |
+ ALC882_FIXUP_ACER_ASPIRE_4930G), |
22380 |
+ SND_PCI_QUIRK(0x1025, 0x0166, "Acer Aspire 6530G", |
22381 |
+ ALC882_FIXUP_ACER_ASPIRE_4930G), |
22382 |
+- SND_PCI_QUIRK(0x1025, 0x0142, "Acer Aspire 7730G", |
22383 |
+- ALC882_FIXUP_ACER_ASPIRE_4930G), |
22384 |
+- SND_PCI_QUIRK(0x1025, 0x0155, "Packard-Bell M5120", ALC882_FIXUP_PB_M5210), |
22385 |
+ SND_PCI_QUIRK(0x1025, 0x021e, "Acer Aspire 5739G", |
22386 |
+ ALC882_FIXUP_ACER_ASPIRE_4930G), |
22387 |
+ SND_PCI_QUIRK(0x1025, 0x0259, "Acer Aspire 5935", ALC889_FIXUP_DAC_ROUTE), |
22388 |
+@@ -2489,11 +2489,11 @@ static const struct snd_pci_quirk alc882_fixup_tbl[] = { |
22389 |
+ SND_PCI_QUIRK(0x1043, 0x835f, "Asus Eee 1601", ALC888_FIXUP_EEE1601), |
22390 |
+ SND_PCI_QUIRK(0x1043, 0x84bc, "ASUS ET2700", ALC887_FIXUP_ASUS_BASS), |
22391 |
+ SND_PCI_QUIRK(0x1043, 0x8691, "ASUS ROG Ranger VIII", ALC882_FIXUP_GPIO3), |
22392 |
++ SND_PCI_QUIRK(0x104d, 0x9043, "Sony Vaio VGC-LN51JGB", ALC882_FIXUP_NO_PRIMARY_HP), |
22393 |
++ SND_PCI_QUIRK(0x104d, 0x9044, "Sony VAIO AiO", ALC882_FIXUP_NO_PRIMARY_HP), |
22394 |
+ SND_PCI_QUIRK(0x104d, 0x9047, "Sony Vaio TT", ALC889_FIXUP_VAIO_TT), |
22395 |
+ SND_PCI_QUIRK(0x104d, 0x905a, "Sony Vaio Z", ALC882_FIXUP_NO_PRIMARY_HP), |
22396 |
+ SND_PCI_QUIRK(0x104d, 0x9060, "Sony Vaio VPCL14M1R", ALC882_FIXUP_NO_PRIMARY_HP), |
22397 |
+- SND_PCI_QUIRK(0x104d, 0x9043, "Sony Vaio VGC-LN51JGB", ALC882_FIXUP_NO_PRIMARY_HP), |
22398 |
+- SND_PCI_QUIRK(0x104d, 0x9044, "Sony VAIO AiO", ALC882_FIXUP_NO_PRIMARY_HP), |
22399 |
+ |
22400 |
+ /* All Apple entries are in codec SSIDs */ |
22401 |
+ SND_PCI_QUIRK(0x106b, 0x00a0, "MacBookPro 3,1", ALC889_FIXUP_MBP_VREF), |
22402 |
+@@ -2536,9 +2536,19 @@ static const struct snd_pci_quirk alc882_fixup_tbl[] = { |
22403 |
+ SND_PCI_QUIRK(0x1462, 0xda57, "MSI Z270-Gaming", ALC1220_FIXUP_GB_DUAL_CODECS), |
22404 |
+ SND_PCI_QUIRK_VENDOR(0x1462, "MSI", ALC882_FIXUP_GPIO3), |
22405 |
+ SND_PCI_QUIRK(0x147b, 0x107a, "Abit AW9D-MAX", ALC882_FIXUP_ABIT_AW9D_MAX), |
22406 |
++ SND_PCI_QUIRK(0x1558, 0x50d3, "Clevo PC50[ER][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS), |
22407 |
++ SND_PCI_QUIRK(0x1558, 0x65d1, "Clevo PB51[ER][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS), |
22408 |
++ SND_PCI_QUIRK(0x1558, 0x65d2, "Clevo PB51R[CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS), |
22409 |
++ SND_PCI_QUIRK(0x1558, 0x65e1, "Clevo PB51[ED][DF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS), |
22410 |
++ SND_PCI_QUIRK(0x1558, 0x65e5, "Clevo PC50D[PRS](?:-D|-G)?", ALC1220_FIXUP_CLEVO_PB51ED_PINS), |
22411 |
++ SND_PCI_QUIRK(0x1558, 0x67d1, "Clevo PB71[ER][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS), |
22412 |
++ SND_PCI_QUIRK(0x1558, 0x67e1, "Clevo PB71[DE][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS), |
22413 |
++ SND_PCI_QUIRK(0x1558, 0x67e5, "Clevo PC70D[PRS](?:-D|-G)?", ALC1220_FIXUP_CLEVO_PB51ED_PINS), |
22414 |
++ SND_PCI_QUIRK(0x1558, 0x70d1, "Clevo PC70[ER][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS), |
22415 |
++ SND_PCI_QUIRK(0x1558, 0x7714, "Clevo X170", ALC1220_FIXUP_CLEVO_PB51ED_PINS), |
22416 |
+ SND_PCI_QUIRK(0x1558, 0x9501, "Clevo P950HR", ALC1220_FIXUP_CLEVO_P950), |
22417 |
+ SND_PCI_QUIRK(0x1558, 0x9506, "Clevo P955HQ", ALC1220_FIXUP_CLEVO_P950), |
22418 |
+- SND_PCI_QUIRK(0x1558, 0x950A, "Clevo P955H[PR]", ALC1220_FIXUP_CLEVO_P950), |
22419 |
++ SND_PCI_QUIRK(0x1558, 0x950a, "Clevo P955H[PR]", ALC1220_FIXUP_CLEVO_P950), |
22420 |
+ SND_PCI_QUIRK(0x1558, 0x95e1, "Clevo P95xER", ALC1220_FIXUP_CLEVO_P950), |
22421 |
+ SND_PCI_QUIRK(0x1558, 0x95e2, "Clevo P950ER", ALC1220_FIXUP_CLEVO_P950), |
22422 |
+ SND_PCI_QUIRK(0x1558, 0x95e3, "Clevo P955[ER]T", ALC1220_FIXUP_CLEVO_P950), |
22423 |
+@@ -2548,16 +2558,6 @@ static const struct snd_pci_quirk alc882_fixup_tbl[] = { |
22424 |
+ SND_PCI_QUIRK(0x1558, 0x96e1, "Clevo P960[ER][CDFN]-K", ALC1220_FIXUP_CLEVO_P950), |
22425 |
+ SND_PCI_QUIRK(0x1558, 0x97e1, "Clevo P970[ER][CDFN]", ALC1220_FIXUP_CLEVO_P950), |
22426 |
+ SND_PCI_QUIRK(0x1558, 0x97e2, "Clevo P970RC-M", ALC1220_FIXUP_CLEVO_P950), |
22427 |
+- SND_PCI_QUIRK(0x1558, 0x50d3, "Clevo PC50[ER][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS), |
22428 |
+- SND_PCI_QUIRK(0x1558, 0x65d1, "Clevo PB51[ER][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS), |
22429 |
+- SND_PCI_QUIRK(0x1558, 0x65d2, "Clevo PB51R[CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS), |
22430 |
+- SND_PCI_QUIRK(0x1558, 0x65e1, "Clevo PB51[ED][DF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS), |
22431 |
+- SND_PCI_QUIRK(0x1558, 0x65e5, "Clevo PC50D[PRS](?:-D|-G)?", ALC1220_FIXUP_CLEVO_PB51ED_PINS), |
22432 |
+- SND_PCI_QUIRK(0x1558, 0x67d1, "Clevo PB71[ER][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS), |
22433 |
+- SND_PCI_QUIRK(0x1558, 0x67e1, "Clevo PB71[DE][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS), |
22434 |
+- SND_PCI_QUIRK(0x1558, 0x67e5, "Clevo PC70D[PRS](?:-D|-G)?", ALC1220_FIXUP_CLEVO_PB51ED_PINS), |
22435 |
+- SND_PCI_QUIRK(0x1558, 0x70d1, "Clevo PC70[ER][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS), |
22436 |
+- SND_PCI_QUIRK(0x1558, 0x7714, "Clevo X170", ALC1220_FIXUP_CLEVO_PB51ED_PINS), |
22437 |
+ SND_PCI_QUIRK_VENDOR(0x1558, "Clevo laptop", ALC882_FIXUP_EAPD), |
22438 |
+ SND_PCI_QUIRK(0x161f, 0x2054, "Medion laptop", ALC883_FIXUP_EAPD), |
22439 |
+ SND_PCI_QUIRK(0x17aa, 0x3a0d, "Lenovo Y530", ALC882_FIXUP_LENOVO_Y530), |
22440 |
+@@ -4331,6 +4331,35 @@ static void alc245_fixup_hp_x360_amp(struct hda_codec *codec, |
22441 |
+ } |
22442 |
+ } |
22443 |
+ |
22444 |
++/* toggle GPIO2 at each time stream is started; we use PREPARE state instead */ |
22445 |
++static void alc274_hp_envy_pcm_hook(struct hda_pcm_stream *hinfo, |
22446 |
++ struct hda_codec *codec, |
22447 |
++ struct snd_pcm_substream *substream, |
22448 |
++ int action) |
22449 |
++{ |
22450 |
++ switch (action) { |
22451 |
++ case HDA_GEN_PCM_ACT_PREPARE: |
22452 |
++ alc_update_gpio_data(codec, 0x04, true); |
22453 |
++ break; |
22454 |
++ case HDA_GEN_PCM_ACT_CLEANUP: |
22455 |
++ alc_update_gpio_data(codec, 0x04, false); |
22456 |
++ break; |
22457 |
++ } |
22458 |
++} |
22459 |
++ |
22460 |
++static void alc274_fixup_hp_envy_gpio(struct hda_codec *codec, |
22461 |
++ const struct hda_fixup *fix, |
22462 |
++ int action) |
22463 |
++{ |
22464 |
++ struct alc_spec *spec = codec->spec; |
22465 |
++ |
22466 |
++ if (action == HDA_FIXUP_ACT_PROBE) { |
22467 |
++ spec->gpio_mask |= 0x04; |
22468 |
++ spec->gpio_dir |= 0x04; |
22469 |
++ spec->gen.pcm_playback_hook = alc274_hp_envy_pcm_hook; |
22470 |
++ } |
22471 |
++} |
22472 |
++ |
22473 |
+ static void alc_update_coef_led(struct hda_codec *codec, |
22474 |
+ struct alc_coef_led *led, |
22475 |
+ bool polarity, bool on) |
22476 |
+@@ -6443,6 +6472,7 @@ enum { |
22477 |
+ ALC255_FIXUP_XIAOMI_HEADSET_MIC, |
22478 |
+ ALC274_FIXUP_HP_MIC, |
22479 |
+ ALC274_FIXUP_HP_HEADSET_MIC, |
22480 |
++ ALC274_FIXUP_HP_ENVY_GPIO, |
22481 |
+ ALC256_FIXUP_ASUS_HPE, |
22482 |
+ ALC285_FIXUP_THINKPAD_NO_BASS_SPK_HEADSET_JACK, |
22483 |
+ ALC287_FIXUP_HP_GPIO_LED, |
22484 |
+@@ -7882,6 +7912,10 @@ static const struct hda_fixup alc269_fixups[] = { |
22485 |
+ .chained = true, |
22486 |
+ .chain_id = ALC274_FIXUP_HP_MIC |
22487 |
+ }, |
22488 |
++ [ALC274_FIXUP_HP_ENVY_GPIO] = { |
22489 |
++ .type = HDA_FIXUP_FUNC, |
22490 |
++ .v.func = alc274_fixup_hp_envy_gpio, |
22491 |
++ }, |
22492 |
+ [ALC256_FIXUP_ASUS_HPE] = { |
22493 |
+ .type = HDA_FIXUP_VERBS, |
22494 |
+ .v.verbs = (const struct hda_verb[]) { |
22495 |
+@@ -7947,12 +7981,12 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { |
22496 |
+ SND_PCI_QUIRK(0x1025, 0x0349, "Acer AOD260", ALC269_FIXUP_INV_DMIC), |
22497 |
+ SND_PCI_QUIRK(0x1025, 0x047c, "Acer AC700", ALC269_FIXUP_ACER_AC700), |
22498 |
+ SND_PCI_QUIRK(0x1025, 0x072d, "Acer Aspire V5-571G", ALC269_FIXUP_ASPIRE_HEADSET_MIC), |
22499 |
+- SND_PCI_QUIRK(0x1025, 0x080d, "Acer Aspire V5-122P", ALC269_FIXUP_ASPIRE_HEADSET_MIC), |
22500 |
+ SND_PCI_QUIRK(0x1025, 0x0740, "Acer AO725", ALC271_FIXUP_HP_GATE_MIC_JACK), |
22501 |
+ SND_PCI_QUIRK(0x1025, 0x0742, "Acer AO756", ALC271_FIXUP_HP_GATE_MIC_JACK), |
22502 |
+ SND_PCI_QUIRK(0x1025, 0x0762, "Acer Aspire E1-472", ALC271_FIXUP_HP_GATE_MIC_JACK_E1_572), |
22503 |
+ SND_PCI_QUIRK(0x1025, 0x0775, "Acer Aspire E1-572", ALC271_FIXUP_HP_GATE_MIC_JACK_E1_572), |
22504 |
+ SND_PCI_QUIRK(0x1025, 0x079b, "Acer Aspire V5-573G", ALC282_FIXUP_ASPIRE_V5_PINS), |
22505 |
++ SND_PCI_QUIRK(0x1025, 0x080d, "Acer Aspire V5-122P", ALC269_FIXUP_ASPIRE_HEADSET_MIC), |
22506 |
+ SND_PCI_QUIRK(0x1025, 0x0840, "Acer Aspire E1", ALC269VB_FIXUP_ASPIRE_E1_COEF), |
22507 |
+ SND_PCI_QUIRK(0x1025, 0x101c, "Acer Veriton N2510G", ALC269_FIXUP_LIFEBOOK), |
22508 |
+ SND_PCI_QUIRK(0x1025, 0x102b, "Acer Aspire C24-860", ALC286_FIXUP_ACER_AIO_MIC_NO_PRESENCE), |
22509 |
+@@ -8008,8 +8042,8 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { |
22510 |
+ SND_PCI_QUIRK(0x1028, 0x0738, "Dell Precision 5820", ALC269_FIXUP_NO_SHUTUP), |
22511 |
+ SND_PCI_QUIRK(0x1028, 0x075c, "Dell XPS 27 7760", ALC298_FIXUP_SPK_VOLUME), |
22512 |
+ SND_PCI_QUIRK(0x1028, 0x075d, "Dell AIO", ALC298_FIXUP_SPK_VOLUME), |
22513 |
+- SND_PCI_QUIRK(0x1028, 0x07b0, "Dell Precision 7520", ALC295_FIXUP_DISABLE_DAC3), |
22514 |
+ SND_PCI_QUIRK(0x1028, 0x0798, "Dell Inspiron 17 7000 Gaming", ALC256_FIXUP_DELL_INSPIRON_7559_SUBWOOFER), |
22515 |
++ SND_PCI_QUIRK(0x1028, 0x07b0, "Dell Precision 7520", ALC295_FIXUP_DISABLE_DAC3), |
22516 |
+ SND_PCI_QUIRK(0x1028, 0x080c, "Dell WYSE", ALC225_FIXUP_DELL_WYSE_MIC_NO_PRESENCE), |
22517 |
+ SND_PCI_QUIRK(0x1028, 0x084b, "Dell", ALC274_FIXUP_DELL_AIO_LINEOUT_VERB), |
22518 |
+ SND_PCI_QUIRK(0x1028, 0x084e, "Dell", ALC274_FIXUP_DELL_AIO_LINEOUT_VERB), |
22519 |
+@@ -8019,8 +8053,8 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { |
22520 |
+ SND_PCI_QUIRK(0x1028, 0x08ad, "Dell WYSE AIO", ALC225_FIXUP_DELL_WYSE_AIO_MIC_NO_PRESENCE), |
22521 |
+ SND_PCI_QUIRK(0x1028, 0x08ae, "Dell WYSE NB", ALC225_FIXUP_DELL1_MIC_NO_PRESENCE), |
22522 |
+ SND_PCI_QUIRK(0x1028, 0x0935, "Dell", ALC274_FIXUP_DELL_AIO_LINEOUT_VERB), |
22523 |
+- SND_PCI_QUIRK(0x1028, 0x097e, "Dell Precision", ALC289_FIXUP_DUAL_SPK), |
22524 |
+ SND_PCI_QUIRK(0x1028, 0x097d, "Dell Precision", ALC289_FIXUP_DUAL_SPK), |
22525 |
++ SND_PCI_QUIRK(0x1028, 0x097e, "Dell Precision", ALC289_FIXUP_DUAL_SPK), |
22526 |
+ SND_PCI_QUIRK(0x1028, 0x098d, "Dell Precision", ALC233_FIXUP_ASUS_MIC_NO_PRESENCE), |
22527 |
+ SND_PCI_QUIRK(0x1028, 0x09bf, "Dell Precision", ALC233_FIXUP_ASUS_MIC_NO_PRESENCE), |
22528 |
+ SND_PCI_QUIRK(0x1028, 0x0a2e, "Dell", ALC236_FIXUP_DELL_AIO_HEADSET_MIC), |
22529 |
+@@ -8031,35 +8065,18 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { |
22530 |
+ SND_PCI_QUIRK(0x103c, 0x1586, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC2), |
22531 |
+ SND_PCI_QUIRK(0x103c, 0x18e6, "HP", ALC269_FIXUP_HP_GPIO_LED), |
22532 |
+ SND_PCI_QUIRK(0x103c, 0x218b, "HP", ALC269_FIXUP_LIMIT_INT_MIC_BOOST_MUTE_LED), |
22533 |
+- SND_PCI_QUIRK(0x103c, 0x225f, "HP", ALC280_FIXUP_HP_GPIO2_MIC_HOTKEY), |
22534 |
+- /* ALC282 */ |
22535 |
+ SND_PCI_QUIRK(0x103c, 0x21f9, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22536 |
+ SND_PCI_QUIRK(0x103c, 0x2210, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22537 |
+ SND_PCI_QUIRK(0x103c, 0x2214, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22538 |
++ SND_PCI_QUIRK(0x103c, 0x221b, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED), |
22539 |
++ SND_PCI_QUIRK(0x103c, 0x221c, "HP EliteBook 755 G2", ALC280_FIXUP_HP_HEADSET_MIC), |
22540 |
++ SND_PCI_QUIRK(0x103c, 0x2221, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED), |
22541 |
++ SND_PCI_QUIRK(0x103c, 0x2225, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED), |
22542 |
+ SND_PCI_QUIRK(0x103c, 0x2236, "HP", ALC269_FIXUP_HP_LINE1_MIC1_LED), |
22543 |
+ SND_PCI_QUIRK(0x103c, 0x2237, "HP", ALC269_FIXUP_HP_LINE1_MIC1_LED), |
22544 |
+ SND_PCI_QUIRK(0x103c, 0x2238, "HP", ALC269_FIXUP_HP_LINE1_MIC1_LED), |
22545 |
+ SND_PCI_QUIRK(0x103c, 0x2239, "HP", ALC269_FIXUP_HP_LINE1_MIC1_LED), |
22546 |
+ SND_PCI_QUIRK(0x103c, 0x224b, "HP", ALC269_FIXUP_HP_LINE1_MIC1_LED), |
22547 |
+- SND_PCI_QUIRK(0x103c, 0x2268, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22548 |
+- SND_PCI_QUIRK(0x103c, 0x226a, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22549 |
+- SND_PCI_QUIRK(0x103c, 0x226b, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22550 |
+- SND_PCI_QUIRK(0x103c, 0x226e, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22551 |
+- SND_PCI_QUIRK(0x103c, 0x2271, "HP", ALC286_FIXUP_HP_GPIO_LED), |
22552 |
+- SND_PCI_QUIRK(0x103c, 0x2272, "HP", ALC280_FIXUP_HP_DOCK_PINS), |
22553 |
+- SND_PCI_QUIRK(0x103c, 0x2273, "HP", ALC280_FIXUP_HP_DOCK_PINS), |
22554 |
+- SND_PCI_QUIRK(0x103c, 0x229e, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22555 |
+- SND_PCI_QUIRK(0x103c, 0x22b2, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22556 |
+- SND_PCI_QUIRK(0x103c, 0x22b7, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22557 |
+- SND_PCI_QUIRK(0x103c, 0x22bf, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22558 |
+- SND_PCI_QUIRK(0x103c, 0x22cf, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22559 |
+- SND_PCI_QUIRK(0x103c, 0x22db, "HP", ALC280_FIXUP_HP_9480M), |
22560 |
+- SND_PCI_QUIRK(0x103c, 0x22dc, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED), |
22561 |
+- SND_PCI_QUIRK(0x103c, 0x22fb, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED), |
22562 |
+- /* ALC290 */ |
22563 |
+- SND_PCI_QUIRK(0x103c, 0x221b, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED), |
22564 |
+- SND_PCI_QUIRK(0x103c, 0x2221, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED), |
22565 |
+- SND_PCI_QUIRK(0x103c, 0x2225, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED), |
22566 |
+ SND_PCI_QUIRK(0x103c, 0x2253, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED), |
22567 |
+ SND_PCI_QUIRK(0x103c, 0x2254, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED), |
22568 |
+ SND_PCI_QUIRK(0x103c, 0x2255, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED), |
22569 |
+@@ -8067,26 +8084,41 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { |
22570 |
+ SND_PCI_QUIRK(0x103c, 0x2257, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED), |
22571 |
+ SND_PCI_QUIRK(0x103c, 0x2259, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED), |
22572 |
+ SND_PCI_QUIRK(0x103c, 0x225a, "HP", ALC269_FIXUP_HP_DOCK_GPIO_MIC1_LED), |
22573 |
++ SND_PCI_QUIRK(0x103c, 0x225f, "HP", ALC280_FIXUP_HP_GPIO2_MIC_HOTKEY), |
22574 |
+ SND_PCI_QUIRK(0x103c, 0x2260, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22575 |
+ SND_PCI_QUIRK(0x103c, 0x2263, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22576 |
+ SND_PCI_QUIRK(0x103c, 0x2264, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22577 |
+ SND_PCI_QUIRK(0x103c, 0x2265, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22578 |
++ SND_PCI_QUIRK(0x103c, 0x2268, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22579 |
++ SND_PCI_QUIRK(0x103c, 0x226a, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22580 |
++ SND_PCI_QUIRK(0x103c, 0x226b, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22581 |
++ SND_PCI_QUIRK(0x103c, 0x226e, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22582 |
++ SND_PCI_QUIRK(0x103c, 0x2271, "HP", ALC286_FIXUP_HP_GPIO_LED), |
22583 |
+ SND_PCI_QUIRK(0x103c, 0x2272, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED), |
22584 |
++ SND_PCI_QUIRK(0x103c, 0x2272, "HP", ALC280_FIXUP_HP_DOCK_PINS), |
22585 |
+ SND_PCI_QUIRK(0x103c, 0x2273, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED), |
22586 |
++ SND_PCI_QUIRK(0x103c, 0x2273, "HP", ALC280_FIXUP_HP_DOCK_PINS), |
22587 |
+ SND_PCI_QUIRK(0x103c, 0x2278, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED), |
22588 |
+ SND_PCI_QUIRK(0x103c, 0x227f, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22589 |
+ SND_PCI_QUIRK(0x103c, 0x2282, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22590 |
+ SND_PCI_QUIRK(0x103c, 0x228b, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22591 |
+ SND_PCI_QUIRK(0x103c, 0x228e, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22592 |
++ SND_PCI_QUIRK(0x103c, 0x229e, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22593 |
++ SND_PCI_QUIRK(0x103c, 0x22b2, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22594 |
++ SND_PCI_QUIRK(0x103c, 0x22b7, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22595 |
++ SND_PCI_QUIRK(0x103c, 0x22bf, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22596 |
++ SND_PCI_QUIRK(0x103c, 0x22c4, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22597 |
+ SND_PCI_QUIRK(0x103c, 0x22c5, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22598 |
+ SND_PCI_QUIRK(0x103c, 0x22c7, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22599 |
+ SND_PCI_QUIRK(0x103c, 0x22c8, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22600 |
+- SND_PCI_QUIRK(0x103c, 0x22c4, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22601 |
++ SND_PCI_QUIRK(0x103c, 0x22cf, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22602 |
++ SND_PCI_QUIRK(0x103c, 0x22db, "HP", ALC280_FIXUP_HP_9480M), |
22603 |
++ SND_PCI_QUIRK(0x103c, 0x22dc, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED), |
22604 |
++ SND_PCI_QUIRK(0x103c, 0x22fb, "HP", ALC269_FIXUP_HP_GPIO_MIC1_LED), |
22605 |
+ SND_PCI_QUIRK(0x103c, 0x2334, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22606 |
+ SND_PCI_QUIRK(0x103c, 0x2335, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22607 |
+ SND_PCI_QUIRK(0x103c, 0x2336, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22608 |
+ SND_PCI_QUIRK(0x103c, 0x2337, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
22609 |
+- SND_PCI_QUIRK(0x103c, 0x221c, "HP EliteBook 755 G2", ALC280_FIXUP_HP_HEADSET_MIC), |
22610 |
+ SND_PCI_QUIRK(0x103c, 0x802e, "HP Z240 SFF", ALC221_FIXUP_HP_MIC_NO_PRESENCE), |
22611 |
+ SND_PCI_QUIRK(0x103c, 0x802f, "HP Z240", ALC221_FIXUP_HP_MIC_NO_PRESENCE), |
22612 |
+ SND_PCI_QUIRK(0x103c, 0x8077, "HP", ALC256_FIXUP_HP_HEADSET_MIC), |
22613 |
+@@ -8101,6 +8133,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { |
22614 |
+ SND_PCI_QUIRK(0x103c, 0x8497, "HP Envy x360", ALC269_FIXUP_HP_MUTE_LED_MIC3), |
22615 |
+ SND_PCI_QUIRK(0x103c, 0x84e7, "HP Pavilion 15", ALC269_FIXUP_HP_MUTE_LED_MIC3), |
22616 |
+ SND_PCI_QUIRK(0x103c, 0x869d, "HP", ALC236_FIXUP_HP_MUTE_LED), |
22617 |
++ SND_PCI_QUIRK(0x103c, 0x86c7, "HP Envy AiO 32", ALC274_FIXUP_HP_ENVY_GPIO), |
22618 |
+ SND_PCI_QUIRK(0x103c, 0x8724, "HP EliteBook 850 G7", ALC285_FIXUP_HP_GPIO_LED), |
22619 |
+ SND_PCI_QUIRK(0x103c, 0x8729, "HP", ALC285_FIXUP_HP_GPIO_LED), |
22620 |
+ SND_PCI_QUIRK(0x103c, 0x8730, "HP ProBook 445 G7", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF), |
22621 |
+@@ -8128,16 +8161,18 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { |
22622 |
+ SND_PCI_QUIRK(0x1043, 0x10d0, "ASUS X540LA/X540LJ", ALC255_FIXUP_ASUS_MIC_NO_PRESENCE), |
22623 |
+ SND_PCI_QUIRK(0x1043, 0x115d, "Asus 1015E", ALC269_FIXUP_LIMIT_INT_MIC_BOOST), |
22624 |
+ SND_PCI_QUIRK(0x1043, 0x11c0, "ASUS X556UR", ALC255_FIXUP_ASUS_MIC_NO_PRESENCE), |
22625 |
++ SND_PCI_QUIRK(0x1043, 0x125e, "ASUS Q524UQK", ALC255_FIXUP_ASUS_MIC_NO_PRESENCE), |
22626 |
+ SND_PCI_QUIRK(0x1043, 0x1271, "ASUS X430UN", ALC256_FIXUP_ASUS_MIC_NO_PRESENCE), |
22627 |
+ SND_PCI_QUIRK(0x1043, 0x1290, "ASUS X441SA", ALC233_FIXUP_EAPD_COEF_AND_MIC_NO_PRESENCE), |
22628 |
+ SND_PCI_QUIRK(0x1043, 0x12a0, "ASUS X441UV", ALC233_FIXUP_EAPD_COEF_AND_MIC_NO_PRESENCE), |
22629 |
+- SND_PCI_QUIRK(0x1043, 0x12f0, "ASUS X541UV", ALC256_FIXUP_ASUS_MIC), |
22630 |
+ SND_PCI_QUIRK(0x1043, 0x12e0, "ASUS X541SA", ALC256_FIXUP_ASUS_MIC), |
22631 |
++ SND_PCI_QUIRK(0x1043, 0x12f0, "ASUS X541UV", ALC256_FIXUP_ASUS_MIC), |
22632 |
+ SND_PCI_QUIRK(0x1043, 0x13b0, "ASUS Z550SA", ALC256_FIXUP_ASUS_MIC), |
22633 |
+ SND_PCI_QUIRK(0x1043, 0x1427, "Asus Zenbook UX31E", ALC269VB_FIXUP_ASUS_ZENBOOK), |
22634 |
+ SND_PCI_QUIRK(0x1043, 0x1517, "Asus Zenbook UX31A", ALC269VB_FIXUP_ASUS_ZENBOOK_UX31A), |
22635 |
+ SND_PCI_QUIRK(0x1043, 0x16e3, "ASUS UX50", ALC269_FIXUP_STEREO_DMIC), |
22636 |
+ SND_PCI_QUIRK(0x1043, 0x17d1, "ASUS UX431FL", ALC294_FIXUP_ASUS_DUAL_SPK), |
22637 |
++ SND_PCI_QUIRK(0x1043, 0x1881, "ASUS Zephyrus S/M", ALC294_FIXUP_ASUS_GX502_PINS), |
22638 |
+ SND_PCI_QUIRK(0x1043, 0x18b1, "Asus MJ401TA", ALC256_FIXUP_ASUS_HEADSET_MIC), |
22639 |
+ SND_PCI_QUIRK(0x1043, 0x18f1, "Asus FX505DT", ALC256_FIXUP_ASUS_HEADSET_MIC), |
22640 |
+ SND_PCI_QUIRK(0x1043, 0x194e, "ASUS UX563FD", ALC294_FIXUP_ASUS_HPE), |
22641 |
+@@ -8150,32 +8185,31 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { |
22642 |
+ SND_PCI_QUIRK(0x1043, 0x1b13, "Asus U41SV", ALC269_FIXUP_INV_DMIC), |
22643 |
+ SND_PCI_QUIRK(0x1043, 0x1bbd, "ASUS Z550MA", ALC255_FIXUP_ASUS_MIC_NO_PRESENCE), |
22644 |
+ SND_PCI_QUIRK(0x1043, 0x1c23, "Asus X55U", ALC269_FIXUP_LIMIT_INT_MIC_BOOST), |
22645 |
+- SND_PCI_QUIRK(0x1043, 0x125e, "ASUS Q524UQK", ALC255_FIXUP_ASUS_MIC_NO_PRESENCE), |
22646 |
+ SND_PCI_QUIRK(0x1043, 0x1ccd, "ASUS X555UB", ALC256_FIXUP_ASUS_MIC), |
22647 |
+ SND_PCI_QUIRK(0x1043, 0x1d4e, "ASUS TM420", ALC256_FIXUP_ASUS_HPE), |
22648 |
+ SND_PCI_QUIRK(0x1043, 0x1e11, "ASUS Zephyrus G15", ALC289_FIXUP_ASUS_GA502), |
22649 |
+ SND_PCI_QUIRK(0x1043, 0x1e8e, "ASUS Zephyrus G15", ALC289_FIXUP_ASUS_GA401), |
22650 |
+ SND_PCI_QUIRK(0x1043, 0x1f11, "ASUS Zephyrus G14", ALC289_FIXUP_ASUS_GA401), |
22651 |
+- SND_PCI_QUIRK(0x1043, 0x1881, "ASUS Zephyrus S/M", ALC294_FIXUP_ASUS_GX502_PINS), |
22652 |
+ SND_PCI_QUIRK(0x1043, 0x3030, "ASUS ZN270IE", ALC256_FIXUP_ASUS_AIO_GPIO2), |
22653 |
+ SND_PCI_QUIRK(0x1043, 0x831a, "ASUS P901", ALC269_FIXUP_STEREO_DMIC), |
22654 |
+ SND_PCI_QUIRK(0x1043, 0x834a, "ASUS S101", ALC269_FIXUP_STEREO_DMIC), |
22655 |
+ SND_PCI_QUIRK(0x1043, 0x8398, "ASUS P1005", ALC269_FIXUP_STEREO_DMIC), |
22656 |
+ SND_PCI_QUIRK(0x1043, 0x83ce, "ASUS P1005", ALC269_FIXUP_STEREO_DMIC), |
22657 |
+ SND_PCI_QUIRK(0x1043, 0x8516, "ASUS X101CH", ALC269_FIXUP_ASUS_X101), |
22658 |
+- SND_PCI_QUIRK(0x104d, 0x90b5, "Sony VAIO Pro 11", ALC286_FIXUP_SONY_MIC_NO_PRESENCE), |
22659 |
+- SND_PCI_QUIRK(0x104d, 0x90b6, "Sony VAIO Pro 13", ALC286_FIXUP_SONY_MIC_NO_PRESENCE), |
22660 |
+ SND_PCI_QUIRK(0x104d, 0x9073, "Sony VAIO", ALC275_FIXUP_SONY_VAIO_GPIO2), |
22661 |
+ SND_PCI_QUIRK(0x104d, 0x907b, "Sony VAIO", ALC275_FIXUP_SONY_HWEQ), |
22662 |
+ SND_PCI_QUIRK(0x104d, 0x9084, "Sony VAIO", ALC275_FIXUP_SONY_HWEQ), |
22663 |
+ SND_PCI_QUIRK(0x104d, 0x9099, "Sony VAIO S13", ALC275_FIXUP_SONY_DISABLE_AAMIX), |
22664 |
++ SND_PCI_QUIRK(0x104d, 0x90b5, "Sony VAIO Pro 11", ALC286_FIXUP_SONY_MIC_NO_PRESENCE), |
22665 |
++ SND_PCI_QUIRK(0x104d, 0x90b6, "Sony VAIO Pro 13", ALC286_FIXUP_SONY_MIC_NO_PRESENCE), |
22666 |
+ SND_PCI_QUIRK(0x10cf, 0x1475, "Lifebook", ALC269_FIXUP_LIFEBOOK), |
22667 |
+ SND_PCI_QUIRK(0x10cf, 0x159f, "Lifebook E780", ALC269_FIXUP_LIFEBOOK_NO_HP_TO_LINEOUT), |
22668 |
+ SND_PCI_QUIRK(0x10cf, 0x15dc, "Lifebook T731", ALC269_FIXUP_LIFEBOOK_HP_PIN), |
22669 |
+- SND_PCI_QUIRK(0x10cf, 0x1757, "Lifebook E752", ALC269_FIXUP_LIFEBOOK_HP_PIN), |
22670 |
+ SND_PCI_QUIRK(0x10cf, 0x1629, "Lifebook U7x7", ALC255_FIXUP_LIFEBOOK_U7x7_HEADSET_MIC), |
22671 |
++ SND_PCI_QUIRK(0x10cf, 0x1757, "Lifebook E752", ALC269_FIXUP_LIFEBOOK_HP_PIN), |
22672 |
+ SND_PCI_QUIRK(0x10cf, 0x1845, "Lifebook U904", ALC269_FIXUP_LIFEBOOK_EXTMIC), |
22673 |
+ SND_PCI_QUIRK(0x10ec, 0x10f2, "Intel Reference board", ALC700_FIXUP_INTEL_REFERENCE), |
22674 |
++ SND_PCI_QUIRK(0x10ec, 0x118c, "Medion EE4254 MD62100", ALC256_FIXUP_MEDION_HEADSET_NO_PRESENCE), |
22675 |
+ SND_PCI_QUIRK(0x10ec, 0x1230, "Intel Reference board", ALC295_FIXUP_CHROME_BOOK), |
22676 |
+ SND_PCI_QUIRK(0x10ec, 0x1252, "Intel Reference board", ALC295_FIXUP_CHROME_BOOK), |
22677 |
+ SND_PCI_QUIRK(0x10ec, 0x1254, "Intel Reference board", ALC295_FIXUP_CHROME_BOOK), |
22678 |
+@@ -8185,9 +8219,9 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { |
22679 |
+ SND_PCI_QUIRK(0x144d, 0xc176, "Samsung Notebook 9 Pro (NP930MBE-K04US)", ALC298_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET), |
22680 |
+ SND_PCI_QUIRK(0x144d, 0xc189, "Samsung Galaxy Flex Book (NT950QCG-X716)", ALC298_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET), |
22681 |
+ SND_PCI_QUIRK(0x144d, 0xc18a, "Samsung Galaxy Book Ion (NP930XCJ-K01US)", ALC298_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET), |
22682 |
+- SND_PCI_QUIRK(0x144d, 0xc830, "Samsung Galaxy Book Ion (NT950XCJ-X716A)", ALC298_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET), |
22683 |
+ SND_PCI_QUIRK(0x144d, 0xc740, "Samsung Ativ book 8 (NP870Z5G)", ALC269_FIXUP_ATIV_BOOK_8), |
22684 |
+ SND_PCI_QUIRK(0x144d, 0xc812, "Samsung Notebook Pen S (NT950SBE-X58)", ALC298_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET), |
22685 |
++ SND_PCI_QUIRK(0x144d, 0xc830, "Samsung Galaxy Book Ion (NT950XCJ-X716A)", ALC298_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET), |
22686 |
+ SND_PCI_QUIRK(0x1458, 0xfa53, "Gigabyte BXBT-2807", ALC283_FIXUP_HEADSET_MIC), |
22687 |
+ SND_PCI_QUIRK(0x1462, 0xb120, "MSI Cubi MS-B120", ALC283_FIXUP_HEADSET_MIC), |
22688 |
+ SND_PCI_QUIRK(0x1462, 0xb171, "Cubi N 8GL (MS-B171)", ALC283_FIXUP_HEADSET_MIC), |
22689 |
+@@ -8243,9 +8277,9 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { |
22690 |
+ SND_PCI_QUIRK(0x17aa, 0x21b8, "Thinkpad Edge 14", ALC269_FIXUP_SKU_IGNORE), |
22691 |
+ SND_PCI_QUIRK(0x17aa, 0x21ca, "Thinkpad L412", ALC269_FIXUP_SKU_IGNORE), |
22692 |
+ SND_PCI_QUIRK(0x17aa, 0x21e9, "Thinkpad Edge 15", ALC269_FIXUP_SKU_IGNORE), |
22693 |
++ SND_PCI_QUIRK(0x17aa, 0x21f3, "Thinkpad T430", ALC269_FIXUP_LENOVO_DOCK), |
22694 |
+ SND_PCI_QUIRK(0x17aa, 0x21f6, "Thinkpad T530", ALC269_FIXUP_LENOVO_DOCK_LIMIT_BOOST), |
22695 |
+ SND_PCI_QUIRK(0x17aa, 0x21fa, "Thinkpad X230", ALC269_FIXUP_LENOVO_DOCK), |
22696 |
+- SND_PCI_QUIRK(0x17aa, 0x21f3, "Thinkpad T430", ALC269_FIXUP_LENOVO_DOCK), |
22697 |
+ SND_PCI_QUIRK(0x17aa, 0x21fb, "Thinkpad T430s", ALC269_FIXUP_LENOVO_DOCK), |
22698 |
+ SND_PCI_QUIRK(0x17aa, 0x2203, "Thinkpad X230 Tablet", ALC269_FIXUP_LENOVO_DOCK), |
22699 |
+ SND_PCI_QUIRK(0x17aa, 0x2208, "Thinkpad T431s", ALC269_FIXUP_LENOVO_DOCK), |
22700 |
+@@ -8289,6 +8323,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { |
22701 |
+ SND_PCI_QUIRK(0x17aa, 0x3902, "Lenovo E50-80", ALC269_FIXUP_DMIC_THINKPAD_ACPI), |
22702 |
+ SND_PCI_QUIRK(0x17aa, 0x3977, "IdeaPad S210", ALC283_FIXUP_INT_MIC), |
22703 |
+ SND_PCI_QUIRK(0x17aa, 0x3978, "Lenovo B50-70", ALC269_FIXUP_DMIC_THINKPAD_ACPI), |
22704 |
++ SND_PCI_QUIRK(0x17aa, 0x3bf8, "Quanta FL1", ALC269_FIXUP_PCM_44K), |
22705 |
+ SND_PCI_QUIRK(0x17aa, 0x5013, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST), |
22706 |
+ SND_PCI_QUIRK(0x17aa, 0x501a, "Thinkpad", ALC283_FIXUP_INT_MIC), |
22707 |
+ SND_PCI_QUIRK(0x17aa, 0x501e, "Thinkpad L440", ALC292_FIXUP_TPT440_DOCK), |
22708 |
+@@ -8307,20 +8342,18 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { |
22709 |
+ SND_PCI_QUIRK(0x17aa, 0x5109, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST), |
22710 |
+ SND_PCI_QUIRK(0x17aa, 0x511e, "Thinkpad", ALC298_FIXUP_TPT470_DOCK), |
22711 |
+ SND_PCI_QUIRK(0x17aa, 0x511f, "Thinkpad", ALC298_FIXUP_TPT470_DOCK), |
22712 |
+- SND_PCI_QUIRK(0x17aa, 0x3bf8, "Quanta FL1", ALC269_FIXUP_PCM_44K), |
22713 |
+ SND_PCI_QUIRK(0x17aa, 0x9e54, "LENOVO NB", ALC269_FIXUP_LENOVO_EAPD), |
22714 |
+ SND_PCI_QUIRK(0x19e5, 0x3204, "Huawei MACH-WX9", ALC256_FIXUP_HUAWEI_MACH_WX9_PINS), |
22715 |
+ SND_PCI_QUIRK(0x1b35, 0x1235, "CZC B20", ALC269_FIXUP_CZC_B20), |
22716 |
+ SND_PCI_QUIRK(0x1b35, 0x1236, "CZC TMI", ALC269_FIXUP_CZC_TMI), |
22717 |
+ SND_PCI_QUIRK(0x1b35, 0x1237, "CZC L101", ALC269_FIXUP_CZC_L101), |
22718 |
+ SND_PCI_QUIRK(0x1b7d, 0xa831, "Ordissimo EVE2 ", ALC269VB_FIXUP_ORDISSIMO_EVE2), /* Also known as Malata PC-B1303 */ |
22719 |
++ SND_PCI_QUIRK(0x1c06, 0x2013, "Lemote A1802", ALC269_FIXUP_LEMOTE_A1802), |
22720 |
++ SND_PCI_QUIRK(0x1c06, 0x2015, "Lemote A190X", ALC269_FIXUP_LEMOTE_A190X), |
22721 |
+ SND_PCI_QUIRK(0x1d72, 0x1602, "RedmiBook", ALC255_FIXUP_XIAOMI_HEADSET_MIC), |
22722 |
+ SND_PCI_QUIRK(0x1d72, 0x1701, "XiaomiNotebook Pro", ALC298_FIXUP_DELL1_MIC_NO_PRESENCE), |
22723 |
+ SND_PCI_QUIRK(0x1d72, 0x1901, "RedmiBook 14", ALC256_FIXUP_ASUS_HEADSET_MIC), |
22724 |
+ SND_PCI_QUIRK(0x1d72, 0x1947, "RedmiBook Air", ALC255_FIXUP_XIAOMI_HEADSET_MIC), |
22725 |
+- SND_PCI_QUIRK(0x10ec, 0x118c, "Medion EE4254 MD62100", ALC256_FIXUP_MEDION_HEADSET_NO_PRESENCE), |
22726 |
+- SND_PCI_QUIRK(0x1c06, 0x2013, "Lemote A1802", ALC269_FIXUP_LEMOTE_A1802), |
22727 |
+- SND_PCI_QUIRK(0x1c06, 0x2015, "Lemote A190X", ALC269_FIXUP_LEMOTE_A190X), |
22728 |
+ SND_PCI_QUIRK(0x8086, 0x2074, "Intel NUC 8", ALC233_FIXUP_INTEL_NUC8_DMIC), |
22729 |
+ SND_PCI_QUIRK(0x8086, 0x2080, "Intel NUC 8 Rugged", ALC256_FIXUP_INTEL_NUC8_RUGGED), |
22730 |
+ SND_PCI_QUIRK(0x8086, 0x2081, "Intel NUC 10", ALC256_FIXUP_INTEL_NUC10), |
22731 |
+@@ -8777,6 +8810,16 @@ static const struct snd_hda_pin_quirk alc269_pin_fixup_tbl[] = { |
22732 |
+ {0x19, 0x03a11020}, |
22733 |
+ {0x21, 0x0321101f}), |
22734 |
+ SND_HDA_PIN_QUIRK(0x10ec0285, 0x17aa, "Lenovo", ALC285_FIXUP_LENOVO_PC_BEEP_IN_NOISE, |
22735 |
++ {0x12, 0x90a60130}, |
22736 |
++ {0x14, 0x90170110}, |
22737 |
++ {0x19, 0x04a11040}, |
22738 |
++ {0x21, 0x04211020}), |
22739 |
++ SND_HDA_PIN_QUIRK(0x10ec0285, 0x17aa, "Lenovo", ALC285_FIXUP_LENOVO_PC_BEEP_IN_NOISE, |
22740 |
++ {0x14, 0x90170110}, |
22741 |
++ {0x19, 0x04a11040}, |
22742 |
++ {0x1d, 0x40600001}, |
22743 |
++ {0x21, 0x04211020}), |
22744 |
++ SND_HDA_PIN_QUIRK(0x10ec0285, 0x17aa, "Lenovo", ALC285_FIXUP_THINKPAD_NO_BASS_SPK_HEADSET_JACK, |
22745 |
+ {0x14, 0x90170110}, |
22746 |
+ {0x19, 0x04a11040}, |
22747 |
+ {0x21, 0x04211020}), |
22748 |
+@@ -8947,10 +8990,6 @@ static const struct snd_hda_pin_quirk alc269_fallback_pin_fixup_tbl[] = { |
22749 |
+ SND_HDA_PIN_QUIRK(0x10ec0274, 0x1028, "Dell", ALC274_FIXUP_DELL_AIO_LINEOUT_VERB, |
22750 |
+ {0x19, 0x40000000}, |
22751 |
+ {0x1a, 0x40000000}), |
22752 |
+- SND_HDA_PIN_QUIRK(0x10ec0285, 0x17aa, "Lenovo", ALC285_FIXUP_THINKPAD_NO_BASS_SPK_HEADSET_JACK, |
22753 |
+- {0x14, 0x90170110}, |
22754 |
+- {0x19, 0x04a11040}, |
22755 |
+- {0x21, 0x04211020}), |
22756 |
+ {} |
22757 |
+ }; |
22758 |
+ |
22759 |
+@@ -9266,8 +9305,7 @@ static const struct snd_pci_quirk alc861_fixup_tbl[] = { |
22760 |
+ SND_PCI_QUIRK(0x1043, 0x1393, "ASUS A6Rp", ALC861_FIXUP_ASUS_A6RP), |
22761 |
+ SND_PCI_QUIRK_VENDOR(0x1043, "ASUS laptop", ALC861_FIXUP_AMP_VREF_0F), |
22762 |
+ SND_PCI_QUIRK(0x1462, 0x7254, "HP DX2200", ALC861_FIXUP_NO_JACK_DETECT), |
22763 |
+- SND_PCI_QUIRK(0x1584, 0x2b01, "Haier W18", ALC861_FIXUP_AMP_VREF_0F), |
22764 |
+- SND_PCI_QUIRK(0x1584, 0x0000, "Uniwill ECS M31EI", ALC861_FIXUP_AMP_VREF_0F), |
22765 |
++ SND_PCI_QUIRK_VENDOR(0x1584, "Haier/Uniwill", ALC861_FIXUP_AMP_VREF_0F), |
22766 |
+ SND_PCI_QUIRK(0x1734, 0x10c7, "FSC Amilo Pi1505", ALC861_FIXUP_FSC_AMILO_PI1505), |
22767 |
+ {} |
22768 |
+ }; |
22769 |
+@@ -10062,6 +10100,7 @@ static const struct snd_pci_quirk alc662_fixup_tbl[] = { |
22770 |
+ SND_PCI_QUIRK(0x1025, 0x0349, "eMachines eM250", ALC662_FIXUP_INV_DMIC), |
22771 |
+ SND_PCI_QUIRK(0x1025, 0x034a, "Gateway LT27", ALC662_FIXUP_INV_DMIC), |
22772 |
+ SND_PCI_QUIRK(0x1025, 0x038b, "Acer Aspire 8943G", ALC662_FIXUP_ASPIRE), |
22773 |
++ SND_PCI_QUIRK(0x1025, 0x0566, "Acer Aspire Ethos 8951G", ALC669_FIXUP_ACER_ASPIRE_ETHOS), |
22774 |
+ SND_PCI_QUIRK(0x1025, 0x123c, "Acer Nitro N50-600", ALC662_FIXUP_ACER_NITRO_HEADSET_MODE), |
22775 |
+ SND_PCI_QUIRK(0x1025, 0x124e, "Acer 2660G", ALC662_FIXUP_ACER_X2660G_HEADSET_MODE), |
22776 |
+ SND_PCI_QUIRK(0x1028, 0x05d8, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE), |
22777 |
+@@ -10078,9 +10117,9 @@ static const struct snd_pci_quirk alc662_fixup_tbl[] = { |
22778 |
+ SND_PCI_QUIRK(0x103c, 0x873e, "HP", ALC671_FIXUP_HP_HEADSET_MIC2), |
22779 |
+ SND_PCI_QUIRK(0x1043, 0x1080, "Asus UX501VW", ALC668_FIXUP_HEADSET_MODE), |
22780 |
+ SND_PCI_QUIRK(0x1043, 0x11cd, "Asus N550", ALC662_FIXUP_ASUS_Nx50), |
22781 |
+- SND_PCI_QUIRK(0x1043, 0x13df, "Asus N550JX", ALC662_FIXUP_BASS_1A), |
22782 |
+ SND_PCI_QUIRK(0x1043, 0x129d, "Asus N750", ALC662_FIXUP_ASUS_Nx50), |
22783 |
+ SND_PCI_QUIRK(0x1043, 0x12ff, "ASUS G751", ALC668_FIXUP_ASUS_G751), |
22784 |
++ SND_PCI_QUIRK(0x1043, 0x13df, "Asus N550JX", ALC662_FIXUP_BASS_1A), |
22785 |
+ SND_PCI_QUIRK(0x1043, 0x1477, "ASUS N56VZ", ALC662_FIXUP_BASS_MODE4_CHMAP), |
22786 |
+ SND_PCI_QUIRK(0x1043, 0x15a7, "ASUS UX51VZH", ALC662_FIXUP_BASS_16), |
22787 |
+ SND_PCI_QUIRK(0x1043, 0x177d, "ASUS N551", ALC668_FIXUP_ASUS_Nx51), |
22788 |
+@@ -10100,7 +10139,6 @@ static const struct snd_pci_quirk alc662_fixup_tbl[] = { |
22789 |
+ SND_PCI_QUIRK(0x1b0a, 0x01b8, "ACER Veriton", ALC662_FIXUP_ACER_VERITON), |
22790 |
+ SND_PCI_QUIRK(0x1b35, 0x1234, "CZC ET26", ALC662_FIXUP_CZC_ET26), |
22791 |
+ SND_PCI_QUIRK(0x1b35, 0x2206, "CZC P10T", ALC662_FIXUP_CZC_P10T), |
22792 |
+- SND_PCI_QUIRK(0x1025, 0x0566, "Acer Aspire Ethos 8951G", ALC669_FIXUP_ACER_ASPIRE_ETHOS), |
22793 |
+ |
22794 |
+ #if 0 |
22795 |
+ /* Below is a quirk table taken from the old code. |
22796 |
+diff --git a/sound/soc/codecs/ak5558.c b/sound/soc/codecs/ak5558.c |
22797 |
+index 85bdd05341803..80b3b162ca5ba 100644 |
22798 |
+--- a/sound/soc/codecs/ak5558.c |
22799 |
++++ b/sound/soc/codecs/ak5558.c |
22800 |
+@@ -272,7 +272,7 @@ static void ak5558_power_off(struct ak5558_priv *ak5558) |
22801 |
+ if (!ak5558->reset_gpiod) |
22802 |
+ return; |
22803 |
+ |
22804 |
+- gpiod_set_value_cansleep(ak5558->reset_gpiod, 0); |
22805 |
++ gpiod_set_value_cansleep(ak5558->reset_gpiod, 1); |
22806 |
+ usleep_range(1000, 2000); |
22807 |
+ } |
22808 |
+ |
22809 |
+@@ -281,7 +281,7 @@ static void ak5558_power_on(struct ak5558_priv *ak5558) |
22810 |
+ if (!ak5558->reset_gpiod) |
22811 |
+ return; |
22812 |
+ |
22813 |
+- gpiod_set_value_cansleep(ak5558->reset_gpiod, 1); |
22814 |
++ gpiod_set_value_cansleep(ak5558->reset_gpiod, 0); |
22815 |
+ usleep_range(1000, 2000); |
22816 |
+ } |
22817 |
+ |
22818 |
+diff --git a/sound/soc/codecs/tlv320aic32x4.c b/sound/soc/codecs/tlv320aic32x4.c |
22819 |
+index 9e3de9ded0efb..b8950758471fa 100644 |
22820 |
+--- a/sound/soc/codecs/tlv320aic32x4.c |
22821 |
++++ b/sound/soc/codecs/tlv320aic32x4.c |
22822 |
+@@ -577,12 +577,12 @@ static const struct regmap_range_cfg aic32x4_regmap_pages[] = { |
22823 |
+ .window_start = 0, |
22824 |
+ .window_len = 128, |
22825 |
+ .range_min = 0, |
22826 |
+- .range_max = AIC32X4_RMICPGAVOL, |
22827 |
++ .range_max = AIC32X4_REFPOWERUP, |
22828 |
+ }, |
22829 |
+ }; |
22830 |
+ |
22831 |
+ const struct regmap_config aic32x4_regmap_config = { |
22832 |
+- .max_register = AIC32X4_RMICPGAVOL, |
22833 |
++ .max_register = AIC32X4_REFPOWERUP, |
22834 |
+ .ranges = aic32x4_regmap_pages, |
22835 |
+ .num_ranges = ARRAY_SIZE(aic32x4_regmap_pages), |
22836 |
+ }; |
22837 |
+@@ -1243,6 +1243,10 @@ int aic32x4_probe(struct device *dev, struct regmap *regmap) |
22838 |
+ if (ret) |
22839 |
+ goto err_disable_regulators; |
22840 |
+ |
22841 |
++ ret = aic32x4_register_clocks(dev, aic32x4->mclk_name); |
22842 |
++ if (ret) |
22843 |
++ goto err_disable_regulators; |
22844 |
++ |
22845 |
+ ret = devm_snd_soc_register_component(dev, |
22846 |
+ &soc_component_dev_aic32x4, &aic32x4_dai, 1); |
22847 |
+ if (ret) { |
22848 |
+@@ -1250,10 +1254,6 @@ int aic32x4_probe(struct device *dev, struct regmap *regmap) |
22849 |
+ goto err_disable_regulators; |
22850 |
+ } |
22851 |
+ |
22852 |
+- ret = aic32x4_register_clocks(dev, aic32x4->mclk_name); |
22853 |
+- if (ret) |
22854 |
+- goto err_disable_regulators; |
22855 |
+- |
22856 |
+ return 0; |
22857 |
+ |
22858 |
+ err_disable_regulators: |
22859 |
+diff --git a/sound/soc/codecs/wm8960.c b/sound/soc/codecs/wm8960.c |
22860 |
+index ceaf3bbb18e66..9d325555e2191 100644 |
22861 |
+--- a/sound/soc/codecs/wm8960.c |
22862 |
++++ b/sound/soc/codecs/wm8960.c |
22863 |
+@@ -608,10 +608,6 @@ static const int bclk_divs[] = { |
22864 |
+ * - lrclk = sysclk / dac_divs |
22865 |
+ * - 10 * bclk = sysclk / bclk_divs |
22866 |
+ * |
22867 |
+- * If we cannot find an exact match for (sysclk, lrclk, bclk) |
22868 |
+- * triplet, we relax the bclk such that bclk is chosen as the |
22869 |
+- * closest available frequency greater than expected bclk. |
22870 |
+- * |
22871 |
+ * @wm8960: codec private data |
22872 |
+ * @mclk: MCLK used to derive sysclk |
22873 |
+ * @sysclk_idx: sysclk_divs index for found sysclk |
22874 |
+@@ -629,7 +625,7 @@ int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk, |
22875 |
+ { |
22876 |
+ int sysclk, bclk, lrclk; |
22877 |
+ int i, j, k; |
22878 |
+- int diff, closest = mclk; |
22879 |
++ int diff; |
22880 |
+ |
22881 |
+ /* marker for no match */ |
22882 |
+ *bclk_idx = -1; |
22883 |
+@@ -653,12 +649,6 @@ int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk, |
22884 |
+ *bclk_idx = k; |
22885 |
+ break; |
22886 |
+ } |
22887 |
+- if (diff > 0 && closest > diff) { |
22888 |
+- *sysclk_idx = i; |
22889 |
+- *dac_idx = j; |
22890 |
+- *bclk_idx = k; |
22891 |
+- closest = diff; |
22892 |
+- } |
22893 |
+ } |
22894 |
+ if (k != ARRAY_SIZE(bclk_divs)) |
22895 |
+ break; |
22896 |
+diff --git a/sound/soc/generic/audio-graph-card.c b/sound/soc/generic/audio-graph-card.c |
22897 |
+index 16a04a6788282..6245ca7bedb08 100644 |
22898 |
+--- a/sound/soc/generic/audio-graph-card.c |
22899 |
++++ b/sound/soc/generic/audio-graph-card.c |
22900 |
+@@ -380,7 +380,7 @@ static int graph_dai_link_of(struct asoc_simple_priv *priv, |
22901 |
+ struct device_node *top = dev->of_node; |
22902 |
+ struct asoc_simple_dai *cpu_dai; |
22903 |
+ struct asoc_simple_dai *codec_dai; |
22904 |
+- int ret, single_cpu; |
22905 |
++ int ret, single_cpu = 0; |
22906 |
+ |
22907 |
+ /* Do it only CPU turn */ |
22908 |
+ if (!li->cpu) |
22909 |
+diff --git a/sound/soc/generic/simple-card.c b/sound/soc/generic/simple-card.c |
22910 |
+index 75365c7bb3930..d916ec69c24ff 100644 |
22911 |
+--- a/sound/soc/generic/simple-card.c |
22912 |
++++ b/sound/soc/generic/simple-card.c |
22913 |
+@@ -258,7 +258,7 @@ static int simple_dai_link_of(struct asoc_simple_priv *priv, |
22914 |
+ struct device_node *plat = NULL; |
22915 |
+ char prop[128]; |
22916 |
+ char *prefix = ""; |
22917 |
+- int ret, single_cpu; |
22918 |
++ int ret, single_cpu = 0; |
22919 |
+ |
22920 |
+ /* |
22921 |
+ * |CPU |Codec : turn |
22922 |
+diff --git a/sound/soc/intel/Makefile b/sound/soc/intel/Makefile |
22923 |
+index 4e0248d2accc7..7c5038803be73 100644 |
22924 |
+--- a/sound/soc/intel/Makefile |
22925 |
++++ b/sound/soc/intel/Makefile |
22926 |
+@@ -5,7 +5,7 @@ obj-$(CONFIG_SND_SOC) += common/ |
22927 |
+ # Platform Support |
22928 |
+ obj-$(CONFIG_SND_SST_ATOM_HIFI2_PLATFORM) += atom/ |
22929 |
+ obj-$(CONFIG_SND_SOC_INTEL_CATPT) += catpt/ |
22930 |
+-obj-$(CONFIG_SND_SOC_INTEL_SKYLAKE) += skylake/ |
22931 |
++obj-$(CONFIG_SND_SOC_INTEL_SKYLAKE_COMMON) += skylake/ |
22932 |
+ obj-$(CONFIG_SND_SOC_INTEL_KEEMBAY) += keembay/ |
22933 |
+ |
22934 |
+ # Machine support |
22935 |
+diff --git a/sound/soc/intel/boards/kbl_da7219_max98927.c b/sound/soc/intel/boards/kbl_da7219_max98927.c |
22936 |
+index cc9a2509ace29..e0149cf6127d0 100644 |
22937 |
+--- a/sound/soc/intel/boards/kbl_da7219_max98927.c |
22938 |
++++ b/sound/soc/intel/boards/kbl_da7219_max98927.c |
22939 |
+@@ -282,11 +282,33 @@ static int kabylake_ssp_fixup(struct snd_soc_pcm_runtime *rtd, |
22940 |
+ struct snd_interval *chan = hw_param_interval(params, |
22941 |
+ SNDRV_PCM_HW_PARAM_CHANNELS); |
22942 |
+ struct snd_mask *fmt = hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT); |
22943 |
+- struct snd_soc_dpcm *dpcm = container_of( |
22944 |
+- params, struct snd_soc_dpcm, hw_params); |
22945 |
+- struct snd_soc_dai_link *fe_dai_link = dpcm->fe->dai_link; |
22946 |
+- struct snd_soc_dai_link *be_dai_link = dpcm->be->dai_link; |
22947 |
++ struct snd_soc_dpcm *dpcm, *rtd_dpcm = NULL; |
22948 |
+ |
22949 |
++ /* |
22950 |
++ * The following loop will be called only for playback stream |
22951 |
++ * In this platform, there is only one playback device on every SSP |
22952 |
++ */ |
22953 |
++ for_each_dpcm_fe(rtd, SNDRV_PCM_STREAM_PLAYBACK, dpcm) { |
22954 |
++ rtd_dpcm = dpcm; |
22955 |
++ break; |
22956 |
++ } |
22957 |
++ |
22958 |
++ /* |
22959 |
++ * This following loop will be called only for capture stream |
22960 |
++ * In this platform, there is only one capture device on every SSP |
22961 |
++ */ |
22962 |
++ for_each_dpcm_fe(rtd, SNDRV_PCM_STREAM_CAPTURE, dpcm) { |
22963 |
++ rtd_dpcm = dpcm; |
22964 |
++ break; |
22965 |
++ } |
22966 |
++ |
22967 |
++ if (!rtd_dpcm) |
22968 |
++ return -EINVAL; |
22969 |
++ |
22970 |
++ /* |
22971 |
++ * The above 2 loops are mutually exclusive based on the stream direction, |
22972 |
++ * thus rtd_dpcm variable will never be overwritten |
22973 |
++ */ |
22974 |
+ /* |
22975 |
+ * Topology for kblda7219m98373 & kblmax98373 supports only S24_LE, |
22976 |
+ * where as kblda7219m98927 & kblmax98927 supports S16_LE by default. |
22977 |
+@@ -309,9 +331,9 @@ static int kabylake_ssp_fixup(struct snd_soc_pcm_runtime *rtd, |
22978 |
+ /* |
22979 |
+ * The ADSP will convert the FE rate to 48k, stereo, 24 bit |
22980 |
+ */ |
22981 |
+- if (!strcmp(fe_dai_link->name, "Kbl Audio Port") || |
22982 |
+- !strcmp(fe_dai_link->name, "Kbl Audio Headset Playback") || |
22983 |
+- !strcmp(fe_dai_link->name, "Kbl Audio Capture Port")) { |
22984 |
++ if (!strcmp(rtd_dpcm->fe->dai_link->name, "Kbl Audio Port") || |
22985 |
++ !strcmp(rtd_dpcm->fe->dai_link->name, "Kbl Audio Headset Playback") || |
22986 |
++ !strcmp(rtd_dpcm->fe->dai_link->name, "Kbl Audio Capture Port")) { |
22987 |
+ rate->min = rate->max = 48000; |
22988 |
+ chan->min = chan->max = 2; |
22989 |
+ snd_mask_none(fmt); |
22990 |
+@@ -322,7 +344,7 @@ static int kabylake_ssp_fixup(struct snd_soc_pcm_runtime *rtd, |
22991 |
+ * The speaker on the SSP0 supports S16_LE and not S24_LE. |
22992 |
+ * thus changing the mask here |
22993 |
+ */ |
22994 |
+- if (!strcmp(be_dai_link->name, "SSP0-Codec")) |
22995 |
++ if (!strcmp(rtd_dpcm->be->dai_link->name, "SSP0-Codec")) |
22996 |
+ snd_mask_set_format(fmt, SNDRV_PCM_FORMAT_S16_LE); |
22997 |
+ |
22998 |
+ return 0; |
22999 |
+diff --git a/sound/soc/intel/boards/sof_wm8804.c b/sound/soc/intel/boards/sof_wm8804.c |
23000 |
+index a46ba13e8eb0c..6a181e45143d7 100644 |
23001 |
+--- a/sound/soc/intel/boards/sof_wm8804.c |
23002 |
++++ b/sound/soc/intel/boards/sof_wm8804.c |
23003 |
+@@ -124,7 +124,11 @@ static int sof_wm8804_hw_params(struct snd_pcm_substream *substream, |
23004 |
+ } |
23005 |
+ |
23006 |
+ snd_soc_dai_set_clkdiv(codec_dai, WM8804_MCLK_DIV, mclk_div); |
23007 |
+- snd_soc_dai_set_pll(codec_dai, 0, 0, sysclk, mclk_freq); |
23008 |
++ ret = snd_soc_dai_set_pll(codec_dai, 0, 0, sysclk, mclk_freq); |
23009 |
++ if (ret < 0) { |
23010 |
++ dev_err(rtd->card->dev, "Failed to set WM8804 PLL\n"); |
23011 |
++ return ret; |
23012 |
++ } |
23013 |
+ |
23014 |
+ ret = snd_soc_dai_set_sysclk(codec_dai, WM8804_TX_CLKSRC_PLL, |
23015 |
+ sysclk, SND_SOC_CLOCK_OUT); |
23016 |
+diff --git a/sound/soc/intel/skylake/Makefile b/sound/soc/intel/skylake/Makefile |
23017 |
+index dd39149b89b1d..1c4649bccec5a 100644 |
23018 |
+--- a/sound/soc/intel/skylake/Makefile |
23019 |
++++ b/sound/soc/intel/skylake/Makefile |
23020 |
+@@ -7,7 +7,7 @@ ifdef CONFIG_DEBUG_FS |
23021 |
+ snd-soc-skl-objs += skl-debug.o |
23022 |
+ endif |
23023 |
+ |
23024 |
+-obj-$(CONFIG_SND_SOC_INTEL_SKYLAKE) += snd-soc-skl.o |
23025 |
++obj-$(CONFIG_SND_SOC_INTEL_SKYLAKE_COMMON) += snd-soc-skl.o |
23026 |
+ |
23027 |
+ #Skylake Clock device support |
23028 |
+ snd-soc-skl-ssp-clk-objs := skl-ssp-clk.o |
23029 |
+diff --git a/sound/soc/qcom/qdsp6/q6afe-clocks.c b/sound/soc/qcom/qdsp6/q6afe-clocks.c |
23030 |
+index f0362f0616521..9431656283cd1 100644 |
23031 |
+--- a/sound/soc/qcom/qdsp6/q6afe-clocks.c |
23032 |
++++ b/sound/soc/qcom/qdsp6/q6afe-clocks.c |
23033 |
+@@ -11,33 +11,29 @@ |
23034 |
+ #include <linux/slab.h> |
23035 |
+ #include "q6afe.h" |
23036 |
+ |
23037 |
+-#define Q6AFE_CLK(id) &(struct q6afe_clk) { \ |
23038 |
++#define Q6AFE_CLK(id) { \ |
23039 |
+ .clk_id = id, \ |
23040 |
+ .afe_clk_id = Q6AFE_##id, \ |
23041 |
+ .name = #id, \ |
23042 |
+- .attributes = LPASS_CLK_ATTRIBUTE_COUPLE_NO, \ |
23043 |
+ .rate = 19200000, \ |
23044 |
+- .hw.init = &(struct clk_init_data) { \ |
23045 |
+- .ops = &clk_q6afe_ops, \ |
23046 |
+- .name = #id, \ |
23047 |
+- }, \ |
23048 |
+ } |
23049 |
+ |
23050 |
+-#define Q6AFE_VOTE_CLK(id, blkid, n) &(struct q6afe_clk) { \ |
23051 |
++#define Q6AFE_VOTE_CLK(id, blkid, n) { \ |
23052 |
+ .clk_id = id, \ |
23053 |
+ .afe_clk_id = blkid, \ |
23054 |
+- .name = #n, \ |
23055 |
+- .hw.init = &(struct clk_init_data) { \ |
23056 |
+- .ops = &clk_vote_q6afe_ops, \ |
23057 |
+- .name = #id, \ |
23058 |
+- }, \ |
23059 |
++ .name = n, \ |
23060 |
+ } |
23061 |
+ |
23062 |
+-struct q6afe_clk { |
23063 |
+- struct device *dev; |
23064 |
++struct q6afe_clk_init { |
23065 |
+ int clk_id; |
23066 |
+ int afe_clk_id; |
23067 |
+ char *name; |
23068 |
++ int rate; |
23069 |
++}; |
23070 |
++ |
23071 |
++struct q6afe_clk { |
23072 |
++ struct device *dev; |
23073 |
++ int afe_clk_id; |
23074 |
+ int attributes; |
23075 |
+ int rate; |
23076 |
+ uint32_t handle; |
23077 |
+@@ -48,8 +44,7 @@ struct q6afe_clk { |
23078 |
+ |
23079 |
+ struct q6afe_cc { |
23080 |
+ struct device *dev; |
23081 |
+- struct q6afe_clk **clks; |
23082 |
+- int num_clks; |
23083 |
++ struct q6afe_clk *clks[Q6AFE_MAX_CLK_ID]; |
23084 |
+ }; |
23085 |
+ |
23086 |
+ static int clk_q6afe_prepare(struct clk_hw *hw) |
23087 |
+@@ -105,7 +100,7 @@ static int clk_vote_q6afe_block(struct clk_hw *hw) |
23088 |
+ struct q6afe_clk *clk = to_q6afe_clk(hw); |
23089 |
+ |
23090 |
+ return q6afe_vote_lpass_core_hw(clk->dev, clk->afe_clk_id, |
23091 |
+- clk->name, &clk->handle); |
23092 |
++ clk_hw_get_name(&clk->hw), &clk->handle); |
23093 |
+ } |
23094 |
+ |
23095 |
+ static void clk_unvote_q6afe_block(struct clk_hw *hw) |
23096 |
+@@ -120,84 +115,76 @@ static const struct clk_ops clk_vote_q6afe_ops = { |
23097 |
+ .unprepare = clk_unvote_q6afe_block, |
23098 |
+ }; |
23099 |
+ |
23100 |
+-static struct q6afe_clk *q6afe_clks[Q6AFE_MAX_CLK_ID] = { |
23101 |
+- [LPASS_CLK_ID_PRI_MI2S_IBIT] = Q6AFE_CLK(LPASS_CLK_ID_PRI_MI2S_IBIT), |
23102 |
+- [LPASS_CLK_ID_PRI_MI2S_EBIT] = Q6AFE_CLK(LPASS_CLK_ID_PRI_MI2S_EBIT), |
23103 |
+- [LPASS_CLK_ID_SEC_MI2S_IBIT] = Q6AFE_CLK(LPASS_CLK_ID_SEC_MI2S_IBIT), |
23104 |
+- [LPASS_CLK_ID_SEC_MI2S_EBIT] = Q6AFE_CLK(LPASS_CLK_ID_SEC_MI2S_EBIT), |
23105 |
+- [LPASS_CLK_ID_TER_MI2S_IBIT] = Q6AFE_CLK(LPASS_CLK_ID_TER_MI2S_IBIT), |
23106 |
+- [LPASS_CLK_ID_TER_MI2S_EBIT] = Q6AFE_CLK(LPASS_CLK_ID_TER_MI2S_EBIT), |
23107 |
+- [LPASS_CLK_ID_QUAD_MI2S_IBIT] = Q6AFE_CLK(LPASS_CLK_ID_QUAD_MI2S_IBIT), |
23108 |
+- [LPASS_CLK_ID_QUAD_MI2S_EBIT] = Q6AFE_CLK(LPASS_CLK_ID_QUAD_MI2S_EBIT), |
23109 |
+- [LPASS_CLK_ID_SPEAKER_I2S_IBIT] = |
23110 |
+- Q6AFE_CLK(LPASS_CLK_ID_SPEAKER_I2S_IBIT), |
23111 |
+- [LPASS_CLK_ID_SPEAKER_I2S_EBIT] = |
23112 |
+- Q6AFE_CLK(LPASS_CLK_ID_SPEAKER_I2S_EBIT), |
23113 |
+- [LPASS_CLK_ID_SPEAKER_I2S_OSR] = |
23114 |
+- Q6AFE_CLK(LPASS_CLK_ID_SPEAKER_I2S_OSR), |
23115 |
+- [LPASS_CLK_ID_QUI_MI2S_IBIT] = Q6AFE_CLK(LPASS_CLK_ID_QUI_MI2S_IBIT), |
23116 |
+- [LPASS_CLK_ID_QUI_MI2S_EBIT] = Q6AFE_CLK(LPASS_CLK_ID_QUI_MI2S_EBIT), |
23117 |
+- [LPASS_CLK_ID_SEN_MI2S_IBIT] = Q6AFE_CLK(LPASS_CLK_ID_SEN_MI2S_IBIT), |
23118 |
+- [LPASS_CLK_ID_SEN_MI2S_EBIT] = Q6AFE_CLK(LPASS_CLK_ID_SEN_MI2S_EBIT), |
23119 |
+- [LPASS_CLK_ID_INT0_MI2S_IBIT] = Q6AFE_CLK(LPASS_CLK_ID_INT0_MI2S_IBIT), |
23120 |
+- [LPASS_CLK_ID_INT1_MI2S_IBIT] = Q6AFE_CLK(LPASS_CLK_ID_INT1_MI2S_IBIT), |
23121 |
+- [LPASS_CLK_ID_INT2_MI2S_IBIT] = Q6AFE_CLK(LPASS_CLK_ID_INT2_MI2S_IBIT), |
23122 |
+- [LPASS_CLK_ID_INT3_MI2S_IBIT] = Q6AFE_CLK(LPASS_CLK_ID_INT3_MI2S_IBIT), |
23123 |
+- [LPASS_CLK_ID_INT4_MI2S_IBIT] = Q6AFE_CLK(LPASS_CLK_ID_INT4_MI2S_IBIT), |
23124 |
+- [LPASS_CLK_ID_INT5_MI2S_IBIT] = Q6AFE_CLK(LPASS_CLK_ID_INT5_MI2S_IBIT), |
23125 |
+- [LPASS_CLK_ID_INT6_MI2S_IBIT] = Q6AFE_CLK(LPASS_CLK_ID_INT6_MI2S_IBIT), |
23126 |
+- [LPASS_CLK_ID_QUI_MI2S_OSR] = Q6AFE_CLK(LPASS_CLK_ID_QUI_MI2S_OSR), |
23127 |
+- [LPASS_CLK_ID_PRI_PCM_IBIT] = Q6AFE_CLK(LPASS_CLK_ID_PRI_PCM_IBIT), |
23128 |
+- [LPASS_CLK_ID_PRI_PCM_EBIT] = Q6AFE_CLK(LPASS_CLK_ID_PRI_PCM_EBIT), |
23129 |
+- [LPASS_CLK_ID_SEC_PCM_IBIT] = Q6AFE_CLK(LPASS_CLK_ID_SEC_PCM_IBIT), |
23130 |
+- [LPASS_CLK_ID_SEC_PCM_EBIT] = Q6AFE_CLK(LPASS_CLK_ID_SEC_PCM_EBIT), |
23131 |
+- [LPASS_CLK_ID_TER_PCM_IBIT] = Q6AFE_CLK(LPASS_CLK_ID_TER_PCM_IBIT), |
23132 |
+- [LPASS_CLK_ID_TER_PCM_EBIT] = Q6AFE_CLK(LPASS_CLK_ID_TER_PCM_EBIT), |
23133 |
+- [LPASS_CLK_ID_QUAD_PCM_IBIT] = Q6AFE_CLK(LPASS_CLK_ID_QUAD_PCM_IBIT), |
23134 |
+- [LPASS_CLK_ID_QUAD_PCM_EBIT] = Q6AFE_CLK(LPASS_CLK_ID_QUAD_PCM_EBIT), |
23135 |
+- [LPASS_CLK_ID_QUIN_PCM_IBIT] = Q6AFE_CLK(LPASS_CLK_ID_QUIN_PCM_IBIT), |
23136 |
+- [LPASS_CLK_ID_QUIN_PCM_EBIT] = Q6AFE_CLK(LPASS_CLK_ID_QUIN_PCM_EBIT), |
23137 |
+- [LPASS_CLK_ID_QUI_PCM_OSR] = Q6AFE_CLK(LPASS_CLK_ID_QUI_PCM_OSR), |
23138 |
+- [LPASS_CLK_ID_PRI_TDM_IBIT] = Q6AFE_CLK(LPASS_CLK_ID_PRI_TDM_IBIT), |
23139 |
+- [LPASS_CLK_ID_PRI_TDM_EBIT] = Q6AFE_CLK(LPASS_CLK_ID_PRI_TDM_EBIT), |
23140 |
+- [LPASS_CLK_ID_SEC_TDM_IBIT] = Q6AFE_CLK(LPASS_CLK_ID_SEC_TDM_IBIT), |
23141 |
+- [LPASS_CLK_ID_SEC_TDM_EBIT] = Q6AFE_CLK(LPASS_CLK_ID_SEC_TDM_EBIT), |
23142 |
+- [LPASS_CLK_ID_TER_TDM_IBIT] = Q6AFE_CLK(LPASS_CLK_ID_TER_TDM_IBIT), |
23143 |
+- [LPASS_CLK_ID_TER_TDM_EBIT] = Q6AFE_CLK(LPASS_CLK_ID_TER_TDM_EBIT), |
23144 |
+- [LPASS_CLK_ID_QUAD_TDM_IBIT] = Q6AFE_CLK(LPASS_CLK_ID_QUAD_TDM_IBIT), |
23145 |
+- [LPASS_CLK_ID_QUAD_TDM_EBIT] = Q6AFE_CLK(LPASS_CLK_ID_QUAD_TDM_EBIT), |
23146 |
+- [LPASS_CLK_ID_QUIN_TDM_IBIT] = Q6AFE_CLK(LPASS_CLK_ID_QUIN_TDM_IBIT), |
23147 |
+- [LPASS_CLK_ID_QUIN_TDM_EBIT] = Q6AFE_CLK(LPASS_CLK_ID_QUIN_TDM_EBIT), |
23148 |
+- [LPASS_CLK_ID_QUIN_TDM_OSR] = Q6AFE_CLK(LPASS_CLK_ID_QUIN_TDM_OSR), |
23149 |
+- [LPASS_CLK_ID_MCLK_1] = Q6AFE_CLK(LPASS_CLK_ID_MCLK_1), |
23150 |
+- [LPASS_CLK_ID_MCLK_2] = Q6AFE_CLK(LPASS_CLK_ID_MCLK_2), |
23151 |
+- [LPASS_CLK_ID_MCLK_3] = Q6AFE_CLK(LPASS_CLK_ID_MCLK_3), |
23152 |
+- [LPASS_CLK_ID_MCLK_4] = Q6AFE_CLK(LPASS_CLK_ID_MCLK_4), |
23153 |
+- [LPASS_CLK_ID_INTERNAL_DIGITAL_CODEC_CORE] = |
23154 |
+- Q6AFE_CLK(LPASS_CLK_ID_INTERNAL_DIGITAL_CODEC_CORE), |
23155 |
+- [LPASS_CLK_ID_INT_MCLK_0] = Q6AFE_CLK(LPASS_CLK_ID_INT_MCLK_0), |
23156 |
+- [LPASS_CLK_ID_INT_MCLK_1] = Q6AFE_CLK(LPASS_CLK_ID_INT_MCLK_1), |
23157 |
+- [LPASS_CLK_ID_WSA_CORE_MCLK] = Q6AFE_CLK(LPASS_CLK_ID_WSA_CORE_MCLK), |
23158 |
+- [LPASS_CLK_ID_WSA_CORE_NPL_MCLK] = |
23159 |
+- Q6AFE_CLK(LPASS_CLK_ID_WSA_CORE_NPL_MCLK), |
23160 |
+- [LPASS_CLK_ID_VA_CORE_MCLK] = Q6AFE_CLK(LPASS_CLK_ID_VA_CORE_MCLK), |
23161 |
+- [LPASS_CLK_ID_TX_CORE_MCLK] = Q6AFE_CLK(LPASS_CLK_ID_TX_CORE_MCLK), |
23162 |
+- [LPASS_CLK_ID_TX_CORE_NPL_MCLK] = |
23163 |
+- Q6AFE_CLK(LPASS_CLK_ID_TX_CORE_NPL_MCLK), |
23164 |
+- [LPASS_CLK_ID_RX_CORE_MCLK] = Q6AFE_CLK(LPASS_CLK_ID_RX_CORE_MCLK), |
23165 |
+- [LPASS_CLK_ID_RX_CORE_NPL_MCLK] = |
23166 |
+- Q6AFE_CLK(LPASS_CLK_ID_RX_CORE_NPL_MCLK), |
23167 |
+- [LPASS_CLK_ID_VA_CORE_2X_MCLK] = |
23168 |
+- Q6AFE_CLK(LPASS_CLK_ID_VA_CORE_2X_MCLK), |
23169 |
+- [LPASS_HW_AVTIMER_VOTE] = Q6AFE_VOTE_CLK(LPASS_HW_AVTIMER_VOTE, |
23170 |
+- Q6AFE_LPASS_CORE_AVTIMER_BLOCK, |
23171 |
+- "LPASS_AVTIMER_MACRO"), |
23172 |
+- [LPASS_HW_MACRO_VOTE] = Q6AFE_VOTE_CLK(LPASS_HW_MACRO_VOTE, |
23173 |
+- Q6AFE_LPASS_CORE_HW_MACRO_BLOCK, |
23174 |
+- "LPASS_HW_MACRO"), |
23175 |
+- [LPASS_HW_DCODEC_VOTE] = Q6AFE_VOTE_CLK(LPASS_HW_DCODEC_VOTE, |
23176 |
+- Q6AFE_LPASS_CORE_HW_DCODEC_BLOCK, |
23177 |
+- "LPASS_HW_DCODEC"), |
23178 |
++static const struct q6afe_clk_init q6afe_clks[] = { |
23179 |
++ Q6AFE_CLK(LPASS_CLK_ID_PRI_MI2S_IBIT), |
23180 |
++ Q6AFE_CLK(LPASS_CLK_ID_PRI_MI2S_EBIT), |
23181 |
++ Q6AFE_CLK(LPASS_CLK_ID_SEC_MI2S_IBIT), |
23182 |
++ Q6AFE_CLK(LPASS_CLK_ID_SEC_MI2S_EBIT), |
23183 |
++ Q6AFE_CLK(LPASS_CLK_ID_TER_MI2S_IBIT), |
23184 |
++ Q6AFE_CLK(LPASS_CLK_ID_TER_MI2S_EBIT), |
23185 |
++ Q6AFE_CLK(LPASS_CLK_ID_QUAD_MI2S_IBIT), |
23186 |
++ Q6AFE_CLK(LPASS_CLK_ID_QUAD_MI2S_EBIT), |
23187 |
++ Q6AFE_CLK(LPASS_CLK_ID_SPEAKER_I2S_IBIT), |
23188 |
++ Q6AFE_CLK(LPASS_CLK_ID_SPEAKER_I2S_EBIT), |
23189 |
++ Q6AFE_CLK(LPASS_CLK_ID_SPEAKER_I2S_OSR), |
23190 |
++ Q6AFE_CLK(LPASS_CLK_ID_QUI_MI2S_IBIT), |
23191 |
++ Q6AFE_CLK(LPASS_CLK_ID_QUI_MI2S_EBIT), |
23192 |
++ Q6AFE_CLK(LPASS_CLK_ID_SEN_MI2S_IBIT), |
23193 |
++ Q6AFE_CLK(LPASS_CLK_ID_SEN_MI2S_EBIT), |
23194 |
++ Q6AFE_CLK(LPASS_CLK_ID_INT0_MI2S_IBIT), |
23195 |
++ Q6AFE_CLK(LPASS_CLK_ID_INT1_MI2S_IBIT), |
23196 |
++ Q6AFE_CLK(LPASS_CLK_ID_INT2_MI2S_IBIT), |
23197 |
++ Q6AFE_CLK(LPASS_CLK_ID_INT3_MI2S_IBIT), |
23198 |
++ Q6AFE_CLK(LPASS_CLK_ID_INT4_MI2S_IBIT), |
23199 |
++ Q6AFE_CLK(LPASS_CLK_ID_INT5_MI2S_IBIT), |
23200 |
++ Q6AFE_CLK(LPASS_CLK_ID_INT6_MI2S_IBIT), |
23201 |
++ Q6AFE_CLK(LPASS_CLK_ID_QUI_MI2S_OSR), |
23202 |
++ Q6AFE_CLK(LPASS_CLK_ID_PRI_PCM_IBIT), |
23203 |
++ Q6AFE_CLK(LPASS_CLK_ID_PRI_PCM_EBIT), |
23204 |
++ Q6AFE_CLK(LPASS_CLK_ID_SEC_PCM_IBIT), |
23205 |
++ Q6AFE_CLK(LPASS_CLK_ID_SEC_PCM_EBIT), |
23206 |
++ Q6AFE_CLK(LPASS_CLK_ID_TER_PCM_IBIT), |
23207 |
++ Q6AFE_CLK(LPASS_CLK_ID_TER_PCM_EBIT), |
23208 |
++ Q6AFE_CLK(LPASS_CLK_ID_QUAD_PCM_IBIT), |
23209 |
++ Q6AFE_CLK(LPASS_CLK_ID_QUAD_PCM_EBIT), |
23210 |
++ Q6AFE_CLK(LPASS_CLK_ID_QUIN_PCM_IBIT), |
23211 |
++ Q6AFE_CLK(LPASS_CLK_ID_QUIN_PCM_EBIT), |
23212 |
++ Q6AFE_CLK(LPASS_CLK_ID_QUI_PCM_OSR), |
23213 |
++ Q6AFE_CLK(LPASS_CLK_ID_PRI_TDM_IBIT), |
23214 |
++ Q6AFE_CLK(LPASS_CLK_ID_PRI_TDM_EBIT), |
23215 |
++ Q6AFE_CLK(LPASS_CLK_ID_SEC_TDM_IBIT), |
23216 |
++ Q6AFE_CLK(LPASS_CLK_ID_SEC_TDM_EBIT), |
23217 |
++ Q6AFE_CLK(LPASS_CLK_ID_TER_TDM_IBIT), |
23218 |
++ Q6AFE_CLK(LPASS_CLK_ID_TER_TDM_EBIT), |
23219 |
++ Q6AFE_CLK(LPASS_CLK_ID_QUAD_TDM_IBIT), |
23220 |
++ Q6AFE_CLK(LPASS_CLK_ID_QUAD_TDM_EBIT), |
23221 |
++ Q6AFE_CLK(LPASS_CLK_ID_QUIN_TDM_IBIT), |
23222 |
++ Q6AFE_CLK(LPASS_CLK_ID_QUIN_TDM_EBIT), |
23223 |
++ Q6AFE_CLK(LPASS_CLK_ID_QUIN_TDM_OSR), |
23224 |
++ Q6AFE_CLK(LPASS_CLK_ID_MCLK_1), |
23225 |
++ Q6AFE_CLK(LPASS_CLK_ID_MCLK_2), |
23226 |
++ Q6AFE_CLK(LPASS_CLK_ID_MCLK_3), |
23227 |
++ Q6AFE_CLK(LPASS_CLK_ID_MCLK_4), |
23228 |
++ Q6AFE_CLK(LPASS_CLK_ID_INTERNAL_DIGITAL_CODEC_CORE), |
23229 |
++ Q6AFE_CLK(LPASS_CLK_ID_INT_MCLK_0), |
23230 |
++ Q6AFE_CLK(LPASS_CLK_ID_INT_MCLK_1), |
23231 |
++ Q6AFE_CLK(LPASS_CLK_ID_WSA_CORE_MCLK), |
23232 |
++ Q6AFE_CLK(LPASS_CLK_ID_WSA_CORE_NPL_MCLK), |
23233 |
++ Q6AFE_CLK(LPASS_CLK_ID_VA_CORE_MCLK), |
23234 |
++ Q6AFE_CLK(LPASS_CLK_ID_TX_CORE_MCLK), |
23235 |
++ Q6AFE_CLK(LPASS_CLK_ID_TX_CORE_NPL_MCLK), |
23236 |
++ Q6AFE_CLK(LPASS_CLK_ID_RX_CORE_MCLK), |
23237 |
++ Q6AFE_CLK(LPASS_CLK_ID_RX_CORE_NPL_MCLK), |
23238 |
++ Q6AFE_CLK(LPASS_CLK_ID_VA_CORE_2X_MCLK), |
23239 |
++ Q6AFE_VOTE_CLK(LPASS_HW_AVTIMER_VOTE, |
23240 |
++ Q6AFE_LPASS_CORE_AVTIMER_BLOCK, |
23241 |
++ "LPASS_AVTIMER_MACRO"), |
23242 |
++ Q6AFE_VOTE_CLK(LPASS_HW_MACRO_VOTE, |
23243 |
++ Q6AFE_LPASS_CORE_HW_MACRO_BLOCK, |
23244 |
++ "LPASS_HW_MACRO"), |
23245 |
++ Q6AFE_VOTE_CLK(LPASS_HW_DCODEC_VOTE, |
23246 |
++ Q6AFE_LPASS_CORE_HW_DCODEC_BLOCK, |
23247 |
++ "LPASS_HW_DCODEC"), |
23248 |
+ }; |
23249 |
+ |
23250 |
+ static struct clk_hw *q6afe_of_clk_hw_get(struct of_phandle_args *clkspec, |
23251 |
+@@ -207,7 +194,7 @@ static struct clk_hw *q6afe_of_clk_hw_get(struct of_phandle_args *clkspec, |
23252 |
+ unsigned int idx = clkspec->args[0]; |
23253 |
+ unsigned int attr = clkspec->args[1]; |
23254 |
+ |
23255 |
+- if (idx >= cc->num_clks || attr > LPASS_CLK_ATTRIBUTE_COUPLE_DIVISOR) { |
23256 |
++ if (idx >= Q6AFE_MAX_CLK_ID || attr > LPASS_CLK_ATTRIBUTE_COUPLE_DIVISOR) { |
23257 |
+ dev_err(cc->dev, "Invalid clk specifier (%d, %d)\n", idx, attr); |
23258 |
+ return ERR_PTR(-EINVAL); |
23259 |
+ } |
23260 |
+@@ -230,20 +217,36 @@ static int q6afe_clock_dev_probe(struct platform_device *pdev) |
23261 |
+ if (!cc) |
23262 |
+ return -ENOMEM; |
23263 |
+ |
23264 |
+- cc->clks = &q6afe_clks[0]; |
23265 |
+- cc->num_clks = ARRAY_SIZE(q6afe_clks); |
23266 |
++ cc->dev = dev; |
23267 |
+ for (i = 0; i < ARRAY_SIZE(q6afe_clks); i++) { |
23268 |
+- if (!q6afe_clks[i]) |
23269 |
+- continue; |
23270 |
++ unsigned int id = q6afe_clks[i].clk_id; |
23271 |
++ struct clk_init_data init = { |
23272 |
++ .name = q6afe_clks[i].name, |
23273 |
++ }; |
23274 |
++ struct q6afe_clk *clk; |
23275 |
++ |
23276 |
++ clk = devm_kzalloc(dev, sizeof(*clk), GFP_KERNEL); |
23277 |
++ if (!clk) |
23278 |
++ return -ENOMEM; |
23279 |
++ |
23280 |
++ clk->dev = dev; |
23281 |
++ clk->afe_clk_id = q6afe_clks[i].afe_clk_id; |
23282 |
++ clk->rate = q6afe_clks[i].rate; |
23283 |
++ clk->hw.init = &init; |
23284 |
++ |
23285 |
++ if (clk->rate) |
23286 |
++ init.ops = &clk_q6afe_ops; |
23287 |
++ else |
23288 |
++ init.ops = &clk_vote_q6afe_ops; |
23289 |
+ |
23290 |
+- q6afe_clks[i]->dev = dev; |
23291 |
++ cc->clks[id] = clk; |
23292 |
+ |
23293 |
+- ret = devm_clk_hw_register(dev, &q6afe_clks[i]->hw); |
23294 |
++ ret = devm_clk_hw_register(dev, &clk->hw); |
23295 |
+ if (ret) |
23296 |
+ return ret; |
23297 |
+ } |
23298 |
+ |
23299 |
+- ret = of_clk_add_hw_provider(dev->of_node, q6afe_of_clk_hw_get, cc); |
23300 |
++ ret = devm_of_clk_add_hw_provider(dev, q6afe_of_clk_hw_get, cc); |
23301 |
+ if (ret) |
23302 |
+ return ret; |
23303 |
+ |
23304 |
+diff --git a/sound/soc/qcom/qdsp6/q6afe.c b/sound/soc/qcom/qdsp6/q6afe.c |
23305 |
+index daa58b5f941ec..6b9ade3dfe5b1 100644 |
23306 |
+--- a/sound/soc/qcom/qdsp6/q6afe.c |
23307 |
++++ b/sound/soc/qcom/qdsp6/q6afe.c |
23308 |
+@@ -1681,7 +1681,7 @@ int q6afe_unvote_lpass_core_hw(struct device *dev, uint32_t hw_block_id, |
23309 |
+ EXPORT_SYMBOL(q6afe_unvote_lpass_core_hw); |
23310 |
+ |
23311 |
+ int q6afe_vote_lpass_core_hw(struct device *dev, uint32_t hw_block_id, |
23312 |
+- char *client_name, uint32_t *client_handle) |
23313 |
++ const char *client_name, uint32_t *client_handle) |
23314 |
+ { |
23315 |
+ struct q6afe *afe = dev_get_drvdata(dev->parent); |
23316 |
+ struct afe_cmd_remote_lpass_core_hw_vote_request *vote_cfg; |
23317 |
+diff --git a/sound/soc/qcom/qdsp6/q6afe.h b/sound/soc/qcom/qdsp6/q6afe.h |
23318 |
+index 22e10269aa109..3845b56c0ed36 100644 |
23319 |
+--- a/sound/soc/qcom/qdsp6/q6afe.h |
23320 |
++++ b/sound/soc/qcom/qdsp6/q6afe.h |
23321 |
+@@ -236,7 +236,7 @@ int q6afe_port_set_sysclk(struct q6afe_port *port, int clk_id, |
23322 |
+ int q6afe_set_lpass_clock(struct device *dev, int clk_id, int clk_src, |
23323 |
+ int clk_root, unsigned int freq); |
23324 |
+ int q6afe_vote_lpass_core_hw(struct device *dev, uint32_t hw_block_id, |
23325 |
+- char *client_name, uint32_t *client_handle); |
23326 |
++ const char *client_name, uint32_t *client_handle); |
23327 |
+ int q6afe_unvote_lpass_core_hw(struct device *dev, uint32_t hw_block_id, |
23328 |
+ uint32_t client_handle); |
23329 |
+ #endif /* __Q6AFE_H__ */ |
23330 |
+diff --git a/sound/soc/samsung/tm2_wm5110.c b/sound/soc/samsung/tm2_wm5110.c |
23331 |
+index 9300fef9bf269..125e07f65d2b5 100644 |
23332 |
+--- a/sound/soc/samsung/tm2_wm5110.c |
23333 |
++++ b/sound/soc/samsung/tm2_wm5110.c |
23334 |
+@@ -553,7 +553,7 @@ static int tm2_probe(struct platform_device *pdev) |
23335 |
+ |
23336 |
+ ret = of_parse_phandle_with_args(dev->of_node, "i2s-controller", |
23337 |
+ cells_name, i, &args); |
23338 |
+- if (!args.np) { |
23339 |
++ if (ret) { |
23340 |
+ dev_err(dev, "i2s-controller property parse error: %d\n", i); |
23341 |
+ ret = -EINVAL; |
23342 |
+ goto dai_node_put; |
23343 |
+diff --git a/sound/usb/card.c b/sound/usb/card.c |
23344 |
+index 3007922a8ed86..eb8284b44f72c 100644 |
23345 |
+--- a/sound/usb/card.c |
23346 |
++++ b/sound/usb/card.c |
23347 |
+@@ -183,9 +183,8 @@ static int snd_usb_create_stream(struct snd_usb_audio *chip, int ctrlif, int int |
23348 |
+ ctrlif, interface); |
23349 |
+ return -EINVAL; |
23350 |
+ } |
23351 |
+- usb_driver_claim_interface(&usb_audio_driver, iface, (void *)-1L); |
23352 |
+- |
23353 |
+- return 0; |
23354 |
++ return usb_driver_claim_interface(&usb_audio_driver, iface, |
23355 |
++ USB_AUDIO_IFACE_UNUSED); |
23356 |
+ } |
23357 |
+ |
23358 |
+ if ((altsd->bInterfaceClass != USB_CLASS_AUDIO && |
23359 |
+@@ -205,7 +204,8 @@ static int snd_usb_create_stream(struct snd_usb_audio *chip, int ctrlif, int int |
23360 |
+ |
23361 |
+ if (! snd_usb_parse_audio_interface(chip, interface)) { |
23362 |
+ usb_set_interface(dev, interface, 0); /* reset the current interface */ |
23363 |
+- usb_driver_claim_interface(&usb_audio_driver, iface, (void *)-1L); |
23364 |
++ return usb_driver_claim_interface(&usb_audio_driver, iface, |
23365 |
++ USB_AUDIO_IFACE_UNUSED); |
23366 |
+ } |
23367 |
+ |
23368 |
+ return 0; |
23369 |
+@@ -865,7 +865,7 @@ static void usb_audio_disconnect(struct usb_interface *intf) |
23370 |
+ struct snd_card *card; |
23371 |
+ struct list_head *p; |
23372 |
+ |
23373 |
+- if (chip == (void *)-1L) |
23374 |
++ if (chip == USB_AUDIO_IFACE_UNUSED) |
23375 |
+ return; |
23376 |
+ |
23377 |
+ card = chip->card; |
23378 |
+@@ -995,7 +995,7 @@ static int usb_audio_suspend(struct usb_interface *intf, pm_message_t message) |
23379 |
+ struct usb_mixer_interface *mixer; |
23380 |
+ struct list_head *p; |
23381 |
+ |
23382 |
+- if (chip == (void *)-1L) |
23383 |
++ if (chip == USB_AUDIO_IFACE_UNUSED) |
23384 |
+ return 0; |
23385 |
+ |
23386 |
+ if (!chip->num_suspended_intf++) { |
23387 |
+@@ -1025,7 +1025,7 @@ static int __usb_audio_resume(struct usb_interface *intf, bool reset_resume) |
23388 |
+ struct list_head *p; |
23389 |
+ int err = 0; |
23390 |
+ |
23391 |
+- if (chip == (void *)-1L) |
23392 |
++ if (chip == USB_AUDIO_IFACE_UNUSED) |
23393 |
+ return 0; |
23394 |
+ |
23395 |
+ atomic_inc(&chip->active); /* avoid autopm */ |
23396 |
+diff --git a/sound/usb/midi.c b/sound/usb/midi.c |
23397 |
+index 0c23fa6d8525d..cd46ca7cd28de 100644 |
23398 |
+--- a/sound/usb/midi.c |
23399 |
++++ b/sound/usb/midi.c |
23400 |
+@@ -1332,7 +1332,7 @@ static int snd_usbmidi_in_endpoint_create(struct snd_usb_midi *umidi, |
23401 |
+ |
23402 |
+ error: |
23403 |
+ snd_usbmidi_in_endpoint_delete(ep); |
23404 |
+- return -ENOMEM; |
23405 |
++ return err; |
23406 |
+ } |
23407 |
+ |
23408 |
+ /* |
23409 |
+diff --git a/sound/usb/quirks.c b/sound/usb/quirks.c |
23410 |
+index 176437a441e6c..7c6e83eee71dc 100644 |
23411 |
+--- a/sound/usb/quirks.c |
23412 |
++++ b/sound/usb/quirks.c |
23413 |
+@@ -55,8 +55,12 @@ static int create_composite_quirk(struct snd_usb_audio *chip, |
23414 |
+ if (!iface) |
23415 |
+ continue; |
23416 |
+ if (quirk->ifnum != probed_ifnum && |
23417 |
+- !usb_interface_claimed(iface)) |
23418 |
+- usb_driver_claim_interface(driver, iface, (void *)-1L); |
23419 |
++ !usb_interface_claimed(iface)) { |
23420 |
++ err = usb_driver_claim_interface(driver, iface, |
23421 |
++ USB_AUDIO_IFACE_UNUSED); |
23422 |
++ if (err < 0) |
23423 |
++ return err; |
23424 |
++ } |
23425 |
+ } |
23426 |
+ |
23427 |
+ return 0; |
23428 |
+@@ -426,8 +430,12 @@ static int create_autodetect_quirks(struct snd_usb_audio *chip, |
23429 |
+ continue; |
23430 |
+ |
23431 |
+ err = create_autodetect_quirk(chip, iface, driver); |
23432 |
+- if (err >= 0) |
23433 |
+- usb_driver_claim_interface(driver, iface, (void *)-1L); |
23434 |
++ if (err >= 0) { |
23435 |
++ err = usb_driver_claim_interface(driver, iface, |
23436 |
++ USB_AUDIO_IFACE_UNUSED); |
23437 |
++ if (err < 0) |
23438 |
++ return err; |
23439 |
++ } |
23440 |
+ } |
23441 |
+ |
23442 |
+ return 0; |
23443 |
+diff --git a/sound/usb/usbaudio.h b/sound/usb/usbaudio.h |
23444 |
+index 60b9dd7df6bb7..8794c8658ab96 100644 |
23445 |
+--- a/sound/usb/usbaudio.h |
23446 |
++++ b/sound/usb/usbaudio.h |
23447 |
+@@ -61,6 +61,8 @@ struct snd_usb_audio { |
23448 |
+ struct media_intf_devnode *ctl_intf_media_devnode; |
23449 |
+ }; |
23450 |
+ |
23451 |
++#define USB_AUDIO_IFACE_UNUSED ((void *)-1L) |
23452 |
++ |
23453 |
+ #define usb_audio_err(chip, fmt, args...) \ |
23454 |
+ dev_err(&(chip)->dev->dev, fmt, ##args) |
23455 |
+ #define usb_audio_warn(chip, fmt, args...) \ |
23456 |
+diff --git a/tools/bpf/bpftool/btf.c b/tools/bpf/bpftool/btf.c |
23457 |
+index fe9e7b3a4b503..1326fff3629b1 100644 |
23458 |
+--- a/tools/bpf/bpftool/btf.c |
23459 |
++++ b/tools/bpf/bpftool/btf.c |
23460 |
+@@ -538,6 +538,7 @@ static int do_dump(int argc, char **argv) |
23461 |
+ NEXT_ARG(); |
23462 |
+ if (argc < 1) { |
23463 |
+ p_err("expecting value for 'format' option\n"); |
23464 |
++ err = -EINVAL; |
23465 |
+ goto done; |
23466 |
+ } |
23467 |
+ if (strcmp(*argv, "c") == 0) { |
23468 |
+@@ -547,11 +548,13 @@ static int do_dump(int argc, char **argv) |
23469 |
+ } else { |
23470 |
+ p_err("unrecognized format specifier: '%s', possible values: raw, c", |
23471 |
+ *argv); |
23472 |
++ err = -EINVAL; |
23473 |
+ goto done; |
23474 |
+ } |
23475 |
+ NEXT_ARG(); |
23476 |
+ } else { |
23477 |
+ p_err("unrecognized option: '%s'", *argv); |
23478 |
++ err = -EINVAL; |
23479 |
+ goto done; |
23480 |
+ } |
23481 |
+ } |
23482 |
+diff --git a/tools/bpf/bpftool/main.c b/tools/bpf/bpftool/main.c |
23483 |
+index b86f450e6fce2..d9afb730136a4 100644 |
23484 |
+--- a/tools/bpf/bpftool/main.c |
23485 |
++++ b/tools/bpf/bpftool/main.c |
23486 |
+@@ -276,7 +276,7 @@ static int do_batch(int argc, char **argv) |
23487 |
+ int n_argc; |
23488 |
+ FILE *fp; |
23489 |
+ char *cp; |
23490 |
+- int err; |
23491 |
++ int err = 0; |
23492 |
+ int i; |
23493 |
+ |
23494 |
+ if (argc < 2) { |
23495 |
+@@ -370,7 +370,6 @@ static int do_batch(int argc, char **argv) |
23496 |
+ } else { |
23497 |
+ if (!json_output) |
23498 |
+ printf("processed %d commands\n", lines); |
23499 |
+- err = 0; |
23500 |
+ } |
23501 |
+ err_close: |
23502 |
+ if (fp != stdin) |
23503 |
+diff --git a/tools/bpf/bpftool/map.c b/tools/bpf/bpftool/map.c |
23504 |
+index b400364ee054e..09ae0381205b6 100644 |
23505 |
+--- a/tools/bpf/bpftool/map.c |
23506 |
++++ b/tools/bpf/bpftool/map.c |
23507 |
+@@ -100,7 +100,7 @@ static int do_dump_btf(const struct btf_dumper *d, |
23508 |
+ void *value) |
23509 |
+ { |
23510 |
+ __u32 value_id; |
23511 |
+- int ret; |
23512 |
++ int ret = 0; |
23513 |
+ |
23514 |
+ /* start of key-value pair */ |
23515 |
+ jsonw_start_object(d->jw); |
23516 |
+diff --git a/tools/lib/bpf/bpf_core_read.h b/tools/lib/bpf/bpf_core_read.h |
23517 |
+index bbcefb3ff5a57..4538ed762a209 100644 |
23518 |
+--- a/tools/lib/bpf/bpf_core_read.h |
23519 |
++++ b/tools/lib/bpf/bpf_core_read.h |
23520 |
+@@ -88,11 +88,19 @@ enum bpf_enum_value_kind { |
23521 |
+ const void *p = (const void *)s + __CORE_RELO(s, field, BYTE_OFFSET); \ |
23522 |
+ unsigned long long val; \ |
23523 |
+ \ |
23524 |
++ /* This is a so-called barrier_var() operation that makes specified \ |
23525 |
++ * variable "a black box" for optimizing compiler. \ |
23526 |
++ * It forces compiler to perform BYTE_OFFSET relocation on p and use \ |
23527 |
++ * its calculated value in the switch below, instead of applying \ |
23528 |
++ * the same relocation 4 times for each individual memory load. \ |
23529 |
++ */ \ |
23530 |
++ asm volatile("" : "=r"(p) : "0"(p)); \ |
23531 |
++ \ |
23532 |
+ switch (__CORE_RELO(s, field, BYTE_SIZE)) { \ |
23533 |
+- case 1: val = *(const unsigned char *)p; \ |
23534 |
+- case 2: val = *(const unsigned short *)p; \ |
23535 |
+- case 4: val = *(const unsigned int *)p; \ |
23536 |
+- case 8: val = *(const unsigned long long *)p; \ |
23537 |
++ case 1: val = *(const unsigned char *)p; break; \ |
23538 |
++ case 2: val = *(const unsigned short *)p; break; \ |
23539 |
++ case 4: val = *(const unsigned int *)p; break; \ |
23540 |
++ case 8: val = *(const unsigned long long *)p; break; \ |
23541 |
+ } \ |
23542 |
+ val <<= __CORE_RELO(s, field, LSHIFT_U64); \ |
23543 |
+ if (__CORE_RELO(s, field, SIGNED)) \ |
23544 |
+diff --git a/tools/lib/bpf/bpf_tracing.h b/tools/lib/bpf/bpf_tracing.h |
23545 |
+index f9ef37707888f..1c2e91ee041d8 100644 |
23546 |
+--- a/tools/lib/bpf/bpf_tracing.h |
23547 |
++++ b/tools/lib/bpf/bpf_tracing.h |
23548 |
+@@ -413,20 +413,38 @@ typeof(name(0)) name(struct pt_regs *ctx) \ |
23549 |
+ } \ |
23550 |
+ static __always_inline typeof(name(0)) ____##name(struct pt_regs *ctx, ##args) |
23551 |
+ |
23552 |
++#define ___bpf_fill0(arr, p, x) do {} while (0) |
23553 |
++#define ___bpf_fill1(arr, p, x) arr[p] = x |
23554 |
++#define ___bpf_fill2(arr, p, x, args...) arr[p] = x; ___bpf_fill1(arr, p + 1, args) |
23555 |
++#define ___bpf_fill3(arr, p, x, args...) arr[p] = x; ___bpf_fill2(arr, p + 1, args) |
23556 |
++#define ___bpf_fill4(arr, p, x, args...) arr[p] = x; ___bpf_fill3(arr, p + 1, args) |
23557 |
++#define ___bpf_fill5(arr, p, x, args...) arr[p] = x; ___bpf_fill4(arr, p + 1, args) |
23558 |
++#define ___bpf_fill6(arr, p, x, args...) arr[p] = x; ___bpf_fill5(arr, p + 1, args) |
23559 |
++#define ___bpf_fill7(arr, p, x, args...) arr[p] = x; ___bpf_fill6(arr, p + 1, args) |
23560 |
++#define ___bpf_fill8(arr, p, x, args...) arr[p] = x; ___bpf_fill7(arr, p + 1, args) |
23561 |
++#define ___bpf_fill9(arr, p, x, args...) arr[p] = x; ___bpf_fill8(arr, p + 1, args) |
23562 |
++#define ___bpf_fill10(arr, p, x, args...) arr[p] = x; ___bpf_fill9(arr, p + 1, args) |
23563 |
++#define ___bpf_fill11(arr, p, x, args...) arr[p] = x; ___bpf_fill10(arr, p + 1, args) |
23564 |
++#define ___bpf_fill12(arr, p, x, args...) arr[p] = x; ___bpf_fill11(arr, p + 1, args) |
23565 |
++#define ___bpf_fill(arr, args...) \ |
23566 |
++ ___bpf_apply(___bpf_fill, ___bpf_narg(args))(arr, 0, args) |
23567 |
++ |
23568 |
+ /* |
23569 |
+ * BPF_SEQ_PRINTF to wrap bpf_seq_printf to-be-printed values |
23570 |
+ * in a structure. |
23571 |
+ */ |
23572 |
+-#define BPF_SEQ_PRINTF(seq, fmt, args...) \ |
23573 |
+- ({ \ |
23574 |
+- _Pragma("GCC diagnostic push") \ |
23575 |
+- _Pragma("GCC diagnostic ignored \"-Wint-conversion\"") \ |
23576 |
+- static const char ___fmt[] = fmt; \ |
23577 |
+- unsigned long long ___param[] = { args }; \ |
23578 |
+- _Pragma("GCC diagnostic pop") \ |
23579 |
+- int ___ret = bpf_seq_printf(seq, ___fmt, sizeof(___fmt), \ |
23580 |
+- ___param, sizeof(___param)); \ |
23581 |
+- ___ret; \ |
23582 |
+- }) |
23583 |
++#define BPF_SEQ_PRINTF(seq, fmt, args...) \ |
23584 |
++({ \ |
23585 |
++ static const char ___fmt[] = fmt; \ |
23586 |
++ unsigned long long ___param[___bpf_narg(args)]; \ |
23587 |
++ \ |
23588 |
++ _Pragma("GCC diagnostic push") \ |
23589 |
++ _Pragma("GCC diagnostic ignored \"-Wint-conversion\"") \ |
23590 |
++ ___bpf_fill(___param, args); \ |
23591 |
++ _Pragma("GCC diagnostic pop") \ |
23592 |
++ \ |
23593 |
++ bpf_seq_printf(seq, ___fmt, sizeof(___fmt), \ |
23594 |
++ ___param, sizeof(___param)); \ |
23595 |
++}) |
23596 |
+ |
23597 |
+ #endif |
23598 |
+diff --git a/tools/lib/bpf/btf.h b/tools/lib/bpf/btf.h |
23599 |
+index 1237bcd1dd17e..5b8a6ea44b38b 100644 |
23600 |
+--- a/tools/lib/bpf/btf.h |
23601 |
++++ b/tools/lib/bpf/btf.h |
23602 |
+@@ -173,6 +173,7 @@ struct btf_dump_emit_type_decl_opts { |
23603 |
+ int indent_level; |
23604 |
+ /* strip all the const/volatile/restrict mods */ |
23605 |
+ bool strip_mods; |
23606 |
++ size_t :0; |
23607 |
+ }; |
23608 |
+ #define btf_dump_emit_type_decl_opts__last_field strip_mods |
23609 |
+ |
23610 |
+diff --git a/tools/lib/bpf/libbpf.h b/tools/lib/bpf/libbpf.h |
23611 |
+index 3c35eb401931f..3d690d4e785c3 100644 |
23612 |
+--- a/tools/lib/bpf/libbpf.h |
23613 |
++++ b/tools/lib/bpf/libbpf.h |
23614 |
+@@ -507,6 +507,7 @@ struct xdp_link_info { |
23615 |
+ struct bpf_xdp_set_link_opts { |
23616 |
+ size_t sz; |
23617 |
+ int old_fd; |
23618 |
++ size_t :0; |
23619 |
+ }; |
23620 |
+ #define bpf_xdp_set_link_opts__last_field old_fd |
23621 |
+ |
23622 |
+diff --git a/tools/lib/perf/include/perf/event.h b/tools/lib/perf/include/perf/event.h |
23623 |
+index 988c539bedb6e..4a24b855d3ce2 100644 |
23624 |
+--- a/tools/lib/perf/include/perf/event.h |
23625 |
++++ b/tools/lib/perf/include/perf/event.h |
23626 |
+@@ -8,6 +8,8 @@ |
23627 |
+ #include <linux/bpf.h> |
23628 |
+ #include <sys/types.h> /* pid_t */ |
23629 |
+ |
23630 |
++#define event_contains(obj, mem) ((obj).header.size > offsetof(typeof(obj), mem)) |
23631 |
++ |
23632 |
+ struct perf_record_mmap { |
23633 |
+ struct perf_event_header header; |
23634 |
+ __u32 pid, tid; |
23635 |
+@@ -336,8 +338,9 @@ struct perf_record_time_conv { |
23636 |
+ __u64 time_zero; |
23637 |
+ __u64 time_cycles; |
23638 |
+ __u64 time_mask; |
23639 |
+- bool cap_user_time_zero; |
23640 |
+- bool cap_user_time_short; |
23641 |
++ __u8 cap_user_time_zero; |
23642 |
++ __u8 cap_user_time_short; |
23643 |
++ __u8 reserved[6]; /* For alignment */ |
23644 |
+ }; |
23645 |
+ |
23646 |
+ struct perf_record_header_feature { |
23647 |
+diff --git a/tools/perf/pmu-events/arch/x86/amdzen1/cache.json b/tools/perf/pmu-events/arch/x86/amdzen1/cache.json |
23648 |
+index 4ea7ec4f496e8..008f1683e5407 100644 |
23649 |
+--- a/tools/perf/pmu-events/arch/x86/amdzen1/cache.json |
23650 |
++++ b/tools/perf/pmu-events/arch/x86/amdzen1/cache.json |
23651 |
+@@ -275,7 +275,7 @@ |
23652 |
+ { |
23653 |
+ "EventName": "l2_pf_hit_l2", |
23654 |
+ "EventCode": "0x70", |
23655 |
+- "BriefDescription": "L2 prefetch hit in L2.", |
23656 |
++ "BriefDescription": "L2 prefetch hit in L2. Use l2_cache_hits_from_l2_hwpf instead.", |
23657 |
+ "UMask": "0xff" |
23658 |
+ }, |
23659 |
+ { |
23660 |
+diff --git a/tools/perf/pmu-events/arch/x86/amdzen1/recommended.json b/tools/perf/pmu-events/arch/x86/amdzen1/recommended.json |
23661 |
+index 2cfe2d2f3bfdd..3c954543d1ae6 100644 |
23662 |
+--- a/tools/perf/pmu-events/arch/x86/amdzen1/recommended.json |
23663 |
++++ b/tools/perf/pmu-events/arch/x86/amdzen1/recommended.json |
23664 |
+@@ -79,10 +79,10 @@ |
23665 |
+ "UMask": "0x70" |
23666 |
+ }, |
23667 |
+ { |
23668 |
+- "MetricName": "l2_cache_hits_from_l2_hwpf", |
23669 |
++ "EventName": "l2_cache_hits_from_l2_hwpf", |
23670 |
++ "EventCode": "0x70", |
23671 |
+ "BriefDescription": "L2 Cache Hits from L2 HWPF", |
23672 |
+- "MetricExpr": "l2_pf_hit_l2 + l2_pf_miss_l2_hit_l3 + l2_pf_miss_l2_l3", |
23673 |
+- "MetricGroup": "l2_cache" |
23674 |
++ "UMask": "0xff" |
23675 |
+ }, |
23676 |
+ { |
23677 |
+ "EventName": "l3_accesses", |
23678 |
+diff --git a/tools/perf/pmu-events/arch/x86/amdzen2/cache.json b/tools/perf/pmu-events/arch/x86/amdzen2/cache.json |
23679 |
+index f61b982f83ca3..8ba84a48188dd 100644 |
23680 |
+--- a/tools/perf/pmu-events/arch/x86/amdzen2/cache.json |
23681 |
++++ b/tools/perf/pmu-events/arch/x86/amdzen2/cache.json |
23682 |
+@@ -205,7 +205,7 @@ |
23683 |
+ { |
23684 |
+ "EventName": "l2_pf_hit_l2", |
23685 |
+ "EventCode": "0x70", |
23686 |
+- "BriefDescription": "L2 prefetch hit in L2.", |
23687 |
++ "BriefDescription": "L2 prefetch hit in L2. Use l2_cache_hits_from_l2_hwpf instead.", |
23688 |
+ "UMask": "0xff" |
23689 |
+ }, |
23690 |
+ { |
23691 |
+diff --git a/tools/perf/pmu-events/arch/x86/amdzen2/recommended.json b/tools/perf/pmu-events/arch/x86/amdzen2/recommended.json |
23692 |
+index 2ef91e25e6613..1c624cee9ef48 100644 |
23693 |
+--- a/tools/perf/pmu-events/arch/x86/amdzen2/recommended.json |
23694 |
++++ b/tools/perf/pmu-events/arch/x86/amdzen2/recommended.json |
23695 |
+@@ -79,10 +79,10 @@ |
23696 |
+ "UMask": "0x70" |
23697 |
+ }, |
23698 |
+ { |
23699 |
+- "MetricName": "l2_cache_hits_from_l2_hwpf", |
23700 |
++ "EventName": "l2_cache_hits_from_l2_hwpf", |
23701 |
++ "EventCode": "0x70", |
23702 |
+ "BriefDescription": "L2 Cache Hits from L2 HWPF", |
23703 |
+- "MetricExpr": "l2_pf_hit_l2 + l2_pf_miss_l2_hit_l3 + l2_pf_miss_l2_l3", |
23704 |
+- "MetricGroup": "l2_cache" |
23705 |
++ "UMask": "0xff" |
23706 |
+ }, |
23707 |
+ { |
23708 |
+ "EventName": "l3_accesses", |
23709 |
+diff --git a/tools/perf/trace/beauty/fsconfig.sh b/tools/perf/trace/beauty/fsconfig.sh |
23710 |
+index 83fb24df05c9f..bc6ef7bb7a5f9 100755 |
23711 |
+--- a/tools/perf/trace/beauty/fsconfig.sh |
23712 |
++++ b/tools/perf/trace/beauty/fsconfig.sh |
23713 |
+@@ -10,8 +10,7 @@ fi |
23714 |
+ linux_mount=${linux_header_dir}/mount.h |
23715 |
+ |
23716 |
+ printf "static const char *fsconfig_cmds[] = {\n" |
23717 |
+-regex='^[[:space:]]*+FSCONFIG_([[:alnum:]_]+)[[:space:]]*=[[:space:]]*([[:digit:]]+)[[:space:]]*,[[:space:]]*.*' |
23718 |
+-egrep $regex ${linux_mount} | \ |
23719 |
+- sed -r "s/$regex/\2 \1/g" | \ |
23720 |
+- xargs printf "\t[%s] = \"%s\",\n" |
23721 |
++ms='[[:space:]]*' |
23722 |
++sed -nr "s/^${ms}FSCONFIG_([[:alnum:]_]+)${ms}=${ms}([[:digit:]]+)${ms},.*/\t[\2] = \"\1\",/p" \ |
23723 |
++ ${linux_mount} |
23724 |
+ printf "};\n" |
23725 |
+diff --git a/tools/perf/util/jitdump.c b/tools/perf/util/jitdump.c |
23726 |
+index 055bab7a92b35..64d8f9ba8c034 100644 |
23727 |
+--- a/tools/perf/util/jitdump.c |
23728 |
++++ b/tools/perf/util/jitdump.c |
23729 |
+@@ -369,21 +369,31 @@ jit_inject_event(struct jit_buf_desc *jd, union perf_event *event) |
23730 |
+ |
23731 |
+ static uint64_t convert_timestamp(struct jit_buf_desc *jd, uint64_t timestamp) |
23732 |
+ { |
23733 |
+- struct perf_tsc_conversion tc; |
23734 |
++ struct perf_tsc_conversion tc = { .time_shift = 0, }; |
23735 |
++ struct perf_record_time_conv *time_conv = &jd->session->time_conv; |
23736 |
+ |
23737 |
+ if (!jd->use_arch_timestamp) |
23738 |
+ return timestamp; |
23739 |
+ |
23740 |
+- tc.time_shift = jd->session->time_conv.time_shift; |
23741 |
+- tc.time_mult = jd->session->time_conv.time_mult; |
23742 |
+- tc.time_zero = jd->session->time_conv.time_zero; |
23743 |
+- tc.time_cycles = jd->session->time_conv.time_cycles; |
23744 |
+- tc.time_mask = jd->session->time_conv.time_mask; |
23745 |
+- tc.cap_user_time_zero = jd->session->time_conv.cap_user_time_zero; |
23746 |
+- tc.cap_user_time_short = jd->session->time_conv.cap_user_time_short; |
23747 |
++ tc.time_shift = time_conv->time_shift; |
23748 |
++ tc.time_mult = time_conv->time_mult; |
23749 |
++ tc.time_zero = time_conv->time_zero; |
23750 |
+ |
23751 |
+- if (!tc.cap_user_time_zero) |
23752 |
+- return 0; |
23753 |
++ /* |
23754 |
++ * The event TIME_CONV was extended for the fields from "time_cycles" |
23755 |
++ * when supported cap_user_time_short, for backward compatibility, |
23756 |
++ * checks the event size and assigns these extended fields if these |
23757 |
++ * fields are contained in the event. |
23758 |
++ */ |
23759 |
++ if (event_contains(*time_conv, time_cycles)) { |
23760 |
++ tc.time_cycles = time_conv->time_cycles; |
23761 |
++ tc.time_mask = time_conv->time_mask; |
23762 |
++ tc.cap_user_time_zero = time_conv->cap_user_time_zero; |
23763 |
++ tc.cap_user_time_short = time_conv->cap_user_time_short; |
23764 |
++ |
23765 |
++ if (!tc.cap_user_time_zero) |
23766 |
++ return 0; |
23767 |
++ } |
23768 |
+ |
23769 |
+ return tsc_to_perf_time(timestamp, &tc); |
23770 |
+ } |
23771 |
+diff --git a/tools/perf/util/session.c b/tools/perf/util/session.c |
23772 |
+index 25adbcce02814..052181f9c1cba 100644 |
23773 |
+--- a/tools/perf/util/session.c |
23774 |
++++ b/tools/perf/util/session.c |
23775 |
+@@ -946,6 +946,19 @@ static void perf_event__stat_round_swap(union perf_event *event, |
23776 |
+ event->stat_round.time = bswap_64(event->stat_round.time); |
23777 |
+ } |
23778 |
+ |
23779 |
++static void perf_event__time_conv_swap(union perf_event *event, |
23780 |
++ bool sample_id_all __maybe_unused) |
23781 |
++{ |
23782 |
++ event->time_conv.time_shift = bswap_64(event->time_conv.time_shift); |
23783 |
++ event->time_conv.time_mult = bswap_64(event->time_conv.time_mult); |
23784 |
++ event->time_conv.time_zero = bswap_64(event->time_conv.time_zero); |
23785 |
++ |
23786 |
++ if (event_contains(event->time_conv, time_cycles)) { |
23787 |
++ event->time_conv.time_cycles = bswap_64(event->time_conv.time_cycles); |
23788 |
++ event->time_conv.time_mask = bswap_64(event->time_conv.time_mask); |
23789 |
++ } |
23790 |
++} |
23791 |
++ |
23792 |
+ typedef void (*perf_event__swap_op)(union perf_event *event, |
23793 |
+ bool sample_id_all); |
23794 |
+ |
23795 |
+@@ -982,7 +995,7 @@ static perf_event__swap_op perf_event__swap_ops[] = { |
23796 |
+ [PERF_RECORD_STAT] = perf_event__stat_swap, |
23797 |
+ [PERF_RECORD_STAT_ROUND] = perf_event__stat_round_swap, |
23798 |
+ [PERF_RECORD_EVENT_UPDATE] = perf_event__event_update_swap, |
23799 |
+- [PERF_RECORD_TIME_CONV] = perf_event__all64_swap, |
23800 |
++ [PERF_RECORD_TIME_CONV] = perf_event__time_conv_swap, |
23801 |
+ [PERF_RECORD_HEADER_MAX] = NULL, |
23802 |
+ }; |
23803 |
+ |
23804 |
+diff --git a/tools/perf/util/symbol_fprintf.c b/tools/perf/util/symbol_fprintf.c |
23805 |
+index 35c936ce33efa..2664fb65e47ad 100644 |
23806 |
+--- a/tools/perf/util/symbol_fprintf.c |
23807 |
++++ b/tools/perf/util/symbol_fprintf.c |
23808 |
+@@ -68,7 +68,7 @@ size_t dso__fprintf_symbols_by_name(struct dso *dso, |
23809 |
+ |
23810 |
+ for (nd = rb_first_cached(&dso->symbol_names); nd; nd = rb_next(nd)) { |
23811 |
+ pos = rb_entry(nd, struct symbol_name_rb_node, rb_node); |
23812 |
+- fprintf(fp, "%s\n", pos->sym.name); |
23813 |
++ ret += fprintf(fp, "%s\n", pos->sym.name); |
23814 |
+ } |
23815 |
+ |
23816 |
+ return ret; |
23817 |
+diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c |
23818 |
+index 490c9a496fe28..0026970214748 100644 |
23819 |
+--- a/tools/power/x86/turbostat/turbostat.c |
23820 |
++++ b/tools/power/x86/turbostat/turbostat.c |
23821 |
+@@ -4822,33 +4822,12 @@ double discover_bclk(unsigned int family, unsigned int model) |
23822 |
+ * below this value, including the Digital Thermal Sensor (DTS), |
23823 |
+ * Package Thermal Management Sensor (PTM), and thermal event thresholds. |
23824 |
+ */ |
23825 |
+-int read_tcc_activation_temp() |
23826 |
++int set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p) |
23827 |
+ { |
23828 |
+ unsigned long long msr; |
23829 |
+- unsigned int tcc, target_c, offset_c; |
23830 |
+- |
23831 |
+- /* Temperature Target MSR is Nehalem and newer only */ |
23832 |
+- if (!do_nhm_platform_info) |
23833 |
+- return 0; |
23834 |
+- |
23835 |
+- if (get_msr(base_cpu, MSR_IA32_TEMPERATURE_TARGET, &msr)) |
23836 |
+- return 0; |
23837 |
+- |
23838 |
+- target_c = (msr >> 16) & 0xFF; |
23839 |
+- |
23840 |
+- offset_c = (msr >> 24) & 0xF; |
23841 |
+- |
23842 |
+- tcc = target_c - offset_c; |
23843 |
+- |
23844 |
+- if (!quiet) |
23845 |
+- fprintf(outf, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C) (%d default - %d offset)\n", |
23846 |
+- base_cpu, msr, tcc, target_c, offset_c); |
23847 |
+- |
23848 |
+- return tcc; |
23849 |
+-} |
23850 |
++ unsigned int target_c_local; |
23851 |
++ int cpu; |
23852 |
+ |
23853 |
+-int set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p) |
23854 |
+-{ |
23855 |
+ /* tcc_activation_temp is used only for dts or ptm */ |
23856 |
+ if (!(do_dts || do_ptm)) |
23857 |
+ return 0; |
23858 |
+@@ -4857,18 +4836,43 @@ int set_temperature_target(struct thread_data *t, struct core_data *c, struct pk |
23859 |
+ if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) |
23860 |
+ return 0; |
23861 |
+ |
23862 |
++ cpu = t->cpu_id; |
23863 |
++ if (cpu_migrate(cpu)) { |
23864 |
++ fprintf(outf, "Could not migrate to CPU %d\n", cpu); |
23865 |
++ return -1; |
23866 |
++ } |
23867 |
++ |
23868 |
+ if (tcc_activation_temp_override != 0) { |
23869 |
+ tcc_activation_temp = tcc_activation_temp_override; |
23870 |
+- fprintf(outf, "Using cmdline TCC Target (%d C)\n", tcc_activation_temp); |
23871 |
++ fprintf(outf, "cpu%d: Using cmdline TCC Target (%d C)\n", |
23872 |
++ cpu, tcc_activation_temp); |
23873 |
+ return 0; |
23874 |
+ } |
23875 |
+ |
23876 |
+- tcc_activation_temp = read_tcc_activation_temp(); |
23877 |
+- if (tcc_activation_temp) |
23878 |
+- return 0; |
23879 |
++ /* Temperature Target MSR is Nehalem and newer only */ |
23880 |
++ if (!do_nhm_platform_info) |
23881 |
++ goto guess; |
23882 |
++ |
23883 |
++ if (get_msr(base_cpu, MSR_IA32_TEMPERATURE_TARGET, &msr)) |
23884 |
++ goto guess; |
23885 |
++ |
23886 |
++ target_c_local = (msr >> 16) & 0xFF; |
23887 |
++ |
23888 |
++ if (!quiet) |
23889 |
++ fprintf(outf, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n", |
23890 |
++ cpu, msr, target_c_local); |
23891 |
++ |
23892 |
++ if (!target_c_local) |
23893 |
++ goto guess; |
23894 |
++ |
23895 |
++ tcc_activation_temp = target_c_local; |
23896 |
++ |
23897 |
++ return 0; |
23898 |
+ |
23899 |
++guess: |
23900 |
+ tcc_activation_temp = TJMAX_DEFAULT; |
23901 |
+- fprintf(outf, "Guessing tjMax %d C, Please use -T to specify\n", tcc_activation_temp); |
23902 |
++ fprintf(outf, "cpu%d: Guessing tjMax %d C, Please use -T to specify\n", |
23903 |
++ cpu, tcc_activation_temp); |
23904 |
+ |
23905 |
+ return 0; |
23906 |
+ } |
23907 |
+diff --git a/tools/testing/selftests/bpf/Makefile b/tools/testing/selftests/bpf/Makefile |
23908 |
+index c51df6b91befe..d47dd8a24a6f6 100644 |
23909 |
+--- a/tools/testing/selftests/bpf/Makefile |
23910 |
++++ b/tools/testing/selftests/bpf/Makefile |
23911 |
+@@ -202,7 +202,7 @@ $(BUILD_DIR)/libbpf $(BUILD_DIR)/bpftool $(BUILD_DIR)/resolve_btfids $(INCLUDE_D |
23912 |
+ $(call msg,MKDIR,,$@) |
23913 |
+ $(Q)mkdir -p $@ |
23914 |
+ |
23915 |
+-$(INCLUDE_DIR)/vmlinux.h: $(VMLINUX_BTF) | $(BPFTOOL) $(INCLUDE_DIR) |
23916 |
++$(INCLUDE_DIR)/vmlinux.h: $(VMLINUX_BTF) $(BPFTOOL) | $(INCLUDE_DIR) |
23917 |
+ ifeq ($(VMLINUX_H),) |
23918 |
+ $(call msg,GEN,,$@) |
23919 |
+ $(Q)$(BPFTOOL) btf dump file $(VMLINUX_BTF) format c > $@ |
23920 |
+@@ -326,7 +326,8 @@ $(TRUNNER_BPF_OBJS): $(TRUNNER_OUTPUT)/%.o: \ |
23921 |
+ |
23922 |
+ $(TRUNNER_BPF_SKELS): $(TRUNNER_OUTPUT)/%.skel.h: \ |
23923 |
+ $(TRUNNER_OUTPUT)/%.o \ |
23924 |
+- | $(BPFTOOL) $(TRUNNER_OUTPUT) |
23925 |
++ $(BPFTOOL) \ |
23926 |
++ | $(TRUNNER_OUTPUT) |
23927 |
+ $$(call msg,GEN-SKEL,$(TRUNNER_BINARY),$$@) |
23928 |
+ $(Q)$$(BPFTOOL) gen skeleton $$< > $$@ |
23929 |
+ endif |
23930 |
+diff --git a/tools/testing/selftests/bpf/prog_tests/core_reloc.c b/tools/testing/selftests/bpf/prog_tests/core_reloc.c |
23931 |
+index 06eb956ff7bbd..4b517d76257d1 100644 |
23932 |
+--- a/tools/testing/selftests/bpf/prog_tests/core_reloc.c |
23933 |
++++ b/tools/testing/selftests/bpf/prog_tests/core_reloc.c |
23934 |
+@@ -210,11 +210,6 @@ static int duration = 0; |
23935 |
+ .bpf_obj_file = "test_core_reloc_existence.o", \ |
23936 |
+ .btf_src_file = "btf__core_reloc_" #name ".o" \ |
23937 |
+ |
23938 |
+-#define FIELD_EXISTS_ERR_CASE(name) { \ |
23939 |
+- FIELD_EXISTS_CASE_COMMON(name), \ |
23940 |
+- .fails = true, \ |
23941 |
+-} |
23942 |
+- |
23943 |
+ #define BITFIELDS_CASE_COMMON(objfile, test_name_prefix, name) \ |
23944 |
+ .case_name = test_name_prefix#name, \ |
23945 |
+ .bpf_obj_file = objfile, \ |
23946 |
+@@ -222,7 +217,7 @@ static int duration = 0; |
23947 |
+ |
23948 |
+ #define BITFIELDS_CASE(name, ...) { \ |
23949 |
+ BITFIELDS_CASE_COMMON("test_core_reloc_bitfields_probed.o", \ |
23950 |
+- "direct:", name), \ |
23951 |
++ "probed:", name), \ |
23952 |
+ .input = STRUCT_TO_CHAR_PTR(core_reloc_##name) __VA_ARGS__, \ |
23953 |
+ .input_len = sizeof(struct core_reloc_##name), \ |
23954 |
+ .output = STRUCT_TO_CHAR_PTR(core_reloc_bitfields_output) \ |
23955 |
+@@ -230,7 +225,7 @@ static int duration = 0; |
23956 |
+ .output_len = sizeof(struct core_reloc_bitfields_output), \ |
23957 |
+ }, { \ |
23958 |
+ BITFIELDS_CASE_COMMON("test_core_reloc_bitfields_direct.o", \ |
23959 |
+- "probed:", name), \ |
23960 |
++ "direct:", name), \ |
23961 |
+ .input = STRUCT_TO_CHAR_PTR(core_reloc_##name) __VA_ARGS__, \ |
23962 |
+ .input_len = sizeof(struct core_reloc_##name), \ |
23963 |
+ .output = STRUCT_TO_CHAR_PTR(core_reloc_bitfields_output) \ |
23964 |
+@@ -550,8 +545,7 @@ static struct core_reloc_test_case test_cases[] = { |
23965 |
+ ARRAYS_ERR_CASE(arrays___err_too_small), |
23966 |
+ ARRAYS_ERR_CASE(arrays___err_too_shallow), |
23967 |
+ ARRAYS_ERR_CASE(arrays___err_non_array), |
23968 |
+- ARRAYS_ERR_CASE(arrays___err_wrong_val_type1), |
23969 |
+- ARRAYS_ERR_CASE(arrays___err_wrong_val_type2), |
23970 |
++ ARRAYS_ERR_CASE(arrays___err_wrong_val_type), |
23971 |
+ ARRAYS_ERR_CASE(arrays___err_bad_zero_sz_arr), |
23972 |
+ |
23973 |
+ /* enum/ptr/int handling scenarios */ |
23974 |
+@@ -642,13 +636,25 @@ static struct core_reloc_test_case test_cases[] = { |
23975 |
+ }, |
23976 |
+ .output_len = sizeof(struct core_reloc_existence_output), |
23977 |
+ }, |
23978 |
+- |
23979 |
+- FIELD_EXISTS_ERR_CASE(existence__err_int_sz), |
23980 |
+- FIELD_EXISTS_ERR_CASE(existence__err_int_type), |
23981 |
+- FIELD_EXISTS_ERR_CASE(existence__err_int_kind), |
23982 |
+- FIELD_EXISTS_ERR_CASE(existence__err_arr_kind), |
23983 |
+- FIELD_EXISTS_ERR_CASE(existence__err_arr_value_type), |
23984 |
+- FIELD_EXISTS_ERR_CASE(existence__err_struct_type), |
23985 |
++ { |
23986 |
++ FIELD_EXISTS_CASE_COMMON(existence___wrong_field_defs), |
23987 |
++ .input = STRUCT_TO_CHAR_PTR(core_reloc_existence___wrong_field_defs) { |
23988 |
++ }, |
23989 |
++ .input_len = sizeof(struct core_reloc_existence___wrong_field_defs), |
23990 |
++ .output = STRUCT_TO_CHAR_PTR(core_reloc_existence_output) { |
23991 |
++ .a_exists = 0, |
23992 |
++ .b_exists = 0, |
23993 |
++ .c_exists = 0, |
23994 |
++ .arr_exists = 0, |
23995 |
++ .s_exists = 0, |
23996 |
++ .a_value = 0xff000001u, |
23997 |
++ .b_value = 0xff000002u, |
23998 |
++ .c_value = 0xff000003u, |
23999 |
++ .arr_value = 0xff000004u, |
24000 |
++ .s_value = 0xff000005u, |
24001 |
++ }, |
24002 |
++ .output_len = sizeof(struct core_reloc_existence_output), |
24003 |
++ }, |
24004 |
+ |
24005 |
+ /* bitfield relocation checks */ |
24006 |
+ BITFIELDS_CASE(bitfields, { |
24007 |
+@@ -857,13 +863,20 @@ void test_core_reloc(void) |
24008 |
+ "prog '%s' not found\n", probe_name)) |
24009 |
+ goto cleanup; |
24010 |
+ |
24011 |
++ |
24012 |
++ if (test_case->btf_src_file) { |
24013 |
++ err = access(test_case->btf_src_file, R_OK); |
24014 |
++ if (!ASSERT_OK(err, "btf_src_file")) |
24015 |
++ goto cleanup; |
24016 |
++ } |
24017 |
++ |
24018 |
+ load_attr.obj = obj; |
24019 |
+ load_attr.log_level = 0; |
24020 |
+ load_attr.target_btf_path = test_case->btf_src_file; |
24021 |
+ err = bpf_object__load_xattr(&load_attr); |
24022 |
+ if (err) { |
24023 |
+ if (!test_case->fails) |
24024 |
+- CHECK(false, "obj_load", "failed to load prog '%s': %d\n", probe_name, err); |
24025 |
++ ASSERT_OK(err, "obj_load"); |
24026 |
+ goto cleanup; |
24027 |
+ } |
24028 |
+ |
24029 |
+@@ -902,10 +915,8 @@ void test_core_reloc(void) |
24030 |
+ goto cleanup; |
24031 |
+ } |
24032 |
+ |
24033 |
+- if (test_case->fails) { |
24034 |
+- CHECK(false, "obj_load_fail", "should fail to load prog '%s'\n", probe_name); |
24035 |
++ if (!ASSERT_FALSE(test_case->fails, "obj_load_should_fail")) |
24036 |
+ goto cleanup; |
24037 |
+- } |
24038 |
+ |
24039 |
+ equal = memcmp(data->out, test_case->output, |
24040 |
+ test_case->output_len) == 0; |
24041 |
+diff --git a/tools/testing/selftests/bpf/progs/btf__core_reloc_existence___err_wrong_arr_kind.c b/tools/testing/selftests/bpf/progs/btf__core_reloc_existence___err_wrong_arr_kind.c |
24042 |
+deleted file mode 100644 |
24043 |
+index dd0ffa518f366..0000000000000 |
24044 |
+--- a/tools/testing/selftests/bpf/progs/btf__core_reloc_existence___err_wrong_arr_kind.c |
24045 |
++++ /dev/null |
24046 |
+@@ -1,3 +0,0 @@ |
24047 |
+-#include "core_reloc_types.h" |
24048 |
+- |
24049 |
+-void f(struct core_reloc_existence___err_wrong_arr_kind x) {} |
24050 |
+diff --git a/tools/testing/selftests/bpf/progs/btf__core_reloc_existence___err_wrong_arr_value_type.c b/tools/testing/selftests/bpf/progs/btf__core_reloc_existence___err_wrong_arr_value_type.c |
24051 |
+deleted file mode 100644 |
24052 |
+index bc83372088ad0..0000000000000 |
24053 |
+--- a/tools/testing/selftests/bpf/progs/btf__core_reloc_existence___err_wrong_arr_value_type.c |
24054 |
++++ /dev/null |
24055 |
+@@ -1,3 +0,0 @@ |
24056 |
+-#include "core_reloc_types.h" |
24057 |
+- |
24058 |
+-void f(struct core_reloc_existence___err_wrong_arr_value_type x) {} |
24059 |
+diff --git a/tools/testing/selftests/bpf/progs/btf__core_reloc_existence___err_wrong_int_kind.c b/tools/testing/selftests/bpf/progs/btf__core_reloc_existence___err_wrong_int_kind.c |
24060 |
+deleted file mode 100644 |
24061 |
+index 917bec41be081..0000000000000 |
24062 |
+--- a/tools/testing/selftests/bpf/progs/btf__core_reloc_existence___err_wrong_int_kind.c |
24063 |
++++ /dev/null |
24064 |
+@@ -1,3 +0,0 @@ |
24065 |
+-#include "core_reloc_types.h" |
24066 |
+- |
24067 |
+-void f(struct core_reloc_existence___err_wrong_int_kind x) {} |
24068 |
+diff --git a/tools/testing/selftests/bpf/progs/btf__core_reloc_existence___err_wrong_int_sz.c b/tools/testing/selftests/bpf/progs/btf__core_reloc_existence___err_wrong_int_sz.c |
24069 |
+deleted file mode 100644 |
24070 |
+index 6ec7e6ec1c915..0000000000000 |
24071 |
+--- a/tools/testing/selftests/bpf/progs/btf__core_reloc_existence___err_wrong_int_sz.c |
24072 |
++++ /dev/null |
24073 |
+@@ -1,3 +0,0 @@ |
24074 |
+-#include "core_reloc_types.h" |
24075 |
+- |
24076 |
+-void f(struct core_reloc_existence___err_wrong_int_sz x) {} |
24077 |
+diff --git a/tools/testing/selftests/bpf/progs/btf__core_reloc_existence___err_wrong_int_type.c b/tools/testing/selftests/bpf/progs/btf__core_reloc_existence___err_wrong_int_type.c |
24078 |
+deleted file mode 100644 |
24079 |
+index 7bbcacf2b0d17..0000000000000 |
24080 |
+--- a/tools/testing/selftests/bpf/progs/btf__core_reloc_existence___err_wrong_int_type.c |
24081 |
++++ /dev/null |
24082 |
+@@ -1,3 +0,0 @@ |
24083 |
+-#include "core_reloc_types.h" |
24084 |
+- |
24085 |
+-void f(struct core_reloc_existence___err_wrong_int_type x) {} |
24086 |
+diff --git a/tools/testing/selftests/bpf/progs/btf__core_reloc_existence___err_wrong_struct_type.c b/tools/testing/selftests/bpf/progs/btf__core_reloc_existence___err_wrong_struct_type.c |
24087 |
+deleted file mode 100644 |
24088 |
+index f384dd38ec709..0000000000000 |
24089 |
+--- a/tools/testing/selftests/bpf/progs/btf__core_reloc_existence___err_wrong_struct_type.c |
24090 |
++++ /dev/null |
24091 |
+@@ -1,3 +0,0 @@ |
24092 |
+-#include "core_reloc_types.h" |
24093 |
+- |
24094 |
+-void f(struct core_reloc_existence___err_wrong_struct_type x) {} |
24095 |
+diff --git a/tools/testing/selftests/bpf/progs/btf__core_reloc_existence___wrong_field_defs.c b/tools/testing/selftests/bpf/progs/btf__core_reloc_existence___wrong_field_defs.c |
24096 |
+new file mode 100644 |
24097 |
+index 0000000000000..d14b496190c3d |
24098 |
+--- /dev/null |
24099 |
++++ b/tools/testing/selftests/bpf/progs/btf__core_reloc_existence___wrong_field_defs.c |
24100 |
+@@ -0,0 +1,3 @@ |
24101 |
++#include "core_reloc_types.h" |
24102 |
++ |
24103 |
++void f(struct core_reloc_existence___wrong_field_defs x) {} |
24104 |
+diff --git a/tools/testing/selftests/bpf/progs/core_reloc_types.h b/tools/testing/selftests/bpf/progs/core_reloc_types.h |
24105 |
+index 9a28508501213..664eea1013aab 100644 |
24106 |
+--- a/tools/testing/selftests/bpf/progs/core_reloc_types.h |
24107 |
++++ b/tools/testing/selftests/bpf/progs/core_reloc_types.h |
24108 |
+@@ -700,27 +700,11 @@ struct core_reloc_existence___minimal { |
24109 |
+ int a; |
24110 |
+ }; |
24111 |
+ |
24112 |
+-struct core_reloc_existence___err_wrong_int_sz { |
24113 |
+- short a; |
24114 |
+-}; |
24115 |
+- |
24116 |
+-struct core_reloc_existence___err_wrong_int_type { |
24117 |
++struct core_reloc_existence___wrong_field_defs { |
24118 |
++ void *a; |
24119 |
+ int b[1]; |
24120 |
+-}; |
24121 |
+- |
24122 |
+-struct core_reloc_existence___err_wrong_int_kind { |
24123 |
+ struct{ int x; } c; |
24124 |
+-}; |
24125 |
+- |
24126 |
+-struct core_reloc_existence___err_wrong_arr_kind { |
24127 |
+ int arr; |
24128 |
+-}; |
24129 |
+- |
24130 |
+-struct core_reloc_existence___err_wrong_arr_value_type { |
24131 |
+- short arr[1]; |
24132 |
+-}; |
24133 |
+- |
24134 |
+-struct core_reloc_existence___err_wrong_struct_type { |
24135 |
+ int s; |
24136 |
+ }; |
24137 |
+ |
24138 |
+diff --git a/tools/testing/selftests/bpf/verifier/array_access.c b/tools/testing/selftests/bpf/verifier/array_access.c |
24139 |
+index 1b138cd2b187d..1b1c798e92489 100644 |
24140 |
+--- a/tools/testing/selftests/bpf/verifier/array_access.c |
24141 |
++++ b/tools/testing/selftests/bpf/verifier/array_access.c |
24142 |
+@@ -186,7 +186,7 @@ |
24143 |
+ }, |
24144 |
+ .fixup_map_hash_48b = { 3 }, |
24145 |
+ .errstr_unpriv = "R0 leaks addr", |
24146 |
+- .errstr = "invalid access to map value, value_size=48 off=44 size=8", |
24147 |
++ .errstr = "R0 unbounded memory access", |
24148 |
+ .result_unpriv = REJECT, |
24149 |
+ .result = REJECT, |
24150 |
+ .flags = F_NEEDS_EFFICIENT_UNALIGNED_ACCESS, |
24151 |
+diff --git a/tools/testing/selftests/drivers/net/mlxsw/tc_flower_scale.sh b/tools/testing/selftests/drivers/net/mlxsw/tc_flower_scale.sh |
24152 |
+index cc0f07e72cf22..aa74be9f47c85 100644 |
24153 |
+--- a/tools/testing/selftests/drivers/net/mlxsw/tc_flower_scale.sh |
24154 |
++++ b/tools/testing/selftests/drivers/net/mlxsw/tc_flower_scale.sh |
24155 |
+@@ -98,11 +98,7 @@ __tc_flower_test() |
24156 |
+ jq -r '[ .[] | select(.kind == "flower") | |
24157 |
+ .options | .in_hw ]' | jq .[] | wc -l) |
24158 |
+ [[ $((offload_count - 1)) -eq $count ]] |
24159 |
+- if [[ $should_fail -eq 0 ]]; then |
24160 |
+- check_err $? "Offload mismatch" |
24161 |
+- else |
24162 |
+- check_err_fail $should_fail $? "Offload more than expacted" |
24163 |
+- fi |
24164 |
++ check_err_fail $should_fail $? "Attempt to offload $count rules (actual result $((offload_count - 1)))" |
24165 |
+ } |
24166 |
+ |
24167 |
+ tc_flower_test() |
24168 |
+diff --git a/tools/testing/selftests/kvm/dirty_log_test.c b/tools/testing/selftests/kvm/dirty_log_test.c |
24169 |
+index bb2752d78fe3a..81edbd23d371c 100644 |
24170 |
+--- a/tools/testing/selftests/kvm/dirty_log_test.c |
24171 |
++++ b/tools/testing/selftests/kvm/dirty_log_test.c |
24172 |
+@@ -17,6 +17,7 @@ |
24173 |
+ #include <linux/bitmap.h> |
24174 |
+ #include <linux/bitops.h> |
24175 |
+ #include <asm/barrier.h> |
24176 |
++#include <linux/atomic.h> |
24177 |
+ |
24178 |
+ #include "kvm_util.h" |
24179 |
+ #include "test_util.h" |
24180 |
+@@ -137,12 +138,20 @@ static uint64_t host_clear_count; |
24181 |
+ static uint64_t host_track_next_count; |
24182 |
+ |
24183 |
+ /* Whether dirty ring reset is requested, or finished */ |
24184 |
+-static sem_t dirty_ring_vcpu_stop; |
24185 |
+-static sem_t dirty_ring_vcpu_cont; |
24186 |
++static sem_t sem_vcpu_stop; |
24187 |
++static sem_t sem_vcpu_cont; |
24188 |
++/* |
24189 |
++ * This is only set by main thread, and only cleared by vcpu thread. It is |
24190 |
++ * used to request vcpu thread to stop at the next GUEST_SYNC, since GUEST_SYNC |
24191 |
++ * is the only place that we'll guarantee both "dirty bit" and "dirty data" |
24192 |
++ * will match. E.g., SIG_IPI won't guarantee that if the vcpu is interrupted |
24193 |
++ * after setting dirty bit but before the data is written. |
24194 |
++ */ |
24195 |
++static atomic_t vcpu_sync_stop_requested; |
24196 |
+ /* |
24197 |
+ * This is updated by the vcpu thread to tell the host whether it's a |
24198 |
+ * ring-full event. It should only be read until a sem_wait() of |
24199 |
+- * dirty_ring_vcpu_stop and before vcpu continues to run. |
24200 |
++ * sem_vcpu_stop and before vcpu continues to run. |
24201 |
+ */ |
24202 |
+ static bool dirty_ring_vcpu_ring_full; |
24203 |
+ /* |
24204 |
+@@ -234,6 +243,17 @@ static void clear_log_collect_dirty_pages(struct kvm_vm *vm, int slot, |
24205 |
+ kvm_vm_clear_dirty_log(vm, slot, bitmap, 0, num_pages); |
24206 |
+ } |
24207 |
+ |
24208 |
++/* Should only be called after a GUEST_SYNC */ |
24209 |
++static void vcpu_handle_sync_stop(void) |
24210 |
++{ |
24211 |
++ if (atomic_read(&vcpu_sync_stop_requested)) { |
24212 |
++ /* It means main thread is sleeping waiting */ |
24213 |
++ atomic_set(&vcpu_sync_stop_requested, false); |
24214 |
++ sem_post(&sem_vcpu_stop); |
24215 |
++ sem_wait_until(&sem_vcpu_cont); |
24216 |
++ } |
24217 |
++} |
24218 |
++ |
24219 |
+ static void default_after_vcpu_run(struct kvm_vm *vm, int ret, int err) |
24220 |
+ { |
24221 |
+ struct kvm_run *run = vcpu_state(vm, VCPU_ID); |
24222 |
+@@ -244,6 +264,8 @@ static void default_after_vcpu_run(struct kvm_vm *vm, int ret, int err) |
24223 |
+ TEST_ASSERT(get_ucall(vm, VCPU_ID, NULL) == UCALL_SYNC, |
24224 |
+ "Invalid guest sync status: exit_reason=%s\n", |
24225 |
+ exit_reason_str(run->exit_reason)); |
24226 |
++ |
24227 |
++ vcpu_handle_sync_stop(); |
24228 |
+ } |
24229 |
+ |
24230 |
+ static bool dirty_ring_supported(void) |
24231 |
+@@ -301,13 +323,13 @@ static void dirty_ring_wait_vcpu(void) |
24232 |
+ { |
24233 |
+ /* This makes sure that hardware PML cache flushed */ |
24234 |
+ vcpu_kick(); |
24235 |
+- sem_wait_until(&dirty_ring_vcpu_stop); |
24236 |
++ sem_wait_until(&sem_vcpu_stop); |
24237 |
+ } |
24238 |
+ |
24239 |
+ static void dirty_ring_continue_vcpu(void) |
24240 |
+ { |
24241 |
+ pr_info("Notifying vcpu to continue\n"); |
24242 |
+- sem_post(&dirty_ring_vcpu_cont); |
24243 |
++ sem_post(&sem_vcpu_cont); |
24244 |
+ } |
24245 |
+ |
24246 |
+ static void dirty_ring_collect_dirty_pages(struct kvm_vm *vm, int slot, |
24247 |
+@@ -361,11 +383,11 @@ static void dirty_ring_after_vcpu_run(struct kvm_vm *vm, int ret, int err) |
24248 |
+ /* Update the flag first before pause */ |
24249 |
+ WRITE_ONCE(dirty_ring_vcpu_ring_full, |
24250 |
+ run->exit_reason == KVM_EXIT_DIRTY_RING_FULL); |
24251 |
+- sem_post(&dirty_ring_vcpu_stop); |
24252 |
++ sem_post(&sem_vcpu_stop); |
24253 |
+ pr_info("vcpu stops because %s...\n", |
24254 |
+ dirty_ring_vcpu_ring_full ? |
24255 |
+ "dirty ring is full" : "vcpu is kicked out"); |
24256 |
+- sem_wait_until(&dirty_ring_vcpu_cont); |
24257 |
++ sem_wait_until(&sem_vcpu_cont); |
24258 |
+ pr_info("vcpu continues now.\n"); |
24259 |
+ } else { |
24260 |
+ TEST_ASSERT(false, "Invalid guest sync status: " |
24261 |
+@@ -377,7 +399,7 @@ static void dirty_ring_after_vcpu_run(struct kvm_vm *vm, int ret, int err) |
24262 |
+ static void dirty_ring_before_vcpu_join(void) |
24263 |
+ { |
24264 |
+ /* Kick another round of vcpu just to make sure it will quit */ |
24265 |
+- sem_post(&dirty_ring_vcpu_cont); |
24266 |
++ sem_post(&sem_vcpu_cont); |
24267 |
+ } |
24268 |
+ |
24269 |
+ struct log_mode { |
24270 |
+@@ -505,9 +527,8 @@ static void *vcpu_worker(void *data) |
24271 |
+ */ |
24272 |
+ sigmask->len = 8; |
24273 |
+ pthread_sigmask(0, NULL, sigset); |
24274 |
++ sigdelset(sigset, SIG_IPI); |
24275 |
+ vcpu_ioctl(vm, VCPU_ID, KVM_SET_SIGNAL_MASK, sigmask); |
24276 |
+- sigaddset(sigset, SIG_IPI); |
24277 |
+- pthread_sigmask(SIG_BLOCK, sigset, NULL); |
24278 |
+ |
24279 |
+ sigemptyset(sigset); |
24280 |
+ sigaddset(sigset, SIG_IPI); |
24281 |
+@@ -768,7 +789,25 @@ static void run_test(enum vm_guest_mode mode, void *arg) |
24282 |
+ usleep(p->interval * 1000); |
24283 |
+ log_mode_collect_dirty_pages(vm, TEST_MEM_SLOT_INDEX, |
24284 |
+ bmap, host_num_pages); |
24285 |
++ |
24286 |
++ /* |
24287 |
++ * See vcpu_sync_stop_requested definition for details on why |
24288 |
++ * we need to stop vcpu when verify data. |
24289 |
++ */ |
24290 |
++ atomic_set(&vcpu_sync_stop_requested, true); |
24291 |
++ sem_wait_until(&sem_vcpu_stop); |
24292 |
++ /* |
24293 |
++ * NOTE: for dirty ring, it's possible that we didn't stop at |
24294 |
++ * GUEST_SYNC but instead we stopped because ring is full; |
24295 |
++ * that's okay too because ring full means we're only missing |
24296 |
++ * the flush of the last page, and since we handle the last |
24297 |
++ * page specially verification will succeed anyway. |
24298 |
++ */ |
24299 |
++ assert(host_log_mode == LOG_MODE_DIRTY_RING || |
24300 |
++ atomic_read(&vcpu_sync_stop_requested) == false); |
24301 |
+ vm_dirty_log_verify(mode, bmap); |
24302 |
++ sem_post(&sem_vcpu_cont); |
24303 |
++ |
24304 |
+ iteration++; |
24305 |
+ sync_global_to_guest(vm, iteration); |
24306 |
+ } |
24307 |
+@@ -818,9 +857,10 @@ int main(int argc, char *argv[]) |
24308 |
+ .interval = TEST_HOST_LOOP_INTERVAL, |
24309 |
+ }; |
24310 |
+ int opt, i; |
24311 |
++ sigset_t sigset; |
24312 |
+ |
24313 |
+- sem_init(&dirty_ring_vcpu_stop, 0, 0); |
24314 |
+- sem_init(&dirty_ring_vcpu_cont, 0, 0); |
24315 |
++ sem_init(&sem_vcpu_stop, 0, 0); |
24316 |
++ sem_init(&sem_vcpu_cont, 0, 0); |
24317 |
+ |
24318 |
+ guest_modes_append_default(); |
24319 |
+ |
24320 |
+@@ -876,6 +916,11 @@ int main(int argc, char *argv[]) |
24321 |
+ |
24322 |
+ srandom(time(0)); |
24323 |
+ |
24324 |
++ /* Ensure that vCPU threads start with SIG_IPI blocked. */ |
24325 |
++ sigemptyset(&sigset); |
24326 |
++ sigaddset(&sigset, SIG_IPI); |
24327 |
++ pthread_sigmask(SIG_BLOCK, &sigset, NULL); |
24328 |
++ |
24329 |
+ if (host_log_mode_option == LOG_MODE_ALL) { |
24330 |
+ /* Run each log mode */ |
24331 |
+ for (i = 0; i < LOG_MODE_NUM; i++) { |
24332 |
+diff --git a/tools/testing/selftests/lib.mk b/tools/testing/selftests/lib.mk |
24333 |
+index a5ce26d548e4f..be17462fe1467 100644 |
24334 |
+--- a/tools/testing/selftests/lib.mk |
24335 |
++++ b/tools/testing/selftests/lib.mk |
24336 |
+@@ -74,7 +74,8 @@ ifdef building_out_of_srctree |
24337 |
+ rsync -aq $(TEST_PROGS) $(TEST_PROGS_EXTENDED) $(TEST_FILES) $(OUTPUT); \ |
24338 |
+ fi |
24339 |
+ @if [ "X$(TEST_PROGS)" != "X" ]; then \ |
24340 |
+- $(call RUN_TESTS, $(TEST_GEN_PROGS) $(TEST_CUSTOM_PROGS) $(OUTPUT)/$(TEST_PROGS)) ; \ |
24341 |
++ $(call RUN_TESTS, $(TEST_GEN_PROGS) $(TEST_CUSTOM_PROGS) \ |
24342 |
++ $(addprefix $(OUTPUT)/,$(TEST_PROGS))) ; \ |
24343 |
+ else \ |
24344 |
+ $(call RUN_TESTS, $(TEST_GEN_PROGS) $(TEST_CUSTOM_PROGS)); \ |
24345 |
+ fi |
24346 |
+diff --git a/tools/testing/selftests/net/forwarding/mirror_gre_vlan_bridge_1q.sh b/tools/testing/selftests/net/forwarding/mirror_gre_vlan_bridge_1q.sh |
24347 |
+index c02291e9841e3..880e3ab9d088d 100755 |
24348 |
+--- a/tools/testing/selftests/net/forwarding/mirror_gre_vlan_bridge_1q.sh |
24349 |
++++ b/tools/testing/selftests/net/forwarding/mirror_gre_vlan_bridge_1q.sh |
24350 |
+@@ -271,7 +271,7 @@ test_span_gre_fdb_roaming() |
24351 |
+ |
24352 |
+ while ((RET == 0)); do |
24353 |
+ bridge fdb del dev $swp3 $h3mac vlan 555 master 2>/dev/null |
24354 |
+- bridge fdb add dev $swp2 $h3mac vlan 555 master |
24355 |
++ bridge fdb add dev $swp2 $h3mac vlan 555 master static |
24356 |
+ sleep 1 |
24357 |
+ fail_test_span_gre_dir $tundev ingress |
24358 |
+ |
24359 |
+diff --git a/tools/testing/selftests/x86/thunks_32.S b/tools/testing/selftests/x86/thunks_32.S |
24360 |
+index a71d92da8f466..f3f56e681e9fb 100644 |
24361 |
+--- a/tools/testing/selftests/x86/thunks_32.S |
24362 |
++++ b/tools/testing/selftests/x86/thunks_32.S |
24363 |
+@@ -45,3 +45,5 @@ call64_from_32: |
24364 |
+ ret |
24365 |
+ |
24366 |
+ .size call64_from_32, .-call64_from_32 |
24367 |
++ |
24368 |
++.section .note.GNU-stack,"",%progbits |
24369 |
+diff --git a/virt/kvm/coalesced_mmio.c b/virt/kvm/coalesced_mmio.c |
24370 |
+index 62bd908ecd580..f08f5e82460b1 100644 |
24371 |
+--- a/virt/kvm/coalesced_mmio.c |
24372 |
++++ b/virt/kvm/coalesced_mmio.c |
24373 |
+@@ -174,21 +174,36 @@ int kvm_vm_ioctl_unregister_coalesced_mmio(struct kvm *kvm, |
24374 |
+ struct kvm_coalesced_mmio_zone *zone) |
24375 |
+ { |
24376 |
+ struct kvm_coalesced_mmio_dev *dev, *tmp; |
24377 |
++ int r; |
24378 |
+ |
24379 |
+ if (zone->pio != 1 && zone->pio != 0) |
24380 |
+ return -EINVAL; |
24381 |
+ |
24382 |
+ mutex_lock(&kvm->slots_lock); |
24383 |
+ |
24384 |
+- list_for_each_entry_safe(dev, tmp, &kvm->coalesced_zones, list) |
24385 |
++ list_for_each_entry_safe(dev, tmp, &kvm->coalesced_zones, list) { |
24386 |
+ if (zone->pio == dev->zone.pio && |
24387 |
+ coalesced_mmio_in_range(dev, zone->addr, zone->size)) { |
24388 |
+- kvm_io_bus_unregister_dev(kvm, |
24389 |
++ r = kvm_io_bus_unregister_dev(kvm, |
24390 |
+ zone->pio ? KVM_PIO_BUS : KVM_MMIO_BUS, &dev->dev); |
24391 |
+ kvm_iodevice_destructor(&dev->dev); |
24392 |
++ |
24393 |
++ /* |
24394 |
++ * On failure, unregister destroys all devices on the |
24395 |
++ * bus _except_ the target device, i.e. coalesced_zones |
24396 |
++ * has been modified. No need to restart the walk as |
24397 |
++ * there aren't any zones left. |
24398 |
++ */ |
24399 |
++ if (r) |
24400 |
++ break; |
24401 |
+ } |
24402 |
++ } |
24403 |
+ |
24404 |
+ mutex_unlock(&kvm->slots_lock); |
24405 |
+ |
24406 |
++ /* |
24407 |
++ * Ignore the result of kvm_io_bus_unregister_dev(), from userspace's |
24408 |
++ * perspective, the coalesced MMIO is most definitely unregistered. |
24409 |
++ */ |
24410 |
+ return 0; |
24411 |
+ } |
24412 |
+diff --git a/virt/kvm/kvm_main.c b/virt/kvm/kvm_main.c |
24413 |
+index 2caba28289827..2d2dfb8b51eab 100644 |
24414 |
+--- a/virt/kvm/kvm_main.c |
24415 |
++++ b/virt/kvm/kvm_main.c |
24416 |
+@@ -4462,15 +4462,15 @@ int kvm_io_bus_register_dev(struct kvm *kvm, enum kvm_bus bus_idx, gpa_t addr, |
24417 |
+ } |
24418 |
+ |
24419 |
+ /* Caller must hold slots_lock. */ |
24420 |
+-void kvm_io_bus_unregister_dev(struct kvm *kvm, enum kvm_bus bus_idx, |
24421 |
+- struct kvm_io_device *dev) |
24422 |
++int kvm_io_bus_unregister_dev(struct kvm *kvm, enum kvm_bus bus_idx, |
24423 |
++ struct kvm_io_device *dev) |
24424 |
+ { |
24425 |
+ int i, j; |
24426 |
+ struct kvm_io_bus *new_bus, *bus; |
24427 |
+ |
24428 |
+ bus = kvm_get_bus(kvm, bus_idx); |
24429 |
+ if (!bus) |
24430 |
+- return; |
24431 |
++ return 0; |
24432 |
+ |
24433 |
+ for (i = 0; i < bus->dev_count; i++) |
24434 |
+ if (bus->range[i].dev == dev) { |
24435 |
+@@ -4478,7 +4478,7 @@ void kvm_io_bus_unregister_dev(struct kvm *kvm, enum kvm_bus bus_idx, |
24436 |
+ } |
24437 |
+ |
24438 |
+ if (i == bus->dev_count) |
24439 |
+- return; |
24440 |
++ return 0; |
24441 |
+ |
24442 |
+ new_bus = kmalloc(struct_size(bus, range, bus->dev_count - 1), |
24443 |
+ GFP_KERNEL_ACCOUNT); |
24444 |
+@@ -4487,7 +4487,13 @@ void kvm_io_bus_unregister_dev(struct kvm *kvm, enum kvm_bus bus_idx, |
24445 |
+ new_bus->dev_count--; |
24446 |
+ memcpy(new_bus->range + i, bus->range + i + 1, |
24447 |
+ flex_array_size(new_bus, range, new_bus->dev_count - i)); |
24448 |
+- } else { |
24449 |
++ } |
24450 |
++ |
24451 |
++ rcu_assign_pointer(kvm->buses[bus_idx], new_bus); |
24452 |
++ synchronize_srcu_expedited(&kvm->srcu); |
24453 |
++ |
24454 |
++ /* Destroy the old bus _after_ installing the (null) bus. */ |
24455 |
++ if (!new_bus) { |
24456 |
+ pr_err("kvm: failed to shrink bus, removing it completely\n"); |
24457 |
+ for (j = 0; j < bus->dev_count; j++) { |
24458 |
+ if (j == i) |
24459 |
+@@ -4496,10 +4502,8 @@ void kvm_io_bus_unregister_dev(struct kvm *kvm, enum kvm_bus bus_idx, |
24460 |
+ } |
24461 |
+ } |
24462 |
+ |
24463 |
+- rcu_assign_pointer(kvm->buses[bus_idx], new_bus); |
24464 |
+- synchronize_srcu_expedited(&kvm->srcu); |
24465 |
+ kfree(bus); |
24466 |
+- return; |
24467 |
++ return new_bus ? 0 : -ENOMEM; |
24468 |
+ } |
24469 |
+ |
24470 |
+ struct kvm_io_device *kvm_io_bus_get_dev(struct kvm *kvm, enum kvm_bus bus_idx, |