[gentoo-commits] repo/gentoo:master commit in: eclass/

[Mike Gilbert]

commit:     9745b8f75443e0580b6f194b3100d91d5ebdb765
Author:     David Michael <fedora.dm0 <AT> gmail <DOT> com>
AuthorDate: Mon May  3 12:56:19 2021 +0000
Commit:     Mike Gilbert <floppym <AT> gentoo <DOT> org>
CommitDate: Wed May  5 20:05:25 2021 +0000
URL:        https://gitweb.gentoo.org/repo/gentoo.git/commit/?id=9745b8f7

meson.eclass: include riscv bitness in cpu_family

This makes cpu_family identify RISC-V systems as either "riscv64"
or "riscv32" to match the given tuple, or it will leave it as
"riscv" when the tuple has an unknown cpu field.

This fixes the expected values of cpu_family in meson projects:
https://mesonbuild.com/Reference-tables.html#cpu-families

Signed-off-by: David Michael <fedora.dm0 <AT> gmail.com>
Signed-off-by: Mike Gilbert <floppym <AT> gentoo.org>

 eclass/meson.eclass | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/eclass/meson.eclass b/eclass/meson.eclass
index d0ce5adb355..d87d61f44ae 100644
--- a/eclass/meson.eclass
+++ b/eclass/meson.eclass
@@ -1,4 +1,4 @@
-# Copyright 2017-2020 Gentoo Authors
+# Copyright 2017-2021 Gentoo Authors
 # Distributed under the terms of the GNU General Public License v2
 
 # @ECLASS: meson.eclass
@@ -142,6 +142,11 @@ _meson_get_machine_info() {
 	case ${cpu_family} in
 		amd64) cpu_family=x86_64 ;;
 		arm64) cpu_family=aarch64 ;;
+		riscv)
+			case ${tuple} in
+				riscv32*) cpu_family=riscv32 ;;
+				riscv64*) cpu_family=riscv64 ;;
+			esac ;;
 	esac
 
 	# This may require adjustment based on CFLAGS