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commit: 5efc135f497de18be94cffe6ca700a998ab5986b |
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Author: Mike Pagano <mpagano <AT> gentoo <DOT> org> |
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AuthorDate: Fri Apr 8 13:06:46 2022 +0000 |
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Commit: Mike Pagano <mpagano <AT> gentoo <DOT> org> |
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CommitDate: Fri Apr 8 13:06:46 2022 +0000 |
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URL: https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=5efc135f |
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|
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Remove redundant patch |
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|
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2400_mt76-mt7921e-fix-possible-probe-failure-after-reboot.patch |
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|
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Signed-off-by: Mike Pagano <mpagano <AT> gentoo.org> |
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|
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...e-fix-possible-probe-failure-after-reboot.patch | 436 --------------------- |
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1 file changed, 436 deletions(-) |
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|
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diff --git a/2400_mt76-mt7921e-fix-possible-probe-failure-after-reboot.patch b/2400_mt76-mt7921e-fix-possible-probe-failure-after-reboot.patch |
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deleted file mode 100644 |
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index 4440e910..00000000 |
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--- a/2400_mt76-mt7921e-fix-possible-probe-failure-after-reboot.patch |
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+++ /dev/null |
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@@ -1,436 +0,0 @@ |
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-From patchwork Fri Jan 7 07:30:03 2022 |
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-X-Patchwork-Id: 12706336 |
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- <linux-mediatek@×××××××××××××××.org>, |
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- "Deren Wu" <deren.wu@××××××××.com> |
| 76 |
-Subject: [PATCH] mt76: mt7921e: fix possible probe failure after reboot |
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-Date: Fri, 7 Jan 2022 15:30:03 +0800 |
| 78 |
-Message-ID: |
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- <70e27cbc652cbdb78277b9c691a3a5ba02653afb.1641540175.git.objelf@×××××.com> |
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-List-ID: <linux-wireless.vger.kernel.org> |
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-X-Mailing-List: linux-wireless@×××××××××××.org |
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- |
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-From: Sean Wang <sean.wang@××××××××.com> |
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- |
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-It doesn't guarantee the mt7921e gets started with ASPM L0 after each |
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-machine reboot on every platform. |
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- |
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-If mt7921e gets started with not ASPM L0, it would be possible that the |
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-driver encounters time to time failure in mt7921_pci_probe, like a |
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-weird chip identifier is read |
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- |
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-[ 215.514503] mt7921e 0000:05:00.0: ASIC revision: feed0000 |
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-[ 216.604741] mt7921e: probe of 0000:05:00.0 failed with error -110 |
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- |
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-or failing to init hardware because the driver is not allowed to access the |
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-register until the device is in ASPM L0 state. So, we call |
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-__mt7921e_mcu_drv_pmctrl in early mt7921_pci_probe to force the device |
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-to bring back to the L0 state for we can safely access registers in any |
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-case. |
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- |
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-In the patch, we move all functions from dma.c to pci.c and register mt76 |
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-bus operation earilier, that is the __mt7921e_mcu_drv_pmctrl depends on. |
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- |
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-Fixes: bf3747ae2e25 ("mt76: mt7921: enable aspm by default") |
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-Reported-by: Kai-Chuan Hsieh <kaichuan.hsieh@×××××××××.com> |
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-Co-developed-by: Deren Wu <deren.wu@××××××××.com> |
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-Signed-off-by: Deren Wu <deren.wu@××××××××.com> |
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-Signed-off-by: Sean Wang <sean.wang@××××××××.com> |
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---- |
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- .../net/wireless/mediatek/mt76/mt7921/dma.c | 119 ----------------- |
| 115 |
- .../wireless/mediatek/mt76/mt7921/mt7921.h | 1 + |
| 116 |
- .../net/wireless/mediatek/mt76/mt7921/pci.c | 124 ++++++++++++++++++ |
| 117 |
- .../wireless/mediatek/mt76/mt7921/pci_mcu.c | 18 ++- |
| 118 |
- 4 files changed, 139 insertions(+), 123 deletions(-) |
| 119 |
- |
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-diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/dma.c b/drivers/net/wireless/mediatek/mt76/mt7921/dma.c |
| 121 |
-index cdff1fd52d93..39d6ce4ecddd 100644 |
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---- a/drivers/net/wireless/mediatek/mt76/mt7921/dma.c |
| 123 |
-+++ b/drivers/net/wireless/mediatek/mt76/mt7921/dma.c |
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-@@ -78,110 +78,6 @@ static void mt7921_dma_prefetch(struct mt7921_dev *dev) |
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- mt76_wr(dev, MT_WFDMA0_TX_RING17_EXT_CTRL, PREFETCH(0x380, 0x4)); |
| 126 |
- } |
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- |
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--static u32 __mt7921_reg_addr(struct mt7921_dev *dev, u32 addr) |
| 129 |
--{ |
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-- static const struct { |
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-- u32 phys; |
| 132 |
-- u32 mapped; |
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-- u32 size; |
| 134 |
-- } fixed_map[] = { |
| 135 |
-- { 0x820d0000, 0x30000, 0x10000 }, /* WF_LMAC_TOP (WF_WTBLON) */ |
| 136 |
-- { 0x820ed000, 0x24800, 0x0800 }, /* WF_LMAC_TOP BN0 (WF_MIB) */ |
| 137 |
-- { 0x820e4000, 0x21000, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_TMAC) */ |
| 138 |
-- { 0x820e7000, 0x21e00, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_DMA) */ |
| 139 |
-- { 0x820eb000, 0x24200, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_LPON) */ |
| 140 |
-- { 0x820e2000, 0x20800, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_AGG) */ |
| 141 |
-- { 0x820e3000, 0x20c00, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_ARB) */ |
| 142 |
-- { 0x820e5000, 0x21400, 0x0800 }, /* WF_LMAC_TOP BN0 (WF_RMAC) */ |
| 143 |
-- { 0x00400000, 0x80000, 0x10000 }, /* WF_MCU_SYSRAM */ |
| 144 |
-- { 0x00410000, 0x90000, 0x10000 }, /* WF_MCU_SYSRAM (configure register) */ |
| 145 |
-- { 0x40000000, 0x70000, 0x10000 }, /* WF_UMAC_SYSRAM */ |
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-- { 0x54000000, 0x02000, 0x1000 }, /* WFDMA PCIE0 MCU DMA0 */ |
| 147 |
-- { 0x55000000, 0x03000, 0x1000 }, /* WFDMA PCIE0 MCU DMA1 */ |
| 148 |
-- { 0x58000000, 0x06000, 0x1000 }, /* WFDMA PCIE1 MCU DMA0 (MEM_DMA) */ |
| 149 |
-- { 0x59000000, 0x07000, 0x1000 }, /* WFDMA PCIE1 MCU DMA1 */ |
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-- { 0x7c000000, 0xf0000, 0x10000 }, /* CONN_INFRA */ |
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-- { 0x7c020000, 0xd0000, 0x10000 }, /* CONN_INFRA, WFDMA */ |
| 152 |
-- { 0x7c060000, 0xe0000, 0x10000 }, /* CONN_INFRA, conn_host_csr_top */ |
| 153 |
-- { 0x80020000, 0xb0000, 0x10000 }, /* WF_TOP_MISC_OFF */ |
| 154 |
-- { 0x81020000, 0xc0000, 0x10000 }, /* WF_TOP_MISC_ON */ |
| 155 |
-- { 0x820c0000, 0x08000, 0x4000 }, /* WF_UMAC_TOP (PLE) */ |
| 156 |
-- { 0x820c8000, 0x0c000, 0x2000 }, /* WF_UMAC_TOP (PSE) */ |
| 157 |
-- { 0x820cc000, 0x0e000, 0x1000 }, /* WF_UMAC_TOP (PP) */ |
| 158 |
-- { 0x820cd000, 0x0f000, 0x1000 }, /* WF_MDP_TOP */ |
| 159 |
-- { 0x820ce000, 0x21c00, 0x0200 }, /* WF_LMAC_TOP (WF_SEC) */ |
| 160 |
-- { 0x820cf000, 0x22000, 0x1000 }, /* WF_LMAC_TOP (WF_PF) */ |
| 161 |
-- { 0x820e0000, 0x20000, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_CFG) */ |
| 162 |
-- { 0x820e1000, 0x20400, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_TRB) */ |
| 163 |
-- { 0x820e9000, 0x23400, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_WTBLOFF) */ |
| 164 |
-- { 0x820ea000, 0x24000, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_ETBF) */ |
| 165 |
-- { 0x820ec000, 0x24600, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_INT) */ |
| 166 |
-- { 0x820f0000, 0xa0000, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_CFG) */ |
| 167 |
-- { 0x820f1000, 0xa0600, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_TRB) */ |
| 168 |
-- { 0x820f2000, 0xa0800, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_AGG) */ |
| 169 |
-- { 0x820f3000, 0xa0c00, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_ARB) */ |
| 170 |
-- { 0x820f4000, 0xa1000, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_TMAC) */ |
| 171 |
-- { 0x820f5000, 0xa1400, 0x0800 }, /* WF_LMAC_TOP BN1 (WF_RMAC) */ |
| 172 |
-- { 0x820f7000, 0xa1e00, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_DMA) */ |
| 173 |
-- { 0x820f9000, 0xa3400, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_WTBLOFF) */ |
| 174 |
-- { 0x820fa000, 0xa4000, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_ETBF) */ |
| 175 |
-- { 0x820fb000, 0xa4200, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_LPON) */ |
| 176 |
-- { 0x820fc000, 0xa4600, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_INT) */ |
| 177 |
-- { 0x820fd000, 0xa4800, 0x0800 }, /* WF_LMAC_TOP BN1 (WF_MIB) */ |
| 178 |
-- }; |
| 179 |
-- int i; |
| 180 |
-- |
| 181 |
-- if (addr < 0x100000) |
| 182 |
-- return addr; |
| 183 |
-- |
| 184 |
-- for (i = 0; i < ARRAY_SIZE(fixed_map); i++) { |
| 185 |
-- u32 ofs; |
| 186 |
-- |
| 187 |
-- if (addr < fixed_map[i].phys) |
| 188 |
-- continue; |
| 189 |
-- |
| 190 |
-- ofs = addr - fixed_map[i].phys; |
| 191 |
-- if (ofs > fixed_map[i].size) |
| 192 |
-- continue; |
| 193 |
-- |
| 194 |
-- return fixed_map[i].mapped + ofs; |
| 195 |
-- } |
| 196 |
-- |
| 197 |
-- if ((addr >= 0x18000000 && addr < 0x18c00000) || |
| 198 |
-- (addr >= 0x70000000 && addr < 0x78000000) || |
| 199 |
-- (addr >= 0x7c000000 && addr < 0x7c400000)) |
| 200 |
-- return mt7921_reg_map_l1(dev, addr); |
| 201 |
-- |
| 202 |
-- dev_err(dev->mt76.dev, "Access currently unsupported address %08x\n", |
| 203 |
-- addr); |
| 204 |
-- |
| 205 |
-- return 0; |
| 206 |
--} |
| 207 |
-- |
| 208 |
--static u32 mt7921_rr(struct mt76_dev *mdev, u32 offset) |
| 209 |
--{ |
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-- struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); |
| 211 |
-- u32 addr = __mt7921_reg_addr(dev, offset); |
| 212 |
-- |
| 213 |
-- return dev->bus_ops->rr(mdev, addr); |
| 214 |
--} |
| 215 |
-- |
| 216 |
--static void mt7921_wr(struct mt76_dev *mdev, u32 offset, u32 val) |
| 217 |
--{ |
| 218 |
-- struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); |
| 219 |
-- u32 addr = __mt7921_reg_addr(dev, offset); |
| 220 |
-- |
| 221 |
-- dev->bus_ops->wr(mdev, addr, val); |
| 222 |
--} |
| 223 |
-- |
| 224 |
--static u32 mt7921_rmw(struct mt76_dev *mdev, u32 offset, u32 mask, u32 val) |
| 225 |
--{ |
| 226 |
-- struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); |
| 227 |
-- u32 addr = __mt7921_reg_addr(dev, offset); |
| 228 |
-- |
| 229 |
-- return dev->bus_ops->rmw(mdev, addr, mask, val); |
| 230 |
--} |
| 231 |
-- |
| 232 |
- static int mt7921_dma_disable(struct mt7921_dev *dev, bool force) |
| 233 |
- { |
| 234 |
- if (force) { |
| 235 |
-@@ -341,23 +237,8 @@ int mt7921_wpdma_reinit_cond(struct mt7921_dev *dev) |
| 236 |
- |
| 237 |
- int mt7921_dma_init(struct mt7921_dev *dev) |
| 238 |
- { |
| 239 |
-- struct mt76_bus_ops *bus_ops; |
| 240 |
- int ret; |
| 241 |
- |
| 242 |
-- dev->phy.dev = dev; |
| 243 |
-- dev->phy.mt76 = &dev->mt76.phy; |
| 244 |
-- dev->mt76.phy.priv = &dev->phy; |
| 245 |
-- dev->bus_ops = dev->mt76.bus; |
| 246 |
-- bus_ops = devm_kmemdup(dev->mt76.dev, dev->bus_ops, sizeof(*bus_ops), |
| 247 |
-- GFP_KERNEL); |
| 248 |
-- if (!bus_ops) |
| 249 |
-- return -ENOMEM; |
| 250 |
-- |
| 251 |
-- bus_ops->rr = mt7921_rr; |
| 252 |
-- bus_ops->wr = mt7921_wr; |
| 253 |
-- bus_ops->rmw = mt7921_rmw; |
| 254 |
-- dev->mt76.bus = bus_ops; |
| 255 |
-- |
| 256 |
- mt76_dma_attach(&dev->mt76); |
| 257 |
- |
| 258 |
- ret = mt7921_dma_disable(dev, true); |
| 259 |
-diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/mt7921.h b/drivers/net/wireless/mediatek/mt76/mt7921/mt7921.h |
| 260 |
-index 8b674e042568..63e3c7ef5e89 100644 |
| 261 |
---- a/drivers/net/wireless/mediatek/mt76/mt7921/mt7921.h |
| 262 |
-+++ b/drivers/net/wireless/mediatek/mt76/mt7921/mt7921.h |
| 263 |
-@@ -443,6 +443,7 @@ int mt7921e_mcu_init(struct mt7921_dev *dev); |
| 264 |
- int mt7921s_wfsys_reset(struct mt7921_dev *dev); |
| 265 |
- int mt7921s_mac_reset(struct mt7921_dev *dev); |
| 266 |
- int mt7921s_init_reset(struct mt7921_dev *dev); |
| 267 |
-+int __mt7921e_mcu_drv_pmctrl(struct mt7921_dev *dev); |
| 268 |
- int mt7921e_mcu_drv_pmctrl(struct mt7921_dev *dev); |
| 269 |
- int mt7921e_mcu_fw_pmctrl(struct mt7921_dev *dev); |
| 270 |
- |
| 271 |
-diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/pci.c b/drivers/net/wireless/mediatek/mt76/mt7921/pci.c |
| 272 |
-index 1ae0d5826ca7..a0c82d19c4d9 100644 |
| 273 |
---- a/drivers/net/wireless/mediatek/mt76/mt7921/pci.c |
| 274 |
-+++ b/drivers/net/wireless/mediatek/mt76/mt7921/pci.c |
| 275 |
-@@ -121,6 +121,110 @@ static void mt7921e_unregister_device(struct mt7921_dev *dev) |
| 276 |
- mt76_free_device(&dev->mt76); |
| 277 |
- } |
| 278 |
- |
| 279 |
-+static u32 __mt7921_reg_addr(struct mt7921_dev *dev, u32 addr) |
| 280 |
-+{ |
| 281 |
-+ static const struct { |
| 282 |
-+ u32 phys; |
| 283 |
-+ u32 mapped; |
| 284 |
-+ u32 size; |
| 285 |
-+ } fixed_map[] = { |
| 286 |
-+ { 0x820d0000, 0x30000, 0x10000 }, /* WF_LMAC_TOP (WF_WTBLON) */ |
| 287 |
-+ { 0x820ed000, 0x24800, 0x0800 }, /* WF_LMAC_TOP BN0 (WF_MIB) */ |
| 288 |
-+ { 0x820e4000, 0x21000, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_TMAC) */ |
| 289 |
-+ { 0x820e7000, 0x21e00, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_DMA) */ |
| 290 |
-+ { 0x820eb000, 0x24200, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_LPON) */ |
| 291 |
-+ { 0x820e2000, 0x20800, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_AGG) */ |
| 292 |
-+ { 0x820e3000, 0x20c00, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_ARB) */ |
| 293 |
-+ { 0x820e5000, 0x21400, 0x0800 }, /* WF_LMAC_TOP BN0 (WF_RMAC) */ |
| 294 |
-+ { 0x00400000, 0x80000, 0x10000 }, /* WF_MCU_SYSRAM */ |
| 295 |
-+ { 0x00410000, 0x90000, 0x10000 }, /* WF_MCU_SYSRAM (configure register) */ |
| 296 |
-+ { 0x40000000, 0x70000, 0x10000 }, /* WF_UMAC_SYSRAM */ |
| 297 |
-+ { 0x54000000, 0x02000, 0x1000 }, /* WFDMA PCIE0 MCU DMA0 */ |
| 298 |
-+ { 0x55000000, 0x03000, 0x1000 }, /* WFDMA PCIE0 MCU DMA1 */ |
| 299 |
-+ { 0x58000000, 0x06000, 0x1000 }, /* WFDMA PCIE1 MCU DMA0 (MEM_DMA) */ |
| 300 |
-+ { 0x59000000, 0x07000, 0x1000 }, /* WFDMA PCIE1 MCU DMA1 */ |
| 301 |
-+ { 0x7c000000, 0xf0000, 0x10000 }, /* CONN_INFRA */ |
| 302 |
-+ { 0x7c020000, 0xd0000, 0x10000 }, /* CONN_INFRA, WFDMA */ |
| 303 |
-+ { 0x7c060000, 0xe0000, 0x10000 }, /* CONN_INFRA, conn_host_csr_top */ |
| 304 |
-+ { 0x80020000, 0xb0000, 0x10000 }, /* WF_TOP_MISC_OFF */ |
| 305 |
-+ { 0x81020000, 0xc0000, 0x10000 }, /* WF_TOP_MISC_ON */ |
| 306 |
-+ { 0x820c0000, 0x08000, 0x4000 }, /* WF_UMAC_TOP (PLE) */ |
| 307 |
-+ { 0x820c8000, 0x0c000, 0x2000 }, /* WF_UMAC_TOP (PSE) */ |
| 308 |
-+ { 0x820cc000, 0x0e000, 0x1000 }, /* WF_UMAC_TOP (PP) */ |
| 309 |
-+ { 0x820cd000, 0x0f000, 0x1000 }, /* WF_MDP_TOP */ |
| 310 |
-+ { 0x820ce000, 0x21c00, 0x0200 }, /* WF_LMAC_TOP (WF_SEC) */ |
| 311 |
-+ { 0x820cf000, 0x22000, 0x1000 }, /* WF_LMAC_TOP (WF_PF) */ |
| 312 |
-+ { 0x820e0000, 0x20000, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_CFG) */ |
| 313 |
-+ { 0x820e1000, 0x20400, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_TRB) */ |
| 314 |
-+ { 0x820e9000, 0x23400, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_WTBLOFF) */ |
| 315 |
-+ { 0x820ea000, 0x24000, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_ETBF) */ |
| 316 |
-+ { 0x820ec000, 0x24600, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_INT) */ |
| 317 |
-+ { 0x820f0000, 0xa0000, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_CFG) */ |
| 318 |
-+ { 0x820f1000, 0xa0600, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_TRB) */ |
| 319 |
-+ { 0x820f2000, 0xa0800, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_AGG) */ |
| 320 |
-+ { 0x820f3000, 0xa0c00, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_ARB) */ |
| 321 |
-+ { 0x820f4000, 0xa1000, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_TMAC) */ |
| 322 |
-+ { 0x820f5000, 0xa1400, 0x0800 }, /* WF_LMAC_TOP BN1 (WF_RMAC) */ |
| 323 |
-+ { 0x820f7000, 0xa1e00, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_DMA) */ |
| 324 |
-+ { 0x820f9000, 0xa3400, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_WTBLOFF) */ |
| 325 |
-+ { 0x820fa000, 0xa4000, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_ETBF) */ |
| 326 |
-+ { 0x820fb000, 0xa4200, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_LPON) */ |
| 327 |
-+ { 0x820fc000, 0xa4600, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_INT) */ |
| 328 |
-+ { 0x820fd000, 0xa4800, 0x0800 }, /* WF_LMAC_TOP BN1 (WF_MIB) */ |
| 329 |
-+ }; |
| 330 |
-+ int i; |
| 331 |
-+ |
| 332 |
-+ if (addr < 0x100000) |
| 333 |
-+ return addr; |
| 334 |
-+ |
| 335 |
-+ for (i = 0; i < ARRAY_SIZE(fixed_map); i++) { |
| 336 |
-+ u32 ofs; |
| 337 |
-+ |
| 338 |
-+ if (addr < fixed_map[i].phys) |
| 339 |
-+ continue; |
| 340 |
-+ |
| 341 |
-+ ofs = addr - fixed_map[i].phys; |
| 342 |
-+ if (ofs > fixed_map[i].size) |
| 343 |
-+ continue; |
| 344 |
-+ |
| 345 |
-+ return fixed_map[i].mapped + ofs; |
| 346 |
-+ } |
| 347 |
-+ |
| 348 |
-+ if ((addr >= 0x18000000 && addr < 0x18c00000) || |
| 349 |
-+ (addr >= 0x70000000 && addr < 0x78000000) || |
| 350 |
-+ (addr >= 0x7c000000 && addr < 0x7c400000)) |
| 351 |
-+ return mt7921_reg_map_l1(dev, addr); |
| 352 |
-+ |
| 353 |
-+ dev_err(dev->mt76.dev, "Access currently unsupported address %08x\n", |
| 354 |
-+ addr); |
| 355 |
-+ |
| 356 |
-+ return 0; |
| 357 |
-+} |
| 358 |
-+ |
| 359 |
-+static u32 mt7921_rr(struct mt76_dev *mdev, u32 offset) |
| 360 |
-+{ |
| 361 |
-+ struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); |
| 362 |
-+ u32 addr = __mt7921_reg_addr(dev, offset); |
| 363 |
-+ |
| 364 |
-+ return dev->bus_ops->rr(mdev, addr); |
| 365 |
-+} |
| 366 |
-+ |
| 367 |
-+static void mt7921_wr(struct mt76_dev *mdev, u32 offset, u32 val) |
| 368 |
-+{ |
| 369 |
-+ struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); |
| 370 |
-+ u32 addr = __mt7921_reg_addr(dev, offset); |
| 371 |
-+ |
| 372 |
-+ dev->bus_ops->wr(mdev, addr, val); |
| 373 |
-+} |
| 374 |
-+ |
| 375 |
-+static u32 mt7921_rmw(struct mt76_dev *mdev, u32 offset, u32 mask, u32 val) |
| 376 |
-+{ |
| 377 |
-+ struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); |
| 378 |
-+ u32 addr = __mt7921_reg_addr(dev, offset); |
| 379 |
-+ |
| 380 |
-+ return dev->bus_ops->rmw(mdev, addr, mask, val); |
| 381 |
-+} |
| 382 |
-+ |
| 383 |
- static int mt7921_pci_probe(struct pci_dev *pdev, |
| 384 |
- const struct pci_device_id *id) |
| 385 |
- { |
| 386 |
-@@ -152,6 +256,7 @@ static int mt7921_pci_probe(struct pci_dev *pdev, |
| 387 |
- .fw_own = mt7921e_mcu_fw_pmctrl, |
| 388 |
- }; |
| 389 |
- |
| 390 |
-+ struct mt76_bus_ops *bus_ops; |
| 391 |
- struct mt7921_dev *dev; |
| 392 |
- struct mt76_dev *mdev; |
| 393 |
- int ret; |
| 394 |
-@@ -189,6 +294,25 @@ static int mt7921_pci_probe(struct pci_dev *pdev, |
| 395 |
- |
| 396 |
- mt76_mmio_init(&dev->mt76, pcim_iomap_table(pdev)[0]); |
| 397 |
- tasklet_init(&dev->irq_tasklet, mt7921_irq_tasklet, (unsigned long)dev); |
| 398 |
-+ |
| 399 |
-+ dev->phy.dev = dev; |
| 400 |
-+ dev->phy.mt76 = &dev->mt76.phy; |
| 401 |
-+ dev->mt76.phy.priv = &dev->phy; |
| 402 |
-+ dev->bus_ops = dev->mt76.bus; |
| 403 |
-+ bus_ops = devm_kmemdup(dev->mt76.dev, dev->bus_ops, sizeof(*bus_ops), |
| 404 |
-+ GFP_KERNEL); |
| 405 |
-+ if (!bus_ops) |
| 406 |
-+ return -ENOMEM; |
| 407 |
-+ |
| 408 |
-+ bus_ops->rr = mt7921_rr; |
| 409 |
-+ bus_ops->wr = mt7921_wr; |
| 410 |
-+ bus_ops->rmw = mt7921_rmw; |
| 411 |
-+ dev->mt76.bus = bus_ops; |
| 412 |
-+ |
| 413 |
-+ ret = __mt7921e_mcu_drv_pmctrl(dev); |
| 414 |
-+ if (ret) |
| 415 |
-+ return ret; |
| 416 |
-+ |
| 417 |
- mdev->rev = (mt7921_l1_rr(dev, MT_HW_CHIPID) << 16) | |
| 418 |
- (mt7921_l1_rr(dev, MT_HW_REV) & 0xff); |
| 419 |
- dev_info(mdev->dev, "ASIC revision: %04x\n", mdev->rev); |
| 420 |
-diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/pci_mcu.c b/drivers/net/wireless/mediatek/mt76/mt7921/pci_mcu.c |
| 421 |
-index f9e350b67fdc..36669e5aeef3 100644 |
| 422 |
---- a/drivers/net/wireless/mediatek/mt76/mt7921/pci_mcu.c |
| 423 |
-+++ b/drivers/net/wireless/mediatek/mt76/mt7921/pci_mcu.c |
| 424 |
-@@ -59,10 +59,8 @@ int mt7921e_mcu_init(struct mt7921_dev *dev) |
| 425 |
- return err; |
| 426 |
- } |
| 427 |
- |
| 428 |
--int mt7921e_mcu_drv_pmctrl(struct mt7921_dev *dev) |
| 429 |
-+int __mt7921e_mcu_drv_pmctrl(struct mt7921_dev *dev) |
| 430 |
- { |
| 431 |
-- struct mt76_phy *mphy = &dev->mt76.phy; |
| 432 |
-- struct mt76_connac_pm *pm = &dev->pm; |
| 433 |
- int i, err = 0; |
| 434 |
- |
| 435 |
- for (i = 0; i < MT7921_DRV_OWN_RETRY_COUNT; i++) { |
| 436 |
-@@ -75,9 +73,21 @@ int mt7921e_mcu_drv_pmctrl(struct mt7921_dev *dev) |
| 437 |
- if (i == MT7921_DRV_OWN_RETRY_COUNT) { |
| 438 |
- dev_err(dev->mt76.dev, "driver own failed\n"); |
| 439 |
- err = -EIO; |
| 440 |
-- goto out; |
| 441 |
- } |
| 442 |
- |
| 443 |
-+ return err; |
| 444 |
-+} |
| 445 |
-+ |
| 446 |
-+int mt7921e_mcu_drv_pmctrl(struct mt7921_dev *dev) |
| 447 |
-+{ |
| 448 |
-+ struct mt76_phy *mphy = &dev->mt76.phy; |
| 449 |
-+ struct mt76_connac_pm *pm = &dev->pm; |
| 450 |
-+ int err; |
| 451 |
-+ |
| 452 |
-+ err = __mt7921e_mcu_drv_pmctrl(dev); |
| 453 |
-+ if (err < 0) |
| 454 |
-+ goto out; |
| 455 |
-+ |
| 456 |
- mt7921_wpdma_reinit_cond(dev); |
| 457 |
- clear_bit(MT76_STATE_PM, &mphy->state); |
| 458 |
- |
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