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commit: ba205b2adcbb5f1df739bcfaa5502cb8304108e4 |
2 |
Author: Mike Pagano <mpagano <AT> gentoo <DOT> org> |
3 |
AuthorDate: Mon Jul 19 11:16:07 2021 +0000 |
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Commit: Mike Pagano <mpagano <AT> gentoo <DOT> org> |
5 |
CommitDate: Mon Jul 19 11:16:07 2021 +0000 |
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URL: https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=ba205b2a |
7 |
|
8 |
Linux patch 5.12.18 |
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|
10 |
Signed-off-by: Mike Pagano <mpagano <AT> gentoo.org> |
11 |
|
12 |
0000_README | 4 + |
13 |
1017_linux-5.12.18.patch | 11124 +++++++++++++++++++++++++++++++++++++++++++++ |
14 |
2 files changed, 11128 insertions(+) |
15 |
|
16 |
diff --git a/0000_README b/0000_README |
17 |
index 10634ea..15e30b2 100644 |
18 |
--- a/0000_README |
19 |
+++ b/0000_README |
20 |
@@ -111,6 +111,10 @@ Patch: 1016_linux-5.12.17.patch |
21 |
From: http://www.kernel.org |
22 |
Desc: Linux 5.12.17 |
23 |
|
24 |
+Patch: 1017_linux-5.12.18.patch |
25 |
+From: http://www.kernel.org |
26 |
+Desc: Linux 5.12.18 |
27 |
+ |
28 |
Patch: 1500_XATTR_USER_PREFIX.patch |
29 |
From: https://bugs.gentoo.org/show_bug.cgi?id=470644 |
30 |
Desc: Support for namespace user.pax.* on tmpfs. |
31 |
|
32 |
diff --git a/1017_linux-5.12.18.patch b/1017_linux-5.12.18.patch |
33 |
new file mode 100644 |
34 |
index 0000000..31b4fe1 |
35 |
--- /dev/null |
36 |
+++ b/1017_linux-5.12.18.patch |
37 |
@@ -0,0 +1,11124 @@ |
38 |
+diff --git a/Documentation/Makefile b/Documentation/Makefile |
39 |
+index 9c42dde97671f..c3feb657b6548 100644 |
40 |
+--- a/Documentation/Makefile |
41 |
++++ b/Documentation/Makefile |
42 |
+@@ -76,7 +76,7 @@ quiet_cmd_sphinx = SPHINX $@ --> file://$(abspath $(BUILDDIR)/$3/$4) |
43 |
+ PYTHONDONTWRITEBYTECODE=1 \ |
44 |
+ BUILDDIR=$(abspath $(BUILDDIR)) SPHINX_CONF=$(abspath $(srctree)/$(src)/$5/$(SPHINX_CONF)) \ |
45 |
+ $(PYTHON3) $(srctree)/scripts/jobserver-exec \ |
46 |
+- $(SHELL) $(srctree)/Documentation/sphinx/parallel-wrapper.sh \ |
47 |
++ $(CONFIG_SHELL) $(srctree)/Documentation/sphinx/parallel-wrapper.sh \ |
48 |
+ $(SPHINXBUILD) \ |
49 |
+ -b $2 \ |
50 |
+ -c $(abspath $(srctree)/$(src)) \ |
51 |
+diff --git a/Makefile b/Makefile |
52 |
+index f1d0775925cc6..b708d7c665e12 100644 |
53 |
+--- a/Makefile |
54 |
++++ b/Makefile |
55 |
+@@ -1,7 +1,7 @@ |
56 |
+ # SPDX-License-Identifier: GPL-2.0 |
57 |
+ VERSION = 5 |
58 |
+ PATCHLEVEL = 12 |
59 |
+-SUBLEVEL = 17 |
60 |
++SUBLEVEL = 18 |
61 |
+ EXTRAVERSION = |
62 |
+ NAME = Frozen Wasteland |
63 |
+ |
64 |
+diff --git a/arch/alpha/include/uapi/asm/socket.h b/arch/alpha/include/uapi/asm/socket.h |
65 |
+index 57420356ce4c1..6b3daba60987e 100644 |
66 |
+--- a/arch/alpha/include/uapi/asm/socket.h |
67 |
++++ b/arch/alpha/include/uapi/asm/socket.h |
68 |
+@@ -127,6 +127,8 @@ |
69 |
+ #define SO_PREFER_BUSY_POLL 69 |
70 |
+ #define SO_BUSY_POLL_BUDGET 70 |
71 |
+ |
72 |
++#define SO_NETNS_COOKIE 71 |
73 |
++ |
74 |
+ #if !defined(__KERNEL__) |
75 |
+ |
76 |
+ #if __BITS_PER_LONG == 64 |
77 |
+diff --git a/arch/arm64/include/asm/tlb.h b/arch/arm64/include/asm/tlb.h |
78 |
+index 61c97d3b58c70..c995d1f4594f6 100644 |
79 |
+--- a/arch/arm64/include/asm/tlb.h |
80 |
++++ b/arch/arm64/include/asm/tlb.h |
81 |
+@@ -28,6 +28,10 @@ static void tlb_flush(struct mmu_gather *tlb); |
82 |
+ */ |
83 |
+ static inline int tlb_get_level(struct mmu_gather *tlb) |
84 |
+ { |
85 |
++ /* The TTL field is only valid for the leaf entry. */ |
86 |
++ if (tlb->freed_tables) |
87 |
++ return 0; |
88 |
++ |
89 |
+ if (tlb->cleared_ptes && !(tlb->cleared_pmds || |
90 |
+ tlb->cleared_puds || |
91 |
+ tlb->cleared_p4ds)) |
92 |
+diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig |
93 |
+index e89d63cd92d10..ab73622b14dd6 100644 |
94 |
+--- a/arch/mips/Kconfig |
95 |
++++ b/arch/mips/Kconfig |
96 |
+@@ -425,6 +425,8 @@ config MACH_INGENIC_SOC |
97 |
+ select MIPS_GENERIC |
98 |
+ select MACH_INGENIC |
99 |
+ select SYS_SUPPORTS_ZBOOT_UART16550 |
100 |
++ select CPU_SUPPORTS_CPUFREQ |
101 |
++ select MIPS_EXTERNAL_TIMER |
102 |
+ |
103 |
+ config LANTIQ |
104 |
+ bool "Lantiq based platforms" |
105 |
+diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts |
106 |
+index 8877c62609de5..3a4eaf1f3f487 100644 |
107 |
+--- a/arch/mips/boot/dts/ingenic/ci20.dts |
108 |
++++ b/arch/mips/boot/dts/ingenic/ci20.dts |
109 |
+@@ -525,10 +525,10 @@ |
110 |
+ |
111 |
+ &tcu { |
112 |
+ /* |
113 |
+- * 750 kHz for the system timer and 3 MHz for the clocksource, |
114 |
++ * 750 kHz for the system timer and clocksource, |
115 |
+ * use channel #0 for the system timer, #1 for the clocksource. |
116 |
+ */ |
117 |
+ assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>, |
118 |
+ <&tcu TCU_CLK_OST>; |
119 |
+- assigned-clock-rates = <750000>, <3000000>, <3000000>; |
120 |
++ assigned-clock-rates = <750000>, <750000>, <3000000>; |
121 |
+ }; |
122 |
+diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h |
123 |
+index 336e02b3b3cea..3d71081afc55f 100644 |
124 |
+--- a/arch/mips/include/asm/cpu-features.h |
125 |
++++ b/arch/mips/include/asm/cpu-features.h |
126 |
+@@ -64,6 +64,8 @@ |
127 |
+ ((MIPS_ISA_REV >= (ge)) && (MIPS_ISA_REV < (lt))) |
128 |
+ #define __isa_range_or_flag(ge, lt, flag) \ |
129 |
+ (__isa_range(ge, lt) || ((MIPS_ISA_REV < (lt)) && __isa(flag))) |
130 |
++#define __isa_range_and_ase(ge, lt, ase) \ |
131 |
++ (__isa_range(ge, lt) && __ase(ase)) |
132 |
+ |
133 |
+ /* |
134 |
+ * SMP assumption: Options of CPU 0 are a superset of all processors. |
135 |
+@@ -421,7 +423,7 @@ |
136 |
+ #endif |
137 |
+ |
138 |
+ #ifndef cpu_has_mipsmt |
139 |
+-#define cpu_has_mipsmt __isa_lt_and_ase(6, MIPS_ASE_MIPSMT) |
140 |
++#define cpu_has_mipsmt __isa_range_and_ase(2, 6, MIPS_ASE_MIPSMT) |
141 |
+ #endif |
142 |
+ |
143 |
+ #ifndef cpu_has_vp |
144 |
+diff --git a/arch/mips/include/asm/hugetlb.h b/arch/mips/include/asm/hugetlb.h |
145 |
+index 10e3be870df78..c2144409c0c40 100644 |
146 |
+--- a/arch/mips/include/asm/hugetlb.h |
147 |
++++ b/arch/mips/include/asm/hugetlb.h |
148 |
+@@ -46,7 +46,13 @@ static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm, |
149 |
+ static inline void huge_ptep_clear_flush(struct vm_area_struct *vma, |
150 |
+ unsigned long addr, pte_t *ptep) |
151 |
+ { |
152 |
+- flush_tlb_page(vma, addr & huge_page_mask(hstate_vma(vma))); |
153 |
++ /* |
154 |
++ * clear the huge pte entry firstly, so that the other smp threads will |
155 |
++ * not get old pte entry after finishing flush_tlb_page and before |
156 |
++ * setting new huge pte entry |
157 |
++ */ |
158 |
++ huge_ptep_get_and_clear(vma->vm_mm, addr, ptep); |
159 |
++ flush_tlb_page(vma, addr); |
160 |
+ } |
161 |
+ |
162 |
+ #define __HAVE_ARCH_HUGE_PTE_NONE |
163 |
+diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h |
164 |
+index 9c8099a6ffed1..acdf8c69220b0 100644 |
165 |
+--- a/arch/mips/include/asm/mipsregs.h |
166 |
++++ b/arch/mips/include/asm/mipsregs.h |
167 |
+@@ -2077,7 +2077,7 @@ _ASM_MACRO_0(tlbginvf, _ASM_INSN_IF_MIPS(0x4200000c) |
168 |
+ ({ int __res; \ |
169 |
+ __asm__ __volatile__( \ |
170 |
+ ".set\tpush\n\t" \ |
171 |
+- ".set\tmips32r2\n\t" \ |
172 |
++ ".set\tmips32r5\n\t" \ |
173 |
+ _ASM_SET_VIRT \ |
174 |
+ "mfgc0\t%0, " #source ", %1\n\t" \ |
175 |
+ ".set\tpop" \ |
176 |
+@@ -2090,7 +2090,7 @@ _ASM_MACRO_0(tlbginvf, _ASM_INSN_IF_MIPS(0x4200000c) |
177 |
+ ({ unsigned long long __res; \ |
178 |
+ __asm__ __volatile__( \ |
179 |
+ ".set\tpush\n\t" \ |
180 |
+- ".set\tmips64r2\n\t" \ |
181 |
++ ".set\tmips64r5\n\t" \ |
182 |
+ _ASM_SET_VIRT \ |
183 |
+ "dmfgc0\t%0, " #source ", %1\n\t" \ |
184 |
+ ".set\tpop" \ |
185 |
+@@ -2103,7 +2103,7 @@ _ASM_MACRO_0(tlbginvf, _ASM_INSN_IF_MIPS(0x4200000c) |
186 |
+ do { \ |
187 |
+ __asm__ __volatile__( \ |
188 |
+ ".set\tpush\n\t" \ |
189 |
+- ".set\tmips32r2\n\t" \ |
190 |
++ ".set\tmips32r5\n\t" \ |
191 |
+ _ASM_SET_VIRT \ |
192 |
+ "mtgc0\t%z0, " #register ", %1\n\t" \ |
193 |
+ ".set\tpop" \ |
194 |
+@@ -2115,7 +2115,7 @@ do { \ |
195 |
+ do { \ |
196 |
+ __asm__ __volatile__( \ |
197 |
+ ".set\tpush\n\t" \ |
198 |
+- ".set\tmips64r2\n\t" \ |
199 |
++ ".set\tmips64r5\n\t" \ |
200 |
+ _ASM_SET_VIRT \ |
201 |
+ "dmtgc0\t%z0, " #register ", %1\n\t" \ |
202 |
+ ".set\tpop" \ |
203 |
+diff --git a/arch/mips/include/asm/pgalloc.h b/arch/mips/include/asm/pgalloc.h |
204 |
+index 8b18424b31208..d0cf997b4ba84 100644 |
205 |
+--- a/arch/mips/include/asm/pgalloc.h |
206 |
++++ b/arch/mips/include/asm/pgalloc.h |
207 |
+@@ -59,11 +59,15 @@ do { \ |
208 |
+ |
209 |
+ static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address) |
210 |
+ { |
211 |
+- pmd_t *pmd; |
212 |
++ pmd_t *pmd = NULL; |
213 |
++ struct page *pg; |
214 |
+ |
215 |
+- pmd = (pmd_t *) __get_free_pages(GFP_KERNEL, PMD_ORDER); |
216 |
+- if (pmd) |
217 |
++ pg = alloc_pages(GFP_KERNEL | __GFP_ACCOUNT, PMD_ORDER); |
218 |
++ if (pg) { |
219 |
++ pgtable_pmd_page_ctor(pg); |
220 |
++ pmd = (pmd_t *)page_address(pg); |
221 |
+ pmd_init((unsigned long)pmd, (unsigned long)invalid_pte_table); |
222 |
++ } |
223 |
+ return pmd; |
224 |
+ } |
225 |
+ |
226 |
+diff --git a/arch/mips/include/uapi/asm/socket.h b/arch/mips/include/uapi/asm/socket.h |
227 |
+index 2d949969313b6..cdf404a831b25 100644 |
228 |
+--- a/arch/mips/include/uapi/asm/socket.h |
229 |
++++ b/arch/mips/include/uapi/asm/socket.h |
230 |
+@@ -138,6 +138,8 @@ |
231 |
+ #define SO_PREFER_BUSY_POLL 69 |
232 |
+ #define SO_BUSY_POLL_BUDGET 70 |
233 |
+ |
234 |
++#define SO_NETNS_COOKIE 71 |
235 |
++ |
236 |
+ #if !defined(__KERNEL__) |
237 |
+ |
238 |
+ #if __BITS_PER_LONG == 64 |
239 |
+diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c |
240 |
+index 0ef240adefb59..630fcb4cb30e7 100644 |
241 |
+--- a/arch/mips/kernel/cpu-probe.c |
242 |
++++ b/arch/mips/kernel/cpu-probe.c |
243 |
+@@ -1840,6 +1840,11 @@ static inline void cpu_probe_ingenic(struct cpuinfo_mips *c, unsigned int cpu) |
244 |
+ */ |
245 |
+ case PRID_COMP_INGENIC_D0: |
246 |
+ c->isa_level &= ~MIPS_CPU_ISA_M32R2; |
247 |
++ |
248 |
++ /* FPU is not properly detected on JZ4760(B). */ |
249 |
++ if (c->processor_id == 0x2ed0024f) |
250 |
++ c->options |= MIPS_CPU_FPU; |
251 |
++ |
252 |
+ fallthrough; |
253 |
+ |
254 |
+ /* |
255 |
+diff --git a/arch/mips/loongson64/numa.c b/arch/mips/loongson64/numa.c |
256 |
+index a8f57bf012854..a791863ed352f 100644 |
257 |
+--- a/arch/mips/loongson64/numa.c |
258 |
++++ b/arch/mips/loongson64/numa.c |
259 |
+@@ -118,6 +118,9 @@ static void __init node_mem_init(unsigned int node) |
260 |
+ if (node_end_pfn(0) >= (0xffffffff >> PAGE_SHIFT)) |
261 |
+ memblock_reserve((node_addrspace_offset | 0xfe000000), |
262 |
+ 32 << 20); |
263 |
++ |
264 |
++ /* Reserve pfn range 0~node[0]->node_start_pfn */ |
265 |
++ memblock_reserve(0, PAGE_SIZE * start_pfn); |
266 |
+ } |
267 |
+ } |
268 |
+ |
269 |
+diff --git a/arch/parisc/include/uapi/asm/socket.h b/arch/parisc/include/uapi/asm/socket.h |
270 |
+index f60904329bbcc..5b5351cdcb338 100644 |
271 |
+--- a/arch/parisc/include/uapi/asm/socket.h |
272 |
++++ b/arch/parisc/include/uapi/asm/socket.h |
273 |
+@@ -119,6 +119,8 @@ |
274 |
+ #define SO_PREFER_BUSY_POLL 0x4043 |
275 |
+ #define SO_BUSY_POLL_BUDGET 0x4044 |
276 |
+ |
277 |
++#define SO_NETNS_COOKIE 0x4045 |
278 |
++ |
279 |
+ #if !defined(__KERNEL__) |
280 |
+ |
281 |
+ #if __BITS_PER_LONG == 64 |
282 |
+diff --git a/arch/powerpc/include/asm/barrier.h b/arch/powerpc/include/asm/barrier.h |
283 |
+index aecfde829d5da..6274b864f363d 100644 |
284 |
+--- a/arch/powerpc/include/asm/barrier.h |
285 |
++++ b/arch/powerpc/include/asm/barrier.h |
286 |
+@@ -46,6 +46,8 @@ |
287 |
+ # define SMPWMB eieio |
288 |
+ #endif |
289 |
+ |
290 |
++/* clang defines this macro for a builtin, which will not work with runtime patching */ |
291 |
++#undef __lwsync |
292 |
+ #define __lwsync() __asm__ __volatile__ (stringify_in_c(LWSYNC) : : :"memory") |
293 |
+ #define dma_rmb() __lwsync() |
294 |
+ #define dma_wmb() __asm__ __volatile__ (stringify_in_c(SMPWMB) : : :"memory") |
295 |
+diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c |
296 |
+index bb368257b55cb..178525cf686a5 100644 |
297 |
+--- a/arch/powerpc/mm/fault.c |
298 |
++++ b/arch/powerpc/mm/fault.c |
299 |
+@@ -199,9 +199,7 @@ static bool bad_kernel_fault(struct pt_regs *regs, unsigned long error_code, |
300 |
+ { |
301 |
+ int is_exec = TRAP(regs) == 0x400; |
302 |
+ |
303 |
+- /* NX faults set DSISR_PROTFAULT on the 8xx, DSISR_NOEXEC_OR_G on others */ |
304 |
+- if (is_exec && (error_code & (DSISR_NOEXEC_OR_G | DSISR_KEYFAULT | |
305 |
+- DSISR_PROTFAULT))) { |
306 |
++ if (is_exec) { |
307 |
+ pr_crit_ratelimited("kernel tried to execute %s page (%lx) - exploit attempt? (uid: %d)\n", |
308 |
+ address >= TASK_SIZE ? "exec-protected" : "user", |
309 |
+ address, |
310 |
+diff --git a/arch/powerpc/platforms/powernv/vas-window.c b/arch/powerpc/platforms/powernv/vas-window.c |
311 |
+index 5f5fe63a3d1ce..7ba0840fc3b55 100644 |
312 |
+--- a/arch/powerpc/platforms/powernv/vas-window.c |
313 |
++++ b/arch/powerpc/platforms/powernv/vas-window.c |
314 |
+@@ -1093,9 +1093,9 @@ struct vas_window *vas_tx_win_open(int vasid, enum vas_cop_type cop, |
315 |
+ /* |
316 |
+ * Process closes window during exit. In the case of |
317 |
+ * multithread application, the child thread can open |
318 |
+- * window and can exit without closing it. Expects parent |
319 |
+- * thread to use and close the window. So do not need |
320 |
+- * to take pid reference for parent thread. |
321 |
++ * window and can exit without closing it. so takes tgid |
322 |
++ * reference until window closed to make sure tgid is not |
323 |
++ * reused. |
324 |
+ */ |
325 |
+ txwin->tgid = find_get_pid(task_tgid_vnr(current)); |
326 |
+ /* |
327 |
+@@ -1339,8 +1339,9 @@ int vas_win_close(struct vas_window *window) |
328 |
+ /* if send window, drop reference to matching receive window */ |
329 |
+ if (window->tx_win) { |
330 |
+ if (window->user_win) { |
331 |
+- /* Drop references to pid and mm */ |
332 |
++ /* Drop references to pid. tgid and mm */ |
333 |
+ put_pid(window->pid); |
334 |
++ put_pid(window->tgid); |
335 |
+ if (window->mm) { |
336 |
+ mm_context_remove_vas_window(window->mm); |
337 |
+ mmdrop(window->mm); |
338 |
+diff --git a/arch/sparc/include/uapi/asm/socket.h b/arch/sparc/include/uapi/asm/socket.h |
339 |
+index 848a22fbac20e..92675dc380fa2 100644 |
340 |
+--- a/arch/sparc/include/uapi/asm/socket.h |
341 |
++++ b/arch/sparc/include/uapi/asm/socket.h |
342 |
+@@ -120,6 +120,8 @@ |
343 |
+ #define SO_PREFER_BUSY_POLL 0x0048 |
344 |
+ #define SO_BUSY_POLL_BUDGET 0x0049 |
345 |
+ |
346 |
++#define SO_NETNS_COOKIE 0x0050 |
347 |
++ |
348 |
+ #if !defined(__KERNEL__) |
349 |
+ |
350 |
+ |
351 |
+diff --git a/block/blk-rq-qos.c b/block/blk-rq-qos.c |
352 |
+index 656460636ad34..e83af7bc75919 100644 |
353 |
+--- a/block/blk-rq-qos.c |
354 |
++++ b/block/blk-rq-qos.c |
355 |
+@@ -266,8 +266,8 @@ void rq_qos_wait(struct rq_wait *rqw, void *private_data, |
356 |
+ if (!has_sleeper && acquire_inflight_cb(rqw, private_data)) |
357 |
+ return; |
358 |
+ |
359 |
+- prepare_to_wait_exclusive(&rqw->wait, &data.wq, TASK_UNINTERRUPTIBLE); |
360 |
+- has_sleeper = !wq_has_single_sleeper(&rqw->wait); |
361 |
++ has_sleeper = !prepare_to_wait_exclusive(&rqw->wait, &data.wq, |
362 |
++ TASK_UNINTERRUPTIBLE); |
363 |
+ do { |
364 |
+ /* The memory barrier in set_task_state saves us here. */ |
365 |
+ if (data.got_token) |
366 |
+diff --git a/drivers/ata/ahci_sunxi.c b/drivers/ata/ahci_sunxi.c |
367 |
+index cb69b737cb499..56b695136977a 100644 |
368 |
+--- a/drivers/ata/ahci_sunxi.c |
369 |
++++ b/drivers/ata/ahci_sunxi.c |
370 |
+@@ -200,7 +200,7 @@ static void ahci_sunxi_start_engine(struct ata_port *ap) |
371 |
+ } |
372 |
+ |
373 |
+ static const struct ata_port_info ahci_sunxi_port_info = { |
374 |
+- .flags = AHCI_FLAG_COMMON | ATA_FLAG_NCQ, |
375 |
++ .flags = AHCI_FLAG_COMMON | ATA_FLAG_NCQ | ATA_FLAG_NO_DIPM, |
376 |
+ .pio_mask = ATA_PIO4, |
377 |
+ .udma_mask = ATA_UDMA6, |
378 |
+ .port_ops = &ahci_platform_ops, |
379 |
+diff --git a/drivers/atm/iphase.c b/drivers/atm/iphase.c |
380 |
+index eef637fd90b32..a59554e5b8b0f 100644 |
381 |
+--- a/drivers/atm/iphase.c |
382 |
++++ b/drivers/atm/iphase.c |
383 |
+@@ -3279,7 +3279,7 @@ static void __exit ia_module_exit(void) |
384 |
+ { |
385 |
+ pci_unregister_driver(&ia_driver); |
386 |
+ |
387 |
+- del_timer(&ia_timer); |
388 |
++ del_timer_sync(&ia_timer); |
389 |
+ } |
390 |
+ |
391 |
+ module_init(ia_module_init); |
392 |
+diff --git a/drivers/atm/nicstar.c b/drivers/atm/nicstar.c |
393 |
+index 5c7e4df159b91..bc5a6ab6fa4b4 100644 |
394 |
+--- a/drivers/atm/nicstar.c |
395 |
++++ b/drivers/atm/nicstar.c |
396 |
+@@ -299,7 +299,7 @@ static void __exit nicstar_cleanup(void) |
397 |
+ { |
398 |
+ XPRINTK("nicstar: nicstar_cleanup() called.\n"); |
399 |
+ |
400 |
+- del_timer(&ns_timer); |
401 |
++ del_timer_sync(&ns_timer); |
402 |
+ |
403 |
+ pci_unregister_driver(&nicstar_driver); |
404 |
+ |
405 |
+@@ -527,6 +527,15 @@ static int ns_init_card(int i, struct pci_dev *pcidev) |
406 |
+ /* Set the VPI/VCI MSb mask to zero so we can receive OAM cells */ |
407 |
+ writel(0x00000000, card->membase + VPM); |
408 |
+ |
409 |
++ card->intcnt = 0; |
410 |
++ if (request_irq |
411 |
++ (pcidev->irq, &ns_irq_handler, IRQF_SHARED, "nicstar", card) != 0) { |
412 |
++ pr_err("nicstar%d: can't allocate IRQ %d.\n", i, pcidev->irq); |
413 |
++ error = 9; |
414 |
++ ns_init_card_error(card, error); |
415 |
++ return error; |
416 |
++ } |
417 |
++ |
418 |
+ /* Initialize TSQ */ |
419 |
+ card->tsq.org = dma_alloc_coherent(&card->pcidev->dev, |
420 |
+ NS_TSQSIZE + NS_TSQ_ALIGNMENT, |
421 |
+@@ -753,15 +762,6 @@ static int ns_init_card(int i, struct pci_dev *pcidev) |
422 |
+ |
423 |
+ card->efbie = 1; |
424 |
+ |
425 |
+- card->intcnt = 0; |
426 |
+- if (request_irq |
427 |
+- (pcidev->irq, &ns_irq_handler, IRQF_SHARED, "nicstar", card) != 0) { |
428 |
+- printk("nicstar%d: can't allocate IRQ %d.\n", i, pcidev->irq); |
429 |
+- error = 9; |
430 |
+- ns_init_card_error(card, error); |
431 |
+- return error; |
432 |
+- } |
433 |
+- |
434 |
+ /* Register device */ |
435 |
+ card->atmdev = atm_dev_register("nicstar", &card->pcidev->dev, &atm_ops, |
436 |
+ -1, NULL); |
437 |
+@@ -839,10 +839,12 @@ static void ns_init_card_error(ns_dev *card, int error) |
438 |
+ dev_kfree_skb_any(hb); |
439 |
+ } |
440 |
+ if (error >= 12) { |
441 |
+- kfree(card->rsq.org); |
442 |
++ dma_free_coherent(&card->pcidev->dev, NS_RSQSIZE + NS_RSQ_ALIGNMENT, |
443 |
++ card->rsq.org, card->rsq.dma); |
444 |
+ } |
445 |
+ if (error >= 11) { |
446 |
+- kfree(card->tsq.org); |
447 |
++ dma_free_coherent(&card->pcidev->dev, NS_TSQSIZE + NS_TSQ_ALIGNMENT, |
448 |
++ card->tsq.org, card->tsq.dma); |
449 |
+ } |
450 |
+ if (error >= 10) { |
451 |
+ free_irq(card->pcidev->irq, card); |
452 |
+diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c |
453 |
+index ddc7b86725cd7..a97e5c476adf1 100644 |
454 |
+--- a/drivers/bluetooth/btusb.c |
455 |
++++ b/drivers/bluetooth/btusb.c |
456 |
+@@ -270,6 +270,8 @@ static const struct usb_device_id blacklist_table[] = { |
457 |
+ BTUSB_WIDEBAND_SPEECH }, |
458 |
+ { USB_DEVICE(0x0cf3, 0xe360), .driver_info = BTUSB_QCA_ROME | |
459 |
+ BTUSB_WIDEBAND_SPEECH }, |
460 |
++ { USB_DEVICE(0x0cf3, 0xe500), .driver_info = BTUSB_QCA_ROME | |
461 |
++ BTUSB_WIDEBAND_SPEECH }, |
462 |
+ { USB_DEVICE(0x0489, 0xe092), .driver_info = BTUSB_QCA_ROME | |
463 |
+ BTUSB_WIDEBAND_SPEECH }, |
464 |
+ { USB_DEVICE(0x0489, 0xe09f), .driver_info = BTUSB_QCA_ROME | |
465 |
+@@ -1747,6 +1749,13 @@ static void btusb_work(struct work_struct *work) |
466 |
+ * which work with WBS at all. |
467 |
+ */ |
468 |
+ new_alts = btusb_find_altsetting(data, 6) ? 6 : 1; |
469 |
++ /* Because mSBC frames do not need to be aligned to the |
470 |
++ * SCO packet boundary. If support the Alt 3, use the |
471 |
++ * Alt 3 for HCI payload >= 60 Bytes let air packet |
472 |
++ * data satisfy 60 bytes. |
473 |
++ */ |
474 |
++ if (new_alts == 1 && btusb_find_altsetting(data, 3)) |
475 |
++ new_alts = 3; |
476 |
+ } |
477 |
+ |
478 |
+ if (btusb_switch_alt_setting(hdev, new_alts) < 0) |
479 |
+@@ -3377,11 +3386,6 @@ static int btusb_mtk_hci_wmt_sync(struct hci_dev *hdev, |
480 |
+ struct btmtk_wmt_hdr *hdr; |
481 |
+ int err; |
482 |
+ |
483 |
+- /* Submit control IN URB on demand to process the WMT event */ |
484 |
+- err = btusb_mtk_submit_wmt_recv_urb(hdev); |
485 |
+- if (err < 0) |
486 |
+- return err; |
487 |
+- |
488 |
+ /* Send the WMT command and wait until the WMT event returns */ |
489 |
+ hlen = sizeof(*hdr) + wmt_params->dlen; |
490 |
+ if (hlen > 255) |
491 |
+@@ -3407,6 +3411,11 @@ static int btusb_mtk_hci_wmt_sync(struct hci_dev *hdev, |
492 |
+ goto err_free_wc; |
493 |
+ } |
494 |
+ |
495 |
++ /* Submit control IN URB on demand to process the WMT event */ |
496 |
++ err = btusb_mtk_submit_wmt_recv_urb(hdev); |
497 |
++ if (err < 0) |
498 |
++ return err; |
499 |
++ |
500 |
+ /* The vendor specific WMT commands are all answered by a vendor |
501 |
+ * specific event and will have the Command Status or Command |
502 |
+ * Complete as with usual HCI command flow control. |
503 |
+@@ -4127,6 +4136,11 @@ static int btusb_setup_qca_download_fw(struct hci_dev *hdev, |
504 |
+ sent += size; |
505 |
+ count -= size; |
506 |
+ |
507 |
++ /* ep2 need time to switch from function acl to function dfu, |
508 |
++ * so we add 20ms delay here. |
509 |
++ */ |
510 |
++ msleep(20); |
511 |
++ |
512 |
+ while (count) { |
513 |
+ size = min_t(size_t, count, QCA_DFU_PACKET_LEN); |
514 |
+ |
515 |
+@@ -4219,9 +4233,15 @@ static int btusb_setup_qca_load_nvm(struct hci_dev *hdev, |
516 |
+ int err; |
517 |
+ |
518 |
+ if (((ver->flag >> 8) & 0xff) == QCA_FLAG_MULTI_NVM) { |
519 |
+- snprintf(fwname, sizeof(fwname), "qca/nvm_usb_%08x_%04x.bin", |
520 |
+- le32_to_cpu(ver->rom_version), |
521 |
+- le16_to_cpu(ver->board_id)); |
522 |
++ /* if boardid equal 0, use default nvm without surfix */ |
523 |
++ if (le16_to_cpu(ver->board_id) == 0x0) { |
524 |
++ snprintf(fwname, sizeof(fwname), "qca/nvm_usb_%08x.bin", |
525 |
++ le32_to_cpu(ver->rom_version)); |
526 |
++ } else { |
527 |
++ snprintf(fwname, sizeof(fwname), "qca/nvm_usb_%08x_%04x.bin", |
528 |
++ le32_to_cpu(ver->rom_version), |
529 |
++ le16_to_cpu(ver->board_id)); |
530 |
++ } |
531 |
+ } else { |
532 |
+ snprintf(fwname, sizeof(fwname), "qca/nvm_usb_%08x.bin", |
533 |
+ le32_to_cpu(ver->rom_version)); |
534 |
+diff --git a/drivers/char/ipmi/ipmi_watchdog.c b/drivers/char/ipmi/ipmi_watchdog.c |
535 |
+index 32c334e34d553..e4ff3b50de7f3 100644 |
536 |
+--- a/drivers/char/ipmi/ipmi_watchdog.c |
537 |
++++ b/drivers/char/ipmi/ipmi_watchdog.c |
538 |
+@@ -371,16 +371,18 @@ static int __ipmi_set_timeout(struct ipmi_smi_msg *smi_msg, |
539 |
+ data[0] = 0; |
540 |
+ WDOG_SET_TIMER_USE(data[0], WDOG_TIMER_USE_SMS_OS); |
541 |
+ |
542 |
+- if ((ipmi_version_major > 1) |
543 |
+- || ((ipmi_version_major == 1) && (ipmi_version_minor >= 5))) { |
544 |
+- /* This is an IPMI 1.5-only feature. */ |
545 |
+- data[0] |= WDOG_DONT_STOP_ON_SET; |
546 |
+- } else if (ipmi_watchdog_state != WDOG_TIMEOUT_NONE) { |
547 |
+- /* |
548 |
+- * In ipmi 1.0, setting the timer stops the watchdog, we |
549 |
+- * need to start it back up again. |
550 |
+- */ |
551 |
+- hbnow = 1; |
552 |
++ if (ipmi_watchdog_state != WDOG_TIMEOUT_NONE) { |
553 |
++ if ((ipmi_version_major > 1) || |
554 |
++ ((ipmi_version_major == 1) && (ipmi_version_minor >= 5))) { |
555 |
++ /* This is an IPMI 1.5-only feature. */ |
556 |
++ data[0] |= WDOG_DONT_STOP_ON_SET; |
557 |
++ } else { |
558 |
++ /* |
559 |
++ * In ipmi 1.0, setting the timer stops the watchdog, we |
560 |
++ * need to start it back up again. |
561 |
++ */ |
562 |
++ hbnow = 1; |
563 |
++ } |
564 |
+ } |
565 |
+ |
566 |
+ data[1] = 0; |
567 |
+diff --git a/drivers/clk/renesas/r8a77995-cpg-mssr.c b/drivers/clk/renesas/r8a77995-cpg-mssr.c |
568 |
+index 9cfd00cf4e69a..81c0bc1e78af8 100644 |
569 |
+--- a/drivers/clk/renesas/r8a77995-cpg-mssr.c |
570 |
++++ b/drivers/clk/renesas/r8a77995-cpg-mssr.c |
571 |
+@@ -75,6 +75,7 @@ static const struct cpg_core_clk r8a77995_core_clks[] __initconst = { |
572 |
+ DEF_RATE(".oco", CLK_OCO, 8 * 1000 * 1000), |
573 |
+ |
574 |
+ /* Core Clock Outputs */ |
575 |
++ DEF_FIXED("za2", R8A77995_CLK_ZA2, CLK_PLL0D3, 2, 1), |
576 |
+ DEF_FIXED("z2", R8A77995_CLK_Z2, CLK_PLL0D3, 1, 1), |
577 |
+ DEF_FIXED("ztr", R8A77995_CLK_ZTR, CLK_PLL1, 6, 1), |
578 |
+ DEF_FIXED("zt", R8A77995_CLK_ZT, CLK_PLL1, 4, 1), |
579 |
+diff --git a/drivers/clk/renesas/rcar-usb2-clock-sel.c b/drivers/clk/renesas/rcar-usb2-clock-sel.c |
580 |
+index 3abafd78f7c8a..8b4e43659023a 100644 |
581 |
+--- a/drivers/clk/renesas/rcar-usb2-clock-sel.c |
582 |
++++ b/drivers/clk/renesas/rcar-usb2-clock-sel.c |
583 |
+@@ -128,10 +128,8 @@ static int rcar_usb2_clock_sel_resume(struct device *dev) |
584 |
+ static int rcar_usb2_clock_sel_remove(struct platform_device *pdev) |
585 |
+ { |
586 |
+ struct device *dev = &pdev->dev; |
587 |
+- struct usb2_clock_sel_priv *priv = platform_get_drvdata(pdev); |
588 |
+ |
589 |
+ of_clk_del_provider(dev->of_node); |
590 |
+- clk_hw_unregister(&priv->hw); |
591 |
+ pm_runtime_put(dev); |
592 |
+ pm_runtime_disable(dev); |
593 |
+ |
594 |
+@@ -164,9 +162,6 @@ static int rcar_usb2_clock_sel_probe(struct platform_device *pdev) |
595 |
+ if (IS_ERR(priv->rsts)) |
596 |
+ return PTR_ERR(priv->rsts); |
597 |
+ |
598 |
+- pm_runtime_enable(dev); |
599 |
+- pm_runtime_get_sync(dev); |
600 |
+- |
601 |
+ clk = devm_clk_get(dev, "usb_extal"); |
602 |
+ if (!IS_ERR(clk) && !clk_prepare_enable(clk)) { |
603 |
+ priv->extal = !!clk_get_rate(clk); |
604 |
+@@ -183,6 +178,8 @@ static int rcar_usb2_clock_sel_probe(struct platform_device *pdev) |
605 |
+ return -ENOENT; |
606 |
+ } |
607 |
+ |
608 |
++ pm_runtime_enable(dev); |
609 |
++ pm_runtime_get_sync(dev); |
610 |
+ platform_set_drvdata(pdev, priv); |
611 |
+ dev_set_drvdata(dev, priv); |
612 |
+ |
613 |
+@@ -193,11 +190,20 @@ static int rcar_usb2_clock_sel_probe(struct platform_device *pdev) |
614 |
+ init.num_parents = 0; |
615 |
+ priv->hw.init = &init; |
616 |
+ |
617 |
+- clk = clk_register(NULL, &priv->hw); |
618 |
+- if (IS_ERR(clk)) |
619 |
+- return PTR_ERR(clk); |
620 |
++ ret = devm_clk_hw_register(NULL, &priv->hw); |
621 |
++ if (ret) |
622 |
++ goto pm_put; |
623 |
++ |
624 |
++ ret = of_clk_add_hw_provider(np, of_clk_hw_simple_get, &priv->hw); |
625 |
++ if (ret) |
626 |
++ goto pm_put; |
627 |
++ |
628 |
++ return 0; |
629 |
+ |
630 |
+- return of_clk_add_hw_provider(np, of_clk_hw_simple_get, &priv->hw); |
631 |
++pm_put: |
632 |
++ pm_runtime_put(dev); |
633 |
++ pm_runtime_disable(dev); |
634 |
++ return ret; |
635 |
+ } |
636 |
+ |
637 |
+ static const struct dev_pm_ops rcar_usb2_clock_sel_pm_ops = { |
638 |
+diff --git a/drivers/clk/tegra/clk-periph-gate.c b/drivers/clk/tegra/clk-periph-gate.c |
639 |
+index 4b31beefc9fc2..dc3f92678407b 100644 |
640 |
+--- a/drivers/clk/tegra/clk-periph-gate.c |
641 |
++++ b/drivers/clk/tegra/clk-periph-gate.c |
642 |
+@@ -48,18 +48,9 @@ static int clk_periph_is_enabled(struct clk_hw *hw) |
643 |
+ return state; |
644 |
+ } |
645 |
+ |
646 |
+-static int clk_periph_enable(struct clk_hw *hw) |
647 |
++static void clk_periph_enable_locked(struct clk_hw *hw) |
648 |
+ { |
649 |
+ struct tegra_clk_periph_gate *gate = to_clk_periph_gate(hw); |
650 |
+- unsigned long flags = 0; |
651 |
+- |
652 |
+- spin_lock_irqsave(&periph_ref_lock, flags); |
653 |
+- |
654 |
+- gate->enable_refcnt[gate->clk_num]++; |
655 |
+- if (gate->enable_refcnt[gate->clk_num] > 1) { |
656 |
+- spin_unlock_irqrestore(&periph_ref_lock, flags); |
657 |
+- return 0; |
658 |
+- } |
659 |
+ |
660 |
+ write_enb_set(periph_clk_to_bit(gate), gate); |
661 |
+ udelay(2); |
662 |
+@@ -78,6 +69,32 @@ static int clk_periph_enable(struct clk_hw *hw) |
663 |
+ udelay(1); |
664 |
+ writel_relaxed(0, gate->clk_base + LVL2_CLK_GATE_OVRE); |
665 |
+ } |
666 |
++} |
667 |
++ |
668 |
++static void clk_periph_disable_locked(struct clk_hw *hw) |
669 |
++{ |
670 |
++ struct tegra_clk_periph_gate *gate = to_clk_periph_gate(hw); |
671 |
++ |
672 |
++ /* |
673 |
++ * If peripheral is in the APB bus then read the APB bus to |
674 |
++ * flush the write operation in apb bus. This will avoid the |
675 |
++ * peripheral access after disabling clock |
676 |
++ */ |
677 |
++ if (gate->flags & TEGRA_PERIPH_ON_APB) |
678 |
++ tegra_read_chipid(); |
679 |
++ |
680 |
++ write_enb_clr(periph_clk_to_bit(gate), gate); |
681 |
++} |
682 |
++ |
683 |
++static int clk_periph_enable(struct clk_hw *hw) |
684 |
++{ |
685 |
++ struct tegra_clk_periph_gate *gate = to_clk_periph_gate(hw); |
686 |
++ unsigned long flags = 0; |
687 |
++ |
688 |
++ spin_lock_irqsave(&periph_ref_lock, flags); |
689 |
++ |
690 |
++ if (!gate->enable_refcnt[gate->clk_num]++) |
691 |
++ clk_periph_enable_locked(hw); |
692 |
+ |
693 |
+ spin_unlock_irqrestore(&periph_ref_lock, flags); |
694 |
+ |
695 |
+@@ -91,21 +108,28 @@ static void clk_periph_disable(struct clk_hw *hw) |
696 |
+ |
697 |
+ spin_lock_irqsave(&periph_ref_lock, flags); |
698 |
+ |
699 |
+- gate->enable_refcnt[gate->clk_num]--; |
700 |
+- if (gate->enable_refcnt[gate->clk_num] > 0) { |
701 |
+- spin_unlock_irqrestore(&periph_ref_lock, flags); |
702 |
+- return; |
703 |
+- } |
704 |
++ WARN_ON(!gate->enable_refcnt[gate->clk_num]); |
705 |
++ |
706 |
++ if (--gate->enable_refcnt[gate->clk_num] == 0) |
707 |
++ clk_periph_disable_locked(hw); |
708 |
++ |
709 |
++ spin_unlock_irqrestore(&periph_ref_lock, flags); |
710 |
++} |
711 |
++ |
712 |
++static void clk_periph_disable_unused(struct clk_hw *hw) |
713 |
++{ |
714 |
++ struct tegra_clk_periph_gate *gate = to_clk_periph_gate(hw); |
715 |
++ unsigned long flags = 0; |
716 |
++ |
717 |
++ spin_lock_irqsave(&periph_ref_lock, flags); |
718 |
+ |
719 |
+ /* |
720 |
+- * If peripheral is in the APB bus then read the APB bus to |
721 |
+- * flush the write operation in apb bus. This will avoid the |
722 |
+- * peripheral access after disabling clock |
723 |
++ * Some clocks are duplicated and some of them are marked as critical, |
724 |
++ * like fuse and fuse_burn for example, thus the enable_refcnt will |
725 |
++ * be non-zero here if the "unused" duplicate is disabled by CCF. |
726 |
+ */ |
727 |
+- if (gate->flags & TEGRA_PERIPH_ON_APB) |
728 |
+- tegra_read_chipid(); |
729 |
+- |
730 |
+- write_enb_clr(periph_clk_to_bit(gate), gate); |
731 |
++ if (!gate->enable_refcnt[gate->clk_num]) |
732 |
++ clk_periph_disable_locked(hw); |
733 |
+ |
734 |
+ spin_unlock_irqrestore(&periph_ref_lock, flags); |
735 |
+ } |
736 |
+@@ -114,6 +138,7 @@ const struct clk_ops tegra_clk_periph_gate_ops = { |
737 |
+ .is_enabled = clk_periph_is_enabled, |
738 |
+ .enable = clk_periph_enable, |
739 |
+ .disable = clk_periph_disable, |
740 |
++ .disable_unused = clk_periph_disable_unused, |
741 |
+ }; |
742 |
+ |
743 |
+ struct clk *tegra_clk_register_periph_gate(const char *name, |
744 |
+@@ -148,9 +173,6 @@ struct clk *tegra_clk_register_periph_gate(const char *name, |
745 |
+ gate->enable_refcnt = enable_refcnt; |
746 |
+ gate->regs = pregs; |
747 |
+ |
748 |
+- if (read_enb(gate) & periph_clk_to_bit(gate)) |
749 |
+- enable_refcnt[clk_num]++; |
750 |
+- |
751 |
+ /* Data in .init is copied by clk_register(), so stack variable OK */ |
752 |
+ gate->hw.init = &init; |
753 |
+ |
754 |
+diff --git a/drivers/clk/tegra/clk-periph.c b/drivers/clk/tegra/clk-periph.c |
755 |
+index 67620c7ecd9ee..79ca3aa072b70 100644 |
756 |
+--- a/drivers/clk/tegra/clk-periph.c |
757 |
++++ b/drivers/clk/tegra/clk-periph.c |
758 |
+@@ -100,6 +100,15 @@ static void clk_periph_disable(struct clk_hw *hw) |
759 |
+ gate_ops->disable(gate_hw); |
760 |
+ } |
761 |
+ |
762 |
++static void clk_periph_disable_unused(struct clk_hw *hw) |
763 |
++{ |
764 |
++ struct tegra_clk_periph *periph = to_clk_periph(hw); |
765 |
++ const struct clk_ops *gate_ops = periph->gate_ops; |
766 |
++ struct clk_hw *gate_hw = &periph->gate.hw; |
767 |
++ |
768 |
++ gate_ops->disable_unused(gate_hw); |
769 |
++} |
770 |
++ |
771 |
+ static void clk_periph_restore_context(struct clk_hw *hw) |
772 |
+ { |
773 |
+ struct tegra_clk_periph *periph = to_clk_periph(hw); |
774 |
+@@ -126,6 +135,7 @@ const struct clk_ops tegra_clk_periph_ops = { |
775 |
+ .is_enabled = clk_periph_is_enabled, |
776 |
+ .enable = clk_periph_enable, |
777 |
+ .disable = clk_periph_disable, |
778 |
++ .disable_unused = clk_periph_disable_unused, |
779 |
+ .restore_context = clk_periph_restore_context, |
780 |
+ }; |
781 |
+ |
782 |
+@@ -135,6 +145,7 @@ static const struct clk_ops tegra_clk_periph_nodiv_ops = { |
783 |
+ .is_enabled = clk_periph_is_enabled, |
784 |
+ .enable = clk_periph_enable, |
785 |
+ .disable = clk_periph_disable, |
786 |
++ .disable_unused = clk_periph_disable_unused, |
787 |
+ .restore_context = clk_periph_restore_context, |
788 |
+ }; |
789 |
+ |
790 |
+diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c |
791 |
+index c5cc0a2dac6ff..d709ecb7d8d7e 100644 |
792 |
+--- a/drivers/clk/tegra/clk-pll.c |
793 |
++++ b/drivers/clk/tegra/clk-pll.c |
794 |
+@@ -1131,7 +1131,8 @@ static int clk_pllu_enable(struct clk_hw *hw) |
795 |
+ if (pll->lock) |
796 |
+ spin_lock_irqsave(pll->lock, flags); |
797 |
+ |
798 |
+- _clk_pll_enable(hw); |
799 |
++ if (!clk_pll_is_enabled(hw)) |
800 |
++ _clk_pll_enable(hw); |
801 |
+ |
802 |
+ ret = clk_pll_wait_for_lock(pll); |
803 |
+ if (ret < 0) |
804 |
+@@ -1748,15 +1749,13 @@ static int clk_pllu_tegra114_enable(struct clk_hw *hw) |
805 |
+ return -EINVAL; |
806 |
+ } |
807 |
+ |
808 |
+- if (clk_pll_is_enabled(hw)) |
809 |
+- return 0; |
810 |
+- |
811 |
+ input_rate = clk_hw_get_rate(__clk_get_hw(osc)); |
812 |
+ |
813 |
+ if (pll->lock) |
814 |
+ spin_lock_irqsave(pll->lock, flags); |
815 |
+ |
816 |
+- _clk_pll_enable(hw); |
817 |
++ if (!clk_pll_is_enabled(hw)) |
818 |
++ _clk_pll_enable(hw); |
819 |
+ |
820 |
+ ret = clk_pll_wait_for_lock(pll); |
821 |
+ if (ret < 0) |
822 |
+diff --git a/drivers/clk/tegra/clk-tegra124-emc.c b/drivers/clk/tegra/clk-tegra124-emc.c |
823 |
+index bdf6f4a516176..74c1d894cca86 100644 |
824 |
+--- a/drivers/clk/tegra/clk-tegra124-emc.c |
825 |
++++ b/drivers/clk/tegra/clk-tegra124-emc.c |
826 |
+@@ -249,8 +249,10 @@ static int emc_set_timing(struct tegra_clk_emc *tegra, |
827 |
+ div = timing->parent_rate / (timing->rate / 2) - 2; |
828 |
+ |
829 |
+ err = tegra->prepare_timing_change(emc, timing->rate); |
830 |
+- if (err) |
831 |
++ if (err) { |
832 |
++ clk_disable_unprepare(timing->parent); |
833 |
+ return err; |
834 |
++ } |
835 |
+ |
836 |
+ spin_lock_irqsave(tegra->lock, flags); |
837 |
+ |
838 |
+diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c |
839 |
+index d0177824c518b..f4881764bf8f4 100644 |
840 |
+--- a/drivers/clocksource/arm_arch_timer.c |
841 |
++++ b/drivers/clocksource/arm_arch_timer.c |
842 |
+@@ -352,7 +352,7 @@ static u64 notrace arm64_858921_read_cntvct_el0(void) |
843 |
+ do { \ |
844 |
+ _val = read_sysreg(reg); \ |
845 |
+ _retries--; \ |
846 |
+- } while (((_val + 1) & GENMASK(9, 0)) <= 1 && _retries); \ |
847 |
++ } while (((_val + 1) & GENMASK(8, 0)) <= 1 && _retries); \ |
848 |
+ \ |
849 |
+ WARN_ON_ONCE(!_retries); \ |
850 |
+ _val; \ |
851 |
+diff --git a/drivers/extcon/extcon-intel-mrfld.c b/drivers/extcon/extcon-intel-mrfld.c |
852 |
+index f47016fb28a84..cd1a5f230077c 100644 |
853 |
+--- a/drivers/extcon/extcon-intel-mrfld.c |
854 |
++++ b/drivers/extcon/extcon-intel-mrfld.c |
855 |
+@@ -197,6 +197,7 @@ static int mrfld_extcon_probe(struct platform_device *pdev) |
856 |
+ struct intel_soc_pmic *pmic = dev_get_drvdata(dev->parent); |
857 |
+ struct regmap *regmap = pmic->regmap; |
858 |
+ struct mrfld_extcon_data *data; |
859 |
++ unsigned int status; |
860 |
+ unsigned int id; |
861 |
+ int irq, ret; |
862 |
+ |
863 |
+@@ -244,6 +245,14 @@ static int mrfld_extcon_probe(struct platform_device *pdev) |
864 |
+ /* Get initial state */ |
865 |
+ mrfld_extcon_role_detect(data); |
866 |
+ |
867 |
++ /* |
868 |
++ * Cached status value is used for cable detection, see comments |
869 |
++ * in mrfld_extcon_cable_detect(), we need to sync cached value |
870 |
++ * with a real state of the hardware. |
871 |
++ */ |
872 |
++ regmap_read(regmap, BCOVE_SCHGRIRQ1, &status); |
873 |
++ data->status = status; |
874 |
++ |
875 |
+ mrfld_extcon_clear(data, BCOVE_MIRQLVL1, BCOVE_LVL1_CHGR); |
876 |
+ mrfld_extcon_clear(data, BCOVE_MCHGRIRQ1, BCOVE_CHGRIRQ_ALL); |
877 |
+ |
878 |
+diff --git a/drivers/firmware/qemu_fw_cfg.c b/drivers/firmware/qemu_fw_cfg.c |
879 |
+index 0078260fbabea..172c751a4f6c2 100644 |
880 |
+--- a/drivers/firmware/qemu_fw_cfg.c |
881 |
++++ b/drivers/firmware/qemu_fw_cfg.c |
882 |
+@@ -299,15 +299,13 @@ static int fw_cfg_do_platform_probe(struct platform_device *pdev) |
883 |
+ return 0; |
884 |
+ } |
885 |
+ |
886 |
+-static ssize_t fw_cfg_showrev(struct kobject *k, struct attribute *a, char *buf) |
887 |
++static ssize_t fw_cfg_showrev(struct kobject *k, struct kobj_attribute *a, |
888 |
++ char *buf) |
889 |
+ { |
890 |
+ return sprintf(buf, "%u\n", fw_cfg_rev); |
891 |
+ } |
892 |
+ |
893 |
+-static const struct { |
894 |
+- struct attribute attr; |
895 |
+- ssize_t (*show)(struct kobject *k, struct attribute *a, char *buf); |
896 |
+-} fw_cfg_rev_attr = { |
897 |
++static const struct kobj_attribute fw_cfg_rev_attr = { |
898 |
+ .attr = { .name = "rev", .mode = S_IRUSR }, |
899 |
+ .show = fw_cfg_showrev, |
900 |
+ }; |
901 |
+diff --git a/drivers/fpga/stratix10-soc.c b/drivers/fpga/stratix10-soc.c |
902 |
+index 657a70c5fc996..9e34bbbce26e2 100644 |
903 |
+--- a/drivers/fpga/stratix10-soc.c |
904 |
++++ b/drivers/fpga/stratix10-soc.c |
905 |
+@@ -454,6 +454,7 @@ static int s10_remove(struct platform_device *pdev) |
906 |
+ struct s10_priv *priv = mgr->priv; |
907 |
+ |
908 |
+ fpga_mgr_unregister(mgr); |
909 |
++ fpga_mgr_free(mgr); |
910 |
+ stratix10_svc_free_channel(priv->chan); |
911 |
+ |
912 |
+ return 0; |
913 |
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c |
914 |
+index ac0a432a9bf79..3c3f05d1f4daf 100644 |
915 |
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c |
916 |
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c |
917 |
+@@ -49,12 +49,6 @@ static struct { |
918 |
+ spinlock_t mem_limit_lock; |
919 |
+ } kfd_mem_limit; |
920 |
+ |
921 |
+-/* Struct used for amdgpu_amdkfd_bo_validate */ |
922 |
+-struct amdgpu_vm_parser { |
923 |
+- uint32_t domain; |
924 |
+- bool wait; |
925 |
+-}; |
926 |
+- |
927 |
+ static const char * const domain_bit_to_string[] = { |
928 |
+ "CPU", |
929 |
+ "GTT", |
930 |
+@@ -337,11 +331,9 @@ validate_fail: |
931 |
+ return ret; |
932 |
+ } |
933 |
+ |
934 |
+-static int amdgpu_amdkfd_validate(void *param, struct amdgpu_bo *bo) |
935 |
++static int amdgpu_amdkfd_validate_vm_bo(void *_unused, struct amdgpu_bo *bo) |
936 |
+ { |
937 |
+- struct amdgpu_vm_parser *p = param; |
938 |
+- |
939 |
+- return amdgpu_amdkfd_bo_validate(bo, p->domain, p->wait); |
940 |
++ return amdgpu_amdkfd_bo_validate(bo, bo->allowed_domains, false); |
941 |
+ } |
942 |
+ |
943 |
+ /* vm_validate_pt_pd_bos - Validate page table and directory BOs |
944 |
+@@ -355,20 +347,15 @@ static int vm_validate_pt_pd_bos(struct amdgpu_vm *vm) |
945 |
+ { |
946 |
+ struct amdgpu_bo *pd = vm->root.base.bo; |
947 |
+ struct amdgpu_device *adev = amdgpu_ttm_adev(pd->tbo.bdev); |
948 |
+- struct amdgpu_vm_parser param; |
949 |
+ int ret; |
950 |
+ |
951 |
+- param.domain = AMDGPU_GEM_DOMAIN_VRAM; |
952 |
+- param.wait = false; |
953 |
+- |
954 |
+- ret = amdgpu_vm_validate_pt_bos(adev, vm, amdgpu_amdkfd_validate, |
955 |
+- ¶m); |
956 |
++ ret = amdgpu_vm_validate_pt_bos(adev, vm, amdgpu_amdkfd_validate_vm_bo, NULL); |
957 |
+ if (ret) { |
958 |
+ pr_err("failed to validate PT BOs\n"); |
959 |
+ return ret; |
960 |
+ } |
961 |
+ |
962 |
+- ret = amdgpu_amdkfd_validate(¶m, pd); |
963 |
++ ret = amdgpu_amdkfd_validate_vm_bo(NULL, pd); |
964 |
+ if (ret) { |
965 |
+ pr_err("failed to validate PD\n"); |
966 |
+ return ret; |
967 |
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |
968 |
+index 85d90e857693a..1b69aa74056db 100644 |
969 |
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |
970 |
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |
971 |
+@@ -2818,7 +2818,7 @@ static int amdgpu_device_ip_reinit_early_sriov(struct amdgpu_device *adev) |
972 |
+ AMD_IP_BLOCK_TYPE_IH, |
973 |
+ }; |
974 |
+ |
975 |
+- for (i = 0; i < ARRAY_SIZE(ip_order); i++) { |
976 |
++ for (i = 0; i < adev->num_ip_blocks; i++) { |
977 |
+ int j; |
978 |
+ struct amdgpu_ip_block *block; |
979 |
+ |
980 |
+@@ -3141,8 +3141,8 @@ static int amdgpu_device_get_job_timeout_settings(struct amdgpu_device *adev) |
981 |
+ int ret = 0; |
982 |
+ |
983 |
+ /* |
984 |
+- * By default timeout for non compute jobs is 10000. |
985 |
+- * And there is no timeout enforced on compute jobs. |
986 |
++ * By default timeout for non compute jobs is 10000 |
987 |
++ * and 60000 for compute jobs. |
988 |
+ * In SR-IOV or passthrough mode, timeout for compute |
989 |
+ * jobs are 60000 by default. |
990 |
+ */ |
991 |
+@@ -3151,10 +3151,8 @@ static int amdgpu_device_get_job_timeout_settings(struct amdgpu_device *adev) |
992 |
+ if (amdgpu_sriov_vf(adev)) |
993 |
+ adev->compute_timeout = amdgpu_sriov_is_pp_one_vf(adev) ? |
994 |
+ msecs_to_jiffies(60000) : msecs_to_jiffies(10000); |
995 |
+- else if (amdgpu_passthrough(adev)) |
996 |
+- adev->compute_timeout = msecs_to_jiffies(60000); |
997 |
+ else |
998 |
+- adev->compute_timeout = MAX_SCHEDULE_TIMEOUT; |
999 |
++ adev->compute_timeout = msecs_to_jiffies(60000); |
1000 |
+ |
1001 |
+ if (strnlen(input, AMDGPU_MAX_TIMEOUT_PARAM_LENGTH)) { |
1002 |
+ while ((timeout_setting = strsep(&input, ",")) && |
1003 |
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c |
1004 |
+index e92e7dea71da1..41ebc9d21e5c6 100644 |
1005 |
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c |
1006 |
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c |
1007 |
+@@ -272,9 +272,9 @@ module_param_named(msi, amdgpu_msi, int, 0444); |
1008 |
+ * for SDMA and Video. |
1009 |
+ * |
1010 |
+ * By default(with no lockup_timeout settings), the timeout for all non-compute(GFX, SDMA and Video) |
1011 |
+- * jobs is 10000. And there is no timeout enforced on compute jobs. |
1012 |
++ * jobs is 10000. The timeout for compute is 60000. |
1013 |
+ */ |
1014 |
+-MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (default: for bare metal 10000 for non-compute jobs and infinity timeout for compute jobs; " |
1015 |
++MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (default: for bare metal 10000 for non-compute jobs and 60000 for compute jobs; " |
1016 |
+ "for passthrough or sriov, 10000 for all jobs." |
1017 |
+ " 0: keep default value. negative: infinity timeout), " |
1018 |
+ "format: for bare metal [Non-Compute] or [GFX,Compute,SDMA,Video]; " |
1019 |
+@@ -1123,6 +1123,7 @@ static const struct pci_device_id pciidlist[] = { |
1020 |
+ {0x1002, 0x73E0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH}, |
1021 |
+ {0x1002, 0x73E1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH}, |
1022 |
+ {0x1002, 0x73E2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH}, |
1023 |
++ {0x1002, 0x73E3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH}, |
1024 |
+ {0x1002, 0x73FF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH}, |
1025 |
+ |
1026 |
+ {0, 0, 0} |
1027 |
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c |
1028 |
+index 97c11aa47ad0b..7892958d5f599 100644 |
1029 |
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c |
1030 |
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c |
1031 |
+@@ -131,7 +131,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs, |
1032 |
+ struct amdgpu_device *adev = ring->adev; |
1033 |
+ struct amdgpu_ib *ib = &ibs[0]; |
1034 |
+ struct dma_fence *tmp = NULL; |
1035 |
+- bool skip_preamble, need_ctx_switch; |
1036 |
++ bool need_ctx_switch; |
1037 |
+ unsigned patch_offset = ~0; |
1038 |
+ struct amdgpu_vm *vm; |
1039 |
+ uint64_t fence_ctx; |
1040 |
+@@ -228,7 +228,6 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs, |
1041 |
+ if (need_ctx_switch) |
1042 |
+ status |= AMDGPU_HAVE_CTX_SWITCH; |
1043 |
+ |
1044 |
+- skip_preamble = ring->current_ctx == fence_ctx; |
1045 |
+ if (job && ring->funcs->emit_cntxcntl) { |
1046 |
+ status |= job->preamble_status; |
1047 |
+ status |= job->preemption_status; |
1048 |
+@@ -246,14 +245,6 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs, |
1049 |
+ for (i = 0; i < num_ibs; ++i) { |
1050 |
+ ib = &ibs[i]; |
1051 |
+ |
1052 |
+- /* drop preamble IBs if we don't have a context switch */ |
1053 |
+- if ((ib->flags & AMDGPU_IB_FLAG_PREAMBLE) && |
1054 |
+- skip_preamble && |
1055 |
+- !(status & AMDGPU_PREAMBLE_IB_PRESENT_FIRST) && |
1056 |
+- !amdgpu_mcbp && |
1057 |
+- !amdgpu_sriov_vf(adev)) /* for SRIOV preemption, Preamble CE ib must be inserted anyway */ |
1058 |
+- continue; |
1059 |
+- |
1060 |
+ if (job && ring->funcs->emit_frame_cntl) { |
1061 |
+ if (secure != !!(ib->flags & AMDGPU_IB_FLAGS_SECURE)) { |
1062 |
+ amdgpu_ring_emit_frame_cntl(ring, false, secure); |
1063 |
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h |
1064 |
+index 7c11bce4514bd..1ad7191994ac5 100644 |
1065 |
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h |
1066 |
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h |
1067 |
+@@ -89,6 +89,8 @@ struct amdgpu_nbio_funcs { |
1068 |
+ void (*enable_aspm)(struct amdgpu_device *adev, |
1069 |
+ bool enable); |
1070 |
+ void (*program_aspm)(struct amdgpu_device *adev); |
1071 |
++ void (*apply_lc_spc_mode_wa)(struct amdgpu_device *adev); |
1072 |
++ void (*apply_l1_link_width_reconfig_wa)(struct amdgpu_device *adev); |
1073 |
+ }; |
1074 |
+ |
1075 |
+ struct amdgpu_nbio { |
1076 |
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h |
1077 |
+index 1838144936580..bda4438c39256 100644 |
1078 |
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h |
1079 |
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h |
1080 |
+@@ -21,6 +21,11 @@ |
1081 |
+ #ifndef __AMDGPU_UMC_H__ |
1082 |
+ #define __AMDGPU_UMC_H__ |
1083 |
+ |
1084 |
++/* |
1085 |
++ * (addr / 256) * 4096, the higher 26 bits in ErrorAddr |
1086 |
++ * is the index of 4KB block |
1087 |
++ */ |
1088 |
++#define ADDR_OF_4KB_BLOCK(addr) (((addr) & ~0xffULL) << 4) |
1089 |
+ /* |
1090 |
+ * (addr / 256) * 8192, the higher 26 bits in ErrorAddr |
1091 |
+ * is the index of 8KB block |
1092 |
+diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c b/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c |
1093 |
+index 05ddec7ba7e2e..754b11dea6f04 100644 |
1094 |
+--- a/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c |
1095 |
++++ b/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c |
1096 |
+@@ -51,6 +51,8 @@ |
1097 |
+ #define mmBIF_MMSCH1_DOORBELL_RANGE 0x01d8 |
1098 |
+ #define mmBIF_MMSCH1_DOORBELL_RANGE_BASE_IDX 2 |
1099 |
+ |
1100 |
++#define smnPCIE_LC_LINK_WIDTH_CNTL 0x11140288 |
1101 |
++ |
1102 |
+ static void nbio_v2_3_remap_hdp_registers(struct amdgpu_device *adev) |
1103 |
+ { |
1104 |
+ WREG32_SOC15(NBIO, 0, mmREMAP_HDP_MEM_FLUSH_CNTL, |
1105 |
+@@ -463,6 +465,43 @@ static void nbio_v2_3_program_aspm(struct amdgpu_device *adev) |
1106 |
+ WREG32_PCIE(smnPCIE_LC_CNTL3, data); |
1107 |
+ } |
1108 |
+ |
1109 |
++static void nbio_v2_3_apply_lc_spc_mode_wa(struct amdgpu_device *adev) |
1110 |
++{ |
1111 |
++ uint32_t reg_data = 0; |
1112 |
++ uint32_t link_width = 0; |
1113 |
++ |
1114 |
++ if (!((adev->asic_type >= CHIP_NAVI10) && |
1115 |
++ (adev->asic_type <= CHIP_NAVI12))) |
1116 |
++ return; |
1117 |
++ |
1118 |
++ reg_data = RREG32_PCIE(smnPCIE_LC_LINK_WIDTH_CNTL); |
1119 |
++ link_width = (reg_data & PCIE_LC_LINK_WIDTH_CNTL__LC_LINK_WIDTH_RD_MASK) |
1120 |
++ >> PCIE_LC_LINK_WIDTH_CNTL__LC_LINK_WIDTH_RD__SHIFT; |
1121 |
++ |
1122 |
++ /* |
1123 |
++ * Program PCIE_LC_CNTL6.LC_SPC_MODE_8GT to 0x2 (4 symbols per clock data) |
1124 |
++ * if link_width is 0x3 (x4) |
1125 |
++ */ |
1126 |
++ if (0x3 == link_width) { |
1127 |
++ reg_data = RREG32_PCIE(smnPCIE_LC_CNTL6); |
1128 |
++ reg_data &= ~PCIE_LC_CNTL6__LC_SPC_MODE_8GT_MASK; |
1129 |
++ reg_data |= (0x2 << PCIE_LC_CNTL6__LC_SPC_MODE_8GT__SHIFT); |
1130 |
++ WREG32_PCIE(smnPCIE_LC_CNTL6, reg_data); |
1131 |
++ } |
1132 |
++} |
1133 |
++ |
1134 |
++static void nbio_v2_3_apply_l1_link_width_reconfig_wa(struct amdgpu_device *adev) |
1135 |
++{ |
1136 |
++ uint32_t reg_data = 0; |
1137 |
++ |
1138 |
++ if (adev->asic_type != CHIP_NAVI10) |
1139 |
++ return; |
1140 |
++ |
1141 |
++ reg_data = RREG32_PCIE(smnPCIE_LC_LINK_WIDTH_CNTL); |
1142 |
++ reg_data |= PCIE_LC_LINK_WIDTH_CNTL__LC_L1_RECONFIG_EN_MASK; |
1143 |
++ WREG32_PCIE(smnPCIE_LC_LINK_WIDTH_CNTL, reg_data); |
1144 |
++} |
1145 |
++ |
1146 |
+ const struct amdgpu_nbio_funcs nbio_v2_3_funcs = { |
1147 |
+ .get_hdp_flush_req_offset = nbio_v2_3_get_hdp_flush_req_offset, |
1148 |
+ .get_hdp_flush_done_offset = nbio_v2_3_get_hdp_flush_done_offset, |
1149 |
+@@ -484,4 +523,6 @@ const struct amdgpu_nbio_funcs nbio_v2_3_funcs = { |
1150 |
+ .remap_hdp_registers = nbio_v2_3_remap_hdp_registers, |
1151 |
+ .enable_aspm = nbio_v2_3_enable_aspm, |
1152 |
+ .program_aspm = nbio_v2_3_program_aspm, |
1153 |
++ .apply_lc_spc_mode_wa = nbio_v2_3_apply_lc_spc_mode_wa, |
1154 |
++ .apply_l1_link_width_reconfig_wa = nbio_v2_3_apply_l1_link_width_reconfig_wa, |
1155 |
+ }; |
1156 |
+diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c |
1157 |
+index c625c5d8ed890..3677788d47711 100644 |
1158 |
+--- a/drivers/gpu/drm/amd/amdgpu/nv.c |
1159 |
++++ b/drivers/gpu/drm/amd/amdgpu/nv.c |
1160 |
+@@ -1073,6 +1073,12 @@ static int nv_common_hw_init(void *handle) |
1161 |
+ { |
1162 |
+ struct amdgpu_device *adev = (struct amdgpu_device *)handle; |
1163 |
+ |
1164 |
++ if (adev->nbio.funcs->apply_lc_spc_mode_wa) |
1165 |
++ adev->nbio.funcs->apply_lc_spc_mode_wa(adev); |
1166 |
++ |
1167 |
++ if (adev->nbio.funcs->apply_l1_link_width_reconfig_wa) |
1168 |
++ adev->nbio.funcs->apply_l1_link_width_reconfig_wa(adev); |
1169 |
++ |
1170 |
+ /* enable pcie gen2/3 link */ |
1171 |
+ nv_pcie_gen3_enable(adev); |
1172 |
+ /* enable aspm */ |
1173 |
+diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c |
1174 |
+index c8c22c1d1e655..03a6f57c425ab 100644 |
1175 |
+--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c |
1176 |
++++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c |
1177 |
+@@ -142,7 +142,7 @@ static const struct soc15_reg_golden golden_settings_sdma_4_1[] = { |
1178 |
+ SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_RLC0_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000), |
1179 |
+ SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_RLC1_IB_CNTL, 0x800f0111, 0x00000100), |
1180 |
+ SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_RLC1_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000), |
1181 |
+- SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_UTCL1_PAGE, 0x000003ff, 0x000003c0), |
1182 |
++ SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_UTCL1_PAGE, 0x000003ff, 0x000003e0), |
1183 |
+ SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_UTCL1_WATERMK, 0xfc000000, 0x00000000) |
1184 |
+ }; |
1185 |
+ |
1186 |
+@@ -268,7 +268,7 @@ static const struct soc15_reg_golden golden_settings_sdma_4_3[] = { |
1187 |
+ SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_POWER_CNTL, 0x003fff07, 0x40000051), |
1188 |
+ SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_RLC0_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000), |
1189 |
+ SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_RLC1_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000), |
1190 |
+- SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_UTCL1_PAGE, 0x000003ff, 0x000003c0), |
1191 |
++ SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_UTCL1_PAGE, 0x000003ff, 0x000003e0), |
1192 |
+ SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_UTCL1_WATERMK, 0xfc000000, 0x03fbe1fe) |
1193 |
+ }; |
1194 |
+ |
1195 |
+diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c |
1196 |
+index 32c6aa03d2673..f884d43d4ff00 100644 |
1197 |
+--- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c |
1198 |
++++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c |
1199 |
+@@ -145,9 +145,6 @@ static int sdma_v5_2_init_microcode(struct amdgpu_device *adev) |
1200 |
+ struct amdgpu_firmware_info *info = NULL; |
1201 |
+ const struct common_firmware_header *header = NULL; |
1202 |
+ |
1203 |
+- if (amdgpu_sriov_vf(adev) && (adev->asic_type == CHIP_SIENNA_CICHLID)) |
1204 |
+- return 0; |
1205 |
+- |
1206 |
+ DRM_DEBUG("\n"); |
1207 |
+ |
1208 |
+ switch (adev->asic_type) { |
1209 |
+@@ -182,6 +179,9 @@ static int sdma_v5_2_init_microcode(struct amdgpu_device *adev) |
1210 |
+ (void *)&adev->sdma.instance[0], |
1211 |
+ sizeof(struct amdgpu_sdma_instance)); |
1212 |
+ |
1213 |
++ if (amdgpu_sriov_vf(adev) && (adev->asic_type == CHIP_SIENNA_CICHLID)) |
1214 |
++ return 0; |
1215 |
++ |
1216 |
+ DRM_DEBUG("psp_load == '%s'\n", |
1217 |
+ adev->firmware.load_type == AMDGPU_FW_LOAD_PSP ? "true" : "false"); |
1218 |
+ |
1219 |
+diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v8_7.c b/drivers/gpu/drm/amd/amdgpu/umc_v8_7.c |
1220 |
+index a064c097690c7..66fd797a6f0ec 100644 |
1221 |
+--- a/drivers/gpu/drm/amd/amdgpu/umc_v8_7.c |
1222 |
++++ b/drivers/gpu/drm/amd/amdgpu/umc_v8_7.c |
1223 |
+@@ -233,7 +233,7 @@ static void umc_v8_7_query_error_address(struct amdgpu_device *adev, |
1224 |
+ err_addr &= ~((0x1ULL << lsb) - 1); |
1225 |
+ |
1226 |
+ /* translate umc channel address to soc pa, 3 parts are included */ |
1227 |
+- retired_page = ADDR_OF_8KB_BLOCK(err_addr) | |
1228 |
++ retired_page = ADDR_OF_4KB_BLOCK(err_addr) | |
1229 |
+ ADDR_OF_256B_BLOCK(channel_index) | |
1230 |
+ OFFSET_IN_256B_BLOCK(err_addr); |
1231 |
+ |
1232 |
+diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c |
1233 |
+index a4266c4bca135..b2e55917c308e 100644 |
1234 |
+--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c |
1235 |
++++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c |
1236 |
+@@ -486,9 +486,6 @@ static int destroy_queue_nocpsch_locked(struct device_queue_manager *dqm, |
1237 |
+ if (retval == -ETIME) |
1238 |
+ qpd->reset_wavefronts = true; |
1239 |
+ |
1240 |
+- |
1241 |
+- mqd_mgr->free_mqd(mqd_mgr, q->mqd, q->mqd_mem_obj); |
1242 |
+- |
1243 |
+ list_del(&q->list); |
1244 |
+ if (list_empty(&qpd->queues_list)) { |
1245 |
+ if (qpd->reset_wavefronts) { |
1246 |
+@@ -523,6 +520,8 @@ static int destroy_queue_nocpsch(struct device_queue_manager *dqm, |
1247 |
+ int retval; |
1248 |
+ uint64_t sdma_val = 0; |
1249 |
+ struct kfd_process_device *pdd = qpd_to_pdd(qpd); |
1250 |
++ struct mqd_manager *mqd_mgr = |
1251 |
++ dqm->mqd_mgrs[get_mqd_type_from_queue_type(q->properties.type)]; |
1252 |
+ |
1253 |
+ /* Get the SDMA queue stats */ |
1254 |
+ if ((q->properties.type == KFD_QUEUE_TYPE_SDMA) || |
1255 |
+@@ -540,6 +539,8 @@ static int destroy_queue_nocpsch(struct device_queue_manager *dqm, |
1256 |
+ pdd->sdma_past_activity_counter += sdma_val; |
1257 |
+ dqm_unlock(dqm); |
1258 |
+ |
1259 |
++ mqd_mgr->free_mqd(mqd_mgr, q->mqd, q->mqd_mem_obj); |
1260 |
++ |
1261 |
+ return retval; |
1262 |
+ } |
1263 |
+ |
1264 |
+@@ -1632,7 +1633,7 @@ static int set_trap_handler(struct device_queue_manager *dqm, |
1265 |
+ static int process_termination_nocpsch(struct device_queue_manager *dqm, |
1266 |
+ struct qcm_process_device *qpd) |
1267 |
+ { |
1268 |
+- struct queue *q, *next; |
1269 |
++ struct queue *q; |
1270 |
+ struct device_process_node *cur, *next_dpn; |
1271 |
+ int retval = 0; |
1272 |
+ bool found = false; |
1273 |
+@@ -1640,12 +1641,19 @@ static int process_termination_nocpsch(struct device_queue_manager *dqm, |
1274 |
+ dqm_lock(dqm); |
1275 |
+ |
1276 |
+ /* Clear all user mode queues */ |
1277 |
+- list_for_each_entry_safe(q, next, &qpd->queues_list, list) { |
1278 |
++ while (!list_empty(&qpd->queues_list)) { |
1279 |
++ struct mqd_manager *mqd_mgr; |
1280 |
+ int ret; |
1281 |
+ |
1282 |
++ q = list_first_entry(&qpd->queues_list, struct queue, list); |
1283 |
++ mqd_mgr = dqm->mqd_mgrs[get_mqd_type_from_queue_type( |
1284 |
++ q->properties.type)]; |
1285 |
+ ret = destroy_queue_nocpsch_locked(dqm, qpd, q); |
1286 |
+ if (ret) |
1287 |
+ retval = ret; |
1288 |
++ dqm_unlock(dqm); |
1289 |
++ mqd_mgr->free_mqd(mqd_mgr, q->mqd, q->mqd_mem_obj); |
1290 |
++ dqm_lock(dqm); |
1291 |
+ } |
1292 |
+ |
1293 |
+ /* Unregister process */ |
1294 |
+@@ -1677,36 +1685,34 @@ static int get_wave_state(struct device_queue_manager *dqm, |
1295 |
+ u32 *save_area_used_size) |
1296 |
+ { |
1297 |
+ struct mqd_manager *mqd_mgr; |
1298 |
+- int r; |
1299 |
+ |
1300 |
+ dqm_lock(dqm); |
1301 |
+ |
1302 |
+- if (q->properties.type != KFD_QUEUE_TYPE_COMPUTE || |
1303 |
+- q->properties.is_active || !q->device->cwsr_enabled) { |
1304 |
+- r = -EINVAL; |
1305 |
+- goto dqm_unlock; |
1306 |
+- } |
1307 |
+- |
1308 |
+ mqd_mgr = dqm->mqd_mgrs[KFD_MQD_TYPE_CP]; |
1309 |
+ |
1310 |
+- if (!mqd_mgr->get_wave_state) { |
1311 |
+- r = -EINVAL; |
1312 |
+- goto dqm_unlock; |
1313 |
++ if (q->properties.type != KFD_QUEUE_TYPE_COMPUTE || |
1314 |
++ q->properties.is_active || !q->device->cwsr_enabled || |
1315 |
++ !mqd_mgr->get_wave_state) { |
1316 |
++ dqm_unlock(dqm); |
1317 |
++ return -EINVAL; |
1318 |
+ } |
1319 |
+ |
1320 |
+- r = mqd_mgr->get_wave_state(mqd_mgr, q->mqd, ctl_stack, |
1321 |
+- ctl_stack_used_size, save_area_used_size); |
1322 |
+- |
1323 |
+-dqm_unlock: |
1324 |
+ dqm_unlock(dqm); |
1325 |
+- return r; |
1326 |
++ |
1327 |
++ /* |
1328 |
++ * get_wave_state is outside the dqm lock to prevent circular locking |
1329 |
++ * and the queue should be protected against destruction by the process |
1330 |
++ * lock. |
1331 |
++ */ |
1332 |
++ return mqd_mgr->get_wave_state(mqd_mgr, q->mqd, ctl_stack, |
1333 |
++ ctl_stack_used_size, save_area_used_size); |
1334 |
+ } |
1335 |
+ |
1336 |
+ static int process_termination_cpsch(struct device_queue_manager *dqm, |
1337 |
+ struct qcm_process_device *qpd) |
1338 |
+ { |
1339 |
+ int retval; |
1340 |
+- struct queue *q, *next; |
1341 |
++ struct queue *q; |
1342 |
+ struct kernel_queue *kq, *kq_next; |
1343 |
+ struct mqd_manager *mqd_mgr; |
1344 |
+ struct device_process_node *cur, *next_dpn; |
1345 |
+@@ -1763,24 +1769,26 @@ static int process_termination_cpsch(struct device_queue_manager *dqm, |
1346 |
+ qpd->reset_wavefronts = false; |
1347 |
+ } |
1348 |
+ |
1349 |
+- dqm_unlock(dqm); |
1350 |
+- |
1351 |
+- /* Outside the DQM lock because under the DQM lock we can't do |
1352 |
+- * reclaim or take other locks that others hold while reclaiming. |
1353 |
+- */ |
1354 |
+- if (found) |
1355 |
+- kfd_dec_compute_active(dqm->dev); |
1356 |
+- |
1357 |
+ /* Lastly, free mqd resources. |
1358 |
+ * Do free_mqd() after dqm_unlock to avoid circular locking. |
1359 |
+ */ |
1360 |
+- list_for_each_entry_safe(q, next, &qpd->queues_list, list) { |
1361 |
++ while (!list_empty(&qpd->queues_list)) { |
1362 |
++ q = list_first_entry(&qpd->queues_list, struct queue, list); |
1363 |
+ mqd_mgr = dqm->mqd_mgrs[get_mqd_type_from_queue_type( |
1364 |
+ q->properties.type)]; |
1365 |
+ list_del(&q->list); |
1366 |
+ qpd->queue_count--; |
1367 |
++ dqm_unlock(dqm); |
1368 |
+ mqd_mgr->free_mqd(mqd_mgr, q->mqd, q->mqd_mem_obj); |
1369 |
++ dqm_lock(dqm); |
1370 |
+ } |
1371 |
++ dqm_unlock(dqm); |
1372 |
++ |
1373 |
++ /* Outside the DQM lock because under the DQM lock we can't do |
1374 |
++ * reclaim or take other locks that others hold while reclaiming. |
1375 |
++ */ |
1376 |
++ if (found) |
1377 |
++ kfd_dec_compute_active(dqm->dev); |
1378 |
+ |
1379 |
+ return retval; |
1380 |
+ } |
1381 |
+diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |
1382 |
+index 0858e0c7b7a1d..9cac833bc9d6a 100644 |
1383 |
+--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |
1384 |
++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |
1385 |
+@@ -3867,6 +3867,23 @@ static int fill_dc_scaling_info(const struct drm_plane_state *state, |
1386 |
+ scaling_info->src_rect.x = state->src_x >> 16; |
1387 |
+ scaling_info->src_rect.y = state->src_y >> 16; |
1388 |
+ |
1389 |
++ /* |
1390 |
++ * For reasons we don't (yet) fully understand a non-zero |
1391 |
++ * src_y coordinate into an NV12 buffer can cause a |
1392 |
++ * system hang. To avoid hangs (and maybe be overly cautious) |
1393 |
++ * let's reject both non-zero src_x and src_y. |
1394 |
++ * |
1395 |
++ * We currently know of only one use-case to reproduce a |
1396 |
++ * scenario with non-zero src_x and src_y for NV12, which |
1397 |
++ * is to gesture the YouTube Android app into full screen |
1398 |
++ * on ChromeOS. |
1399 |
++ */ |
1400 |
++ if (state->fb && |
1401 |
++ state->fb->format->format == DRM_FORMAT_NV12 && |
1402 |
++ (scaling_info->src_rect.x != 0 || |
1403 |
++ scaling_info->src_rect.y != 0)) |
1404 |
++ return -EINVAL; |
1405 |
++ |
1406 |
+ /* |
1407 |
+ * For reasons we don't (yet) fully understand a non-zero |
1408 |
+ * src_y coordinate into an NV12 buffer can cause a |
1409 |
+@@ -8939,7 +8956,8 @@ skip_modeset: |
1410 |
+ BUG_ON(dm_new_crtc_state->stream == NULL); |
1411 |
+ |
1412 |
+ /* Scaling or underscan settings */ |
1413 |
+- if (is_scaling_state_different(dm_old_conn_state, dm_new_conn_state)) |
1414 |
++ if (is_scaling_state_different(dm_old_conn_state, dm_new_conn_state) || |
1415 |
++ drm_atomic_crtc_needs_modeset(new_crtc_state)) |
1416 |
+ update_stream_scaling_settings( |
1417 |
+ &new_crtc_state->mode, dm_new_conn_state, dm_new_crtc_state->stream); |
1418 |
+ |
1419 |
+@@ -9498,6 +9516,10 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev, |
1420 |
+ dm_old_crtc_state->dsc_force_changed == false) |
1421 |
+ continue; |
1422 |
+ |
1423 |
++ ret = amdgpu_dm_verify_lut_sizes(new_crtc_state); |
1424 |
++ if (ret) |
1425 |
++ goto fail; |
1426 |
++ |
1427 |
+ if (!new_crtc_state->enable) |
1428 |
+ continue; |
1429 |
+ |
1430 |
+diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h |
1431 |
+index 52cc817052802..250adc92dfd0f 100644 |
1432 |
+--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h |
1433 |
++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h |
1434 |
+@@ -529,6 +529,7 @@ void amdgpu_dm_trigger_timing_sync(struct drm_device *dev); |
1435 |
+ #define MAX_COLOR_LEGACY_LUT_ENTRIES 256 |
1436 |
+ |
1437 |
+ void amdgpu_dm_init_color_mod(void); |
1438 |
++int amdgpu_dm_verify_lut_sizes(const struct drm_crtc_state *crtc_state); |
1439 |
+ int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc); |
1440 |
+ int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc, |
1441 |
+ struct dc_plane_state *dc_plane_state); |
1442 |
+diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c |
1443 |
+index 157fe4efbb599..a022e5bb30a5c 100644 |
1444 |
+--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c |
1445 |
++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c |
1446 |
+@@ -284,6 +284,37 @@ static int __set_input_tf(struct dc_transfer_func *func, |
1447 |
+ return res ? 0 : -ENOMEM; |
1448 |
+ } |
1449 |
+ |
1450 |
++/** |
1451 |
++ * Verifies that the Degamma and Gamma LUTs attached to the |crtc_state| are of |
1452 |
++ * the expected size. |
1453 |
++ * Returns 0 on success. |
1454 |
++ */ |
1455 |
++int amdgpu_dm_verify_lut_sizes(const struct drm_crtc_state *crtc_state) |
1456 |
++{ |
1457 |
++ const struct drm_color_lut *lut = NULL; |
1458 |
++ uint32_t size = 0; |
1459 |
++ |
1460 |
++ lut = __extract_blob_lut(crtc_state->degamma_lut, &size); |
1461 |
++ if (lut && size != MAX_COLOR_LUT_ENTRIES) { |
1462 |
++ DRM_DEBUG_DRIVER( |
1463 |
++ "Invalid Degamma LUT size. Should be %u but got %u.\n", |
1464 |
++ MAX_COLOR_LUT_ENTRIES, size); |
1465 |
++ return -EINVAL; |
1466 |
++ } |
1467 |
++ |
1468 |
++ lut = __extract_blob_lut(crtc_state->gamma_lut, &size); |
1469 |
++ if (lut && size != MAX_COLOR_LUT_ENTRIES && |
1470 |
++ size != MAX_COLOR_LEGACY_LUT_ENTRIES) { |
1471 |
++ DRM_DEBUG_DRIVER( |
1472 |
++ "Invalid Gamma LUT size. Should be %u (or %u for legacy) but got %u.\n", |
1473 |
++ MAX_COLOR_LUT_ENTRIES, MAX_COLOR_LEGACY_LUT_ENTRIES, |
1474 |
++ size); |
1475 |
++ return -EINVAL; |
1476 |
++ } |
1477 |
++ |
1478 |
++ return 0; |
1479 |
++} |
1480 |
++ |
1481 |
+ /** |
1482 |
+ * amdgpu_dm_update_crtc_color_mgmt: Maps DRM color management to DC stream. |
1483 |
+ * @crtc: amdgpu_dm crtc state |
1484 |
+@@ -317,14 +348,12 @@ int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc) |
1485 |
+ bool is_legacy; |
1486 |
+ int r; |
1487 |
+ |
1488 |
+- degamma_lut = __extract_blob_lut(crtc->base.degamma_lut, °amma_size); |
1489 |
+- if (degamma_lut && degamma_size != MAX_COLOR_LUT_ENTRIES) |
1490 |
+- return -EINVAL; |
1491 |
++ r = amdgpu_dm_verify_lut_sizes(&crtc->base); |
1492 |
++ if (r) |
1493 |
++ return r; |
1494 |
+ |
1495 |
++ degamma_lut = __extract_blob_lut(crtc->base.degamma_lut, °amma_size); |
1496 |
+ regamma_lut = __extract_blob_lut(crtc->base.gamma_lut, ®amma_size); |
1497 |
+- if (regamma_lut && regamma_size != MAX_COLOR_LUT_ENTRIES && |
1498 |
+- regamma_size != MAX_COLOR_LEGACY_LUT_ENTRIES) |
1499 |
+- return -EINVAL; |
1500 |
+ |
1501 |
+ has_degamma = |
1502 |
+ degamma_lut && !__is_lut_linear(degamma_lut, degamma_size); |
1503 |
+diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c |
1504 |
+index 9f9fda3118d1f..500bcd0ecf4d2 100644 |
1505 |
+--- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c |
1506 |
++++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c |
1507 |
+@@ -1944,7 +1944,7 @@ static enum bp_result get_integrated_info_v2_1( |
1508 |
+ info_v2_1->edp1_info.edp_pwr_down_bloff_to_vary_bloff; |
1509 |
+ info->edp1_info.edp_panel_bpc = |
1510 |
+ info_v2_1->edp1_info.edp_panel_bpc; |
1511 |
+- info->edp1_info.edp_bootup_bl_level = |
1512 |
++ info->edp1_info.edp_bootup_bl_level = info_v2_1->edp1_info.edp_bootup_bl_level; |
1513 |
+ |
1514 |
+ info->edp2_info.edp_backlight_pwm_hz = |
1515 |
+ le16_to_cpu(info_v2_1->edp2_info.edp_backlight_pwm_hz); |
1516 |
+diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c |
1517 |
+index b85f67341a9a0..c957d7d055ba3 100644 |
1518 |
+--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c |
1519 |
++++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c |
1520 |
+@@ -1726,6 +1726,8 @@ static void set_dp_mst_mode(struct dc_link *link, bool mst_enable) |
1521 |
+ link->type = dc_connection_single; |
1522 |
+ link->local_sink = link->remote_sinks[0]; |
1523 |
+ link->local_sink->sink_signal = SIGNAL_TYPE_DISPLAY_PORT; |
1524 |
++ dc_sink_retain(link->local_sink); |
1525 |
++ dm_helpers_dp_mst_stop_top_mgr(link->ctx, link); |
1526 |
+ } else if (mst_enable == true && |
1527 |
+ link->type == dc_connection_single && |
1528 |
+ link->remote_sinks[0] != NULL) { |
1529 |
+diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c |
1530 |
+index 0c26c2ade782c..749189eb20bab 100644 |
1531 |
+--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c |
1532 |
++++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c |
1533 |
+@@ -652,124 +652,23 @@ static void calculate_split_count_and_index(struct pipe_ctx *pipe_ctx, int *spli |
1534 |
+ } |
1535 |
+ } |
1536 |
+ |
1537 |
+-static void calculate_viewport(struct pipe_ctx *pipe_ctx) |
1538 |
++/* |
1539 |
++ * This is a preliminary vp size calculation to allow us to check taps support. |
1540 |
++ * The result is completely overridden afterwards. |
1541 |
++ */ |
1542 |
++static void calculate_viewport_size(struct pipe_ctx *pipe_ctx) |
1543 |
+ { |
1544 |
+- const struct dc_plane_state *plane_state = pipe_ctx->plane_state; |
1545 |
+- const struct dc_stream_state *stream = pipe_ctx->stream; |
1546 |
+ struct scaler_data *data = &pipe_ctx->plane_res.scl_data; |
1547 |
+- struct rect surf_src = plane_state->src_rect; |
1548 |
+- struct rect clip, dest; |
1549 |
+- int vpc_div = (data->format == PIXEL_FORMAT_420BPP8 |
1550 |
+- || data->format == PIXEL_FORMAT_420BPP10) ? 2 : 1; |
1551 |
+- int split_count = 0; |
1552 |
+- int split_idx = 0; |
1553 |
+- bool orthogonal_rotation, flip_y_start, flip_x_start; |
1554 |
+- |
1555 |
+- calculate_split_count_and_index(pipe_ctx, &split_count, &split_idx); |
1556 |
+ |
1557 |
+- if (stream->view_format == VIEW_3D_FORMAT_SIDE_BY_SIDE || |
1558 |
+- stream->view_format == VIEW_3D_FORMAT_TOP_AND_BOTTOM) { |
1559 |
+- split_count = 0; |
1560 |
+- split_idx = 0; |
1561 |
+- } |
1562 |
+- |
1563 |
+- /* The actual clip is an intersection between stream |
1564 |
+- * source and surface clip |
1565 |
+- */ |
1566 |
+- dest = plane_state->dst_rect; |
1567 |
+- clip.x = stream->src.x > plane_state->clip_rect.x ? |
1568 |
+- stream->src.x : plane_state->clip_rect.x; |
1569 |
+- |
1570 |
+- clip.width = stream->src.x + stream->src.width < |
1571 |
+- plane_state->clip_rect.x + plane_state->clip_rect.width ? |
1572 |
+- stream->src.x + stream->src.width - clip.x : |
1573 |
+- plane_state->clip_rect.x + plane_state->clip_rect.width - clip.x ; |
1574 |
+- |
1575 |
+- clip.y = stream->src.y > plane_state->clip_rect.y ? |
1576 |
+- stream->src.y : plane_state->clip_rect.y; |
1577 |
+- |
1578 |
+- clip.height = stream->src.y + stream->src.height < |
1579 |
+- plane_state->clip_rect.y + plane_state->clip_rect.height ? |
1580 |
+- stream->src.y + stream->src.height - clip.y : |
1581 |
+- plane_state->clip_rect.y + plane_state->clip_rect.height - clip.y ; |
1582 |
+- |
1583 |
+- /* |
1584 |
+- * Need to calculate how scan origin is shifted in vp space |
1585 |
+- * to correctly rotate clip and dst |
1586 |
+- */ |
1587 |
+- get_vp_scan_direction( |
1588 |
+- plane_state->rotation, |
1589 |
+- plane_state->horizontal_mirror, |
1590 |
+- &orthogonal_rotation, |
1591 |
+- &flip_y_start, |
1592 |
+- &flip_x_start); |
1593 |
+- |
1594 |
+- if (orthogonal_rotation) { |
1595 |
+- swap(clip.x, clip.y); |
1596 |
+- swap(clip.width, clip.height); |
1597 |
+- swap(dest.x, dest.y); |
1598 |
+- swap(dest.width, dest.height); |
1599 |
+- } |
1600 |
+- if (flip_x_start) { |
1601 |
+- clip.x = dest.x + dest.width - clip.x - clip.width; |
1602 |
+- dest.x = 0; |
1603 |
+- } |
1604 |
+- if (flip_y_start) { |
1605 |
+- clip.y = dest.y + dest.height - clip.y - clip.height; |
1606 |
+- dest.y = 0; |
1607 |
+- } |
1608 |
+- |
1609 |
+- /* offset = surf_src.ofs + (clip.ofs - surface->dst_rect.ofs) * scl_ratio |
1610 |
+- * num_pixels = clip.num_pix * scl_ratio |
1611 |
+- */ |
1612 |
+- data->viewport.x = surf_src.x + (clip.x - dest.x) * surf_src.width / dest.width; |
1613 |
+- data->viewport.width = clip.width * surf_src.width / dest.width; |
1614 |
+- |
1615 |
+- data->viewport.y = surf_src.y + (clip.y - dest.y) * surf_src.height / dest.height; |
1616 |
+- data->viewport.height = clip.height * surf_src.height / dest.height; |
1617 |
+- |
1618 |
+- /* Handle split */ |
1619 |
+- if (split_count) { |
1620 |
+- /* extra pixels in the division remainder need to go to pipes after |
1621 |
+- * the extra pixel index minus one(epimo) defined here as: |
1622 |
+- */ |
1623 |
+- int epimo = 0; |
1624 |
+- |
1625 |
+- if (orthogonal_rotation) { |
1626 |
+- if (flip_y_start) |
1627 |
+- split_idx = split_count - split_idx; |
1628 |
+- |
1629 |
+- epimo = split_count - data->viewport.height % (split_count + 1); |
1630 |
+- |
1631 |
+- data->viewport.y += (data->viewport.height / (split_count + 1)) * split_idx; |
1632 |
+- if (split_idx > epimo) |
1633 |
+- data->viewport.y += split_idx - epimo - 1; |
1634 |
+- data->viewport.height = data->viewport.height / (split_count + 1) + (split_idx > epimo ? 1 : 0); |
1635 |
+- } else { |
1636 |
+- if (flip_x_start) |
1637 |
+- split_idx = split_count - split_idx; |
1638 |
+- |
1639 |
+- epimo = split_count - data->viewport.width % (split_count + 1); |
1640 |
+- |
1641 |
+- data->viewport.x += (data->viewport.width / (split_count + 1)) * split_idx; |
1642 |
+- if (split_idx > epimo) |
1643 |
+- data->viewport.x += split_idx - epimo - 1; |
1644 |
+- data->viewport.width = data->viewport.width / (split_count + 1) + (split_idx > epimo ? 1 : 0); |
1645 |
+- } |
1646 |
++ data->viewport.width = dc_fixpt_ceil(dc_fixpt_mul_int(data->ratios.horz, data->recout.width)); |
1647 |
++ data->viewport.height = dc_fixpt_ceil(dc_fixpt_mul_int(data->ratios.vert, data->recout.height)); |
1648 |
++ data->viewport_c.width = dc_fixpt_ceil(dc_fixpt_mul_int(data->ratios.horz_c, data->recout.width)); |
1649 |
++ data->viewport_c.height = dc_fixpt_ceil(dc_fixpt_mul_int(data->ratios.vert_c, data->recout.height)); |
1650 |
++ if (pipe_ctx->plane_state->rotation == ROTATION_ANGLE_90 || |
1651 |
++ pipe_ctx->plane_state->rotation == ROTATION_ANGLE_270) { |
1652 |
++ swap(data->viewport.width, data->viewport.height); |
1653 |
++ swap(data->viewport_c.width, data->viewport_c.height); |
1654 |
+ } |
1655 |
+- |
1656 |
+- /* Round down, compensate in init */ |
1657 |
+- data->viewport_c.x = data->viewport.x / vpc_div; |
1658 |
+- data->viewport_c.y = data->viewport.y / vpc_div; |
1659 |
+- data->inits.h_c = (data->viewport.x % vpc_div) != 0 ? dc_fixpt_half : dc_fixpt_zero; |
1660 |
+- data->inits.v_c = (data->viewport.y % vpc_div) != 0 ? dc_fixpt_half : dc_fixpt_zero; |
1661 |
+- |
1662 |
+- /* Round up, assume original video size always even dimensions */ |
1663 |
+- data->viewport_c.width = (data->viewport.width + vpc_div - 1) / vpc_div; |
1664 |
+- data->viewport_c.height = (data->viewport.height + vpc_div - 1) / vpc_div; |
1665 |
+- |
1666 |
+- data->viewport_unadjusted = data->viewport; |
1667 |
+- data->viewport_c_unadjusted = data->viewport_c; |
1668 |
+ } |
1669 |
+ |
1670 |
+ static void calculate_recout(struct pipe_ctx *pipe_ctx) |
1671 |
+@@ -778,26 +677,21 @@ static void calculate_recout(struct pipe_ctx *pipe_ctx) |
1672 |
+ const struct dc_stream_state *stream = pipe_ctx->stream; |
1673 |
+ struct scaler_data *data = &pipe_ctx->plane_res.scl_data; |
1674 |
+ struct rect surf_clip = plane_state->clip_rect; |
1675 |
+- bool pri_split_tb = pipe_ctx->bottom_pipe && |
1676 |
+- pipe_ctx->bottom_pipe->plane_state == pipe_ctx->plane_state && |
1677 |
+- stream->view_format == VIEW_3D_FORMAT_TOP_AND_BOTTOM; |
1678 |
+- bool sec_split_tb = pipe_ctx->top_pipe && |
1679 |
+- pipe_ctx->top_pipe->plane_state == pipe_ctx->plane_state && |
1680 |
+- stream->view_format == VIEW_3D_FORMAT_TOP_AND_BOTTOM; |
1681 |
+- int split_count = 0; |
1682 |
+- int split_idx = 0; |
1683 |
++ bool split_tb = stream->view_format == VIEW_3D_FORMAT_TOP_AND_BOTTOM; |
1684 |
++ int split_count, split_idx; |
1685 |
+ |
1686 |
+ calculate_split_count_and_index(pipe_ctx, &split_count, &split_idx); |
1687 |
++ if (stream->view_format == VIEW_3D_FORMAT_SIDE_BY_SIDE) |
1688 |
++ split_idx = 0; |
1689 |
+ |
1690 |
+ /* |
1691 |
+ * Only the leftmost ODM pipe should be offset by a nonzero distance |
1692 |
+ */ |
1693 |
+- if (!pipe_ctx->prev_odm_pipe) { |
1694 |
++ if (!pipe_ctx->prev_odm_pipe || split_idx == split_count) { |
1695 |
+ data->recout.x = stream->dst.x; |
1696 |
+ if (stream->src.x < surf_clip.x) |
1697 |
+ data->recout.x += (surf_clip.x - stream->src.x) * stream->dst.width |
1698 |
+ / stream->src.width; |
1699 |
+- |
1700 |
+ } else |
1701 |
+ data->recout.x = 0; |
1702 |
+ |
1703 |
+@@ -818,26 +712,36 @@ static void calculate_recout(struct pipe_ctx *pipe_ctx) |
1704 |
+ if (data->recout.height + data->recout.y > stream->dst.y + stream->dst.height) |
1705 |
+ data->recout.height = stream->dst.y + stream->dst.height - data->recout.y; |
1706 |
+ |
1707 |
+- /* Handle h & v split, handle rotation using viewport */ |
1708 |
+- if (sec_split_tb) { |
1709 |
+- data->recout.y += data->recout.height / 2; |
1710 |
+- /* Floor primary pipe, ceil 2ndary pipe */ |
1711 |
+- data->recout.height = (data->recout.height + 1) / 2; |
1712 |
+- } else if (pri_split_tb) |
1713 |
++ /* Handle h & v split */ |
1714 |
++ if (split_tb) { |
1715 |
++ ASSERT(data->recout.height % 2 == 0); |
1716 |
+ data->recout.height /= 2; |
1717 |
+- else if (split_count) { |
1718 |
+- /* extra pixels in the division remainder need to go to pipes after |
1719 |
+- * the extra pixel index minus one(epimo) defined here as: |
1720 |
+- */ |
1721 |
+- int epimo = split_count - data->recout.width % (split_count + 1); |
1722 |
+- |
1723 |
+- /*no recout offset due to odm */ |
1724 |
++ } else if (split_count) { |
1725 |
+ if (!pipe_ctx->next_odm_pipe && !pipe_ctx->prev_odm_pipe) { |
1726 |
++ /* extra pixels in the division remainder need to go to pipes after |
1727 |
++ * the extra pixel index minus one(epimo) defined here as: |
1728 |
++ */ |
1729 |
++ int epimo = split_count - data->recout.width % (split_count + 1); |
1730 |
++ |
1731 |
+ data->recout.x += (data->recout.width / (split_count + 1)) * split_idx; |
1732 |
+ if (split_idx > epimo) |
1733 |
+ data->recout.x += split_idx - epimo - 1; |
1734 |
++ ASSERT(stream->view_format != VIEW_3D_FORMAT_SIDE_BY_SIDE || data->recout.width % 2 == 0); |
1735 |
++ data->recout.width = data->recout.width / (split_count + 1) + (split_idx > epimo ? 1 : 0); |
1736 |
++ } else { |
1737 |
++ /* odm */ |
1738 |
++ if (split_idx == split_count) { |
1739 |
++ /* rightmost pipe is the remainder recout */ |
1740 |
++ data->recout.width -= data->h_active * split_count - data->recout.x; |
1741 |
++ |
1742 |
++ /* ODM combine cases with MPO we can get negative widths */ |
1743 |
++ if (data->recout.width < 0) |
1744 |
++ data->recout.width = 0; |
1745 |
++ |
1746 |
++ data->recout.x = 0; |
1747 |
++ } else |
1748 |
++ data->recout.width = data->h_active - data->recout.x; |
1749 |
+ } |
1750 |
+- data->recout.width = data->recout.width / (split_count + 1) + (split_idx > epimo ? 1 : 0); |
1751 |
+ } |
1752 |
+ } |
1753 |
+ |
1754 |
+@@ -891,9 +795,15 @@ static void calculate_scaling_ratios(struct pipe_ctx *pipe_ctx) |
1755 |
+ pipe_ctx->plane_res.scl_data.ratios.vert_c, 19); |
1756 |
+ } |
1757 |
+ |
1758 |
+-static inline void adjust_vp_and_init_for_seamless_clip( |
1759 |
++ |
1760 |
++/* |
1761 |
++ * We completely calculate vp offset, size and inits here based entirely on scaling |
1762 |
++ * ratios and recout for pixel perfect pipe combine. |
1763 |
++ */ |
1764 |
++static void calculate_init_and_vp( |
1765 |
+ bool flip_scan_dir, |
1766 |
+- int recout_skip, |
1767 |
++ int recout_offset_within_recout_full, |
1768 |
++ int recout_size, |
1769 |
+ int src_size, |
1770 |
+ int taps, |
1771 |
+ struct fixed31_32 ratio, |
1772 |
+@@ -901,91 +811,87 @@ static inline void adjust_vp_and_init_for_seamless_clip( |
1773 |
+ int *vp_offset, |
1774 |
+ int *vp_size) |
1775 |
+ { |
1776 |
+- if (!flip_scan_dir) { |
1777 |
+- /* Adjust for viewport end clip-off */ |
1778 |
+- if ((*vp_offset + *vp_size) < src_size) { |
1779 |
+- int vp_clip = src_size - *vp_size - *vp_offset; |
1780 |
+- int int_part = dc_fixpt_floor(dc_fixpt_sub(*init, ratio)); |
1781 |
+- |
1782 |
+- int_part = int_part > 0 ? int_part : 0; |
1783 |
+- *vp_size += int_part < vp_clip ? int_part : vp_clip; |
1784 |
+- } |
1785 |
+- |
1786 |
+- /* Adjust for non-0 viewport offset */ |
1787 |
+- if (*vp_offset) { |
1788 |
+- int int_part; |
1789 |
+- |
1790 |
+- *init = dc_fixpt_add(*init, dc_fixpt_mul_int(ratio, recout_skip)); |
1791 |
+- int_part = dc_fixpt_floor(*init) - *vp_offset; |
1792 |
+- if (int_part < taps) { |
1793 |
+- int int_adj = *vp_offset >= (taps - int_part) ? |
1794 |
+- (taps - int_part) : *vp_offset; |
1795 |
+- *vp_offset -= int_adj; |
1796 |
+- *vp_size += int_adj; |
1797 |
+- int_part += int_adj; |
1798 |
+- } else if (int_part > taps) { |
1799 |
+- *vp_offset += int_part - taps; |
1800 |
+- *vp_size -= int_part - taps; |
1801 |
+- int_part = taps; |
1802 |
+- } |
1803 |
+- init->value &= 0xffffffff; |
1804 |
+- *init = dc_fixpt_add_int(*init, int_part); |
1805 |
+- } |
1806 |
+- } else { |
1807 |
+- /* Adjust for non-0 viewport offset */ |
1808 |
+- if (*vp_offset) { |
1809 |
+- int int_part = dc_fixpt_floor(dc_fixpt_sub(*init, ratio)); |
1810 |
+- |
1811 |
+- int_part = int_part > 0 ? int_part : 0; |
1812 |
+- *vp_size += int_part < *vp_offset ? int_part : *vp_offset; |
1813 |
+- *vp_offset -= int_part < *vp_offset ? int_part : *vp_offset; |
1814 |
+- } |
1815 |
++ struct fixed31_32 temp; |
1816 |
++ int int_part; |
1817 |
+ |
1818 |
+- /* Adjust for viewport end clip-off */ |
1819 |
+- if ((*vp_offset + *vp_size) < src_size) { |
1820 |
+- int int_part; |
1821 |
+- int end_offset = src_size - *vp_offset - *vp_size; |
1822 |
+- |
1823 |
+- /* |
1824 |
+- * this is init if vp had no offset, keep in mind this is from the |
1825 |
+- * right side of vp due to scan direction |
1826 |
+- */ |
1827 |
+- *init = dc_fixpt_add(*init, dc_fixpt_mul_int(ratio, recout_skip)); |
1828 |
+- /* |
1829 |
+- * this is the difference between first pixel of viewport available to read |
1830 |
+- * and init position, takning into account scan direction |
1831 |
+- */ |
1832 |
+- int_part = dc_fixpt_floor(*init) - end_offset; |
1833 |
+- if (int_part < taps) { |
1834 |
+- int int_adj = end_offset >= (taps - int_part) ? |
1835 |
+- (taps - int_part) : end_offset; |
1836 |
+- *vp_size += int_adj; |
1837 |
+- int_part += int_adj; |
1838 |
+- } else if (int_part > taps) { |
1839 |
+- *vp_size += int_part - taps; |
1840 |
+- int_part = taps; |
1841 |
+- } |
1842 |
+- init->value &= 0xffffffff; |
1843 |
+- *init = dc_fixpt_add_int(*init, int_part); |
1844 |
+- } |
1845 |
++ /* |
1846 |
++ * First of the taps starts sampling pixel number <init_int_part> corresponding to recout |
1847 |
++ * pixel 1. Next recout pixel samples int part of <init + scaling ratio> and so on. |
1848 |
++ * All following calculations are based on this logic. |
1849 |
++ * |
1850 |
++ * Init calculated according to formula: |
1851 |
++ * init = (scaling_ratio + number_of_taps + 1) / 2 |
1852 |
++ * init_bot = init + scaling_ratio |
1853 |
++ * to get pixel perfect combine add the fraction from calculating vp offset |
1854 |
++ */ |
1855 |
++ temp = dc_fixpt_mul_int(ratio, recout_offset_within_recout_full); |
1856 |
++ *vp_offset = dc_fixpt_floor(temp); |
1857 |
++ temp.value &= 0xffffffff; |
1858 |
++ *init = dc_fixpt_truncate(dc_fixpt_add(dc_fixpt_div_int( |
1859 |
++ dc_fixpt_add_int(ratio, taps + 1), 2), temp), 19); |
1860 |
++ /* |
1861 |
++ * If viewport has non 0 offset and there are more taps than covered by init then |
1862 |
++ * we should decrease the offset and increase init so we are never sampling |
1863 |
++ * outside of viewport. |
1864 |
++ */ |
1865 |
++ int_part = dc_fixpt_floor(*init); |
1866 |
++ if (int_part < taps) { |
1867 |
++ int_part = taps - int_part; |
1868 |
++ if (int_part > *vp_offset) |
1869 |
++ int_part = *vp_offset; |
1870 |
++ *vp_offset -= int_part; |
1871 |
++ *init = dc_fixpt_add_int(*init, int_part); |
1872 |
+ } |
1873 |
++ /* |
1874 |
++ * If taps are sampling outside of viewport at end of recout and there are more pixels |
1875 |
++ * available in the surface we should increase the viewport size, regardless set vp to |
1876 |
++ * only what is used. |
1877 |
++ */ |
1878 |
++ temp = dc_fixpt_add(*init, dc_fixpt_mul_int(ratio, recout_size - 1)); |
1879 |
++ *vp_size = dc_fixpt_floor(temp); |
1880 |
++ if (*vp_size + *vp_offset > src_size) |
1881 |
++ *vp_size = src_size - *vp_offset; |
1882 |
++ |
1883 |
++ /* We did all the math assuming we are scanning same direction as display does, |
1884 |
++ * however mirror/rotation changes how vp scans vs how it is offset. If scan direction |
1885 |
++ * is flipped we simply need to calculate offset from the other side of plane. |
1886 |
++ * Note that outside of viewport all scaling hardware works in recout space. |
1887 |
++ */ |
1888 |
++ if (flip_scan_dir) |
1889 |
++ *vp_offset = src_size - *vp_offset - *vp_size; |
1890 |
+ } |
1891 |
+ |
1892 |
+-static void calculate_inits_and_adj_vp(struct pipe_ctx *pipe_ctx) |
1893 |
++static void calculate_inits_and_viewports(struct pipe_ctx *pipe_ctx) |
1894 |
+ { |
1895 |
+ const struct dc_plane_state *plane_state = pipe_ctx->plane_state; |
1896 |
+ const struct dc_stream_state *stream = pipe_ctx->stream; |
1897 |
+- struct pipe_ctx *odm_pipe = pipe_ctx; |
1898 |
+ struct scaler_data *data = &pipe_ctx->plane_res.scl_data; |
1899 |
+- struct rect src = pipe_ctx->plane_state->src_rect; |
1900 |
+- int recout_skip_h, recout_skip_v, surf_size_h, surf_size_v; |
1901 |
++ struct rect src = plane_state->src_rect; |
1902 |
+ int vpc_div = (data->format == PIXEL_FORMAT_420BPP8 |
1903 |
+- || data->format == PIXEL_FORMAT_420BPP10) ? 2 : 1; |
1904 |
++ || data->format == PIXEL_FORMAT_420BPP10) ? 2 : 1; |
1905 |
++ int split_count, split_idx, ro_lb, ro_tb, recout_full_x, recout_full_y; |
1906 |
+ bool orthogonal_rotation, flip_vert_scan_dir, flip_horz_scan_dir; |
1907 |
+- int odm_idx = 0; |
1908 |
+ |
1909 |
++ calculate_split_count_and_index(pipe_ctx, &split_count, &split_idx); |
1910 |
+ /* |
1911 |
+- * Need to calculate the scan direction for viewport to make adjustments |
1912 |
++ * recout full is what the recout would have been if we didnt clip |
1913 |
++ * the source plane at all. We only care about left(ro_lb) and top(ro_tb) |
1914 |
++ * offsets of recout within recout full because those are the directions |
1915 |
++ * we scan from and therefore the only ones that affect inits. |
1916 |
++ */ |
1917 |
++ recout_full_x = stream->dst.x + (plane_state->dst_rect.x - stream->src.x) |
1918 |
++ * stream->dst.width / stream->src.width; |
1919 |
++ recout_full_y = stream->dst.y + (plane_state->dst_rect.y - stream->src.y) |
1920 |
++ * stream->dst.height / stream->src.height; |
1921 |
++ if (pipe_ctx->prev_odm_pipe && split_idx) |
1922 |
++ ro_lb = data->h_active * split_idx - recout_full_x; |
1923 |
++ else |
1924 |
++ ro_lb = data->recout.x - recout_full_x; |
1925 |
++ ro_tb = data->recout.y - recout_full_y; |
1926 |
++ ASSERT(ro_lb >= 0 && ro_tb >= 0); |
1927 |
++ |
1928 |
++ /* |
1929 |
++ * Work in recout rotation since that requires less transformations |
1930 |
+ */ |
1931 |
+ get_vp_scan_direction( |
1932 |
+ plane_state->rotation, |
1933 |
+@@ -994,145 +900,62 @@ static void calculate_inits_and_adj_vp(struct pipe_ctx *pipe_ctx) |
1934 |
+ &flip_vert_scan_dir, |
1935 |
+ &flip_horz_scan_dir); |
1936 |
+ |
1937 |
+- /* Calculate src rect rotation adjusted to recout space */ |
1938 |
+- surf_size_h = src.x + src.width; |
1939 |
+- surf_size_v = src.y + src.height; |
1940 |
+- if (flip_horz_scan_dir) |
1941 |
+- src.x = 0; |
1942 |
+- if (flip_vert_scan_dir) |
1943 |
+- src.y = 0; |
1944 |
+ if (orthogonal_rotation) { |
1945 |
+- swap(src.x, src.y); |
1946 |
+ swap(src.width, src.height); |
1947 |
++ swap(flip_vert_scan_dir, flip_horz_scan_dir); |
1948 |
+ } |
1949 |
+ |
1950 |
+- /*modified recout_skip_h calculation due to odm having no recout offset*/ |
1951 |
+- while (odm_pipe->prev_odm_pipe) { |
1952 |
+- odm_idx++; |
1953 |
+- odm_pipe = odm_pipe->prev_odm_pipe; |
1954 |
+- } |
1955 |
+- /*odm_pipe is the leftmost pipe in the ODM group*/ |
1956 |
+- recout_skip_h = odm_idx * data->recout.width; |
1957 |
+- |
1958 |
+- /* Recout matching initial vp offset = recout_offset - (stream dst offset + |
1959 |
+- * ((surf dst offset - stream src offset) * 1/ stream scaling ratio) |
1960 |
+- * - (surf surf_src offset * 1/ full scl ratio)) |
1961 |
+- */ |
1962 |
+- recout_skip_h += odm_pipe->plane_res.scl_data.recout.x |
1963 |
+- - (stream->dst.x + (plane_state->dst_rect.x - stream->src.x) |
1964 |
+- * stream->dst.width / stream->src.width - |
1965 |
+- src.x * plane_state->dst_rect.width / src.width |
1966 |
+- * stream->dst.width / stream->src.width); |
1967 |
+- |
1968 |
+- |
1969 |
+- recout_skip_v = data->recout.y - (stream->dst.y + (plane_state->dst_rect.y - stream->src.y) |
1970 |
+- * stream->dst.height / stream->src.height - |
1971 |
+- src.y * plane_state->dst_rect.height / src.height |
1972 |
+- * stream->dst.height / stream->src.height); |
1973 |
+- if (orthogonal_rotation) |
1974 |
+- swap(recout_skip_h, recout_skip_v); |
1975 |
+- /* |
1976 |
+- * Init calculated according to formula: |
1977 |
+- * init = (scaling_ratio + number_of_taps + 1) / 2 |
1978 |
+- * init_bot = init + scaling_ratio |
1979 |
+- * init_c = init + truncated_vp_c_offset(from calculate viewport) |
1980 |
+- */ |
1981 |
+- data->inits.h = dc_fixpt_truncate(dc_fixpt_div_int( |
1982 |
+- dc_fixpt_add_int(data->ratios.horz, data->taps.h_taps + 1), 2), 19); |
1983 |
+- |
1984 |
+- data->inits.h_c = dc_fixpt_truncate(dc_fixpt_add(data->inits.h_c, dc_fixpt_div_int( |
1985 |
+- dc_fixpt_add_int(data->ratios.horz_c, data->taps.h_taps_c + 1), 2)), 19); |
1986 |
+- |
1987 |
+- data->inits.v = dc_fixpt_truncate(dc_fixpt_div_int( |
1988 |
+- dc_fixpt_add_int(data->ratios.vert, data->taps.v_taps + 1), 2), 19); |
1989 |
+- |
1990 |
+- data->inits.v_c = dc_fixpt_truncate(dc_fixpt_add(data->inits.v_c, dc_fixpt_div_int( |
1991 |
+- dc_fixpt_add_int(data->ratios.vert_c, data->taps.v_taps_c + 1), 2)), 19); |
1992 |
+- |
1993 |
+- /* |
1994 |
+- * Taps, inits and scaling ratios are in recout space need to rotate |
1995 |
+- * to viewport rotation before adjustment |
1996 |
+- */ |
1997 |
+- adjust_vp_and_init_for_seamless_clip( |
1998 |
++ calculate_init_and_vp( |
1999 |
+ flip_horz_scan_dir, |
2000 |
+- recout_skip_h, |
2001 |
+- surf_size_h, |
2002 |
+- orthogonal_rotation ? data->taps.v_taps : data->taps.h_taps, |
2003 |
+- orthogonal_rotation ? data->ratios.vert : data->ratios.horz, |
2004 |
+- orthogonal_rotation ? &data->inits.v : &data->inits.h, |
2005 |
++ ro_lb, |
2006 |
++ data->recout.width, |
2007 |
++ src.width, |
2008 |
++ data->taps.h_taps, |
2009 |
++ data->ratios.horz, |
2010 |
++ &data->inits.h, |
2011 |
+ &data->viewport.x, |
2012 |
+ &data->viewport.width); |
2013 |
+- adjust_vp_and_init_for_seamless_clip( |
2014 |
++ calculate_init_and_vp( |
2015 |
+ flip_horz_scan_dir, |
2016 |
+- recout_skip_h, |
2017 |
+- surf_size_h / vpc_div, |
2018 |
+- orthogonal_rotation ? data->taps.v_taps_c : data->taps.h_taps_c, |
2019 |
+- orthogonal_rotation ? data->ratios.vert_c : data->ratios.horz_c, |
2020 |
+- orthogonal_rotation ? &data->inits.v_c : &data->inits.h_c, |
2021 |
++ ro_lb, |
2022 |
++ data->recout.width, |
2023 |
++ src.width / vpc_div, |
2024 |
++ data->taps.h_taps_c, |
2025 |
++ data->ratios.horz_c, |
2026 |
++ &data->inits.h_c, |
2027 |
+ &data->viewport_c.x, |
2028 |
+ &data->viewport_c.width); |
2029 |
+- adjust_vp_and_init_for_seamless_clip( |
2030 |
++ calculate_init_and_vp( |
2031 |
+ flip_vert_scan_dir, |
2032 |
+- recout_skip_v, |
2033 |
+- surf_size_v, |
2034 |
+- orthogonal_rotation ? data->taps.h_taps : data->taps.v_taps, |
2035 |
+- orthogonal_rotation ? data->ratios.horz : data->ratios.vert, |
2036 |
+- orthogonal_rotation ? &data->inits.h : &data->inits.v, |
2037 |
++ ro_tb, |
2038 |
++ data->recout.height, |
2039 |
++ src.height, |
2040 |
++ data->taps.v_taps, |
2041 |
++ data->ratios.vert, |
2042 |
++ &data->inits.v, |
2043 |
+ &data->viewport.y, |
2044 |
+ &data->viewport.height); |
2045 |
+- adjust_vp_and_init_for_seamless_clip( |
2046 |
++ calculate_init_and_vp( |
2047 |
+ flip_vert_scan_dir, |
2048 |
+- recout_skip_v, |
2049 |
+- surf_size_v / vpc_div, |
2050 |
+- orthogonal_rotation ? data->taps.h_taps_c : data->taps.v_taps_c, |
2051 |
+- orthogonal_rotation ? data->ratios.horz_c : data->ratios.vert_c, |
2052 |
+- orthogonal_rotation ? &data->inits.h_c : &data->inits.v_c, |
2053 |
++ ro_tb, |
2054 |
++ data->recout.height, |
2055 |
++ src.height / vpc_div, |
2056 |
++ data->taps.v_taps_c, |
2057 |
++ data->ratios.vert_c, |
2058 |
++ &data->inits.v_c, |
2059 |
+ &data->viewport_c.y, |
2060 |
+ &data->viewport_c.height); |
2061 |
+- |
2062 |
+- /* Interlaced inits based on final vert inits */ |
2063 |
+- data->inits.v_bot = dc_fixpt_add(data->inits.v, data->ratios.vert); |
2064 |
+- data->inits.v_c_bot = dc_fixpt_add(data->inits.v_c, data->ratios.vert_c); |
2065 |
+- |
2066 |
+-} |
2067 |
+- |
2068 |
+-/* |
2069 |
+- * When handling 270 rotation in mixed SLS mode, we have |
2070 |
+- * stream->timing.h_border_left that is non zero. If we are doing |
2071 |
+- * pipe-splitting, this h_border_left value gets added to recout.x and when it |
2072 |
+- * calls calculate_inits_and_adj_vp() and |
2073 |
+- * adjust_vp_and_init_for_seamless_clip(), it can cause viewport.height for a |
2074 |
+- * pipe to be incorrect. |
2075 |
+- * |
2076 |
+- * To fix this, instead of using stream->timing.h_border_left, we can use |
2077 |
+- * stream->dst.x to represent the border instead. So we will set h_border_left |
2078 |
+- * to 0 and shift the appropriate amount in stream->dst.x. We will then |
2079 |
+- * perform all calculations in resource_build_scaling_params() based on this |
2080 |
+- * and then restore the h_border_left and stream->dst.x to their original |
2081 |
+- * values. |
2082 |
+- * |
2083 |
+- * shift_border_left_to_dst() will shift the amount of h_border_left to |
2084 |
+- * stream->dst.x and set h_border_left to 0. restore_border_left_from_dst() |
2085 |
+- * will restore h_border_left and stream->dst.x back to their original values |
2086 |
+- * We also need to make sure pipe_ctx->plane_res.scl_data.h_active uses the |
2087 |
+- * original h_border_left value in its calculation. |
2088 |
+- */ |
2089 |
+-static int shift_border_left_to_dst(struct pipe_ctx *pipe_ctx) |
2090 |
+-{ |
2091 |
+- int store_h_border_left = pipe_ctx->stream->timing.h_border_left; |
2092 |
+- |
2093 |
+- if (store_h_border_left) { |
2094 |
+- pipe_ctx->stream->timing.h_border_left = 0; |
2095 |
+- pipe_ctx->stream->dst.x += store_h_border_left; |
2096 |
++ if (orthogonal_rotation) { |
2097 |
++ swap(data->viewport.x, data->viewport.y); |
2098 |
++ swap(data->viewport.width, data->viewport.height); |
2099 |
++ swap(data->viewport_c.x, data->viewport_c.y); |
2100 |
++ swap(data->viewport_c.width, data->viewport_c.height); |
2101 |
+ } |
2102 |
+- return store_h_border_left; |
2103 |
+-} |
2104 |
+- |
2105 |
+-static void restore_border_left_from_dst(struct pipe_ctx *pipe_ctx, |
2106 |
+- int store_h_border_left) |
2107 |
+-{ |
2108 |
+- pipe_ctx->stream->dst.x -= store_h_border_left; |
2109 |
+- pipe_ctx->stream->timing.h_border_left = store_h_border_left; |
2110 |
++ data->viewport.x += src.x; |
2111 |
++ data->viewport.y += src.y; |
2112 |
++ ASSERT(src.x % vpc_div == 0 && src.y % vpc_div == 0); |
2113 |
++ data->viewport_c.x += src.x / vpc_div; |
2114 |
++ data->viewport_c.y += src.y / vpc_div; |
2115 |
+ } |
2116 |
+ |
2117 |
+ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx) |
2118 |
+@@ -1140,48 +963,42 @@ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx) |
2119 |
+ const struct dc_plane_state *plane_state = pipe_ctx->plane_state; |
2120 |
+ struct dc_crtc_timing *timing = &pipe_ctx->stream->timing; |
2121 |
+ bool res = false; |
2122 |
+- int store_h_border_left = shift_border_left_to_dst(pipe_ctx); |
2123 |
+ DC_LOGGER_INIT(pipe_ctx->stream->ctx->logger); |
2124 |
+- /* Important: scaling ratio calculation requires pixel format, |
2125 |
+- * lb depth calculation requires recout and taps require scaling ratios. |
2126 |
+- * Inits require viewport, taps, ratios and recout of split pipe |
2127 |
+- */ |
2128 |
++ |
2129 |
+ pipe_ctx->plane_res.scl_data.format = convert_pixel_format_to_dalsurface( |
2130 |
+ pipe_ctx->plane_state->format); |
2131 |
+ |
2132 |
+- calculate_scaling_ratios(pipe_ctx); |
2133 |
+- |
2134 |
+- calculate_viewport(pipe_ctx); |
2135 |
++ /* Timing borders are part of vactive that we are also supposed to skip in addition |
2136 |
++ * to any stream dst offset. Since dm logic assumes dst is in addressable |
2137 |
++ * space we need to add the the left and top borders to dst offsets temporarily. |
2138 |
++ * TODO: fix in DM, stream dst is supposed to be in vactive |
2139 |
++ */ |
2140 |
++ pipe_ctx->stream->dst.x += timing->h_border_left; |
2141 |
++ pipe_ctx->stream->dst.y += timing->v_border_top; |
2142 |
+ |
2143 |
+- if (pipe_ctx->plane_res.scl_data.viewport.height < MIN_VIEWPORT_SIZE || |
2144 |
+- pipe_ctx->plane_res.scl_data.viewport.width < MIN_VIEWPORT_SIZE) { |
2145 |
+- if (store_h_border_left) { |
2146 |
+- restore_border_left_from_dst(pipe_ctx, |
2147 |
+- store_h_border_left); |
2148 |
+- } |
2149 |
+- return false; |
2150 |
+- } |
2151 |
++ /* Calculate H and V active size */ |
2152 |
++ pipe_ctx->plane_res.scl_data.h_active = timing->h_addressable + |
2153 |
++ timing->h_border_left + timing->h_border_right; |
2154 |
++ pipe_ctx->plane_res.scl_data.v_active = timing->v_addressable + |
2155 |
++ timing->v_border_top + timing->v_border_bottom; |
2156 |
++ if (pipe_ctx->next_odm_pipe || pipe_ctx->prev_odm_pipe) |
2157 |
++ pipe_ctx->plane_res.scl_data.h_active /= get_num_odm_splits(pipe_ctx) + 1; |
2158 |
+ |
2159 |
++ /* depends on h_active */ |
2160 |
+ calculate_recout(pipe_ctx); |
2161 |
++ /* depends on pixel format */ |
2162 |
++ calculate_scaling_ratios(pipe_ctx); |
2163 |
++ /* depends on scaling ratios and recout, does not calculate offset yet */ |
2164 |
++ calculate_viewport_size(pipe_ctx); |
2165 |
+ |
2166 |
+- /** |
2167 |
++ /* |
2168 |
++ * LB calculations depend on vp size, h/v_active and scaling ratios |
2169 |
+ * Setting line buffer pixel depth to 24bpp yields banding |
2170 |
+ * on certain displays, such as the Sharp 4k |
2171 |
+ */ |
2172 |
+ pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_30BPP; |
2173 |
+ pipe_ctx->plane_res.scl_data.lb_params.alpha_en = plane_state->per_pixel_alpha; |
2174 |
+ |
2175 |
+- pipe_ctx->plane_res.scl_data.recout.x += timing->h_border_left; |
2176 |
+- pipe_ctx->plane_res.scl_data.recout.y += timing->v_border_top; |
2177 |
+- |
2178 |
+- pipe_ctx->plane_res.scl_data.h_active = timing->h_addressable + |
2179 |
+- store_h_border_left + timing->h_border_right; |
2180 |
+- pipe_ctx->plane_res.scl_data.v_active = timing->v_addressable + |
2181 |
+- timing->v_border_top + timing->v_border_bottom; |
2182 |
+- if (pipe_ctx->next_odm_pipe || pipe_ctx->prev_odm_pipe) |
2183 |
+- pipe_ctx->plane_res.scl_data.h_active /= get_num_odm_splits(pipe_ctx) + 1; |
2184 |
+- |
2185 |
+- /* Taps calculations */ |
2186 |
+ if (pipe_ctx->plane_res.xfm != NULL) |
2187 |
+ res = pipe_ctx->plane_res.xfm->funcs->transform_get_optimal_number_of_taps( |
2188 |
+ pipe_ctx->plane_res.xfm, &pipe_ctx->plane_res.scl_data, &plane_state->scaling_quality); |
2189 |
+@@ -1208,9 +1025,31 @@ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx) |
2190 |
+ &plane_state->scaling_quality); |
2191 |
+ } |
2192 |
+ |
2193 |
++ /* |
2194 |
++ * Depends on recout, scaling ratios, h_active and taps |
2195 |
++ * May need to re-check lb size after this in some obscure scenario |
2196 |
++ */ |
2197 |
+ if (res) |
2198 |
+- /* May need to re-check lb size after this in some obscure scenario */ |
2199 |
+- calculate_inits_and_adj_vp(pipe_ctx); |
2200 |
++ calculate_inits_and_viewports(pipe_ctx); |
2201 |
++ |
2202 |
++ /* |
2203 |
++ * Handle side by side and top bottom 3d recout offsets after vp calculation |
2204 |
++ * since 3d is special and needs to calculate vp as if there is no recout offset |
2205 |
++ * This may break with rotation, good thing we aren't mixing hw rotation and 3d |
2206 |
++ */ |
2207 |
++ if (pipe_ctx->top_pipe && pipe_ctx->top_pipe->plane_state == plane_state) { |
2208 |
++ ASSERT(plane_state->rotation == ROTATION_ANGLE_0 || |
2209 |
++ (pipe_ctx->stream->view_format != VIEW_3D_FORMAT_TOP_AND_BOTTOM && |
2210 |
++ pipe_ctx->stream->view_format != VIEW_3D_FORMAT_SIDE_BY_SIDE)); |
2211 |
++ if (pipe_ctx->stream->view_format == VIEW_3D_FORMAT_TOP_AND_BOTTOM) |
2212 |
++ pipe_ctx->plane_res.scl_data.recout.y += pipe_ctx->plane_res.scl_data.recout.height; |
2213 |
++ else if (pipe_ctx->stream->view_format == VIEW_3D_FORMAT_SIDE_BY_SIDE) |
2214 |
++ pipe_ctx->plane_res.scl_data.recout.x += pipe_ctx->plane_res.scl_data.recout.width; |
2215 |
++ } |
2216 |
++ |
2217 |
++ if (pipe_ctx->plane_res.scl_data.viewport.height < MIN_VIEWPORT_SIZE || |
2218 |
++ pipe_ctx->plane_res.scl_data.viewport.width < MIN_VIEWPORT_SIZE) |
2219 |
++ res = false; |
2220 |
+ |
2221 |
+ DC_LOG_SCALER("%s pipe %d:\nViewport: height:%d width:%d x:%d y:%d Recout: height:%d width:%d x:%d y:%d HACTIVE:%d VACTIVE:%d\n" |
2222 |
+ "src_rect: height:%d width:%d x:%d y:%d dst_rect: height:%d width:%d x:%d y:%d clip_rect: height:%d width:%d x:%d y:%d\n", |
2223 |
+@@ -1239,8 +1078,8 @@ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx) |
2224 |
+ plane_state->clip_rect.x, |
2225 |
+ plane_state->clip_rect.y); |
2226 |
+ |
2227 |
+- if (store_h_border_left) |
2228 |
+- restore_border_left_from_dst(pipe_ctx, store_h_border_left); |
2229 |
++ pipe_ctx->stream->dst.x -= timing->h_border_left; |
2230 |
++ pipe_ctx->stream->dst.y -= timing->v_border_top; |
2231 |
+ |
2232 |
+ return res; |
2233 |
+ } |
2234 |
+diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h |
2235 |
+index 80757a0ea7c65..2c3ce5d657180 100644 |
2236 |
+--- a/drivers/gpu/drm/amd/display/dc/dc_types.h |
2237 |
++++ b/drivers/gpu/drm/amd/display/dc/dc_types.h |
2238 |
+@@ -270,11 +270,6 @@ struct dc_edid_caps { |
2239 |
+ struct dc_panel_patch panel_patch; |
2240 |
+ }; |
2241 |
+ |
2242 |
+-struct view { |
2243 |
+- uint32_t width; |
2244 |
+- uint32_t height; |
2245 |
+-}; |
2246 |
+- |
2247 |
+ struct dc_mode_flags { |
2248 |
+ /* note: part of refresh rate flag*/ |
2249 |
+ uint32_t INTERLACE :1; |
2250 |
+diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c |
2251 |
+index efa86d5c68470..a33f522a2648a 100644 |
2252 |
+--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c |
2253 |
++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c |
2254 |
+@@ -496,10 +496,13 @@ static enum lb_memory_config dpp1_dscl_find_lb_memory_config(struct dcn10_dpp *d |
2255 |
+ int vtaps_c = scl_data->taps.v_taps_c; |
2256 |
+ int ceil_vratio = dc_fixpt_ceil(scl_data->ratios.vert); |
2257 |
+ int ceil_vratio_c = dc_fixpt_ceil(scl_data->ratios.vert_c); |
2258 |
+- enum lb_memory_config mem_cfg = LB_MEMORY_CONFIG_0; |
2259 |
+ |
2260 |
+- if (dpp->base.ctx->dc->debug.use_max_lb) |
2261 |
+- return mem_cfg; |
2262 |
++ if (dpp->base.ctx->dc->debug.use_max_lb) { |
2263 |
++ if (scl_data->format == PIXEL_FORMAT_420BPP8 |
2264 |
++ || scl_data->format == PIXEL_FORMAT_420BPP10) |
2265 |
++ return LB_MEMORY_CONFIG_3; |
2266 |
++ return LB_MEMORY_CONFIG_0; |
2267 |
++ } |
2268 |
+ |
2269 |
+ dpp->base.caps->dscl_calc_lb_num_partitions( |
2270 |
+ scl_data, LB_MEMORY_CONFIG_1, &num_part_y, &num_part_c); |
2271 |
+@@ -628,8 +631,10 @@ static void dpp1_dscl_set_manual_ratio_init( |
2272 |
+ SCL_V_INIT_INT, init_int); |
2273 |
+ |
2274 |
+ if (REG(SCL_VERT_FILTER_INIT_BOT)) { |
2275 |
+- init_frac = dc_fixpt_u0d19(data->inits.v_bot) << 5; |
2276 |
+- init_int = dc_fixpt_floor(data->inits.v_bot); |
2277 |
++ struct fixed31_32 bot = dc_fixpt_add(data->inits.v, data->ratios.vert); |
2278 |
++ |
2279 |
++ init_frac = dc_fixpt_u0d19(bot) << 5; |
2280 |
++ init_int = dc_fixpt_floor(bot); |
2281 |
+ REG_SET_2(SCL_VERT_FILTER_INIT_BOT, 0, |
2282 |
+ SCL_V_INIT_FRAC_BOT, init_frac, |
2283 |
+ SCL_V_INIT_INT_BOT, init_int); |
2284 |
+@@ -642,8 +647,10 @@ static void dpp1_dscl_set_manual_ratio_init( |
2285 |
+ SCL_V_INIT_INT_C, init_int); |
2286 |
+ |
2287 |
+ if (REG(SCL_VERT_FILTER_INIT_BOT_C)) { |
2288 |
+- init_frac = dc_fixpt_u0d19(data->inits.v_c_bot) << 5; |
2289 |
+- init_int = dc_fixpt_floor(data->inits.v_c_bot); |
2290 |
++ struct fixed31_32 bot = dc_fixpt_add(data->inits.v_c, data->ratios.vert_c); |
2291 |
++ |
2292 |
++ init_frac = dc_fixpt_u0d19(bot) << 5; |
2293 |
++ init_int = dc_fixpt_floor(bot); |
2294 |
+ REG_SET_2(SCL_VERT_FILTER_INIT_BOT_C, 0, |
2295 |
+ SCL_V_INIT_FRAC_BOT_C, init_frac, |
2296 |
+ SCL_V_INIT_INT_BOT_C, init_int); |
2297 |
+diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c |
2298 |
+index aece1103331dd..d8a03d8256235 100644 |
2299 |
+--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c |
2300 |
++++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c |
2301 |
+@@ -243,7 +243,7 @@ void dcn20_dccg_init(struct dce_hwseq *hws) |
2302 |
+ REG_WRITE(MILLISECOND_TIME_BASE_DIV, 0x1186a0); |
2303 |
+ |
2304 |
+ /* This value is dependent on the hardware pipeline delay so set once per SOC */ |
2305 |
+- REG_WRITE(DISPCLK_FREQ_CHANGE_CNTL, 0x801003c); |
2306 |
++ REG_WRITE(DISPCLK_FREQ_CHANGE_CNTL, 0xe01003c); |
2307 |
+ } |
2308 |
+ |
2309 |
+ void dcn20_disable_vga( |
2310 |
+diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c |
2311 |
+index 3e3c898848bd8..2b6eb8c5614b8 100644 |
2312 |
+--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c |
2313 |
++++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c |
2314 |
+@@ -2284,12 +2284,14 @@ int dcn20_populate_dml_pipes_from_context( |
2315 |
+ |
2316 |
+ pipes[pipe_cnt].pipe.src.source_scan = pln->rotation == ROTATION_ANGLE_90 |
2317 |
+ || pln->rotation == ROTATION_ANGLE_270 ? dm_vert : dm_horz; |
2318 |
+- pipes[pipe_cnt].pipe.src.viewport_y_y = scl->viewport_unadjusted.y; |
2319 |
+- pipes[pipe_cnt].pipe.src.viewport_y_c = scl->viewport_c_unadjusted.y; |
2320 |
+- pipes[pipe_cnt].pipe.src.viewport_width = scl->viewport_unadjusted.width; |
2321 |
+- pipes[pipe_cnt].pipe.src.viewport_width_c = scl->viewport_c_unadjusted.width; |
2322 |
+- pipes[pipe_cnt].pipe.src.viewport_height = scl->viewport_unadjusted.height; |
2323 |
+- pipes[pipe_cnt].pipe.src.viewport_height_c = scl->viewport_c_unadjusted.height; |
2324 |
++ pipes[pipe_cnt].pipe.src.viewport_y_y = scl->viewport.y; |
2325 |
++ pipes[pipe_cnt].pipe.src.viewport_y_c = scl->viewport_c.y; |
2326 |
++ pipes[pipe_cnt].pipe.src.viewport_width = scl->viewport.width; |
2327 |
++ pipes[pipe_cnt].pipe.src.viewport_width_c = scl->viewport_c.width; |
2328 |
++ pipes[pipe_cnt].pipe.src.viewport_height = scl->viewport.height; |
2329 |
++ pipes[pipe_cnt].pipe.src.viewport_height_c = scl->viewport_c.height; |
2330 |
++ pipes[pipe_cnt].pipe.src.viewport_width_max = pln->src_rect.width; |
2331 |
++ pipes[pipe_cnt].pipe.src.viewport_height_max = pln->src_rect.height; |
2332 |
+ pipes[pipe_cnt].pipe.src.surface_width_y = pln->plane_size.surface_size.width; |
2333 |
+ pipes[pipe_cnt].pipe.src.surface_height_y = pln->plane_size.surface_size.height; |
2334 |
+ pipes[pipe_cnt].pipe.src.surface_width_c = pln->plane_size.chroma_size.width; |
2335 |
+diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c |
2336 |
+index bc07082c13575..6e326290f2147 100644 |
2337 |
+--- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c |
2338 |
++++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c |
2339 |
+@@ -64,6 +64,7 @@ typedef struct { |
2340 |
+ #define BPP_INVALID 0 |
2341 |
+ #define BPP_BLENDED_PIPE 0xffffffff |
2342 |
+ #define DCN30_MAX_DSC_IMAGE_WIDTH 5184 |
2343 |
++#define DCN30_MAX_FMT_420_BUFFER_WIDTH 4096 |
2344 |
+ |
2345 |
+ static void DisplayPipeConfiguration(struct display_mode_lib *mode_lib); |
2346 |
+ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation( |
2347 |
+@@ -2052,7 +2053,7 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman |
2348 |
+ v->DISPCLKWithoutRamping, |
2349 |
+ v->DISPCLKDPPCLKVCOSpeed); |
2350 |
+ v->MaxDispclkRoundedToDFSGranularity = RoundToDFSGranularityDown( |
2351 |
+- v->soc.clock_limits[mode_lib->soc.num_states].dispclk_mhz, |
2352 |
++ v->soc.clock_limits[mode_lib->soc.num_states - 1].dispclk_mhz, |
2353 |
+ v->DISPCLKDPPCLKVCOSpeed); |
2354 |
+ if (v->DISPCLKWithoutRampingRoundedToDFSGranularity |
2355 |
+ > v->MaxDispclkRoundedToDFSGranularity) { |
2356 |
+@@ -3957,20 +3958,20 @@ void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l |
2357 |
+ for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) { |
2358 |
+ v->PlaneRequiredDISPCLKWithoutODMCombine = v->PixelClock[k] * (1.0 + v->DISPCLKDPPCLKDSCCLKDownSpreading / 100.0) |
2359 |
+ * (1.0 + v->DISPCLKRampingMargin / 100.0); |
2360 |
+- if ((v->PlaneRequiredDISPCLKWithoutODMCombine >= v->MaxDispclk[i] && v->MaxDispclk[i] == v->MaxDispclk[mode_lib->soc.num_states] |
2361 |
+- && v->MaxDppclk[i] == v->MaxDppclk[mode_lib->soc.num_states])) { |
2362 |
++ if ((v->PlaneRequiredDISPCLKWithoutODMCombine >= v->MaxDispclk[i] && v->MaxDispclk[i] == v->MaxDispclk[mode_lib->soc.num_states - 1] |
2363 |
++ && v->MaxDppclk[i] == v->MaxDppclk[mode_lib->soc.num_states - 1])) { |
2364 |
+ v->PlaneRequiredDISPCLKWithoutODMCombine = v->PixelClock[k] * (1 + v->DISPCLKDPPCLKDSCCLKDownSpreading / 100.0); |
2365 |
+ } |
2366 |
+ v->PlaneRequiredDISPCLKWithODMCombine2To1 = v->PixelClock[k] / 2 * (1 + v->DISPCLKDPPCLKDSCCLKDownSpreading / 100.0) |
2367 |
+ * (1 + v->DISPCLKRampingMargin / 100.0); |
2368 |
+- if ((v->PlaneRequiredDISPCLKWithODMCombine2To1 >= v->MaxDispclk[i] && v->MaxDispclk[i] == v->MaxDispclk[mode_lib->soc.num_states] |
2369 |
+- && v->MaxDppclk[i] == v->MaxDppclk[mode_lib->soc.num_states])) { |
2370 |
++ if ((v->PlaneRequiredDISPCLKWithODMCombine2To1 >= v->MaxDispclk[i] && v->MaxDispclk[i] == v->MaxDispclk[mode_lib->soc.num_states - 1] |
2371 |
++ && v->MaxDppclk[i] == v->MaxDppclk[mode_lib->soc.num_states - 1])) { |
2372 |
+ v->PlaneRequiredDISPCLKWithODMCombine2To1 = v->PixelClock[k] / 2 * (1 + v->DISPCLKDPPCLKDSCCLKDownSpreading / 100.0); |
2373 |
+ } |
2374 |
+ v->PlaneRequiredDISPCLKWithODMCombine4To1 = v->PixelClock[k] / 4 * (1 + v->DISPCLKDPPCLKDSCCLKDownSpreading / 100.0) |
2375 |
+ * (1 + v->DISPCLKRampingMargin / 100.0); |
2376 |
+- if ((v->PlaneRequiredDISPCLKWithODMCombine4To1 >= v->MaxDispclk[i] && v->MaxDispclk[i] == v->MaxDispclk[mode_lib->soc.num_states] |
2377 |
+- && v->MaxDppclk[i] == v->MaxDppclk[mode_lib->soc.num_states])) { |
2378 |
++ if ((v->PlaneRequiredDISPCLKWithODMCombine4To1 >= v->MaxDispclk[i] && v->MaxDispclk[i] == v->MaxDispclk[mode_lib->soc.num_states - 1] |
2379 |
++ && v->MaxDppclk[i] == v->MaxDppclk[mode_lib->soc.num_states - 1])) { |
2380 |
+ v->PlaneRequiredDISPCLKWithODMCombine4To1 = v->PixelClock[k] / 4 * (1 + v->DISPCLKDPPCLKDSCCLKDownSpreading / 100.0); |
2381 |
+ } |
2382 |
+ |
2383 |
+@@ -3987,19 +3988,30 @@ void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l |
2384 |
+ } else if (v->PlaneRequiredDISPCLKWithoutODMCombine > v->MaxDispclkRoundedDownToDFSGranularity) { |
2385 |
+ v->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_2to1; |
2386 |
+ v->PlaneRequiredDISPCLK = v->PlaneRequiredDISPCLKWithODMCombine2To1; |
2387 |
+- } else if (v->DSCEnabled[k] && (v->HActive[k] > DCN30_MAX_DSC_IMAGE_WIDTH)) { |
2388 |
+- v->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_2to1; |
2389 |
+- v->PlaneRequiredDISPCLK = v->PlaneRequiredDISPCLKWithODMCombine2To1; |
2390 |
+ } else { |
2391 |
+ v->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_disabled; |
2392 |
+ v->PlaneRequiredDISPCLK = v->PlaneRequiredDISPCLKWithoutODMCombine; |
2393 |
+- /*420 format workaround*/ |
2394 |
+- if (v->HActive[k] > 4096 && v->OutputFormat[k] == dm_420) { |
2395 |
++ } |
2396 |
++ if (v->DSCEnabled[k] && v->HActive[k] > DCN30_MAX_DSC_IMAGE_WIDTH |
2397 |
++ && v->ODMCombineEnablePerState[i][k] != dm_odm_combine_mode_4to1) { |
2398 |
++ if (v->HActive[k] / 2 > DCN30_MAX_DSC_IMAGE_WIDTH) { |
2399 |
++ v->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_4to1; |
2400 |
++ v->PlaneRequiredDISPCLK = v->PlaneRequiredDISPCLKWithODMCombine4To1; |
2401 |
++ } else { |
2402 |
++ v->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_2to1; |
2403 |
++ v->PlaneRequiredDISPCLK = v->PlaneRequiredDISPCLKWithODMCombine2To1; |
2404 |
++ } |
2405 |
++ } |
2406 |
++ if (v->OutputFormat[k] == dm_420 && v->HActive[k] > DCN30_MAX_FMT_420_BUFFER_WIDTH |
2407 |
++ && v->ODMCombineEnablePerState[i][k] != dm_odm_combine_mode_4to1) { |
2408 |
++ if (v->HActive[k] / 2 > DCN30_MAX_FMT_420_BUFFER_WIDTH) { |
2409 |
++ v->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_4to1; |
2410 |
++ v->PlaneRequiredDISPCLK = v->PlaneRequiredDISPCLKWithODMCombine4To1; |
2411 |
++ } else { |
2412 |
+ v->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_2to1; |
2413 |
+ v->PlaneRequiredDISPCLK = v->PlaneRequiredDISPCLKWithODMCombine2To1; |
2414 |
+ } |
2415 |
+ } |
2416 |
+- |
2417 |
+ if (v->ODMCombineEnablePerState[i][k] == dm_odm_combine_mode_4to1) { |
2418 |
+ v->MPCCombine[i][j][k] = false; |
2419 |
+ v->NoOfDPP[i][j][k] = 4; |
2420 |
+@@ -4281,42 +4293,8 @@ void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l |
2421 |
+ } |
2422 |
+ } |
2423 |
+ |
2424 |
+- for (i = 0; i < v->soc.num_states; i++) { |
2425 |
+- v->DSCCLKRequiredMoreThanSupported[i] = false; |
2426 |
+- for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) { |
2427 |
+- if (v->BlendingAndTiming[k] == k) { |
2428 |
+- if (v->Output[k] == dm_dp || v->Output[k] == dm_edp) { |
2429 |
+- if (v->OutputFormat[k] == dm_420) { |
2430 |
+- v->DSCFormatFactor = 2; |
2431 |
+- } else if (v->OutputFormat[k] == dm_444) { |
2432 |
+- v->DSCFormatFactor = 1; |
2433 |
+- } else if (v->OutputFormat[k] == dm_n422) { |
2434 |
+- v->DSCFormatFactor = 2; |
2435 |
+- } else { |
2436 |
+- v->DSCFormatFactor = 1; |
2437 |
+- } |
2438 |
+- if (v->RequiresDSC[i][k] == true) { |
2439 |
+- if (v->ODMCombineEnablePerState[i][k] == dm_odm_combine_mode_4to1) { |
2440 |
+- if (v->PixelClockBackEnd[k] / 12.0 / v->DSCFormatFactor |
2441 |
+- > (1.0 - v->DISPCLKDPPCLKDSCCLKDownSpreading / 100.0) * v->MaxDSCCLK[i]) { |
2442 |
+- v->DSCCLKRequiredMoreThanSupported[i] = true; |
2443 |
+- } |
2444 |
+- } else if (v->ODMCombineEnablePerState[i][k] == dm_odm_combine_mode_2to1) { |
2445 |
+- if (v->PixelClockBackEnd[k] / 6.0 / v->DSCFormatFactor |
2446 |
+- > (1.0 - v->DISPCLKDPPCLKDSCCLKDownSpreading / 100.0) * v->MaxDSCCLK[i]) { |
2447 |
+- v->DSCCLKRequiredMoreThanSupported[i] = true; |
2448 |
+- } |
2449 |
+- } else { |
2450 |
+- if (v->PixelClockBackEnd[k] / 3.0 / v->DSCFormatFactor |
2451 |
+- > (1.0 - v->DISPCLKDPPCLKDSCCLKDownSpreading / 100.0) * v->MaxDSCCLK[i]) { |
2452 |
+- v->DSCCLKRequiredMoreThanSupported[i] = true; |
2453 |
+- } |
2454 |
+- } |
2455 |
+- } |
2456 |
+- } |
2457 |
+- } |
2458 |
+- } |
2459 |
+- } |
2460 |
++ /* Skip dscclk validation: as long as dispclk is supported, dscclk is also implicitly supported */ |
2461 |
++ |
2462 |
+ for (i = 0; i < v->soc.num_states; i++) { |
2463 |
+ v->NotEnoughDSCUnits[i] = false; |
2464 |
+ v->TotalDSCUnitsRequired = 0.0; |
2465 |
+@@ -5319,7 +5297,7 @@ void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l |
2466 |
+ for (j = 0; j < 2; j++) { |
2467 |
+ if (v->ScaleRatioAndTapsSupport == 1 && v->SourceFormatPixelAndScanSupport == 1 && v->ViewportSizeSupport[i][j] == 1 |
2468 |
+ && v->DIOSupport[i] == 1 && v->ODMCombine4To1SupportCheckOK[i] == 1 |
2469 |
+- && v->NotEnoughDSCUnits[i] == 0 && v->DSCCLKRequiredMoreThanSupported[i] == 0 |
2470 |
++ && v->NotEnoughDSCUnits[i] == 0 |
2471 |
+ && v->DTBCLKRequiredMoreThanSupported[i] == 0 |
2472 |
+ && v->ROBSupport[i][j] == 1 && v->DISPCLK_DPPCLK_Support[i][j] == 1 && v->TotalAvailablePipesSupport[i][j] == 1 |
2473 |
+ && EnoughWritebackUnits == 1 && WritebackModeSupport == 1 |
2474 |
+diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h b/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h |
2475 |
+index 0c5128187e089..ea01994a61338 100644 |
2476 |
+--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h |
2477 |
++++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h |
2478 |
+@@ -253,6 +253,8 @@ struct _vcs_dpi_display_pipe_source_params_st { |
2479 |
+ unsigned int viewport_y_c; |
2480 |
+ unsigned int viewport_width_c; |
2481 |
+ unsigned int viewport_height_c; |
2482 |
++ unsigned int viewport_width_max; |
2483 |
++ unsigned int viewport_height_max; |
2484 |
+ unsigned int data_pitch; |
2485 |
+ unsigned int data_pitch_c; |
2486 |
+ unsigned int meta_pitch; |
2487 |
+diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c |
2488 |
+index bc0485a59018a..c1bf3cab2f156 100644 |
2489 |
+--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c |
2490 |
++++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c |
2491 |
+@@ -627,6 +627,19 @@ static void fetch_pipe_params(struct display_mode_lib *mode_lib) |
2492 |
+ } |
2493 |
+ } |
2494 |
+ } |
2495 |
++ if (src->viewport_width_max) { |
2496 |
++ int hdiv_c = src->source_format >= dm_420_8 && src->source_format <= dm_422_10 ? 2 : 1; |
2497 |
++ int vdiv_c = src->source_format >= dm_420_8 && src->source_format <= dm_420_12 ? 2 : 1; |
2498 |
++ |
2499 |
++ if (mode_lib->vba.ViewportWidth[mode_lib->vba.NumberOfActivePlanes] > src->viewport_width_max) |
2500 |
++ mode_lib->vba.ViewportWidth[mode_lib->vba.NumberOfActivePlanes] = src->viewport_width_max; |
2501 |
++ if (mode_lib->vba.ViewportHeight[mode_lib->vba.NumberOfActivePlanes] > src->viewport_height_max) |
2502 |
++ mode_lib->vba.ViewportHeight[mode_lib->vba.NumberOfActivePlanes] = src->viewport_height_max; |
2503 |
++ if (mode_lib->vba.ViewportWidthChroma[mode_lib->vba.NumberOfActivePlanes] > src->viewport_width_max / hdiv_c) |
2504 |
++ mode_lib->vba.ViewportWidthChroma[mode_lib->vba.NumberOfActivePlanes] = src->viewport_width_max / hdiv_c; |
2505 |
++ if (mode_lib->vba.ViewportHeightChroma[mode_lib->vba.NumberOfActivePlanes] > src->viewport_height_max / vdiv_c) |
2506 |
++ mode_lib->vba.ViewportHeightChroma[mode_lib->vba.NumberOfActivePlanes] = src->viewport_height_max / vdiv_c; |
2507 |
++ } |
2508 |
+ |
2509 |
+ if (pipes[k].pipe.src.immediate_flip) { |
2510 |
+ mode_lib->vba.ImmediateFlipSupport = true; |
2511 |
+diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/transform.h b/drivers/gpu/drm/amd/display/dc/inc/hw/transform.h |
2512 |
+index 2947d1b155129..2a0db2b03047e 100644 |
2513 |
+--- a/drivers/gpu/drm/amd/display/dc/inc/hw/transform.h |
2514 |
++++ b/drivers/gpu/drm/amd/display/dc/inc/hw/transform.h |
2515 |
+@@ -162,9 +162,7 @@ struct scl_inits { |
2516 |
+ struct fixed31_32 h; |
2517 |
+ struct fixed31_32 h_c; |
2518 |
+ struct fixed31_32 v; |
2519 |
+- struct fixed31_32 v_bot; |
2520 |
+ struct fixed31_32 v_c; |
2521 |
+- struct fixed31_32 v_c_bot; |
2522 |
+ }; |
2523 |
+ |
2524 |
+ struct scaler_data { |
2525 |
+@@ -173,8 +171,6 @@ struct scaler_data { |
2526 |
+ struct scaling_taps taps; |
2527 |
+ struct rect viewport; |
2528 |
+ struct rect viewport_c; |
2529 |
+- struct rect viewport_unadjusted; |
2530 |
+- struct rect viewport_c_unadjusted; |
2531 |
+ struct rect recout; |
2532 |
+ struct scaling_ratios ratios; |
2533 |
+ struct scl_inits inits; |
2534 |
+diff --git a/drivers/gpu/drm/amd/display/dc/irq_types.h b/drivers/gpu/drm/amd/display/dc/irq_types.h |
2535 |
+index 87812d81fed3c..52fbf575e0004 100644 |
2536 |
+--- a/drivers/gpu/drm/amd/display/dc/irq_types.h |
2537 |
++++ b/drivers/gpu/drm/amd/display/dc/irq_types.h |
2538 |
+@@ -164,7 +164,7 @@ enum irq_type |
2539 |
+ }; |
2540 |
+ |
2541 |
+ #define DAL_VALID_IRQ_SRC_NUM(src) \ |
2542 |
+- ((src) <= DAL_IRQ_SOURCES_NUMBER && (src) > DC_IRQ_SOURCE_INVALID) |
2543 |
++ ((src) < DAL_IRQ_SOURCES_NUMBER && (src) > DC_IRQ_SOURCE_INVALID) |
2544 |
+ |
2545 |
+ /* Number of Page Flip IRQ Sources. */ |
2546 |
+ #define DAL_PFLIP_IRQ_SRC_NUM \ |
2547 |
+diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c |
2548 |
+index 20e554e771d16..fa8aeec304ef4 100644 |
2549 |
+--- a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c |
2550 |
++++ b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c |
2551 |
+@@ -260,7 +260,6 @@ enum mod_hdcp_status mod_hdcp_setup(struct mod_hdcp *hdcp, |
2552 |
+ struct mod_hdcp_output output; |
2553 |
+ enum mod_hdcp_status status = MOD_HDCP_STATUS_SUCCESS; |
2554 |
+ |
2555 |
+- memset(hdcp, 0, sizeof(struct mod_hdcp)); |
2556 |
+ memset(&output, 0, sizeof(output)); |
2557 |
+ hdcp->config = *config; |
2558 |
+ HDCP_TOP_INTERFACE_TRACE(hdcp); |
2559 |
+diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c |
2560 |
+index 73ca49f05bd32..eb56526ec32c6 100644 |
2561 |
+--- a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c |
2562 |
++++ b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c |
2563 |
+@@ -29,8 +29,10 @@ static inline enum mod_hdcp_status validate_bksv(struct mod_hdcp *hdcp) |
2564 |
+ { |
2565 |
+ uint64_t n = 0; |
2566 |
+ uint8_t count = 0; |
2567 |
++ u8 bksv[sizeof(n)] = { }; |
2568 |
+ |
2569 |
+- memcpy(&n, hdcp->auth.msg.hdcp1.bksv, sizeof(uint64_t)); |
2570 |
++ memcpy(bksv, hdcp->auth.msg.hdcp1.bksv, sizeof(hdcp->auth.msg.hdcp1.bksv)); |
2571 |
++ n = *(uint64_t *)bksv; |
2572 |
+ |
2573 |
+ while (n) { |
2574 |
+ count++; |
2575 |
+diff --git a/drivers/gpu/drm/amd/include/navi10_enum.h b/drivers/gpu/drm/amd/include/navi10_enum.h |
2576 |
+index d5ead9680c6ed..84bcb96f76ea4 100644 |
2577 |
+--- a/drivers/gpu/drm/amd/include/navi10_enum.h |
2578 |
++++ b/drivers/gpu/drm/amd/include/navi10_enum.h |
2579 |
+@@ -430,7 +430,7 @@ ARRAY_2D_DEPTH = 0x00000001, |
2580 |
+ */ |
2581 |
+ |
2582 |
+ typedef enum ENUM_NUM_SIMD_PER_CU { |
2583 |
+-NUM_SIMD_PER_CU = 0x00000004, |
2584 |
++NUM_SIMD_PER_CU = 0x00000002, |
2585 |
+ } ENUM_NUM_SIMD_PER_CU; |
2586 |
+ |
2587 |
+ /* |
2588 |
+diff --git a/drivers/gpu/drm/arm/malidp_planes.c b/drivers/gpu/drm/arm/malidp_planes.c |
2589 |
+index 351a85088d0ec..f1e8bc39b16d3 100644 |
2590 |
+--- a/drivers/gpu/drm/arm/malidp_planes.c |
2591 |
++++ b/drivers/gpu/drm/arm/malidp_planes.c |
2592 |
+@@ -922,6 +922,11 @@ static const struct drm_plane_helper_funcs malidp_de_plane_helper_funcs = { |
2593 |
+ .atomic_disable = malidp_de_plane_disable, |
2594 |
+ }; |
2595 |
+ |
2596 |
++static const uint64_t linear_only_modifiers[] = { |
2597 |
++ DRM_FORMAT_MOD_LINEAR, |
2598 |
++ DRM_FORMAT_MOD_INVALID |
2599 |
++}; |
2600 |
++ |
2601 |
+ int malidp_de_planes_init(struct drm_device *drm) |
2602 |
+ { |
2603 |
+ struct malidp_drm *malidp = drm->dev_private; |
2604 |
+@@ -985,8 +990,8 @@ int malidp_de_planes_init(struct drm_device *drm) |
2605 |
+ */ |
2606 |
+ ret = drm_universal_plane_init(drm, &plane->base, crtcs, |
2607 |
+ &malidp_de_plane_funcs, formats, n, |
2608 |
+- (id == DE_SMART) ? NULL : modifiers, plane_type, |
2609 |
+- NULL); |
2610 |
++ (id == DE_SMART) ? linear_only_modifiers : modifiers, |
2611 |
++ plane_type, NULL); |
2612 |
+ |
2613 |
+ if (ret < 0) |
2614 |
+ goto cleanup; |
2615 |
+diff --git a/drivers/gpu/drm/ast/ast_dp501.c b/drivers/gpu/drm/ast/ast_dp501.c |
2616 |
+index 88121c0e0d05c..cd93c44f26627 100644 |
2617 |
+--- a/drivers/gpu/drm/ast/ast_dp501.c |
2618 |
++++ b/drivers/gpu/drm/ast/ast_dp501.c |
2619 |
+@@ -189,6 +189,9 @@ bool ast_backup_fw(struct drm_device *dev, u8 *addr, u32 size) |
2620 |
+ u32 i, data; |
2621 |
+ u32 boot_address; |
2622 |
+ |
2623 |
++ if (ast->config_mode != ast_use_p2a) |
2624 |
++ return false; |
2625 |
++ |
2626 |
+ data = ast_mindwm(ast, 0x1e6e2100) & 0x01; |
2627 |
+ if (data) { |
2628 |
+ boot_address = get_fw_base(ast); |
2629 |
+@@ -207,6 +210,9 @@ static bool ast_launch_m68k(struct drm_device *dev) |
2630 |
+ u8 *fw_addr = NULL; |
2631 |
+ u8 jreg; |
2632 |
+ |
2633 |
++ if (ast->config_mode != ast_use_p2a) |
2634 |
++ return false; |
2635 |
++ |
2636 |
+ data = ast_mindwm(ast, 0x1e6e2100) & 0x01; |
2637 |
+ if (!data) { |
2638 |
+ |
2639 |
+@@ -271,25 +277,55 @@ u8 ast_get_dp501_max_clk(struct drm_device *dev) |
2640 |
+ struct ast_private *ast = to_ast_private(dev); |
2641 |
+ u32 boot_address, offset, data; |
2642 |
+ u8 linkcap[4], linkrate, linklanes, maxclk = 0xff; |
2643 |
++ u32 *plinkcap; |
2644 |
+ |
2645 |
+- boot_address = get_fw_base(ast); |
2646 |
+- |
2647 |
+- /* validate FW version */ |
2648 |
+- offset = 0xf000; |
2649 |
+- data = ast_mindwm(ast, boot_address + offset); |
2650 |
+- if ((data & 0xf0) != 0x10) /* version: 1x */ |
2651 |
+- return maxclk; |
2652 |
+- |
2653 |
+- /* Read Link Capability */ |
2654 |
+- offset = 0xf014; |
2655 |
+- *(u32 *)linkcap = ast_mindwm(ast, boot_address + offset); |
2656 |
+- if (linkcap[2] == 0) { |
2657 |
+- linkrate = linkcap[0]; |
2658 |
+- linklanes = linkcap[1]; |
2659 |
+- data = (linkrate == 0x0a) ? (90 * linklanes) : (54 * linklanes); |
2660 |
+- if (data > 0xff) |
2661 |
+- data = 0xff; |
2662 |
+- maxclk = (u8)data; |
2663 |
++ if (ast->config_mode == ast_use_p2a) { |
2664 |
++ boot_address = get_fw_base(ast); |
2665 |
++ |
2666 |
++ /* validate FW version */ |
2667 |
++ offset = AST_DP501_GBL_VERSION; |
2668 |
++ data = ast_mindwm(ast, boot_address + offset); |
2669 |
++ if ((data & AST_DP501_FW_VERSION_MASK) != AST_DP501_FW_VERSION_1) /* version: 1x */ |
2670 |
++ return maxclk; |
2671 |
++ |
2672 |
++ /* Read Link Capability */ |
2673 |
++ offset = AST_DP501_LINKRATE; |
2674 |
++ plinkcap = (u32 *)linkcap; |
2675 |
++ *plinkcap = ast_mindwm(ast, boot_address + offset); |
2676 |
++ if (linkcap[2] == 0) { |
2677 |
++ linkrate = linkcap[0]; |
2678 |
++ linklanes = linkcap[1]; |
2679 |
++ data = (linkrate == 0x0a) ? (90 * linklanes) : (54 * linklanes); |
2680 |
++ if (data > 0xff) |
2681 |
++ data = 0xff; |
2682 |
++ maxclk = (u8)data; |
2683 |
++ } |
2684 |
++ } else { |
2685 |
++ if (!ast->dp501_fw_buf) |
2686 |
++ return AST_DP501_DEFAULT_DCLK; /* 1024x768 as default */ |
2687 |
++ |
2688 |
++ /* dummy read */ |
2689 |
++ offset = 0x0000; |
2690 |
++ data = readl(ast->dp501_fw_buf + offset); |
2691 |
++ |
2692 |
++ /* validate FW version */ |
2693 |
++ offset = AST_DP501_GBL_VERSION; |
2694 |
++ data = readl(ast->dp501_fw_buf + offset); |
2695 |
++ if ((data & AST_DP501_FW_VERSION_MASK) != AST_DP501_FW_VERSION_1) /* version: 1x */ |
2696 |
++ return maxclk; |
2697 |
++ |
2698 |
++ /* Read Link Capability */ |
2699 |
++ offset = AST_DP501_LINKRATE; |
2700 |
++ plinkcap = (u32 *)linkcap; |
2701 |
++ *plinkcap = readl(ast->dp501_fw_buf + offset); |
2702 |
++ if (linkcap[2] == 0) { |
2703 |
++ linkrate = linkcap[0]; |
2704 |
++ linklanes = linkcap[1]; |
2705 |
++ data = (linkrate == 0x0a) ? (90 * linklanes) : (54 * linklanes); |
2706 |
++ if (data > 0xff) |
2707 |
++ data = 0xff; |
2708 |
++ maxclk = (u8)data; |
2709 |
++ } |
2710 |
+ } |
2711 |
+ return maxclk; |
2712 |
+ } |
2713 |
+@@ -298,26 +334,57 @@ bool ast_dp501_read_edid(struct drm_device *dev, u8 *ediddata) |
2714 |
+ { |
2715 |
+ struct ast_private *ast = to_ast_private(dev); |
2716 |
+ u32 i, boot_address, offset, data; |
2717 |
++ u32 *pEDIDidx; |
2718 |
+ |
2719 |
+- boot_address = get_fw_base(ast); |
2720 |
+- |
2721 |
+- /* validate FW version */ |
2722 |
+- offset = 0xf000; |
2723 |
+- data = ast_mindwm(ast, boot_address + offset); |
2724 |
+- if ((data & 0xf0) != 0x10) |
2725 |
+- return false; |
2726 |
+- |
2727 |
+- /* validate PnP Monitor */ |
2728 |
+- offset = 0xf010; |
2729 |
+- data = ast_mindwm(ast, boot_address + offset); |
2730 |
+- if (!(data & 0x01)) |
2731 |
+- return false; |
2732 |
++ if (ast->config_mode == ast_use_p2a) { |
2733 |
++ boot_address = get_fw_base(ast); |
2734 |
+ |
2735 |
+- /* Read EDID */ |
2736 |
+- offset = 0xf020; |
2737 |
+- for (i = 0; i < 128; i += 4) { |
2738 |
+- data = ast_mindwm(ast, boot_address + offset + i); |
2739 |
+- *(u32 *)(ediddata + i) = data; |
2740 |
++ /* validate FW version */ |
2741 |
++ offset = AST_DP501_GBL_VERSION; |
2742 |
++ data = ast_mindwm(ast, boot_address + offset); |
2743 |
++ if ((data & AST_DP501_FW_VERSION_MASK) != AST_DP501_FW_VERSION_1) |
2744 |
++ return false; |
2745 |
++ |
2746 |
++ /* validate PnP Monitor */ |
2747 |
++ offset = AST_DP501_PNPMONITOR; |
2748 |
++ data = ast_mindwm(ast, boot_address + offset); |
2749 |
++ if (!(data & AST_DP501_PNP_CONNECTED)) |
2750 |
++ return false; |
2751 |
++ |
2752 |
++ /* Read EDID */ |
2753 |
++ offset = AST_DP501_EDID_DATA; |
2754 |
++ for (i = 0; i < 128; i += 4) { |
2755 |
++ data = ast_mindwm(ast, boot_address + offset + i); |
2756 |
++ pEDIDidx = (u32 *)(ediddata + i); |
2757 |
++ *pEDIDidx = data; |
2758 |
++ } |
2759 |
++ } else { |
2760 |
++ if (!ast->dp501_fw_buf) |
2761 |
++ return false; |
2762 |
++ |
2763 |
++ /* dummy read */ |
2764 |
++ offset = 0x0000; |
2765 |
++ data = readl(ast->dp501_fw_buf + offset); |
2766 |
++ |
2767 |
++ /* validate FW version */ |
2768 |
++ offset = AST_DP501_GBL_VERSION; |
2769 |
++ data = readl(ast->dp501_fw_buf + offset); |
2770 |
++ if ((data & AST_DP501_FW_VERSION_MASK) != AST_DP501_FW_VERSION_1) |
2771 |
++ return false; |
2772 |
++ |
2773 |
++ /* validate PnP Monitor */ |
2774 |
++ offset = AST_DP501_PNPMONITOR; |
2775 |
++ data = readl(ast->dp501_fw_buf + offset); |
2776 |
++ if (!(data & AST_DP501_PNP_CONNECTED)) |
2777 |
++ return false; |
2778 |
++ |
2779 |
++ /* Read EDID */ |
2780 |
++ offset = AST_DP501_EDID_DATA; |
2781 |
++ for (i = 0; i < 128; i += 4) { |
2782 |
++ data = readl(ast->dp501_fw_buf + offset + i); |
2783 |
++ pEDIDidx = (u32 *)(ediddata + i); |
2784 |
++ *pEDIDidx = data; |
2785 |
++ } |
2786 |
+ } |
2787 |
+ |
2788 |
+ return true; |
2789 |
+diff --git a/drivers/gpu/drm/ast/ast_drv.h b/drivers/gpu/drm/ast/ast_drv.h |
2790 |
+index f871fc36c2f7a..a3f67a34f6168 100644 |
2791 |
+--- a/drivers/gpu/drm/ast/ast_drv.h |
2792 |
++++ b/drivers/gpu/drm/ast/ast_drv.h |
2793 |
+@@ -121,6 +121,7 @@ struct ast_private { |
2794 |
+ |
2795 |
+ void __iomem *regs; |
2796 |
+ void __iomem *ioregs; |
2797 |
++ void __iomem *dp501_fw_buf; |
2798 |
+ |
2799 |
+ enum ast_chip chip; |
2800 |
+ bool vga2_clone; |
2801 |
+@@ -298,6 +299,17 @@ int ast_mode_config_init(struct ast_private *ast); |
2802 |
+ #define AST_MM_ALIGN_SHIFT 4 |
2803 |
+ #define AST_MM_ALIGN_MASK ((1 << AST_MM_ALIGN_SHIFT) - 1) |
2804 |
+ |
2805 |
++#define AST_DP501_FW_VERSION_MASK GENMASK(7, 4) |
2806 |
++#define AST_DP501_FW_VERSION_1 BIT(4) |
2807 |
++#define AST_DP501_PNP_CONNECTED BIT(1) |
2808 |
++ |
2809 |
++#define AST_DP501_DEFAULT_DCLK 65 |
2810 |
++ |
2811 |
++#define AST_DP501_GBL_VERSION 0xf000 |
2812 |
++#define AST_DP501_PNPMONITOR 0xf010 |
2813 |
++#define AST_DP501_LINKRATE 0xf014 |
2814 |
++#define AST_DP501_EDID_DATA 0xf020 |
2815 |
++ |
2816 |
+ int ast_mm_init(struct ast_private *ast); |
2817 |
+ |
2818 |
+ /* ast post */ |
2819 |
+diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c |
2820 |
+index c29cc7f19863a..2aff2e6cf450c 100644 |
2821 |
+--- a/drivers/gpu/drm/ast/ast_main.c |
2822 |
++++ b/drivers/gpu/drm/ast/ast_main.c |
2823 |
+@@ -99,7 +99,7 @@ static void ast_detect_config_mode(struct drm_device *dev, u32 *scu_rev) |
2824 |
+ if (!(jregd0 & 0x80) || !(jregd1 & 0x10)) { |
2825 |
+ /* Double check it's actually working */ |
2826 |
+ data = ast_read32(ast, 0xf004); |
2827 |
+- if (data != 0xFFFFFFFF) { |
2828 |
++ if ((data != 0xFFFFFFFF) && (data != 0x00)) { |
2829 |
+ /* P2A works, grab silicon revision */ |
2830 |
+ ast->config_mode = ast_use_p2a; |
2831 |
+ |
2832 |
+@@ -450,6 +450,14 @@ struct ast_private *ast_device_create(const struct drm_driver *drv, |
2833 |
+ if (ret) |
2834 |
+ return ERR_PTR(ret); |
2835 |
+ |
2836 |
++ /* map reserved buffer */ |
2837 |
++ ast->dp501_fw_buf = NULL; |
2838 |
++ if (dev->vram_mm->vram_size < pci_resource_len(pdev, 0)) { |
2839 |
++ ast->dp501_fw_buf = pci_iomap_range(pdev, 0, dev->vram_mm->vram_size, 0); |
2840 |
++ if (!ast->dp501_fw_buf) |
2841 |
++ drm_info(dev, "failed to map reserved buffer!\n"); |
2842 |
++ } |
2843 |
++ |
2844 |
+ ret = ast_mode_config_init(ast); |
2845 |
+ if (ret) |
2846 |
+ return ERR_PTR(ret); |
2847 |
+diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c |
2848 |
+index d0c65610ebb5c..f56ff97c98990 100644 |
2849 |
+--- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c |
2850 |
++++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c |
2851 |
+@@ -2369,9 +2369,9 @@ static int cdns_mhdp_probe(struct platform_device *pdev) |
2852 |
+ clk_prepare_enable(clk); |
2853 |
+ |
2854 |
+ pm_runtime_enable(dev); |
2855 |
+- ret = pm_runtime_get_sync(dev); |
2856 |
++ ret = pm_runtime_resume_and_get(dev); |
2857 |
+ if (ret < 0) { |
2858 |
+- dev_err(dev, "pm_runtime_get_sync failed\n"); |
2859 |
++ dev_err(dev, "pm_runtime_resume_and_get failed\n"); |
2860 |
+ pm_runtime_disable(dev); |
2861 |
+ goto clk_disable; |
2862 |
+ } |
2863 |
+diff --git a/drivers/gpu/drm/bridge/cdns-dsi.c b/drivers/gpu/drm/bridge/cdns-dsi.c |
2864 |
+index 76373e31df92d..b31281f76117c 100644 |
2865 |
+--- a/drivers/gpu/drm/bridge/cdns-dsi.c |
2866 |
++++ b/drivers/gpu/drm/bridge/cdns-dsi.c |
2867 |
+@@ -1028,7 +1028,7 @@ static ssize_t cdns_dsi_transfer(struct mipi_dsi_host *host, |
2868 |
+ struct mipi_dsi_packet packet; |
2869 |
+ int ret, i, tx_len, rx_len; |
2870 |
+ |
2871 |
+- ret = pm_runtime_get_sync(host->dev); |
2872 |
++ ret = pm_runtime_resume_and_get(host->dev); |
2873 |
+ if (ret < 0) |
2874 |
+ return ret; |
2875 |
+ |
2876 |
+diff --git a/drivers/gpu/drm/bridge/lontium-lt9611.c b/drivers/gpu/drm/bridge/lontium-lt9611.c |
2877 |
+index d734d9402c350..c1926154eda84 100644 |
2878 |
+--- a/drivers/gpu/drm/bridge/lontium-lt9611.c |
2879 |
++++ b/drivers/gpu/drm/bridge/lontium-lt9611.c |
2880 |
+@@ -1209,6 +1209,7 @@ static struct i2c_device_id lt9611_id[] = { |
2881 |
+ { "lontium,lt9611", 0 }, |
2882 |
+ {} |
2883 |
+ }; |
2884 |
++MODULE_DEVICE_TABLE(i2c, lt9611_id); |
2885 |
+ |
2886 |
+ static const struct of_device_id lt9611_match_table[] = { |
2887 |
+ { .compatible = "lontium,lt9611" }, |
2888 |
+diff --git a/drivers/gpu/drm/bridge/nwl-dsi.c b/drivers/gpu/drm/bridge/nwl-dsi.c |
2889 |
+index 66b67402f1acd..c65ca860712d2 100644 |
2890 |
+--- a/drivers/gpu/drm/bridge/nwl-dsi.c |
2891 |
++++ b/drivers/gpu/drm/bridge/nwl-dsi.c |
2892 |
+@@ -21,6 +21,7 @@ |
2893 |
+ #include <linux/sys_soc.h> |
2894 |
+ #include <linux/time64.h> |
2895 |
+ |
2896 |
++#include <drm/drm_atomic_state_helper.h> |
2897 |
+ #include <drm/drm_bridge.h> |
2898 |
+ #include <drm/drm_mipi_dsi.h> |
2899 |
+ #include <drm/drm_of.h> |
2900 |
+@@ -742,7 +743,9 @@ static int nwl_dsi_disable(struct nwl_dsi *dsi) |
2901 |
+ return 0; |
2902 |
+ } |
2903 |
+ |
2904 |
+-static void nwl_dsi_bridge_disable(struct drm_bridge *bridge) |
2905 |
++static void |
2906 |
++nwl_dsi_bridge_atomic_disable(struct drm_bridge *bridge, |
2907 |
++ struct drm_bridge_state *old_bridge_state) |
2908 |
+ { |
2909 |
+ struct nwl_dsi *dsi = bridge_to_dsi(bridge); |
2910 |
+ int ret; |
2911 |
+@@ -803,17 +806,6 @@ static int nwl_dsi_get_dphy_params(struct nwl_dsi *dsi, |
2912 |
+ return 0; |
2913 |
+ } |
2914 |
+ |
2915 |
+-static bool nwl_dsi_bridge_mode_fixup(struct drm_bridge *bridge, |
2916 |
+- const struct drm_display_mode *mode, |
2917 |
+- struct drm_display_mode *adjusted_mode) |
2918 |
+-{ |
2919 |
+- /* At least LCDIF + NWL needs active high sync */ |
2920 |
+- adjusted_mode->flags |= (DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); |
2921 |
+- adjusted_mode->flags &= ~(DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC); |
2922 |
+- |
2923 |
+- return true; |
2924 |
+-} |
2925 |
+- |
2926 |
+ static enum drm_mode_status |
2927 |
+ nwl_dsi_bridge_mode_valid(struct drm_bridge *bridge, |
2928 |
+ const struct drm_display_info *info, |
2929 |
+@@ -831,6 +823,24 @@ nwl_dsi_bridge_mode_valid(struct drm_bridge *bridge, |
2930 |
+ return MODE_OK; |
2931 |
+ } |
2932 |
+ |
2933 |
++static int nwl_dsi_bridge_atomic_check(struct drm_bridge *bridge, |
2934 |
++ struct drm_bridge_state *bridge_state, |
2935 |
++ struct drm_crtc_state *crtc_state, |
2936 |
++ struct drm_connector_state *conn_state) |
2937 |
++{ |
2938 |
++ struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode; |
2939 |
++ |
2940 |
++ /* At least LCDIF + NWL needs active high sync */ |
2941 |
++ adjusted_mode->flags |= (DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); |
2942 |
++ adjusted_mode->flags &= ~(DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC); |
2943 |
++ |
2944 |
++ /* Do a full modeset if crtc_state->active is changed to be true. */ |
2945 |
++ if (crtc_state->active_changed && crtc_state->active) |
2946 |
++ crtc_state->mode_changed = true; |
2947 |
++ |
2948 |
++ return 0; |
2949 |
++} |
2950 |
++ |
2951 |
+ static void |
2952 |
+ nwl_dsi_bridge_mode_set(struct drm_bridge *bridge, |
2953 |
+ const struct drm_display_mode *mode, |
2954 |
+@@ -862,7 +872,9 @@ nwl_dsi_bridge_mode_set(struct drm_bridge *bridge, |
2955 |
+ drm_mode_debug_printmodeline(adjusted_mode); |
2956 |
+ } |
2957 |
+ |
2958 |
+-static void nwl_dsi_bridge_pre_enable(struct drm_bridge *bridge) |
2959 |
++static void |
2960 |
++nwl_dsi_bridge_atomic_pre_enable(struct drm_bridge *bridge, |
2961 |
++ struct drm_bridge_state *old_bridge_state) |
2962 |
+ { |
2963 |
+ struct nwl_dsi *dsi = bridge_to_dsi(bridge); |
2964 |
+ int ret; |
2965 |
+@@ -897,7 +909,9 @@ static void nwl_dsi_bridge_pre_enable(struct drm_bridge *bridge) |
2966 |
+ } |
2967 |
+ } |
2968 |
+ |
2969 |
+-static void nwl_dsi_bridge_enable(struct drm_bridge *bridge) |
2970 |
++static void |
2971 |
++nwl_dsi_bridge_atomic_enable(struct drm_bridge *bridge, |
2972 |
++ struct drm_bridge_state *old_bridge_state) |
2973 |
+ { |
2974 |
+ struct nwl_dsi *dsi = bridge_to_dsi(bridge); |
2975 |
+ int ret; |
2976 |
+@@ -942,14 +956,17 @@ static void nwl_dsi_bridge_detach(struct drm_bridge *bridge) |
2977 |
+ } |
2978 |
+ |
2979 |
+ static const struct drm_bridge_funcs nwl_dsi_bridge_funcs = { |
2980 |
+- .pre_enable = nwl_dsi_bridge_pre_enable, |
2981 |
+- .enable = nwl_dsi_bridge_enable, |
2982 |
+- .disable = nwl_dsi_bridge_disable, |
2983 |
+- .mode_fixup = nwl_dsi_bridge_mode_fixup, |
2984 |
+- .mode_set = nwl_dsi_bridge_mode_set, |
2985 |
+- .mode_valid = nwl_dsi_bridge_mode_valid, |
2986 |
+- .attach = nwl_dsi_bridge_attach, |
2987 |
+- .detach = nwl_dsi_bridge_detach, |
2988 |
++ .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state, |
2989 |
++ .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state, |
2990 |
++ .atomic_reset = drm_atomic_helper_bridge_reset, |
2991 |
++ .atomic_check = nwl_dsi_bridge_atomic_check, |
2992 |
++ .atomic_pre_enable = nwl_dsi_bridge_atomic_pre_enable, |
2993 |
++ .atomic_enable = nwl_dsi_bridge_atomic_enable, |
2994 |
++ .atomic_disable = nwl_dsi_bridge_atomic_disable, |
2995 |
++ .mode_set = nwl_dsi_bridge_mode_set, |
2996 |
++ .mode_valid = nwl_dsi_bridge_mode_valid, |
2997 |
++ .attach = nwl_dsi_bridge_attach, |
2998 |
++ .detach = nwl_dsi_bridge_detach, |
2999 |
+ }; |
3000 |
+ |
3001 |
+ static int nwl_dsi_parse_dt(struct nwl_dsi *dsi) |
3002 |
+diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c |
3003 |
+index eedbb48815b7b..c7d4d43cdee07 100644 |
3004 |
+--- a/drivers/gpu/drm/drm_dp_helper.c |
3005 |
++++ b/drivers/gpu/drm/drm_dp_helper.c |
3006 |
+@@ -679,7 +679,14 @@ int drm_dp_read_downstream_info(struct drm_dp_aux *aux, |
3007 |
+ !(dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_PRESENT)) |
3008 |
+ return 0; |
3009 |
+ |
3010 |
++ /* Some branches advertise having 0 downstream ports, despite also advertising they have a |
3011 |
++ * downstream port present. The DP spec isn't clear on if this is allowed or not, but since |
3012 |
++ * some branches do it we need to handle it regardless. |
3013 |
++ */ |
3014 |
+ len = drm_dp_downstream_port_count(dpcd); |
3015 |
++ if (!len) |
3016 |
++ return 0; |
3017 |
++ |
3018 |
+ if (dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DETAILED_CAP_INFO_AVAILABLE) |
3019 |
+ len *= 4; |
3020 |
+ |
3021 |
+diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c |
3022 |
+index 97a785aa8839b..9ebc558fd5163 100644 |
3023 |
+--- a/drivers/gpu/drm/i915/display/intel_dp.c |
3024 |
++++ b/drivers/gpu/drm/i915/display/intel_dp.c |
3025 |
+@@ -3913,7 +3913,7 @@ static int intel_dp_vsc_sdp_unpack(struct drm_dp_vsc_sdp *vsc, |
3026 |
+ if (size < sizeof(struct dp_sdp)) |
3027 |
+ return -EINVAL; |
3028 |
+ |
3029 |
+- memset(vsc, 0, size); |
3030 |
++ memset(vsc, 0, sizeof(*vsc)); |
3031 |
+ |
3032 |
+ if (sdp->sdp_header.HB0 != 0) |
3033 |
+ return -EINVAL; |
3034 |
+diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c |
3035 |
+index fd8870edde0ed..63f38be391b6f 100644 |
3036 |
+--- a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c |
3037 |
++++ b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c |
3038 |
+@@ -341,7 +341,7 @@ static void ingenic_drm_crtc_atomic_flush(struct drm_crtc *crtc, |
3039 |
+ if (priv->update_clk_rate) { |
3040 |
+ mutex_lock(&priv->clk_mutex); |
3041 |
+ clk_set_rate(priv->pix_clk, |
3042 |
+- crtc_state->adjusted_mode.clock * 1000); |
3043 |
++ crtc_state->adjusted_mode.crtc_clock * 1000); |
3044 |
+ priv->update_clk_rate = false; |
3045 |
+ mutex_unlock(&priv->clk_mutex); |
3046 |
+ } |
3047 |
+@@ -413,7 +413,7 @@ static void ingenic_drm_plane_enable(struct ingenic_drm *priv, |
3048 |
+ unsigned int en_bit; |
3049 |
+ |
3050 |
+ if (priv->soc_info->has_osd) { |
3051 |
+- if (plane->type == DRM_PLANE_TYPE_PRIMARY) |
3052 |
++ if (plane != &priv->f0) |
3053 |
+ en_bit = JZ_LCD_OSDC_F1EN; |
3054 |
+ else |
3055 |
+ en_bit = JZ_LCD_OSDC_F0EN; |
3056 |
+@@ -428,7 +428,7 @@ void ingenic_drm_plane_disable(struct device *dev, struct drm_plane *plane) |
3057 |
+ unsigned int en_bit; |
3058 |
+ |
3059 |
+ if (priv->soc_info->has_osd) { |
3060 |
+- if (plane->type == DRM_PLANE_TYPE_PRIMARY) |
3061 |
++ if (plane != &priv->f0) |
3062 |
+ en_bit = JZ_LCD_OSDC_F1EN; |
3063 |
+ else |
3064 |
+ en_bit = JZ_LCD_OSDC_F0EN; |
3065 |
+@@ -455,8 +455,7 @@ void ingenic_drm_plane_config(struct device *dev, |
3066 |
+ |
3067 |
+ ingenic_drm_plane_enable(priv, plane); |
3068 |
+ |
3069 |
+- if (priv->soc_info->has_osd && |
3070 |
+- plane->type == DRM_PLANE_TYPE_PRIMARY) { |
3071 |
++ if (priv->soc_info->has_osd && plane != &priv->f0) { |
3072 |
+ switch (fourcc) { |
3073 |
+ case DRM_FORMAT_XRGB1555: |
3074 |
+ ctrl |= JZ_LCD_OSDCTRL_RGB555; |
3075 |
+@@ -504,7 +503,7 @@ void ingenic_drm_plane_config(struct device *dev, |
3076 |
+ } |
3077 |
+ |
3078 |
+ if (priv->soc_info->has_osd) { |
3079 |
+- if (plane->type == DRM_PLANE_TYPE_PRIMARY) { |
3080 |
++ if (plane != &priv->f0) { |
3081 |
+ xy_reg = JZ_REG_LCD_XYP1; |
3082 |
+ size_reg = JZ_REG_LCD_SIZE1; |
3083 |
+ } else { |
3084 |
+@@ -554,7 +553,7 @@ static void ingenic_drm_plane_atomic_update(struct drm_plane *plane, |
3085 |
+ height = state->src_h >> 16; |
3086 |
+ cpp = state->fb->format->cpp[0]; |
3087 |
+ |
3088 |
+- if (!priv->soc_info->has_osd || plane->type == DRM_PLANE_TYPE_OVERLAY) |
3089 |
++ if (!priv->soc_info->has_osd || plane == &priv->f0) |
3090 |
+ hwdesc = &priv->dma_hwdescs->hwdesc_f0; |
3091 |
+ else |
3092 |
+ hwdesc = &priv->dma_hwdescs->hwdesc_f1; |
3093 |
+diff --git a/drivers/gpu/drm/ingenic/ingenic-ipu.c b/drivers/gpu/drm/ingenic/ingenic-ipu.c |
3094 |
+index e52777ef85fd7..1cab0a743e987 100644 |
3095 |
+--- a/drivers/gpu/drm/ingenic/ingenic-ipu.c |
3096 |
++++ b/drivers/gpu/drm/ingenic/ingenic-ipu.c |
3097 |
+@@ -760,7 +760,7 @@ static int ingenic_ipu_bind(struct device *dev, struct device *master, void *d) |
3098 |
+ |
3099 |
+ err = drm_universal_plane_init(drm, plane, 1, &ingenic_ipu_plane_funcs, |
3100 |
+ soc_info->formats, soc_info->num_formats, |
3101 |
+- NULL, DRM_PLANE_TYPE_PRIMARY, NULL); |
3102 |
++ NULL, DRM_PLANE_TYPE_OVERLAY, NULL); |
3103 |
+ if (err) { |
3104 |
+ dev_err(dev, "Failed to init plane: %i\n", err); |
3105 |
+ return err; |
3106 |
+diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c |
3107 |
+index 8b0de90156c6c..69d23ce56d2c6 100644 |
3108 |
+--- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c |
3109 |
++++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c |
3110 |
+@@ -259,7 +259,7 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc) |
3111 |
+ drm_connector_list_iter_end(&conn_iter); |
3112 |
+ } |
3113 |
+ |
3114 |
+- ret = pm_runtime_get_sync(crtc->dev->dev); |
3115 |
++ ret = pm_runtime_resume_and_get(crtc->dev->dev); |
3116 |
+ if (ret < 0) { |
3117 |
+ DRM_ERROR("Failed to enable power domain: %d\n", ret); |
3118 |
+ return ret; |
3119 |
+diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c |
3120 |
+index 3d729270bde15..4a5b518288b06 100644 |
3121 |
+--- a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c |
3122 |
++++ b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c |
3123 |
+@@ -88,8 +88,6 @@ static int mdp4_hw_init(struct msm_kms *kms) |
3124 |
+ if (mdp4_kms->rev > 1) |
3125 |
+ mdp4_write(mdp4_kms, REG_MDP4_RESET_STATUS, 1); |
3126 |
+ |
3127 |
+- dev->mode_config.allow_fb_modifiers = true; |
3128 |
+- |
3129 |
+ out: |
3130 |
+ pm_runtime_put_sync(dev->dev); |
3131 |
+ |
3132 |
+diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c b/drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c |
3133 |
+index da3cc1d8c3312..ee1dbb2b84af4 100644 |
3134 |
+--- a/drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c |
3135 |
++++ b/drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c |
3136 |
+@@ -347,6 +347,12 @@ enum mdp4_pipe mdp4_plane_pipe(struct drm_plane *plane) |
3137 |
+ return mdp4_plane->pipe; |
3138 |
+ } |
3139 |
+ |
3140 |
++static const uint64_t supported_format_modifiers[] = { |
3141 |
++ DRM_FORMAT_MOD_SAMSUNG_64_32_TILE, |
3142 |
++ DRM_FORMAT_MOD_LINEAR, |
3143 |
++ DRM_FORMAT_MOD_INVALID |
3144 |
++}; |
3145 |
++ |
3146 |
+ /* initialize plane */ |
3147 |
+ struct drm_plane *mdp4_plane_init(struct drm_device *dev, |
3148 |
+ enum mdp4_pipe pipe_id, bool private_plane) |
3149 |
+@@ -375,7 +381,7 @@ struct drm_plane *mdp4_plane_init(struct drm_device *dev, |
3150 |
+ type = private_plane ? DRM_PLANE_TYPE_PRIMARY : DRM_PLANE_TYPE_OVERLAY; |
3151 |
+ ret = drm_universal_plane_init(dev, plane, 0xff, &mdp4_plane_funcs, |
3152 |
+ mdp4_plane->formats, mdp4_plane->nformats, |
3153 |
+- NULL, type, NULL); |
3154 |
++ supported_format_modifiers, type, NULL); |
3155 |
+ if (ret) |
3156 |
+ goto fail; |
3157 |
+ |
3158 |
+diff --git a/drivers/gpu/drm/mxsfb/Kconfig b/drivers/gpu/drm/mxsfb/Kconfig |
3159 |
+index 0143d539f8f82..ee22cd25d3e3d 100644 |
3160 |
+--- a/drivers/gpu/drm/mxsfb/Kconfig |
3161 |
++++ b/drivers/gpu/drm/mxsfb/Kconfig |
3162 |
+@@ -10,7 +10,6 @@ config DRM_MXSFB |
3163 |
+ depends on COMMON_CLK |
3164 |
+ select DRM_MXS |
3165 |
+ select DRM_KMS_HELPER |
3166 |
+- select DRM_KMS_FB_HELPER |
3167 |
+ select DRM_KMS_CMA_HELPER |
3168 |
+ select DRM_PANEL |
3169 |
+ select DRM_PANEL_BRIDGE |
3170 |
+diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/nouveau/nouveau_display.c |
3171 |
+index 17831ee897ea4..1376992482b55 100644 |
3172 |
+--- a/drivers/gpu/drm/nouveau/nouveau_display.c |
3173 |
++++ b/drivers/gpu/drm/nouveau/nouveau_display.c |
3174 |
+@@ -700,7 +700,6 @@ nouveau_display_create(struct drm_device *dev) |
3175 |
+ |
3176 |
+ dev->mode_config.preferred_depth = 24; |
3177 |
+ dev->mode_config.prefer_shadow = 1; |
3178 |
+- dev->mode_config.allow_fb_modifiers = true; |
3179 |
+ |
3180 |
+ if (drm->client.device.info.chipset < 0x11) |
3181 |
+ dev->mode_config.async_page_flip = false; |
3182 |
+diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c |
3183 |
+index 652af7a134bd0..1d03ec7636047 100644 |
3184 |
+--- a/drivers/gpu/drm/radeon/radeon_display.c |
3185 |
++++ b/drivers/gpu/drm/radeon/radeon_display.c |
3186 |
+@@ -1325,6 +1325,7 @@ radeon_user_framebuffer_create(struct drm_device *dev, |
3187 |
+ /* Handle is imported dma-buf, so cannot be migrated to VRAM for scanout */ |
3188 |
+ if (obj->import_attach) { |
3189 |
+ DRM_DEBUG_KMS("Cannot create framebuffer from imported dma_buf\n"); |
3190 |
++ drm_gem_object_put(obj); |
3191 |
+ return ERR_PTR(-EINVAL); |
3192 |
+ } |
3193 |
+ |
3194 |
+diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c |
3195 |
+index efeb115ae70ec..40aece37e0b4e 100644 |
3196 |
+--- a/drivers/gpu/drm/radeon/radeon_drv.c |
3197 |
++++ b/drivers/gpu/drm/radeon/radeon_drv.c |
3198 |
+@@ -386,13 +386,13 @@ radeon_pci_shutdown(struct pci_dev *pdev) |
3199 |
+ if (radeon_device_is_virtual()) |
3200 |
+ radeon_pci_remove(pdev); |
3201 |
+ |
3202 |
+-#ifdef CONFIG_PPC64 |
3203 |
++#if defined(CONFIG_PPC64) || defined(CONFIG_MACH_LOONGSON64) |
3204 |
+ /* |
3205 |
+ * Some adapters need to be suspended before a |
3206 |
+ * shutdown occurs in order to prevent an error |
3207 |
+- * during kexec. |
3208 |
+- * Make this power specific becauase it breaks |
3209 |
+- * some non-power boards. |
3210 |
++ * during kexec, shutdown or reboot. |
3211 |
++ * Make this power and Loongson specific because |
3212 |
++ * it breaks some other boards. |
3213 |
+ */ |
3214 |
+ radeon_suspend_kms(pci_get_drvdata(pdev), true, true, false); |
3215 |
+ #endif |
3216 |
+diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c |
3217 |
+index d8c47ee3cad37..520a0a0cd2b56 100644 |
3218 |
+--- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c |
3219 |
++++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c |
3220 |
+@@ -243,7 +243,6 @@ struct dw_mipi_dsi_rockchip { |
3221 |
+ struct dw_mipi_dsi *dmd; |
3222 |
+ const struct rockchip_dw_dsi_chip_data *cdata; |
3223 |
+ struct dw_mipi_dsi_plat_data pdata; |
3224 |
+- int devcnt; |
3225 |
+ }; |
3226 |
+ |
3227 |
+ struct dphy_pll_parameter_map { |
3228 |
+@@ -1141,9 +1140,6 @@ static int dw_mipi_dsi_rockchip_remove(struct platform_device *pdev) |
3229 |
+ { |
3230 |
+ struct dw_mipi_dsi_rockchip *dsi = platform_get_drvdata(pdev); |
3231 |
+ |
3232 |
+- if (dsi->devcnt == 0) |
3233 |
+- component_del(dsi->dev, &dw_mipi_dsi_rockchip_ops); |
3234 |
+- |
3235 |
+ dw_mipi_dsi_remove(dsi->dmd); |
3236 |
+ |
3237 |
+ return 0; |
3238 |
+diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c |
3239 |
+index 80053d91a301f..a6fe03c3748aa 100644 |
3240 |
+--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c |
3241 |
++++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c |
3242 |
+@@ -349,8 +349,8 @@ static const struct vop_win_phy rk3066_win0_data = { |
3243 |
+ .nformats = ARRAY_SIZE(formats_win_full), |
3244 |
+ .format_modifiers = format_modifiers_win_full, |
3245 |
+ .enable = VOP_REG(RK3066_SYS_CTRL1, 0x1, 0), |
3246 |
+- .format = VOP_REG(RK3066_SYS_CTRL0, 0x7, 4), |
3247 |
+- .rb_swap = VOP_REG(RK3066_SYS_CTRL0, 0x1, 19), |
3248 |
++ .format = VOP_REG(RK3066_SYS_CTRL1, 0x7, 4), |
3249 |
++ .rb_swap = VOP_REG(RK3066_SYS_CTRL1, 0x1, 19), |
3250 |
+ .act_info = VOP_REG(RK3066_WIN0_ACT_INFO, 0x1fff1fff, 0), |
3251 |
+ .dsp_info = VOP_REG(RK3066_WIN0_DSP_INFO, 0x0fff0fff, 0), |
3252 |
+ .dsp_st = VOP_REG(RK3066_WIN0_DSP_ST, 0x1fff1fff, 0), |
3253 |
+@@ -361,13 +361,12 @@ static const struct vop_win_phy rk3066_win0_data = { |
3254 |
+ }; |
3255 |
+ |
3256 |
+ static const struct vop_win_phy rk3066_win1_data = { |
3257 |
+- .scl = &rk3066_win_scl, |
3258 |
+ .data_formats = formats_win_full, |
3259 |
+ .nformats = ARRAY_SIZE(formats_win_full), |
3260 |
+ .format_modifiers = format_modifiers_win_full, |
3261 |
+ .enable = VOP_REG(RK3066_SYS_CTRL1, 0x1, 1), |
3262 |
+- .format = VOP_REG(RK3066_SYS_CTRL0, 0x7, 7), |
3263 |
+- .rb_swap = VOP_REG(RK3066_SYS_CTRL0, 0x1, 23), |
3264 |
++ .format = VOP_REG(RK3066_SYS_CTRL1, 0x7, 7), |
3265 |
++ .rb_swap = VOP_REG(RK3066_SYS_CTRL1, 0x1, 23), |
3266 |
+ .act_info = VOP_REG(RK3066_WIN1_ACT_INFO, 0x1fff1fff, 0), |
3267 |
+ .dsp_info = VOP_REG(RK3066_WIN1_DSP_INFO, 0x0fff0fff, 0), |
3268 |
+ .dsp_st = VOP_REG(RK3066_WIN1_DSP_ST, 0x1fff1fff, 0), |
3269 |
+@@ -382,8 +381,8 @@ static const struct vop_win_phy rk3066_win2_data = { |
3270 |
+ .nformats = ARRAY_SIZE(formats_win_lite), |
3271 |
+ .format_modifiers = format_modifiers_win_lite, |
3272 |
+ .enable = VOP_REG(RK3066_SYS_CTRL1, 0x1, 2), |
3273 |
+- .format = VOP_REG(RK3066_SYS_CTRL0, 0x7, 10), |
3274 |
+- .rb_swap = VOP_REG(RK3066_SYS_CTRL0, 0x1, 27), |
3275 |
++ .format = VOP_REG(RK3066_SYS_CTRL1, 0x7, 10), |
3276 |
++ .rb_swap = VOP_REG(RK3066_SYS_CTRL1, 0x1, 27), |
3277 |
+ .dsp_info = VOP_REG(RK3066_WIN2_DSP_INFO, 0x0fff0fff, 0), |
3278 |
+ .dsp_st = VOP_REG(RK3066_WIN2_DSP_ST, 0x1fff1fff, 0), |
3279 |
+ .yrgb_mst = VOP_REG(RK3066_WIN2_MST, 0xffffffff, 0), |
3280 |
+@@ -408,6 +407,9 @@ static const struct vop_common rk3066_common = { |
3281 |
+ .dither_down_en = VOP_REG(RK3066_DSP_CTRL0, 0x1, 11), |
3282 |
+ .dither_down_mode = VOP_REG(RK3066_DSP_CTRL0, 0x1, 10), |
3283 |
+ .dsp_blank = VOP_REG(RK3066_DSP_CTRL1, 0x1, 24), |
3284 |
++ .dither_up = VOP_REG(RK3066_DSP_CTRL0, 0x1, 9), |
3285 |
++ .dsp_lut_en = VOP_REG(RK3066_SYS_CTRL1, 0x1, 31), |
3286 |
++ .data_blank = VOP_REG(RK3066_DSP_CTRL1, 0x1, 25), |
3287 |
+ }; |
3288 |
+ |
3289 |
+ static const struct vop_win_data rk3066_vop_win_data[] = { |
3290 |
+@@ -505,7 +507,10 @@ static const struct vop_common rk3188_common = { |
3291 |
+ .dither_down_sel = VOP_REG(RK3188_DSP_CTRL0, 0x1, 27), |
3292 |
+ .dither_down_en = VOP_REG(RK3188_DSP_CTRL0, 0x1, 11), |
3293 |
+ .dither_down_mode = VOP_REG(RK3188_DSP_CTRL0, 0x1, 10), |
3294 |
+- .dsp_blank = VOP_REG(RK3188_DSP_CTRL1, 0x3, 24), |
3295 |
++ .dsp_blank = VOP_REG(RK3188_DSP_CTRL1, 0x1, 24), |
3296 |
++ .dither_up = VOP_REG(RK3188_DSP_CTRL0, 0x1, 9), |
3297 |
++ .dsp_lut_en = VOP_REG(RK3188_SYS_CTRL, 0x1, 28), |
3298 |
++ .data_blank = VOP_REG(RK3188_DSP_CTRL1, 0x1, 25), |
3299 |
+ }; |
3300 |
+ |
3301 |
+ static const struct vop_win_data rk3188_vop_win_data[] = { |
3302 |
+diff --git a/drivers/gpu/drm/scheduler/sched_entity.c b/drivers/gpu/drm/scheduler/sched_entity.c |
3303 |
+index c1ac3e4003c6f..1b2fdf7f3ccd8 100644 |
3304 |
+--- a/drivers/gpu/drm/scheduler/sched_entity.c |
3305 |
++++ b/drivers/gpu/drm/scheduler/sched_entity.c |
3306 |
+@@ -116,7 +116,8 @@ static bool drm_sched_entity_is_idle(struct drm_sched_entity *entity) |
3307 |
+ rmb(); /* for list_empty to work without lock */ |
3308 |
+ |
3309 |
+ if (list_empty(&entity->list) || |
3310 |
+- spsc_queue_count(&entity->job_queue) == 0) |
3311 |
++ spsc_queue_count(&entity->job_queue) == 0 || |
3312 |
++ entity->stopped) |
3313 |
+ return true; |
3314 |
+ |
3315 |
+ return false; |
3316 |
+@@ -221,11 +222,16 @@ static void drm_sched_entity_kill_jobs_cb(struct dma_fence *f, |
3317 |
+ static void drm_sched_entity_kill_jobs(struct drm_sched_entity *entity) |
3318 |
+ { |
3319 |
+ struct drm_sched_job *job; |
3320 |
++ struct dma_fence *f; |
3321 |
+ int r; |
3322 |
+ |
3323 |
+ while ((job = to_drm_sched_job(spsc_queue_pop(&entity->job_queue)))) { |
3324 |
+ struct drm_sched_fence *s_fence = job->s_fence; |
3325 |
+ |
3326 |
++ /* Wait for all dependencies to avoid data corruptions */ |
3327 |
++ while ((f = job->sched->ops->dependency(job, entity))) |
3328 |
++ dma_fence_wait(f, false); |
3329 |
++ |
3330 |
+ drm_sched_fence_scheduled(s_fence); |
3331 |
+ dma_fence_set_error(&s_fence->finished, -ESRCH); |
3332 |
+ |
3333 |
+diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c |
3334 |
+index 92637b70c9bf6..16244e9669b90 100644 |
3335 |
+--- a/drivers/gpu/drm/scheduler/sched_main.c |
3336 |
++++ b/drivers/gpu/drm/scheduler/sched_main.c |
3337 |
+@@ -896,9 +896,33 @@ EXPORT_SYMBOL(drm_sched_init); |
3338 |
+ */ |
3339 |
+ void drm_sched_fini(struct drm_gpu_scheduler *sched) |
3340 |
+ { |
3341 |
++ struct drm_sched_entity *s_entity; |
3342 |
++ int i; |
3343 |
++ |
3344 |
+ if (sched->thread) |
3345 |
+ kthread_stop(sched->thread); |
3346 |
+ |
3347 |
++ for (i = DRM_SCHED_PRIORITY_COUNT - 1; i >= DRM_SCHED_PRIORITY_MIN; i--) { |
3348 |
++ struct drm_sched_rq *rq = &sched->sched_rq[i]; |
3349 |
++ |
3350 |
++ if (!rq) |
3351 |
++ continue; |
3352 |
++ |
3353 |
++ spin_lock(&rq->lock); |
3354 |
++ list_for_each_entry(s_entity, &rq->entities, list) |
3355 |
++ /* |
3356 |
++ * Prevents reinsertion and marks job_queue as idle, |
3357 |
++ * it will removed from rq in drm_sched_entity_fini |
3358 |
++ * eventually |
3359 |
++ */ |
3360 |
++ s_entity->stopped = true; |
3361 |
++ spin_unlock(&rq->lock); |
3362 |
++ |
3363 |
++ } |
3364 |
++ |
3365 |
++ /* Wakeup everyone stuck in drm_sched_entity_flush for this scheduler */ |
3366 |
++ wake_up_all(&sched->job_scheduled); |
3367 |
++ |
3368 |
+ /* Confirm no work left behind accessing device structures */ |
3369 |
+ cancel_delayed_work_sync(&sched->work_tdr); |
3370 |
+ |
3371 |
+diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c |
3372 |
+index 134986dc2783f..2c0510bbd0fbd 100644 |
3373 |
+--- a/drivers/gpu/drm/tegra/dc.c |
3374 |
++++ b/drivers/gpu/drm/tegra/dc.c |
3375 |
+@@ -947,6 +947,11 @@ static const struct drm_plane_helper_funcs tegra_cursor_plane_helper_funcs = { |
3376 |
+ .atomic_disable = tegra_cursor_atomic_disable, |
3377 |
+ }; |
3378 |
+ |
3379 |
++static const uint64_t linear_modifiers[] = { |
3380 |
++ DRM_FORMAT_MOD_LINEAR, |
3381 |
++ DRM_FORMAT_MOD_INVALID |
3382 |
++}; |
3383 |
++ |
3384 |
+ static struct drm_plane *tegra_dc_cursor_plane_create(struct drm_device *drm, |
3385 |
+ struct tegra_dc *dc) |
3386 |
+ { |
3387 |
+@@ -975,7 +980,7 @@ static struct drm_plane *tegra_dc_cursor_plane_create(struct drm_device *drm, |
3388 |
+ |
3389 |
+ err = drm_universal_plane_init(drm, &plane->base, possible_crtcs, |
3390 |
+ &tegra_plane_funcs, formats, |
3391 |
+- num_formats, NULL, |
3392 |
++ num_formats, linear_modifiers, |
3393 |
+ DRM_PLANE_TYPE_CURSOR, NULL); |
3394 |
+ if (err < 0) { |
3395 |
+ kfree(plane); |
3396 |
+@@ -1094,7 +1099,8 @@ static struct drm_plane *tegra_dc_overlay_plane_create(struct drm_device *drm, |
3397 |
+ |
3398 |
+ err = drm_universal_plane_init(drm, &plane->base, possible_crtcs, |
3399 |
+ &tegra_plane_funcs, formats, |
3400 |
+- num_formats, NULL, type, NULL); |
3401 |
++ num_formats, linear_modifiers, |
3402 |
++ type, NULL); |
3403 |
+ if (err < 0) { |
3404 |
+ kfree(plane); |
3405 |
+ return ERR_PTR(err); |
3406 |
+diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c |
3407 |
+index e9ce7d6992d21..e3d4fd76b6a0b 100644 |
3408 |
+--- a/drivers/gpu/drm/tegra/drm.c |
3409 |
++++ b/drivers/gpu/drm/tegra/drm.c |
3410 |
+@@ -1122,8 +1122,6 @@ static int host1x_drm_probe(struct host1x_device *dev) |
3411 |
+ drm->mode_config.max_width = 4096; |
3412 |
+ drm->mode_config.max_height = 4096; |
3413 |
+ |
3414 |
+- drm->mode_config.allow_fb_modifiers = true; |
3415 |
+- |
3416 |
+ drm->mode_config.normalize_zpos = true; |
3417 |
+ |
3418 |
+ drm->mode_config.funcs = &tegra_drm_mode_config_funcs; |
3419 |
+diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c |
3420 |
+index 1f36b67cd6ce9..18f5009ce90e3 100644 |
3421 |
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c |
3422 |
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c |
3423 |
+@@ -1035,7 +1035,7 @@ static const struct vc4_pv_data bcm2711_pv3_data = { |
3424 |
+ .fifo_depth = 64, |
3425 |
+ .pixels_per_clock = 1, |
3426 |
+ .encoder_types = { |
3427 |
+- [0] = VC4_ENCODER_TYPE_VEC, |
3428 |
++ [PV_CONTROL_CLK_SELECT_VEC] = VC4_ENCODER_TYPE_VEC, |
3429 |
+ }, |
3430 |
+ }; |
3431 |
+ |
3432 |
+@@ -1076,6 +1076,9 @@ static void vc4_set_crtc_possible_masks(struct drm_device *drm, |
3433 |
+ struct vc4_encoder *vc4_encoder; |
3434 |
+ int i; |
3435 |
+ |
3436 |
++ if (encoder->encoder_type == DRM_MODE_ENCODER_VIRTUAL) |
3437 |
++ continue; |
3438 |
++ |
3439 |
+ vc4_encoder = to_vc4_encoder(encoder); |
3440 |
+ for (i = 0; i < ARRAY_SIZE(pv_data->encoder_types); i++) { |
3441 |
+ if (vc4_encoder->type == encoder_types[i]) { |
3442 |
+diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h |
3443 |
+index a7500716cf3f1..5dceadc61600e 100644 |
3444 |
+--- a/drivers/gpu/drm/vc4/vc4_drv.h |
3445 |
++++ b/drivers/gpu/drm/vc4/vc4_drv.h |
3446 |
+@@ -825,7 +825,7 @@ void vc4_crtc_destroy_state(struct drm_crtc *crtc, |
3447 |
+ void vc4_crtc_reset(struct drm_crtc *crtc); |
3448 |
+ void vc4_crtc_handle_vblank(struct vc4_crtc *crtc); |
3449 |
+ void vc4_crtc_get_margins(struct drm_crtc_state *state, |
3450 |
+- unsigned int *right, unsigned int *left, |
3451 |
++ unsigned int *left, unsigned int *right, |
3452 |
+ unsigned int *top, unsigned int *bottom); |
3453 |
+ |
3454 |
+ /* vc4_debugfs.c */ |
3455 |
+diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c |
3456 |
+index e94730beb15b7..188b74c9e9fff 100644 |
3457 |
+--- a/drivers/gpu/drm/vc4/vc4_hdmi.c |
3458 |
++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c |
3459 |
+@@ -745,7 +745,7 @@ static void vc4_hdmi_encoder_pre_crtc_configure(struct drm_encoder *encoder, |
3460 |
+ unsigned long pixel_rate, hsm_rate; |
3461 |
+ int ret; |
3462 |
+ |
3463 |
+- ret = pm_runtime_get_sync(&vc4_hdmi->pdev->dev); |
3464 |
++ ret = pm_runtime_resume_and_get(&vc4_hdmi->pdev->dev); |
3465 |
+ if (ret < 0) { |
3466 |
+ DRM_ERROR("Failed to retain power domain: %d\n", ret); |
3467 |
+ return; |
3468 |
+@@ -2012,6 +2012,14 @@ static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data) |
3469 |
+ if (vc4_hdmi->variant->reset) |
3470 |
+ vc4_hdmi->variant->reset(vc4_hdmi); |
3471 |
+ |
3472 |
++ if ((of_device_is_compatible(dev->of_node, "brcm,bcm2711-hdmi0") || |
3473 |
++ of_device_is_compatible(dev->of_node, "brcm,bcm2711-hdmi1")) && |
3474 |
++ HDMI_READ(HDMI_VID_CTL) & VC4_HD_VID_CTL_ENABLE) { |
3475 |
++ clk_prepare_enable(vc4_hdmi->pixel_clock); |
3476 |
++ clk_prepare_enable(vc4_hdmi->hsm_clock); |
3477 |
++ clk_prepare_enable(vc4_hdmi->pixel_bvb_clock); |
3478 |
++ } |
3479 |
++ |
3480 |
+ pm_runtime_enable(dev); |
3481 |
+ |
3482 |
+ drm_simple_encoder_init(drm, encoder, DRM_MODE_ENCODER_TMDS); |
3483 |
+diff --git a/drivers/gpu/drm/vc4/vc4_txp.c b/drivers/gpu/drm/vc4/vc4_txp.c |
3484 |
+index c0122d83b6511..2fc7f4b5fa098 100644 |
3485 |
+--- a/drivers/gpu/drm/vc4/vc4_txp.c |
3486 |
++++ b/drivers/gpu/drm/vc4/vc4_txp.c |
3487 |
+@@ -507,7 +507,7 @@ static int vc4_txp_bind(struct device *dev, struct device *master, void *data) |
3488 |
+ return ret; |
3489 |
+ |
3490 |
+ encoder = &txp->connector.encoder; |
3491 |
+- encoder->possible_crtcs |= drm_crtc_mask(crtc); |
3492 |
++ encoder->possible_crtcs = drm_crtc_mask(crtc); |
3493 |
+ |
3494 |
+ ret = devm_request_irq(dev, irq, vc4_txp_interrupt, 0, |
3495 |
+ dev_name(dev), txp); |
3496 |
+diff --git a/drivers/gpu/drm/virtio/virtgpu_kms.c b/drivers/gpu/drm/virtio/virtgpu_kms.c |
3497 |
+index b375394193be8..37a21a88d674c 100644 |
3498 |
+--- a/drivers/gpu/drm/virtio/virtgpu_kms.c |
3499 |
++++ b/drivers/gpu/drm/virtio/virtgpu_kms.c |
3500 |
+@@ -234,6 +234,7 @@ err_scanouts: |
3501 |
+ err_vbufs: |
3502 |
+ vgdev->vdev->config->del_vqs(vgdev->vdev); |
3503 |
+ err_vqs: |
3504 |
++ dev->dev_private = NULL; |
3505 |
+ kfree(vgdev); |
3506 |
+ return ret; |
3507 |
+ } |
3508 |
+diff --git a/drivers/gpu/drm/zte/Kconfig b/drivers/gpu/drm/zte/Kconfig |
3509 |
+index 90ebaedc11fdf..aa8594190b509 100644 |
3510 |
+--- a/drivers/gpu/drm/zte/Kconfig |
3511 |
++++ b/drivers/gpu/drm/zte/Kconfig |
3512 |
+@@ -3,7 +3,6 @@ config DRM_ZTE |
3513 |
+ tristate "DRM Support for ZTE SoCs" |
3514 |
+ depends on DRM && ARCH_ZX |
3515 |
+ select DRM_KMS_CMA_HELPER |
3516 |
+- select DRM_KMS_FB_HELPER |
3517 |
+ select DRM_KMS_HELPER |
3518 |
+ select SND_SOC_HDMI_CODEC if SND_SOC |
3519 |
+ select VIDEOMODE_HELPERS |
3520 |
+diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c |
3521 |
+index 237a8c0d6c244..30271d9e470de 100644 |
3522 |
+--- a/drivers/hwtracing/coresight/coresight-core.c |
3523 |
++++ b/drivers/hwtracing/coresight/coresight-core.c |
3524 |
+@@ -1367,7 +1367,7 @@ static int coresight_fixup_device_conns(struct coresight_device *csdev) |
3525 |
+ } |
3526 |
+ } |
3527 |
+ |
3528 |
+- return 0; |
3529 |
++ return ret; |
3530 |
+ } |
3531 |
+ |
3532 |
+ static int coresight_remove_match(struct device *dev, void *data) |
3533 |
+diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c |
3534 |
+index 45b85edfc6900..cd0fb7bfba684 100644 |
3535 |
+--- a/drivers/hwtracing/coresight/coresight-tmc-etf.c |
3536 |
++++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c |
3537 |
+@@ -530,7 +530,7 @@ static unsigned long tmc_update_etf_buffer(struct coresight_device *csdev, |
3538 |
+ buf_ptr = buf->data_pages[cur] + offset; |
3539 |
+ *buf_ptr = readl_relaxed(drvdata->base + TMC_RRD); |
3540 |
+ |
3541 |
+- if (lost && *barrier) { |
3542 |
++ if (lost && i < CORESIGHT_BARRIER_PKT_SIZE) { |
3543 |
+ *buf_ptr = *barrier; |
3544 |
+ barrier++; |
3545 |
+ } |
3546 |
+diff --git a/drivers/infiniband/core/cma.c b/drivers/infiniband/core/cma.c |
3547 |
+index bb46f794f3240..8d94a6bfcac12 100644 |
3548 |
+--- a/drivers/infiniband/core/cma.c |
3549 |
++++ b/drivers/infiniband/core/cma.c |
3550 |
+@@ -2793,7 +2793,8 @@ static int cma_resolve_ib_route(struct rdma_id_private *id_priv, |
3551 |
+ |
3552 |
+ cma_init_resolve_route_work(work, id_priv); |
3553 |
+ |
3554 |
+- route->path_rec = kmalloc(sizeof *route->path_rec, GFP_KERNEL); |
3555 |
++ if (!route->path_rec) |
3556 |
++ route->path_rec = kmalloc(sizeof *route->path_rec, GFP_KERNEL); |
3557 |
+ if (!route->path_rec) { |
3558 |
+ ret = -ENOMEM; |
3559 |
+ goto err1; |
3560 |
+diff --git a/drivers/infiniband/hw/cxgb4/qp.c b/drivers/infiniband/hw/cxgb4/qp.c |
3561 |
+index d109bb3822a5f..c9403743346e1 100644 |
3562 |
+--- a/drivers/infiniband/hw/cxgb4/qp.c |
3563 |
++++ b/drivers/infiniband/hw/cxgb4/qp.c |
3564 |
+@@ -295,6 +295,7 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq, |
3565 |
+ if (user && (!wq->sq.bar2_pa || (need_rq && !wq->rq.bar2_pa))) { |
3566 |
+ pr_warn("%s: sqid %u or rqid %u not in BAR2 range\n", |
3567 |
+ pci_name(rdev->lldi.pdev), wq->sq.qid, wq->rq.qid); |
3568 |
++ ret = -EINVAL; |
3569 |
+ goto free_dma; |
3570 |
+ } |
3571 |
+ |
3572 |
+diff --git a/drivers/infiniband/sw/rxe/rxe_mr.c b/drivers/infiniband/sw/rxe/rxe_mr.c |
3573 |
+index 9f63947bab123..fe2b7d223183f 100644 |
3574 |
+--- a/drivers/infiniband/sw/rxe/rxe_mr.c |
3575 |
++++ b/drivers/infiniband/sw/rxe/rxe_mr.c |
3576 |
+@@ -135,7 +135,7 @@ int rxe_mr_init_user(struct rxe_pd *pd, u64 start, u64 length, u64 iova, |
3577 |
+ if (IS_ERR(umem)) { |
3578 |
+ pr_warn("err %d from rxe_umem_get\n", |
3579 |
+ (int)PTR_ERR(umem)); |
3580 |
+- err = -EINVAL; |
3581 |
++ err = PTR_ERR(umem); |
3582 |
+ goto err1; |
3583 |
+ } |
3584 |
+ |
3585 |
+diff --git a/drivers/infiniband/ulp/isert/ib_isert.c b/drivers/infiniband/ulp/isert/ib_isert.c |
3586 |
+index 18266f07c58d9..de3fc05fd2e8a 100644 |
3587 |
+--- a/drivers/infiniband/ulp/isert/ib_isert.c |
3588 |
++++ b/drivers/infiniband/ulp/isert/ib_isert.c |
3589 |
+@@ -35,10 +35,10 @@ static const struct kernel_param_ops sg_tablesize_ops = { |
3590 |
+ .get = param_get_int, |
3591 |
+ }; |
3592 |
+ |
3593 |
+-static int isert_sg_tablesize = ISCSI_ISER_DEF_SG_TABLESIZE; |
3594 |
++static int isert_sg_tablesize = ISCSI_ISER_MIN_SG_TABLESIZE; |
3595 |
+ module_param_cb(sg_tablesize, &sg_tablesize_ops, &isert_sg_tablesize, 0644); |
3596 |
+ MODULE_PARM_DESC(sg_tablesize, |
3597 |
+- "Number of gather/scatter entries in a single scsi command, should >= 128 (default: 256, max: 4096)"); |
3598 |
++ "Number of gather/scatter entries in a single scsi command, should >= 128 (default: 128, max: 4096)"); |
3599 |
+ |
3600 |
+ static DEFINE_MUTEX(device_list_mutex); |
3601 |
+ static LIST_HEAD(device_list); |
3602 |
+diff --git a/drivers/infiniband/ulp/isert/ib_isert.h b/drivers/infiniband/ulp/isert/ib_isert.h |
3603 |
+index 6c5af13db4e0d..ca8cfebe26ca7 100644 |
3604 |
+--- a/drivers/infiniband/ulp/isert/ib_isert.h |
3605 |
++++ b/drivers/infiniband/ulp/isert/ib_isert.h |
3606 |
+@@ -65,9 +65,6 @@ |
3607 |
+ */ |
3608 |
+ #define ISER_RX_SIZE (ISCSI_DEF_MAX_RECV_SEG_LEN + 1024) |
3609 |
+ |
3610 |
+-/* Default I/O size is 1MB */ |
3611 |
+-#define ISCSI_ISER_DEF_SG_TABLESIZE 256 |
3612 |
+- |
3613 |
+ /* Minimum I/O size is 512KB */ |
3614 |
+ #define ISCSI_ISER_MIN_SG_TABLESIZE 128 |
3615 |
+ |
3616 |
+diff --git a/drivers/infiniband/ulp/rtrs/rtrs-pri.h b/drivers/infiniband/ulp/rtrs/rtrs-pri.h |
3617 |
+index 8caad0a2322bf..51c60f5428761 100644 |
3618 |
+--- a/drivers/infiniband/ulp/rtrs/rtrs-pri.h |
3619 |
++++ b/drivers/infiniband/ulp/rtrs/rtrs-pri.h |
3620 |
+@@ -47,12 +47,15 @@ enum { |
3621 |
+ MAX_PATHS_NUM = 128, |
3622 |
+ |
3623 |
+ /* |
3624 |
+- * With the size of struct rtrs_permit allocated on the client, 4K |
3625 |
+- * is the maximum number of rtrs_permits we can allocate. This number is |
3626 |
+- * also used on the client to allocate the IU for the user connection |
3627 |
+- * to receive the RDMA addresses from the server. |
3628 |
++ * Max IB immediate data size is 2^28 (MAX_IMM_PAYL_BITS) |
3629 |
++ * and the minimum chunk size is 4096 (2^12). |
3630 |
++ * So the maximum sess_queue_depth is 65536 (2^16) in theory. |
3631 |
++ * But mempool_create, create_qp and ib_post_send fail with |
3632 |
++ * "cannot allocate memory" error if sess_queue_depth is too big. |
3633 |
++ * Therefore the pratical max value of sess_queue_depth is |
3634 |
++ * somewhere between 1 and 65536 and it depends on the system. |
3635 |
+ */ |
3636 |
+- MAX_SESS_QUEUE_DEPTH = 4096, |
3637 |
++ MAX_SESS_QUEUE_DEPTH = 65536, |
3638 |
+ |
3639 |
+ RTRS_HB_INTERVAL_MS = 5000, |
3640 |
+ RTRS_HB_MISSED_MAX = 5, |
3641 |
+diff --git a/drivers/ipack/carriers/tpci200.c b/drivers/ipack/carriers/tpci200.c |
3642 |
+index ec71063fff76a..e1822e87ec3d2 100644 |
3643 |
+--- a/drivers/ipack/carriers/tpci200.c |
3644 |
++++ b/drivers/ipack/carriers/tpci200.c |
3645 |
+@@ -596,8 +596,11 @@ static int tpci200_pci_probe(struct pci_dev *pdev, |
3646 |
+ |
3647 |
+ out_err_bus_register: |
3648 |
+ tpci200_uninstall(tpci200); |
3649 |
++ /* tpci200->info->cfg_regs is unmapped in tpci200_uninstall */ |
3650 |
++ tpci200->info->cfg_regs = NULL; |
3651 |
+ out_err_install: |
3652 |
+- iounmap(tpci200->info->cfg_regs); |
3653 |
++ if (tpci200->info->cfg_regs) |
3654 |
++ iounmap(tpci200->info->cfg_regs); |
3655 |
+ out_err_ioremap: |
3656 |
+ pci_release_region(pdev, TPCI200_CFG_MEM_BAR); |
3657 |
+ out_err_pci_request: |
3658 |
+diff --git a/drivers/isdn/hardware/mISDN/hfcpci.c b/drivers/isdn/hardware/mISDN/hfcpci.c |
3659 |
+index 56bd2e9db6ed6..e501cb03f211d 100644 |
3660 |
+--- a/drivers/isdn/hardware/mISDN/hfcpci.c |
3661 |
++++ b/drivers/isdn/hardware/mISDN/hfcpci.c |
3662 |
+@@ -2342,7 +2342,7 @@ static void __exit |
3663 |
+ HFC_cleanup(void) |
3664 |
+ { |
3665 |
+ if (timer_pending(&hfc_tl)) |
3666 |
+- del_timer(&hfc_tl); |
3667 |
++ del_timer_sync(&hfc_tl); |
3668 |
+ |
3669 |
+ pci_unregister_driver(&hfc_driver); |
3670 |
+ } |
3671 |
+diff --git a/drivers/md/dm-writecache.c b/drivers/md/dm-writecache.c |
3672 |
+index 4f72b6f66c3ae..9e9f1ee141652 100644 |
3673 |
+--- a/drivers/md/dm-writecache.c |
3674 |
++++ b/drivers/md/dm-writecache.c |
3675 |
+@@ -532,7 +532,7 @@ static void ssd_commit_superblock(struct dm_writecache *wc) |
3676 |
+ |
3677 |
+ region.bdev = wc->ssd_dev->bdev; |
3678 |
+ region.sector = 0; |
3679 |
+- region.count = PAGE_SIZE >> SECTOR_SHIFT; |
3680 |
++ region.count = max(4096U, wc->block_size) >> SECTOR_SHIFT; |
3681 |
+ |
3682 |
+ if (unlikely(region.sector + region.count > wc->metadata_sectors)) |
3683 |
+ region.count = wc->metadata_sectors - region.sector; |
3684 |
+@@ -1301,8 +1301,12 @@ static int writecache_map(struct dm_target *ti, struct bio *bio) |
3685 |
+ writecache_flush(wc); |
3686 |
+ if (writecache_has_error(wc)) |
3687 |
+ goto unlock_error; |
3688 |
++ if (unlikely(wc->cleaner)) |
3689 |
++ goto unlock_remap_origin; |
3690 |
+ goto unlock_submit; |
3691 |
+ } else { |
3692 |
++ if (dm_bio_get_target_bio_nr(bio)) |
3693 |
++ goto unlock_remap_origin; |
3694 |
+ writecache_offload_bio(wc, bio); |
3695 |
+ goto unlock_return; |
3696 |
+ } |
3697 |
+@@ -1360,14 +1364,18 @@ read_next_block: |
3698 |
+ } else { |
3699 |
+ do { |
3700 |
+ bool found_entry = false; |
3701 |
++ bool search_used = false; |
3702 |
+ if (writecache_has_error(wc)) |
3703 |
+ goto unlock_error; |
3704 |
+ e = writecache_find_entry(wc, bio->bi_iter.bi_sector, 0); |
3705 |
+ if (e) { |
3706 |
+- if (!writecache_entry_is_committed(wc, e)) |
3707 |
++ if (!writecache_entry_is_committed(wc, e)) { |
3708 |
++ search_used = true; |
3709 |
+ goto bio_copy; |
3710 |
++ } |
3711 |
+ if (!WC_MODE_PMEM(wc) && !e->write_in_progress) { |
3712 |
+ wc->overwrote_committed = true; |
3713 |
++ search_used = true; |
3714 |
+ goto bio_copy; |
3715 |
+ } |
3716 |
+ found_entry = true; |
3717 |
+@@ -1377,7 +1385,7 @@ read_next_block: |
3718 |
+ } |
3719 |
+ e = writecache_pop_from_freelist(wc, (sector_t)-1); |
3720 |
+ if (unlikely(!e)) { |
3721 |
+- if (!found_entry) { |
3722 |
++ if (!WC_MODE_PMEM(wc) && !found_entry) { |
3723 |
+ direct_write: |
3724 |
+ e = writecache_find_entry(wc, bio->bi_iter.bi_sector, WFE_RETURN_FOLLOWING); |
3725 |
+ if (e) { |
3726 |
+@@ -1404,13 +1412,31 @@ bio_copy: |
3727 |
+ sector_t current_cache_sec = start_cache_sec + (bio_size >> SECTOR_SHIFT); |
3728 |
+ |
3729 |
+ while (bio_size < bio->bi_iter.bi_size) { |
3730 |
+- struct wc_entry *f = writecache_pop_from_freelist(wc, current_cache_sec); |
3731 |
+- if (!f) |
3732 |
+- break; |
3733 |
+- write_original_sector_seq_count(wc, f, bio->bi_iter.bi_sector + |
3734 |
+- (bio_size >> SECTOR_SHIFT), wc->seq_count); |
3735 |
+- writecache_insert_entry(wc, f); |
3736 |
+- wc->uncommitted_blocks++; |
3737 |
++ if (!search_used) { |
3738 |
++ struct wc_entry *f = writecache_pop_from_freelist(wc, current_cache_sec); |
3739 |
++ if (!f) |
3740 |
++ break; |
3741 |
++ write_original_sector_seq_count(wc, f, bio->bi_iter.bi_sector + |
3742 |
++ (bio_size >> SECTOR_SHIFT), wc->seq_count); |
3743 |
++ writecache_insert_entry(wc, f); |
3744 |
++ wc->uncommitted_blocks++; |
3745 |
++ } else { |
3746 |
++ struct wc_entry *f; |
3747 |
++ struct rb_node *next = rb_next(&e->rb_node); |
3748 |
++ if (!next) |
3749 |
++ break; |
3750 |
++ f = container_of(next, struct wc_entry, rb_node); |
3751 |
++ if (f != e + 1) |
3752 |
++ break; |
3753 |
++ if (read_original_sector(wc, f) != |
3754 |
++ read_original_sector(wc, e) + (wc->block_size >> SECTOR_SHIFT)) |
3755 |
++ break; |
3756 |
++ if (unlikely(f->write_in_progress)) |
3757 |
++ break; |
3758 |
++ if (writecache_entry_is_committed(wc, f)) |
3759 |
++ wc->overwrote_committed = true; |
3760 |
++ e = f; |
3761 |
++ } |
3762 |
+ bio_size += wc->block_size; |
3763 |
+ current_cache_sec += wc->block_size >> SECTOR_SHIFT; |
3764 |
+ } |
3765 |
+@@ -2463,7 +2489,7 @@ overflow: |
3766 |
+ goto bad; |
3767 |
+ } |
3768 |
+ |
3769 |
+- ti->num_flush_bios = 1; |
3770 |
++ ti->num_flush_bios = WC_MODE_PMEM(wc) ? 1 : 2; |
3771 |
+ ti->flush_supported = true; |
3772 |
+ ti->num_discard_bios = 1; |
3773 |
+ |
3774 |
+diff --git a/drivers/md/dm-zoned-metadata.c b/drivers/md/dm-zoned-metadata.c |
3775 |
+index 039d17b289384..ee4626d085574 100644 |
3776 |
+--- a/drivers/md/dm-zoned-metadata.c |
3777 |
++++ b/drivers/md/dm-zoned-metadata.c |
3778 |
+@@ -1390,6 +1390,13 @@ static int dmz_init_zone(struct blk_zone *blkz, unsigned int num, void *data) |
3779 |
+ return -ENXIO; |
3780 |
+ } |
3781 |
+ |
3782 |
++ /* |
3783 |
++ * Devices that have zones with a capacity smaller than the zone size |
3784 |
++ * (e.g. NVMe zoned namespaces) are not supported. |
3785 |
++ */ |
3786 |
++ if (blkz->capacity != blkz->len) |
3787 |
++ return -ENXIO; |
3788 |
++ |
3789 |
+ switch (blkz->type) { |
3790 |
+ case BLK_ZONE_TYPE_CONVENTIONAL: |
3791 |
+ set_bit(DMZ_RND, &zone->flags); |
3792 |
+diff --git a/drivers/md/dm.c b/drivers/md/dm.c |
3793 |
+index 3f3be9408afa7..05747d2736a77 100644 |
3794 |
+--- a/drivers/md/dm.c |
3795 |
++++ b/drivers/md/dm.c |
3796 |
+@@ -1239,8 +1239,8 @@ static int dm_dax_zero_page_range(struct dax_device *dax_dev, pgoff_t pgoff, |
3797 |
+ |
3798 |
+ /* |
3799 |
+ * A target may call dm_accept_partial_bio only from the map routine. It is |
3800 |
+- * allowed for all bio types except REQ_PREFLUSH, REQ_OP_ZONE_RESET, |
3801 |
+- * REQ_OP_ZONE_OPEN, REQ_OP_ZONE_CLOSE and REQ_OP_ZONE_FINISH. |
3802 |
++ * allowed for all bio types except REQ_PREFLUSH, REQ_OP_ZONE_* zone management |
3803 |
++ * operations and REQ_OP_ZONE_APPEND (zone append writes). |
3804 |
+ * |
3805 |
+ * dm_accept_partial_bio informs the dm that the target only wants to process |
3806 |
+ * additional n_sectors sectors of the bio and the rest of the data should be |
3807 |
+@@ -1270,9 +1270,13 @@ void dm_accept_partial_bio(struct bio *bio, unsigned n_sectors) |
3808 |
+ { |
3809 |
+ struct dm_target_io *tio = container_of(bio, struct dm_target_io, clone); |
3810 |
+ unsigned bi_size = bio->bi_iter.bi_size >> SECTOR_SHIFT; |
3811 |
++ |
3812 |
+ BUG_ON(bio->bi_opf & REQ_PREFLUSH); |
3813 |
++ BUG_ON(op_is_zone_mgmt(bio_op(bio))); |
3814 |
++ BUG_ON(bio_op(bio) == REQ_OP_ZONE_APPEND); |
3815 |
+ BUG_ON(bi_size > *tio->len_ptr); |
3816 |
+ BUG_ON(n_sectors > bi_size); |
3817 |
++ |
3818 |
+ *tio->len_ptr -= bi_size - n_sectors; |
3819 |
+ bio->bi_iter.bi_size = n_sectors << SECTOR_SHIFT; |
3820 |
+ } |
3821 |
+diff --git a/drivers/md/persistent-data/dm-btree-remove.c b/drivers/md/persistent-data/dm-btree-remove.c |
3822 |
+index eff04fa23dfad..9e4d1212f4c16 100644 |
3823 |
+--- a/drivers/md/persistent-data/dm-btree-remove.c |
3824 |
++++ b/drivers/md/persistent-data/dm-btree-remove.c |
3825 |
+@@ -549,7 +549,8 @@ int dm_btree_remove(struct dm_btree_info *info, dm_block_t root, |
3826 |
+ delete_at(n, index); |
3827 |
+ } |
3828 |
+ |
3829 |
+- *new_root = shadow_root(&spine); |
3830 |
++ if (!r) |
3831 |
++ *new_root = shadow_root(&spine); |
3832 |
+ exit_shadow_spine(&spine); |
3833 |
+ |
3834 |
+ return r; |
3835 |
+diff --git a/drivers/md/persistent-data/dm-space-map-disk.c b/drivers/md/persistent-data/dm-space-map-disk.c |
3836 |
+index bf4c5e2ccb6ff..e0acae7a3815d 100644 |
3837 |
+--- a/drivers/md/persistent-data/dm-space-map-disk.c |
3838 |
++++ b/drivers/md/persistent-data/dm-space-map-disk.c |
3839 |
+@@ -171,6 +171,14 @@ static int sm_disk_new_block(struct dm_space_map *sm, dm_block_t *b) |
3840 |
+ * Any block we allocate has to be free in both the old and current ll. |
3841 |
+ */ |
3842 |
+ r = sm_ll_find_common_free_block(&smd->old_ll, &smd->ll, smd->begin, smd->ll.nr_blocks, b); |
3843 |
++ if (r == -ENOSPC) { |
3844 |
++ /* |
3845 |
++ * There's no free block between smd->begin and the end of the metadata device. |
3846 |
++ * We search before smd->begin in case something has been freed. |
3847 |
++ */ |
3848 |
++ r = sm_ll_find_common_free_block(&smd->old_ll, &smd->ll, 0, smd->begin, b); |
3849 |
++ } |
3850 |
++ |
3851 |
+ if (r) |
3852 |
+ return r; |
3853 |
+ |
3854 |
+@@ -199,7 +207,6 @@ static int sm_disk_commit(struct dm_space_map *sm) |
3855 |
+ return r; |
3856 |
+ |
3857 |
+ memcpy(&smd->old_ll, &smd->ll, sizeof(smd->old_ll)); |
3858 |
+- smd->begin = 0; |
3859 |
+ smd->nr_allocated_this_transaction = 0; |
3860 |
+ |
3861 |
+ r = sm_disk_get_nr_free(sm, &nr_free); |
3862 |
+diff --git a/drivers/md/persistent-data/dm-space-map-metadata.c b/drivers/md/persistent-data/dm-space-map-metadata.c |
3863 |
+index 9e3c64ec2026f..da439ac857963 100644 |
3864 |
+--- a/drivers/md/persistent-data/dm-space-map-metadata.c |
3865 |
++++ b/drivers/md/persistent-data/dm-space-map-metadata.c |
3866 |
+@@ -452,6 +452,14 @@ static int sm_metadata_new_block_(struct dm_space_map *sm, dm_block_t *b) |
3867 |
+ * Any block we allocate has to be free in both the old and current ll. |
3868 |
+ */ |
3869 |
+ r = sm_ll_find_common_free_block(&smm->old_ll, &smm->ll, smm->begin, smm->ll.nr_blocks, b); |
3870 |
++ if (r == -ENOSPC) { |
3871 |
++ /* |
3872 |
++ * There's no free block between smm->begin and the end of the metadata device. |
3873 |
++ * We search before smm->begin in case something has been freed. |
3874 |
++ */ |
3875 |
++ r = sm_ll_find_common_free_block(&smm->old_ll, &smm->ll, 0, smm->begin, b); |
3876 |
++ } |
3877 |
++ |
3878 |
+ if (r) |
3879 |
+ return r; |
3880 |
+ |
3881 |
+@@ -503,7 +511,6 @@ static int sm_metadata_commit(struct dm_space_map *sm) |
3882 |
+ return r; |
3883 |
+ |
3884 |
+ memcpy(&smm->old_ll, &smm->ll, sizeof(smm->old_ll)); |
3885 |
+- smm->begin = 0; |
3886 |
+ smm->allocated_this_transaction = 0; |
3887 |
+ |
3888 |
+ return 0; |
3889 |
+diff --git a/drivers/media/i2c/ccs/ccs-core.c b/drivers/media/i2c/ccs/ccs-core.c |
3890 |
+index fde0c51f04069..220240f62a666 100644 |
3891 |
+--- a/drivers/media/i2c/ccs/ccs-core.c |
3892 |
++++ b/drivers/media/i2c/ccs/ccs-core.c |
3893 |
+@@ -1880,21 +1880,33 @@ static int ccs_pm_get_init(struct ccs_sensor *sensor) |
3894 |
+ struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd); |
3895 |
+ int rval; |
3896 |
+ |
3897 |
++ /* |
3898 |
++ * It can't use pm_runtime_resume_and_get() here, as the driver |
3899 |
++ * relies at the returned value to detect if the device was already |
3900 |
++ * active or not. |
3901 |
++ */ |
3902 |
+ rval = pm_runtime_get_sync(&client->dev); |
3903 |
+- if (rval < 0) { |
3904 |
+- pm_runtime_put_noidle(&client->dev); |
3905 |
++ if (rval < 0) |
3906 |
++ goto error; |
3907 |
+ |
3908 |
+- return rval; |
3909 |
+- } else if (!rval) { |
3910 |
+- rval = v4l2_ctrl_handler_setup(&sensor->pixel_array-> |
3911 |
+- ctrl_handler); |
3912 |
+- if (rval) |
3913 |
+- return rval; |
3914 |
++ /* Device was already active, so don't set controls */ |
3915 |
++ if (rval == 1) |
3916 |
++ return 0; |
3917 |
+ |
3918 |
+- return v4l2_ctrl_handler_setup(&sensor->src->ctrl_handler); |
3919 |
+- } |
3920 |
++ /* Restore V4L2 controls to the previously suspended device */ |
3921 |
++ rval = v4l2_ctrl_handler_setup(&sensor->pixel_array->ctrl_handler); |
3922 |
++ if (rval) |
3923 |
++ goto error; |
3924 |
+ |
3925 |
++ rval = v4l2_ctrl_handler_setup(&sensor->src->ctrl_handler); |
3926 |
++ if (rval) |
3927 |
++ goto error; |
3928 |
++ |
3929 |
++ /* Keep PM runtime usage_count incremented on success */ |
3930 |
+ return 0; |
3931 |
++error: |
3932 |
++ pm_runtime_put(&client->dev); |
3933 |
++ return rval; |
3934 |
+ } |
3935 |
+ |
3936 |
+ static int ccs_set_stream(struct v4l2_subdev *subdev, int enable) |
3937 |
+diff --git a/drivers/media/i2c/ccs/ccs-limits.c b/drivers/media/i2c/ccs/ccs-limits.c |
3938 |
+index f5511789ac837..4969fa425317d 100644 |
3939 |
+--- a/drivers/media/i2c/ccs/ccs-limits.c |
3940 |
++++ b/drivers/media/i2c/ccs/ccs-limits.c |
3941 |
+@@ -1,5 +1,9 @@ |
3942 |
+ // SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause |
3943 |
+ /* Copyright (C) 2019--2020 Intel Corporation */ |
3944 |
++/* |
3945 |
++ * Generated by Documentation/driver-api/media/drivers/ccs/mk-ccs-regs; |
3946 |
++ * do not modify. |
3947 |
++ */ |
3948 |
+ |
3949 |
+ #include "ccs-limits.h" |
3950 |
+ #include "ccs-regs.h" |
3951 |
+diff --git a/drivers/media/i2c/ccs/ccs-limits.h b/drivers/media/i2c/ccs/ccs-limits.h |
3952 |
+index 1efa43c23a2eb..551d3ee9d04e1 100644 |
3953 |
+--- a/drivers/media/i2c/ccs/ccs-limits.h |
3954 |
++++ b/drivers/media/i2c/ccs/ccs-limits.h |
3955 |
+@@ -1,5 +1,9 @@ |
3956 |
+ /* SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause */ |
3957 |
+ /* Copyright (C) 2019--2020 Intel Corporation */ |
3958 |
++/* |
3959 |
++ * Generated by Documentation/driver-api/media/drivers/ccs/mk-ccs-regs; |
3960 |
++ * do not modify. |
3961 |
++ */ |
3962 |
+ |
3963 |
+ #ifndef __CCS_LIMITS_H__ |
3964 |
+ #define __CCS_LIMITS_H__ |
3965 |
+diff --git a/drivers/media/i2c/ccs/ccs-regs.h b/drivers/media/i2c/ccs/ccs-regs.h |
3966 |
+index 4b3e5df2121f8..6ce84c5ecf207 100644 |
3967 |
+--- a/drivers/media/i2c/ccs/ccs-regs.h |
3968 |
++++ b/drivers/media/i2c/ccs/ccs-regs.h |
3969 |
+@@ -1,5 +1,9 @@ |
3970 |
+ /* SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause */ |
3971 |
+ /* Copyright (C) 2019--2020 Intel Corporation */ |
3972 |
++/* |
3973 |
++ * Generated by Documentation/driver-api/media/drivers/ccs/mk-ccs-regs; |
3974 |
++ * do not modify. |
3975 |
++ */ |
3976 |
+ |
3977 |
+ #ifndef __CCS_REGS_H__ |
3978 |
+ #define __CCS_REGS_H__ |
3979 |
+@@ -202,7 +206,7 @@ |
3980 |
+ #define CCS_R_OP_PIX_CLK_DIV (0x0308 | CCS_FL_16BIT) |
3981 |
+ #define CCS_R_OP_SYS_CLK_DIV (0x030a | CCS_FL_16BIT) |
3982 |
+ #define CCS_R_OP_PRE_PLL_CLK_DIV (0x030c | CCS_FL_16BIT) |
3983 |
+-#define CCS_R_OP_PLL_MULTIPLIER (0x031e | CCS_FL_16BIT) |
3984 |
++#define CCS_R_OP_PLL_MULTIPLIER (0x030e | CCS_FL_16BIT) |
3985 |
+ #define CCS_R_PLL_MODE 0x0310 |
3986 |
+ #define CCS_PLL_MODE_SHIFT 0U |
3987 |
+ #define CCS_PLL_MODE_MASK 0x1 |
3988 |
+diff --git a/drivers/media/i2c/saa6588.c b/drivers/media/i2c/saa6588.c |
3989 |
+index ecb491d5f2ab8..d1e0716bdfffd 100644 |
3990 |
+--- a/drivers/media/i2c/saa6588.c |
3991 |
++++ b/drivers/media/i2c/saa6588.c |
3992 |
+@@ -380,7 +380,7 @@ static void saa6588_configure(struct saa6588 *s) |
3993 |
+ |
3994 |
+ /* ---------------------------------------------------------------------- */ |
3995 |
+ |
3996 |
+-static long saa6588_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) |
3997 |
++static long saa6588_command(struct v4l2_subdev *sd, unsigned int cmd, void *arg) |
3998 |
+ { |
3999 |
+ struct saa6588 *s = to_saa6588(sd); |
4000 |
+ struct saa6588_command *a = arg; |
4001 |
+@@ -433,7 +433,7 @@ static int saa6588_s_tuner(struct v4l2_subdev *sd, const struct v4l2_tuner *vt) |
4002 |
+ /* ----------------------------------------------------------------------- */ |
4003 |
+ |
4004 |
+ static const struct v4l2_subdev_core_ops saa6588_core_ops = { |
4005 |
+- .ioctl = saa6588_ioctl, |
4006 |
++ .command = saa6588_command, |
4007 |
+ }; |
4008 |
+ |
4009 |
+ static const struct v4l2_subdev_tuner_ops saa6588_tuner_ops = { |
4010 |
+diff --git a/drivers/media/pci/bt8xx/bttv-driver.c b/drivers/media/pci/bt8xx/bttv-driver.c |
4011 |
+index 1f62a9d8ea1d3..0e9df8b35ac66 100644 |
4012 |
+--- a/drivers/media/pci/bt8xx/bttv-driver.c |
4013 |
++++ b/drivers/media/pci/bt8xx/bttv-driver.c |
4014 |
+@@ -3179,7 +3179,7 @@ static int radio_release(struct file *file) |
4015 |
+ |
4016 |
+ btv->radio_user--; |
4017 |
+ |
4018 |
+- bttv_call_all(btv, core, ioctl, SAA6588_CMD_CLOSE, &cmd); |
4019 |
++ bttv_call_all(btv, core, command, SAA6588_CMD_CLOSE, &cmd); |
4020 |
+ |
4021 |
+ if (btv->radio_user == 0) |
4022 |
+ btv->has_radio_tuner = 0; |
4023 |
+@@ -3260,7 +3260,7 @@ static ssize_t radio_read(struct file *file, char __user *data, |
4024 |
+ cmd.result = -ENODEV; |
4025 |
+ radio_enable(btv); |
4026 |
+ |
4027 |
+- bttv_call_all(btv, core, ioctl, SAA6588_CMD_READ, &cmd); |
4028 |
++ bttv_call_all(btv, core, command, SAA6588_CMD_READ, &cmd); |
4029 |
+ |
4030 |
+ return cmd.result; |
4031 |
+ } |
4032 |
+@@ -3281,7 +3281,7 @@ static __poll_t radio_poll(struct file *file, poll_table *wait) |
4033 |
+ cmd.instance = file; |
4034 |
+ cmd.event_list = wait; |
4035 |
+ cmd.poll_mask = res; |
4036 |
+- bttv_call_all(btv, core, ioctl, SAA6588_CMD_POLL, &cmd); |
4037 |
++ bttv_call_all(btv, core, command, SAA6588_CMD_POLL, &cmd); |
4038 |
+ |
4039 |
+ return cmd.poll_mask; |
4040 |
+ } |
4041 |
+diff --git a/drivers/media/pci/saa7134/saa7134-video.c b/drivers/media/pci/saa7134/saa7134-video.c |
4042 |
+index 0f9d6b9edb90a..374c8e1087de1 100644 |
4043 |
+--- a/drivers/media/pci/saa7134/saa7134-video.c |
4044 |
++++ b/drivers/media/pci/saa7134/saa7134-video.c |
4045 |
+@@ -1181,7 +1181,7 @@ static int video_release(struct file *file) |
4046 |
+ |
4047 |
+ saa_call_all(dev, tuner, standby); |
4048 |
+ if (vdev->vfl_type == VFL_TYPE_RADIO) |
4049 |
+- saa_call_all(dev, core, ioctl, SAA6588_CMD_CLOSE, &cmd); |
4050 |
++ saa_call_all(dev, core, command, SAA6588_CMD_CLOSE, &cmd); |
4051 |
+ mutex_unlock(&dev->lock); |
4052 |
+ |
4053 |
+ return 0; |
4054 |
+@@ -1200,7 +1200,7 @@ static ssize_t radio_read(struct file *file, char __user *data, |
4055 |
+ cmd.result = -ENODEV; |
4056 |
+ |
4057 |
+ mutex_lock(&dev->lock); |
4058 |
+- saa_call_all(dev, core, ioctl, SAA6588_CMD_READ, &cmd); |
4059 |
++ saa_call_all(dev, core, command, SAA6588_CMD_READ, &cmd); |
4060 |
+ mutex_unlock(&dev->lock); |
4061 |
+ |
4062 |
+ return cmd.result; |
4063 |
+@@ -1216,7 +1216,7 @@ static __poll_t radio_poll(struct file *file, poll_table *wait) |
4064 |
+ cmd.event_list = wait; |
4065 |
+ cmd.poll_mask = 0; |
4066 |
+ mutex_lock(&dev->lock); |
4067 |
+- saa_call_all(dev, core, ioctl, SAA6588_CMD_POLL, &cmd); |
4068 |
++ saa_call_all(dev, core, command, SAA6588_CMD_POLL, &cmd); |
4069 |
+ mutex_unlock(&dev->lock); |
4070 |
+ |
4071 |
+ return rc | cmd.poll_mask; |
4072 |
+diff --git a/drivers/media/platform/davinci/vpbe_display.c b/drivers/media/platform/davinci/vpbe_display.c |
4073 |
+index d19bad997f30c..bf3c3e76b9213 100644 |
4074 |
+--- a/drivers/media/platform/davinci/vpbe_display.c |
4075 |
++++ b/drivers/media/platform/davinci/vpbe_display.c |
4076 |
+@@ -47,7 +47,7 @@ static int venc_is_second_field(struct vpbe_display *disp_dev) |
4077 |
+ |
4078 |
+ ret = v4l2_subdev_call(vpbe_dev->venc, |
4079 |
+ core, |
4080 |
+- ioctl, |
4081 |
++ command, |
4082 |
+ VENC_GET_FLD, |
4083 |
+ &val); |
4084 |
+ if (ret < 0) { |
4085 |
+diff --git a/drivers/media/platform/davinci/vpbe_venc.c b/drivers/media/platform/davinci/vpbe_venc.c |
4086 |
+index 8caa084e57046..bde241c26d795 100644 |
4087 |
+--- a/drivers/media/platform/davinci/vpbe_venc.c |
4088 |
++++ b/drivers/media/platform/davinci/vpbe_venc.c |
4089 |
+@@ -521,9 +521,7 @@ static int venc_s_routing(struct v4l2_subdev *sd, u32 input, u32 output, |
4090 |
+ return ret; |
4091 |
+ } |
4092 |
+ |
4093 |
+-static long venc_ioctl(struct v4l2_subdev *sd, |
4094 |
+- unsigned int cmd, |
4095 |
+- void *arg) |
4096 |
++static long venc_command(struct v4l2_subdev *sd, unsigned int cmd, void *arg) |
4097 |
+ { |
4098 |
+ u32 val; |
4099 |
+ |
4100 |
+@@ -542,7 +540,7 @@ static long venc_ioctl(struct v4l2_subdev *sd, |
4101 |
+ } |
4102 |
+ |
4103 |
+ static const struct v4l2_subdev_core_ops venc_core_ops = { |
4104 |
+- .ioctl = venc_ioctl, |
4105 |
++ .command = venc_command, |
4106 |
+ }; |
4107 |
+ |
4108 |
+ static const struct v4l2_subdev_video_ops venc_video_ops = { |
4109 |
+diff --git a/drivers/media/rc/bpf-lirc.c b/drivers/media/rc/bpf-lirc.c |
4110 |
+index 3fe3edd808765..afae0afe3f810 100644 |
4111 |
+--- a/drivers/media/rc/bpf-lirc.c |
4112 |
++++ b/drivers/media/rc/bpf-lirc.c |
4113 |
+@@ -326,7 +326,8 @@ int lirc_prog_query(const union bpf_attr *attr, union bpf_attr __user *uattr) |
4114 |
+ } |
4115 |
+ |
4116 |
+ if (attr->query.prog_cnt != 0 && prog_ids && cnt) |
4117 |
+- ret = bpf_prog_array_copy_to_user(progs, prog_ids, cnt); |
4118 |
++ ret = bpf_prog_array_copy_to_user(progs, prog_ids, |
4119 |
++ attr->query.prog_cnt); |
4120 |
+ |
4121 |
+ unlock: |
4122 |
+ mutex_unlock(&ir_raw_handler_lock); |
4123 |
+diff --git a/drivers/media/usb/dvb-usb/dtv5100.c b/drivers/media/usb/dvb-usb/dtv5100.c |
4124 |
+index fba06932a9e0e..1c13e493322cc 100644 |
4125 |
+--- a/drivers/media/usb/dvb-usb/dtv5100.c |
4126 |
++++ b/drivers/media/usb/dvb-usb/dtv5100.c |
4127 |
+@@ -26,6 +26,7 @@ static int dtv5100_i2c_msg(struct dvb_usb_device *d, u8 addr, |
4128 |
+ u8 *wbuf, u16 wlen, u8 *rbuf, u16 rlen) |
4129 |
+ { |
4130 |
+ struct dtv5100_state *st = d->priv; |
4131 |
++ unsigned int pipe; |
4132 |
+ u8 request; |
4133 |
+ u8 type; |
4134 |
+ u16 value; |
4135 |
+@@ -34,6 +35,7 @@ static int dtv5100_i2c_msg(struct dvb_usb_device *d, u8 addr, |
4136 |
+ switch (wlen) { |
4137 |
+ case 1: |
4138 |
+ /* write { reg }, read { value } */ |
4139 |
++ pipe = usb_rcvctrlpipe(d->udev, 0); |
4140 |
+ request = (addr == DTV5100_DEMOD_ADDR ? DTV5100_DEMOD_READ : |
4141 |
+ DTV5100_TUNER_READ); |
4142 |
+ type = USB_TYPE_VENDOR | USB_DIR_IN; |
4143 |
+@@ -41,6 +43,7 @@ static int dtv5100_i2c_msg(struct dvb_usb_device *d, u8 addr, |
4144 |
+ break; |
4145 |
+ case 2: |
4146 |
+ /* write { reg, value } */ |
4147 |
++ pipe = usb_sndctrlpipe(d->udev, 0); |
4148 |
+ request = (addr == DTV5100_DEMOD_ADDR ? DTV5100_DEMOD_WRITE : |
4149 |
+ DTV5100_TUNER_WRITE); |
4150 |
+ type = USB_TYPE_VENDOR | USB_DIR_OUT; |
4151 |
+@@ -54,7 +57,7 @@ static int dtv5100_i2c_msg(struct dvb_usb_device *d, u8 addr, |
4152 |
+ |
4153 |
+ memcpy(st->data, rbuf, rlen); |
4154 |
+ msleep(1); /* avoid I2C errors */ |
4155 |
+- return usb_control_msg(d->udev, usb_rcvctrlpipe(d->udev, 0), request, |
4156 |
++ return usb_control_msg(d->udev, pipe, request, |
4157 |
+ type, value, index, st->data, rlen, |
4158 |
+ DTV5100_USB_TIMEOUT); |
4159 |
+ } |
4160 |
+@@ -141,7 +144,7 @@ static int dtv5100_probe(struct usb_interface *intf, |
4161 |
+ |
4162 |
+ /* initialize non qt1010/zl10353 part? */ |
4163 |
+ for (i = 0; dtv5100_init[i].request; i++) { |
4164 |
+- ret = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0), |
4165 |
++ ret = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), |
4166 |
+ dtv5100_init[i].request, |
4167 |
+ USB_TYPE_VENDOR | USB_DIR_OUT, |
4168 |
+ dtv5100_init[i].value, |
4169 |
+diff --git a/drivers/media/usb/gspca/sq905.c b/drivers/media/usb/gspca/sq905.c |
4170 |
+index 9491110709718..32504ebcfd4de 100644 |
4171 |
+--- a/drivers/media/usb/gspca/sq905.c |
4172 |
++++ b/drivers/media/usb/gspca/sq905.c |
4173 |
+@@ -116,7 +116,7 @@ static int sq905_command(struct gspca_dev *gspca_dev, u16 index) |
4174 |
+ } |
4175 |
+ |
4176 |
+ ret = usb_control_msg(gspca_dev->dev, |
4177 |
+- usb_sndctrlpipe(gspca_dev->dev, 0), |
4178 |
++ usb_rcvctrlpipe(gspca_dev->dev, 0), |
4179 |
+ USB_REQ_SYNCH_FRAME, /* request */ |
4180 |
+ USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, |
4181 |
+ SQ905_PING, 0, gspca_dev->usb_buf, 1, |
4182 |
+diff --git a/drivers/media/usb/gspca/sunplus.c b/drivers/media/usb/gspca/sunplus.c |
4183 |
+index ace3da40006e7..971dee0a56dae 100644 |
4184 |
+--- a/drivers/media/usb/gspca/sunplus.c |
4185 |
++++ b/drivers/media/usb/gspca/sunplus.c |
4186 |
+@@ -242,6 +242,10 @@ static void reg_r(struct gspca_dev *gspca_dev, |
4187 |
+ gspca_err(gspca_dev, "reg_r: buffer overflow\n"); |
4188 |
+ return; |
4189 |
+ } |
4190 |
++ if (len == 0) { |
4191 |
++ gspca_err(gspca_dev, "reg_r: zero-length read\n"); |
4192 |
++ return; |
4193 |
++ } |
4194 |
+ if (gspca_dev->usb_err < 0) |
4195 |
+ return; |
4196 |
+ ret = usb_control_msg(gspca_dev->dev, |
4197 |
+@@ -250,7 +254,7 @@ static void reg_r(struct gspca_dev *gspca_dev, |
4198 |
+ USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, |
4199 |
+ 0, /* value */ |
4200 |
+ index, |
4201 |
+- len ? gspca_dev->usb_buf : NULL, len, |
4202 |
++ gspca_dev->usb_buf, len, |
4203 |
+ 500); |
4204 |
+ if (ret < 0) { |
4205 |
+ pr_err("reg_r err %d\n", ret); |
4206 |
+@@ -727,7 +731,7 @@ static int sd_start(struct gspca_dev *gspca_dev) |
4207 |
+ case MegaImageVI: |
4208 |
+ reg_w_riv(gspca_dev, 0xf0, 0, 0); |
4209 |
+ spca504B_WaitCmdStatus(gspca_dev); |
4210 |
+- reg_r(gspca_dev, 0xf0, 4, 0); |
4211 |
++ reg_w_riv(gspca_dev, 0xf0, 4, 0); |
4212 |
+ spca504B_WaitCmdStatus(gspca_dev); |
4213 |
+ break; |
4214 |
+ default: |
4215 |
+diff --git a/drivers/media/usb/uvc/uvc_video.c b/drivers/media/usb/uvc/uvc_video.c |
4216 |
+index f2f565281e63f..9046d8ba7c634 100644 |
4217 |
+--- a/drivers/media/usb/uvc/uvc_video.c |
4218 |
++++ b/drivers/media/usb/uvc/uvc_video.c |
4219 |
+@@ -124,10 +124,37 @@ int uvc_query_ctrl(struct uvc_device *dev, u8 query, u8 unit, |
4220 |
+ static void uvc_fixup_video_ctrl(struct uvc_streaming *stream, |
4221 |
+ struct uvc_streaming_control *ctrl) |
4222 |
+ { |
4223 |
++ static const struct usb_device_id elgato_cam_link_4k = { |
4224 |
++ USB_DEVICE(0x0fd9, 0x0066) |
4225 |
++ }; |
4226 |
+ struct uvc_format *format = NULL; |
4227 |
+ struct uvc_frame *frame = NULL; |
4228 |
+ unsigned int i; |
4229 |
+ |
4230 |
++ /* |
4231 |
++ * The response of the Elgato Cam Link 4K is incorrect: The second byte |
4232 |
++ * contains bFormatIndex (instead of being the second byte of bmHint). |
4233 |
++ * The first byte is always zero. The third byte is always 1. |
4234 |
++ * |
4235 |
++ * The UVC 1.5 class specification defines the first five bits in the |
4236 |
++ * bmHint bitfield. The remaining bits are reserved and should be zero. |
4237 |
++ * Therefore a valid bmHint will be less than 32. |
4238 |
++ * |
4239 |
++ * Latest Elgato Cam Link 4K firmware as of 2021-03-23 needs this fix. |
4240 |
++ * MCU: 20.02.19, FPGA: 67 |
4241 |
++ */ |
4242 |
++ if (usb_match_one_id(stream->dev->intf, &elgato_cam_link_4k) && |
4243 |
++ ctrl->bmHint > 255) { |
4244 |
++ u8 corrected_format_index = ctrl->bmHint >> 8; |
4245 |
++ |
4246 |
++ uvc_dbg(stream->dev, VIDEO, |
4247 |
++ "Correct USB video probe response from {bmHint: 0x%04x, bFormatIndex: %u} to {bmHint: 0x%04x, bFormatIndex: %u}\n", |
4248 |
++ ctrl->bmHint, ctrl->bFormatIndex, |
4249 |
++ 1, corrected_format_index); |
4250 |
++ ctrl->bmHint = 1; |
4251 |
++ ctrl->bFormatIndex = corrected_format_index; |
4252 |
++ } |
4253 |
++ |
4254 |
+ for (i = 0; i < stream->nformats; ++i) { |
4255 |
+ if (stream->format[i].index == ctrl->bFormatIndex) { |
4256 |
+ format = &stream->format[i]; |
4257 |
+diff --git a/drivers/media/usb/zr364xx/zr364xx.c b/drivers/media/usb/zr364xx/zr364xx.c |
4258 |
+index 1ef611e083237..538a330046ec9 100644 |
4259 |
+--- a/drivers/media/usb/zr364xx/zr364xx.c |
4260 |
++++ b/drivers/media/usb/zr364xx/zr364xx.c |
4261 |
+@@ -1032,6 +1032,7 @@ static int zr364xx_start_readpipe(struct zr364xx_camera *cam) |
4262 |
+ DBG("submitting URB %p\n", pipe_info->stream_urb); |
4263 |
+ retval = usb_submit_urb(pipe_info->stream_urb, GFP_KERNEL); |
4264 |
+ if (retval) { |
4265 |
++ usb_free_urb(pipe_info->stream_urb); |
4266 |
+ printk(KERN_ERR KBUILD_MODNAME ": start read pipe failed\n"); |
4267 |
+ return retval; |
4268 |
+ } |
4269 |
+diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c |
4270 |
+index 7e8bf4b1ab2e5..efdf6a5475cb3 100644 |
4271 |
+--- a/drivers/media/v4l2-core/v4l2-ioctl.c |
4272 |
++++ b/drivers/media/v4l2-core/v4l2-ioctl.c |
4273 |
+@@ -3166,8 +3166,10 @@ static int video_get_user(void __user *arg, void *parg, |
4274 |
+ if (copy_from_user(parg, (void __user *)arg, n)) |
4275 |
+ err = -EFAULT; |
4276 |
+ } else if (in_compat_syscall()) { |
4277 |
++ memset(parg, 0, n); |
4278 |
+ err = v4l2_compat_get_user(arg, parg, cmd); |
4279 |
+ } else { |
4280 |
++ memset(parg, 0, n); |
4281 |
+ #if !defined(CONFIG_64BIT) && defined(CONFIG_COMPAT_32BIT_TIME) |
4282 |
+ switch (cmd) { |
4283 |
+ case VIDIOC_QUERYBUF_TIME32: |
4284 |
+diff --git a/drivers/mfd/syscon.c b/drivers/mfd/syscon.c |
4285 |
+index c6f139b2e0c09..765c0210cb528 100644 |
4286 |
+--- a/drivers/mfd/syscon.c |
4287 |
++++ b/drivers/mfd/syscon.c |
4288 |
+@@ -108,6 +108,7 @@ static struct syscon *of_syscon_register(struct device_node *np, bool check_clk) |
4289 |
+ syscon_config.max_register = resource_size(&res) - reg_io_width; |
4290 |
+ |
4291 |
+ regmap = regmap_init_mmio(NULL, base, &syscon_config); |
4292 |
++ kfree(syscon_config.name); |
4293 |
+ if (IS_ERR(regmap)) { |
4294 |
+ pr_err("regmap init failed\n"); |
4295 |
+ ret = PTR_ERR(regmap); |
4296 |
+@@ -144,7 +145,6 @@ err_clk: |
4297 |
+ regmap_exit(regmap); |
4298 |
+ err_regmap: |
4299 |
+ iounmap(base); |
4300 |
+- kfree(syscon_config.name); |
4301 |
+ err_map: |
4302 |
+ kfree(syscon); |
4303 |
+ return ERR_PTR(ret); |
4304 |
+diff --git a/drivers/misc/lkdtm/bugs.c b/drivers/misc/lkdtm/bugs.c |
4305 |
+index 110f5a8538e96..8787d1d6774b1 100644 |
4306 |
+--- a/drivers/misc/lkdtm/bugs.c |
4307 |
++++ b/drivers/misc/lkdtm/bugs.c |
4308 |
+@@ -144,6 +144,9 @@ void lkdtm_UNALIGNED_LOAD_STORE_WRITE(void) |
4309 |
+ if (*p == 0) |
4310 |
+ val = 0x87654321; |
4311 |
+ *p = val; |
4312 |
++ |
4313 |
++ if (IS_ENABLED(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS)) |
4314 |
++ pr_err("XFAIL: arch has CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS\n"); |
4315 |
+ } |
4316 |
+ |
4317 |
+ void lkdtm_SOFTLOCKUP(void) |
4318 |
+diff --git a/drivers/misc/lkdtm/core.c b/drivers/misc/lkdtm/core.c |
4319 |
+index b2aff4d87c014..94ed7860cfee3 100644 |
4320 |
+--- a/drivers/misc/lkdtm/core.c |
4321 |
++++ b/drivers/misc/lkdtm/core.c |
4322 |
+@@ -176,9 +176,7 @@ static const struct crashtype crashtypes[] = { |
4323 |
+ CRASHTYPE(STACKLEAK_ERASING), |
4324 |
+ CRASHTYPE(CFI_FORWARD_PROTO), |
4325 |
+ CRASHTYPE(FORTIFIED_STRSCPY), |
4326 |
+-#ifdef CONFIG_X86_32 |
4327 |
+ CRASHTYPE(DOUBLE_FAULT), |
4328 |
+-#endif |
4329 |
+ #ifdef CONFIG_PPC_BOOK3S_64 |
4330 |
+ CRASHTYPE(PPC_SLB_MULTIHIT), |
4331 |
+ #endif |
4332 |
+diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c |
4333 |
+index e30c4e88e4043..f988bc91e65f3 100644 |
4334 |
+--- a/drivers/mmc/core/core.c |
4335 |
++++ b/drivers/mmc/core/core.c |
4336 |
+@@ -937,11 +937,14 @@ int mmc_execute_tuning(struct mmc_card *card) |
4337 |
+ |
4338 |
+ err = host->ops->execute_tuning(host, opcode); |
4339 |
+ |
4340 |
+- if (err) |
4341 |
++ if (err) { |
4342 |
+ pr_err("%s: tuning execution failed: %d\n", |
4343 |
+ mmc_hostname(host), err); |
4344 |
+- else |
4345 |
++ } else { |
4346 |
++ host->retune_now = 0; |
4347 |
++ host->need_retune = 0; |
4348 |
+ mmc_retune_enable(host); |
4349 |
++ } |
4350 |
+ |
4351 |
+ return err; |
4352 |
+ } |
4353 |
+diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c |
4354 |
+index 2c48d65041013..e277ef4fa0995 100644 |
4355 |
+--- a/drivers/mmc/core/sd.c |
4356 |
++++ b/drivers/mmc/core/sd.c |
4357 |
+@@ -847,11 +847,13 @@ try_again: |
4358 |
+ return err; |
4359 |
+ |
4360 |
+ /* |
4361 |
+- * In case CCS and S18A in the response is set, start Signal Voltage |
4362 |
+- * Switch procedure. SPI mode doesn't support CMD11. |
4363 |
++ * In case the S18A bit is set in the response, let's start the signal |
4364 |
++ * voltage switch procedure. SPI mode doesn't support CMD11. |
4365 |
++ * Note that, according to the spec, the S18A bit is not valid unless |
4366 |
++ * the CCS bit is set as well. We deliberately deviate from the spec in |
4367 |
++ * regards to this, which allows UHS-I to be supported for SDSC cards. |
4368 |
+ */ |
4369 |
+- if (!mmc_host_is_spi(host) && rocr && |
4370 |
+- ((*rocr & 0x41000000) == 0x41000000)) { |
4371 |
++ if (!mmc_host_is_spi(host) && rocr && (*rocr & 0x01000000)) { |
4372 |
+ err = mmc_set_uhs_voltage(host, pocr); |
4373 |
+ if (err == -EAGAIN) { |
4374 |
+ retries--; |
4375 |
+diff --git a/drivers/mmc/host/sdhci-acpi.c b/drivers/mmc/host/sdhci-acpi.c |
4376 |
+index b6574e7fd26bf..9e4358d7a0a66 100644 |
4377 |
+--- a/drivers/mmc/host/sdhci-acpi.c |
4378 |
++++ b/drivers/mmc/host/sdhci-acpi.c |
4379 |
+@@ -820,6 +820,17 @@ static const struct dmi_system_id sdhci_acpi_quirks[] = { |
4380 |
+ }, |
4381 |
+ .driver_data = (void *)DMI_QUIRK_SD_NO_WRITE_PROTECT, |
4382 |
+ }, |
4383 |
++ { |
4384 |
++ /* |
4385 |
++ * The Toshiba WT8-B's microSD slot always reports the card being |
4386 |
++ * write-protected. |
4387 |
++ */ |
4388 |
++ .matches = { |
4389 |
++ DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), |
4390 |
++ DMI_MATCH(DMI_PRODUCT_NAME, "TOSHIBA ENCORE 2 WT8-B"), |
4391 |
++ }, |
4392 |
++ .driver_data = (void *)DMI_QUIRK_SD_NO_WRITE_PROTECT, |
4393 |
++ }, |
4394 |
+ {} /* Terminating entry */ |
4395 |
+ }; |
4396 |
+ |
4397 |
+diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c |
4398 |
+index a9e20818ff3a3..76ef837430caa 100644 |
4399 |
+--- a/drivers/mmc/host/sdhci.c |
4400 |
++++ b/drivers/mmc/host/sdhci.c |
4401 |
+@@ -1812,6 +1812,10 @@ static u16 sdhci_get_preset_value(struct sdhci_host *host) |
4402 |
+ u16 preset = 0; |
4403 |
+ |
4404 |
+ switch (host->timing) { |
4405 |
++ case MMC_TIMING_MMC_HS: |
4406 |
++ case MMC_TIMING_SD_HS: |
4407 |
++ preset = sdhci_readw(host, SDHCI_PRESET_FOR_HIGH_SPEED); |
4408 |
++ break; |
4409 |
+ case MMC_TIMING_UHS_SDR12: |
4410 |
+ preset = sdhci_readw(host, SDHCI_PRESET_FOR_SDR12); |
4411 |
+ break; |
4412 |
+diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h |
4413 |
+index 0770c036e2ff5..960fed78529e1 100644 |
4414 |
+--- a/drivers/mmc/host/sdhci.h |
4415 |
++++ b/drivers/mmc/host/sdhci.h |
4416 |
+@@ -253,6 +253,7 @@ |
4417 |
+ |
4418 |
+ /* 60-FB reserved */ |
4419 |
+ |
4420 |
++#define SDHCI_PRESET_FOR_HIGH_SPEED 0x64 |
4421 |
+ #define SDHCI_PRESET_FOR_SDR12 0x66 |
4422 |
+ #define SDHCI_PRESET_FOR_SDR25 0x68 |
4423 |
+ #define SDHCI_PRESET_FOR_SDR50 0x6A |
4424 |
+diff --git a/drivers/net/dsa/ocelot/seville_vsc9953.c b/drivers/net/dsa/ocelot/seville_vsc9953.c |
4425 |
+index 84f93a874d502..deae923c8b7a8 100644 |
4426 |
+--- a/drivers/net/dsa/ocelot/seville_vsc9953.c |
4427 |
++++ b/drivers/net/dsa/ocelot/seville_vsc9953.c |
4428 |
+@@ -1206,6 +1206,11 @@ static int seville_probe(struct platform_device *pdev) |
4429 |
+ felix->info = &seville_info_vsc9953; |
4430 |
+ |
4431 |
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
4432 |
++ if (!res) { |
4433 |
++ err = -EINVAL; |
4434 |
++ dev_err(&pdev->dev, "Invalid resource\n"); |
4435 |
++ goto err_alloc_felix; |
4436 |
++ } |
4437 |
+ felix->switch_base = res->start; |
4438 |
+ |
4439 |
+ ds = kzalloc(sizeof(struct dsa_switch), GFP_KERNEL); |
4440 |
+diff --git a/drivers/net/ethernet/broadcom/genet/bcmmii.c b/drivers/net/ethernet/broadcom/genet/bcmmii.c |
4441 |
+index 5335244e4577a..89d16c587bb7d 100644 |
4442 |
+--- a/drivers/net/ethernet/broadcom/genet/bcmmii.c |
4443 |
++++ b/drivers/net/ethernet/broadcom/genet/bcmmii.c |
4444 |
+@@ -423,6 +423,10 @@ static int bcmgenet_mii_register(struct bcmgenet_priv *priv) |
4445 |
+ int id, ret; |
4446 |
+ |
4447 |
+ pres = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
4448 |
++ if (!pres) { |
4449 |
++ dev_err(&pdev->dev, "Invalid resource\n"); |
4450 |
++ return -EINVAL; |
4451 |
++ } |
4452 |
+ memset(&res, 0, sizeof(res)); |
4453 |
+ memset(&ppd, 0, sizeof(ppd)); |
4454 |
+ |
4455 |
+diff --git a/drivers/net/ethernet/freescale/fec.h b/drivers/net/ethernet/freescale/fec.h |
4456 |
+index 0602d5d5d2eee..2e002e4b4b4aa 100644 |
4457 |
+--- a/drivers/net/ethernet/freescale/fec.h |
4458 |
++++ b/drivers/net/ethernet/freescale/fec.h |
4459 |
+@@ -467,6 +467,11 @@ struct bufdesc_ex { |
4460 |
+ */ |
4461 |
+ #define FEC_QUIRK_NO_HARD_RESET (1 << 18) |
4462 |
+ |
4463 |
++/* i.MX6SX ENET IP supports multiple queues (3 queues), use this quirk to |
4464 |
++ * represents this ENET IP. |
4465 |
++ */ |
4466 |
++#define FEC_QUIRK_HAS_MULTI_QUEUES (1 << 19) |
4467 |
++ |
4468 |
+ struct bufdesc_prop { |
4469 |
+ int qid; |
4470 |
+ /* Address of Rx and Tx buffers */ |
4471 |
+diff --git a/drivers/net/ethernet/freescale/fec_main.c b/drivers/net/ethernet/freescale/fec_main.c |
4472 |
+index 89393fbc726f6..6c097ae3bac58 100644 |
4473 |
+--- a/drivers/net/ethernet/freescale/fec_main.c |
4474 |
++++ b/drivers/net/ethernet/freescale/fec_main.c |
4475 |
+@@ -75,6 +75,8 @@ static void fec_enet_itr_coal_init(struct net_device *ndev); |
4476 |
+ |
4477 |
+ #define DRIVER_NAME "fec" |
4478 |
+ |
4479 |
++static const u16 fec_enet_vlan_pri_to_queue[8] = {0, 0, 1, 1, 1, 2, 2, 2}; |
4480 |
++ |
4481 |
+ /* Pause frame feild and FIFO threshold */ |
4482 |
+ #define FEC_ENET_FCE (1 << 5) |
4483 |
+ #define FEC_ENET_RSEM_V 0x84 |
4484 |
+@@ -121,7 +123,7 @@ static const struct fec_devinfo fec_imx6x_info = { |
4485 |
+ FEC_QUIRK_HAS_VLAN | FEC_QUIRK_HAS_AVB | |
4486 |
+ FEC_QUIRK_ERR007885 | FEC_QUIRK_BUG_CAPTURE | |
4487 |
+ FEC_QUIRK_HAS_RACC | FEC_QUIRK_HAS_COALESCE | |
4488 |
+- FEC_QUIRK_CLEAR_SETUP_MII, |
4489 |
++ FEC_QUIRK_CLEAR_SETUP_MII | FEC_QUIRK_HAS_MULTI_QUEUES, |
4490 |
+ }; |
4491 |
+ |
4492 |
+ static const struct fec_devinfo fec_imx6ul_info = { |
4493 |
+@@ -420,6 +422,7 @@ fec_enet_txq_submit_frag_skb(struct fec_enet_priv_tx_q *txq, |
4494 |
+ estatus |= FEC_TX_BD_FTYPE(txq->bd.qid); |
4495 |
+ if (skb->ip_summed == CHECKSUM_PARTIAL) |
4496 |
+ estatus |= BD_ENET_TX_PINS | BD_ENET_TX_IINS; |
4497 |
++ |
4498 |
+ ebdp->cbd_bdu = 0; |
4499 |
+ ebdp->cbd_esc = cpu_to_fec32(estatus); |
4500 |
+ } |
4501 |
+@@ -953,7 +956,7 @@ fec_restart(struct net_device *ndev) |
4502 |
+ * For i.MX6SX SOC, enet use AXI bus, we use disable MAC |
4503 |
+ * instead of reset MAC itself. |
4504 |
+ */ |
4505 |
+- if (fep->quirks & FEC_QUIRK_HAS_AVB || |
4506 |
++ if (fep->quirks & FEC_QUIRK_HAS_MULTI_QUEUES || |
4507 |
+ ((fep->quirks & FEC_QUIRK_NO_HARD_RESET) && fep->link)) { |
4508 |
+ writel(0, fep->hwp + FEC_ECNTRL); |
4509 |
+ } else { |
4510 |
+@@ -1164,7 +1167,7 @@ fec_stop(struct net_device *ndev) |
4511 |
+ * instead of reset MAC itself. |
4512 |
+ */ |
4513 |
+ if (!(fep->wol_flag & FEC_WOL_FLAG_SLEEP_ON)) { |
4514 |
+- if (fep->quirks & FEC_QUIRK_HAS_AVB) { |
4515 |
++ if (fep->quirks & FEC_QUIRK_HAS_MULTI_QUEUES) { |
4516 |
+ writel(0, fep->hwp + FEC_ECNTRL); |
4517 |
+ } else { |
4518 |
+ writel(1, fep->hwp + FEC_ECNTRL); |
4519 |
+@@ -2559,7 +2562,7 @@ static void fec_enet_itr_coal_set(struct net_device *ndev) |
4520 |
+ |
4521 |
+ writel(tx_itr, fep->hwp + FEC_TXIC0); |
4522 |
+ writel(rx_itr, fep->hwp + FEC_RXIC0); |
4523 |
+- if (fep->quirks & FEC_QUIRK_HAS_AVB) { |
4524 |
++ if (fep->quirks & FEC_QUIRK_HAS_MULTI_QUEUES) { |
4525 |
+ writel(tx_itr, fep->hwp + FEC_TXIC1); |
4526 |
+ writel(rx_itr, fep->hwp + FEC_RXIC1); |
4527 |
+ writel(tx_itr, fep->hwp + FEC_TXIC2); |
4528 |
+@@ -3227,10 +3230,40 @@ static int fec_set_features(struct net_device *netdev, |
4529 |
+ return 0; |
4530 |
+ } |
4531 |
+ |
4532 |
++static u16 fec_enet_get_raw_vlan_tci(struct sk_buff *skb) |
4533 |
++{ |
4534 |
++ struct vlan_ethhdr *vhdr; |
4535 |
++ unsigned short vlan_TCI = 0; |
4536 |
++ |
4537 |
++ if (skb->protocol == htons(ETH_P_ALL)) { |
4538 |
++ vhdr = (struct vlan_ethhdr *)(skb->data); |
4539 |
++ vlan_TCI = ntohs(vhdr->h_vlan_TCI); |
4540 |
++ } |
4541 |
++ |
4542 |
++ return vlan_TCI; |
4543 |
++} |
4544 |
++ |
4545 |
++static u16 fec_enet_select_queue(struct net_device *ndev, struct sk_buff *skb, |
4546 |
++ struct net_device *sb_dev) |
4547 |
++{ |
4548 |
++ struct fec_enet_private *fep = netdev_priv(ndev); |
4549 |
++ u16 vlan_tag; |
4550 |
++ |
4551 |
++ if (!(fep->quirks & FEC_QUIRK_HAS_AVB)) |
4552 |
++ return netdev_pick_tx(ndev, skb, NULL); |
4553 |
++ |
4554 |
++ vlan_tag = fec_enet_get_raw_vlan_tci(skb); |
4555 |
++ if (!vlan_tag) |
4556 |
++ return vlan_tag; |
4557 |
++ |
4558 |
++ return fec_enet_vlan_pri_to_queue[vlan_tag >> 13]; |
4559 |
++} |
4560 |
++ |
4561 |
+ static const struct net_device_ops fec_netdev_ops = { |
4562 |
+ .ndo_open = fec_enet_open, |
4563 |
+ .ndo_stop = fec_enet_close, |
4564 |
+ .ndo_start_xmit = fec_enet_start_xmit, |
4565 |
++ .ndo_select_queue = fec_enet_select_queue, |
4566 |
+ .ndo_set_rx_mode = set_multicast_list, |
4567 |
+ .ndo_validate_addr = eth_validate_addr, |
4568 |
+ .ndo_tx_timeout = fec_timeout, |
4569 |
+@@ -3356,7 +3389,7 @@ static int fec_enet_init(struct net_device *ndev) |
4570 |
+ fep->csum_flags |= FLAG_RX_CSUM_ENABLED; |
4571 |
+ } |
4572 |
+ |
4573 |
+- if (fep->quirks & FEC_QUIRK_HAS_AVB) { |
4574 |
++ if (fep->quirks & FEC_QUIRK_HAS_MULTI_QUEUES) { |
4575 |
+ fep->tx_align = 0; |
4576 |
+ fep->rx_align = 0x3f; |
4577 |
+ } |
4578 |
+diff --git a/drivers/net/ethernet/ibm/ibmvnic.c b/drivers/net/ethernet/ibm/ibmvnic.c |
4579 |
+index 3c77897b3f31f..df10b87ca0f80 100644 |
4580 |
+--- a/drivers/net/ethernet/ibm/ibmvnic.c |
4581 |
++++ b/drivers/net/ethernet/ibm/ibmvnic.c |
4582 |
+@@ -1528,7 +1528,8 @@ static int create_hdr_descs(u8 hdr_field, u8 *hdr_data, int len, int *hdr_len, |
4583 |
+ |
4584 |
+ /** |
4585 |
+ * build_hdr_descs_arr - build a header descriptor array |
4586 |
+- * @txbuff: tx buffer |
4587 |
++ * @skb: tx socket buffer |
4588 |
++ * @indir_arr: indirect array |
4589 |
+ * @num_entries: number of descriptors to be sent |
4590 |
+ * @hdr_field: bit field determining which headers will be sent |
4591 |
+ * |
4592 |
+diff --git a/drivers/net/ethernet/intel/e100.c b/drivers/net/ethernet/intel/e100.c |
4593 |
+index f8d78af76d7de..1b0958bd24f6c 100644 |
4594 |
+--- a/drivers/net/ethernet/intel/e100.c |
4595 |
++++ b/drivers/net/ethernet/intel/e100.c |
4596 |
+@@ -1395,7 +1395,7 @@ static int e100_phy_check_without_mii(struct nic *nic) |
4597 |
+ u8 phy_type; |
4598 |
+ int without_mii; |
4599 |
+ |
4600 |
+- phy_type = (nic->eeprom[eeprom_phy_iface] >> 8) & 0x0f; |
4601 |
++ phy_type = (le16_to_cpu(nic->eeprom[eeprom_phy_iface]) >> 8) & 0x0f; |
4602 |
+ |
4603 |
+ switch (phy_type) { |
4604 |
+ case NoSuchPhy: /* Non-MII PHY; UNTESTED! */ |
4605 |
+@@ -1515,7 +1515,7 @@ static int e100_phy_init(struct nic *nic) |
4606 |
+ mdio_write(netdev, nic->mii.phy_id, MII_BMCR, bmcr); |
4607 |
+ } else if ((nic->mac >= mac_82550_D102) || ((nic->flags & ich) && |
4608 |
+ (mdio_read(netdev, nic->mii.phy_id, MII_TPISTATUS) & 0x8000) && |
4609 |
+- (nic->eeprom[eeprom_cnfg_mdix] & eeprom_mdix_enabled))) { |
4610 |
++ (le16_to_cpu(nic->eeprom[eeprom_cnfg_mdix]) & eeprom_mdix_enabled))) { |
4611 |
+ /* enable/disable MDI/MDI-X auto-switching. */ |
4612 |
+ mdio_write(netdev, nic->mii.phy_id, MII_NCONFIG, |
4613 |
+ nic->mii.force_media ? 0 : NCONFIG_AUTO_SWITCH); |
4614 |
+@@ -2269,9 +2269,9 @@ static int e100_asf(struct nic *nic) |
4615 |
+ { |
4616 |
+ /* ASF can be enabled from eeprom */ |
4617 |
+ return (nic->pdev->device >= 0x1050) && (nic->pdev->device <= 0x1057) && |
4618 |
+- (nic->eeprom[eeprom_config_asf] & eeprom_asf) && |
4619 |
+- !(nic->eeprom[eeprom_config_asf] & eeprom_gcl) && |
4620 |
+- ((nic->eeprom[eeprom_smbus_addr] & 0xFF) != 0xFE); |
4621 |
++ (le16_to_cpu(nic->eeprom[eeprom_config_asf]) & eeprom_asf) && |
4622 |
++ !(le16_to_cpu(nic->eeprom[eeprom_config_asf]) & eeprom_gcl) && |
4623 |
++ ((le16_to_cpu(nic->eeprom[eeprom_smbus_addr]) & 0xFF) != 0xFE); |
4624 |
+ } |
4625 |
+ |
4626 |
+ static int e100_up(struct nic *nic) |
4627 |
+@@ -2926,7 +2926,7 @@ static int e100_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
4628 |
+ |
4629 |
+ /* Wol magic packet can be enabled from eeprom */ |
4630 |
+ if ((nic->mac >= mac_82558_D101_A4) && |
4631 |
+- (nic->eeprom[eeprom_id] & eeprom_id_wol)) { |
4632 |
++ (le16_to_cpu(nic->eeprom[eeprom_id]) & eeprom_id_wol)) { |
4633 |
+ nic->flags |= wol_magic; |
4634 |
+ device_set_wakeup_enable(&pdev->dev, true); |
4635 |
+ } |
4636 |
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_ptp.c b/drivers/net/ethernet/intel/i40e/i40e_ptp.c |
4637 |
+index 7a879614ca55e..1dad6c93ac9c8 100644 |
4638 |
+--- a/drivers/net/ethernet/intel/i40e/i40e_ptp.c |
4639 |
++++ b/drivers/net/ethernet/intel/i40e/i40e_ptp.c |
4640 |
+@@ -11,13 +11,14 @@ |
4641 |
+ * operate with the nanosecond field directly without fear of overflow. |
4642 |
+ * |
4643 |
+ * Much like the 82599, the update period is dependent upon the link speed: |
4644 |
+- * At 40Gb link or no link, the period is 1.6ns. |
4645 |
+- * At 10Gb link, the period is multiplied by 2. (3.2ns) |
4646 |
++ * At 40Gb, 25Gb, or no link, the period is 1.6ns. |
4647 |
++ * At 10Gb or 5Gb link, the period is multiplied by 2. (3.2ns) |
4648 |
+ * At 1Gb link, the period is multiplied by 20. (32ns) |
4649 |
+ * 1588 functionality is not supported at 100Mbps. |
4650 |
+ */ |
4651 |
+ #define I40E_PTP_40GB_INCVAL 0x0199999999ULL |
4652 |
+ #define I40E_PTP_10GB_INCVAL_MULT 2 |
4653 |
++#define I40E_PTP_5GB_INCVAL_MULT 2 |
4654 |
+ #define I40E_PTP_1GB_INCVAL_MULT 20 |
4655 |
+ |
4656 |
+ #define I40E_PRTTSYN_CTL1_TSYNTYPE_V1 BIT(I40E_PRTTSYN_CTL1_TSYNTYPE_SHIFT) |
4657 |
+@@ -465,6 +466,9 @@ void i40e_ptp_set_increment(struct i40e_pf *pf) |
4658 |
+ case I40E_LINK_SPEED_10GB: |
4659 |
+ mult = I40E_PTP_10GB_INCVAL_MULT; |
4660 |
+ break; |
4661 |
++ case I40E_LINK_SPEED_5GB: |
4662 |
++ mult = I40E_PTP_5GB_INCVAL_MULT; |
4663 |
++ break; |
4664 |
+ case I40E_LINK_SPEED_1GB: |
4665 |
+ mult = I40E_PTP_1GB_INCVAL_MULT; |
4666 |
+ break; |
4667 |
+diff --git a/drivers/net/ethernet/intel/ice/ice_ethtool.c b/drivers/net/ethernet/intel/ice/ice_ethtool.c |
4668 |
+index f80fff97d8dce..0d136708f9607 100644 |
4669 |
+--- a/drivers/net/ethernet/intel/ice/ice_ethtool.c |
4670 |
++++ b/drivers/net/ethernet/intel/ice/ice_ethtool.c |
4671 |
+@@ -3492,13 +3492,9 @@ static int |
4672 |
+ ice_get_rc_coalesce(struct ethtool_coalesce *ec, enum ice_container_type c_type, |
4673 |
+ struct ice_ring_container *rc) |
4674 |
+ { |
4675 |
+- struct ice_pf *pf; |
4676 |
+- |
4677 |
+ if (!rc->ring) |
4678 |
+ return -EINVAL; |
4679 |
+ |
4680 |
+- pf = rc->ring->vsi->back; |
4681 |
+- |
4682 |
+ switch (c_type) { |
4683 |
+ case ICE_RX_CONTAINER: |
4684 |
+ ec->use_adaptive_rx_coalesce = ITR_IS_DYNAMIC(rc->itr_setting); |
4685 |
+@@ -3510,7 +3506,7 @@ ice_get_rc_coalesce(struct ethtool_coalesce *ec, enum ice_container_type c_type, |
4686 |
+ ec->tx_coalesce_usecs = rc->itr_setting & ~ICE_ITR_DYNAMIC; |
4687 |
+ break; |
4688 |
+ default: |
4689 |
+- dev_dbg(ice_pf_to_dev(pf), "Invalid c_type %d\n", c_type); |
4690 |
++ dev_dbg(ice_pf_to_dev(rc->ring->vsi->back), "Invalid c_type %d\n", c_type); |
4691 |
+ return -EINVAL; |
4692 |
+ } |
4693 |
+ |
4694 |
+diff --git a/drivers/net/ethernet/intel/ice/ice_lan_tx_rx.h b/drivers/net/ethernet/intel/ice/ice_lan_tx_rx.h |
4695 |
+index 4ec24c3e813fe..c0ee0541e53fc 100644 |
4696 |
+--- a/drivers/net/ethernet/intel/ice/ice_lan_tx_rx.h |
4697 |
++++ b/drivers/net/ethernet/intel/ice/ice_lan_tx_rx.h |
4698 |
+@@ -608,7 +608,7 @@ static const struct ice_rx_ptype_decoded ice_ptype_lkup[] = { |
4699 |
+ /* L2 Packet types */ |
4700 |
+ ICE_PTT_UNUSED_ENTRY(0), |
4701 |
+ ICE_PTT(1, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2), |
4702 |
+- ICE_PTT(2, L2, NONE, NOF, NONE, NONE, NOF, NONE, NONE), |
4703 |
++ ICE_PTT_UNUSED_ENTRY(2), |
4704 |
+ ICE_PTT_UNUSED_ENTRY(3), |
4705 |
+ ICE_PTT_UNUSED_ENTRY(4), |
4706 |
+ ICE_PTT_UNUSED_ENTRY(5), |
4707 |
+@@ -722,7 +722,7 @@ static const struct ice_rx_ptype_decoded ice_ptype_lkup[] = { |
4708 |
+ /* Non Tunneled IPv6 */ |
4709 |
+ ICE_PTT(88, IP, IPV6, FRG, NONE, NONE, NOF, NONE, PAY3), |
4710 |
+ ICE_PTT(89, IP, IPV6, NOF, NONE, NONE, NOF, NONE, PAY3), |
4711 |
+- ICE_PTT(90, IP, IPV6, NOF, NONE, NONE, NOF, UDP, PAY3), |
4712 |
++ ICE_PTT(90, IP, IPV6, NOF, NONE, NONE, NOF, UDP, PAY4), |
4713 |
+ ICE_PTT_UNUSED_ENTRY(91), |
4714 |
+ ICE_PTT(92, IP, IPV6, NOF, NONE, NONE, NOF, TCP, PAY4), |
4715 |
+ ICE_PTT(93, IP, IPV6, NOF, NONE, NONE, NOF, SCTP, PAY4), |
4716 |
+diff --git a/drivers/net/ethernet/intel/ice/ice_type.h b/drivers/net/ethernet/intel/ice/ice_type.h |
4717 |
+index 266036b7a49ab..8a90c47e337df 100644 |
4718 |
+--- a/drivers/net/ethernet/intel/ice/ice_type.h |
4719 |
++++ b/drivers/net/ethernet/intel/ice/ice_type.h |
4720 |
+@@ -63,7 +63,7 @@ enum ice_aq_res_ids { |
4721 |
+ /* FW update timeout definitions are in milliseconds */ |
4722 |
+ #define ICE_NVM_TIMEOUT 180000 |
4723 |
+ #define ICE_CHANGE_LOCK_TIMEOUT 1000 |
4724 |
+-#define ICE_GLOBAL_CFG_LOCK_TIMEOUT 3000 |
4725 |
++#define ICE_GLOBAL_CFG_LOCK_TIMEOUT 5000 |
4726 |
+ |
4727 |
+ enum ice_aq_res_access_type { |
4728 |
+ ICE_RES_READ = 1, |
4729 |
+diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c |
4730 |
+index caa8929289ae7..434220a342dfb 100644 |
4731 |
+--- a/drivers/net/ethernet/intel/igb/igb_main.c |
4732 |
++++ b/drivers/net/ethernet/intel/igb/igb_main.c |
4733 |
+@@ -2643,7 +2643,8 @@ static int igb_parse_cls_flower(struct igb_adapter *adapter, |
4734 |
+ } |
4735 |
+ |
4736 |
+ input->filter.match_flags |= IGB_FILTER_FLAG_VLAN_TCI; |
4737 |
+- input->filter.vlan_tci = match.key->vlan_priority; |
4738 |
++ input->filter.vlan_tci = |
4739 |
++ (__force __be16)match.key->vlan_priority; |
4740 |
+ } |
4741 |
+ } |
4742 |
+ |
4743 |
+@@ -6276,12 +6277,12 @@ int igb_xmit_xdp_ring(struct igb_adapter *adapter, |
4744 |
+ cmd_type |= len | IGB_TXD_DCMD; |
4745 |
+ tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type); |
4746 |
+ |
4747 |
+- olinfo_status = cpu_to_le32(len << E1000_ADVTXD_PAYLEN_SHIFT); |
4748 |
++ olinfo_status = len << E1000_ADVTXD_PAYLEN_SHIFT; |
4749 |
+ /* 82575 requires a unique index per ring */ |
4750 |
+ if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags)) |
4751 |
+ olinfo_status |= tx_ring->reg_idx << 4; |
4752 |
+ |
4753 |
+- tx_desc->read.olinfo_status = olinfo_status; |
4754 |
++ tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status); |
4755 |
+ |
4756 |
+ netdev_tx_sent_queue(txring_txq(tx_ring), tx_buffer->bytecount); |
4757 |
+ |
4758 |
+@@ -8593,7 +8594,7 @@ static void igb_process_skb_fields(struct igb_ring *rx_ring, |
4759 |
+ |
4760 |
+ if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) && |
4761 |
+ test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags)) |
4762 |
+- vid = be16_to_cpu(rx_desc->wb.upper.vlan); |
4763 |
++ vid = be16_to_cpu((__force __be16)rx_desc->wb.upper.vlan); |
4764 |
+ else |
4765 |
+ vid = le16_to_cpu(rx_desc->wb.upper.vlan); |
4766 |
+ |
4767 |
+diff --git a/drivers/net/ethernet/intel/igbvf/netdev.c b/drivers/net/ethernet/intel/igbvf/netdev.c |
4768 |
+index fb3fbcb133310..630c1155f1965 100644 |
4769 |
+--- a/drivers/net/ethernet/intel/igbvf/netdev.c |
4770 |
++++ b/drivers/net/ethernet/intel/igbvf/netdev.c |
4771 |
+@@ -83,14 +83,14 @@ static int igbvf_desc_unused(struct igbvf_ring *ring) |
4772 |
+ static void igbvf_receive_skb(struct igbvf_adapter *adapter, |
4773 |
+ struct net_device *netdev, |
4774 |
+ struct sk_buff *skb, |
4775 |
+- u32 status, u16 vlan) |
4776 |
++ u32 status, __le16 vlan) |
4777 |
+ { |
4778 |
+ u16 vid; |
4779 |
+ |
4780 |
+ if (status & E1000_RXD_STAT_VP) { |
4781 |
+ if ((adapter->flags & IGBVF_FLAG_RX_LB_VLAN_BSWAP) && |
4782 |
+ (status & E1000_RXDEXT_STATERR_LB)) |
4783 |
+- vid = be16_to_cpu(vlan) & E1000_RXD_SPC_VLAN_MASK; |
4784 |
++ vid = be16_to_cpu((__force __be16)vlan) & E1000_RXD_SPC_VLAN_MASK; |
4785 |
+ else |
4786 |
+ vid = le16_to_cpu(vlan) & E1000_RXD_SPC_VLAN_MASK; |
4787 |
+ if (test_bit(vid, adapter->active_vlans)) |
4788 |
+diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c |
4789 |
+index bf06f2d785db6..fbee581d02b4b 100644 |
4790 |
+--- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c |
4791 |
++++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c |
4792 |
+@@ -7388,6 +7388,10 @@ static int mvpp2_probe(struct platform_device *pdev) |
4793 |
+ return PTR_ERR(priv->lms_base); |
4794 |
+ } else { |
4795 |
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
4796 |
++ if (!res) { |
4797 |
++ dev_err(&pdev->dev, "Invalid resource\n"); |
4798 |
++ return -EINVAL; |
4799 |
++ } |
4800 |
+ if (has_acpi_companion(&pdev->dev)) { |
4801 |
+ /* In case the MDIO memory region is declared in |
4802 |
+ * the ACPI, it can already appear as 'in-use' |
4803 |
+diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c |
4804 |
+index 249d8905e644a..e7528fa7e1876 100644 |
4805 |
+--- a/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c |
4806 |
++++ b/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c |
4807 |
+@@ -1308,7 +1308,8 @@ static void mlx5e_handle_rx_cqe_rep(struct mlx5e_rq *rq, struct mlx5_cqe64 *cqe) |
4808 |
+ if (rep->vlan && skb_vlan_tag_present(skb)) |
4809 |
+ skb_vlan_pop(skb); |
4810 |
+ |
4811 |
+- if (!mlx5e_rep_tc_update_skb(cqe, skb, &tc_priv)) { |
4812 |
++ if (unlikely(!mlx5_ipsec_is_rx_flow(cqe) && |
4813 |
++ !mlx5e_rep_tc_update_skb(cqe, skb, &tc_priv))) { |
4814 |
+ dev_kfree_skb_any(skb); |
4815 |
+ goto free_wqe; |
4816 |
+ } |
4817 |
+@@ -1365,7 +1366,8 @@ static void mlx5e_handle_rx_cqe_mpwrq_rep(struct mlx5e_rq *rq, struct mlx5_cqe64 |
4818 |
+ |
4819 |
+ mlx5e_complete_rx_cqe(rq, cqe, cqe_bcnt, skb); |
4820 |
+ |
4821 |
+- if (!mlx5e_rep_tc_update_skb(cqe, skb, &tc_priv)) { |
4822 |
++ if (unlikely(!mlx5_ipsec_is_rx_flow(cqe) && |
4823 |
++ !mlx5e_rep_tc_update_skb(cqe, skb, &tc_priv))) { |
4824 |
+ dev_kfree_skb_any(skb); |
4825 |
+ goto mpwrq_cqe_out; |
4826 |
+ } |
4827 |
+diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lag.c b/drivers/net/ethernet/mellanox/mlx5/core/lag.c |
4828 |
+index 83a05371e2aa1..8d029401ca6cc 100644 |
4829 |
+--- a/drivers/net/ethernet/mellanox/mlx5/core/lag.c |
4830 |
++++ b/drivers/net/ethernet/mellanox/mlx5/core/lag.c |
4831 |
+@@ -118,17 +118,24 @@ static bool __mlx5_lag_is_sriov(struct mlx5_lag *ldev) |
4832 |
+ static void mlx5_infer_tx_affinity_mapping(struct lag_tracker *tracker, |
4833 |
+ u8 *port1, u8 *port2) |
4834 |
+ { |
4835 |
++ bool p1en; |
4836 |
++ bool p2en; |
4837 |
++ |
4838 |
++ p1en = tracker->netdev_state[MLX5_LAG_P1].tx_enabled && |
4839 |
++ tracker->netdev_state[MLX5_LAG_P1].link_up; |
4840 |
++ |
4841 |
++ p2en = tracker->netdev_state[MLX5_LAG_P2].tx_enabled && |
4842 |
++ tracker->netdev_state[MLX5_LAG_P2].link_up; |
4843 |
++ |
4844 |
+ *port1 = 1; |
4845 |
+ *port2 = 2; |
4846 |
+- if (!tracker->netdev_state[MLX5_LAG_P1].tx_enabled || |
4847 |
+- !tracker->netdev_state[MLX5_LAG_P1].link_up) { |
4848 |
+- *port1 = 2; |
4849 |
++ if ((!p1en && !p2en) || (p1en && p2en)) |
4850 |
+ return; |
4851 |
+- } |
4852 |
+ |
4853 |
+- if (!tracker->netdev_state[MLX5_LAG_P2].tx_enabled || |
4854 |
+- !tracker->netdev_state[MLX5_LAG_P2].link_up) |
4855 |
++ if (p1en) |
4856 |
+ *port2 = 1; |
4857 |
++ else |
4858 |
++ *port1 = 2; |
4859 |
+ } |
4860 |
+ |
4861 |
+ void mlx5_modify_lag(struct mlx5_lag *ldev, |
4862 |
+diff --git a/drivers/net/ethernet/micrel/ks8842.c b/drivers/net/ethernet/micrel/ks8842.c |
4863 |
+index caa251d0e3815..b27713906d3a6 100644 |
4864 |
+--- a/drivers/net/ethernet/micrel/ks8842.c |
4865 |
++++ b/drivers/net/ethernet/micrel/ks8842.c |
4866 |
+@@ -1135,6 +1135,10 @@ static int ks8842_probe(struct platform_device *pdev) |
4867 |
+ unsigned i; |
4868 |
+ |
4869 |
+ iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
4870 |
++ if (!iomem) { |
4871 |
++ dev_err(&pdev->dev, "Invalid resource\n"); |
4872 |
++ return -EINVAL; |
4873 |
++ } |
4874 |
+ if (!request_mem_region(iomem->start, resource_size(iomem), DRV_NAME)) |
4875 |
+ goto err_mem_region; |
4876 |
+ |
4877 |
+diff --git a/drivers/net/ethernet/moxa/moxart_ether.c b/drivers/net/ethernet/moxa/moxart_ether.c |
4878 |
+index 49fd843c4c8a0..a4380c45f6689 100644 |
4879 |
+--- a/drivers/net/ethernet/moxa/moxart_ether.c |
4880 |
++++ b/drivers/net/ethernet/moxa/moxart_ether.c |
4881 |
+@@ -481,14 +481,13 @@ static int moxart_mac_probe(struct platform_device *pdev) |
4882 |
+ priv->ndev = ndev; |
4883 |
+ priv->pdev = pdev; |
4884 |
+ |
4885 |
+- res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
4886 |
+- ndev->base_addr = res->start; |
4887 |
+- priv->base = devm_ioremap_resource(p_dev, res); |
4888 |
++ priv->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); |
4889 |
+ if (IS_ERR(priv->base)) { |
4890 |
+ dev_err(p_dev, "devm_ioremap_resource failed\n"); |
4891 |
+ ret = PTR_ERR(priv->base); |
4892 |
+ goto init_fail; |
4893 |
+ } |
4894 |
++ ndev->base_addr = res->start; |
4895 |
+ |
4896 |
+ spin_lock_init(&priv->txlock); |
4897 |
+ |
4898 |
+diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c |
4899 |
+index 1b32a43f70242..df0501b5fe830 100644 |
4900 |
+--- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c |
4901 |
++++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c |
4902 |
+@@ -107,7 +107,7 @@ static int pch_ptp_match(struct sk_buff *skb, u16 uid_hi, u32 uid_lo, u16 seqid) |
4903 |
+ { |
4904 |
+ u8 *data = skb->data; |
4905 |
+ unsigned int offset; |
4906 |
+- u16 *hi, *id; |
4907 |
++ u16 hi, id; |
4908 |
+ u32 lo; |
4909 |
+ |
4910 |
+ if (ptp_classify_raw(skb) == PTP_CLASS_NONE) |
4911 |
+@@ -118,14 +118,11 @@ static int pch_ptp_match(struct sk_buff *skb, u16 uid_hi, u32 uid_lo, u16 seqid) |
4912 |
+ if (skb->len < offset + OFF_PTP_SEQUENCE_ID + sizeof(seqid)) |
4913 |
+ return 0; |
4914 |
+ |
4915 |
+- hi = (u16 *)(data + offset + OFF_PTP_SOURCE_UUID); |
4916 |
+- id = (u16 *)(data + offset + OFF_PTP_SEQUENCE_ID); |
4917 |
++ hi = get_unaligned_be16(data + offset + OFF_PTP_SOURCE_UUID + 0); |
4918 |
++ lo = get_unaligned_be32(data + offset + OFF_PTP_SOURCE_UUID + 2); |
4919 |
++ id = get_unaligned_be16(data + offset + OFF_PTP_SEQUENCE_ID); |
4920 |
+ |
4921 |
+- memcpy(&lo, &hi[1], sizeof(lo)); |
4922 |
+- |
4923 |
+- return (uid_hi == *hi && |
4924 |
+- uid_lo == lo && |
4925 |
+- seqid == *id); |
4926 |
++ return (uid_hi == hi && uid_lo == lo && seqid == id); |
4927 |
+ } |
4928 |
+ |
4929 |
+ static void |
4930 |
+@@ -135,7 +132,6 @@ pch_rx_timestamp(struct pch_gbe_adapter *adapter, struct sk_buff *skb) |
4931 |
+ struct pci_dev *pdev; |
4932 |
+ u64 ns; |
4933 |
+ u32 hi, lo, val; |
4934 |
+- u16 uid, seq; |
4935 |
+ |
4936 |
+ if (!adapter->hwts_rx_en) |
4937 |
+ return; |
4938 |
+@@ -151,10 +147,7 @@ pch_rx_timestamp(struct pch_gbe_adapter *adapter, struct sk_buff *skb) |
4939 |
+ lo = pch_src_uuid_lo_read(pdev); |
4940 |
+ hi = pch_src_uuid_hi_read(pdev); |
4941 |
+ |
4942 |
+- uid = hi & 0xffff; |
4943 |
+- seq = (hi >> 16) & 0xffff; |
4944 |
+- |
4945 |
+- if (!pch_ptp_match(skb, htons(uid), htonl(lo), htons(seq))) |
4946 |
++ if (!pch_ptp_match(skb, hi, lo, hi >> 16)) |
4947 |
+ goto out; |
4948 |
+ |
4949 |
+ ns = pch_rx_snap_read(pdev); |
4950 |
+diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c |
4951 |
+index f7a56e05ec8a4..552164af2dd4b 100644 |
4952 |
+--- a/drivers/net/ethernet/realtek/r8169_main.c |
4953 |
++++ b/drivers/net/ethernet/realtek/r8169_main.c |
4954 |
+@@ -3477,7 +3477,6 @@ static void rtl_hw_start_8106(struct rtl8169_private *tp) |
4955 |
+ rtl_eri_write(tp, 0x1b0, ERIAR_MASK_0011, 0x0000); |
4956 |
+ |
4957 |
+ rtl_pcie_state_l2l3_disable(tp); |
4958 |
+- rtl_hw_aspm_clkreq_enable(tp, true); |
4959 |
+ } |
4960 |
+ |
4961 |
+ DECLARE_RTL_COND(rtl_mac_ocp_e00e_cond) |
4962 |
+diff --git a/drivers/net/ethernet/sfc/ef10_sriov.c b/drivers/net/ethernet/sfc/ef10_sriov.c |
4963 |
+index 21fa6c0e88734..84041cd587d78 100644 |
4964 |
+--- a/drivers/net/ethernet/sfc/ef10_sriov.c |
4965 |
++++ b/drivers/net/ethernet/sfc/ef10_sriov.c |
4966 |
+@@ -402,12 +402,17 @@ fail1: |
4967 |
+ return rc; |
4968 |
+ } |
4969 |
+ |
4970 |
++/* Disable SRIOV and remove VFs |
4971 |
++ * If some VFs are attached to a guest (using Xen, only) nothing is |
4972 |
++ * done if force=false, and vports are freed if force=true (for the non |
4973 |
++ * attachedc ones, only) but SRIOV is not disabled and VFs are not |
4974 |
++ * removed in either case. |
4975 |
++ */ |
4976 |
+ static int efx_ef10_pci_sriov_disable(struct efx_nic *efx, bool force) |
4977 |
+ { |
4978 |
+ struct pci_dev *dev = efx->pci_dev; |
4979 |
+- unsigned int vfs_assigned = 0; |
4980 |
+- |
4981 |
+- vfs_assigned = pci_vfs_assigned(dev); |
4982 |
++ unsigned int vfs_assigned = pci_vfs_assigned(dev); |
4983 |
++ int rc = 0; |
4984 |
+ |
4985 |
+ if (vfs_assigned && !force) { |
4986 |
+ netif_info(efx, drv, efx->net_dev, "VFs are assigned to guests; " |
4987 |
+@@ -417,10 +422,12 @@ static int efx_ef10_pci_sriov_disable(struct efx_nic *efx, bool force) |
4988 |
+ |
4989 |
+ if (!vfs_assigned) |
4990 |
+ pci_disable_sriov(dev); |
4991 |
++ else |
4992 |
++ rc = -EBUSY; |
4993 |
+ |
4994 |
+ efx_ef10_sriov_free_vf_vswitching(efx); |
4995 |
+ efx->vf_count = 0; |
4996 |
+- return 0; |
4997 |
++ return rc; |
4998 |
+ } |
4999 |
+ |
5000 |
+ int efx_ef10_sriov_configure(struct efx_nic *efx, int num_vfs) |
5001 |
+@@ -439,7 +446,6 @@ int efx_ef10_sriov_init(struct efx_nic *efx) |
5002 |
+ void efx_ef10_sriov_fini(struct efx_nic *efx) |
5003 |
+ { |
5004 |
+ struct efx_ef10_nic_data *nic_data = efx->nic_data; |
5005 |
+- unsigned int i; |
5006 |
+ int rc; |
5007 |
+ |
5008 |
+ if (!nic_data->vf) { |
5009 |
+@@ -449,14 +455,7 @@ void efx_ef10_sriov_fini(struct efx_nic *efx) |
5010 |
+ return; |
5011 |
+ } |
5012 |
+ |
5013 |
+- /* Remove any VFs in the host */ |
5014 |
+- for (i = 0; i < efx->vf_count; ++i) { |
5015 |
+- struct efx_nic *vf_efx = nic_data->vf[i].efx; |
5016 |
+- |
5017 |
+- if (vf_efx) |
5018 |
+- vf_efx->pci_dev->driver->remove(vf_efx->pci_dev); |
5019 |
+- } |
5020 |
+- |
5021 |
++ /* Disable SRIOV and remove any VFs in the host */ |
5022 |
+ rc = efx_ef10_pci_sriov_disable(efx, true); |
5023 |
+ if (rc) |
5024 |
+ netif_dbg(efx, drv, efx->net_dev, |
5025 |
+diff --git a/drivers/net/ethernet/sgi/ioc3-eth.c b/drivers/net/ethernet/sgi/ioc3-eth.c |
5026 |
+index 6eef0f45b133b..2b29fd4cbdf44 100644 |
5027 |
+--- a/drivers/net/ethernet/sgi/ioc3-eth.c |
5028 |
++++ b/drivers/net/ethernet/sgi/ioc3-eth.c |
5029 |
+@@ -835,6 +835,10 @@ static int ioc3eth_probe(struct platform_device *pdev) |
5030 |
+ int err; |
5031 |
+ |
5032 |
+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
5033 |
++ if (!regs) { |
5034 |
++ dev_err(&pdev->dev, "Invalid resource\n"); |
5035 |
++ return -EINVAL; |
5036 |
++ } |
5037 |
+ /* get mac addr from one wire prom */ |
5038 |
+ if (ioc3eth_get_mac_addr(regs, mac_addr)) |
5039 |
+ return -EPROBE_DEFER; /* not available yet */ |
5040 |
+diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c |
5041 |
+index d64116e0543ed..a4ba27bf3131e 100644 |
5042 |
+--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c |
5043 |
++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c |
5044 |
+@@ -444,6 +444,12 @@ int stmmac_mdio_register(struct net_device *ndev) |
5045 |
+ found = 1; |
5046 |
+ } |
5047 |
+ |
5048 |
++ if (!found && !mdio_node) { |
5049 |
++ dev_warn(dev, "No PHY found\n"); |
5050 |
++ err = -ENODEV; |
5051 |
++ goto no_phy_found; |
5052 |
++ } |
5053 |
++ |
5054 |
+ /* Try to probe the XPCS by scanning all addresses. */ |
5055 |
+ if (priv->hw->xpcs) { |
5056 |
+ struct mdio_xpcs_args *xpcs = &priv->hw->xpcs_args; |
5057 |
+@@ -452,6 +458,7 @@ int stmmac_mdio_register(struct net_device *ndev) |
5058 |
+ |
5059 |
+ xpcs->bus = new_bus; |
5060 |
+ |
5061 |
++ found = 0; |
5062 |
+ for (addr = 0; addr < max_addr; addr++) { |
5063 |
+ xpcs->addr = addr; |
5064 |
+ |
5065 |
+@@ -461,13 +468,12 @@ int stmmac_mdio_register(struct net_device *ndev) |
5066 |
+ break; |
5067 |
+ } |
5068 |
+ } |
5069 |
+- } |
5070 |
+ |
5071 |
+- if (!found && !mdio_node) { |
5072 |
+- dev_warn(dev, "No PHY found\n"); |
5073 |
+- mdiobus_unregister(new_bus); |
5074 |
+- mdiobus_free(new_bus); |
5075 |
+- return -ENODEV; |
5076 |
++ if (!found && !mdio_node) { |
5077 |
++ dev_warn(dev, "No XPCS found\n"); |
5078 |
++ err = -ENODEV; |
5079 |
++ goto no_xpcs_found; |
5080 |
++ } |
5081 |
+ } |
5082 |
+ |
5083 |
+ bus_register_done: |
5084 |
+@@ -475,6 +481,9 @@ bus_register_done: |
5085 |
+ |
5086 |
+ return 0; |
5087 |
+ |
5088 |
++no_xpcs_found: |
5089 |
++no_phy_found: |
5090 |
++ mdiobus_unregister(new_bus); |
5091 |
+ bus_register_fail: |
5092 |
+ mdiobus_free(new_bus); |
5093 |
+ return err; |
5094 |
+diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/ethernet/xilinx/xilinx_emaclite.c |
5095 |
+index 007840d4a8073..3ffe8d2a1f14b 100644 |
5096 |
+--- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c |
5097 |
++++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c |
5098 |
+@@ -1193,9 +1193,8 @@ static int xemaclite_of_probe(struct platform_device *ofdev) |
5099 |
+ } |
5100 |
+ |
5101 |
+ dev_info(dev, |
5102 |
+- "Xilinx EmacLite at 0x%08lX mapped to 0x%08lX, irq=%d\n", |
5103 |
+- (unsigned long __force)ndev->mem_start, |
5104 |
+- (unsigned long __force)lp->base_addr, ndev->irq); |
5105 |
++ "Xilinx EmacLite at 0x%08lX mapped to 0x%p, irq=%d\n", |
5106 |
++ (unsigned long __force)ndev->mem_start, lp->base_addr, ndev->irq); |
5107 |
+ return 0; |
5108 |
+ |
5109 |
+ error: |
5110 |
+diff --git a/drivers/net/fjes/fjes_main.c b/drivers/net/fjes/fjes_main.c |
5111 |
+index 466622664424d..e449d94661225 100644 |
5112 |
+--- a/drivers/net/fjes/fjes_main.c |
5113 |
++++ b/drivers/net/fjes/fjes_main.c |
5114 |
+@@ -1262,6 +1262,10 @@ static int fjes_probe(struct platform_device *plat_dev) |
5115 |
+ adapter->interrupt_watch_enable = false; |
5116 |
+ |
5117 |
+ res = platform_get_resource(plat_dev, IORESOURCE_MEM, 0); |
5118 |
++ if (!res) { |
5119 |
++ err = -EINVAL; |
5120 |
++ goto err_free_control_wq; |
5121 |
++ } |
5122 |
+ hw->hw_res.start = res->start; |
5123 |
+ hw->hw_res.size = resource_size(res); |
5124 |
+ hw->hw_res.irq = platform_get_irq(plat_dev, 0); |
5125 |
+diff --git a/drivers/net/ipa/ipa_main.c b/drivers/net/ipa/ipa_main.c |
5126 |
+index 97c1b55405cbf..ba27bcde901e3 100644 |
5127 |
+--- a/drivers/net/ipa/ipa_main.c |
5128 |
++++ b/drivers/net/ipa/ipa_main.c |
5129 |
+@@ -679,6 +679,7 @@ static int ipa_firmware_load(struct device *dev) |
5130 |
+ } |
5131 |
+ |
5132 |
+ ret = of_address_to_resource(node, 0, &res); |
5133 |
++ of_node_put(node); |
5134 |
+ if (ret) { |
5135 |
+ dev_err(dev, "error %d getting \"memory-region\" resource\n", |
5136 |
+ ret); |
5137 |
+diff --git a/drivers/net/mdio/mdio-ipq8064.c b/drivers/net/mdio/mdio-ipq8064.c |
5138 |
+index 1bd18857e1c5e..f0a6bfa61645e 100644 |
5139 |
+--- a/drivers/net/mdio/mdio-ipq8064.c |
5140 |
++++ b/drivers/net/mdio/mdio-ipq8064.c |
5141 |
+@@ -10,7 +10,7 @@ |
5142 |
+ #include <linux/module.h> |
5143 |
+ #include <linux/regmap.h> |
5144 |
+ #include <linux/of_mdio.h> |
5145 |
+-#include <linux/phy.h> |
5146 |
++#include <linux/of_address.h> |
5147 |
+ #include <linux/platform_device.h> |
5148 |
+ #include <linux/mfd/syscon.h> |
5149 |
+ |
5150 |
+@@ -96,14 +96,34 @@ ipq8064_mdio_write(struct mii_bus *bus, int phy_addr, int reg_offset, u16 data) |
5151 |
+ return ipq8064_mdio_wait_busy(priv); |
5152 |
+ } |
5153 |
+ |
5154 |
++static const struct regmap_config ipq8064_mdio_regmap_config = { |
5155 |
++ .reg_bits = 32, |
5156 |
++ .reg_stride = 4, |
5157 |
++ .val_bits = 32, |
5158 |
++ .can_multi_write = false, |
5159 |
++ /* the mdio lock is used by any user of this mdio driver */ |
5160 |
++ .disable_locking = true, |
5161 |
++ |
5162 |
++ .cache_type = REGCACHE_NONE, |
5163 |
++}; |
5164 |
++ |
5165 |
+ static int |
5166 |
+ ipq8064_mdio_probe(struct platform_device *pdev) |
5167 |
+ { |
5168 |
+ struct device_node *np = pdev->dev.of_node; |
5169 |
+ struct ipq8064_mdio *priv; |
5170 |
++ struct resource res; |
5171 |
+ struct mii_bus *bus; |
5172 |
++ void __iomem *base; |
5173 |
+ int ret; |
5174 |
+ |
5175 |
++ if (of_address_to_resource(np, 0, &res)) |
5176 |
++ return -ENOMEM; |
5177 |
++ |
5178 |
++ base = ioremap(res.start, resource_size(&res)); |
5179 |
++ if (!base) |
5180 |
++ return -ENOMEM; |
5181 |
++ |
5182 |
+ bus = devm_mdiobus_alloc_size(&pdev->dev, sizeof(*priv)); |
5183 |
+ if (!bus) |
5184 |
+ return -ENOMEM; |
5185 |
+@@ -115,15 +135,10 @@ ipq8064_mdio_probe(struct platform_device *pdev) |
5186 |
+ bus->parent = &pdev->dev; |
5187 |
+ |
5188 |
+ priv = bus->priv; |
5189 |
+- priv->base = device_node_to_regmap(np); |
5190 |
+- if (IS_ERR(priv->base)) { |
5191 |
+- if (priv->base == ERR_PTR(-EPROBE_DEFER)) |
5192 |
+- return -EPROBE_DEFER; |
5193 |
+- |
5194 |
+- dev_err(&pdev->dev, "error getting device regmap, error=%pe\n", |
5195 |
+- priv->base); |
5196 |
++ priv->base = devm_regmap_init_mmio(&pdev->dev, base, |
5197 |
++ &ipq8064_mdio_regmap_config); |
5198 |
++ if (IS_ERR(priv->base)) |
5199 |
+ return PTR_ERR(priv->base); |
5200 |
+- } |
5201 |
+ |
5202 |
+ ret = of_mdiobus_register(bus, np); |
5203 |
+ if (ret) |
5204 |
+diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c |
5205 |
+index 821e85a973679..7b99a3234c652 100644 |
5206 |
+--- a/drivers/net/phy/realtek.c |
5207 |
++++ b/drivers/net/phy/realtek.c |
5208 |
+@@ -357,6 +357,19 @@ static int rtl8211f_config_init(struct phy_device *phydev) |
5209 |
+ return 0; |
5210 |
+ } |
5211 |
+ |
5212 |
++static int rtl821x_resume(struct phy_device *phydev) |
5213 |
++{ |
5214 |
++ int ret; |
5215 |
++ |
5216 |
++ ret = genphy_resume(phydev); |
5217 |
++ if (ret < 0) |
5218 |
++ return ret; |
5219 |
++ |
5220 |
++ msleep(20); |
5221 |
++ |
5222 |
++ return 0; |
5223 |
++} |
5224 |
++ |
5225 |
+ static int rtl8211e_config_init(struct phy_device *phydev) |
5226 |
+ { |
5227 |
+ int ret = 0, oldpage; |
5228 |
+@@ -852,7 +865,7 @@ static struct phy_driver realtek_drvs[] = { |
5229 |
+ .config_intr = &rtl8211f_config_intr, |
5230 |
+ .handle_interrupt = rtl8211f_handle_interrupt, |
5231 |
+ .suspend = genphy_suspend, |
5232 |
+- .resume = genphy_resume, |
5233 |
++ .resume = rtl821x_resume, |
5234 |
+ .read_page = rtl821x_read_page, |
5235 |
+ .write_page = rtl821x_write_page, |
5236 |
+ }, { |
5237 |
+diff --git a/drivers/net/virtio_net.c b/drivers/net/virtio_net.c |
5238 |
+index 0824e6999e499..f7ce341bb328f 100644 |
5239 |
+--- a/drivers/net/virtio_net.c |
5240 |
++++ b/drivers/net/virtio_net.c |
5241 |
+@@ -660,6 +660,12 @@ static struct sk_buff *receive_small(struct net_device *dev, |
5242 |
+ len -= vi->hdr_len; |
5243 |
+ stats->bytes += len; |
5244 |
+ |
5245 |
++ if (unlikely(len > GOOD_PACKET_LEN)) { |
5246 |
++ pr_debug("%s: rx error: len %u exceeds max size %d\n", |
5247 |
++ dev->name, len, GOOD_PACKET_LEN); |
5248 |
++ dev->stats.rx_length_errors++; |
5249 |
++ goto err_len; |
5250 |
++ } |
5251 |
+ rcu_read_lock(); |
5252 |
+ xdp_prog = rcu_dereference(rq->xdp_prog); |
5253 |
+ if (xdp_prog) { |
5254 |
+@@ -761,6 +767,7 @@ err: |
5255 |
+ err_xdp: |
5256 |
+ rcu_read_unlock(); |
5257 |
+ stats->xdp_drops++; |
5258 |
++err_len: |
5259 |
+ stats->drops++; |
5260 |
+ put_page(page); |
5261 |
+ xdp_xmit: |
5262 |
+@@ -814,6 +821,12 @@ static struct sk_buff *receive_mergeable(struct net_device *dev, |
5263 |
+ head_skb = NULL; |
5264 |
+ stats->bytes += len - vi->hdr_len; |
5265 |
+ |
5266 |
++ if (unlikely(len > truesize)) { |
5267 |
++ pr_debug("%s: rx error: len %u exceeds truesize %lu\n", |
5268 |
++ dev->name, len, (unsigned long)ctx); |
5269 |
++ dev->stats.rx_length_errors++; |
5270 |
++ goto err_skb; |
5271 |
++ } |
5272 |
+ rcu_read_lock(); |
5273 |
+ xdp_prog = rcu_dereference(rq->xdp_prog); |
5274 |
+ if (xdp_prog) { |
5275 |
+@@ -938,13 +951,6 @@ static struct sk_buff *receive_mergeable(struct net_device *dev, |
5276 |
+ } |
5277 |
+ rcu_read_unlock(); |
5278 |
+ |
5279 |
+- if (unlikely(len > truesize)) { |
5280 |
+- pr_debug("%s: rx error: len %u exceeds truesize %lu\n", |
5281 |
+- dev->name, len, (unsigned long)ctx); |
5282 |
+- dev->stats.rx_length_errors++; |
5283 |
+- goto err_skb; |
5284 |
+- } |
5285 |
+- |
5286 |
+ head_skb = page_to_skb(vi, rq, page, offset, len, truesize, !xdp_prog, |
5287 |
+ metasize); |
5288 |
+ curr_skb = head_skb; |
5289 |
+@@ -1552,7 +1558,7 @@ static int xmit_skb(struct send_queue *sq, struct sk_buff *skb) |
5290 |
+ if (virtio_net_hdr_from_skb(skb, &hdr->hdr, |
5291 |
+ virtio_is_little_endian(vi->vdev), false, |
5292 |
+ 0)) |
5293 |
+- BUG(); |
5294 |
++ return -EPROTO; |
5295 |
+ |
5296 |
+ if (vi->mergeable_rx_bufs) |
5297 |
+ hdr->num_buffers = 0; |
5298 |
+diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c b/drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c |
5299 |
+index baf7404c137db..873d41c21a779 100644 |
5300 |
+--- a/drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c |
5301 |
++++ b/drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c |
5302 |
+@@ -3798,6 +3798,7 @@ static int iwl_mvm_roc(struct ieee80211_hw *hw, |
5303 |
+ struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); |
5304 |
+ struct cfg80211_chan_def chandef; |
5305 |
+ struct iwl_mvm_phy_ctxt *phy_ctxt; |
5306 |
++ bool band_change_removal; |
5307 |
+ int ret, i; |
5308 |
+ |
5309 |
+ IWL_DEBUG_MAC80211(mvm, "enter (%d, %d, %d)\n", channel->hw_value, |
5310 |
+@@ -3878,19 +3879,30 @@ static int iwl_mvm_roc(struct ieee80211_hw *hw, |
5311 |
+ cfg80211_chandef_create(&chandef, channel, NL80211_CHAN_NO_HT); |
5312 |
+ |
5313 |
+ /* |
5314 |
+- * Change the PHY context configuration as it is currently referenced |
5315 |
+- * only by the P2P Device MAC |
5316 |
++ * Check if the remain-on-channel is on a different band and that |
5317 |
++ * requires context removal, see iwl_mvm_phy_ctxt_changed(). If |
5318 |
++ * so, we'll need to release and then re-configure here, since we |
5319 |
++ * must not remove a PHY context that's part of a binding. |
5320 |
+ */ |
5321 |
+- if (mvmvif->phy_ctxt->ref == 1) { |
5322 |
++ band_change_removal = |
5323 |
++ fw_has_capa(&mvm->fw->ucode_capa, |
5324 |
++ IWL_UCODE_TLV_CAPA_BINDING_CDB_SUPPORT) && |
5325 |
++ mvmvif->phy_ctxt->channel->band != chandef.chan->band; |
5326 |
++ |
5327 |
++ if (mvmvif->phy_ctxt->ref == 1 && !band_change_removal) { |
5328 |
++ /* |
5329 |
++ * Change the PHY context configuration as it is currently |
5330 |
++ * referenced only by the P2P Device MAC (and we can modify it) |
5331 |
++ */ |
5332 |
+ ret = iwl_mvm_phy_ctxt_changed(mvm, mvmvif->phy_ctxt, |
5333 |
+ &chandef, 1, 1); |
5334 |
+ if (ret) |
5335 |
+ goto out_unlock; |
5336 |
+ } else { |
5337 |
+ /* |
5338 |
+- * The PHY context is shared with other MACs. Need to remove the |
5339 |
+- * P2P Device from the binding, allocate an new PHY context and |
5340 |
+- * create a new binding |
5341 |
++ * The PHY context is shared with other MACs (or we're trying to |
5342 |
++ * switch bands), so remove the P2P Device from the binding, |
5343 |
++ * allocate an new PHY context and create a new binding. |
5344 |
+ */ |
5345 |
+ phy_ctxt = iwl_mvm_get_free_phy_ctxt(mvm); |
5346 |
+ if (!phy_ctxt) { |
5347 |
+diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/mvm.h b/drivers/net/wireless/intel/iwlwifi/mvm/mvm.h |
5348 |
+index 0a963d01b8250..f17dfdf2bfaf4 100644 |
5349 |
+--- a/drivers/net/wireless/intel/iwlwifi/mvm/mvm.h |
5350 |
++++ b/drivers/net/wireless/intel/iwlwifi/mvm/mvm.h |
5351 |
+@@ -1828,7 +1828,8 @@ int iwl_mvm_disable_beacon_filter(struct iwl_mvm *mvm, |
5352 |
+ void iwl_mvm_update_smps(struct iwl_mvm *mvm, struct ieee80211_vif *vif, |
5353 |
+ enum iwl_mvm_smps_type_request req_type, |
5354 |
+ enum ieee80211_smps_mode smps_request); |
5355 |
+-bool iwl_mvm_rx_diversity_allowed(struct iwl_mvm *mvm); |
5356 |
++bool iwl_mvm_rx_diversity_allowed(struct iwl_mvm *mvm, |
5357 |
++ struct iwl_mvm_phy_ctxt *ctxt); |
5358 |
+ |
5359 |
+ /* Low latency */ |
5360 |
+ int iwl_mvm_update_low_latency(struct iwl_mvm *mvm, struct ieee80211_vif *vif, |
5361 |
+diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/phy-ctxt.c b/drivers/net/wireless/intel/iwlwifi/mvm/phy-ctxt.c |
5362 |
+index 0fd51f6aa2061..4ed2338027d13 100644 |
5363 |
+--- a/drivers/net/wireless/intel/iwlwifi/mvm/phy-ctxt.c |
5364 |
++++ b/drivers/net/wireless/intel/iwlwifi/mvm/phy-ctxt.c |
5365 |
+@@ -1,6 +1,6 @@ |
5366 |
+ // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause |
5367 |
+ /* |
5368 |
+- * Copyright (C) 2012-2014, 2018-2020 Intel Corporation |
5369 |
++ * Copyright (C) 2012-2014, 2018-2021 Intel Corporation |
5370 |
+ * Copyright (C) 2013-2014 Intel Mobile Communications GmbH |
5371 |
+ * Copyright (C) 2017 Intel Deutschland GmbH |
5372 |
+ */ |
5373 |
+@@ -76,6 +76,7 @@ static void iwl_mvm_phy_ctxt_cmd_hdr(struct iwl_mvm_phy_ctxt *ctxt, |
5374 |
+ } |
5375 |
+ |
5376 |
+ static void iwl_mvm_phy_ctxt_set_rxchain(struct iwl_mvm *mvm, |
5377 |
++ struct iwl_mvm_phy_ctxt *ctxt, |
5378 |
+ __le32 *rxchain_info, |
5379 |
+ u8 chains_static, |
5380 |
+ u8 chains_dynamic) |
5381 |
+@@ -93,7 +94,7 @@ static void iwl_mvm_phy_ctxt_set_rxchain(struct iwl_mvm *mvm, |
5382 |
+ * between the two antennas is sufficiently different to impact |
5383 |
+ * performance. |
5384 |
+ */ |
5385 |
+- if (active_cnt == 1 && iwl_mvm_rx_diversity_allowed(mvm)) { |
5386 |
++ if (active_cnt == 1 && iwl_mvm_rx_diversity_allowed(mvm, ctxt)) { |
5387 |
+ idle_cnt = 2; |
5388 |
+ active_cnt = 2; |
5389 |
+ } |
5390 |
+@@ -113,6 +114,7 @@ static void iwl_mvm_phy_ctxt_set_rxchain(struct iwl_mvm *mvm, |
5391 |
+ * Add the phy configuration to the PHY context command |
5392 |
+ */ |
5393 |
+ static void iwl_mvm_phy_ctxt_cmd_data_v1(struct iwl_mvm *mvm, |
5394 |
++ struct iwl_mvm_phy_ctxt *ctxt, |
5395 |
+ struct iwl_phy_context_cmd_v1 *cmd, |
5396 |
+ struct cfg80211_chan_def *chandef, |
5397 |
+ u8 chains_static, u8 chains_dynamic) |
5398 |
+@@ -123,7 +125,7 @@ static void iwl_mvm_phy_ctxt_cmd_data_v1(struct iwl_mvm *mvm, |
5399 |
+ /* Set the channel info data */ |
5400 |
+ iwl_mvm_set_chan_info_chandef(mvm, &cmd->ci, chandef); |
5401 |
+ |
5402 |
+- iwl_mvm_phy_ctxt_set_rxchain(mvm, &tail->rxchain_info, |
5403 |
++ iwl_mvm_phy_ctxt_set_rxchain(mvm, ctxt, &tail->rxchain_info, |
5404 |
+ chains_static, chains_dynamic); |
5405 |
+ |
5406 |
+ tail->txchain_info = cpu_to_le32(iwl_mvm_get_valid_tx_ant(mvm)); |
5407 |
+@@ -133,6 +135,7 @@ static void iwl_mvm_phy_ctxt_cmd_data_v1(struct iwl_mvm *mvm, |
5408 |
+ * Add the phy configuration to the PHY context command |
5409 |
+ */ |
5410 |
+ static void iwl_mvm_phy_ctxt_cmd_data(struct iwl_mvm *mvm, |
5411 |
++ struct iwl_mvm_phy_ctxt *ctxt, |
5412 |
+ struct iwl_phy_context_cmd *cmd, |
5413 |
+ struct cfg80211_chan_def *chandef, |
5414 |
+ u8 chains_static, u8 chains_dynamic) |
5415 |
+@@ -143,7 +146,7 @@ static void iwl_mvm_phy_ctxt_cmd_data(struct iwl_mvm *mvm, |
5416 |
+ /* Set the channel info data */ |
5417 |
+ iwl_mvm_set_chan_info_chandef(mvm, &cmd->ci, chandef); |
5418 |
+ |
5419 |
+- iwl_mvm_phy_ctxt_set_rxchain(mvm, &cmd->rxchain_info, |
5420 |
++ iwl_mvm_phy_ctxt_set_rxchain(mvm, ctxt, &cmd->rxchain_info, |
5421 |
+ chains_static, chains_dynamic); |
5422 |
+ } |
5423 |
+ |
5424 |
+@@ -170,7 +173,7 @@ static int iwl_mvm_phy_ctxt_apply(struct iwl_mvm *mvm, |
5425 |
+ iwl_mvm_phy_ctxt_cmd_hdr(ctxt, &cmd, action); |
5426 |
+ |
5427 |
+ /* Set the command data */ |
5428 |
+- iwl_mvm_phy_ctxt_cmd_data(mvm, &cmd, chandef, |
5429 |
++ iwl_mvm_phy_ctxt_cmd_data(mvm, ctxt, &cmd, chandef, |
5430 |
+ chains_static, |
5431 |
+ chains_dynamic); |
5432 |
+ |
5433 |
+@@ -186,7 +189,7 @@ static int iwl_mvm_phy_ctxt_apply(struct iwl_mvm *mvm, |
5434 |
+ action); |
5435 |
+ |
5436 |
+ /* Set the command data */ |
5437 |
+- iwl_mvm_phy_ctxt_cmd_data_v1(mvm, &cmd, chandef, |
5438 |
++ iwl_mvm_phy_ctxt_cmd_data_v1(mvm, ctxt, &cmd, chandef, |
5439 |
+ chains_static, |
5440 |
+ chains_dynamic); |
5441 |
+ ret = iwl_mvm_send_cmd_pdu(mvm, PHY_CONTEXT_CMD, |
5442 |
+diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/time-event.c b/drivers/net/wireless/intel/iwlwifi/mvm/time-event.c |
5443 |
+index 0b012f8c9eb22..9a4a1b363254f 100644 |
5444 |
+--- a/drivers/net/wireless/intel/iwlwifi/mvm/time-event.c |
5445 |
++++ b/drivers/net/wireless/intel/iwlwifi/mvm/time-event.c |
5446 |
+@@ -289,6 +289,8 @@ static void iwl_mvm_te_handle_notif(struct iwl_mvm *mvm, |
5447 |
+ * and know the dtim period. |
5448 |
+ */ |
5449 |
+ iwl_mvm_te_check_disconnect(mvm, te_data->vif, |
5450 |
++ !te_data->vif->bss_conf.assoc ? |
5451 |
++ "Not associated and the time event is over already..." : |
5452 |
+ "No beacon heard and the time event is over already..."); |
5453 |
+ break; |
5454 |
+ default: |
5455 |
+@@ -787,6 +789,8 @@ void iwl_mvm_rx_session_protect_notif(struct iwl_mvm *mvm, |
5456 |
+ * and know the dtim period. |
5457 |
+ */ |
5458 |
+ iwl_mvm_te_check_disconnect(mvm, vif, |
5459 |
++ !vif->bss_conf.assoc ? |
5460 |
++ "Not associated and the session protection is over already..." : |
5461 |
+ "No beacon heard and the session protection is over already..."); |
5462 |
+ spin_lock_bh(&mvm->time_event_lock); |
5463 |
+ iwl_mvm_te_clear_data(mvm, te_data); |
5464 |
+diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/utils.c b/drivers/net/wireless/intel/iwlwifi/mvm/utils.c |
5465 |
+index b6b481ff15185..fc4d8840eca44 100644 |
5466 |
+--- a/drivers/net/wireless/intel/iwlwifi/mvm/utils.c |
5467 |
++++ b/drivers/net/wireless/intel/iwlwifi/mvm/utils.c |
5468 |
+@@ -683,23 +683,37 @@ void iwl_mvm_accu_radio_stats(struct iwl_mvm *mvm) |
5469 |
+ mvm->accu_radio_stats.on_time_scan += mvm->radio_stats.on_time_scan; |
5470 |
+ } |
5471 |
+ |
5472 |
++struct iwl_mvm_diversity_iter_data { |
5473 |
++ struct iwl_mvm_phy_ctxt *ctxt; |
5474 |
++ bool result; |
5475 |
++}; |
5476 |
++ |
5477 |
+ static void iwl_mvm_diversity_iter(void *_data, u8 *mac, |
5478 |
+ struct ieee80211_vif *vif) |
5479 |
+ { |
5480 |
+ struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); |
5481 |
+- bool *result = _data; |
5482 |
++ struct iwl_mvm_diversity_iter_data *data = _data; |
5483 |
+ int i; |
5484 |
+ |
5485 |
++ if (mvmvif->phy_ctxt != data->ctxt) |
5486 |
++ return; |
5487 |
++ |
5488 |
+ for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) { |
5489 |
+ if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC || |
5490 |
+- mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC) |
5491 |
+- *result = false; |
5492 |
++ mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC) { |
5493 |
++ data->result = false; |
5494 |
++ break; |
5495 |
++ } |
5496 |
+ } |
5497 |
+ } |
5498 |
+ |
5499 |
+-bool iwl_mvm_rx_diversity_allowed(struct iwl_mvm *mvm) |
5500 |
++bool iwl_mvm_rx_diversity_allowed(struct iwl_mvm *mvm, |
5501 |
++ struct iwl_mvm_phy_ctxt *ctxt) |
5502 |
+ { |
5503 |
+- bool result = true; |
5504 |
++ struct iwl_mvm_diversity_iter_data data = { |
5505 |
++ .ctxt = ctxt, |
5506 |
++ .result = true, |
5507 |
++ }; |
5508 |
+ |
5509 |
+ lockdep_assert_held(&mvm->mutex); |
5510 |
+ |
5511 |
+@@ -711,9 +725,9 @@ bool iwl_mvm_rx_diversity_allowed(struct iwl_mvm *mvm) |
5512 |
+ |
5513 |
+ ieee80211_iterate_active_interfaces_atomic( |
5514 |
+ mvm->hw, IEEE80211_IFACE_ITER_NORMAL, |
5515 |
+- iwl_mvm_diversity_iter, &result); |
5516 |
++ iwl_mvm_diversity_iter, &data); |
5517 |
+ |
5518 |
+- return result; |
5519 |
++ return data.result; |
5520 |
+ } |
5521 |
+ |
5522 |
+ void iwl_mvm_send_low_latency_cmd(struct iwl_mvm *mvm, |
5523 |
+diff --git a/drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info-gen3.c b/drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info-gen3.c |
5524 |
+index cecc32e7dbe8a..2dbc51daa2f8a 100644 |
5525 |
+--- a/drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info-gen3.c |
5526 |
++++ b/drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info-gen3.c |
5527 |
+@@ -79,7 +79,6 @@ int iwl_pcie_ctxt_info_gen3_init(struct iwl_trans *trans, |
5528 |
+ struct iwl_prph_scratch *prph_scratch; |
5529 |
+ struct iwl_prph_scratch_ctrl_cfg *prph_sc_ctrl; |
5530 |
+ struct iwl_prph_info *prph_info; |
5531 |
+- void *iml_img; |
5532 |
+ u32 control_flags = 0; |
5533 |
+ int ret; |
5534 |
+ int cmdq_size = max_t(u32, IWL_CMD_QUEUE_SIZE, |
5535 |
+@@ -187,14 +186,15 @@ int iwl_pcie_ctxt_info_gen3_init(struct iwl_trans *trans, |
5536 |
+ trans_pcie->prph_scratch = prph_scratch; |
5537 |
+ |
5538 |
+ /* Allocate IML */ |
5539 |
+- iml_img = dma_alloc_coherent(trans->dev, trans->iml_len, |
5540 |
+- &trans_pcie->iml_dma_addr, GFP_KERNEL); |
5541 |
+- if (!iml_img) { |
5542 |
++ trans_pcie->iml = dma_alloc_coherent(trans->dev, trans->iml_len, |
5543 |
++ &trans_pcie->iml_dma_addr, |
5544 |
++ GFP_KERNEL); |
5545 |
++ if (!trans_pcie->iml) { |
5546 |
+ ret = -ENOMEM; |
5547 |
+ goto err_free_ctxt_info; |
5548 |
+ } |
5549 |
+ |
5550 |
+- memcpy(iml_img, trans->iml, trans->iml_len); |
5551 |
++ memcpy(trans_pcie->iml, trans->iml, trans->iml_len); |
5552 |
+ |
5553 |
+ iwl_enable_fw_load_int_ctx_info(trans); |
5554 |
+ |
5555 |
+@@ -243,6 +243,11 @@ void iwl_pcie_ctxt_info_gen3_free(struct iwl_trans *trans) |
5556 |
+ trans_pcie->ctxt_info_dma_addr = 0; |
5557 |
+ trans_pcie->ctxt_info_gen3 = NULL; |
5558 |
+ |
5559 |
++ dma_free_coherent(trans->dev, trans->iml_len, trans_pcie->iml, |
5560 |
++ trans_pcie->iml_dma_addr); |
5561 |
++ trans_pcie->iml_dma_addr = 0; |
5562 |
++ trans_pcie->iml = NULL; |
5563 |
++ |
5564 |
+ iwl_pcie_ctxt_info_free_fw_img(trans); |
5565 |
+ |
5566 |
+ dma_free_coherent(trans->dev, sizeof(*trans_pcie->prph_scratch), |
5567 |
+diff --git a/drivers/net/wireless/intel/iwlwifi/pcie/internal.h b/drivers/net/wireless/intel/iwlwifi/pcie/internal.h |
5568 |
+index d9688c7bed07c..53af3f29eab8e 100644 |
5569 |
+--- a/drivers/net/wireless/intel/iwlwifi/pcie/internal.h |
5570 |
++++ b/drivers/net/wireless/intel/iwlwifi/pcie/internal.h |
5571 |
+@@ -279,6 +279,8 @@ struct cont_rec { |
5572 |
+ * Context information addresses will be taken from here. |
5573 |
+ * This is driver's local copy for keeping track of size and |
5574 |
+ * count for allocating and freeing the memory. |
5575 |
++ * @iml: image loader image virtual address |
5576 |
++ * @iml_dma_addr: image loader image DMA address |
5577 |
+ * @trans: pointer to the generic transport area |
5578 |
+ * @scd_base_addr: scheduler sram base address in SRAM |
5579 |
+ * @kw: keep warm address |
5580 |
+@@ -329,6 +331,7 @@ struct iwl_trans_pcie { |
5581 |
+ }; |
5582 |
+ struct iwl_prph_info *prph_info; |
5583 |
+ struct iwl_prph_scratch *prph_scratch; |
5584 |
++ void *iml; |
5585 |
+ dma_addr_t ctxt_info_dma_addr; |
5586 |
+ dma_addr_t prph_info_dma_addr; |
5587 |
+ dma_addr_t prph_scratch_dma_addr; |
5588 |
+diff --git a/drivers/net/wireless/intel/iwlwifi/pcie/trans-gen2.c b/drivers/net/wireless/intel/iwlwifi/pcie/trans-gen2.c |
5589 |
+index af9412bd697ee..7996b05a51c2c 100644 |
5590 |
+--- a/drivers/net/wireless/intel/iwlwifi/pcie/trans-gen2.c |
5591 |
++++ b/drivers/net/wireless/intel/iwlwifi/pcie/trans-gen2.c |
5592 |
+@@ -254,7 +254,8 @@ void iwl_trans_pcie_gen2_fw_alive(struct iwl_trans *trans, u32 scd_addr) |
5593 |
+ /* now that we got alive we can free the fw image & the context info. |
5594 |
+ * paging memory cannot be freed included since FW will still use it |
5595 |
+ */ |
5596 |
+- iwl_pcie_ctxt_info_free(trans); |
5597 |
++ if (trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_AX210) |
5598 |
++ iwl_pcie_ctxt_info_free(trans); |
5599 |
+ |
5600 |
+ /* |
5601 |
+ * Re-enable all the interrupts, including the RF-Kill one, now that |
5602 |
+diff --git a/drivers/net/wireless/mac80211_hwsim.c b/drivers/net/wireless/mac80211_hwsim.c |
5603 |
+index 30b39cb4056a3..1005bef16b61a 100644 |
5604 |
+--- a/drivers/net/wireless/mac80211_hwsim.c |
5605 |
++++ b/drivers/net/wireless/mac80211_hwsim.c |
5606 |
+@@ -626,6 +626,7 @@ struct mac80211_hwsim_data { |
5607 |
+ u32 ciphers[ARRAY_SIZE(hwsim_ciphers)]; |
5608 |
+ |
5609 |
+ struct mac_address addresses[2]; |
5610 |
++ struct ieee80211_chanctx_conf *chanctx; |
5611 |
+ int channels, idx; |
5612 |
+ bool use_chanctx; |
5613 |
+ bool destroy_on_close; |
5614 |
+@@ -1257,7 +1258,8 @@ static inline u16 trans_tx_rate_flags_ieee2hwsim(struct ieee80211_tx_rate *rate) |
5615 |
+ |
5616 |
+ static void mac80211_hwsim_tx_frame_nl(struct ieee80211_hw *hw, |
5617 |
+ struct sk_buff *my_skb, |
5618 |
+- int dst_portid) |
5619 |
++ int dst_portid, |
5620 |
++ struct ieee80211_channel *channel) |
5621 |
+ { |
5622 |
+ struct sk_buff *skb; |
5623 |
+ struct mac80211_hwsim_data *data = hw->priv; |
5624 |
+@@ -1312,7 +1314,7 @@ static void mac80211_hwsim_tx_frame_nl(struct ieee80211_hw *hw, |
5625 |
+ if (nla_put_u32(skb, HWSIM_ATTR_FLAGS, hwsim_flags)) |
5626 |
+ goto nla_put_failure; |
5627 |
+ |
5628 |
+- if (nla_put_u32(skb, HWSIM_ATTR_FREQ, data->channel->center_freq)) |
5629 |
++ if (nla_put_u32(skb, HWSIM_ATTR_FREQ, channel->center_freq)) |
5630 |
+ goto nla_put_failure; |
5631 |
+ |
5632 |
+ /* We get the tx control (rate and retries) info*/ |
5633 |
+@@ -1659,7 +1661,7 @@ static void mac80211_hwsim_tx(struct ieee80211_hw *hw, |
5634 |
+ _portid = READ_ONCE(data->wmediumd); |
5635 |
+ |
5636 |
+ if (_portid || hwsim_virtio_enabled) |
5637 |
+- return mac80211_hwsim_tx_frame_nl(hw, skb, _portid); |
5638 |
++ return mac80211_hwsim_tx_frame_nl(hw, skb, _portid, channel); |
5639 |
+ |
5640 |
+ /* NO wmediumd detected, perfect medium simulation */ |
5641 |
+ data->tx_pkts++; |
5642 |
+@@ -1775,7 +1777,7 @@ static void mac80211_hwsim_tx_frame(struct ieee80211_hw *hw, |
5643 |
+ mac80211_hwsim_monitor_rx(hw, skb, chan); |
5644 |
+ |
5645 |
+ if (_pid || hwsim_virtio_enabled) |
5646 |
+- return mac80211_hwsim_tx_frame_nl(hw, skb, _pid); |
5647 |
++ return mac80211_hwsim_tx_frame_nl(hw, skb, _pid, chan); |
5648 |
+ |
5649 |
+ mac80211_hwsim_tx_frame_no_nl(hw, skb, chan); |
5650 |
+ dev_kfree_skb(skb); |
5651 |
+@@ -2514,6 +2516,11 @@ static int mac80211_hwsim_croc(struct ieee80211_hw *hw, |
5652 |
+ static int mac80211_hwsim_add_chanctx(struct ieee80211_hw *hw, |
5653 |
+ struct ieee80211_chanctx_conf *ctx) |
5654 |
+ { |
5655 |
++ struct mac80211_hwsim_data *hwsim = hw->priv; |
5656 |
++ |
5657 |
++ mutex_lock(&hwsim->mutex); |
5658 |
++ hwsim->chanctx = ctx; |
5659 |
++ mutex_unlock(&hwsim->mutex); |
5660 |
+ hwsim_set_chanctx_magic(ctx); |
5661 |
+ wiphy_dbg(hw->wiphy, |
5662 |
+ "add channel context control: %d MHz/width: %d/cfreqs:%d/%d MHz\n", |
5663 |
+@@ -2525,6 +2532,11 @@ static int mac80211_hwsim_add_chanctx(struct ieee80211_hw *hw, |
5664 |
+ static void mac80211_hwsim_remove_chanctx(struct ieee80211_hw *hw, |
5665 |
+ struct ieee80211_chanctx_conf *ctx) |
5666 |
+ { |
5667 |
++ struct mac80211_hwsim_data *hwsim = hw->priv; |
5668 |
++ |
5669 |
++ mutex_lock(&hwsim->mutex); |
5670 |
++ hwsim->chanctx = NULL; |
5671 |
++ mutex_unlock(&hwsim->mutex); |
5672 |
+ wiphy_dbg(hw->wiphy, |
5673 |
+ "remove channel context control: %d MHz/width: %d/cfreqs:%d/%d MHz\n", |
5674 |
+ ctx->def.chan->center_freq, ctx->def.width, |
5675 |
+@@ -2537,6 +2549,11 @@ static void mac80211_hwsim_change_chanctx(struct ieee80211_hw *hw, |
5676 |
+ struct ieee80211_chanctx_conf *ctx, |
5677 |
+ u32 changed) |
5678 |
+ { |
5679 |
++ struct mac80211_hwsim_data *hwsim = hw->priv; |
5680 |
++ |
5681 |
++ mutex_lock(&hwsim->mutex); |
5682 |
++ hwsim->chanctx = ctx; |
5683 |
++ mutex_unlock(&hwsim->mutex); |
5684 |
+ hwsim_check_chanctx_magic(ctx); |
5685 |
+ wiphy_dbg(hw->wiphy, |
5686 |
+ "change channel context control: %d MHz/width: %d/cfreqs:%d/%d MHz\n", |
5687 |
+@@ -3129,6 +3146,7 @@ static int mac80211_hwsim_new_radio(struct genl_info *info, |
5688 |
+ hw->wiphy->max_remain_on_channel_duration = 1000; |
5689 |
+ data->if_combination.radar_detect_widths = 0; |
5690 |
+ data->if_combination.num_different_channels = data->channels; |
5691 |
++ data->chanctx = NULL; |
5692 |
+ } else { |
5693 |
+ data->if_combination.num_different_channels = 1; |
5694 |
+ data->if_combination.radar_detect_widths = |
5695 |
+@@ -3638,6 +3656,7 @@ static int hwsim_cloned_frame_received_nl(struct sk_buff *skb_2, |
5696 |
+ int frame_data_len; |
5697 |
+ void *frame_data; |
5698 |
+ struct sk_buff *skb = NULL; |
5699 |
++ struct ieee80211_channel *channel = NULL; |
5700 |
+ |
5701 |
+ if (!info->attrs[HWSIM_ATTR_ADDR_RECEIVER] || |
5702 |
+ !info->attrs[HWSIM_ATTR_FRAME] || |
5703 |
+@@ -3664,6 +3683,17 @@ static int hwsim_cloned_frame_received_nl(struct sk_buff *skb_2, |
5704 |
+ if (!data2) |
5705 |
+ goto out; |
5706 |
+ |
5707 |
++ if (data2->use_chanctx) { |
5708 |
++ if (data2->tmp_chan) |
5709 |
++ channel = data2->tmp_chan; |
5710 |
++ else if (data2->chanctx) |
5711 |
++ channel = data2->chanctx->def.chan; |
5712 |
++ } else { |
5713 |
++ channel = data2->channel; |
5714 |
++ } |
5715 |
++ if (!channel) |
5716 |
++ goto out; |
5717 |
++ |
5718 |
+ if (!hwsim_virtio_enabled) { |
5719 |
+ if (hwsim_net_get_netgroup(genl_info_net(info)) != |
5720 |
+ data2->netgroup) |
5721 |
+@@ -3675,7 +3705,7 @@ static int hwsim_cloned_frame_received_nl(struct sk_buff *skb_2, |
5722 |
+ |
5723 |
+ /* check if radio is configured properly */ |
5724 |
+ |
5725 |
+- if (data2->idle || !data2->started) |
5726 |
++ if ((data2->idle && !data2->tmp_chan) || !data2->started) |
5727 |
+ goto out; |
5728 |
+ |
5729 |
+ /* A frame is received from user space */ |
5730 |
+@@ -3688,18 +3718,16 @@ static int hwsim_cloned_frame_received_nl(struct sk_buff *skb_2, |
5731 |
+ mutex_lock(&data2->mutex); |
5732 |
+ rx_status.freq = nla_get_u32(info->attrs[HWSIM_ATTR_FREQ]); |
5733 |
+ |
5734 |
+- if (rx_status.freq != data2->channel->center_freq && |
5735 |
+- (!data2->tmp_chan || |
5736 |
+- rx_status.freq != data2->tmp_chan->center_freq)) { |
5737 |
++ if (rx_status.freq != channel->center_freq) { |
5738 |
+ mutex_unlock(&data2->mutex); |
5739 |
+ goto out; |
5740 |
+ } |
5741 |
+ mutex_unlock(&data2->mutex); |
5742 |
+ } else { |
5743 |
+- rx_status.freq = data2->channel->center_freq; |
5744 |
++ rx_status.freq = channel->center_freq; |
5745 |
+ } |
5746 |
+ |
5747 |
+- rx_status.band = data2->channel->band; |
5748 |
++ rx_status.band = channel->band; |
5749 |
+ rx_status.rate_idx = nla_get_u32(info->attrs[HWSIM_ATTR_RX_RATE]); |
5750 |
+ rx_status.signal = nla_get_u32(info->attrs[HWSIM_ATTR_SIGNAL]); |
5751 |
+ |
5752 |
+diff --git a/drivers/net/wireless/marvell/mwifiex/main.c b/drivers/net/wireless/marvell/mwifiex/main.c |
5753 |
+index 529dfd8b7ae85..17399d4aa1290 100644 |
5754 |
+--- a/drivers/net/wireless/marvell/mwifiex/main.c |
5755 |
++++ b/drivers/net/wireless/marvell/mwifiex/main.c |
5756 |
+@@ -1445,11 +1445,18 @@ static void mwifiex_uninit_sw(struct mwifiex_adapter *adapter) |
5757 |
+ if (!priv) |
5758 |
+ continue; |
5759 |
+ rtnl_lock(); |
5760 |
+- wiphy_lock(adapter->wiphy); |
5761 |
+ if (priv->netdev && |
5762 |
+- priv->wdev.iftype != NL80211_IFTYPE_UNSPECIFIED) |
5763 |
++ priv->wdev.iftype != NL80211_IFTYPE_UNSPECIFIED) { |
5764 |
++ /* |
5765 |
++ * Close the netdev now, because if we do it later, the |
5766 |
++ * netdev notifiers will need to acquire the wiphy lock |
5767 |
++ * again --> deadlock. |
5768 |
++ */ |
5769 |
++ dev_close(priv->wdev.netdev); |
5770 |
++ wiphy_lock(adapter->wiphy); |
5771 |
+ mwifiex_del_virtual_intf(adapter->wiphy, &priv->wdev); |
5772 |
+- wiphy_unlock(adapter->wiphy); |
5773 |
++ wiphy_unlock(adapter->wiphy); |
5774 |
++ } |
5775 |
+ rtnl_unlock(); |
5776 |
+ } |
5777 |
+ |
5778 |
+diff --git a/drivers/net/wireless/mediatek/mt76/dma.c b/drivers/net/wireless/mediatek/mt76/dma.c |
5779 |
+index 426787f4b2ae4..ee0acde53a609 100644 |
5780 |
+--- a/drivers/net/wireless/mediatek/mt76/dma.c |
5781 |
++++ b/drivers/net/wireless/mediatek/mt76/dma.c |
5782 |
+@@ -349,6 +349,9 @@ mt76_dma_tx_queue_skb(struct mt76_dev *dev, struct mt76_queue *q, |
5783 |
+ struct sk_buff *skb, struct mt76_wcid *wcid, |
5784 |
+ struct ieee80211_sta *sta) |
5785 |
+ { |
5786 |
++ struct ieee80211_tx_status status = { |
5787 |
++ .sta = sta, |
5788 |
++ }; |
5789 |
+ struct mt76_tx_info tx_info = { |
5790 |
+ .skb = skb, |
5791 |
+ }; |
5792 |
+@@ -360,11 +363,9 @@ mt76_dma_tx_queue_skb(struct mt76_dev *dev, struct mt76_queue *q, |
5793 |
+ u8 *txwi; |
5794 |
+ |
5795 |
+ t = mt76_get_txwi(dev); |
5796 |
+- if (!t) { |
5797 |
+- hw = mt76_tx_status_get_hw(dev, skb); |
5798 |
+- ieee80211_free_txskb(hw, skb); |
5799 |
+- return -ENOMEM; |
5800 |
+- } |
5801 |
++ if (!t) |
5802 |
++ goto free_skb; |
5803 |
++ |
5804 |
+ txwi = mt76_get_txwi_ptr(dev, t); |
5805 |
+ |
5806 |
+ skb->prev = skb->next = NULL; |
5807 |
+@@ -427,8 +428,13 @@ free: |
5808 |
+ } |
5809 |
+ #endif |
5810 |
+ |
5811 |
+- dev_kfree_skb(tx_info.skb); |
5812 |
+ mt76_put_txwi(dev, t); |
5813 |
++ |
5814 |
++free_skb: |
5815 |
++ status.skb = tx_info.skb; |
5816 |
++ hw = mt76_tx_status_get_hw(dev, tx_info.skb); |
5817 |
++ ieee80211_tx_status_ext(hw, &status); |
5818 |
++ |
5819 |
+ return ret; |
5820 |
+ } |
5821 |
+ |
5822 |
+diff --git a/drivers/net/wireless/mediatek/mt76/mt76.h b/drivers/net/wireless/mediatek/mt76/mt76.h |
5823 |
+index 967fe3e11d94e..1ed63eddfcf2b 100644 |
5824 |
+--- a/drivers/net/wireless/mediatek/mt76/mt76.h |
5825 |
++++ b/drivers/net/wireless/mediatek/mt76/mt76.h |
5826 |
+@@ -85,6 +85,22 @@ enum mt76_rxq_id { |
5827 |
+ __MT_RXQ_MAX |
5828 |
+ }; |
5829 |
+ |
5830 |
++enum mt76_cipher_type { |
5831 |
++ MT_CIPHER_NONE, |
5832 |
++ MT_CIPHER_WEP40, |
5833 |
++ MT_CIPHER_TKIP, |
5834 |
++ MT_CIPHER_TKIP_NO_MIC, |
5835 |
++ MT_CIPHER_AES_CCMP, |
5836 |
++ MT_CIPHER_WEP104, |
5837 |
++ MT_CIPHER_BIP_CMAC_128, |
5838 |
++ MT_CIPHER_WEP128, |
5839 |
++ MT_CIPHER_WAPI, |
5840 |
++ MT_CIPHER_CCMP_CCX, |
5841 |
++ MT_CIPHER_CCMP_256, |
5842 |
++ MT_CIPHER_GCMP, |
5843 |
++ MT_CIPHER_GCMP_256, |
5844 |
++}; |
5845 |
++ |
5846 |
+ struct mt76_queue_buf { |
5847 |
+ dma_addr_t addr; |
5848 |
+ u16 len; |
5849 |
+diff --git a/drivers/net/wireless/mediatek/mt76/mt7603/mac.c b/drivers/net/wireless/mediatek/mt76/mt7603/mac.c |
5850 |
+index cc4e7bc482940..92a7b45fbc157 100644 |
5851 |
+--- a/drivers/net/wireless/mediatek/mt76/mt7603/mac.c |
5852 |
++++ b/drivers/net/wireless/mediatek/mt76/mt7603/mac.c |
5853 |
+@@ -564,14 +564,27 @@ mt7603_mac_fill_rx(struct mt7603_dev *dev, struct sk_buff *skb) |
5854 |
+ u8 *data = (u8 *)rxd; |
5855 |
+ |
5856 |
+ if (status->flag & RX_FLAG_DECRYPTED) { |
5857 |
+- status->iv[0] = data[5]; |
5858 |
+- status->iv[1] = data[4]; |
5859 |
+- status->iv[2] = data[3]; |
5860 |
+- status->iv[3] = data[2]; |
5861 |
+- status->iv[4] = data[1]; |
5862 |
+- status->iv[5] = data[0]; |
5863 |
+- |
5864 |
+- insert_ccmp_hdr = FIELD_GET(MT_RXD2_NORMAL_FRAG, rxd2); |
5865 |
++ switch (FIELD_GET(MT_RXD2_NORMAL_SEC_MODE, rxd2)) { |
5866 |
++ case MT_CIPHER_AES_CCMP: |
5867 |
++ case MT_CIPHER_CCMP_CCX: |
5868 |
++ case MT_CIPHER_CCMP_256: |
5869 |
++ insert_ccmp_hdr = |
5870 |
++ FIELD_GET(MT_RXD2_NORMAL_FRAG, rxd2); |
5871 |
++ fallthrough; |
5872 |
++ case MT_CIPHER_TKIP: |
5873 |
++ case MT_CIPHER_TKIP_NO_MIC: |
5874 |
++ case MT_CIPHER_GCMP: |
5875 |
++ case MT_CIPHER_GCMP_256: |
5876 |
++ status->iv[0] = data[5]; |
5877 |
++ status->iv[1] = data[4]; |
5878 |
++ status->iv[2] = data[3]; |
5879 |
++ status->iv[3] = data[2]; |
5880 |
++ status->iv[4] = data[1]; |
5881 |
++ status->iv[5] = data[0]; |
5882 |
++ break; |
5883 |
++ default: |
5884 |
++ break; |
5885 |
++ } |
5886 |
+ } |
5887 |
+ |
5888 |
+ rxd += 4; |
5889 |
+@@ -828,7 +841,7 @@ void mt7603_wtbl_set_rates(struct mt7603_dev *dev, struct mt7603_sta *sta, |
5890 |
+ sta->wcid.tx_info |= MT_WCID_TX_INFO_SET; |
5891 |
+ } |
5892 |
+ |
5893 |
+-static enum mt7603_cipher_type |
5894 |
++static enum mt76_cipher_type |
5895 |
+ mt7603_mac_get_key_info(struct ieee80211_key_conf *key, u8 *key_data) |
5896 |
+ { |
5897 |
+ memset(key_data, 0, 32); |
5898 |
+@@ -860,7 +873,7 @@ mt7603_mac_get_key_info(struct ieee80211_key_conf *key, u8 *key_data) |
5899 |
+ int mt7603_wtbl_set_key(struct mt7603_dev *dev, int wcid, |
5900 |
+ struct ieee80211_key_conf *key) |
5901 |
+ { |
5902 |
+- enum mt7603_cipher_type cipher; |
5903 |
++ enum mt76_cipher_type cipher; |
5904 |
+ u32 addr = mt7603_wtbl3_addr(wcid); |
5905 |
+ u8 key_data[32]; |
5906 |
+ int key_len = sizeof(key_data); |
5907 |
+diff --git a/drivers/net/wireless/mediatek/mt76/mt7603/regs.h b/drivers/net/wireless/mediatek/mt76/mt7603/regs.h |
5908 |
+index 6741e69071940..3b901090b29c6 100644 |
5909 |
+--- a/drivers/net/wireless/mediatek/mt76/mt7603/regs.h |
5910 |
++++ b/drivers/net/wireless/mediatek/mt76/mt7603/regs.h |
5911 |
+@@ -765,16 +765,4 @@ enum { |
5912 |
+ #define MT_WTBL1_OR (MT_WTBL1_BASE + 0x2300) |
5913 |
+ #define MT_WTBL1_OR_PSM_WRITE BIT(31) |
5914 |
+ |
5915 |
+-enum mt7603_cipher_type { |
5916 |
+- MT_CIPHER_NONE, |
5917 |
+- MT_CIPHER_WEP40, |
5918 |
+- MT_CIPHER_TKIP, |
5919 |
+- MT_CIPHER_TKIP_NO_MIC, |
5920 |
+- MT_CIPHER_AES_CCMP, |
5921 |
+- MT_CIPHER_WEP104, |
5922 |
+- MT_CIPHER_BIP_CMAC_128, |
5923 |
+- MT_CIPHER_WEP128, |
5924 |
+- MT_CIPHER_WAPI, |
5925 |
+-}; |
5926 |
+- |
5927 |
+ #endif |
5928 |
+diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/mac.c b/drivers/net/wireless/mediatek/mt76/mt7615/mac.c |
5929 |
+index d06e61cadc411..1da59c16e8200 100644 |
5930 |
+--- a/drivers/net/wireless/mediatek/mt76/mt7615/mac.c |
5931 |
++++ b/drivers/net/wireless/mediatek/mt76/mt7615/mac.c |
5932 |
+@@ -57,6 +57,33 @@ static const struct mt7615_dfs_radar_spec jp_radar_specs = { |
5933 |
+ }, |
5934 |
+ }; |
5935 |
+ |
5936 |
++static enum mt76_cipher_type |
5937 |
++mt7615_mac_get_cipher(int cipher) |
5938 |
++{ |
5939 |
++ switch (cipher) { |
5940 |
++ case WLAN_CIPHER_SUITE_WEP40: |
5941 |
++ return MT_CIPHER_WEP40; |
5942 |
++ case WLAN_CIPHER_SUITE_WEP104: |
5943 |
++ return MT_CIPHER_WEP104; |
5944 |
++ case WLAN_CIPHER_SUITE_TKIP: |
5945 |
++ return MT_CIPHER_TKIP; |
5946 |
++ case WLAN_CIPHER_SUITE_AES_CMAC: |
5947 |
++ return MT_CIPHER_BIP_CMAC_128; |
5948 |
++ case WLAN_CIPHER_SUITE_CCMP: |
5949 |
++ return MT_CIPHER_AES_CCMP; |
5950 |
++ case WLAN_CIPHER_SUITE_CCMP_256: |
5951 |
++ return MT_CIPHER_CCMP_256; |
5952 |
++ case WLAN_CIPHER_SUITE_GCMP: |
5953 |
++ return MT_CIPHER_GCMP; |
5954 |
++ case WLAN_CIPHER_SUITE_GCMP_256: |
5955 |
++ return MT_CIPHER_GCMP_256; |
5956 |
++ case WLAN_CIPHER_SUITE_SMS4: |
5957 |
++ return MT_CIPHER_WAPI; |
5958 |
++ default: |
5959 |
++ return MT_CIPHER_NONE; |
5960 |
++ } |
5961 |
++} |
5962 |
++ |
5963 |
+ static struct mt76_wcid *mt7615_rx_get_wcid(struct mt7615_dev *dev, |
5964 |
+ u8 idx, bool unicast) |
5965 |
+ { |
5966 |
+@@ -297,14 +324,27 @@ static int mt7615_mac_fill_rx(struct mt7615_dev *dev, struct sk_buff *skb) |
5967 |
+ u8 *data = (u8 *)rxd; |
5968 |
+ |
5969 |
+ if (status->flag & RX_FLAG_DECRYPTED) { |
5970 |
+- status->iv[0] = data[5]; |
5971 |
+- status->iv[1] = data[4]; |
5972 |
+- status->iv[2] = data[3]; |
5973 |
+- status->iv[3] = data[2]; |
5974 |
+- status->iv[4] = data[1]; |
5975 |
+- status->iv[5] = data[0]; |
5976 |
+- |
5977 |
+- insert_ccmp_hdr = FIELD_GET(MT_RXD2_NORMAL_FRAG, rxd2); |
5978 |
++ switch (FIELD_GET(MT_RXD2_NORMAL_SEC_MODE, rxd2)) { |
5979 |
++ case MT_CIPHER_AES_CCMP: |
5980 |
++ case MT_CIPHER_CCMP_CCX: |
5981 |
++ case MT_CIPHER_CCMP_256: |
5982 |
++ insert_ccmp_hdr = |
5983 |
++ FIELD_GET(MT_RXD2_NORMAL_FRAG, rxd2); |
5984 |
++ fallthrough; |
5985 |
++ case MT_CIPHER_TKIP: |
5986 |
++ case MT_CIPHER_TKIP_NO_MIC: |
5987 |
++ case MT_CIPHER_GCMP: |
5988 |
++ case MT_CIPHER_GCMP_256: |
5989 |
++ status->iv[0] = data[5]; |
5990 |
++ status->iv[1] = data[4]; |
5991 |
++ status->iv[2] = data[3]; |
5992 |
++ status->iv[3] = data[2]; |
5993 |
++ status->iv[4] = data[1]; |
5994 |
++ status->iv[5] = data[0]; |
5995 |
++ break; |
5996 |
++ default: |
5997 |
++ break; |
5998 |
++ } |
5999 |
+ } |
6000 |
+ rxd += 4; |
6001 |
+ if ((u8 *)rxd - skb->data >= skb->len) |
6002 |
+@@ -1037,7 +1077,7 @@ EXPORT_SYMBOL_GPL(mt7615_mac_set_rates); |
6003 |
+ static int |
6004 |
+ mt7615_mac_wtbl_update_key(struct mt7615_dev *dev, struct mt76_wcid *wcid, |
6005 |
+ struct ieee80211_key_conf *key, |
6006 |
+- enum mt7615_cipher_type cipher, u16 cipher_mask, |
6007 |
++ enum mt76_cipher_type cipher, u16 cipher_mask, |
6008 |
+ enum set_key_cmd cmd) |
6009 |
+ { |
6010 |
+ u32 addr = mt7615_mac_wtbl_addr(dev, wcid->idx) + 30 * 4; |
6011 |
+@@ -1077,7 +1117,7 @@ mt7615_mac_wtbl_update_key(struct mt7615_dev *dev, struct mt76_wcid *wcid, |
6012 |
+ |
6013 |
+ static int |
6014 |
+ mt7615_mac_wtbl_update_pk(struct mt7615_dev *dev, struct mt76_wcid *wcid, |
6015 |
+- enum mt7615_cipher_type cipher, u16 cipher_mask, |
6016 |
++ enum mt76_cipher_type cipher, u16 cipher_mask, |
6017 |
+ int keyidx, enum set_key_cmd cmd) |
6018 |
+ { |
6019 |
+ u32 addr = mt7615_mac_wtbl_addr(dev, wcid->idx), w0, w1; |
6020 |
+@@ -1116,7 +1156,7 @@ mt7615_mac_wtbl_update_pk(struct mt7615_dev *dev, struct mt76_wcid *wcid, |
6021 |
+ |
6022 |
+ static void |
6023 |
+ mt7615_mac_wtbl_update_cipher(struct mt7615_dev *dev, struct mt76_wcid *wcid, |
6024 |
+- enum mt7615_cipher_type cipher, u16 cipher_mask, |
6025 |
++ enum mt76_cipher_type cipher, u16 cipher_mask, |
6026 |
+ enum set_key_cmd cmd) |
6027 |
+ { |
6028 |
+ u32 addr = mt7615_mac_wtbl_addr(dev, wcid->idx); |
6029 |
+@@ -1142,7 +1182,7 @@ int __mt7615_mac_wtbl_set_key(struct mt7615_dev *dev, |
6030 |
+ struct ieee80211_key_conf *key, |
6031 |
+ enum set_key_cmd cmd) |
6032 |
+ { |
6033 |
+- enum mt7615_cipher_type cipher; |
6034 |
++ enum mt76_cipher_type cipher; |
6035 |
+ u16 cipher_mask = wcid->cipher; |
6036 |
+ int err; |
6037 |
+ |
6038 |
+@@ -1194,22 +1234,20 @@ static bool mt7615_fill_txs(struct mt7615_dev *dev, struct mt7615_sta *sta, |
6039 |
+ int first_idx = 0, last_idx; |
6040 |
+ int i, idx, count; |
6041 |
+ bool fixed_rate, ack_timeout; |
6042 |
+- bool probe, ampdu, cck = false; |
6043 |
++ bool ampdu, cck = false; |
6044 |
+ bool rs_idx; |
6045 |
+ u32 rate_set_tsf; |
6046 |
+ u32 final_rate, final_rate_flags, final_nss, txs; |
6047 |
+ |
6048 |
+- fixed_rate = info->status.rates[0].count; |
6049 |
+- probe = !!(info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE); |
6050 |
+- |
6051 |
+ txs = le32_to_cpu(txs_data[1]); |
6052 |
+- ampdu = !fixed_rate && (txs & MT_TXS1_AMPDU); |
6053 |
++ ampdu = txs & MT_TXS1_AMPDU; |
6054 |
+ |
6055 |
+ txs = le32_to_cpu(txs_data[3]); |
6056 |
+ count = FIELD_GET(MT_TXS3_TX_COUNT, txs); |
6057 |
+ last_idx = FIELD_GET(MT_TXS3_LAST_TX_RATE, txs); |
6058 |
+ |
6059 |
+ txs = le32_to_cpu(txs_data[0]); |
6060 |
++ fixed_rate = txs & MT_TXS0_FIXED_RATE; |
6061 |
+ final_rate = FIELD_GET(MT_TXS0_TX_RATE, txs); |
6062 |
+ ack_timeout = txs & MT_TXS0_ACK_TIMEOUT; |
6063 |
+ |
6064 |
+@@ -1231,7 +1269,7 @@ static bool mt7615_fill_txs(struct mt7615_dev *dev, struct mt7615_sta *sta, |
6065 |
+ |
6066 |
+ first_idx = max_t(int, 0, last_idx - (count - 1) / MT7615_RATE_RETRY); |
6067 |
+ |
6068 |
+- if (fixed_rate && !probe) { |
6069 |
++ if (fixed_rate) { |
6070 |
+ info->status.rates[0].count = count; |
6071 |
+ i = 0; |
6072 |
+ goto out; |
6073 |
+diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/mac.h b/drivers/net/wireless/mediatek/mt76/mt7615/mac.h |
6074 |
+index 169f4e17b5b42..1fb07799671bb 100644 |
6075 |
+--- a/drivers/net/wireless/mediatek/mt76/mt7615/mac.h |
6076 |
++++ b/drivers/net/wireless/mediatek/mt76/mt7615/mac.h |
6077 |
+@@ -375,48 +375,6 @@ struct mt7615_dfs_radar_spec { |
6078 |
+ struct mt7615_dfs_pattern radar_pattern[16]; |
6079 |
+ }; |
6080 |
+ |
6081 |
+-enum mt7615_cipher_type { |
6082 |
+- MT_CIPHER_NONE, |
6083 |
+- MT_CIPHER_WEP40, |
6084 |
+- MT_CIPHER_TKIP, |
6085 |
+- MT_CIPHER_TKIP_NO_MIC, |
6086 |
+- MT_CIPHER_AES_CCMP, |
6087 |
+- MT_CIPHER_WEP104, |
6088 |
+- MT_CIPHER_BIP_CMAC_128, |
6089 |
+- MT_CIPHER_WEP128, |
6090 |
+- MT_CIPHER_WAPI, |
6091 |
+- MT_CIPHER_CCMP_256 = 10, |
6092 |
+- MT_CIPHER_GCMP, |
6093 |
+- MT_CIPHER_GCMP_256, |
6094 |
+-}; |
6095 |
+- |
6096 |
+-static inline enum mt7615_cipher_type |
6097 |
+-mt7615_mac_get_cipher(int cipher) |
6098 |
+-{ |
6099 |
+- switch (cipher) { |
6100 |
+- case WLAN_CIPHER_SUITE_WEP40: |
6101 |
+- return MT_CIPHER_WEP40; |
6102 |
+- case WLAN_CIPHER_SUITE_WEP104: |
6103 |
+- return MT_CIPHER_WEP104; |
6104 |
+- case WLAN_CIPHER_SUITE_TKIP: |
6105 |
+- return MT_CIPHER_TKIP; |
6106 |
+- case WLAN_CIPHER_SUITE_AES_CMAC: |
6107 |
+- return MT_CIPHER_BIP_CMAC_128; |
6108 |
+- case WLAN_CIPHER_SUITE_CCMP: |
6109 |
+- return MT_CIPHER_AES_CCMP; |
6110 |
+- case WLAN_CIPHER_SUITE_CCMP_256: |
6111 |
+- return MT_CIPHER_CCMP_256; |
6112 |
+- case WLAN_CIPHER_SUITE_GCMP: |
6113 |
+- return MT_CIPHER_GCMP; |
6114 |
+- case WLAN_CIPHER_SUITE_GCMP_256: |
6115 |
+- return MT_CIPHER_GCMP_256; |
6116 |
+- case WLAN_CIPHER_SUITE_SMS4: |
6117 |
+- return MT_CIPHER_WAPI; |
6118 |
+- default: |
6119 |
+- return MT_CIPHER_NONE; |
6120 |
+- } |
6121 |
+-} |
6122 |
+- |
6123 |
+ static inline struct mt7615_txp_common * |
6124 |
+ mt7615_txwi_to_txp(struct mt76_dev *dev, struct mt76_txwi_cache *t) |
6125 |
+ { |
6126 |
+diff --git a/drivers/net/wireless/mediatek/mt76/mt76x02_mac.c b/drivers/net/wireless/mediatek/mt76/mt76x02_mac.c |
6127 |
+index 771bad60e1bc7..b21edc8e86e11 100644 |
6128 |
+--- a/drivers/net/wireless/mediatek/mt76/mt76x02_mac.c |
6129 |
++++ b/drivers/net/wireless/mediatek/mt76/mt76x02_mac.c |
6130 |
+@@ -34,24 +34,24 @@ mt76x02_mac_get_key_info(struct ieee80211_key_conf *key, u8 *key_data) |
6131 |
+ { |
6132 |
+ memset(key_data, 0, 32); |
6133 |
+ if (!key) |
6134 |
+- return MT_CIPHER_NONE; |
6135 |
++ return MT76X02_CIPHER_NONE; |
6136 |
+ |
6137 |
+ if (key->keylen > 32) |
6138 |
+- return MT_CIPHER_NONE; |
6139 |
++ return MT76X02_CIPHER_NONE; |
6140 |
+ |
6141 |
+ memcpy(key_data, key->key, key->keylen); |
6142 |
+ |
6143 |
+ switch (key->cipher) { |
6144 |
+ case WLAN_CIPHER_SUITE_WEP40: |
6145 |
+- return MT_CIPHER_WEP40; |
6146 |
++ return MT76X02_CIPHER_WEP40; |
6147 |
+ case WLAN_CIPHER_SUITE_WEP104: |
6148 |
+- return MT_CIPHER_WEP104; |
6149 |
++ return MT76X02_CIPHER_WEP104; |
6150 |
+ case WLAN_CIPHER_SUITE_TKIP: |
6151 |
+- return MT_CIPHER_TKIP; |
6152 |
++ return MT76X02_CIPHER_TKIP; |
6153 |
+ case WLAN_CIPHER_SUITE_CCMP: |
6154 |
+- return MT_CIPHER_AES_CCMP; |
6155 |
++ return MT76X02_CIPHER_AES_CCMP; |
6156 |
+ default: |
6157 |
+- return MT_CIPHER_NONE; |
6158 |
++ return MT76X02_CIPHER_NONE; |
6159 |
+ } |
6160 |
+ } |
6161 |
+ |
6162 |
+@@ -63,7 +63,7 @@ int mt76x02_mac_shared_key_setup(struct mt76x02_dev *dev, u8 vif_idx, |
6163 |
+ u32 val; |
6164 |
+ |
6165 |
+ cipher = mt76x02_mac_get_key_info(key, key_data); |
6166 |
+- if (cipher == MT_CIPHER_NONE && key) |
6167 |
++ if (cipher == MT76X02_CIPHER_NONE && key) |
6168 |
+ return -EOPNOTSUPP; |
6169 |
+ |
6170 |
+ val = mt76_rr(dev, MT_SKEY_MODE(vif_idx)); |
6171 |
+@@ -91,10 +91,10 @@ void mt76x02_mac_wcid_sync_pn(struct mt76x02_dev *dev, u8 idx, |
6172 |
+ eiv = mt76_rr(dev, MT_WCID_IV(idx) + 4); |
6173 |
+ |
6174 |
+ pn = (u64)eiv << 16; |
6175 |
+- if (cipher == MT_CIPHER_TKIP) { |
6176 |
++ if (cipher == MT76X02_CIPHER_TKIP) { |
6177 |
+ pn |= (iv >> 16) & 0xff; |
6178 |
+ pn |= (iv & 0xff) << 8; |
6179 |
+- } else if (cipher >= MT_CIPHER_AES_CCMP) { |
6180 |
++ } else if (cipher >= MT76X02_CIPHER_AES_CCMP) { |
6181 |
+ pn |= iv & 0xffff; |
6182 |
+ } else { |
6183 |
+ return; |
6184 |
+@@ -112,7 +112,7 @@ int mt76x02_mac_wcid_set_key(struct mt76x02_dev *dev, u8 idx, |
6185 |
+ u64 pn; |
6186 |
+ |
6187 |
+ cipher = mt76x02_mac_get_key_info(key, key_data); |
6188 |
+- if (cipher == MT_CIPHER_NONE && key) |
6189 |
++ if (cipher == MT76X02_CIPHER_NONE && key) |
6190 |
+ return -EOPNOTSUPP; |
6191 |
+ |
6192 |
+ mt76_wr_copy(dev, MT_WCID_KEY(idx), key_data, sizeof(key_data)); |
6193 |
+@@ -126,16 +126,16 @@ int mt76x02_mac_wcid_set_key(struct mt76x02_dev *dev, u8 idx, |
6194 |
+ pn = atomic64_read(&key->tx_pn); |
6195 |
+ |
6196 |
+ iv_data[3] = key->keyidx << 6; |
6197 |
+- if (cipher >= MT_CIPHER_TKIP) { |
6198 |
++ if (cipher >= MT76X02_CIPHER_TKIP) { |
6199 |
+ iv_data[3] |= 0x20; |
6200 |
+ put_unaligned_le32(pn >> 16, &iv_data[4]); |
6201 |
+ } |
6202 |
+ |
6203 |
+- if (cipher == MT_CIPHER_TKIP) { |
6204 |
++ if (cipher == MT76X02_CIPHER_TKIP) { |
6205 |
+ iv_data[0] = (pn >> 8) & 0xff; |
6206 |
+ iv_data[1] = (iv_data[0] | 0x20) & 0x7f; |
6207 |
+ iv_data[2] = pn & 0xff; |
6208 |
+- } else if (cipher >= MT_CIPHER_AES_CCMP) { |
6209 |
++ } else if (cipher >= MT76X02_CIPHER_AES_CCMP) { |
6210 |
+ put_unaligned_le16((pn & 0xffff), &iv_data[0]); |
6211 |
+ } |
6212 |
+ } |
6213 |
+diff --git a/drivers/net/wireless/mediatek/mt76/mt76x02_regs.h b/drivers/net/wireless/mediatek/mt76/mt76x02_regs.h |
6214 |
+index 3e722276b5c2f..fa7872ac22bf8 100644 |
6215 |
+--- a/drivers/net/wireless/mediatek/mt76/mt76x02_regs.h |
6216 |
++++ b/drivers/net/wireless/mediatek/mt76/mt76x02_regs.h |
6217 |
+@@ -692,15 +692,15 @@ struct mt76_wcid_key { |
6218 |
+ } __packed __aligned(4); |
6219 |
+ |
6220 |
+ enum mt76x02_cipher_type { |
6221 |
+- MT_CIPHER_NONE, |
6222 |
+- MT_CIPHER_WEP40, |
6223 |
+- MT_CIPHER_WEP104, |
6224 |
+- MT_CIPHER_TKIP, |
6225 |
+- MT_CIPHER_AES_CCMP, |
6226 |
+- MT_CIPHER_CKIP40, |
6227 |
+- MT_CIPHER_CKIP104, |
6228 |
+- MT_CIPHER_CKIP128, |
6229 |
+- MT_CIPHER_WAPI, |
6230 |
++ MT76X02_CIPHER_NONE, |
6231 |
++ MT76X02_CIPHER_WEP40, |
6232 |
++ MT76X02_CIPHER_WEP104, |
6233 |
++ MT76X02_CIPHER_TKIP, |
6234 |
++ MT76X02_CIPHER_AES_CCMP, |
6235 |
++ MT76X02_CIPHER_CKIP40, |
6236 |
++ MT76X02_CIPHER_CKIP104, |
6237 |
++ MT76X02_CIPHER_CKIP128, |
6238 |
++ MT76X02_CIPHER_WAPI, |
6239 |
+ }; |
6240 |
+ |
6241 |
+ #endif |
6242 |
+diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/eeprom.h b/drivers/net/wireless/mediatek/mt76/mt7915/eeprom.h |
6243 |
+index 3ee8c27bb61b7..40a51d99a7814 100644 |
6244 |
+--- a/drivers/net/wireless/mediatek/mt76/mt7915/eeprom.h |
6245 |
++++ b/drivers/net/wireless/mediatek/mt76/mt7915/eeprom.h |
6246 |
+@@ -116,12 +116,15 @@ static inline bool |
6247 |
+ mt7915_tssi_enabled(struct mt7915_dev *dev, enum nl80211_band band) |
6248 |
+ { |
6249 |
+ u8 *eep = dev->mt76.eeprom.data; |
6250 |
++ u8 val = eep[MT_EE_WIFI_CONF + 7]; |
6251 |
+ |
6252 |
+- /* TODO: DBDC */ |
6253 |
+- if (band == NL80211_BAND_5GHZ) |
6254 |
+- return eep[MT_EE_WIFI_CONF + 7] & MT_EE_WIFI_CONF7_TSSI0_5G; |
6255 |
++ if (band == NL80211_BAND_2GHZ) |
6256 |
++ return val & MT_EE_WIFI_CONF7_TSSI0_2G; |
6257 |
++ |
6258 |
++ if (dev->dbdc_support) |
6259 |
++ return val & MT_EE_WIFI_CONF7_TSSI1_5G; |
6260 |
+ else |
6261 |
+- return eep[MT_EE_WIFI_CONF + 7] & MT_EE_WIFI_CONF7_TSSI0_2G; |
6262 |
++ return val & MT_EE_WIFI_CONF7_TSSI0_5G; |
6263 |
+ } |
6264 |
+ |
6265 |
+ extern const struct sku_group mt7915_sku_groups[]; |
6266 |
+diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/init.c b/drivers/net/wireless/mediatek/mt76/mt7915/init.c |
6267 |
+index c7d4268d860af..5ab34606c021b 100644 |
6268 |
+--- a/drivers/net/wireless/mediatek/mt76/mt7915/init.c |
6269 |
++++ b/drivers/net/wireless/mediatek/mt76/mt7915/init.c |
6270 |
+@@ -452,6 +452,9 @@ mt7915_set_stream_he_txbf_caps(struct ieee80211_sta_he_cap *he_cap, |
6271 |
+ if (nss < 2) |
6272 |
+ return; |
6273 |
+ |
6274 |
++ /* the maximum cap is 4 x 3, (Nr, Nc) = (3, 2) */ |
6275 |
++ elem->phy_cap_info[7] |= min_t(int, nss - 1, 2) << 3; |
6276 |
++ |
6277 |
+ if (vif != NL80211_IFTYPE_AP) |
6278 |
+ return; |
6279 |
+ |
6280 |
+@@ -465,9 +468,6 @@ mt7915_set_stream_he_txbf_caps(struct ieee80211_sta_he_cap *he_cap, |
6281 |
+ c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMER_FB | |
6282 |
+ IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMER_FB; |
6283 |
+ elem->phy_cap_info[6] |= c; |
6284 |
+- |
6285 |
+- /* the maximum cap is 4 x 3, (Nr, Nc) = (3, 2) */ |
6286 |
+- elem->phy_cap_info[7] |= min_t(int, nss - 1, 2) << 3; |
6287 |
+ } |
6288 |
+ |
6289 |
+ static void |
6290 |
+diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/mac.c b/drivers/net/wireless/mediatek/mt76/mt7915/mac.c |
6291 |
+index 819670767521f..be40b07775171 100644 |
6292 |
+--- a/drivers/net/wireless/mediatek/mt76/mt7915/mac.c |
6293 |
++++ b/drivers/net/wireless/mediatek/mt76/mt7915/mac.c |
6294 |
+@@ -404,14 +404,27 @@ int mt7915_mac_fill_rx(struct mt7915_dev *dev, struct sk_buff *skb) |
6295 |
+ u8 *data = (u8 *)rxd; |
6296 |
+ |
6297 |
+ if (status->flag & RX_FLAG_DECRYPTED) { |
6298 |
+- status->iv[0] = data[5]; |
6299 |
+- status->iv[1] = data[4]; |
6300 |
+- status->iv[2] = data[3]; |
6301 |
+- status->iv[3] = data[2]; |
6302 |
+- status->iv[4] = data[1]; |
6303 |
+- status->iv[5] = data[0]; |
6304 |
+- |
6305 |
+- insert_ccmp_hdr = FIELD_GET(MT_RXD2_NORMAL_FRAG, rxd2); |
6306 |
++ switch (FIELD_GET(MT_RXD1_NORMAL_SEC_MODE, rxd1)) { |
6307 |
++ case MT_CIPHER_AES_CCMP: |
6308 |
++ case MT_CIPHER_CCMP_CCX: |
6309 |
++ case MT_CIPHER_CCMP_256: |
6310 |
++ insert_ccmp_hdr = |
6311 |
++ FIELD_GET(MT_RXD2_NORMAL_FRAG, rxd2); |
6312 |
++ fallthrough; |
6313 |
++ case MT_CIPHER_TKIP: |
6314 |
++ case MT_CIPHER_TKIP_NO_MIC: |
6315 |
++ case MT_CIPHER_GCMP: |
6316 |
++ case MT_CIPHER_GCMP_256: |
6317 |
++ status->iv[0] = data[5]; |
6318 |
++ status->iv[1] = data[4]; |
6319 |
++ status->iv[2] = data[3]; |
6320 |
++ status->iv[3] = data[2]; |
6321 |
++ status->iv[4] = data[1]; |
6322 |
++ status->iv[5] = data[0]; |
6323 |
++ break; |
6324 |
++ default: |
6325 |
++ break; |
6326 |
++ } |
6327 |
+ } |
6328 |
+ rxd += 4; |
6329 |
+ if ((u8 *)rxd - skb->data >= skb->len) |
6330 |
+diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/mcu.c b/drivers/net/wireless/mediatek/mt76/mt7915/mcu.c |
6331 |
+index f069a5a03e145..22c791b084baf 100644 |
6332 |
+--- a/drivers/net/wireless/mediatek/mt76/mt7915/mcu.c |
6333 |
++++ b/drivers/net/wireless/mediatek/mt76/mt7915/mcu.c |
6334 |
+@@ -88,28 +88,28 @@ struct mt7915_fw_region { |
6335 |
+ #define HE_PHY(p, c) u8_get_bits(c, IEEE80211_HE_PHY_##p) |
6336 |
+ #define HE_MAC(m, c) u8_get_bits(c, IEEE80211_HE_MAC_##m) |
6337 |
+ |
6338 |
+-static enum mt7915_cipher_type |
6339 |
++static enum mcu_cipher_type |
6340 |
+ mt7915_mcu_get_cipher(int cipher) |
6341 |
+ { |
6342 |
+ switch (cipher) { |
6343 |
+ case WLAN_CIPHER_SUITE_WEP40: |
6344 |
+- return MT_CIPHER_WEP40; |
6345 |
++ return MCU_CIPHER_WEP40; |
6346 |
+ case WLAN_CIPHER_SUITE_WEP104: |
6347 |
+- return MT_CIPHER_WEP104; |
6348 |
++ return MCU_CIPHER_WEP104; |
6349 |
+ case WLAN_CIPHER_SUITE_TKIP: |
6350 |
+- return MT_CIPHER_TKIP; |
6351 |
++ return MCU_CIPHER_TKIP; |
6352 |
+ case WLAN_CIPHER_SUITE_AES_CMAC: |
6353 |
+- return MT_CIPHER_BIP_CMAC_128; |
6354 |
++ return MCU_CIPHER_BIP_CMAC_128; |
6355 |
+ case WLAN_CIPHER_SUITE_CCMP: |
6356 |
+- return MT_CIPHER_AES_CCMP; |
6357 |
++ return MCU_CIPHER_AES_CCMP; |
6358 |
+ case WLAN_CIPHER_SUITE_CCMP_256: |
6359 |
+- return MT_CIPHER_CCMP_256; |
6360 |
++ return MCU_CIPHER_CCMP_256; |
6361 |
+ case WLAN_CIPHER_SUITE_GCMP: |
6362 |
+- return MT_CIPHER_GCMP; |
6363 |
++ return MCU_CIPHER_GCMP; |
6364 |
+ case WLAN_CIPHER_SUITE_GCMP_256: |
6365 |
+- return MT_CIPHER_GCMP_256; |
6366 |
++ return MCU_CIPHER_GCMP_256; |
6367 |
+ case WLAN_CIPHER_SUITE_SMS4: |
6368 |
+- return MT_CIPHER_WAPI; |
6369 |
++ return MCU_CIPHER_WAPI; |
6370 |
+ default: |
6371 |
+ return MT_CIPHER_NONE; |
6372 |
+ } |
6373 |
+@@ -1060,14 +1060,14 @@ mt7915_mcu_sta_key_tlv(struct mt7915_sta *msta, struct sk_buff *skb, |
6374 |
+ sec_key = &sec->key[0]; |
6375 |
+ sec_key->cipher_len = sizeof(*sec_key); |
6376 |
+ |
6377 |
+- if (cipher == MT_CIPHER_BIP_CMAC_128) { |
6378 |
+- sec_key->cipher_id = MT_CIPHER_AES_CCMP; |
6379 |
++ if (cipher == MCU_CIPHER_BIP_CMAC_128) { |
6380 |
++ sec_key->cipher_id = MCU_CIPHER_AES_CCMP; |
6381 |
+ sec_key->key_id = bip->keyidx; |
6382 |
+ sec_key->key_len = 16; |
6383 |
+ memcpy(sec_key->key, bip->key, 16); |
6384 |
+ |
6385 |
+ sec_key = &sec->key[1]; |
6386 |
+- sec_key->cipher_id = MT_CIPHER_BIP_CMAC_128; |
6387 |
++ sec_key->cipher_id = MCU_CIPHER_BIP_CMAC_128; |
6388 |
+ sec_key->cipher_len = sizeof(*sec_key); |
6389 |
+ sec_key->key_len = 16; |
6390 |
+ memcpy(sec_key->key, key->key, 16); |
6391 |
+@@ -1079,14 +1079,14 @@ mt7915_mcu_sta_key_tlv(struct mt7915_sta *msta, struct sk_buff *skb, |
6392 |
+ sec_key->key_len = key->keylen; |
6393 |
+ memcpy(sec_key->key, key->key, key->keylen); |
6394 |
+ |
6395 |
+- if (cipher == MT_CIPHER_TKIP) { |
6396 |
++ if (cipher == MCU_CIPHER_TKIP) { |
6397 |
+ /* Rx/Tx MIC keys are swapped */ |
6398 |
+ memcpy(sec_key->key + 16, key->key + 24, 8); |
6399 |
+ memcpy(sec_key->key + 24, key->key + 16, 8); |
6400 |
+ } |
6401 |
+ |
6402 |
+ /* store key_conf for BIP batch update */ |
6403 |
+- if (cipher == MT_CIPHER_AES_CCMP) { |
6404 |
++ if (cipher == MCU_CIPHER_AES_CCMP) { |
6405 |
+ memcpy(bip->key, key->key, key->keylen); |
6406 |
+ bip->keyidx = key->keyidx; |
6407 |
+ } |
6408 |
+diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/mcu.h b/drivers/net/wireless/mediatek/mt76/mt7915/mcu.h |
6409 |
+index 2d584142c27b0..1a865ef81a43a 100644 |
6410 |
+--- a/drivers/net/wireless/mediatek/mt76/mt7915/mcu.h |
6411 |
++++ b/drivers/net/wireless/mediatek/mt76/mt7915/mcu.h |
6412 |
+@@ -1023,18 +1023,17 @@ enum { |
6413 |
+ STA_REC_MAX_NUM |
6414 |
+ }; |
6415 |
+ |
6416 |
+-enum mt7915_cipher_type { |
6417 |
+- MT_CIPHER_NONE, |
6418 |
+- MT_CIPHER_WEP40, |
6419 |
+- MT_CIPHER_WEP104, |
6420 |
+- MT_CIPHER_WEP128, |
6421 |
+- MT_CIPHER_TKIP, |
6422 |
+- MT_CIPHER_AES_CCMP, |
6423 |
+- MT_CIPHER_CCMP_256, |
6424 |
+- MT_CIPHER_GCMP, |
6425 |
+- MT_CIPHER_GCMP_256, |
6426 |
+- MT_CIPHER_WAPI, |
6427 |
+- MT_CIPHER_BIP_CMAC_128, |
6428 |
++enum mcu_cipher_type { |
6429 |
++ MCU_CIPHER_WEP40 = 1, |
6430 |
++ MCU_CIPHER_WEP104, |
6431 |
++ MCU_CIPHER_WEP128, |
6432 |
++ MCU_CIPHER_TKIP, |
6433 |
++ MCU_CIPHER_AES_CCMP, |
6434 |
++ MCU_CIPHER_CCMP_256, |
6435 |
++ MCU_CIPHER_GCMP, |
6436 |
++ MCU_CIPHER_GCMP_256, |
6437 |
++ MCU_CIPHER_WAPI, |
6438 |
++ MCU_CIPHER_BIP_CMAC_128, |
6439 |
+ }; |
6440 |
+ |
6441 |
+ enum { |
6442 |
+diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/mac.c b/drivers/net/wireless/mediatek/mt76/mt7921/mac.c |
6443 |
+index c4b144391a8e2..b7af252a00914 100644 |
6444 |
+--- a/drivers/net/wireless/mediatek/mt76/mt7921/mac.c |
6445 |
++++ b/drivers/net/wireless/mediatek/mt76/mt7921/mac.c |
6446 |
+@@ -378,14 +378,27 @@ int mt7921_mac_fill_rx(struct mt7921_dev *dev, struct sk_buff *skb) |
6447 |
+ u8 *data = (u8 *)rxd; |
6448 |
+ |
6449 |
+ if (status->flag & RX_FLAG_DECRYPTED) { |
6450 |
+- status->iv[0] = data[5]; |
6451 |
+- status->iv[1] = data[4]; |
6452 |
+- status->iv[2] = data[3]; |
6453 |
+- status->iv[3] = data[2]; |
6454 |
+- status->iv[4] = data[1]; |
6455 |
+- status->iv[5] = data[0]; |
6456 |
+- |
6457 |
+- insert_ccmp_hdr = FIELD_GET(MT_RXD2_NORMAL_FRAG, rxd2); |
6458 |
++ switch (FIELD_GET(MT_RXD1_NORMAL_SEC_MODE, rxd1)) { |
6459 |
++ case MT_CIPHER_AES_CCMP: |
6460 |
++ case MT_CIPHER_CCMP_CCX: |
6461 |
++ case MT_CIPHER_CCMP_256: |
6462 |
++ insert_ccmp_hdr = |
6463 |
++ FIELD_GET(MT_RXD2_NORMAL_FRAG, rxd2); |
6464 |
++ fallthrough; |
6465 |
++ case MT_CIPHER_TKIP: |
6466 |
++ case MT_CIPHER_TKIP_NO_MIC: |
6467 |
++ case MT_CIPHER_GCMP: |
6468 |
++ case MT_CIPHER_GCMP_256: |
6469 |
++ status->iv[0] = data[5]; |
6470 |
++ status->iv[1] = data[4]; |
6471 |
++ status->iv[2] = data[3]; |
6472 |
++ status->iv[3] = data[2]; |
6473 |
++ status->iv[4] = data[1]; |
6474 |
++ status->iv[5] = data[0]; |
6475 |
++ break; |
6476 |
++ default: |
6477 |
++ break; |
6478 |
++ } |
6479 |
+ } |
6480 |
+ rxd += 4; |
6481 |
+ if ((u8 *)rxd - skb->data >= skb->len) |
6482 |
+diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/mcu.c b/drivers/net/wireless/mediatek/mt76/mt7921/mcu.c |
6483 |
+index a4f070cd78fda..02da127e91263 100644 |
6484 |
+--- a/drivers/net/wireless/mediatek/mt76/mt7921/mcu.c |
6485 |
++++ b/drivers/net/wireless/mediatek/mt76/mt7921/mcu.c |
6486 |
+@@ -87,28 +87,28 @@ struct mt7921_fw_region { |
6487 |
+ #define to_wcid_lo(id) FIELD_GET(GENMASK(7, 0), (u16)id) |
6488 |
+ #define to_wcid_hi(id) FIELD_GET(GENMASK(9, 8), (u16)id) |
6489 |
+ |
6490 |
+-static enum mt7921_cipher_type |
6491 |
++static enum mcu_cipher_type |
6492 |
+ mt7921_mcu_get_cipher(int cipher) |
6493 |
+ { |
6494 |
+ switch (cipher) { |
6495 |
+ case WLAN_CIPHER_SUITE_WEP40: |
6496 |
+- return MT_CIPHER_WEP40; |
6497 |
++ return MCU_CIPHER_WEP40; |
6498 |
+ case WLAN_CIPHER_SUITE_WEP104: |
6499 |
+- return MT_CIPHER_WEP104; |
6500 |
++ return MCU_CIPHER_WEP104; |
6501 |
+ case WLAN_CIPHER_SUITE_TKIP: |
6502 |
+- return MT_CIPHER_TKIP; |
6503 |
++ return MCU_CIPHER_TKIP; |
6504 |
+ case WLAN_CIPHER_SUITE_AES_CMAC: |
6505 |
+- return MT_CIPHER_BIP_CMAC_128; |
6506 |
++ return MCU_CIPHER_BIP_CMAC_128; |
6507 |
+ case WLAN_CIPHER_SUITE_CCMP: |
6508 |
+- return MT_CIPHER_AES_CCMP; |
6509 |
++ return MCU_CIPHER_AES_CCMP; |
6510 |
+ case WLAN_CIPHER_SUITE_CCMP_256: |
6511 |
+- return MT_CIPHER_CCMP_256; |
6512 |
++ return MCU_CIPHER_CCMP_256; |
6513 |
+ case WLAN_CIPHER_SUITE_GCMP: |
6514 |
+- return MT_CIPHER_GCMP; |
6515 |
++ return MCU_CIPHER_GCMP; |
6516 |
+ case WLAN_CIPHER_SUITE_GCMP_256: |
6517 |
+- return MT_CIPHER_GCMP_256; |
6518 |
++ return MCU_CIPHER_GCMP_256; |
6519 |
+ case WLAN_CIPHER_SUITE_SMS4: |
6520 |
+- return MT_CIPHER_WAPI; |
6521 |
++ return MCU_CIPHER_WAPI; |
6522 |
+ default: |
6523 |
+ return MT_CIPHER_NONE; |
6524 |
+ } |
6525 |
+@@ -579,14 +579,14 @@ mt7921_mcu_sta_key_tlv(struct mt7921_sta *msta, struct sk_buff *skb, |
6526 |
+ sec_key = &sec->key[0]; |
6527 |
+ sec_key->cipher_len = sizeof(*sec_key); |
6528 |
+ |
6529 |
+- if (cipher == MT_CIPHER_BIP_CMAC_128) { |
6530 |
+- sec_key->cipher_id = MT_CIPHER_AES_CCMP; |
6531 |
++ if (cipher == MCU_CIPHER_BIP_CMAC_128) { |
6532 |
++ sec_key->cipher_id = MCU_CIPHER_AES_CCMP; |
6533 |
+ sec_key->key_id = bip->keyidx; |
6534 |
+ sec_key->key_len = 16; |
6535 |
+ memcpy(sec_key->key, bip->key, 16); |
6536 |
+ |
6537 |
+ sec_key = &sec->key[1]; |
6538 |
+- sec_key->cipher_id = MT_CIPHER_BIP_CMAC_128; |
6539 |
++ sec_key->cipher_id = MCU_CIPHER_BIP_CMAC_128; |
6540 |
+ sec_key->cipher_len = sizeof(*sec_key); |
6541 |
+ sec_key->key_len = 16; |
6542 |
+ memcpy(sec_key->key, key->key, 16); |
6543 |
+@@ -598,14 +598,14 @@ mt7921_mcu_sta_key_tlv(struct mt7921_sta *msta, struct sk_buff *skb, |
6544 |
+ sec_key->key_len = key->keylen; |
6545 |
+ memcpy(sec_key->key, key->key, key->keylen); |
6546 |
+ |
6547 |
+- if (cipher == MT_CIPHER_TKIP) { |
6548 |
++ if (cipher == MCU_CIPHER_TKIP) { |
6549 |
+ /* Rx/Tx MIC keys are swapped */ |
6550 |
+ memcpy(sec_key->key + 16, key->key + 24, 8); |
6551 |
+ memcpy(sec_key->key + 24, key->key + 16, 8); |
6552 |
+ } |
6553 |
+ |
6554 |
+ /* store key_conf for BIP batch update */ |
6555 |
+- if (cipher == MT_CIPHER_AES_CCMP) { |
6556 |
++ if (cipher == MCU_CIPHER_AES_CCMP) { |
6557 |
+ memcpy(bip->key, key->key, key->keylen); |
6558 |
+ bip->keyidx = key->keyidx; |
6559 |
+ } |
6560 |
+diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/mcu.h b/drivers/net/wireless/mediatek/mt76/mt7921/mcu.h |
6561 |
+index 2fdc62367b3fb..4028c667bd688 100644 |
6562 |
+--- a/drivers/net/wireless/mediatek/mt76/mt7921/mcu.h |
6563 |
++++ b/drivers/net/wireless/mediatek/mt76/mt7921/mcu.h |
6564 |
+@@ -214,18 +214,17 @@ struct sta_rec_sec { |
6565 |
+ struct sec_key key[2]; |
6566 |
+ } __packed; |
6567 |
+ |
6568 |
+-enum mt7921_cipher_type { |
6569 |
+- MT_CIPHER_NONE, |
6570 |
+- MT_CIPHER_WEP40, |
6571 |
+- MT_CIPHER_WEP104, |
6572 |
+- MT_CIPHER_WEP128, |
6573 |
+- MT_CIPHER_TKIP, |
6574 |
+- MT_CIPHER_AES_CCMP, |
6575 |
+- MT_CIPHER_CCMP_256, |
6576 |
+- MT_CIPHER_GCMP, |
6577 |
+- MT_CIPHER_GCMP_256, |
6578 |
+- MT_CIPHER_WAPI, |
6579 |
+- MT_CIPHER_BIP_CMAC_128, |
6580 |
++enum mcu_cipher_type { |
6581 |
++ MCU_CIPHER_WEP40 = 1, |
6582 |
++ MCU_CIPHER_WEP104, |
6583 |
++ MCU_CIPHER_WEP128, |
6584 |
++ MCU_CIPHER_TKIP, |
6585 |
++ MCU_CIPHER_AES_CCMP, |
6586 |
++ MCU_CIPHER_CCMP_256, |
6587 |
++ MCU_CIPHER_GCMP, |
6588 |
++ MCU_CIPHER_GCMP_256, |
6589 |
++ MCU_CIPHER_WAPI, |
6590 |
++ MCU_CIPHER_BIP_CMAC_128, |
6591 |
+ }; |
6592 |
+ |
6593 |
+ enum { |
6594 |
+diff --git a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h |
6595 |
+index d6d1be4169e5f..acb6b0cd36672 100644 |
6596 |
+--- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h |
6597 |
++++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h |
6598 |
+@@ -853,15 +853,10 @@ struct rtl8192eu_efuse { |
6599 |
+ u8 usb_optional_function; |
6600 |
+ u8 res9[2]; |
6601 |
+ u8 mac_addr[ETH_ALEN]; /* 0xd7 */ |
6602 |
+- u8 res10[2]; |
6603 |
+- u8 vendor_name[7]; |
6604 |
+- u8 res11[2]; |
6605 |
+- u8 device_name[0x0b]; /* 0xe8 */ |
6606 |
+- u8 res12[2]; |
6607 |
+- u8 serial[0x0b]; /* 0xf5 */ |
6608 |
+- u8 res13[0x30]; |
6609 |
++ u8 device_info[80]; |
6610 |
++ u8 res11[3]; |
6611 |
+ u8 unknown[0x0d]; /* 0x130 */ |
6612 |
+- u8 res14[0xc3]; |
6613 |
++ u8 res12[0xc3]; |
6614 |
+ }; |
6615 |
+ |
6616 |
+ struct rtl8xxxu_reg8val { |
6617 |
+diff --git a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c |
6618 |
+index cfe2dfdae928f..b06508d0cdf8f 100644 |
6619 |
+--- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c |
6620 |
++++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c |
6621 |
+@@ -554,9 +554,43 @@ rtl8192e_set_tx_power(struct rtl8xxxu_priv *priv, int channel, bool ht40) |
6622 |
+ } |
6623 |
+ } |
6624 |
+ |
6625 |
++static void rtl8192eu_log_next_device_info(struct rtl8xxxu_priv *priv, |
6626 |
++ char *record_name, |
6627 |
++ char *device_info, |
6628 |
++ unsigned int *record_offset) |
6629 |
++{ |
6630 |
++ char *record = device_info + *record_offset; |
6631 |
++ |
6632 |
++ /* A record is [ total length | 0x03 | value ] */ |
6633 |
++ unsigned char l = record[0]; |
6634 |
++ |
6635 |
++ /* |
6636 |
++ * The whole device info section seems to be 80 characters, make sure |
6637 |
++ * we don't read further. |
6638 |
++ */ |
6639 |
++ if (*record_offset + l > 80) { |
6640 |
++ dev_warn(&priv->udev->dev, |
6641 |
++ "invalid record length %d while parsing \"%s\" at offset %u.\n", |
6642 |
++ l, record_name, *record_offset); |
6643 |
++ return; |
6644 |
++ } |
6645 |
++ |
6646 |
++ if (l >= 2) { |
6647 |
++ char value[80]; |
6648 |
++ |
6649 |
++ memcpy(value, &record[2], l - 2); |
6650 |
++ value[l - 2] = '\0'; |
6651 |
++ dev_info(&priv->udev->dev, "%s: %s\n", record_name, value); |
6652 |
++ *record_offset = *record_offset + l; |
6653 |
++ } else { |
6654 |
++ dev_info(&priv->udev->dev, "%s not available.\n", record_name); |
6655 |
++ } |
6656 |
++} |
6657 |
++ |
6658 |
+ static int rtl8192eu_parse_efuse(struct rtl8xxxu_priv *priv) |
6659 |
+ { |
6660 |
+ struct rtl8192eu_efuse *efuse = &priv->efuse_wifi.efuse8192eu; |
6661 |
++ unsigned int record_offset; |
6662 |
+ int i; |
6663 |
+ |
6664 |
+ if (efuse->rtl_id != cpu_to_le16(0x8129)) |
6665 |
+@@ -604,12 +638,25 @@ static int rtl8192eu_parse_efuse(struct rtl8xxxu_priv *priv) |
6666 |
+ priv->has_xtalk = 1; |
6667 |
+ priv->xtalk = priv->efuse_wifi.efuse8192eu.xtal_k & 0x3f; |
6668 |
+ |
6669 |
+- dev_info(&priv->udev->dev, "Vendor: %.7s\n", efuse->vendor_name); |
6670 |
+- dev_info(&priv->udev->dev, "Product: %.11s\n", efuse->device_name); |
6671 |
+- if (memchr_inv(efuse->serial, 0xff, 11)) |
6672 |
+- dev_info(&priv->udev->dev, "Serial: %.11s\n", efuse->serial); |
6673 |
+- else |
6674 |
+- dev_info(&priv->udev->dev, "Serial not available.\n"); |
6675 |
++ /* |
6676 |
++ * device_info section seems to be laid out as records |
6677 |
++ * [ total length | 0x03 | value ] so: |
6678 |
++ * - vendor length + 2 |
6679 |
++ * - 0x03 |
6680 |
++ * - vendor string (not null terminated) |
6681 |
++ * - product length + 2 |
6682 |
++ * - 0x03 |
6683 |
++ * - product string (not null terminated) |
6684 |
++ * Then there is one or 2 0x00 on all the 4 devices I own or found |
6685 |
++ * dumped online. |
6686 |
++ * As previous version of the code handled an optional serial |
6687 |
++ * string, I now assume there may be a third record if the |
6688 |
++ * length is not 0. |
6689 |
++ */ |
6690 |
++ record_offset = 0; |
6691 |
++ rtl8192eu_log_next_device_info(priv, "Vendor", efuse->device_info, &record_offset); |
6692 |
++ rtl8192eu_log_next_device_info(priv, "Product", efuse->device_info, &record_offset); |
6693 |
++ rtl8192eu_log_next_device_info(priv, "Serial", efuse->device_info, &record_offset); |
6694 |
+ |
6695 |
+ if (rtl8xxxu_debug & RTL8XXXU_DEBUG_EFUSE) { |
6696 |
+ unsigned char *raw = priv->efuse_wifi.raw; |
6697 |
+diff --git a/drivers/net/wireless/realtek/rtw88/pci.c b/drivers/net/wireless/realtek/rtw88/pci.c |
6698 |
+index 6b5c885798a4b..e5110d2cbc1d5 100644 |
6699 |
+--- a/drivers/net/wireless/realtek/rtw88/pci.c |
6700 |
++++ b/drivers/net/wireless/realtek/rtw88/pci.c |
6701 |
+@@ -2,6 +2,7 @@ |
6702 |
+ /* Copyright(c) 2018-2019 Realtek Corporation |
6703 |
+ */ |
6704 |
+ |
6705 |
++#include <linux/dmi.h> |
6706 |
+ #include <linux/module.h> |
6707 |
+ #include <linux/pci.h> |
6708 |
+ #include "main.h" |
6709 |
+@@ -1598,6 +1599,36 @@ static void rtw_pci_napi_deinit(struct rtw_dev *rtwdev) |
6710 |
+ netif_napi_del(&rtwpci->napi); |
6711 |
+ } |
6712 |
+ |
6713 |
++enum rtw88_quirk_dis_pci_caps { |
6714 |
++ QUIRK_DIS_PCI_CAP_MSI, |
6715 |
++ QUIRK_DIS_PCI_CAP_ASPM, |
6716 |
++}; |
6717 |
++ |
6718 |
++static int disable_pci_caps(const struct dmi_system_id *dmi) |
6719 |
++{ |
6720 |
++ uintptr_t dis_caps = (uintptr_t)dmi->driver_data; |
6721 |
++ |
6722 |
++ if (dis_caps & BIT(QUIRK_DIS_PCI_CAP_MSI)) |
6723 |
++ rtw_disable_msi = true; |
6724 |
++ if (dis_caps & BIT(QUIRK_DIS_PCI_CAP_ASPM)) |
6725 |
++ rtw_pci_disable_aspm = true; |
6726 |
++ |
6727 |
++ return 1; |
6728 |
++} |
6729 |
++ |
6730 |
++static const struct dmi_system_id rtw88_pci_quirks[] = { |
6731 |
++ { |
6732 |
++ .callback = disable_pci_caps, |
6733 |
++ .ident = "Protempo Ltd L116HTN6SPW", |
6734 |
++ .matches = { |
6735 |
++ DMI_MATCH(DMI_SYS_VENDOR, "Protempo Ltd"), |
6736 |
++ DMI_MATCH(DMI_PRODUCT_NAME, "L116HTN6SPW"), |
6737 |
++ }, |
6738 |
++ .driver_data = (void *)BIT(QUIRK_DIS_PCI_CAP_ASPM), |
6739 |
++ }, |
6740 |
++ {} |
6741 |
++}; |
6742 |
++ |
6743 |
+ int rtw_pci_probe(struct pci_dev *pdev, |
6744 |
+ const struct pci_device_id *id) |
6745 |
+ { |
6746 |
+@@ -1648,6 +1679,7 @@ int rtw_pci_probe(struct pci_dev *pdev, |
6747 |
+ goto err_destroy_pci; |
6748 |
+ } |
6749 |
+ |
6750 |
++ dmi_check_system(rtw88_pci_quirks); |
6751 |
+ rtw_pci_phy_cfg(rtwdev); |
6752 |
+ |
6753 |
+ ret = rtw_register_hw(rtwdev, hw); |
6754 |
+diff --git a/drivers/net/wireless/realtek/rtw88/rtw8822c_table.c b/drivers/net/wireless/realtek/rtw88/rtw8822c_table.c |
6755 |
+index ad5715c65de3e..03f97acbf80f6 100644 |
6756 |
+--- a/drivers/net/wireless/realtek/rtw88/rtw8822c_table.c |
6757 |
++++ b/drivers/net/wireless/realtek/rtw88/rtw8822c_table.c |
6758 |
+@@ -16812,53 +16812,53 @@ static const u32 rtw8822c_rf_a[] = { |
6759 |
+ 0x92000002, 0x00000000, 0x40000000, 0x00000000, |
6760 |
+ 0x03F, 0x00010E46, |
6761 |
+ 0x93000001, 0x00000000, 0x40000000, 0x00000000, |
6762 |
+- 0x03F, 0x00030246, |
6763 |
++ 0x03F, 0x0003D646, |
6764 |
+ 0x93000002, 0x00000000, 0x40000000, 0x00000000, |
6765 |
+- 0x03F, 0x00030246, |
6766 |
++ 0x03F, 0x0003D646, |
6767 |
+ 0x93000003, 0x00000000, 0x40000000, 0x00000000, |
6768 |
+- 0x03F, 0x00030246, |
6769 |
++ 0x03F, 0x0003D646, |
6770 |
+ 0x93000004, 0x00000000, 0x40000000, 0x00000000, |
6771 |
+- 0x03F, 0x00030246, |
6772 |
++ 0x03F, 0x0003D646, |
6773 |
+ 0x93000005, 0x00000000, 0x40000000, 0x00000000, |
6774 |
+- 0x03F, 0x00030246, |
6775 |
++ 0x03F, 0x0003D646, |
6776 |
+ 0x93000006, 0x00000000, 0x40000000, 0x00000000, |
6777 |
+- 0x03F, 0x00030246, |
6778 |
++ 0x03F, 0x0003D646, |
6779 |
+ 0x93000015, 0x00000000, 0x40000000, 0x00000000, |
6780 |
+- 0x03F, 0x00030246, |
6781 |
++ 0x03F, 0x0003D646, |
6782 |
+ 0x93000016, 0x00000000, 0x40000000, 0x00000000, |
6783 |
+- 0x03F, 0x00030246, |
6784 |
++ 0x03F, 0x0003D646, |
6785 |
+ 0x94000001, 0x00000000, 0x40000000, 0x00000000, |
6786 |
+- 0x03F, 0x00030246, |
6787 |
++ 0x03F, 0x0003D646, |
6788 |
+ 0x94000002, 0x00000000, 0x40000000, 0x00000000, |
6789 |
+- 0x03F, 0x00030246, |
6790 |
++ 0x03F, 0x0003D646, |
6791 |
+ 0x94000003, 0x00000000, 0x40000000, 0x00000000, |
6792 |
+- 0x03F, 0x00030246, |
6793 |
++ 0x03F, 0x0003D646, |
6794 |
+ 0x94000004, 0x00000000, 0x40000000, 0x00000000, |
6795 |
+- 0x03F, 0x00030246, |
6796 |
++ 0x03F, 0x0003D646, |
6797 |
+ 0x94000005, 0x00000000, 0x40000000, 0x00000000, |
6798 |
+- 0x03F, 0x00030246, |
6799 |
++ 0x03F, 0x0003D646, |
6800 |
+ 0x94000006, 0x00000000, 0x40000000, 0x00000000, |
6801 |
+- 0x03F, 0x00030246, |
6802 |
++ 0x03F, 0x0003D646, |
6803 |
+ 0x94000015, 0x00000000, 0x40000000, 0x00000000, |
6804 |
+- 0x03F, 0x00030246, |
6805 |
++ 0x03F, 0x0003D646, |
6806 |
+ 0x94000016, 0x00000000, 0x40000000, 0x00000000, |
6807 |
+- 0x03F, 0x00030246, |
6808 |
++ 0x03F, 0x0003D646, |
6809 |
+ 0x95000001, 0x00000000, 0x40000000, 0x00000000, |
6810 |
+- 0x03F, 0x00030246, |
6811 |
++ 0x03F, 0x0003D646, |
6812 |
+ 0x95000002, 0x00000000, 0x40000000, 0x00000000, |
6813 |
+- 0x03F, 0x00030246, |
6814 |
++ 0x03F, 0x0003D646, |
6815 |
+ 0x95000003, 0x00000000, 0x40000000, 0x00000000, |
6816 |
+- 0x03F, 0x00030246, |
6817 |
++ 0x03F, 0x0003D646, |
6818 |
+ 0x95000004, 0x00000000, 0x40000000, 0x00000000, |
6819 |
+- 0x03F, 0x00030246, |
6820 |
++ 0x03F, 0x0003D646, |
6821 |
+ 0x95000005, 0x00000000, 0x40000000, 0x00000000, |
6822 |
+- 0x03F, 0x00030246, |
6823 |
++ 0x03F, 0x0003D646, |
6824 |
+ 0x95000006, 0x00000000, 0x40000000, 0x00000000, |
6825 |
+- 0x03F, 0x00030246, |
6826 |
++ 0x03F, 0x0003D646, |
6827 |
+ 0x95000015, 0x00000000, 0x40000000, 0x00000000, |
6828 |
+- 0x03F, 0x00030246, |
6829 |
++ 0x03F, 0x0003D646, |
6830 |
+ 0x95000016, 0x00000000, 0x40000000, 0x00000000, |
6831 |
+- 0x03F, 0x00030246, |
6832 |
++ 0x03F, 0x0003D646, |
6833 |
+ 0xA0000000, 0x00000000, |
6834 |
+ 0x03F, 0x00002A46, |
6835 |
+ 0xB0000000, 0x00000000, |
6836 |
+@@ -18762,53 +18762,53 @@ static const u32 rtw8822c_rf_a[] = { |
6837 |
+ 0x92000002, 0x00000000, 0x40000000, 0x00000000, |
6838 |
+ 0x03F, 0x0000EA46, |
6839 |
+ 0x93000001, 0x00000000, 0x40000000, 0x00000000, |
6840 |
+- 0x03F, 0x00031E46, |
6841 |
++ 0x03F, 0x0003D646, |
6842 |
+ 0x93000002, 0x00000000, 0x40000000, 0x00000000, |
6843 |
+- 0x03F, 0x00031E46, |
6844 |
++ 0x03F, 0x0003D646, |
6845 |
+ 0x93000003, 0x00000000, 0x40000000, 0x00000000, |
6846 |
+- 0x03F, 0x00031E46, |
6847 |
++ 0x03F, 0x0003D646, |
6848 |
+ 0x93000004, 0x00000000, 0x40000000, 0x00000000, |
6849 |
+- 0x03F, 0x00031E46, |
6850 |
++ 0x03F, 0x0003D646, |
6851 |
+ 0x93000005, 0x00000000, 0x40000000, 0x00000000, |
6852 |
+- 0x03F, 0x00031E46, |
6853 |
++ 0x03F, 0x0003D646, |
6854 |
+ 0x93000006, 0x00000000, 0x40000000, 0x00000000, |
6855 |
+- 0x03F, 0x00031E46, |
6856 |
++ 0x03F, 0x0003D646, |
6857 |
+ 0x93000015, 0x00000000, 0x40000000, 0x00000000, |
6858 |
+- 0x03F, 0x00031E46, |
6859 |
++ 0x03F, 0x0003D646, |
6860 |
+ 0x93000016, 0x00000000, 0x40000000, 0x00000000, |
6861 |
+- 0x03F, 0x00031E46, |
6862 |
++ 0x03F, 0x0003D646, |
6863 |
+ 0x94000001, 0x00000000, 0x40000000, 0x00000000, |
6864 |
+- 0x03F, 0x00031E46, |
6865 |
++ 0x03F, 0x0003D646, |
6866 |
+ 0x94000002, 0x00000000, 0x40000000, 0x00000000, |
6867 |
+- 0x03F, 0x00031E46, |
6868 |
++ 0x03F, 0x0003D646, |
6869 |
+ 0x94000003, 0x00000000, 0x40000000, 0x00000000, |
6870 |
+- 0x03F, 0x00031E46, |
6871 |
++ 0x03F, 0x0003D646, |
6872 |
+ 0x94000004, 0x00000000, 0x40000000, 0x00000000, |
6873 |
+- 0x03F, 0x00031E46, |
6874 |
++ 0x03F, 0x0003D646, |
6875 |
+ 0x94000005, 0x00000000, 0x40000000, 0x00000000, |
6876 |
+- 0x03F, 0x00031E46, |
6877 |
++ 0x03F, 0x0003D646, |
6878 |
+ 0x94000006, 0x00000000, 0x40000000, 0x00000000, |
6879 |
+- 0x03F, 0x00031E46, |
6880 |
++ 0x03F, 0x0003D646, |
6881 |
+ 0x94000015, 0x00000000, 0x40000000, 0x00000000, |
6882 |
+- 0x03F, 0x00031E46, |
6883 |
++ 0x03F, 0x0003D646, |
6884 |
+ 0x94000016, 0x00000000, 0x40000000, 0x00000000, |
6885 |
+- 0x03F, 0x00031E46, |
6886 |
++ 0x03F, 0x0003D646, |
6887 |
+ 0x95000001, 0x00000000, 0x40000000, 0x00000000, |
6888 |
+- 0x03F, 0x00031E46, |
6889 |
++ 0x03F, 0x0003D646, |
6890 |
+ 0x95000002, 0x00000000, 0x40000000, 0x00000000, |
6891 |
+- 0x03F, 0x00031E46, |
6892 |
++ 0x03F, 0x0003D646, |
6893 |
+ 0x95000003, 0x00000000, 0x40000000, 0x00000000, |
6894 |
+- 0x03F, 0x00031E46, |
6895 |
++ 0x03F, 0x0003D646, |
6896 |
+ 0x95000004, 0x00000000, 0x40000000, 0x00000000, |
6897 |
+- 0x03F, 0x00031E46, |
6898 |
++ 0x03F, 0x0003D646, |
6899 |
+ 0x95000005, 0x00000000, 0x40000000, 0x00000000, |
6900 |
+- 0x03F, 0x00031E46, |
6901 |
++ 0x03F, 0x0003D646, |
6902 |
+ 0x95000006, 0x00000000, 0x40000000, 0x00000000, |
6903 |
+- 0x03F, 0x00031E46, |
6904 |
++ 0x03F, 0x0003D646, |
6905 |
+ 0x95000015, 0x00000000, 0x40000000, 0x00000000, |
6906 |
+- 0x03F, 0x00031E46, |
6907 |
++ 0x03F, 0x0003D646, |
6908 |
+ 0x95000016, 0x00000000, 0x40000000, 0x00000000, |
6909 |
+- 0x03F, 0x00031E46, |
6910 |
++ 0x03F, 0x0003D646, |
6911 |
+ 0xA0000000, 0x00000000, |
6912 |
+ 0x03F, 0x00002A46, |
6913 |
+ 0xB0000000, 0x00000000, |
6914 |
+@@ -18957,53 +18957,53 @@ static const u32 rtw8822c_rf_a[] = { |
6915 |
+ 0x92000002, 0x00000000, 0x40000000, 0x00000000, |
6916 |
+ 0x03F, 0x0000EA46, |
6917 |
+ 0x93000001, 0x00000000, 0x40000000, 0x00000000, |
6918 |
+- 0x03F, 0x00031E46, |
6919 |
++ 0x03F, 0x0003D646, |
6920 |
+ 0x93000002, 0x00000000, 0x40000000, 0x00000000, |
6921 |
+- 0x03F, 0x00031E46, |
6922 |
++ 0x03F, 0x0003D646, |
6923 |
+ 0x93000003, 0x00000000, 0x40000000, 0x00000000, |
6924 |
+- 0x03F, 0x00031E46, |
6925 |
++ 0x03F, 0x0003D646, |
6926 |
+ 0x93000004, 0x00000000, 0x40000000, 0x00000000, |
6927 |
+- 0x03F, 0x00031E46, |
6928 |
++ 0x03F, 0x0003D646, |
6929 |
+ 0x93000005, 0x00000000, 0x40000000, 0x00000000, |
6930 |
+- 0x03F, 0x00031E46, |
6931 |
++ 0x03F, 0x0003D646, |
6932 |
+ 0x93000006, 0x00000000, 0x40000000, 0x00000000, |
6933 |
+- 0x03F, 0x00031E46, |
6934 |
++ 0x03F, 0x0003D646, |
6935 |
+ 0x93000015, 0x00000000, 0x40000000, 0x00000000, |
6936 |
+- 0x03F, 0x00031E46, |
6937 |
++ 0x03F, 0x0003D646, |
6938 |
+ 0x93000016, 0x00000000, 0x40000000, 0x00000000, |
6939 |
+- 0x03F, 0x00031E46, |
6940 |
++ 0x03F, 0x0003D646, |
6941 |
+ 0x94000001, 0x00000000, 0x40000000, 0x00000000, |
6942 |
+- 0x03F, 0x00031E46, |
6943 |
++ 0x03F, 0x0003D646, |
6944 |
+ 0x94000002, 0x00000000, 0x40000000, 0x00000000, |
6945 |
+- 0x03F, 0x00031E46, |
6946 |
++ 0x03F, 0x0003D646, |
6947 |
+ 0x94000003, 0x00000000, 0x40000000, 0x00000000, |
6948 |
+- 0x03F, 0x00031E46, |
6949 |
++ 0x03F, 0x0003D646, |
6950 |
+ 0x94000004, 0x00000000, 0x40000000, 0x00000000, |
6951 |
+- 0x03F, 0x00031E46, |
6952 |
++ 0x03F, 0x0003D646, |
6953 |
+ 0x94000005, 0x00000000, 0x40000000, 0x00000000, |
6954 |
+- 0x03F, 0x00031E46, |
6955 |
++ 0x03F, 0x0003D646, |
6956 |
+ 0x94000006, 0x00000000, 0x40000000, 0x00000000, |
6957 |
+- 0x03F, 0x00031E46, |
6958 |
++ 0x03F, 0x0003D646, |
6959 |
+ 0x94000015, 0x00000000, 0x40000000, 0x00000000, |
6960 |
+- 0x03F, 0x00031E46, |
6961 |
++ 0x03F, 0x0003D646, |
6962 |
+ 0x94000016, 0x00000000, 0x40000000, 0x00000000, |
6963 |
+- 0x03F, 0x00031E46, |
6964 |
++ 0x03F, 0x0003D646, |
6965 |
+ 0x95000001, 0x00000000, 0x40000000, 0x00000000, |
6966 |
+- 0x03F, 0x00031E46, |
6967 |
++ 0x03F, 0x0003D646, |
6968 |
+ 0x95000002, 0x00000000, 0x40000000, 0x00000000, |
6969 |
+- 0x03F, 0x00031E46, |
6970 |
++ 0x03F, 0x0003D646, |
6971 |
+ 0x95000003, 0x00000000, 0x40000000, 0x00000000, |
6972 |
+- 0x03F, 0x00031E46, |
6973 |
++ 0x03F, 0x0003D646, |
6974 |
+ 0x95000004, 0x00000000, 0x40000000, 0x00000000, |
6975 |
+- 0x03F, 0x00031E46, |
6976 |
++ 0x03F, 0x0003D646, |
6977 |
+ 0x95000005, 0x00000000, 0x40000000, 0x00000000, |
6978 |
+- 0x03F, 0x00031E46, |
6979 |
++ 0x03F, 0x0003D646, |
6980 |
+ 0x95000006, 0x00000000, 0x40000000, 0x00000000, |
6981 |
+- 0x03F, 0x00031E46, |
6982 |
++ 0x03F, 0x0003D646, |
6983 |
+ 0x95000015, 0x00000000, 0x40000000, 0x00000000, |
6984 |
+- 0x03F, 0x00031E46, |
6985 |
++ 0x03F, 0x0003D646, |
6986 |
+ 0x95000016, 0x00000000, 0x40000000, 0x00000000, |
6987 |
+- 0x03F, 0x00031E46, |
6988 |
++ 0x03F, 0x0003D646, |
6989 |
+ 0xA0000000, 0x00000000, |
6990 |
+ 0x03F, 0x00002A46, |
6991 |
+ 0xB0000000, 0x00000000, |
6992 |
+@@ -19152,53 +19152,53 @@ static const u32 rtw8822c_rf_a[] = { |
6993 |
+ 0x92000002, 0x00000000, 0x40000000, 0x00000000, |
6994 |
+ 0x03F, 0x0000EA46, |
6995 |
+ 0x93000001, 0x00000000, 0x40000000, 0x00000000, |
6996 |
+- 0x03F, 0x00031E46, |
6997 |
++ 0x03F, 0x0003D646, |
6998 |
+ 0x93000002, 0x00000000, 0x40000000, 0x00000000, |
6999 |
+- 0x03F, 0x00031E46, |
7000 |
++ 0x03F, 0x0003D646, |
7001 |
+ 0x93000003, 0x00000000, 0x40000000, 0x00000000, |
7002 |
+- 0x03F, 0x00031E46, |
7003 |
++ 0x03F, 0x0003D646, |
7004 |
+ 0x93000004, 0x00000000, 0x40000000, 0x00000000, |
7005 |
+- 0x03F, 0x00031E46, |
7006 |
++ 0x03F, 0x0003D646, |
7007 |
+ 0x93000005, 0x00000000, 0x40000000, 0x00000000, |
7008 |
+- 0x03F, 0x00031E46, |
7009 |
++ 0x03F, 0x0003D646, |
7010 |
+ 0x93000006, 0x00000000, 0x40000000, 0x00000000, |
7011 |
+- 0x03F, 0x00031E46, |
7012 |
++ 0x03F, 0x0003D646, |
7013 |
+ 0x93000015, 0x00000000, 0x40000000, 0x00000000, |
7014 |
+- 0x03F, 0x00031E46, |
7015 |
++ 0x03F, 0x0003D646, |
7016 |
+ 0x93000016, 0x00000000, 0x40000000, 0x00000000, |
7017 |
+- 0x03F, 0x00031E46, |
7018 |
++ 0x03F, 0x0003D646, |
7019 |
+ 0x94000001, 0x00000000, 0x40000000, 0x00000000, |
7020 |
+- 0x03F, 0x00031E46, |
7021 |
++ 0x03F, 0x0003D646, |
7022 |
+ 0x94000002, 0x00000000, 0x40000000, 0x00000000, |
7023 |
+- 0x03F, 0x00031E46, |
7024 |
++ 0x03F, 0x0003D646, |
7025 |
+ 0x94000003, 0x00000000, 0x40000000, 0x00000000, |
7026 |
+- 0x03F, 0x00031E46, |
7027 |
++ 0x03F, 0x0003D646, |
7028 |
+ 0x94000004, 0x00000000, 0x40000000, 0x00000000, |
7029 |
+- 0x03F, 0x00031E46, |
7030 |
++ 0x03F, 0x0003D646, |
7031 |
+ 0x94000005, 0x00000000, 0x40000000, 0x00000000, |
7032 |
+- 0x03F, 0x00031E46, |
7033 |
++ 0x03F, 0x0003D646, |
7034 |
+ 0x94000006, 0x00000000, 0x40000000, 0x00000000, |
7035 |
+- 0x03F, 0x00031E46, |
7036 |
++ 0x03F, 0x0003D646, |
7037 |
+ 0x94000015, 0x00000000, 0x40000000, 0x00000000, |
7038 |
+- 0x03F, 0x00031E46, |
7039 |
++ 0x03F, 0x0003D646, |
7040 |
+ 0x94000016, 0x00000000, 0x40000000, 0x00000000, |
7041 |
+- 0x03F, 0x00031E46, |
7042 |
++ 0x03F, 0x0003D646, |
7043 |
+ 0x95000001, 0x00000000, 0x40000000, 0x00000000, |
7044 |
+- 0x03F, 0x00031E46, |
7045 |
++ 0x03F, 0x0003D646, |
7046 |
+ 0x95000002, 0x00000000, 0x40000000, 0x00000000, |
7047 |
+- 0x03F, 0x00031E46, |
7048 |
++ 0x03F, 0x0003D646, |
7049 |
+ 0x95000003, 0x00000000, 0x40000000, 0x00000000, |
7050 |
+- 0x03F, 0x00031E46, |
7051 |
++ 0x03F, 0x0003D646, |
7052 |
+ 0x95000004, 0x00000000, 0x40000000, 0x00000000, |
7053 |
+- 0x03F, 0x00031E46, |
7054 |
++ 0x03F, 0x0003D646, |
7055 |
+ 0x95000005, 0x00000000, 0x40000000, 0x00000000, |
7056 |
+- 0x03F, 0x00031E46, |
7057 |
++ 0x03F, 0x0003D646, |
7058 |
+ 0x95000006, 0x00000000, 0x40000000, 0x00000000, |
7059 |
+- 0x03F, 0x00031E46, |
7060 |
++ 0x03F, 0x0003D646, |
7061 |
+ 0x95000015, 0x00000000, 0x40000000, 0x00000000, |
7062 |
+- 0x03F, 0x00031E46, |
7063 |
++ 0x03F, 0x0003D646, |
7064 |
+ 0x95000016, 0x00000000, 0x40000000, 0x00000000, |
7065 |
+- 0x03F, 0x00031E46, |
7066 |
++ 0x03F, 0x0003D646, |
7067 |
+ 0xA0000000, 0x00000000, |
7068 |
+ 0x03F, 0x00002A46, |
7069 |
+ 0xB0000000, 0x00000000, |
7070 |
+@@ -19347,53 +19347,53 @@ static const u32 rtw8822c_rf_a[] = { |
7071 |
+ 0x92000002, 0x00000000, 0x40000000, 0x00000000, |
7072 |
+ 0x03F, 0x0000EA46, |
7073 |
+ 0x93000001, 0x00000000, 0x40000000, 0x00000000, |
7074 |
+- 0x03F, 0x00031E46, |
7075 |
++ 0x03F, 0x0003D646, |
7076 |
+ 0x93000002, 0x00000000, 0x40000000, 0x00000000, |
7077 |
+- 0x03F, 0x00031E46, |
7078 |
++ 0x03F, 0x0003D646, |
7079 |
+ 0x93000003, 0x00000000, 0x40000000, 0x00000000, |
7080 |
+- 0x03F, 0x00031E46, |
7081 |
++ 0x03F, 0x0003D646, |
7082 |
+ 0x93000004, 0x00000000, 0x40000000, 0x00000000, |
7083 |
+- 0x03F, 0x00031E46, |
7084 |
++ 0x03F, 0x0003D646, |
7085 |
+ 0x93000005, 0x00000000, 0x40000000, 0x00000000, |
7086 |
+- 0x03F, 0x00031E46, |
7087 |
++ 0x03F, 0x0003D646, |
7088 |
+ 0x93000006, 0x00000000, 0x40000000, 0x00000000, |
7089 |
+- 0x03F, 0x00031E46, |
7090 |
++ 0x03F, 0x0003D646, |
7091 |
+ 0x93000015, 0x00000000, 0x40000000, 0x00000000, |
7092 |
+- 0x03F, 0x00031E46, |
7093 |
++ 0x03F, 0x0003D646, |
7094 |
+ 0x93000016, 0x00000000, 0x40000000, 0x00000000, |
7095 |
+- 0x03F, 0x00031E46, |
7096 |
++ 0x03F, 0x0003D646, |
7097 |
+ 0x94000001, 0x00000000, 0x40000000, 0x00000000, |
7098 |
+- 0x03F, 0x00031E46, |
7099 |
++ 0x03F, 0x0003D646, |
7100 |
+ 0x94000002, 0x00000000, 0x40000000, 0x00000000, |
7101 |
+- 0x03F, 0x00031E46, |
7102 |
++ 0x03F, 0x0003D646, |
7103 |
+ 0x94000003, 0x00000000, 0x40000000, 0x00000000, |
7104 |
+- 0x03F, 0x00031E46, |
7105 |
++ 0x03F, 0x0003D646, |
7106 |
+ 0x94000004, 0x00000000, 0x40000000, 0x00000000, |
7107 |
+- 0x03F, 0x00031E46, |
7108 |
++ 0x03F, 0x0003D646, |
7109 |
+ 0x94000005, 0x00000000, 0x40000000, 0x00000000, |
7110 |
+- 0x03F, 0x00031E46, |
7111 |
++ 0x03F, 0x0003D646, |
7112 |
+ 0x94000006, 0x00000000, 0x40000000, 0x00000000, |
7113 |
+- 0x03F, 0x00031E46, |
7114 |
++ 0x03F, 0x0003D646, |
7115 |
+ 0x94000015, 0x00000000, 0x40000000, 0x00000000, |
7116 |
+- 0x03F, 0x00031E46, |
7117 |
++ 0x03F, 0x0003D646, |
7118 |
+ 0x94000016, 0x00000000, 0x40000000, 0x00000000, |
7119 |
+- 0x03F, 0x00031E46, |
7120 |
++ 0x03F, 0x0003D646, |
7121 |
+ 0x95000001, 0x00000000, 0x40000000, 0x00000000, |
7122 |
+- 0x03F, 0x00031E46, |
7123 |
++ 0x03F, 0x0003D646, |
7124 |
+ 0x95000002, 0x00000000, 0x40000000, 0x00000000, |
7125 |
+- 0x03F, 0x00031E46, |
7126 |
++ 0x03F, 0x0003D646, |
7127 |
+ 0x95000003, 0x00000000, 0x40000000, 0x00000000, |
7128 |
+- 0x03F, 0x00031E46, |
7129 |
++ 0x03F, 0x0003D646, |
7130 |
+ 0x95000004, 0x00000000, 0x40000000, 0x00000000, |
7131 |
+- 0x03F, 0x00031E46, |
7132 |
++ 0x03F, 0x0003D646, |
7133 |
+ 0x95000005, 0x00000000, 0x40000000, 0x00000000, |
7134 |
+- 0x03F, 0x00031E46, |
7135 |
++ 0x03F, 0x0003D646, |
7136 |
+ 0x95000006, 0x00000000, 0x40000000, 0x00000000, |
7137 |
+- 0x03F, 0x00031E46, |
7138 |
++ 0x03F, 0x0003D646, |
7139 |
+ 0x95000015, 0x00000000, 0x40000000, 0x00000000, |
7140 |
+- 0x03F, 0x00031E46, |
7141 |
++ 0x03F, 0x0003D646, |
7142 |
+ 0x95000016, 0x00000000, 0x40000000, 0x00000000, |
7143 |
+- 0x03F, 0x00031E46, |
7144 |
++ 0x03F, 0x0003D646, |
7145 |
+ 0xA0000000, 0x00000000, |
7146 |
+ 0x03F, 0x00002A46, |
7147 |
+ 0xB0000000, 0x00000000, |
7148 |
+@@ -19610,21 +19610,21 @@ static const u32 rtw8822c_rf_a[] = { |
7149 |
+ 0x033, 0x00000062, |
7150 |
+ 0x03F, 0x00000908, |
7151 |
+ 0x033, 0x00000063, |
7152 |
+- 0x03F, 0x00000D09, |
7153 |
++ 0x03F, 0x000008C8, |
7154 |
+ 0x033, 0x00000064, |
7155 |
+- 0x03F, 0x00000D49, |
7156 |
++ 0x03F, 0x000008CB, |
7157 |
+ 0x033, 0x00000065, |
7158 |
+- 0x03F, 0x00000D8A, |
7159 |
++ 0x03F, 0x000008CE, |
7160 |
+ 0x033, 0x00000066, |
7161 |
+- 0x03F, 0x00000DEB, |
7162 |
++ 0x03F, 0x000008D1, |
7163 |
+ 0x033, 0x00000067, |
7164 |
+- 0x03F, 0x00000DEE, |
7165 |
++ 0x03F, 0x000008D4, |
7166 |
+ 0x033, 0x00000068, |
7167 |
+- 0x03F, 0x00000DF1, |
7168 |
++ 0x03F, 0x00000DD1, |
7169 |
+ 0x033, 0x00000069, |
7170 |
+- 0x03F, 0x00000DF4, |
7171 |
++ 0x03F, 0x00000DD4, |
7172 |
+ 0x033, 0x0000006A, |
7173 |
+- 0x03F, 0x00000DF7, |
7174 |
++ 0x03F, 0x00000DD7, |
7175 |
+ 0x93000002, 0x00000000, 0x40000000, 0x00000000, |
7176 |
+ 0x033, 0x00000060, |
7177 |
+ 0x03F, 0x00000467, |
7178 |
+@@ -19633,21 +19633,21 @@ static const u32 rtw8822c_rf_a[] = { |
7179 |
+ 0x033, 0x00000062, |
7180 |
+ 0x03F, 0x00000908, |
7181 |
+ 0x033, 0x00000063, |
7182 |
+- 0x03F, 0x00000D09, |
7183 |
++ 0x03F, 0x000008C8, |
7184 |
+ 0x033, 0x00000064, |
7185 |
+- 0x03F, 0x00000D49, |
7186 |
++ 0x03F, 0x000008CB, |
7187 |
+ 0x033, 0x00000065, |
7188 |
+- 0x03F, 0x00000D8A, |
7189 |
++ 0x03F, 0x000008CE, |
7190 |
+ 0x033, 0x00000066, |
7191 |
+- 0x03F, 0x00000DEB, |
7192 |
++ 0x03F, 0x000008D1, |
7193 |
+ 0x033, 0x00000067, |
7194 |
+- 0x03F, 0x00000DEE, |
7195 |
++ 0x03F, 0x000008D4, |
7196 |
+ 0x033, 0x00000068, |
7197 |
+- 0x03F, 0x00000DF1, |
7198 |
++ 0x03F, 0x00000DD1, |
7199 |
+ 0x033, 0x00000069, |
7200 |
+- 0x03F, 0x00000DF4, |
7201 |
++ 0x03F, 0x00000DD4, |
7202 |
+ 0x033, 0x0000006A, |
7203 |
+- 0x03F, 0x00000DF7, |
7204 |
++ 0x03F, 0x00000DD7, |
7205 |
+ 0x93000003, 0x00000000, 0x40000000, 0x00000000, |
7206 |
+ 0x033, 0x00000060, |
7207 |
+ 0x03F, 0x00000467, |
7208 |
+@@ -19656,21 +19656,21 @@ static const u32 rtw8822c_rf_a[] = { |
7209 |
+ 0x033, 0x00000062, |
7210 |
+ 0x03F, 0x00000908, |
7211 |
+ 0x033, 0x00000063, |
7212 |
+- 0x03F, 0x00000D09, |
7213 |
++ 0x03F, 0x000008C8, |
7214 |
+ 0x033, 0x00000064, |
7215 |
+- 0x03F, 0x00000D49, |
7216 |
++ 0x03F, 0x000008CB, |
7217 |
+ 0x033, 0x00000065, |
7218 |
+- 0x03F, 0x00000D8A, |
7219 |
++ 0x03F, 0x000008CE, |
7220 |
+ 0x033, 0x00000066, |
7221 |
+- 0x03F, 0x00000DEB, |
7222 |
++ 0x03F, 0x000008D1, |
7223 |
+ 0x033, 0x00000067, |
7224 |
+- 0x03F, 0x00000DEE, |
7225 |
++ 0x03F, 0x000008D4, |
7226 |
+ 0x033, 0x00000068, |
7227 |
+- 0x03F, 0x00000DF1, |
7228 |
++ 0x03F, 0x00000DD1, |
7229 |
+ 0x033, 0x00000069, |
7230 |
+- 0x03F, 0x00000DF4, |
7231 |
++ 0x03F, 0x00000DD4, |
7232 |
+ 0x033, 0x0000006A, |
7233 |
+- 0x03F, 0x00000DF7, |
7234 |
++ 0x03F, 0x00000DD7, |
7235 |
+ 0x93000004, 0x00000000, 0x40000000, 0x00000000, |
7236 |
+ 0x033, 0x00000060, |
7237 |
+ 0x03F, 0x00000467, |
7238 |
+@@ -19679,21 +19679,21 @@ static const u32 rtw8822c_rf_a[] = { |
7239 |
+ 0x033, 0x00000062, |
7240 |
+ 0x03F, 0x00000908, |
7241 |
+ 0x033, 0x00000063, |
7242 |
+- 0x03F, 0x00000D09, |
7243 |
++ 0x03F, 0x000008C8, |
7244 |
+ 0x033, 0x00000064, |
7245 |
+- 0x03F, 0x00000D49, |
7246 |
++ 0x03F, 0x000008CB, |
7247 |
+ 0x033, 0x00000065, |
7248 |
+- 0x03F, 0x00000D8A, |
7249 |
++ 0x03F, 0x000008CE, |
7250 |
+ 0x033, 0x00000066, |
7251 |
+- 0x03F, 0x00000DEB, |
7252 |
++ 0x03F, 0x000008D1, |
7253 |
+ 0x033, 0x00000067, |
7254 |
+- 0x03F, 0x00000DEE, |
7255 |
++ 0x03F, 0x000008D4, |
7256 |
+ 0x033, 0x00000068, |
7257 |
+- 0x03F, 0x00000DF1, |
7258 |
++ 0x03F, 0x00000DD1, |
7259 |
+ 0x033, 0x00000069, |
7260 |
+- 0x03F, 0x00000DF4, |
7261 |
++ 0x03F, 0x00000DD4, |
7262 |
+ 0x033, 0x0000006A, |
7263 |
+- 0x03F, 0x00000DF7, |
7264 |
++ 0x03F, 0x00000DD7, |
7265 |
+ 0x93000005, 0x00000000, 0x40000000, 0x00000000, |
7266 |
+ 0x033, 0x00000060, |
7267 |
+ 0x03F, 0x00000467, |
7268 |
+@@ -19702,21 +19702,21 @@ static const u32 rtw8822c_rf_a[] = { |
7269 |
+ 0x033, 0x00000062, |
7270 |
+ 0x03F, 0x00000908, |
7271 |
+ 0x033, 0x00000063, |
7272 |
+- 0x03F, 0x00000D09, |
7273 |
++ 0x03F, 0x000008C8, |
7274 |
+ 0x033, 0x00000064, |
7275 |
+- 0x03F, 0x00000D49, |
7276 |
++ 0x03F, 0x000008CB, |
7277 |
+ 0x033, 0x00000065, |
7278 |
+- 0x03F, 0x00000D8A, |
7279 |
++ 0x03F, 0x000008CE, |
7280 |
+ 0x033, 0x00000066, |
7281 |
+- 0x03F, 0x00000DEB, |
7282 |
++ 0x03F, 0x000008D1, |
7283 |
+ 0x033, 0x00000067, |
7284 |
+- 0x03F, 0x00000DEE, |
7285 |
++ 0x03F, 0x000008D4, |
7286 |
+ 0x033, 0x00000068, |
7287 |
+- 0x03F, 0x00000DF1, |
7288 |
++ 0x03F, 0x00000DD1, |
7289 |
+ 0x033, 0x00000069, |
7290 |
+- 0x03F, 0x00000DF4, |
7291 |
++ 0x03F, 0x00000DD4, |
7292 |
+ 0x033, 0x0000006A, |
7293 |
+- 0x03F, 0x00000DF7, |
7294 |
++ 0x03F, 0x00000DD7, |
7295 |
+ 0x93000006, 0x00000000, 0x40000000, 0x00000000, |
7296 |
+ 0x033, 0x00000060, |
7297 |
+ 0x03F, 0x00000467, |
7298 |
+@@ -19725,21 +19725,21 @@ static const u32 rtw8822c_rf_a[] = { |
7299 |
+ 0x033, 0x00000062, |
7300 |
+ 0x03F, 0x00000908, |
7301 |
+ 0x033, 0x00000063, |
7302 |
+- 0x03F, 0x00000D09, |
7303 |
++ 0x03F, 0x000008C8, |
7304 |
+ 0x033, 0x00000064, |
7305 |
+- 0x03F, 0x00000D49, |
7306 |
++ 0x03F, 0x000008CB, |
7307 |
+ 0x033, 0x00000065, |
7308 |
+- 0x03F, 0x00000D8A, |
7309 |
++ 0x03F, 0x000008CE, |
7310 |
+ 0x033, 0x00000066, |
7311 |
+- 0x03F, 0x00000DEB, |
7312 |
++ 0x03F, 0x000008D1, |
7313 |
+ 0x033, 0x00000067, |
7314 |
+- 0x03F, 0x00000DEE, |
7315 |
++ 0x03F, 0x000008D4, |
7316 |
+ 0x033, 0x00000068, |
7317 |
+- 0x03F, 0x00000DF1, |
7318 |
++ 0x03F, 0x00000DD1, |
7319 |
+ 0x033, 0x00000069, |
7320 |
+- 0x03F, 0x00000DF4, |
7321 |
++ 0x03F, 0x00000DD4, |
7322 |
+ 0x033, 0x0000006A, |
7323 |
+- 0x03F, 0x00000DF7, |
7324 |
++ 0x03F, 0x00000DD7, |
7325 |
+ 0x93000015, 0x00000000, 0x40000000, 0x00000000, |
7326 |
+ 0x033, 0x00000060, |
7327 |
+ 0x03F, 0x00000467, |
7328 |
+@@ -19748,21 +19748,21 @@ static const u32 rtw8822c_rf_a[] = { |
7329 |
+ 0x033, 0x00000062, |
7330 |
+ 0x03F, 0x00000908, |
7331 |
+ 0x033, 0x00000063, |
7332 |
+- 0x03F, 0x00000D09, |
7333 |
++ 0x03F, 0x000008C8, |
7334 |
+ 0x033, 0x00000064, |
7335 |
+- 0x03F, 0x00000D49, |
7336 |
++ 0x03F, 0x000008CB, |
7337 |
+ 0x033, 0x00000065, |
7338 |
+- 0x03F, 0x00000D8A, |
7339 |
++ 0x03F, 0x000008CE, |
7340 |
+ 0x033, 0x00000066, |
7341 |
+- 0x03F, 0x00000DEB, |
7342 |
++ 0x03F, 0x000008D1, |
7343 |
+ 0x033, 0x00000067, |
7344 |
+- 0x03F, 0x00000DEE, |
7345 |
++ 0x03F, 0x000008D4, |
7346 |
+ 0x033, 0x00000068, |
7347 |
+- 0x03F, 0x00000DF1, |
7348 |
++ 0x03F, 0x00000DD1, |
7349 |
+ 0x033, 0x00000069, |
7350 |
+- 0x03F, 0x00000DF4, |
7351 |
++ 0x03F, 0x00000DD4, |
7352 |
+ 0x033, 0x0000006A, |
7353 |
+- 0x03F, 0x00000DF7, |
7354 |
++ 0x03F, 0x00000DD7, |
7355 |
+ 0x93000016, 0x00000000, 0x40000000, 0x00000000, |
7356 |
+ 0x033, 0x00000060, |
7357 |
+ 0x03F, 0x00000467, |
7358 |
+@@ -19771,21 +19771,21 @@ static const u32 rtw8822c_rf_a[] = { |
7359 |
+ 0x033, 0x00000062, |
7360 |
+ 0x03F, 0x00000908, |
7361 |
+ 0x033, 0x00000063, |
7362 |
+- 0x03F, 0x00000D09, |
7363 |
++ 0x03F, 0x000008C8, |
7364 |
+ 0x033, 0x00000064, |
7365 |
+- 0x03F, 0x00000D49, |
7366 |
++ 0x03F, 0x000008CB, |
7367 |
+ 0x033, 0x00000065, |
7368 |
+- 0x03F, 0x00000D8A, |
7369 |
++ 0x03F, 0x000008CE, |
7370 |
+ 0x033, 0x00000066, |
7371 |
+- 0x03F, 0x00000DEB, |
7372 |
++ 0x03F, 0x000008D1, |
7373 |
+ 0x033, 0x00000067, |
7374 |
+- 0x03F, 0x00000DEE, |
7375 |
++ 0x03F, 0x000008D4, |
7376 |
+ 0x033, 0x00000068, |
7377 |
+- 0x03F, 0x00000DF1, |
7378 |
++ 0x03F, 0x00000DD1, |
7379 |
+ 0x033, 0x00000069, |
7380 |
+- 0x03F, 0x00000DF4, |
7381 |
++ 0x03F, 0x00000DD4, |
7382 |
+ 0x033, 0x0000006A, |
7383 |
+- 0x03F, 0x00000DF7, |
7384 |
++ 0x03F, 0x00000DD7, |
7385 |
+ 0x94000001, 0x00000000, 0x40000000, 0x00000000, |
7386 |
+ 0x033, 0x00000060, |
7387 |
+ 0x03F, 0x00000467, |
7388 |
+@@ -19794,21 +19794,21 @@ static const u32 rtw8822c_rf_a[] = { |
7389 |
+ 0x033, 0x00000062, |
7390 |
+ 0x03F, 0x00000908, |
7391 |
+ 0x033, 0x00000063, |
7392 |
+- 0x03F, 0x00000D09, |
7393 |
++ 0x03F, 0x000008C8, |
7394 |
+ 0x033, 0x00000064, |
7395 |
+- 0x03F, 0x00000D49, |
7396 |
++ 0x03F, 0x000008CB, |
7397 |
+ 0x033, 0x00000065, |
7398 |
+- 0x03F, 0x00000D8A, |
7399 |
++ 0x03F, 0x000008CE, |
7400 |
+ 0x033, 0x00000066, |
7401 |
+- 0x03F, 0x00000DEB, |
7402 |
++ 0x03F, 0x000008D1, |
7403 |
+ 0x033, 0x00000067, |
7404 |
+- 0x03F, 0x00000DEE, |
7405 |
++ 0x03F, 0x000008D4, |
7406 |
+ 0x033, 0x00000068, |
7407 |
+- 0x03F, 0x00000DF1, |
7408 |
++ 0x03F, 0x00000DD1, |
7409 |
+ 0x033, 0x00000069, |
7410 |
+- 0x03F, 0x00000DF4, |
7411 |
++ 0x03F, 0x00000DD4, |
7412 |
+ 0x033, 0x0000006A, |
7413 |
+- 0x03F, 0x00000DF7, |
7414 |
++ 0x03F, 0x00000DD7, |
7415 |
+ 0x94000002, 0x00000000, 0x40000000, 0x00000000, |
7416 |
+ 0x033, 0x00000060, |
7417 |
+ 0x03F, 0x00000467, |
7418 |
+@@ -19817,21 +19817,21 @@ static const u32 rtw8822c_rf_a[] = { |
7419 |
+ 0x033, 0x00000062, |
7420 |
+ 0x03F, 0x00000908, |
7421 |
+ 0x033, 0x00000063, |
7422 |
+- 0x03F, 0x00000D09, |
7423 |
++ 0x03F, 0x000008C8, |
7424 |
+ 0x033, 0x00000064, |
7425 |
+- 0x03F, 0x00000D49, |
7426 |
++ 0x03F, 0x000008CB, |
7427 |
+ 0x033, 0x00000065, |
7428 |
+- 0x03F, 0x00000D8A, |
7429 |
++ 0x03F, 0x000008CE, |
7430 |
+ 0x033, 0x00000066, |
7431 |
+- 0x03F, 0x00000DEB, |
7432 |
++ 0x03F, 0x000008D1, |
7433 |
+ 0x033, 0x00000067, |
7434 |
+- 0x03F, 0x00000DEE, |
7435 |
++ 0x03F, 0x000008D4, |
7436 |
+ 0x033, 0x00000068, |
7437 |
+- 0x03F, 0x00000DF1, |
7438 |
++ 0x03F, 0x00000DD1, |
7439 |
+ 0x033, 0x00000069, |
7440 |
+- 0x03F, 0x00000DF4, |
7441 |
++ 0x03F, 0x00000DD4, |
7442 |
+ 0x033, 0x0000006A, |
7443 |
+- 0x03F, 0x00000DF7, |
7444 |
++ 0x03F, 0x00000DD7, |
7445 |
+ 0x94000003, 0x00000000, 0x40000000, 0x00000000, |
7446 |
+ 0x033, 0x00000060, |
7447 |
+ 0x03F, 0x00000467, |
7448 |
+@@ -19840,21 +19840,21 @@ static const u32 rtw8822c_rf_a[] = { |
7449 |
+ 0x033, 0x00000062, |
7450 |
+ 0x03F, 0x00000908, |
7451 |
+ 0x033, 0x00000063, |
7452 |
+- 0x03F, 0x00000D09, |
7453 |
++ 0x03F, 0x000008C8, |
7454 |
+ 0x033, 0x00000064, |
7455 |
+- 0x03F, 0x00000D49, |
7456 |
++ 0x03F, 0x000008CB, |
7457 |
+ 0x033, 0x00000065, |
7458 |
+- 0x03F, 0x00000D8A, |
7459 |
++ 0x03F, 0x000008CE, |
7460 |
+ 0x033, 0x00000066, |
7461 |
+- 0x03F, 0x00000DEB, |
7462 |
++ 0x03F, 0x000008D1, |
7463 |
+ 0x033, 0x00000067, |
7464 |
+- 0x03F, 0x00000DEE, |
7465 |
++ 0x03F, 0x000008D4, |
7466 |
+ 0x033, 0x00000068, |
7467 |
+- 0x03F, 0x00000DF1, |
7468 |
++ 0x03F, 0x00000DD1, |
7469 |
+ 0x033, 0x00000069, |
7470 |
+- 0x03F, 0x00000DF4, |
7471 |
++ 0x03F, 0x00000DD4, |
7472 |
+ 0x033, 0x0000006A, |
7473 |
+- 0x03F, 0x00000DF7, |
7474 |
++ 0x03F, 0x00000DD7, |
7475 |
+ 0x94000004, 0x00000000, 0x40000000, 0x00000000, |
7476 |
+ 0x033, 0x00000060, |
7477 |
+ 0x03F, 0x00000467, |
7478 |
+@@ -19863,21 +19863,21 @@ static const u32 rtw8822c_rf_a[] = { |
7479 |
+ 0x033, 0x00000062, |
7480 |
+ 0x03F, 0x00000908, |
7481 |
+ 0x033, 0x00000063, |
7482 |
+- 0x03F, 0x00000D09, |
7483 |
++ 0x03F, 0x000008C8, |
7484 |
+ 0x033, 0x00000064, |
7485 |
+- 0x03F, 0x00000D49, |
7486 |
++ 0x03F, 0x000008CB, |
7487 |
+ 0x033, 0x00000065, |
7488 |
+- 0x03F, 0x00000D8A, |
7489 |
++ 0x03F, 0x000008CE, |
7490 |
+ 0x033, 0x00000066, |
7491 |
+- 0x03F, 0x00000DEB, |
7492 |
++ 0x03F, 0x000008D1, |
7493 |
+ 0x033, 0x00000067, |
7494 |
+- 0x03F, 0x00000DEE, |
7495 |
++ 0x03F, 0x000008D4, |
7496 |
+ 0x033, 0x00000068, |
7497 |
+- 0x03F, 0x00000DF1, |
7498 |
++ 0x03F, 0x00000DD1, |
7499 |
+ 0x033, 0x00000069, |
7500 |
+- 0x03F, 0x00000DF4, |
7501 |
++ 0x03F, 0x00000DD4, |
7502 |
+ 0x033, 0x0000006A, |
7503 |
+- 0x03F, 0x00000DF7, |
7504 |
++ 0x03F, 0x00000DD7, |
7505 |
+ 0x94000005, 0x00000000, 0x40000000, 0x00000000, |
7506 |
+ 0x033, 0x00000060, |
7507 |
+ 0x03F, 0x00000467, |
7508 |
+@@ -19886,21 +19886,21 @@ static const u32 rtw8822c_rf_a[] = { |
7509 |
+ 0x033, 0x00000062, |
7510 |
+ 0x03F, 0x00000908, |
7511 |
+ 0x033, 0x00000063, |
7512 |
+- 0x03F, 0x00000D09, |
7513 |
++ 0x03F, 0x000008C8, |
7514 |
+ 0x033, 0x00000064, |
7515 |
+- 0x03F, 0x00000D49, |
7516 |
++ 0x03F, 0x000008CB, |
7517 |
+ 0x033, 0x00000065, |
7518 |
+- 0x03F, 0x00000D8A, |
7519 |
++ 0x03F, 0x000008CE, |
7520 |
+ 0x033, 0x00000066, |
7521 |
+- 0x03F, 0x00000DEB, |
7522 |
++ 0x03F, 0x000008D1, |
7523 |
+ 0x033, 0x00000067, |
7524 |
+- 0x03F, 0x00000DEE, |
7525 |
++ 0x03F, 0x000008D4, |
7526 |
+ 0x033, 0x00000068, |
7527 |
+- 0x03F, 0x00000DF1, |
7528 |
++ 0x03F, 0x00000DD1, |
7529 |
+ 0x033, 0x00000069, |
7530 |
+- 0x03F, 0x00000DF4, |
7531 |
++ 0x03F, 0x00000DD4, |
7532 |
+ 0x033, 0x0000006A, |
7533 |
+- 0x03F, 0x00000DF7, |
7534 |
++ 0x03F, 0x00000DD7, |
7535 |
+ 0x94000006, 0x00000000, 0x40000000, 0x00000000, |
7536 |
+ 0x033, 0x00000060, |
7537 |
+ 0x03F, 0x00000467, |
7538 |
+@@ -19909,21 +19909,21 @@ static const u32 rtw8822c_rf_a[] = { |
7539 |
+ 0x033, 0x00000062, |
7540 |
+ 0x03F, 0x00000908, |
7541 |
+ 0x033, 0x00000063, |
7542 |
+- 0x03F, 0x00000D09, |
7543 |
++ 0x03F, 0x000008C8, |
7544 |
+ 0x033, 0x00000064, |
7545 |
+- 0x03F, 0x00000D49, |
7546 |
++ 0x03F, 0x000008CB, |
7547 |
+ 0x033, 0x00000065, |
7548 |
+- 0x03F, 0x00000D8A, |
7549 |
++ 0x03F, 0x000008CE, |
7550 |
+ 0x033, 0x00000066, |
7551 |
+- 0x03F, 0x00000DEB, |
7552 |
++ 0x03F, 0x000008D1, |
7553 |
+ 0x033, 0x00000067, |
7554 |
+- 0x03F, 0x00000DEE, |
7555 |
++ 0x03F, 0x000008D4, |
7556 |
+ 0x033, 0x00000068, |
7557 |
+- 0x03F, 0x00000DF1, |
7558 |
++ 0x03F, 0x00000DD1, |
7559 |
+ 0x033, 0x00000069, |
7560 |
+- 0x03F, 0x00000DF4, |
7561 |
++ 0x03F, 0x00000DD4, |
7562 |
+ 0x033, 0x0000006A, |
7563 |
+- 0x03F, 0x00000DF7, |
7564 |
++ 0x03F, 0x00000DD7, |
7565 |
+ 0x94000015, 0x00000000, 0x40000000, 0x00000000, |
7566 |
+ 0x033, 0x00000060, |
7567 |
+ 0x03F, 0x00000467, |
7568 |
+@@ -19932,21 +19932,21 @@ static const u32 rtw8822c_rf_a[] = { |
7569 |
+ 0x033, 0x00000062, |
7570 |
+ 0x03F, 0x00000908, |
7571 |
+ 0x033, 0x00000063, |
7572 |
+- 0x03F, 0x00000D09, |
7573 |
++ 0x03F, 0x000008C8, |
7574 |
+ 0x033, 0x00000064, |
7575 |
+- 0x03F, 0x00000D49, |
7576 |
++ 0x03F, 0x000008CB, |
7577 |
+ 0x033, 0x00000065, |
7578 |
+- 0x03F, 0x00000D8A, |
7579 |
++ 0x03F, 0x000008CE, |
7580 |
+ 0x033, 0x00000066, |
7581 |
+- 0x03F, 0x00000DEB, |
7582 |
++ 0x03F, 0x000008D1, |
7583 |
+ 0x033, 0x00000067, |
7584 |
+- 0x03F, 0x00000DEE, |
7585 |
++ 0x03F, 0x000008D4, |
7586 |
+ 0x033, 0x00000068, |
7587 |
+- 0x03F, 0x00000DF1, |
7588 |
++ 0x03F, 0x00000DD1, |
7589 |
+ 0x033, 0x00000069, |
7590 |
+- 0x03F, 0x00000DF4, |
7591 |
++ 0x03F, 0x00000DD4, |
7592 |
+ 0x033, 0x0000006A, |
7593 |
+- 0x03F, 0x00000DF7, |
7594 |
++ 0x03F, 0x00000DD7, |
7595 |
+ 0x94000016, 0x00000000, 0x40000000, 0x00000000, |
7596 |
+ 0x033, 0x00000060, |
7597 |
+ 0x03F, 0x00000467, |
7598 |
+@@ -19955,21 +19955,21 @@ static const u32 rtw8822c_rf_a[] = { |
7599 |
+ 0x033, 0x00000062, |
7600 |
+ 0x03F, 0x00000908, |
7601 |
+ 0x033, 0x00000063, |
7602 |
+- 0x03F, 0x00000D09, |
7603 |
++ 0x03F, 0x000008C8, |
7604 |
+ 0x033, 0x00000064, |
7605 |
+- 0x03F, 0x00000D49, |
7606 |
++ 0x03F, 0x000008CB, |
7607 |
+ 0x033, 0x00000065, |
7608 |
+- 0x03F, 0x00000D8A, |
7609 |
++ 0x03F, 0x000008CE, |
7610 |
+ 0x033, 0x00000066, |
7611 |
+- 0x03F, 0x00000DEB, |
7612 |
++ 0x03F, 0x000008D1, |
7613 |
+ 0x033, 0x00000067, |
7614 |
+- 0x03F, 0x00000DEE, |
7615 |
++ 0x03F, 0x000008D4, |
7616 |
+ 0x033, 0x00000068, |
7617 |
+- 0x03F, 0x00000DF1, |
7618 |
++ 0x03F, 0x00000DD1, |
7619 |
+ 0x033, 0x00000069, |
7620 |
+- 0x03F, 0x00000DF4, |
7621 |
++ 0x03F, 0x00000DD4, |
7622 |
+ 0x033, 0x0000006A, |
7623 |
+- 0x03F, 0x00000DF7, |
7624 |
++ 0x03F, 0x00000DD7, |
7625 |
+ 0x95000001, 0x00000000, 0x40000000, 0x00000000, |
7626 |
+ 0x033, 0x00000060, |
7627 |
+ 0x03F, 0x00000467, |
7628 |
+@@ -19978,21 +19978,21 @@ static const u32 rtw8822c_rf_a[] = { |
7629 |
+ 0x033, 0x00000062, |
7630 |
+ 0x03F, 0x00000908, |
7631 |
+ 0x033, 0x00000063, |
7632 |
+- 0x03F, 0x00000D09, |
7633 |
++ 0x03F, 0x000008C8, |
7634 |
+ 0x033, 0x00000064, |
7635 |
+- 0x03F, 0x00000D49, |
7636 |
++ 0x03F, 0x000008CB, |
7637 |
+ 0x033, 0x00000065, |
7638 |
+- 0x03F, 0x00000D8A, |
7639 |
++ 0x03F, 0x000008CE, |
7640 |
+ 0x033, 0x00000066, |
7641 |
+- 0x03F, 0x00000DEB, |
7642 |
++ 0x03F, 0x000008D1, |
7643 |
+ 0x033, 0x00000067, |
7644 |
+- 0x03F, 0x00000DEE, |
7645 |
++ 0x03F, 0x000008D4, |
7646 |
+ 0x033, 0x00000068, |
7647 |
+- 0x03F, 0x00000DF1, |
7648 |
++ 0x03F, 0x00000DD1, |
7649 |
+ 0x033, 0x00000069, |
7650 |
+- 0x03F, 0x00000DF4, |
7651 |
++ 0x03F, 0x00000DD4, |
7652 |
+ 0x033, 0x0000006A, |
7653 |
+- 0x03F, 0x00000DF7, |
7654 |
++ 0x03F, 0x00000DD7, |
7655 |
+ 0x95000002, 0x00000000, 0x40000000, 0x00000000, |
7656 |
+ 0x033, 0x00000060, |
7657 |
+ 0x03F, 0x00000467, |
7658 |
+@@ -20001,21 +20001,21 @@ static const u32 rtw8822c_rf_a[] = { |
7659 |
+ 0x033, 0x00000062, |
7660 |
+ 0x03F, 0x00000908, |
7661 |
+ 0x033, 0x00000063, |
7662 |
+- 0x03F, 0x00000D09, |
7663 |
++ 0x03F, 0x000008C8, |
7664 |
+ 0x033, 0x00000064, |
7665 |
+- 0x03F, 0x00000D49, |
7666 |
++ 0x03F, 0x000008CB, |
7667 |
+ 0x033, 0x00000065, |
7668 |
+- 0x03F, 0x00000D8A, |
7669 |
++ 0x03F, 0x000008CE, |
7670 |
+ 0x033, 0x00000066, |
7671 |
+- 0x03F, 0x00000DEB, |
7672 |
++ 0x03F, 0x000008D1, |
7673 |
+ 0x033, 0x00000067, |
7674 |
+- 0x03F, 0x00000DEE, |
7675 |
++ 0x03F, 0x000008D4, |
7676 |
+ 0x033, 0x00000068, |
7677 |
+- 0x03F, 0x00000DF1, |
7678 |
++ 0x03F, 0x00000DD1, |
7679 |
+ 0x033, 0x00000069, |
7680 |
+- 0x03F, 0x00000DF4, |
7681 |
++ 0x03F, 0x00000DD4, |
7682 |
+ 0x033, 0x0000006A, |
7683 |
+- 0x03F, 0x00000DF7, |
7684 |
++ 0x03F, 0x00000DD7, |
7685 |
+ 0x95000003, 0x00000000, 0x40000000, 0x00000000, |
7686 |
+ 0x033, 0x00000060, |
7687 |
+ 0x03F, 0x00000467, |
7688 |
+@@ -20024,21 +20024,21 @@ static const u32 rtw8822c_rf_a[] = { |
7689 |
+ 0x033, 0x00000062, |
7690 |
+ 0x03F, 0x00000908, |
7691 |
+ 0x033, 0x00000063, |
7692 |
+- 0x03F, 0x00000D09, |
7693 |
++ 0x03F, 0x000008C8, |
7694 |
+ 0x033, 0x00000064, |
7695 |
+- 0x03F, 0x00000D49, |
7696 |
++ 0x03F, 0x000008CB, |
7697 |
+ 0x033, 0x00000065, |
7698 |
+- 0x03F, 0x00000D8A, |
7699 |
++ 0x03F, 0x000008CE, |
7700 |
+ 0x033, 0x00000066, |
7701 |
+- 0x03F, 0x00000DEB, |
7702 |
++ 0x03F, 0x000008D1, |
7703 |
+ 0x033, 0x00000067, |
7704 |
+- 0x03F, 0x00000DEE, |
7705 |
++ 0x03F, 0x000008D4, |
7706 |
+ 0x033, 0x00000068, |
7707 |
+- 0x03F, 0x00000DF1, |
7708 |
++ 0x03F, 0x00000DD1, |
7709 |
+ 0x033, 0x00000069, |
7710 |
+- 0x03F, 0x00000DF4, |
7711 |
++ 0x03F, 0x00000DD4, |
7712 |
+ 0x033, 0x0000006A, |
7713 |
+- 0x03F, 0x00000DF7, |
7714 |
++ 0x03F, 0x00000DD7, |
7715 |
+ 0x95000004, 0x00000000, 0x40000000, 0x00000000, |
7716 |
+ 0x033, 0x00000060, |
7717 |
+ 0x03F, 0x00000467, |
7718 |
+@@ -20047,21 +20047,21 @@ static const u32 rtw8822c_rf_a[] = { |
7719 |
+ 0x033, 0x00000062, |
7720 |
+ 0x03F, 0x00000908, |
7721 |
+ 0x033, 0x00000063, |
7722 |
+- 0x03F, 0x00000D09, |
7723 |
++ 0x03F, 0x000008C8, |
7724 |
+ 0x033, 0x00000064, |
7725 |
+- 0x03F, 0x00000D49, |
7726 |
++ 0x03F, 0x000008CB, |
7727 |
+ 0x033, 0x00000065, |
7728 |
+- 0x03F, 0x00000D8A, |
7729 |
++ 0x03F, 0x000008CE, |
7730 |
+ 0x033, 0x00000066, |
7731 |
+- 0x03F, 0x00000DEB, |
7732 |
++ 0x03F, 0x000008D1, |
7733 |
+ 0x033, 0x00000067, |
7734 |
+- 0x03F, 0x00000DEE, |
7735 |
++ 0x03F, 0x000008D4, |
7736 |
+ 0x033, 0x00000068, |
7737 |
+- 0x03F, 0x00000DF1, |
7738 |
++ 0x03F, 0x00000DD1, |
7739 |
+ 0x033, 0x00000069, |
7740 |
+- 0x03F, 0x00000DF4, |
7741 |
++ 0x03F, 0x00000DD4, |
7742 |
+ 0x033, 0x0000006A, |
7743 |
+- 0x03F, 0x00000DF7, |
7744 |
++ 0x03F, 0x00000DD7, |
7745 |
+ 0x95000005, 0x00000000, 0x40000000, 0x00000000, |
7746 |
+ 0x033, 0x00000060, |
7747 |
+ 0x03F, 0x00000467, |
7748 |
+@@ -20070,21 +20070,21 @@ static const u32 rtw8822c_rf_a[] = { |
7749 |
+ 0x033, 0x00000062, |
7750 |
+ 0x03F, 0x00000908, |
7751 |
+ 0x033, 0x00000063, |
7752 |
+- 0x03F, 0x00000D09, |
7753 |
++ 0x03F, 0x000008C8, |
7754 |
+ 0x033, 0x00000064, |
7755 |
+- 0x03F, 0x00000D49, |
7756 |
++ 0x03F, 0x000008CB, |
7757 |
+ 0x033, 0x00000065, |
7758 |
+- 0x03F, 0x00000D8A, |
7759 |
++ 0x03F, 0x000008CE, |
7760 |
+ 0x033, 0x00000066, |
7761 |
+- 0x03F, 0x00000DEB, |
7762 |
++ 0x03F, 0x000008D1, |
7763 |
+ 0x033, 0x00000067, |
7764 |
+- 0x03F, 0x00000DEE, |
7765 |
++ 0x03F, 0x000008D4, |
7766 |
+ 0x033, 0x00000068, |
7767 |
+- 0x03F, 0x00000DF1, |
7768 |
++ 0x03F, 0x00000DD1, |
7769 |
+ 0x033, 0x00000069, |
7770 |
+- 0x03F, 0x00000DF4, |
7771 |
++ 0x03F, 0x00000DD4, |
7772 |
+ 0x033, 0x0000006A, |
7773 |
+- 0x03F, 0x00000DF7, |
7774 |
++ 0x03F, 0x00000DD7, |
7775 |
+ 0x95000006, 0x00000000, 0x40000000, 0x00000000, |
7776 |
+ 0x033, 0x00000060, |
7777 |
+ 0x03F, 0x00000467, |
7778 |
+@@ -20093,21 +20093,21 @@ static const u32 rtw8822c_rf_a[] = { |
7779 |
+ 0x033, 0x00000062, |
7780 |
+ 0x03F, 0x00000908, |
7781 |
+ 0x033, 0x00000063, |
7782 |
+- 0x03F, 0x00000D09, |
7783 |
++ 0x03F, 0x000008C8, |
7784 |
+ 0x033, 0x00000064, |
7785 |
+- 0x03F, 0x00000D49, |
7786 |
++ 0x03F, 0x000008CB, |
7787 |
+ 0x033, 0x00000065, |
7788 |
+- 0x03F, 0x00000D8A, |
7789 |
++ 0x03F, 0x000008CE, |
7790 |
+ 0x033, 0x00000066, |
7791 |
+- 0x03F, 0x00000DEB, |
7792 |
++ 0x03F, 0x000008D1, |
7793 |
+ 0x033, 0x00000067, |
7794 |
+- 0x03F, 0x00000DEE, |
7795 |
++ 0x03F, 0x000008D4, |
7796 |
+ 0x033, 0x00000068, |
7797 |
+- 0x03F, 0x00000DF1, |
7798 |
++ 0x03F, 0x00000DD1, |
7799 |
+ 0x033, 0x00000069, |
7800 |
+- 0x03F, 0x00000DF4, |
7801 |
++ 0x03F, 0x00000DD4, |
7802 |
+ 0x033, 0x0000006A, |
7803 |
+- 0x03F, 0x00000DF7, |
7804 |
++ 0x03F, 0x00000DD7, |
7805 |
+ 0x95000015, 0x00000000, 0x40000000, 0x00000000, |
7806 |
+ 0x033, 0x00000060, |
7807 |
+ 0x03F, 0x00000467, |
7808 |
+@@ -20116,21 +20116,21 @@ static const u32 rtw8822c_rf_a[] = { |
7809 |
+ 0x033, 0x00000062, |
7810 |
+ 0x03F, 0x00000908, |
7811 |
+ 0x033, 0x00000063, |
7812 |
+- 0x03F, 0x00000D09, |
7813 |
++ 0x03F, 0x000008C8, |
7814 |
+ 0x033, 0x00000064, |
7815 |
+- 0x03F, 0x00000D49, |
7816 |
++ 0x03F, 0x000008CB, |
7817 |
+ 0x033, 0x00000065, |
7818 |
+- 0x03F, 0x00000D8A, |
7819 |
++ 0x03F, 0x000008CE, |
7820 |
+ 0x033, 0x00000066, |
7821 |
+- 0x03F, 0x00000DEB, |
7822 |
++ 0x03F, 0x000008D1, |
7823 |
+ 0x033, 0x00000067, |
7824 |
+- 0x03F, 0x00000DEE, |
7825 |
++ 0x03F, 0x000008D4, |
7826 |
+ 0x033, 0x00000068, |
7827 |
+- 0x03F, 0x00000DF1, |
7828 |
++ 0x03F, 0x00000DD1, |
7829 |
+ 0x033, 0x00000069, |
7830 |
+- 0x03F, 0x00000DF4, |
7831 |
++ 0x03F, 0x00000DD4, |
7832 |
+ 0x033, 0x0000006A, |
7833 |
+- 0x03F, 0x00000DF7, |
7834 |
++ 0x03F, 0x00000DD7, |
7835 |
+ 0x95000016, 0x00000000, 0x40000000, 0x00000000, |
7836 |
+ 0x033, 0x00000060, |
7837 |
+ 0x03F, 0x00000467, |
7838 |
+@@ -20139,21 +20139,21 @@ static const u32 rtw8822c_rf_a[] = { |
7839 |
+ 0x033, 0x00000062, |
7840 |
+ 0x03F, 0x00000908, |
7841 |
+ 0x033, 0x00000063, |
7842 |
+- 0x03F, 0x00000D09, |
7843 |
++ 0x03F, 0x000008C8, |
7844 |
+ 0x033, 0x00000064, |
7845 |
+- 0x03F, 0x00000D49, |
7846 |
++ 0x03F, 0x000008CB, |
7847 |
+ 0x033, 0x00000065, |
7848 |
+- 0x03F, 0x00000D8A, |
7849 |
++ 0x03F, 0x000008CE, |
7850 |
+ 0x033, 0x00000066, |
7851 |
+- 0x03F, 0x00000DEB, |
7852 |
++ 0x03F, 0x000008D1, |
7853 |
+ 0x033, 0x00000067, |
7854 |
+- 0x03F, 0x00000DEE, |
7855 |
++ 0x03F, 0x000008D4, |
7856 |
+ 0x033, 0x00000068, |
7857 |
+- 0x03F, 0x00000DF1, |
7858 |
++ 0x03F, 0x00000DD1, |
7859 |
+ 0x033, 0x00000069, |
7860 |
+- 0x03F, 0x00000DF4, |
7861 |
++ 0x03F, 0x00000DD4, |
7862 |
+ 0x033, 0x0000006A, |
7863 |
+- 0x03F, 0x00000DF7, |
7864 |
++ 0x03F, 0x00000DD7, |
7865 |
+ 0xA0000000, 0x00000000, |
7866 |
+ 0x033, 0x00000060, |
7867 |
+ 0x03F, 0x00000487, |
7868 |
+@@ -38484,21 +38484,21 @@ static const u32 rtw8822c_rf_b[] = { |
7869 |
+ 0x033, 0x00000062, |
7870 |
+ 0x03F, 0x00000908, |
7871 |
+ 0x033, 0x00000063, |
7872 |
+- 0x03F, 0x00000D09, |
7873 |
++ 0x03F, 0x00000CC6, |
7874 |
+ 0x033, 0x00000064, |
7875 |
+- 0x03F, 0x00000D49, |
7876 |
++ 0x03F, 0x00000CC9, |
7877 |
+ 0x033, 0x00000065, |
7878 |
+- 0x03F, 0x00000D8A, |
7879 |
++ 0x03F, 0x00000CCC, |
7880 |
+ 0x033, 0x00000066, |
7881 |
+- 0x03F, 0x00000DEB, |
7882 |
++ 0x03F, 0x00000CCF, |
7883 |
+ 0x033, 0x00000067, |
7884 |
+- 0x03F, 0x00000DEE, |
7885 |
++ 0x03F, 0x00000CD2, |
7886 |
+ 0x033, 0x00000068, |
7887 |
+- 0x03F, 0x00000DF1, |
7888 |
++ 0x03F, 0x00000CD5, |
7889 |
+ 0x033, 0x00000069, |
7890 |
+- 0x03F, 0x00000DF4, |
7891 |
++ 0x03F, 0x00000DD4, |
7892 |
+ 0x033, 0x0000006A, |
7893 |
+- 0x03F, 0x00000DF7, |
7894 |
++ 0x03F, 0x00000DD7, |
7895 |
+ 0x93000002, 0x00000000, 0x40000000, 0x00000000, |
7896 |
+ 0x033, 0x00000060, |
7897 |
+ 0x03F, 0x00000467, |
7898 |
+@@ -38507,21 +38507,21 @@ static const u32 rtw8822c_rf_b[] = { |
7899 |
+ 0x033, 0x00000062, |
7900 |
+ 0x03F, 0x00000908, |
7901 |
+ 0x033, 0x00000063, |
7902 |
+- 0x03F, 0x00000D09, |
7903 |
++ 0x03F, 0x00000CC6, |
7904 |
+ 0x033, 0x00000064, |
7905 |
+- 0x03F, 0x00000D49, |
7906 |
++ 0x03F, 0x00000CC9, |
7907 |
+ 0x033, 0x00000065, |
7908 |
+- 0x03F, 0x00000D8A, |
7909 |
++ 0x03F, 0x00000CCC, |
7910 |
+ 0x033, 0x00000066, |
7911 |
+- 0x03F, 0x00000DEB, |
7912 |
++ 0x03F, 0x00000CCF, |
7913 |
+ 0x033, 0x00000067, |
7914 |
+- 0x03F, 0x00000DEE, |
7915 |
++ 0x03F, 0x00000CD2, |
7916 |
+ 0x033, 0x00000068, |
7917 |
+- 0x03F, 0x00000DF1, |
7918 |
++ 0x03F, 0x00000CD5, |
7919 |
+ 0x033, 0x00000069, |
7920 |
+- 0x03F, 0x00000DF4, |
7921 |
++ 0x03F, 0x00000DD4, |
7922 |
+ 0x033, 0x0000006A, |
7923 |
+- 0x03F, 0x00000DF7, |
7924 |
++ 0x03F, 0x00000DD7, |
7925 |
+ 0x93000003, 0x00000000, 0x40000000, 0x00000000, |
7926 |
+ 0x033, 0x00000060, |
7927 |
+ 0x03F, 0x00000467, |
7928 |
+@@ -38530,21 +38530,21 @@ static const u32 rtw8822c_rf_b[] = { |
7929 |
+ 0x033, 0x00000062, |
7930 |
+ 0x03F, 0x00000908, |
7931 |
+ 0x033, 0x00000063, |
7932 |
+- 0x03F, 0x00000D09, |
7933 |
++ 0x03F, 0x00000CC6, |
7934 |
+ 0x033, 0x00000064, |
7935 |
+- 0x03F, 0x00000D49, |
7936 |
++ 0x03F, 0x00000CC9, |
7937 |
+ 0x033, 0x00000065, |
7938 |
+- 0x03F, 0x00000D8A, |
7939 |
++ 0x03F, 0x00000CCC, |
7940 |
+ 0x033, 0x00000066, |
7941 |
+- 0x03F, 0x00000DEB, |
7942 |
++ 0x03F, 0x00000CCF, |
7943 |
+ 0x033, 0x00000067, |
7944 |
+- 0x03F, 0x00000DEE, |
7945 |
++ 0x03F, 0x00000CD2, |
7946 |
+ 0x033, 0x00000068, |
7947 |
+- 0x03F, 0x00000DF1, |
7948 |
++ 0x03F, 0x00000CD5, |
7949 |
+ 0x033, 0x00000069, |
7950 |
+- 0x03F, 0x00000DF4, |
7951 |
++ 0x03F, 0x00000DD4, |
7952 |
+ 0x033, 0x0000006A, |
7953 |
+- 0x03F, 0x00000DF7, |
7954 |
++ 0x03F, 0x00000DD7, |
7955 |
+ 0x93000004, 0x00000000, 0x40000000, 0x00000000, |
7956 |
+ 0x033, 0x00000060, |
7957 |
+ 0x03F, 0x00000467, |
7958 |
+@@ -38553,21 +38553,21 @@ static const u32 rtw8822c_rf_b[] = { |
7959 |
+ 0x033, 0x00000062, |
7960 |
+ 0x03F, 0x00000908, |
7961 |
+ 0x033, 0x00000063, |
7962 |
+- 0x03F, 0x00000D09, |
7963 |
++ 0x03F, 0x00000CC6, |
7964 |
+ 0x033, 0x00000064, |
7965 |
+- 0x03F, 0x00000D49, |
7966 |
++ 0x03F, 0x00000CC9, |
7967 |
+ 0x033, 0x00000065, |
7968 |
+- 0x03F, 0x00000D8A, |
7969 |
++ 0x03F, 0x00000CCC, |
7970 |
+ 0x033, 0x00000066, |
7971 |
+- 0x03F, 0x00000DEB, |
7972 |
++ 0x03F, 0x00000CCF, |
7973 |
+ 0x033, 0x00000067, |
7974 |
+- 0x03F, 0x00000DEE, |
7975 |
++ 0x03F, 0x00000CD2, |
7976 |
+ 0x033, 0x00000068, |
7977 |
+- 0x03F, 0x00000DF1, |
7978 |
++ 0x03F, 0x00000CD5, |
7979 |
+ 0x033, 0x00000069, |
7980 |
+- 0x03F, 0x00000DF4, |
7981 |
++ 0x03F, 0x00000DD4, |
7982 |
+ 0x033, 0x0000006A, |
7983 |
+- 0x03F, 0x00000DF7, |
7984 |
++ 0x03F, 0x00000DD7, |
7985 |
+ 0x93000005, 0x00000000, 0x40000000, 0x00000000, |
7986 |
+ 0x033, 0x00000060, |
7987 |
+ 0x03F, 0x00000467, |
7988 |
+@@ -38576,21 +38576,21 @@ static const u32 rtw8822c_rf_b[] = { |
7989 |
+ 0x033, 0x00000062, |
7990 |
+ 0x03F, 0x00000908, |
7991 |
+ 0x033, 0x00000063, |
7992 |
+- 0x03F, 0x00000D09, |
7993 |
++ 0x03F, 0x00000CC6, |
7994 |
+ 0x033, 0x00000064, |
7995 |
+- 0x03F, 0x00000D49, |
7996 |
++ 0x03F, 0x00000CC9, |
7997 |
+ 0x033, 0x00000065, |
7998 |
+- 0x03F, 0x00000D8A, |
7999 |
++ 0x03F, 0x00000CCC, |
8000 |
+ 0x033, 0x00000066, |
8001 |
+- 0x03F, 0x00000DEB, |
8002 |
++ 0x03F, 0x00000CCF, |
8003 |
+ 0x033, 0x00000067, |
8004 |
+- 0x03F, 0x00000DEE, |
8005 |
++ 0x03F, 0x00000CD2, |
8006 |
+ 0x033, 0x00000068, |
8007 |
+- 0x03F, 0x00000DF1, |
8008 |
++ 0x03F, 0x00000CD5, |
8009 |
+ 0x033, 0x00000069, |
8010 |
+- 0x03F, 0x00000DF4, |
8011 |
++ 0x03F, 0x00000DD4, |
8012 |
+ 0x033, 0x0000006A, |
8013 |
+- 0x03F, 0x00000DF7, |
8014 |
++ 0x03F, 0x00000DD7, |
8015 |
+ 0x93000006, 0x00000000, 0x40000000, 0x00000000, |
8016 |
+ 0x033, 0x00000060, |
8017 |
+ 0x03F, 0x00000467, |
8018 |
+@@ -38599,21 +38599,21 @@ static const u32 rtw8822c_rf_b[] = { |
8019 |
+ 0x033, 0x00000062, |
8020 |
+ 0x03F, 0x00000908, |
8021 |
+ 0x033, 0x00000063, |
8022 |
+- 0x03F, 0x00000D09, |
8023 |
++ 0x03F, 0x00000CC6, |
8024 |
+ 0x033, 0x00000064, |
8025 |
+- 0x03F, 0x00000D49, |
8026 |
++ 0x03F, 0x00000CC9, |
8027 |
+ 0x033, 0x00000065, |
8028 |
+- 0x03F, 0x00000D8A, |
8029 |
++ 0x03F, 0x00000CCC, |
8030 |
+ 0x033, 0x00000066, |
8031 |
+- 0x03F, 0x00000DEB, |
8032 |
++ 0x03F, 0x00000CCF, |
8033 |
+ 0x033, 0x00000067, |
8034 |
+- 0x03F, 0x00000DEE, |
8035 |
++ 0x03F, 0x00000CD2, |
8036 |
+ 0x033, 0x00000068, |
8037 |
+- 0x03F, 0x00000DF1, |
8038 |
++ 0x03F, 0x00000CD5, |
8039 |
+ 0x033, 0x00000069, |
8040 |
+- 0x03F, 0x00000DF4, |
8041 |
++ 0x03F, 0x00000DD4, |
8042 |
+ 0x033, 0x0000006A, |
8043 |
+- 0x03F, 0x00000DF7, |
8044 |
++ 0x03F, 0x00000DD7, |
8045 |
+ 0x93000015, 0x00000000, 0x40000000, 0x00000000, |
8046 |
+ 0x033, 0x00000060, |
8047 |
+ 0x03F, 0x00000467, |
8048 |
+@@ -38622,21 +38622,21 @@ static const u32 rtw8822c_rf_b[] = { |
8049 |
+ 0x033, 0x00000062, |
8050 |
+ 0x03F, 0x00000908, |
8051 |
+ 0x033, 0x00000063, |
8052 |
+- 0x03F, 0x00000D09, |
8053 |
++ 0x03F, 0x00000CC6, |
8054 |
+ 0x033, 0x00000064, |
8055 |
+- 0x03F, 0x00000D49, |
8056 |
++ 0x03F, 0x00000CC9, |
8057 |
+ 0x033, 0x00000065, |
8058 |
+- 0x03F, 0x00000D8A, |
8059 |
++ 0x03F, 0x00000CCC, |
8060 |
+ 0x033, 0x00000066, |
8061 |
+- 0x03F, 0x00000DEB, |
8062 |
++ 0x03F, 0x00000CCF, |
8063 |
+ 0x033, 0x00000067, |
8064 |
+- 0x03F, 0x00000DEE, |
8065 |
++ 0x03F, 0x00000CD2, |
8066 |
+ 0x033, 0x00000068, |
8067 |
+- 0x03F, 0x00000DF1, |
8068 |
++ 0x03F, 0x00000CD5, |
8069 |
+ 0x033, 0x00000069, |
8070 |
+- 0x03F, 0x00000DF4, |
8071 |
++ 0x03F, 0x00000DD4, |
8072 |
+ 0x033, 0x0000006A, |
8073 |
+- 0x03F, 0x00000DF7, |
8074 |
++ 0x03F, 0x00000DD7, |
8075 |
+ 0x93000016, 0x00000000, 0x40000000, 0x00000000, |
8076 |
+ 0x033, 0x00000060, |
8077 |
+ 0x03F, 0x00000467, |
8078 |
+@@ -38645,21 +38645,21 @@ static const u32 rtw8822c_rf_b[] = { |
8079 |
+ 0x033, 0x00000062, |
8080 |
+ 0x03F, 0x00000908, |
8081 |
+ 0x033, 0x00000063, |
8082 |
+- 0x03F, 0x00000D09, |
8083 |
++ 0x03F, 0x00000CC6, |
8084 |
+ 0x033, 0x00000064, |
8085 |
+- 0x03F, 0x00000D49, |
8086 |
++ 0x03F, 0x00000CC9, |
8087 |
+ 0x033, 0x00000065, |
8088 |
+- 0x03F, 0x00000D8A, |
8089 |
++ 0x03F, 0x00000CCC, |
8090 |
+ 0x033, 0x00000066, |
8091 |
+- 0x03F, 0x00000DEB, |
8092 |
++ 0x03F, 0x00000CCF, |
8093 |
+ 0x033, 0x00000067, |
8094 |
+- 0x03F, 0x00000DEE, |
8095 |
++ 0x03F, 0x00000CD2, |
8096 |
+ 0x033, 0x00000068, |
8097 |
+- 0x03F, 0x00000DF1, |
8098 |
++ 0x03F, 0x00000CD5, |
8099 |
+ 0x033, 0x00000069, |
8100 |
+- 0x03F, 0x00000DF4, |
8101 |
++ 0x03F, 0x00000DD4, |
8102 |
+ 0x033, 0x0000006A, |
8103 |
+- 0x03F, 0x00000DF7, |
8104 |
++ 0x03F, 0x00000DD7, |
8105 |
+ 0x94000001, 0x00000000, 0x40000000, 0x00000000, |
8106 |
+ 0x033, 0x00000060, |
8107 |
+ 0x03F, 0x00000467, |
8108 |
+@@ -38668,21 +38668,21 @@ static const u32 rtw8822c_rf_b[] = { |
8109 |
+ 0x033, 0x00000062, |
8110 |
+ 0x03F, 0x00000908, |
8111 |
+ 0x033, 0x00000063, |
8112 |
+- 0x03F, 0x00000D09, |
8113 |
++ 0x03F, 0x00000CC6, |
8114 |
+ 0x033, 0x00000064, |
8115 |
+- 0x03F, 0x00000D49, |
8116 |
++ 0x03F, 0x00000CC9, |
8117 |
+ 0x033, 0x00000065, |
8118 |
+- 0x03F, 0x00000D8A, |
8119 |
++ 0x03F, 0x00000CCC, |
8120 |
+ 0x033, 0x00000066, |
8121 |
+- 0x03F, 0x00000DEB, |
8122 |
++ 0x03F, 0x00000CCF, |
8123 |
+ 0x033, 0x00000067, |
8124 |
+- 0x03F, 0x00000DEE, |
8125 |
++ 0x03F, 0x00000CD2, |
8126 |
+ 0x033, 0x00000068, |
8127 |
+- 0x03F, 0x00000DF1, |
8128 |
++ 0x03F, 0x00000CD5, |
8129 |
+ 0x033, 0x00000069, |
8130 |
+- 0x03F, 0x00000DF4, |
8131 |
++ 0x03F, 0x00000DD4, |
8132 |
+ 0x033, 0x0000006A, |
8133 |
+- 0x03F, 0x00000DF7, |
8134 |
++ 0x03F, 0x00000DD7, |
8135 |
+ 0x94000002, 0x00000000, 0x40000000, 0x00000000, |
8136 |
+ 0x033, 0x00000060, |
8137 |
+ 0x03F, 0x00000467, |
8138 |
+@@ -38691,21 +38691,21 @@ static const u32 rtw8822c_rf_b[] = { |
8139 |
+ 0x033, 0x00000062, |
8140 |
+ 0x03F, 0x00000908, |
8141 |
+ 0x033, 0x00000063, |
8142 |
+- 0x03F, 0x00000D09, |
8143 |
++ 0x03F, 0x00000CC6, |
8144 |
+ 0x033, 0x00000064, |
8145 |
+- 0x03F, 0x00000D49, |
8146 |
++ 0x03F, 0x00000CC9, |
8147 |
+ 0x033, 0x00000065, |
8148 |
+- 0x03F, 0x00000D8A, |
8149 |
++ 0x03F, 0x00000CCC, |
8150 |
+ 0x033, 0x00000066, |
8151 |
+- 0x03F, 0x00000DEB, |
8152 |
++ 0x03F, 0x00000CCF, |
8153 |
+ 0x033, 0x00000067, |
8154 |
+- 0x03F, 0x00000DEE, |
8155 |
++ 0x03F, 0x00000CD2, |
8156 |
+ 0x033, 0x00000068, |
8157 |
+- 0x03F, 0x00000DF1, |
8158 |
++ 0x03F, 0x00000CD5, |
8159 |
+ 0x033, 0x00000069, |
8160 |
+- 0x03F, 0x00000DF4, |
8161 |
++ 0x03F, 0x00000DD4, |
8162 |
+ 0x033, 0x0000006A, |
8163 |
+- 0x03F, 0x00000DF7, |
8164 |
++ 0x03F, 0x00000DD7, |
8165 |
+ 0x94000003, 0x00000000, 0x40000000, 0x00000000, |
8166 |
+ 0x033, 0x00000060, |
8167 |
+ 0x03F, 0x00000467, |
8168 |
+@@ -38714,21 +38714,21 @@ static const u32 rtw8822c_rf_b[] = { |
8169 |
+ 0x033, 0x00000062, |
8170 |
+ 0x03F, 0x00000908, |
8171 |
+ 0x033, 0x00000063, |
8172 |
+- 0x03F, 0x00000D09, |
8173 |
++ 0x03F, 0x00000CC6, |
8174 |
+ 0x033, 0x00000064, |
8175 |
+- 0x03F, 0x00000D49, |
8176 |
++ 0x03F, 0x00000CC9, |
8177 |
+ 0x033, 0x00000065, |
8178 |
+- 0x03F, 0x00000D8A, |
8179 |
++ 0x03F, 0x00000CCC, |
8180 |
+ 0x033, 0x00000066, |
8181 |
+- 0x03F, 0x00000DEB, |
8182 |
++ 0x03F, 0x00000CCF, |
8183 |
+ 0x033, 0x00000067, |
8184 |
+- 0x03F, 0x00000DEE, |
8185 |
++ 0x03F, 0x00000CD2, |
8186 |
+ 0x033, 0x00000068, |
8187 |
+- 0x03F, 0x00000DF1, |
8188 |
++ 0x03F, 0x00000CD5, |
8189 |
+ 0x033, 0x00000069, |
8190 |
+- 0x03F, 0x00000DF4, |
8191 |
++ 0x03F, 0x00000DD4, |
8192 |
+ 0x033, 0x0000006A, |
8193 |
+- 0x03F, 0x00000DF7, |
8194 |
++ 0x03F, 0x00000DD7, |
8195 |
+ 0x94000004, 0x00000000, 0x40000000, 0x00000000, |
8196 |
+ 0x033, 0x00000060, |
8197 |
+ 0x03F, 0x00000467, |
8198 |
+@@ -38737,21 +38737,21 @@ static const u32 rtw8822c_rf_b[] = { |
8199 |
+ 0x033, 0x00000062, |
8200 |
+ 0x03F, 0x00000908, |
8201 |
+ 0x033, 0x00000063, |
8202 |
+- 0x03F, 0x00000D09, |
8203 |
++ 0x03F, 0x00000CC6, |
8204 |
+ 0x033, 0x00000064, |
8205 |
+- 0x03F, 0x00000D49, |
8206 |
++ 0x03F, 0x00000CC9, |
8207 |
+ 0x033, 0x00000065, |
8208 |
+- 0x03F, 0x00000D8A, |
8209 |
++ 0x03F, 0x00000CCC, |
8210 |
+ 0x033, 0x00000066, |
8211 |
+- 0x03F, 0x00000DEB, |
8212 |
++ 0x03F, 0x00000CCF, |
8213 |
+ 0x033, 0x00000067, |
8214 |
+- 0x03F, 0x00000DEE, |
8215 |
++ 0x03F, 0x00000CD2, |
8216 |
+ 0x033, 0x00000068, |
8217 |
+- 0x03F, 0x00000DF1, |
8218 |
++ 0x03F, 0x00000CD5, |
8219 |
+ 0x033, 0x00000069, |
8220 |
+- 0x03F, 0x00000DF4, |
8221 |
++ 0x03F, 0x00000DD4, |
8222 |
+ 0x033, 0x0000006A, |
8223 |
+- 0x03F, 0x00000DF7, |
8224 |
++ 0x03F, 0x00000DD7, |
8225 |
+ 0x94000005, 0x00000000, 0x40000000, 0x00000000, |
8226 |
+ 0x033, 0x00000060, |
8227 |
+ 0x03F, 0x00000467, |
8228 |
+@@ -38760,21 +38760,21 @@ static const u32 rtw8822c_rf_b[] = { |
8229 |
+ 0x033, 0x00000062, |
8230 |
+ 0x03F, 0x00000908, |
8231 |
+ 0x033, 0x00000063, |
8232 |
+- 0x03F, 0x00000D09, |
8233 |
++ 0x03F, 0x00000CC6, |
8234 |
+ 0x033, 0x00000064, |
8235 |
+- 0x03F, 0x00000D49, |
8236 |
++ 0x03F, 0x00000CC9, |
8237 |
+ 0x033, 0x00000065, |
8238 |
+- 0x03F, 0x00000D8A, |
8239 |
++ 0x03F, 0x00000CCC, |
8240 |
+ 0x033, 0x00000066, |
8241 |
+- 0x03F, 0x00000DEB, |
8242 |
++ 0x03F, 0x00000CCF, |
8243 |
+ 0x033, 0x00000067, |
8244 |
+- 0x03F, 0x00000DEE, |
8245 |
++ 0x03F, 0x00000CD2, |
8246 |
+ 0x033, 0x00000068, |
8247 |
+- 0x03F, 0x00000DF1, |
8248 |
++ 0x03F, 0x00000CD5, |
8249 |
+ 0x033, 0x00000069, |
8250 |
+- 0x03F, 0x00000DF4, |
8251 |
++ 0x03F, 0x00000DD4, |
8252 |
+ 0x033, 0x0000006A, |
8253 |
+- 0x03F, 0x00000DF7, |
8254 |
++ 0x03F, 0x00000DD7, |
8255 |
+ 0x94000006, 0x00000000, 0x40000000, 0x00000000, |
8256 |
+ 0x033, 0x00000060, |
8257 |
+ 0x03F, 0x00000467, |
8258 |
+@@ -38783,21 +38783,21 @@ static const u32 rtw8822c_rf_b[] = { |
8259 |
+ 0x033, 0x00000062, |
8260 |
+ 0x03F, 0x00000908, |
8261 |
+ 0x033, 0x00000063, |
8262 |
+- 0x03F, 0x00000D09, |
8263 |
++ 0x03F, 0x00000CC6, |
8264 |
+ 0x033, 0x00000064, |
8265 |
+- 0x03F, 0x00000D49, |
8266 |
++ 0x03F, 0x00000CC9, |
8267 |
+ 0x033, 0x00000065, |
8268 |
+- 0x03F, 0x00000D8A, |
8269 |
++ 0x03F, 0x00000CCC, |
8270 |
+ 0x033, 0x00000066, |
8271 |
+- 0x03F, 0x00000DEB, |
8272 |
++ 0x03F, 0x00000CCF, |
8273 |
+ 0x033, 0x00000067, |
8274 |
+- 0x03F, 0x00000DEE, |
8275 |
++ 0x03F, 0x00000CD2, |
8276 |
+ 0x033, 0x00000068, |
8277 |
+- 0x03F, 0x00000DF1, |
8278 |
++ 0x03F, 0x00000CD5, |
8279 |
+ 0x033, 0x00000069, |
8280 |
+- 0x03F, 0x00000DF4, |
8281 |
++ 0x03F, 0x00000DD4, |
8282 |
+ 0x033, 0x0000006A, |
8283 |
+- 0x03F, 0x00000DF7, |
8284 |
++ 0x03F, 0x00000DD7, |
8285 |
+ 0x94000015, 0x00000000, 0x40000000, 0x00000000, |
8286 |
+ 0x033, 0x00000060, |
8287 |
+ 0x03F, 0x00000467, |
8288 |
+@@ -38806,21 +38806,21 @@ static const u32 rtw8822c_rf_b[] = { |
8289 |
+ 0x033, 0x00000062, |
8290 |
+ 0x03F, 0x00000908, |
8291 |
+ 0x033, 0x00000063, |
8292 |
+- 0x03F, 0x00000D09, |
8293 |
++ 0x03F, 0x00000CC6, |
8294 |
+ 0x033, 0x00000064, |
8295 |
+- 0x03F, 0x00000D49, |
8296 |
++ 0x03F, 0x00000CC9, |
8297 |
+ 0x033, 0x00000065, |
8298 |
+- 0x03F, 0x00000D8A, |
8299 |
++ 0x03F, 0x00000CCC, |
8300 |
+ 0x033, 0x00000066, |
8301 |
+- 0x03F, 0x00000DEB, |
8302 |
++ 0x03F, 0x00000CCF, |
8303 |
+ 0x033, 0x00000067, |
8304 |
+- 0x03F, 0x00000DEE, |
8305 |
++ 0x03F, 0x00000CD2, |
8306 |
+ 0x033, 0x00000068, |
8307 |
+- 0x03F, 0x00000DF1, |
8308 |
++ 0x03F, 0x00000CD5, |
8309 |
+ 0x033, 0x00000069, |
8310 |
+- 0x03F, 0x00000DF4, |
8311 |
++ 0x03F, 0x00000DD4, |
8312 |
+ 0x033, 0x0000006A, |
8313 |
+- 0x03F, 0x00000DF7, |
8314 |
++ 0x03F, 0x00000DD7, |
8315 |
+ 0x94000016, 0x00000000, 0x40000000, 0x00000000, |
8316 |
+ 0x033, 0x00000060, |
8317 |
+ 0x03F, 0x00000467, |
8318 |
+@@ -38829,21 +38829,21 @@ static const u32 rtw8822c_rf_b[] = { |
8319 |
+ 0x033, 0x00000062, |
8320 |
+ 0x03F, 0x00000908, |
8321 |
+ 0x033, 0x00000063, |
8322 |
+- 0x03F, 0x00000D09, |
8323 |
++ 0x03F, 0x00000CC6, |
8324 |
+ 0x033, 0x00000064, |
8325 |
+- 0x03F, 0x00000D49, |
8326 |
++ 0x03F, 0x00000CC9, |
8327 |
+ 0x033, 0x00000065, |
8328 |
+- 0x03F, 0x00000D8A, |
8329 |
++ 0x03F, 0x00000CCC, |
8330 |
+ 0x033, 0x00000066, |
8331 |
+- 0x03F, 0x00000DEB, |
8332 |
++ 0x03F, 0x00000CCF, |
8333 |
+ 0x033, 0x00000067, |
8334 |
+- 0x03F, 0x00000DEE, |
8335 |
++ 0x03F, 0x00000CD2, |
8336 |
+ 0x033, 0x00000068, |
8337 |
+- 0x03F, 0x00000DF1, |
8338 |
++ 0x03F, 0x00000CD5, |
8339 |
+ 0x033, 0x00000069, |
8340 |
+- 0x03F, 0x00000DF4, |
8341 |
++ 0x03F, 0x00000DD4, |
8342 |
+ 0x033, 0x0000006A, |
8343 |
+- 0x03F, 0x00000DF7, |
8344 |
++ 0x03F, 0x00000DD7, |
8345 |
+ 0x95000001, 0x00000000, 0x40000000, 0x00000000, |
8346 |
+ 0x033, 0x00000060, |
8347 |
+ 0x03F, 0x00000467, |
8348 |
+@@ -38852,21 +38852,21 @@ static const u32 rtw8822c_rf_b[] = { |
8349 |
+ 0x033, 0x00000062, |
8350 |
+ 0x03F, 0x00000908, |
8351 |
+ 0x033, 0x00000063, |
8352 |
+- 0x03F, 0x00000D09, |
8353 |
++ 0x03F, 0x00000CC6, |
8354 |
+ 0x033, 0x00000064, |
8355 |
+- 0x03F, 0x00000D49, |
8356 |
++ 0x03F, 0x00000CC9, |
8357 |
+ 0x033, 0x00000065, |
8358 |
+- 0x03F, 0x00000D8A, |
8359 |
++ 0x03F, 0x00000CCC, |
8360 |
+ 0x033, 0x00000066, |
8361 |
+- 0x03F, 0x00000DEB, |
8362 |
++ 0x03F, 0x00000CCF, |
8363 |
+ 0x033, 0x00000067, |
8364 |
+- 0x03F, 0x00000DEE, |
8365 |
++ 0x03F, 0x00000CD2, |
8366 |
+ 0x033, 0x00000068, |
8367 |
+- 0x03F, 0x00000DF1, |
8368 |
++ 0x03F, 0x00000CD5, |
8369 |
+ 0x033, 0x00000069, |
8370 |
+- 0x03F, 0x00000DF4, |
8371 |
++ 0x03F, 0x00000DD4, |
8372 |
+ 0x033, 0x0000006A, |
8373 |
+- 0x03F, 0x00000DF7, |
8374 |
++ 0x03F, 0x00000DD7, |
8375 |
+ 0x95000002, 0x00000000, 0x40000000, 0x00000000, |
8376 |
+ 0x033, 0x00000060, |
8377 |
+ 0x03F, 0x00000467, |
8378 |
+@@ -38875,21 +38875,21 @@ static const u32 rtw8822c_rf_b[] = { |
8379 |
+ 0x033, 0x00000062, |
8380 |
+ 0x03F, 0x00000908, |
8381 |
+ 0x033, 0x00000063, |
8382 |
+- 0x03F, 0x00000D09, |
8383 |
++ 0x03F, 0x00000CC6, |
8384 |
+ 0x033, 0x00000064, |
8385 |
+- 0x03F, 0x00000D49, |
8386 |
++ 0x03F, 0x00000CC9, |
8387 |
+ 0x033, 0x00000065, |
8388 |
+- 0x03F, 0x00000D8A, |
8389 |
++ 0x03F, 0x00000CCC, |
8390 |
+ 0x033, 0x00000066, |
8391 |
+- 0x03F, 0x00000DEB, |
8392 |
++ 0x03F, 0x00000CCF, |
8393 |
+ 0x033, 0x00000067, |
8394 |
+- 0x03F, 0x00000DEE, |
8395 |
++ 0x03F, 0x00000CD2, |
8396 |
+ 0x033, 0x00000068, |
8397 |
+- 0x03F, 0x00000DF1, |
8398 |
++ 0x03F, 0x00000CD5, |
8399 |
+ 0x033, 0x00000069, |
8400 |
+- 0x03F, 0x00000DF4, |
8401 |
++ 0x03F, 0x00000DD4, |
8402 |
+ 0x033, 0x0000006A, |
8403 |
+- 0x03F, 0x00000DF7, |
8404 |
++ 0x03F, 0x00000DD7, |
8405 |
+ 0x95000003, 0x00000000, 0x40000000, 0x00000000, |
8406 |
+ 0x033, 0x00000060, |
8407 |
+ 0x03F, 0x00000467, |
8408 |
+@@ -38898,21 +38898,21 @@ static const u32 rtw8822c_rf_b[] = { |
8409 |
+ 0x033, 0x00000062, |
8410 |
+ 0x03F, 0x00000908, |
8411 |
+ 0x033, 0x00000063, |
8412 |
+- 0x03F, 0x00000D09, |
8413 |
++ 0x03F, 0x00000CC6, |
8414 |
+ 0x033, 0x00000064, |
8415 |
+- 0x03F, 0x00000D49, |
8416 |
++ 0x03F, 0x00000CC9, |
8417 |
+ 0x033, 0x00000065, |
8418 |
+- 0x03F, 0x00000D8A, |
8419 |
++ 0x03F, 0x00000CCC, |
8420 |
+ 0x033, 0x00000066, |
8421 |
+- 0x03F, 0x00000DEB, |
8422 |
++ 0x03F, 0x00000CCF, |
8423 |
+ 0x033, 0x00000067, |
8424 |
+- 0x03F, 0x00000DEE, |
8425 |
++ 0x03F, 0x00000CD2, |
8426 |
+ 0x033, 0x00000068, |
8427 |
+- 0x03F, 0x00000DF1, |
8428 |
++ 0x03F, 0x00000CD5, |
8429 |
+ 0x033, 0x00000069, |
8430 |
+- 0x03F, 0x00000DF4, |
8431 |
++ 0x03F, 0x00000DD4, |
8432 |
+ 0x033, 0x0000006A, |
8433 |
+- 0x03F, 0x00000DF7, |
8434 |
++ 0x03F, 0x00000DD7, |
8435 |
+ 0x95000004, 0x00000000, 0x40000000, 0x00000000, |
8436 |
+ 0x033, 0x00000060, |
8437 |
+ 0x03F, 0x00000467, |
8438 |
+@@ -38921,21 +38921,21 @@ static const u32 rtw8822c_rf_b[] = { |
8439 |
+ 0x033, 0x00000062, |
8440 |
+ 0x03F, 0x00000908, |
8441 |
+ 0x033, 0x00000063, |
8442 |
+- 0x03F, 0x00000D09, |
8443 |
++ 0x03F, 0x00000CC6, |
8444 |
+ 0x033, 0x00000064, |
8445 |
+- 0x03F, 0x00000D49, |
8446 |
++ 0x03F, 0x00000CC9, |
8447 |
+ 0x033, 0x00000065, |
8448 |
+- 0x03F, 0x00000D8A, |
8449 |
++ 0x03F, 0x00000CCC, |
8450 |
+ 0x033, 0x00000066, |
8451 |
+- 0x03F, 0x00000DEB, |
8452 |
++ 0x03F, 0x00000CCF, |
8453 |
+ 0x033, 0x00000067, |
8454 |
+- 0x03F, 0x00000DEE, |
8455 |
++ 0x03F, 0x00000CD2, |
8456 |
+ 0x033, 0x00000068, |
8457 |
+- 0x03F, 0x00000DF1, |
8458 |
++ 0x03F, 0x00000CD5, |
8459 |
+ 0x033, 0x00000069, |
8460 |
+- 0x03F, 0x00000DF4, |
8461 |
++ 0x03F, 0x00000DD4, |
8462 |
+ 0x033, 0x0000006A, |
8463 |
+- 0x03F, 0x00000DF7, |
8464 |
++ 0x03F, 0x00000DD7, |
8465 |
+ 0x95000005, 0x00000000, 0x40000000, 0x00000000, |
8466 |
+ 0x033, 0x00000060, |
8467 |
+ 0x03F, 0x00000467, |
8468 |
+@@ -38944,21 +38944,21 @@ static const u32 rtw8822c_rf_b[] = { |
8469 |
+ 0x033, 0x00000062, |
8470 |
+ 0x03F, 0x00000908, |
8471 |
+ 0x033, 0x00000063, |
8472 |
+- 0x03F, 0x00000D09, |
8473 |
++ 0x03F, 0x00000CC6, |
8474 |
+ 0x033, 0x00000064, |
8475 |
+- 0x03F, 0x00000D49, |
8476 |
++ 0x03F, 0x00000CC9, |
8477 |
+ 0x033, 0x00000065, |
8478 |
+- 0x03F, 0x00000D8A, |
8479 |
++ 0x03F, 0x00000CCC, |
8480 |
+ 0x033, 0x00000066, |
8481 |
+- 0x03F, 0x00000DEB, |
8482 |
++ 0x03F, 0x00000CCF, |
8483 |
+ 0x033, 0x00000067, |
8484 |
+- 0x03F, 0x00000DEE, |
8485 |
++ 0x03F, 0x00000CD2, |
8486 |
+ 0x033, 0x00000068, |
8487 |
+- 0x03F, 0x00000DF1, |
8488 |
++ 0x03F, 0x00000CD5, |
8489 |
+ 0x033, 0x00000069, |
8490 |
+- 0x03F, 0x00000DF4, |
8491 |
++ 0x03F, 0x00000DD4, |
8492 |
+ 0x033, 0x0000006A, |
8493 |
+- 0x03F, 0x00000DF7, |
8494 |
++ 0x03F, 0x00000DD7, |
8495 |
+ 0x95000006, 0x00000000, 0x40000000, 0x00000000, |
8496 |
+ 0x033, 0x00000060, |
8497 |
+ 0x03F, 0x00000467, |
8498 |
+@@ -38967,21 +38967,21 @@ static const u32 rtw8822c_rf_b[] = { |
8499 |
+ 0x033, 0x00000062, |
8500 |
+ 0x03F, 0x00000908, |
8501 |
+ 0x033, 0x00000063, |
8502 |
+- 0x03F, 0x00000D09, |
8503 |
++ 0x03F, 0x00000CC6, |
8504 |
+ 0x033, 0x00000064, |
8505 |
+- 0x03F, 0x00000D49, |
8506 |
++ 0x03F, 0x00000CC9, |
8507 |
+ 0x033, 0x00000065, |
8508 |
+- 0x03F, 0x00000D8A, |
8509 |
++ 0x03F, 0x00000CCC, |
8510 |
+ 0x033, 0x00000066, |
8511 |
+- 0x03F, 0x00000DEB, |
8512 |
++ 0x03F, 0x00000CCF, |
8513 |
+ 0x033, 0x00000067, |
8514 |
+- 0x03F, 0x00000DEE, |
8515 |
++ 0x03F, 0x00000CD2, |
8516 |
+ 0x033, 0x00000068, |
8517 |
+- 0x03F, 0x00000DF1, |
8518 |
++ 0x03F, 0x00000CD5, |
8519 |
+ 0x033, 0x00000069, |
8520 |
+- 0x03F, 0x00000DF4, |
8521 |
++ 0x03F, 0x00000DD4, |
8522 |
+ 0x033, 0x0000006A, |
8523 |
+- 0x03F, 0x00000DF7, |
8524 |
++ 0x03F, 0x00000DD7, |
8525 |
+ 0x95000015, 0x00000000, 0x40000000, 0x00000000, |
8526 |
+ 0x033, 0x00000060, |
8527 |
+ 0x03F, 0x00000467, |
8528 |
+@@ -38990,21 +38990,21 @@ static const u32 rtw8822c_rf_b[] = { |
8529 |
+ 0x033, 0x00000062, |
8530 |
+ 0x03F, 0x00000908, |
8531 |
+ 0x033, 0x00000063, |
8532 |
+- 0x03F, 0x00000D09, |
8533 |
++ 0x03F, 0x00000CC6, |
8534 |
+ 0x033, 0x00000064, |
8535 |
+- 0x03F, 0x00000D49, |
8536 |
++ 0x03F, 0x00000CC9, |
8537 |
+ 0x033, 0x00000065, |
8538 |
+- 0x03F, 0x00000D8A, |
8539 |
++ 0x03F, 0x00000CCC, |
8540 |
+ 0x033, 0x00000066, |
8541 |
+- 0x03F, 0x00000DEB, |
8542 |
++ 0x03F, 0x00000CCF, |
8543 |
+ 0x033, 0x00000067, |
8544 |
+- 0x03F, 0x00000DEE, |
8545 |
++ 0x03F, 0x00000CD2, |
8546 |
+ 0x033, 0x00000068, |
8547 |
+- 0x03F, 0x00000DF1, |
8548 |
++ 0x03F, 0x00000CD5, |
8549 |
+ 0x033, 0x00000069, |
8550 |
+- 0x03F, 0x00000DF4, |
8551 |
++ 0x03F, 0x00000DD4, |
8552 |
+ 0x033, 0x0000006A, |
8553 |
+- 0x03F, 0x00000DF7, |
8554 |
++ 0x03F, 0x00000DD7, |
8555 |
+ 0x95000016, 0x00000000, 0x40000000, 0x00000000, |
8556 |
+ 0x033, 0x00000060, |
8557 |
+ 0x03F, 0x00000467, |
8558 |
+@@ -39013,21 +39013,21 @@ static const u32 rtw8822c_rf_b[] = { |
8559 |
+ 0x033, 0x00000062, |
8560 |
+ 0x03F, 0x00000908, |
8561 |
+ 0x033, 0x00000063, |
8562 |
+- 0x03F, 0x00000D09, |
8563 |
++ 0x03F, 0x00000CC6, |
8564 |
+ 0x033, 0x00000064, |
8565 |
+- 0x03F, 0x00000D49, |
8566 |
++ 0x03F, 0x00000CC9, |
8567 |
+ 0x033, 0x00000065, |
8568 |
+- 0x03F, 0x00000D8A, |
8569 |
++ 0x03F, 0x00000CCC, |
8570 |
+ 0x033, 0x00000066, |
8571 |
+- 0x03F, 0x00000DEB, |
8572 |
++ 0x03F, 0x00000CCF, |
8573 |
+ 0x033, 0x00000067, |
8574 |
+- 0x03F, 0x00000DEE, |
8575 |
++ 0x03F, 0x00000CD2, |
8576 |
+ 0x033, 0x00000068, |
8577 |
+- 0x03F, 0x00000DF1, |
8578 |
++ 0x03F, 0x00000CD5, |
8579 |
+ 0x033, 0x00000069, |
8580 |
+- 0x03F, 0x00000DF4, |
8581 |
++ 0x03F, 0x00000DD4, |
8582 |
+ 0x033, 0x0000006A, |
8583 |
+- 0x03F, 0x00000DF7, |
8584 |
++ 0x03F, 0x00000DD7, |
8585 |
+ 0xA0000000, 0x00000000, |
8586 |
+ 0x033, 0x00000060, |
8587 |
+ 0x03F, 0x00000487, |
8588 |
+diff --git a/drivers/net/wireless/st/cw1200/cw1200_sdio.c b/drivers/net/wireless/st/cw1200/cw1200_sdio.c |
8589 |
+index b65ec14136c7e..4c30b5772ce0f 100644 |
8590 |
+--- a/drivers/net/wireless/st/cw1200/cw1200_sdio.c |
8591 |
++++ b/drivers/net/wireless/st/cw1200/cw1200_sdio.c |
8592 |
+@@ -53,6 +53,7 @@ static const struct sdio_device_id cw1200_sdio_ids[] = { |
8593 |
+ { SDIO_DEVICE(SDIO_VENDOR_ID_STE, SDIO_DEVICE_ID_STE_CW1200) }, |
8594 |
+ { /* end: all zeroes */ }, |
8595 |
+ }; |
8596 |
++MODULE_DEVICE_TABLE(sdio, cw1200_sdio_ids); |
8597 |
+ |
8598 |
+ /* hwbus_ops implemetation */ |
8599 |
+ |
8600 |
+diff --git a/drivers/net/wireless/ti/wl1251/cmd.c b/drivers/net/wireless/ti/wl1251/cmd.c |
8601 |
+index 498c8db2eb48b..d7a869106782f 100644 |
8602 |
+--- a/drivers/net/wireless/ti/wl1251/cmd.c |
8603 |
++++ b/drivers/net/wireless/ti/wl1251/cmd.c |
8604 |
+@@ -454,9 +454,12 @@ int wl1251_cmd_scan(struct wl1251 *wl, u8 *ssid, size_t ssid_len, |
8605 |
+ cmd->channels[i].channel = channels[i]->hw_value; |
8606 |
+ } |
8607 |
+ |
8608 |
+- cmd->params.ssid_len = ssid_len; |
8609 |
+- if (ssid) |
8610 |
+- memcpy(cmd->params.ssid, ssid, ssid_len); |
8611 |
++ if (ssid) { |
8612 |
++ int len = clamp_val(ssid_len, 0, IEEE80211_MAX_SSID_LEN); |
8613 |
++ |
8614 |
++ cmd->params.ssid_len = len; |
8615 |
++ memcpy(cmd->params.ssid, ssid, len); |
8616 |
++ } |
8617 |
+ |
8618 |
+ ret = wl1251_cmd_send(wl, CMD_SCAN, cmd, sizeof(*cmd)); |
8619 |
+ if (ret < 0) { |
8620 |
+diff --git a/drivers/net/wireless/ti/wl12xx/main.c b/drivers/net/wireless/ti/wl12xx/main.c |
8621 |
+index 9d7dbfe7fe0c3..c6da0cfb4afbe 100644 |
8622 |
+--- a/drivers/net/wireless/ti/wl12xx/main.c |
8623 |
++++ b/drivers/net/wireless/ti/wl12xx/main.c |
8624 |
+@@ -1503,6 +1503,13 @@ static int wl12xx_get_fuse_mac(struct wl1271 *wl) |
8625 |
+ u32 mac1, mac2; |
8626 |
+ int ret; |
8627 |
+ |
8628 |
++ /* Device may be in ELP from the bootloader or kexec */ |
8629 |
++ ret = wlcore_write32(wl, WL12XX_WELP_ARM_COMMAND, WELP_ARM_COMMAND_VAL); |
8630 |
++ if (ret < 0) |
8631 |
++ goto out; |
8632 |
++ |
8633 |
++ usleep_range(500000, 700000); |
8634 |
++ |
8635 |
+ ret = wlcore_set_partition(wl, &wl->ptable[PART_DRPW]); |
8636 |
+ if (ret < 0) |
8637 |
+ goto out; |
8638 |
+diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c |
8639 |
+index a5ab1e0c74cf6..3ffe676ed7f16 100644 |
8640 |
+--- a/drivers/nvmem/core.c |
8641 |
++++ b/drivers/nvmem/core.c |
8642 |
+@@ -686,15 +686,17 @@ static int nvmem_add_cells_from_of(struct nvmem_device *nvmem) |
8643 |
+ continue; |
8644 |
+ if (len < 2 * sizeof(u32)) { |
8645 |
+ dev_err(dev, "nvmem: invalid reg on %pOF\n", child); |
8646 |
++ of_node_put(child); |
8647 |
+ return -EINVAL; |
8648 |
+ } |
8649 |
+ |
8650 |
+ cell = kzalloc(sizeof(*cell), GFP_KERNEL); |
8651 |
+- if (!cell) |
8652 |
++ if (!cell) { |
8653 |
++ of_node_put(child); |
8654 |
+ return -ENOMEM; |
8655 |
++ } |
8656 |
+ |
8657 |
+ cell->nvmem = nvmem; |
8658 |
+- cell->np = of_node_get(child); |
8659 |
+ cell->offset = be32_to_cpup(addr++); |
8660 |
+ cell->bytes = be32_to_cpup(addr); |
8661 |
+ cell->name = kasprintf(GFP_KERNEL, "%pOFn", child); |
8662 |
+@@ -715,11 +717,12 @@ static int nvmem_add_cells_from_of(struct nvmem_device *nvmem) |
8663 |
+ cell->name, nvmem->stride); |
8664 |
+ /* Cells already added will be freed later. */ |
8665 |
+ kfree_const(cell->name); |
8666 |
+- of_node_put(cell->np); |
8667 |
+ kfree(cell); |
8668 |
++ of_node_put(child); |
8669 |
+ return -EINVAL; |
8670 |
+ } |
8671 |
+ |
8672 |
++ cell->np = of_node_get(child); |
8673 |
+ nvmem_cell_add(cell); |
8674 |
+ } |
8675 |
+ |
8676 |
+diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c |
8677 |
+index 0e94190ca4e88..8dee6d3f33a70 100644 |
8678 |
+--- a/drivers/pci/controller/dwc/pcie-tegra194.c |
8679 |
++++ b/drivers/pci/controller/dwc/pcie-tegra194.c |
8680 |
+@@ -2214,6 +2214,8 @@ static int tegra_pcie_dw_resume_noirq(struct device *dev) |
8681 |
+ goto fail_host_init; |
8682 |
+ } |
8683 |
+ |
8684 |
++ dw_pcie_setup_rc(&pcie->pci.pp); |
8685 |
++ |
8686 |
+ ret = tegra_pcie_dw_start_link(&pcie->pci); |
8687 |
+ if (ret < 0) |
8688 |
+ goto fail_host_init; |
8689 |
+diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c |
8690 |
+index e3f5e7ab76063..c95ebe808f92b 100644 |
8691 |
+--- a/drivers/pci/controller/pci-aardvark.c |
8692 |
++++ b/drivers/pci/controller/pci-aardvark.c |
8693 |
+@@ -57,7 +57,7 @@ |
8694 |
+ #define PIO_COMPLETION_STATUS_UR 1 |
8695 |
+ #define PIO_COMPLETION_STATUS_CRS 2 |
8696 |
+ #define PIO_COMPLETION_STATUS_CA 4 |
8697 |
+-#define PIO_NON_POSTED_REQ BIT(0) |
8698 |
++#define PIO_NON_POSTED_REQ BIT(10) |
8699 |
+ #define PIO_ADDR_LS (PIO_BASE_ADDR + 0x8) |
8700 |
+ #define PIO_ADDR_MS (PIO_BASE_ADDR + 0xc) |
8701 |
+ #define PIO_WR_DATA (PIO_BASE_ADDR + 0x10) |
8702 |
+@@ -125,6 +125,7 @@ |
8703 |
+ #define LTSSM_MASK 0x3f |
8704 |
+ #define LTSSM_L0 0x10 |
8705 |
+ #define RC_BAR_CONFIG 0x300 |
8706 |
++#define VENDOR_ID_REG (LMI_BASE_ADDR + 0x44) |
8707 |
+ |
8708 |
+ /* PCIe core controller registers */ |
8709 |
+ #define CTRL_CORE_BASE_ADDR 0x18000 |
8710 |
+@@ -385,6 +386,16 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie) |
8711 |
+ reg |= (IS_RC_MSK << IS_RC_SHIFT); |
8712 |
+ advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG); |
8713 |
+ |
8714 |
++ /* |
8715 |
++ * Replace incorrect PCI vendor id value 0x1b4b by correct value 0x11ab. |
8716 |
++ * VENDOR_ID_REG contains vendor id in low 16 bits and subsystem vendor |
8717 |
++ * id in high 16 bits. Updating this register changes readback value of |
8718 |
++ * read-only vendor id bits in PCIE_CORE_DEV_ID_REG register. Workaround |
8719 |
++ * for erratum 4.1: "The value of device and vendor ID is incorrect". |
8720 |
++ */ |
8721 |
++ reg = (PCI_VENDOR_ID_MARVELL << 16) | PCI_VENDOR_ID_MARVELL; |
8722 |
++ advk_writel(pcie, reg, VENDOR_ID_REG); |
8723 |
++ |
8724 |
+ /* Set Advanced Error Capabilities and Control PF0 register */ |
8725 |
+ reg = PCIE_CORE_ERR_CAPCTL_ECRC_CHK_TX | |
8726 |
+ PCIE_CORE_ERR_CAPCTL_ECRC_CHK_TX_EN | |
8727 |
+diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c |
8728 |
+index 7bf76bca888da..909343ee7e0ac 100644 |
8729 |
+--- a/drivers/pci/quirks.c |
8730 |
++++ b/drivers/pci/quirks.c |
8731 |
+@@ -27,6 +27,7 @@ |
8732 |
+ #include <linux/nvme.h> |
8733 |
+ #include <linux/platform_data/x86/apple.h> |
8734 |
+ #include <linux/pm_runtime.h> |
8735 |
++#include <linux/suspend.h> |
8736 |
+ #include <linux/switchtec.h> |
8737 |
+ #include <asm/dma.h> /* isa_dma_bridge_buggy */ |
8738 |
+ #include "pci.h" |
8739 |
+@@ -3668,6 +3669,16 @@ static void quirk_apple_poweroff_thunderbolt(struct pci_dev *dev) |
8740 |
+ return; |
8741 |
+ if (pci_pcie_type(dev) != PCI_EXP_TYPE_UPSTREAM) |
8742 |
+ return; |
8743 |
++ |
8744 |
++ /* |
8745 |
++ * SXIO/SXFP/SXLF turns off power to the Thunderbolt controller. |
8746 |
++ * We don't know how to turn it back on again, but firmware does, |
8747 |
++ * so we can only use SXIO/SXFP/SXLF if we're suspending via |
8748 |
++ * firmware. |
8749 |
++ */ |
8750 |
++ if (!pm_suspend_via_firmware()) |
8751 |
++ return; |
8752 |
++ |
8753 |
+ bridge = ACPI_HANDLE(&dev->dev); |
8754 |
+ if (!bridge) |
8755 |
+ return; |
8756 |
+diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c |
8757 |
+index 2d4acf21117cc..c5950a3b4e4ce 100644 |
8758 |
+--- a/drivers/pinctrl/pinctrl-amd.c |
8759 |
++++ b/drivers/pinctrl/pinctrl-amd.c |
8760 |
+@@ -991,6 +991,7 @@ static int amd_gpio_remove(struct platform_device *pdev) |
8761 |
+ static const struct acpi_device_id amd_gpio_acpi_match[] = { |
8762 |
+ { "AMD0030", 0 }, |
8763 |
+ { "AMDI0030", 0}, |
8764 |
++ { "AMDI0031", 0}, |
8765 |
+ { }, |
8766 |
+ }; |
8767 |
+ MODULE_DEVICE_TABLE(acpi, amd_gpio_acpi_match); |
8768 |
+diff --git a/drivers/pinctrl/pinctrl-equilibrium.c b/drivers/pinctrl/pinctrl-equilibrium.c |
8769 |
+index 067271b7d35a3..ac1c47f542c11 100644 |
8770 |
+--- a/drivers/pinctrl/pinctrl-equilibrium.c |
8771 |
++++ b/drivers/pinctrl/pinctrl-equilibrium.c |
8772 |
+@@ -929,6 +929,7 @@ static const struct of_device_id eqbr_pinctrl_dt_match[] = { |
8773 |
+ { .compatible = "intel,lgm-io" }, |
8774 |
+ {} |
8775 |
+ }; |
8776 |
++MODULE_DEVICE_TABLE(of, eqbr_pinctrl_dt_match); |
8777 |
+ |
8778 |
+ static struct platform_driver eqbr_pinctrl_driver = { |
8779 |
+ .probe = eqbr_pinctrl_probe, |
8780 |
+diff --git a/drivers/pinctrl/pinctrl-mcp23s08.c b/drivers/pinctrl/pinctrl-mcp23s08.c |
8781 |
+index ce2d8014b7e0b..d0259577934e9 100644 |
8782 |
+--- a/drivers/pinctrl/pinctrl-mcp23s08.c |
8783 |
++++ b/drivers/pinctrl/pinctrl-mcp23s08.c |
8784 |
+@@ -351,6 +351,11 @@ static irqreturn_t mcp23s08_irq(int irq, void *data) |
8785 |
+ if (mcp_read(mcp, MCP_INTF, &intf)) |
8786 |
+ goto unlock; |
8787 |
+ |
8788 |
++ if (intf == 0) { |
8789 |
++ /* There is no interrupt pending */ |
8790 |
++ goto unlock; |
8791 |
++ } |
8792 |
++ |
8793 |
+ if (mcp_read(mcp, MCP_INTCAP, &intcap)) |
8794 |
+ goto unlock; |
8795 |
+ |
8796 |
+@@ -368,11 +373,6 @@ static irqreturn_t mcp23s08_irq(int irq, void *data) |
8797 |
+ mcp->cached_gpio = gpio; |
8798 |
+ mutex_unlock(&mcp->lock); |
8799 |
+ |
8800 |
+- if (intf == 0) { |
8801 |
+- /* There is no interrupt pending */ |
8802 |
+- return IRQ_HANDLED; |
8803 |
+- } |
8804 |
+- |
8805 |
+ dev_dbg(mcp->chip.parent, |
8806 |
+ "intcap 0x%04X intf 0x%04X gpio_orig 0x%04X gpio 0x%04X\n", |
8807 |
+ intcap, intf, gpio_orig, gpio); |
8808 |
+diff --git a/drivers/thermal/intel/int340x_thermal/processor_thermal_device.c b/drivers/thermal/intel/int340x_thermal/processor_thermal_device.c |
8809 |
+index 9e6f2a895a234..5b1355fae9b41 100644 |
8810 |
+--- a/drivers/thermal/intel/int340x_thermal/processor_thermal_device.c |
8811 |
++++ b/drivers/thermal/intel/int340x_thermal/processor_thermal_device.c |
8812 |
+@@ -100,24 +100,27 @@ static ssize_t tcc_offset_degree_celsius_show(struct device *dev, |
8813 |
+ if (err) |
8814 |
+ return err; |
8815 |
+ |
8816 |
+- val = (val >> 24) & 0xff; |
8817 |
++ val = (val >> 24) & 0x3f; |
8818 |
+ return sprintf(buf, "%d\n", (int)val); |
8819 |
+ } |
8820 |
+ |
8821 |
+-static int tcc_offset_update(int tcc) |
8822 |
++static int tcc_offset_update(unsigned int tcc) |
8823 |
+ { |
8824 |
+ u64 val; |
8825 |
+ int err; |
8826 |
+ |
8827 |
+- if (!tcc) |
8828 |
++ if (tcc > 63) |
8829 |
+ return -EINVAL; |
8830 |
+ |
8831 |
+ err = rdmsrl_safe(MSR_IA32_TEMPERATURE_TARGET, &val); |
8832 |
+ if (err) |
8833 |
+ return err; |
8834 |
+ |
8835 |
+- val &= ~GENMASK_ULL(31, 24); |
8836 |
+- val |= (tcc & 0xff) << 24; |
8837 |
++ if (val & BIT(31)) |
8838 |
++ return -EPERM; |
8839 |
++ |
8840 |
++ val &= ~GENMASK_ULL(29, 24); |
8841 |
++ val |= (tcc & 0x3f) << 24; |
8842 |
+ |
8843 |
+ err = wrmsrl_safe(MSR_IA32_TEMPERATURE_TARGET, val); |
8844 |
+ if (err) |
8845 |
+@@ -126,14 +129,15 @@ static int tcc_offset_update(int tcc) |
8846 |
+ return 0; |
8847 |
+ } |
8848 |
+ |
8849 |
+-static int tcc_offset_save; |
8850 |
++static unsigned int tcc_offset_save; |
8851 |
+ |
8852 |
+ static ssize_t tcc_offset_degree_celsius_store(struct device *dev, |
8853 |
+ struct device_attribute *attr, const char *buf, |
8854 |
+ size_t count) |
8855 |
+ { |
8856 |
++ unsigned int tcc; |
8857 |
+ u64 val; |
8858 |
+- int tcc, err; |
8859 |
++ int err; |
8860 |
+ |
8861 |
+ err = rdmsrl_safe(MSR_PLATFORM_INFO, &val); |
8862 |
+ if (err) |
8863 |
+@@ -142,7 +146,7 @@ static ssize_t tcc_offset_degree_celsius_store(struct device *dev, |
8864 |
+ if (!(val & BIT(30))) |
8865 |
+ return -EACCES; |
8866 |
+ |
8867 |
+- if (kstrtoint(buf, 0, &tcc)) |
8868 |
++ if (kstrtouint(buf, 0, &tcc)) |
8869 |
+ return -EINVAL; |
8870 |
+ |
8871 |
+ err = tcc_offset_update(tcc); |
8872 |
+diff --git a/fs/ext4/ext4.h b/fs/ext4/ext4.h |
8873 |
+index 826a56e3bbd28..62210cbea84b8 100644 |
8874 |
+--- a/fs/ext4/ext4.h |
8875 |
++++ b/fs/ext4/ext4.h |
8876 |
+@@ -1490,6 +1490,7 @@ struct ext4_sb_info { |
8877 |
+ struct kobject s_kobj; |
8878 |
+ struct completion s_kobj_unregister; |
8879 |
+ struct super_block *s_sb; |
8880 |
++ struct buffer_head *s_mmp_bh; |
8881 |
+ |
8882 |
+ /* Journaling */ |
8883 |
+ struct journal_s *s_journal; |
8884 |
+@@ -3663,6 +3664,9 @@ extern struct ext4_io_end_vec *ext4_last_io_end_vec(ext4_io_end_t *io_end); |
8885 |
+ /* mmp.c */ |
8886 |
+ extern int ext4_multi_mount_protect(struct super_block *, ext4_fsblk_t); |
8887 |
+ |
8888 |
++/* mmp.c */ |
8889 |
++extern void ext4_stop_mmpd(struct ext4_sb_info *sbi); |
8890 |
++ |
8891 |
+ /* verity.c */ |
8892 |
+ extern const struct fsverity_operations ext4_verityops; |
8893 |
+ |
8894 |
+diff --git a/fs/ext4/mmp.c b/fs/ext4/mmp.c |
8895 |
+index 68fbeedd627bc..6cb598b549ca1 100644 |
8896 |
+--- a/fs/ext4/mmp.c |
8897 |
++++ b/fs/ext4/mmp.c |
8898 |
+@@ -127,9 +127,9 @@ void __dump_mmp_msg(struct super_block *sb, struct mmp_struct *mmp, |
8899 |
+ */ |
8900 |
+ static int kmmpd(void *data) |
8901 |
+ { |
8902 |
+- struct super_block *sb = ((struct mmpd_data *) data)->sb; |
8903 |
+- struct buffer_head *bh = ((struct mmpd_data *) data)->bh; |
8904 |
++ struct super_block *sb = (struct super_block *) data; |
8905 |
+ struct ext4_super_block *es = EXT4_SB(sb)->s_es; |
8906 |
++ struct buffer_head *bh = EXT4_SB(sb)->s_mmp_bh; |
8907 |
+ struct mmp_struct *mmp; |
8908 |
+ ext4_fsblk_t mmp_block; |
8909 |
+ u32 seq = 0; |
8910 |
+@@ -245,12 +245,18 @@ static int kmmpd(void *data) |
8911 |
+ retval = write_mmp_block(sb, bh); |
8912 |
+ |
8913 |
+ exit_thread: |
8914 |
+- EXT4_SB(sb)->s_mmp_tsk = NULL; |
8915 |
+- kfree(data); |
8916 |
+- brelse(bh); |
8917 |
+ return retval; |
8918 |
+ } |
8919 |
+ |
8920 |
++void ext4_stop_mmpd(struct ext4_sb_info *sbi) |
8921 |
++{ |
8922 |
++ if (sbi->s_mmp_tsk) { |
8923 |
++ kthread_stop(sbi->s_mmp_tsk); |
8924 |
++ brelse(sbi->s_mmp_bh); |
8925 |
++ sbi->s_mmp_tsk = NULL; |
8926 |
++ } |
8927 |
++} |
8928 |
++ |
8929 |
+ /* |
8930 |
+ * Get a random new sequence number but make sure it is not greater than |
8931 |
+ * EXT4_MMP_SEQ_MAX. |
8932 |
+@@ -275,7 +281,6 @@ int ext4_multi_mount_protect(struct super_block *sb, |
8933 |
+ struct ext4_super_block *es = EXT4_SB(sb)->s_es; |
8934 |
+ struct buffer_head *bh = NULL; |
8935 |
+ struct mmp_struct *mmp = NULL; |
8936 |
+- struct mmpd_data *mmpd_data; |
8937 |
+ u32 seq; |
8938 |
+ unsigned int mmp_check_interval = le16_to_cpu(es->s_mmp_update_interval); |
8939 |
+ unsigned int wait_time = 0; |
8940 |
+@@ -364,24 +369,17 @@ skip: |
8941 |
+ goto failed; |
8942 |
+ } |
8943 |
+ |
8944 |
+- mmpd_data = kmalloc(sizeof(*mmpd_data), GFP_KERNEL); |
8945 |
+- if (!mmpd_data) { |
8946 |
+- ext4_warning(sb, "not enough memory for mmpd_data"); |
8947 |
+- goto failed; |
8948 |
+- } |
8949 |
+- mmpd_data->sb = sb; |
8950 |
+- mmpd_data->bh = bh; |
8951 |
++ EXT4_SB(sb)->s_mmp_bh = bh; |
8952 |
+ |
8953 |
+ /* |
8954 |
+ * Start a kernel thread to update the MMP block periodically. |
8955 |
+ */ |
8956 |
+- EXT4_SB(sb)->s_mmp_tsk = kthread_run(kmmpd, mmpd_data, "kmmpd-%.*s", |
8957 |
++ EXT4_SB(sb)->s_mmp_tsk = kthread_run(kmmpd, sb, "kmmpd-%.*s", |
8958 |
+ (int)sizeof(mmp->mmp_bdevname), |
8959 |
+ bdevname(bh->b_bdev, |
8960 |
+ mmp->mmp_bdevname)); |
8961 |
+ if (IS_ERR(EXT4_SB(sb)->s_mmp_tsk)) { |
8962 |
+ EXT4_SB(sb)->s_mmp_tsk = NULL; |
8963 |
+- kfree(mmpd_data); |
8964 |
+ ext4_warning(sb, "Unable to create kmmpd thread for %s.", |
8965 |
+ sb->s_id); |
8966 |
+ goto failed; |
8967 |
+diff --git a/fs/ext4/super.c b/fs/ext4/super.c |
8968 |
+index 4a869bc5271b9..62dd98189e326 100644 |
8969 |
+--- a/fs/ext4/super.c |
8970 |
++++ b/fs/ext4/super.c |
8971 |
+@@ -1245,8 +1245,8 @@ static void ext4_put_super(struct super_block *sb) |
8972 |
+ ext4_xattr_destroy_cache(sbi->s_ea_block_cache); |
8973 |
+ sbi->s_ea_block_cache = NULL; |
8974 |
+ |
8975 |
+- if (sbi->s_mmp_tsk) |
8976 |
+- kthread_stop(sbi->s_mmp_tsk); |
8977 |
++ ext4_stop_mmpd(sbi); |
8978 |
++ |
8979 |
+ brelse(sbi->s_sbh); |
8980 |
+ sb->s_fs_info = NULL; |
8981 |
+ /* |
8982 |
+@@ -5168,8 +5168,7 @@ failed_mount3a: |
8983 |
+ failed_mount3: |
8984 |
+ flush_work(&sbi->s_error_work); |
8985 |
+ del_timer_sync(&sbi->s_err_report); |
8986 |
+- if (sbi->s_mmp_tsk) |
8987 |
+- kthread_stop(sbi->s_mmp_tsk); |
8988 |
++ ext4_stop_mmpd(sbi); |
8989 |
+ failed_mount2: |
8990 |
+ rcu_read_lock(); |
8991 |
+ group_desc = rcu_dereference(sbi->s_group_desc); |
8992 |
+@@ -5967,8 +5966,7 @@ static int ext4_remount(struct super_block *sb, int *flags, char *data) |
8993 |
+ */ |
8994 |
+ ext4_mark_recovery_complete(sb, es); |
8995 |
+ } |
8996 |
+- if (sbi->s_mmp_tsk) |
8997 |
+- kthread_stop(sbi->s_mmp_tsk); |
8998 |
++ ext4_stop_mmpd(sbi); |
8999 |
+ } else { |
9000 |
+ /* Make sure we can mount this feature set readwrite */ |
9001 |
+ if (ext4_has_feature_readonly(sb) || |
9002 |
+diff --git a/fs/f2fs/f2fs.h b/fs/f2fs/f2fs.h |
9003 |
+index f3fabb1edfe97..148fc1ce52d77 100644 |
9004 |
+--- a/fs/f2fs/f2fs.h |
9005 |
++++ b/fs/f2fs/f2fs.h |
9006 |
+@@ -3560,6 +3560,8 @@ void f2fs_destroy_garbage_collection_cache(void); |
9007 |
+ */ |
9008 |
+ int f2fs_recover_fsync_data(struct f2fs_sb_info *sbi, bool check_only); |
9009 |
+ bool f2fs_space_for_roll_forward(struct f2fs_sb_info *sbi); |
9010 |
++int __init f2fs_create_recovery_cache(void); |
9011 |
++void f2fs_destroy_recovery_cache(void); |
9012 |
+ |
9013 |
+ /* |
9014 |
+ * debug.c |
9015 |
+diff --git a/fs/f2fs/recovery.c b/fs/f2fs/recovery.c |
9016 |
+index da75d5d52f0ac..4ae055f39e211 100644 |
9017 |
+--- a/fs/f2fs/recovery.c |
9018 |
++++ b/fs/f2fs/recovery.c |
9019 |
+@@ -787,13 +787,6 @@ int f2fs_recover_fsync_data(struct f2fs_sb_info *sbi, bool check_only) |
9020 |
+ quota_enabled = f2fs_enable_quota_files(sbi, s_flags & SB_RDONLY); |
9021 |
+ #endif |
9022 |
+ |
9023 |
+- fsync_entry_slab = f2fs_kmem_cache_create("f2fs_fsync_inode_entry", |
9024 |
+- sizeof(struct fsync_inode_entry)); |
9025 |
+- if (!fsync_entry_slab) { |
9026 |
+- err = -ENOMEM; |
9027 |
+- goto out; |
9028 |
+- } |
9029 |
+- |
9030 |
+ INIT_LIST_HEAD(&inode_list); |
9031 |
+ INIT_LIST_HEAD(&tmp_inode_list); |
9032 |
+ INIT_LIST_HEAD(&dir_list); |
9033 |
+@@ -866,8 +859,6 @@ skip: |
9034 |
+ } |
9035 |
+ } |
9036 |
+ |
9037 |
+- kmem_cache_destroy(fsync_entry_slab); |
9038 |
+-out: |
9039 |
+ #ifdef CONFIG_QUOTA |
9040 |
+ /* Turn quotas off */ |
9041 |
+ if (quota_enabled) |
9042 |
+@@ -877,3 +868,17 @@ out: |
9043 |
+ |
9044 |
+ return ret ? ret: err; |
9045 |
+ } |
9046 |
++ |
9047 |
++int __init f2fs_create_recovery_cache(void) |
9048 |
++{ |
9049 |
++ fsync_entry_slab = f2fs_kmem_cache_create("f2fs_fsync_inode_entry", |
9050 |
++ sizeof(struct fsync_inode_entry)); |
9051 |
++ if (!fsync_entry_slab) |
9052 |
++ return -ENOMEM; |
9053 |
++ return 0; |
9054 |
++} |
9055 |
++ |
9056 |
++void f2fs_destroy_recovery_cache(void) |
9057 |
++{ |
9058 |
++ kmem_cache_destroy(fsync_entry_slab); |
9059 |
++} |
9060 |
+diff --git a/fs/f2fs/super.c b/fs/f2fs/super.c |
9061 |
+index d852d96773a32..1f7bc4b3f6aec 100644 |
9062 |
+--- a/fs/f2fs/super.c |
9063 |
++++ b/fs/f2fs/super.c |
9064 |
+@@ -4187,9 +4187,12 @@ static int __init init_f2fs_fs(void) |
9065 |
+ err = f2fs_create_checkpoint_caches(); |
9066 |
+ if (err) |
9067 |
+ goto free_segment_manager_caches; |
9068 |
+- err = f2fs_create_extent_cache(); |
9069 |
++ err = f2fs_create_recovery_cache(); |
9070 |
+ if (err) |
9071 |
+ goto free_checkpoint_caches; |
9072 |
++ err = f2fs_create_extent_cache(); |
9073 |
++ if (err) |
9074 |
++ goto free_recovery_cache; |
9075 |
+ err = f2fs_create_garbage_collection_cache(); |
9076 |
+ if (err) |
9077 |
+ goto free_extent_cache; |
9078 |
+@@ -4238,6 +4241,8 @@ free_garbage_collection_cache: |
9079 |
+ f2fs_destroy_garbage_collection_cache(); |
9080 |
+ free_extent_cache: |
9081 |
+ f2fs_destroy_extent_cache(); |
9082 |
++free_recovery_cache: |
9083 |
++ f2fs_destroy_recovery_cache(); |
9084 |
+ free_checkpoint_caches: |
9085 |
+ f2fs_destroy_checkpoint_caches(); |
9086 |
+ free_segment_manager_caches: |
9087 |
+@@ -4263,6 +4268,7 @@ static void __exit exit_f2fs_fs(void) |
9088 |
+ f2fs_exit_sysfs(); |
9089 |
+ f2fs_destroy_garbage_collection_cache(); |
9090 |
+ f2fs_destroy_extent_cache(); |
9091 |
++ f2fs_destroy_recovery_cache(); |
9092 |
+ f2fs_destroy_checkpoint_caches(); |
9093 |
+ f2fs_destroy_segment_manager_caches(); |
9094 |
+ f2fs_destroy_node_manager_caches(); |
9095 |
+diff --git a/fs/io-wq.c b/fs/io-wq.c |
9096 |
+index 4eba531bea5a9..b836737f96f31 100644 |
9097 |
+--- a/fs/io-wq.c |
9098 |
++++ b/fs/io-wq.c |
9099 |
+@@ -243,7 +243,8 @@ static void io_wqe_wake_worker(struct io_wqe *wqe, struct io_wqe_acct *acct) |
9100 |
+ * Most likely an attempt to queue unbounded work on an io_wq that |
9101 |
+ * wasn't setup with any unbounded workers. |
9102 |
+ */ |
9103 |
+- WARN_ON_ONCE(!acct->max_workers); |
9104 |
++ if (unlikely(!acct->max_workers)) |
9105 |
++ pr_warn_once("io-wq is not configured for unbound workers"); |
9106 |
+ |
9107 |
+ rcu_read_lock(); |
9108 |
+ ret = io_wqe_activate_free_worker(wqe); |
9109 |
+@@ -991,6 +992,8 @@ struct io_wq *io_wq_create(unsigned bounded, struct io_wq_data *data) |
9110 |
+ |
9111 |
+ if (WARN_ON_ONCE(!data->free_work || !data->do_work)) |
9112 |
+ return ERR_PTR(-EINVAL); |
9113 |
++ if (WARN_ON_ONCE(!bounded)) |
9114 |
++ return ERR_PTR(-EINVAL); |
9115 |
+ |
9116 |
+ wq = kzalloc(sizeof(*wq), GFP_KERNEL); |
9117 |
+ if (!wq) |
9118 |
+diff --git a/fs/jfs/inode.c b/fs/jfs/inode.c |
9119 |
+index 6f65bfa9f18d5..b0eb9c85eea0c 100644 |
9120 |
+--- a/fs/jfs/inode.c |
9121 |
++++ b/fs/jfs/inode.c |
9122 |
+@@ -151,7 +151,8 @@ void jfs_evict_inode(struct inode *inode) |
9123 |
+ if (test_cflag(COMMIT_Freewmap, inode)) |
9124 |
+ jfs_free_zero_link(inode); |
9125 |
+ |
9126 |
+- diFree(inode); |
9127 |
++ if (JFS_SBI(inode->i_sb)->ipimap) |
9128 |
++ diFree(inode); |
9129 |
+ |
9130 |
+ /* |
9131 |
+ * Free the inode from the quota allocation. |
9132 |
+diff --git a/fs/reiserfs/journal.c b/fs/reiserfs/journal.c |
9133 |
+index e98f99338f8f8..df5fc12a6ceed 100644 |
9134 |
+--- a/fs/reiserfs/journal.c |
9135 |
++++ b/fs/reiserfs/journal.c |
9136 |
+@@ -2760,6 +2760,20 @@ int journal_init(struct super_block *sb, const char *j_dev_name, |
9137 |
+ goto free_and_return; |
9138 |
+ } |
9139 |
+ |
9140 |
++ /* |
9141 |
++ * Sanity check to see if journal first block is correct. |
9142 |
++ * If journal first block is invalid it can cause |
9143 |
++ * zeroing important superblock members. |
9144 |
++ */ |
9145 |
++ if (!SB_ONDISK_JOURNAL_DEVICE(sb) && |
9146 |
++ SB_ONDISK_JOURNAL_1st_BLOCK(sb) < SB_JOURNAL_1st_RESERVED_BLOCK(sb)) { |
9147 |
++ reiserfs_warning(sb, "journal-1393", |
9148 |
++ "journal 1st super block is invalid: 1st reserved block %d, but actual 1st block is %d", |
9149 |
++ SB_JOURNAL_1st_RESERVED_BLOCK(sb), |
9150 |
++ SB_ONDISK_JOURNAL_1st_BLOCK(sb)); |
9151 |
++ goto free_and_return; |
9152 |
++ } |
9153 |
++ |
9154 |
+ if (journal_init_dev(sb, journal, j_dev_name) != 0) { |
9155 |
+ reiserfs_warning(sb, "sh-462", |
9156 |
+ "unable to initialize journal device"); |
9157 |
+diff --git a/fs/ubifs/super.c b/fs/ubifs/super.c |
9158 |
+index ddb2ca636c93d..274e635e00c3d 100644 |
9159 |
+--- a/fs/ubifs/super.c |
9160 |
++++ b/fs/ubifs/super.c |
9161 |
+@@ -275,6 +275,7 @@ static struct inode *ubifs_alloc_inode(struct super_block *sb) |
9162 |
+ memset((void *)ui + sizeof(struct inode), 0, |
9163 |
+ sizeof(struct ubifs_inode) - sizeof(struct inode)); |
9164 |
+ mutex_init(&ui->ui_mutex); |
9165 |
++ init_rwsem(&ui->xattr_sem); |
9166 |
+ spin_lock_init(&ui->ui_lock); |
9167 |
+ return &ui->vfs_inode; |
9168 |
+ }; |
9169 |
+diff --git a/fs/ubifs/ubifs.h b/fs/ubifs/ubifs.h |
9170 |
+index 7fdfdbda4b8ae..15847c1474ba1 100644 |
9171 |
+--- a/fs/ubifs/ubifs.h |
9172 |
++++ b/fs/ubifs/ubifs.h |
9173 |
+@@ -356,6 +356,7 @@ struct ubifs_gced_idx_leb { |
9174 |
+ * @ui_mutex: serializes inode write-back with the rest of VFS operations, |
9175 |
+ * serializes "clean <-> dirty" state changes, serializes bulk-read, |
9176 |
+ * protects @dirty, @bulk_read, @ui_size, and @xattr_size |
9177 |
++ * @xattr_sem: serilizes write operations (remove|set|create) on xattr |
9178 |
+ * @ui_lock: protects @synced_i_size |
9179 |
+ * @synced_i_size: synchronized size of inode, i.e. the value of inode size |
9180 |
+ * currently stored on the flash; used only for regular file |
9181 |
+@@ -409,6 +410,7 @@ struct ubifs_inode { |
9182 |
+ unsigned int bulk_read:1; |
9183 |
+ unsigned int compr_type:2; |
9184 |
+ struct mutex ui_mutex; |
9185 |
++ struct rw_semaphore xattr_sem; |
9186 |
+ spinlock_t ui_lock; |
9187 |
+ loff_t synced_i_size; |
9188 |
+ loff_t ui_size; |
9189 |
+diff --git a/fs/ubifs/xattr.c b/fs/ubifs/xattr.c |
9190 |
+index 6b1e9830b2745..1fce27e9b7697 100644 |
9191 |
+--- a/fs/ubifs/xattr.c |
9192 |
++++ b/fs/ubifs/xattr.c |
9193 |
+@@ -285,6 +285,7 @@ int ubifs_xattr_set(struct inode *host, const char *name, const void *value, |
9194 |
+ if (!xent) |
9195 |
+ return -ENOMEM; |
9196 |
+ |
9197 |
++ down_write(&ubifs_inode(host)->xattr_sem); |
9198 |
+ /* |
9199 |
+ * The extended attribute entries are stored in LNC, so multiple |
9200 |
+ * look-ups do not involve reading the flash. |
9201 |
+@@ -319,6 +320,7 @@ int ubifs_xattr_set(struct inode *host, const char *name, const void *value, |
9202 |
+ iput(inode); |
9203 |
+ |
9204 |
+ out_free: |
9205 |
++ up_write(&ubifs_inode(host)->xattr_sem); |
9206 |
+ kfree(xent); |
9207 |
+ return err; |
9208 |
+ } |
9209 |
+@@ -341,18 +343,19 @@ ssize_t ubifs_xattr_get(struct inode *host, const char *name, void *buf, |
9210 |
+ if (!xent) |
9211 |
+ return -ENOMEM; |
9212 |
+ |
9213 |
++ down_read(&ubifs_inode(host)->xattr_sem); |
9214 |
+ xent_key_init(c, &key, host->i_ino, &nm); |
9215 |
+ err = ubifs_tnc_lookup_nm(c, &key, xent, &nm); |
9216 |
+ if (err) { |
9217 |
+ if (err == -ENOENT) |
9218 |
+ err = -ENODATA; |
9219 |
+- goto out_unlock; |
9220 |
++ goto out_cleanup; |
9221 |
+ } |
9222 |
+ |
9223 |
+ inode = iget_xattr(c, le64_to_cpu(xent->inum)); |
9224 |
+ if (IS_ERR(inode)) { |
9225 |
+ err = PTR_ERR(inode); |
9226 |
+- goto out_unlock; |
9227 |
++ goto out_cleanup; |
9228 |
+ } |
9229 |
+ |
9230 |
+ ui = ubifs_inode(inode); |
9231 |
+@@ -374,7 +377,8 @@ ssize_t ubifs_xattr_get(struct inode *host, const char *name, void *buf, |
9232 |
+ out_iput: |
9233 |
+ mutex_unlock(&ui->ui_mutex); |
9234 |
+ iput(inode); |
9235 |
+-out_unlock: |
9236 |
++out_cleanup: |
9237 |
++ up_read(&ubifs_inode(host)->xattr_sem); |
9238 |
+ kfree(xent); |
9239 |
+ return err; |
9240 |
+ } |
9241 |
+@@ -406,16 +410,21 @@ ssize_t ubifs_listxattr(struct dentry *dentry, char *buffer, size_t size) |
9242 |
+ dbg_gen("ino %lu ('%pd'), buffer size %zd", host->i_ino, |
9243 |
+ dentry, size); |
9244 |
+ |
9245 |
++ down_read(&host_ui->xattr_sem); |
9246 |
+ len = host_ui->xattr_names + host_ui->xattr_cnt; |
9247 |
+- if (!buffer) |
9248 |
++ if (!buffer) { |
9249 |
+ /* |
9250 |
+ * We should return the minimum buffer size which will fit a |
9251 |
+ * null-terminated list of all the extended attribute names. |
9252 |
+ */ |
9253 |
+- return len; |
9254 |
++ err = len; |
9255 |
++ goto out_err; |
9256 |
++ } |
9257 |
+ |
9258 |
+- if (len > size) |
9259 |
+- return -ERANGE; |
9260 |
++ if (len > size) { |
9261 |
++ err = -ERANGE; |
9262 |
++ goto out_err; |
9263 |
++ } |
9264 |
+ |
9265 |
+ lowest_xent_key(c, &key, host->i_ino); |
9266 |
+ while (1) { |
9267 |
+@@ -437,8 +446,9 @@ ssize_t ubifs_listxattr(struct dentry *dentry, char *buffer, size_t size) |
9268 |
+ pxent = xent; |
9269 |
+ key_read(c, &xent->key, &key); |
9270 |
+ } |
9271 |
+- |
9272 |
+ kfree(pxent); |
9273 |
++ up_read(&host_ui->xattr_sem); |
9274 |
++ |
9275 |
+ if (err != -ENOENT) { |
9276 |
+ ubifs_err(c, "cannot find next direntry, error %d", err); |
9277 |
+ return err; |
9278 |
+@@ -446,6 +456,10 @@ ssize_t ubifs_listxattr(struct dentry *dentry, char *buffer, size_t size) |
9279 |
+ |
9280 |
+ ubifs_assert(c, written <= size); |
9281 |
+ return written; |
9282 |
++ |
9283 |
++out_err: |
9284 |
++ up_read(&host_ui->xattr_sem); |
9285 |
++ return err; |
9286 |
+ } |
9287 |
+ |
9288 |
+ static int remove_xattr(struct ubifs_info *c, struct inode *host, |
9289 |
+@@ -504,6 +518,7 @@ int ubifs_purge_xattrs(struct inode *host) |
9290 |
+ ubifs_warn(c, "inode %lu has too many xattrs, doing a non-atomic deletion", |
9291 |
+ host->i_ino); |
9292 |
+ |
9293 |
++ down_write(&ubifs_inode(host)->xattr_sem); |
9294 |
+ lowest_xent_key(c, &key, host->i_ino); |
9295 |
+ while (1) { |
9296 |
+ xent = ubifs_tnc_next_ent(c, &key, &nm); |
9297 |
+@@ -523,7 +538,7 @@ int ubifs_purge_xattrs(struct inode *host) |
9298 |
+ ubifs_ro_mode(c, err); |
9299 |
+ kfree(pxent); |
9300 |
+ kfree(xent); |
9301 |
+- return err; |
9302 |
++ goto out_err; |
9303 |
+ } |
9304 |
+ |
9305 |
+ ubifs_assert(c, ubifs_inode(xino)->xattr); |
9306 |
+@@ -535,7 +550,7 @@ int ubifs_purge_xattrs(struct inode *host) |
9307 |
+ kfree(xent); |
9308 |
+ iput(xino); |
9309 |
+ ubifs_err(c, "cannot remove xattr, error %d", err); |
9310 |
+- return err; |
9311 |
++ goto out_err; |
9312 |
+ } |
9313 |
+ |
9314 |
+ iput(xino); |
9315 |
+@@ -544,14 +559,19 @@ int ubifs_purge_xattrs(struct inode *host) |
9316 |
+ pxent = xent; |
9317 |
+ key_read(c, &xent->key, &key); |
9318 |
+ } |
9319 |
+- |
9320 |
+ kfree(pxent); |
9321 |
++ up_write(&ubifs_inode(host)->xattr_sem); |
9322 |
++ |
9323 |
+ if (err != -ENOENT) { |
9324 |
+ ubifs_err(c, "cannot find next direntry, error %d", err); |
9325 |
+ return err; |
9326 |
+ } |
9327 |
+ |
9328 |
+ return 0; |
9329 |
++ |
9330 |
++out_err: |
9331 |
++ up_write(&ubifs_inode(host)->xattr_sem); |
9332 |
++ return err; |
9333 |
+ } |
9334 |
+ |
9335 |
+ /** |
9336 |
+@@ -594,6 +614,7 @@ static int ubifs_xattr_remove(struct inode *host, const char *name) |
9337 |
+ if (!xent) |
9338 |
+ return -ENOMEM; |
9339 |
+ |
9340 |
++ down_write(&ubifs_inode(host)->xattr_sem); |
9341 |
+ xent_key_init(c, &key, host->i_ino, &nm); |
9342 |
+ err = ubifs_tnc_lookup_nm(c, &key, xent, &nm); |
9343 |
+ if (err) { |
9344 |
+@@ -618,6 +639,7 @@ static int ubifs_xattr_remove(struct inode *host, const char *name) |
9345 |
+ iput(inode); |
9346 |
+ |
9347 |
+ out_free: |
9348 |
++ up_write(&ubifs_inode(host)->xattr_sem); |
9349 |
+ kfree(xent); |
9350 |
+ return err; |
9351 |
+ } |
9352 |
+diff --git a/fs/udf/namei.c b/fs/udf/namei.c |
9353 |
+index f146b3089f3da..6c5692ad42b55 100644 |
9354 |
+--- a/fs/udf/namei.c |
9355 |
++++ b/fs/udf/namei.c |
9356 |
+@@ -934,6 +934,10 @@ static int udf_symlink(struct user_namespace *mnt_userns, struct inode *dir, |
9357 |
+ iinfo->i_location.partitionReferenceNum, |
9358 |
+ 0); |
9359 |
+ epos.bh = udf_tgetblk(sb, block); |
9360 |
++ if (unlikely(!epos.bh)) { |
9361 |
++ err = -ENOMEM; |
9362 |
++ goto out_no_entry; |
9363 |
++ } |
9364 |
+ lock_buffer(epos.bh); |
9365 |
+ memset(epos.bh->b_data, 0x00, bsize); |
9366 |
+ set_buffer_uptodate(epos.bh); |
9367 |
+diff --git a/include/linux/blk_types.h b/include/linux/blk_types.h |
9368 |
+index db026b6ec15ab..e5cf12f102a21 100644 |
9369 |
+--- a/include/linux/blk_types.h |
9370 |
++++ b/include/linux/blk_types.h |
9371 |
+@@ -304,6 +304,7 @@ enum { |
9372 |
+ BIO_CGROUP_ACCT, /* has been accounted to a cgroup */ |
9373 |
+ BIO_TRACKED, /* set if bio goes through the rq_qos path */ |
9374 |
+ BIO_REMAPPED, |
9375 |
++ BIO_ZONE_WRITE_LOCKED, /* Owns a zoned device zone write lock */ |
9376 |
+ BIO_FLAG_LAST |
9377 |
+ }; |
9378 |
+ |
9379 |
+diff --git a/include/linux/mfd/abx500/ux500_chargalg.h b/include/linux/mfd/abx500/ux500_chargalg.h |
9380 |
+index 9b97d284d0ce8..bc3819dc33e12 100644 |
9381 |
+--- a/include/linux/mfd/abx500/ux500_chargalg.h |
9382 |
++++ b/include/linux/mfd/abx500/ux500_chargalg.h |
9383 |
+@@ -15,7 +15,7 @@ |
9384 |
+ * - POWER_SUPPLY_TYPE_USB, |
9385 |
+ * because only them store as drv_data pointer to struct ux500_charger. |
9386 |
+ */ |
9387 |
+-#define psy_to_ux500_charger(x) power_supply_get_drvdata(psy) |
9388 |
++#define psy_to_ux500_charger(x) power_supply_get_drvdata(x) |
9389 |
+ |
9390 |
+ /* Forward declaration */ |
9391 |
+ struct ux500_charger; |
9392 |
+diff --git a/include/linux/netdev_features.h b/include/linux/netdev_features.h |
9393 |
+index 3de38d6a0aeac..2c6b9e4162254 100644 |
9394 |
+--- a/include/linux/netdev_features.h |
9395 |
++++ b/include/linux/netdev_features.h |
9396 |
+@@ -93,7 +93,7 @@ enum { |
9397 |
+ |
9398 |
+ /* |
9399 |
+ * Add your fresh new feature above and remember to update |
9400 |
+- * netdev_features_strings[] in net/core/ethtool.c and maybe |
9401 |
++ * netdev_features_strings[] in net/ethtool/common.c and maybe |
9402 |
+ * some feature mask #defines below. Please also describe it |
9403 |
+ * in Documentation/networking/netdev-features.rst. |
9404 |
+ */ |
9405 |
+diff --git a/include/linux/of_mdio.h b/include/linux/of_mdio.h |
9406 |
+index 2b05e7f7c2385..da633d34ab866 100644 |
9407 |
+--- a/include/linux/of_mdio.h |
9408 |
++++ b/include/linux/of_mdio.h |
9409 |
+@@ -72,6 +72,13 @@ static inline int of_mdiobus_register(struct mii_bus *mdio, struct device_node * |
9410 |
+ return mdiobus_register(mdio); |
9411 |
+ } |
9412 |
+ |
9413 |
++static inline int devm_of_mdiobus_register(struct device *dev, |
9414 |
++ struct mii_bus *mdio, |
9415 |
++ struct device_node *np) |
9416 |
++{ |
9417 |
++ return devm_mdiobus_register(dev, mdio); |
9418 |
++} |
9419 |
++ |
9420 |
+ static inline struct mdio_device *of_mdio_find_device(struct device_node *np) |
9421 |
+ { |
9422 |
+ return NULL; |
9423 |
+diff --git a/include/linux/wait.h b/include/linux/wait.h |
9424 |
+index fe10e8570a522..6598ae35e1b5a 100644 |
9425 |
+--- a/include/linux/wait.h |
9426 |
++++ b/include/linux/wait.h |
9427 |
+@@ -1136,7 +1136,7 @@ do { \ |
9428 |
+ * Waitqueues which are removed from the waitqueue_head at wakeup time |
9429 |
+ */ |
9430 |
+ void prepare_to_wait(struct wait_queue_head *wq_head, struct wait_queue_entry *wq_entry, int state); |
9431 |
+-void prepare_to_wait_exclusive(struct wait_queue_head *wq_head, struct wait_queue_entry *wq_entry, int state); |
9432 |
++bool prepare_to_wait_exclusive(struct wait_queue_head *wq_head, struct wait_queue_entry *wq_entry, int state); |
9433 |
+ long prepare_to_wait_event(struct wait_queue_head *wq_head, struct wait_queue_entry *wq_entry, int state); |
9434 |
+ void finish_wait(struct wait_queue_head *wq_head, struct wait_queue_entry *wq_entry); |
9435 |
+ long wait_woken(struct wait_queue_entry *wq_entry, unsigned mode, long timeout); |
9436 |
+diff --git a/include/media/v4l2-subdev.h b/include/media/v4l2-subdev.h |
9437 |
+index d0e9a5bdb08bb..6078dd29f3e77 100644 |
9438 |
+--- a/include/media/v4l2-subdev.h |
9439 |
++++ b/include/media/v4l2-subdev.h |
9440 |
+@@ -162,6 +162,9 @@ struct v4l2_subdev_io_pin_config { |
9441 |
+ * @s_gpio: set GPIO pins. Very simple right now, might need to be extended with |
9442 |
+ * a direction argument if needed. |
9443 |
+ * |
9444 |
++ * @command: called by in-kernel drivers in order to call functions internal |
9445 |
++ * to subdev drivers driver that have a separate callback. |
9446 |
++ * |
9447 |
+ * @ioctl: called at the end of ioctl() syscall handler at the V4L2 core. |
9448 |
+ * used to provide support for private ioctls used on the driver. |
9449 |
+ * |
9450 |
+@@ -193,6 +196,7 @@ struct v4l2_subdev_core_ops { |
9451 |
+ int (*load_fw)(struct v4l2_subdev *sd); |
9452 |
+ int (*reset)(struct v4l2_subdev *sd, u32 val); |
9453 |
+ int (*s_gpio)(struct v4l2_subdev *sd, u32 val); |
9454 |
++ long (*command)(struct v4l2_subdev *sd, unsigned int cmd, void *arg); |
9455 |
+ long (*ioctl)(struct v4l2_subdev *sd, unsigned int cmd, void *arg); |
9456 |
+ #ifdef CONFIG_COMPAT |
9457 |
+ long (*compat_ioctl32)(struct v4l2_subdev *sd, unsigned int cmd, |
9458 |
+diff --git a/include/net/flow_offload.h b/include/net/flow_offload.h |
9459 |
+index e6bd8ebf9ac33..c28ea1f0ec9c0 100644 |
9460 |
+--- a/include/net/flow_offload.h |
9461 |
++++ b/include/net/flow_offload.h |
9462 |
+@@ -313,12 +313,14 @@ flow_action_mixed_hw_stats_check(const struct flow_action *action, |
9463 |
+ if (flow_offload_has_one_action(action)) |
9464 |
+ return true; |
9465 |
+ |
9466 |
+- flow_action_for_each(i, action_entry, action) { |
9467 |
+- if (i && action_entry->hw_stats != last_hw_stats) { |
9468 |
+- NL_SET_ERR_MSG_MOD(extack, "Mixing HW stats types for actions is not supported"); |
9469 |
+- return false; |
9470 |
++ if (action) { |
9471 |
++ flow_action_for_each(i, action_entry, action) { |
9472 |
++ if (i && action_entry->hw_stats != last_hw_stats) { |
9473 |
++ NL_SET_ERR_MSG_MOD(extack, "Mixing HW stats types for actions is not supported"); |
9474 |
++ return false; |
9475 |
++ } |
9476 |
++ last_hw_stats = action_entry->hw_stats; |
9477 |
+ } |
9478 |
+- last_hw_stats = action_entry->hw_stats; |
9479 |
+ } |
9480 |
+ return true; |
9481 |
+ } |
9482 |
+diff --git a/include/net/sctp/structs.h b/include/net/sctp/structs.h |
9483 |
+index 1aa585216f34b..d49593c72a555 100644 |
9484 |
+--- a/include/net/sctp/structs.h |
9485 |
++++ b/include/net/sctp/structs.h |
9486 |
+@@ -461,7 +461,7 @@ struct sctp_af { |
9487 |
+ int saddr); |
9488 |
+ void (*from_sk) (union sctp_addr *, |
9489 |
+ struct sock *sk); |
9490 |
+- void (*from_addr_param) (union sctp_addr *, |
9491 |
++ bool (*from_addr_param) (union sctp_addr *, |
9492 |
+ union sctp_addr_param *, |
9493 |
+ __be16 port, int iif); |
9494 |
+ int (*to_addr_param) (const union sctp_addr *, |
9495 |
+diff --git a/include/uapi/asm-generic/socket.h b/include/uapi/asm-generic/socket.h |
9496 |
+index 4dcd13d097a9e..d588c244ec2fa 100644 |
9497 |
+--- a/include/uapi/asm-generic/socket.h |
9498 |
++++ b/include/uapi/asm-generic/socket.h |
9499 |
+@@ -122,6 +122,8 @@ |
9500 |
+ #define SO_PREFER_BUSY_POLL 69 |
9501 |
+ #define SO_BUSY_POLL_BUDGET 70 |
9502 |
+ |
9503 |
++#define SO_NETNS_COOKIE 71 |
9504 |
++ |
9505 |
+ #if !defined(__KERNEL__) |
9506 |
+ |
9507 |
+ #if __BITS_PER_LONG == 64 || (defined(__x86_64__) && defined(__ILP32__)) |
9508 |
+diff --git a/include/uapi/linux/ethtool.h b/include/uapi/linux/ethtool.h |
9509 |
+index 5afea692a3f7c..e36eee9132ecb 100644 |
9510 |
+--- a/include/uapi/linux/ethtool.h |
9511 |
++++ b/include/uapi/linux/ethtool.h |
9512 |
+@@ -233,7 +233,7 @@ enum tunable_id { |
9513 |
+ ETHTOOL_PFC_PREVENTION_TOUT, /* timeout in msecs */ |
9514 |
+ /* |
9515 |
+ * Add your fresh new tunable attribute above and remember to update |
9516 |
+- * tunable_strings[] in net/core/ethtool.c |
9517 |
++ * tunable_strings[] in net/ethtool/common.c |
9518 |
+ */ |
9519 |
+ __ETHTOOL_TUNABLE_COUNT, |
9520 |
+ }; |
9521 |
+@@ -297,7 +297,7 @@ enum phy_tunable_id { |
9522 |
+ ETHTOOL_PHY_EDPD, |
9523 |
+ /* |
9524 |
+ * Add your fresh new phy tunable attribute above and remember to update |
9525 |
+- * phy_tunable_strings[] in net/core/ethtool.c |
9526 |
++ * phy_tunable_strings[] in net/ethtool/common.c |
9527 |
+ */ |
9528 |
+ __ETHTOOL_PHY_TUNABLE_COUNT, |
9529 |
+ }; |
9530 |
+diff --git a/kernel/bpf/core.c b/kernel/bpf/core.c |
9531 |
+index 75244ecb2389f..952d98beda636 100644 |
9532 |
+--- a/kernel/bpf/core.c |
9533 |
++++ b/kernel/bpf/core.c |
9534 |
+@@ -1399,29 +1399,54 @@ static u64 ___bpf_prog_run(u64 *regs, const struct bpf_insn *insn, u64 *stack) |
9535 |
+ select_insn: |
9536 |
+ goto *jumptable[insn->code]; |
9537 |
+ |
9538 |
+- /* ALU */ |
9539 |
+-#define ALU(OPCODE, OP) \ |
9540 |
+- ALU64_##OPCODE##_X: \ |
9541 |
+- DST = DST OP SRC; \ |
9542 |
+- CONT; \ |
9543 |
+- ALU_##OPCODE##_X: \ |
9544 |
+- DST = (u32) DST OP (u32) SRC; \ |
9545 |
+- CONT; \ |
9546 |
+- ALU64_##OPCODE##_K: \ |
9547 |
+- DST = DST OP IMM; \ |
9548 |
+- CONT; \ |
9549 |
+- ALU_##OPCODE##_K: \ |
9550 |
+- DST = (u32) DST OP (u32) IMM; \ |
9551 |
++ /* Explicitly mask the register-based shift amounts with 63 or 31 |
9552 |
++ * to avoid undefined behavior. Normally this won't affect the |
9553 |
++ * generated code, for example, in case of native 64 bit archs such |
9554 |
++ * as x86-64 or arm64, the compiler is optimizing the AND away for |
9555 |
++ * the interpreter. In case of JITs, each of the JIT backends compiles |
9556 |
++ * the BPF shift operations to machine instructions which produce |
9557 |
++ * implementation-defined results in such a case; the resulting |
9558 |
++ * contents of the register may be arbitrary, but program behaviour |
9559 |
++ * as a whole remains defined. In other words, in case of JIT backends, |
9560 |
++ * the AND must /not/ be added to the emitted LSH/RSH/ARSH translation. |
9561 |
++ */ |
9562 |
++ /* ALU (shifts) */ |
9563 |
++#define SHT(OPCODE, OP) \ |
9564 |
++ ALU64_##OPCODE##_X: \ |
9565 |
++ DST = DST OP (SRC & 63); \ |
9566 |
++ CONT; \ |
9567 |
++ ALU_##OPCODE##_X: \ |
9568 |
++ DST = (u32) DST OP ((u32) SRC & 31); \ |
9569 |
++ CONT; \ |
9570 |
++ ALU64_##OPCODE##_K: \ |
9571 |
++ DST = DST OP IMM; \ |
9572 |
++ CONT; \ |
9573 |
++ ALU_##OPCODE##_K: \ |
9574 |
++ DST = (u32) DST OP (u32) IMM; \ |
9575 |
++ CONT; |
9576 |
++ /* ALU (rest) */ |
9577 |
++#define ALU(OPCODE, OP) \ |
9578 |
++ ALU64_##OPCODE##_X: \ |
9579 |
++ DST = DST OP SRC; \ |
9580 |
++ CONT; \ |
9581 |
++ ALU_##OPCODE##_X: \ |
9582 |
++ DST = (u32) DST OP (u32) SRC; \ |
9583 |
++ CONT; \ |
9584 |
++ ALU64_##OPCODE##_K: \ |
9585 |
++ DST = DST OP IMM; \ |
9586 |
++ CONT; \ |
9587 |
++ ALU_##OPCODE##_K: \ |
9588 |
++ DST = (u32) DST OP (u32) IMM; \ |
9589 |
+ CONT; |
9590 |
+- |
9591 |
+ ALU(ADD, +) |
9592 |
+ ALU(SUB, -) |
9593 |
+ ALU(AND, &) |
9594 |
+ ALU(OR, |) |
9595 |
+- ALU(LSH, <<) |
9596 |
+- ALU(RSH, >>) |
9597 |
+ ALU(XOR, ^) |
9598 |
+ ALU(MUL, *) |
9599 |
++ SHT(LSH, <<) |
9600 |
++ SHT(RSH, >>) |
9601 |
++#undef SHT |
9602 |
+ #undef ALU |
9603 |
+ ALU_NEG: |
9604 |
+ DST = (u32) -DST; |
9605 |
+@@ -1446,13 +1471,13 @@ select_insn: |
9606 |
+ insn++; |
9607 |
+ CONT; |
9608 |
+ ALU_ARSH_X: |
9609 |
+- DST = (u64) (u32) (((s32) DST) >> SRC); |
9610 |
++ DST = (u64) (u32) (((s32) DST) >> (SRC & 31)); |
9611 |
+ CONT; |
9612 |
+ ALU_ARSH_K: |
9613 |
+ DST = (u64) (u32) (((s32) DST) >> IMM); |
9614 |
+ CONT; |
9615 |
+ ALU64_ARSH_X: |
9616 |
+- (*(s64 *) &DST) >>= SRC; |
9617 |
++ (*(s64 *) &DST) >>= (SRC & 63); |
9618 |
+ CONT; |
9619 |
+ ALU64_ARSH_K: |
9620 |
+ (*(s64 *) &DST) >>= IMM; |
9621 |
+diff --git a/kernel/bpf/ringbuf.c b/kernel/bpf/ringbuf.c |
9622 |
+index 84b3b35fc0d05..9e0c10c6892ad 100644 |
9623 |
+--- a/kernel/bpf/ringbuf.c |
9624 |
++++ b/kernel/bpf/ringbuf.c |
9625 |
+@@ -8,6 +8,7 @@ |
9626 |
+ #include <linux/vmalloc.h> |
9627 |
+ #include <linux/wait.h> |
9628 |
+ #include <linux/poll.h> |
9629 |
++#include <linux/kmemleak.h> |
9630 |
+ #include <uapi/linux/btf.h> |
9631 |
+ |
9632 |
+ #define RINGBUF_CREATE_FLAG_MASK (BPF_F_NUMA_NODE) |
9633 |
+@@ -105,6 +106,7 @@ static struct bpf_ringbuf *bpf_ringbuf_area_alloc(size_t data_sz, int numa_node) |
9634 |
+ rb = vmap(pages, nr_meta_pages + 2 * nr_data_pages, |
9635 |
+ VM_ALLOC | VM_USERMAP, PAGE_KERNEL); |
9636 |
+ if (rb) { |
9637 |
++ kmemleak_not_leak(pages); |
9638 |
+ rb->pages = pages; |
9639 |
+ rb->nr_pages = nr_pages; |
9640 |
+ return rb; |
9641 |
+diff --git a/kernel/cpu.c b/kernel/cpu.c |
9642 |
+index 1b6302ecbabe9..83e65219da567 100644 |
9643 |
+--- a/kernel/cpu.c |
9644 |
++++ b/kernel/cpu.c |
9645 |
+@@ -32,6 +32,7 @@ |
9646 |
+ #include <linux/relay.h> |
9647 |
+ #include <linux/slab.h> |
9648 |
+ #include <linux/percpu-rwsem.h> |
9649 |
++#include <linux/cpuset.h> |
9650 |
+ |
9651 |
+ #include <trace/events/power.h> |
9652 |
+ #define CREATE_TRACE_POINTS |
9653 |
+@@ -821,6 +822,52 @@ void __init cpuhp_threads_init(void) |
9654 |
+ kthread_unpark(this_cpu_read(cpuhp_state.thread)); |
9655 |
+ } |
9656 |
+ |
9657 |
++/* |
9658 |
++ * |
9659 |
++ * Serialize hotplug trainwrecks outside of the cpu_hotplug_lock |
9660 |
++ * protected region. |
9661 |
++ * |
9662 |
++ * The operation is still serialized against concurrent CPU hotplug via |
9663 |
++ * cpu_add_remove_lock, i.e. CPU map protection. But it is _not_ |
9664 |
++ * serialized against other hotplug related activity like adding or |
9665 |
++ * removing of state callbacks and state instances, which invoke either the |
9666 |
++ * startup or the teardown callback of the affected state. |
9667 |
++ * |
9668 |
++ * This is required for subsystems which are unfixable vs. CPU hotplug and |
9669 |
++ * evade lock inversion problems by scheduling work which has to be |
9670 |
++ * completed _before_ cpu_up()/_cpu_down() returns. |
9671 |
++ * |
9672 |
++ * Don't even think about adding anything to this for any new code or even |
9673 |
++ * drivers. It's only purpose is to keep existing lock order trainwrecks |
9674 |
++ * working. |
9675 |
++ * |
9676 |
++ * For cpu_down() there might be valid reasons to finish cleanups which are |
9677 |
++ * not required to be done under cpu_hotplug_lock, but that's a different |
9678 |
++ * story and would be not invoked via this. |
9679 |
++ */ |
9680 |
++static void cpu_up_down_serialize_trainwrecks(bool tasks_frozen) |
9681 |
++{ |
9682 |
++ /* |
9683 |
++ * cpusets delegate hotplug operations to a worker to "solve" the |
9684 |
++ * lock order problems. Wait for the worker, but only if tasks are |
9685 |
++ * _not_ frozen (suspend, hibernate) as that would wait forever. |
9686 |
++ * |
9687 |
++ * The wait is required because otherwise the hotplug operation |
9688 |
++ * returns with inconsistent state, which could even be observed in |
9689 |
++ * user space when a new CPU is brought up. The CPU plug uevent |
9690 |
++ * would be delivered and user space reacting on it would fail to |
9691 |
++ * move tasks to the newly plugged CPU up to the point where the |
9692 |
++ * work has finished because up to that point the newly plugged CPU |
9693 |
++ * is not assignable in cpusets/cgroups. On unplug that's not |
9694 |
++ * necessarily a visible issue, but it is still inconsistent state, |
9695 |
++ * which is the real problem which needs to be "fixed". This can't |
9696 |
++ * prevent the transient state between scheduling the work and |
9697 |
++ * returning from waiting for it. |
9698 |
++ */ |
9699 |
++ if (!tasks_frozen) |
9700 |
++ cpuset_wait_for_hotplug(); |
9701 |
++} |
9702 |
++ |
9703 |
+ #ifdef CONFIG_HOTPLUG_CPU |
9704 |
+ #ifndef arch_clear_mm_cpumask_cpu |
9705 |
+ #define arch_clear_mm_cpumask_cpu(cpu, mm) cpumask_clear_cpu(cpu, mm_cpumask(mm)) |
9706 |
+@@ -1058,6 +1105,7 @@ out: |
9707 |
+ */ |
9708 |
+ lockup_detector_cleanup(); |
9709 |
+ arch_smt_update(); |
9710 |
++ cpu_up_down_serialize_trainwrecks(tasks_frozen); |
9711 |
+ return ret; |
9712 |
+ } |
9713 |
+ |
9714 |
+@@ -1254,6 +1302,7 @@ static int _cpu_up(unsigned int cpu, int tasks_frozen, enum cpuhp_state target) |
9715 |
+ out: |
9716 |
+ cpus_write_unlock(); |
9717 |
+ arch_smt_update(); |
9718 |
++ cpu_up_down_serialize_trainwrecks(tasks_frozen); |
9719 |
+ return ret; |
9720 |
+ } |
9721 |
+ |
9722 |
+diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c |
9723 |
+index 20ac5dff9a0ce..572f312cc8039 100644 |
9724 |
+--- a/kernel/sched/fair.c |
9725 |
++++ b/kernel/sched/fair.c |
9726 |
+@@ -3665,15 +3665,15 @@ update_cfs_rq_load_avg(u64 now, struct cfs_rq *cfs_rq) |
9727 |
+ |
9728 |
+ r = removed_load; |
9729 |
+ sub_positive(&sa->load_avg, r); |
9730 |
+- sub_positive(&sa->load_sum, r * divider); |
9731 |
++ sa->load_sum = sa->load_avg * divider; |
9732 |
+ |
9733 |
+ r = removed_util; |
9734 |
+ sub_positive(&sa->util_avg, r); |
9735 |
+- sub_positive(&sa->util_sum, r * divider); |
9736 |
++ sa->util_sum = sa->util_avg * divider; |
9737 |
+ |
9738 |
+ r = removed_runnable; |
9739 |
+ sub_positive(&sa->runnable_avg, r); |
9740 |
+- sub_positive(&sa->runnable_sum, r * divider); |
9741 |
++ sa->runnable_sum = sa->runnable_avg * divider; |
9742 |
+ |
9743 |
+ /* |
9744 |
+ * removed_runnable is the unweighted version of removed_load so we |
9745 |
+diff --git a/kernel/sched/wait.c b/kernel/sched/wait.c |
9746 |
+index 183cc6ae68a68..76577d1642a5d 100644 |
9747 |
+--- a/kernel/sched/wait.c |
9748 |
++++ b/kernel/sched/wait.c |
9749 |
+@@ -264,17 +264,22 @@ prepare_to_wait(struct wait_queue_head *wq_head, struct wait_queue_entry *wq_ent |
9750 |
+ } |
9751 |
+ EXPORT_SYMBOL(prepare_to_wait); |
9752 |
+ |
9753 |
+-void |
9754 |
++/* Returns true if we are the first waiter in the queue, false otherwise. */ |
9755 |
++bool |
9756 |
+ prepare_to_wait_exclusive(struct wait_queue_head *wq_head, struct wait_queue_entry *wq_entry, int state) |
9757 |
+ { |
9758 |
+ unsigned long flags; |
9759 |
++ bool was_empty = false; |
9760 |
+ |
9761 |
+ wq_entry->flags |= WQ_FLAG_EXCLUSIVE; |
9762 |
+ spin_lock_irqsave(&wq_head->lock, flags); |
9763 |
+- if (list_empty(&wq_entry->entry)) |
9764 |
++ if (list_empty(&wq_entry->entry)) { |
9765 |
++ was_empty = list_empty(&wq_head->head); |
9766 |
+ __add_wait_queue_entry_tail(wq_head, wq_entry); |
9767 |
++ } |
9768 |
+ set_current_state(state); |
9769 |
+ spin_unlock_irqrestore(&wq_head->lock, flags); |
9770 |
++ return was_empty; |
9771 |
+ } |
9772 |
+ EXPORT_SYMBOL(prepare_to_wait_exclusive); |
9773 |
+ |
9774 |
+diff --git a/kernel/trace/trace.c b/kernel/trace/trace.c |
9775 |
+index 7c8151d74faf0..534bab352fc94 100644 |
9776 |
+--- a/kernel/trace/trace.c |
9777 |
++++ b/kernel/trace/trace.c |
9778 |
+@@ -2184,8 +2184,15 @@ void tracing_reset_all_online_cpus(void) |
9779 |
+ } |
9780 |
+ } |
9781 |
+ |
9782 |
++/* |
9783 |
++ * The tgid_map array maps from pid to tgid; i.e. the value stored at index i |
9784 |
++ * is the tgid last observed corresponding to pid=i. |
9785 |
++ */ |
9786 |
+ static int *tgid_map; |
9787 |
+ |
9788 |
++/* The maximum valid index into tgid_map. */ |
9789 |
++static size_t tgid_map_max; |
9790 |
++ |
9791 |
+ #define SAVED_CMDLINES_DEFAULT 128 |
9792 |
+ #define NO_CMDLINE_MAP UINT_MAX |
9793 |
+ static arch_spinlock_t trace_cmdline_lock = __ARCH_SPIN_LOCK_UNLOCKED; |
9794 |
+@@ -2458,24 +2465,41 @@ void trace_find_cmdline(int pid, char comm[]) |
9795 |
+ preempt_enable(); |
9796 |
+ } |
9797 |
+ |
9798 |
++static int *trace_find_tgid_ptr(int pid) |
9799 |
++{ |
9800 |
++ /* |
9801 |
++ * Pairs with the smp_store_release in set_tracer_flag() to ensure that |
9802 |
++ * if we observe a non-NULL tgid_map then we also observe the correct |
9803 |
++ * tgid_map_max. |
9804 |
++ */ |
9805 |
++ int *map = smp_load_acquire(&tgid_map); |
9806 |
++ |
9807 |
++ if (unlikely(!map || pid > tgid_map_max)) |
9808 |
++ return NULL; |
9809 |
++ |
9810 |
++ return &map[pid]; |
9811 |
++} |
9812 |
++ |
9813 |
+ int trace_find_tgid(int pid) |
9814 |
+ { |
9815 |
+- if (unlikely(!tgid_map || !pid || pid > PID_MAX_DEFAULT)) |
9816 |
+- return 0; |
9817 |
++ int *ptr = trace_find_tgid_ptr(pid); |
9818 |
+ |
9819 |
+- return tgid_map[pid]; |
9820 |
++ return ptr ? *ptr : 0; |
9821 |
+ } |
9822 |
+ |
9823 |
+ static int trace_save_tgid(struct task_struct *tsk) |
9824 |
+ { |
9825 |
++ int *ptr; |
9826 |
++ |
9827 |
+ /* treat recording of idle task as a success */ |
9828 |
+ if (!tsk->pid) |
9829 |
+ return 1; |
9830 |
+ |
9831 |
+- if (unlikely(!tgid_map || tsk->pid > PID_MAX_DEFAULT)) |
9832 |
++ ptr = trace_find_tgid_ptr(tsk->pid); |
9833 |
++ if (!ptr) |
9834 |
+ return 0; |
9835 |
+ |
9836 |
+- tgid_map[tsk->pid] = tsk->tgid; |
9837 |
++ *ptr = tsk->tgid; |
9838 |
+ return 1; |
9839 |
+ } |
9840 |
+ |
9841 |
+@@ -4915,6 +4939,8 @@ int trace_keep_overwrite(struct tracer *tracer, u32 mask, int set) |
9842 |
+ |
9843 |
+ int set_tracer_flag(struct trace_array *tr, unsigned int mask, int enabled) |
9844 |
+ { |
9845 |
++ int *map; |
9846 |
++ |
9847 |
+ if ((mask == TRACE_ITER_RECORD_TGID) || |
9848 |
+ (mask == TRACE_ITER_RECORD_CMD)) |
9849 |
+ lockdep_assert_held(&event_mutex); |
9850 |
+@@ -4937,10 +4963,19 @@ int set_tracer_flag(struct trace_array *tr, unsigned int mask, int enabled) |
9851 |
+ trace_event_enable_cmd_record(enabled); |
9852 |
+ |
9853 |
+ if (mask == TRACE_ITER_RECORD_TGID) { |
9854 |
+- if (!tgid_map) |
9855 |
+- tgid_map = kvcalloc(PID_MAX_DEFAULT + 1, |
9856 |
+- sizeof(*tgid_map), |
9857 |
+- GFP_KERNEL); |
9858 |
++ if (!tgid_map) { |
9859 |
++ tgid_map_max = pid_max; |
9860 |
++ map = kvcalloc(tgid_map_max + 1, sizeof(*tgid_map), |
9861 |
++ GFP_KERNEL); |
9862 |
++ |
9863 |
++ /* |
9864 |
++ * Pairs with smp_load_acquire() in |
9865 |
++ * trace_find_tgid_ptr() to ensure that if it observes |
9866 |
++ * the tgid_map we just allocated then it also observes |
9867 |
++ * the corresponding tgid_map_max value. |
9868 |
++ */ |
9869 |
++ smp_store_release(&tgid_map, map); |
9870 |
++ } |
9871 |
+ if (!tgid_map) { |
9872 |
+ tr->trace_flags &= ~TRACE_ITER_RECORD_TGID; |
9873 |
+ return -ENOMEM; |
9874 |
+@@ -5352,37 +5387,16 @@ static const struct file_operations tracing_readme_fops = { |
9875 |
+ |
9876 |
+ static void *saved_tgids_next(struct seq_file *m, void *v, loff_t *pos) |
9877 |
+ { |
9878 |
+- int *ptr = v; |
9879 |
++ int pid = ++(*pos); |
9880 |
+ |
9881 |
+- if (*pos || m->count) |
9882 |
+- ptr++; |
9883 |
+- |
9884 |
+- (*pos)++; |
9885 |
+- |
9886 |
+- for (; ptr <= &tgid_map[PID_MAX_DEFAULT]; ptr++) { |
9887 |
+- if (trace_find_tgid(*ptr)) |
9888 |
+- return ptr; |
9889 |
+- } |
9890 |
+- |
9891 |
+- return NULL; |
9892 |
++ return trace_find_tgid_ptr(pid); |
9893 |
+ } |
9894 |
+ |
9895 |
+ static void *saved_tgids_start(struct seq_file *m, loff_t *pos) |
9896 |
+ { |
9897 |
+- void *v; |
9898 |
+- loff_t l = 0; |
9899 |
++ int pid = *pos; |
9900 |
+ |
9901 |
+- if (!tgid_map) |
9902 |
+- return NULL; |
9903 |
+- |
9904 |
+- v = &tgid_map[0]; |
9905 |
+- while (l <= *pos) { |
9906 |
+- v = saved_tgids_next(m, v, &l); |
9907 |
+- if (!v) |
9908 |
+- return NULL; |
9909 |
+- } |
9910 |
+- |
9911 |
+- return v; |
9912 |
++ return trace_find_tgid_ptr(pid); |
9913 |
+ } |
9914 |
+ |
9915 |
+ static void saved_tgids_stop(struct seq_file *m, void *v) |
9916 |
+@@ -5391,9 +5405,14 @@ static void saved_tgids_stop(struct seq_file *m, void *v) |
9917 |
+ |
9918 |
+ static int saved_tgids_show(struct seq_file *m, void *v) |
9919 |
+ { |
9920 |
+- int pid = (int *)v - tgid_map; |
9921 |
++ int *entry = (int *)v; |
9922 |
++ int pid = entry - tgid_map; |
9923 |
++ int tgid = *entry; |
9924 |
++ |
9925 |
++ if (tgid == 0) |
9926 |
++ return SEQ_SKIP; |
9927 |
+ |
9928 |
+- seq_printf(m, "%d %d\n", pid, trace_find_tgid(pid)); |
9929 |
++ seq_printf(m, "%d %d\n", pid, tgid); |
9930 |
+ return 0; |
9931 |
+ } |
9932 |
+ |
9933 |
+diff --git a/lib/seq_buf.c b/lib/seq_buf.c |
9934 |
+index 89c26c393bdba..6dafde8513337 100644 |
9935 |
+--- a/lib/seq_buf.c |
9936 |
++++ b/lib/seq_buf.c |
9937 |
+@@ -229,8 +229,10 @@ int seq_buf_putmem_hex(struct seq_buf *s, const void *mem, |
9938 |
+ |
9939 |
+ WARN_ON(s->size == 0); |
9940 |
+ |
9941 |
++ BUILD_BUG_ON(MAX_MEMHEX_BYTES * 2 >= HEX_CHARS); |
9942 |
++ |
9943 |
+ while (len) { |
9944 |
+- start_len = min(len, HEX_CHARS - 1); |
9945 |
++ start_len = min(len, MAX_MEMHEX_BYTES); |
9946 |
+ #ifdef __BIG_ENDIAN |
9947 |
+ for (i = 0, j = 0; i < start_len; i++) { |
9948 |
+ #else |
9949 |
+diff --git a/mm/mremap.c b/mm/mremap.c |
9950 |
+index ec8f840399ed4..7de4a01b0f8d9 100644 |
9951 |
+--- a/mm/mremap.c |
9952 |
++++ b/mm/mremap.c |
9953 |
+@@ -439,7 +439,7 @@ unsigned long move_page_tables(struct vm_area_struct *vma, |
9954 |
+ if (!new_pud) |
9955 |
+ break; |
9956 |
+ if (move_pgt_entry(NORMAL_PUD, vma, old_addr, new_addr, |
9957 |
+- old_pud, new_pud, need_rmap_locks)) |
9958 |
++ old_pud, new_pud, true)) |
9959 |
+ continue; |
9960 |
+ } |
9961 |
+ |
9962 |
+@@ -466,7 +466,7 @@ unsigned long move_page_tables(struct vm_area_struct *vma, |
9963 |
+ * moving at the PMD level if possible. |
9964 |
+ */ |
9965 |
+ if (move_pgt_entry(NORMAL_PMD, vma, old_addr, new_addr, |
9966 |
+- old_pmd, new_pmd, need_rmap_locks)) |
9967 |
++ old_pmd, new_pmd, true)) |
9968 |
+ continue; |
9969 |
+ } |
9970 |
+ |
9971 |
+diff --git a/net/bluetooth/hci_core.c b/net/bluetooth/hci_core.c |
9972 |
+index 4fad2ca661ed9..f4e8a4ba663f4 100644 |
9973 |
+--- a/net/bluetooth/hci_core.c |
9974 |
++++ b/net/bluetooth/hci_core.c |
9975 |
+@@ -1719,14 +1719,6 @@ int hci_dev_do_close(struct hci_dev *hdev) |
9976 |
+ |
9977 |
+ BT_DBG("%s %p", hdev->name, hdev); |
9978 |
+ |
9979 |
+- if (!hci_dev_test_flag(hdev, HCI_UNREGISTER) && |
9980 |
+- !hci_dev_test_flag(hdev, HCI_USER_CHANNEL) && |
9981 |
+- test_bit(HCI_UP, &hdev->flags)) { |
9982 |
+- /* Execute vendor specific shutdown routine */ |
9983 |
+- if (hdev->shutdown) |
9984 |
+- hdev->shutdown(hdev); |
9985 |
+- } |
9986 |
+- |
9987 |
+ cancel_delayed_work(&hdev->power_off); |
9988 |
+ |
9989 |
+ hci_request_cancel_all(hdev); |
9990 |
+@@ -1802,6 +1794,14 @@ int hci_dev_do_close(struct hci_dev *hdev) |
9991 |
+ clear_bit(HCI_INIT, &hdev->flags); |
9992 |
+ } |
9993 |
+ |
9994 |
++ if (!hci_dev_test_flag(hdev, HCI_UNREGISTER) && |
9995 |
++ !hci_dev_test_flag(hdev, HCI_USER_CHANNEL) && |
9996 |
++ test_bit(HCI_UP, &hdev->flags)) { |
9997 |
++ /* Execute vendor specific shutdown routine */ |
9998 |
++ if (hdev->shutdown) |
9999 |
++ hdev->shutdown(hdev); |
10000 |
++ } |
10001 |
++ |
10002 |
+ /* flush cmd work */ |
10003 |
+ flush_work(&hdev->cmd_work); |
10004 |
+ |
10005 |
+diff --git a/net/bluetooth/hci_event.c b/net/bluetooth/hci_event.c |
10006 |
+index c6f400b108d94..99c89f02a9747 100644 |
10007 |
+--- a/net/bluetooth/hci_event.c |
10008 |
++++ b/net/bluetooth/hci_event.c |
10009 |
+@@ -4379,12 +4379,12 @@ static void hci_sync_conn_complete_evt(struct hci_dev *hdev, |
10010 |
+ |
10011 |
+ bt_dev_dbg(hdev, "SCO connected with air mode: %02x", ev->air_mode); |
10012 |
+ |
10013 |
+- switch (conn->setting & SCO_AIRMODE_MASK) { |
10014 |
+- case SCO_AIRMODE_CVSD: |
10015 |
++ switch (ev->air_mode) { |
10016 |
++ case 0x02: |
10017 |
+ if (hdev->notify) |
10018 |
+ hdev->notify(hdev, HCI_NOTIFY_ENABLE_SCO_CVSD); |
10019 |
+ break; |
10020 |
+- case SCO_AIRMODE_TRANSP: |
10021 |
++ case 0x03: |
10022 |
+ if (hdev->notify) |
10023 |
+ hdev->notify(hdev, HCI_NOTIFY_ENABLE_SCO_TRANSP); |
10024 |
+ break; |
10025 |
+diff --git a/net/bluetooth/l2cap_core.c b/net/bluetooth/l2cap_core.c |
10026 |
+index 53ddbee459b99..b1f4d5505bbac 100644 |
10027 |
+--- a/net/bluetooth/l2cap_core.c |
10028 |
++++ b/net/bluetooth/l2cap_core.c |
10029 |
+@@ -6062,7 +6062,7 @@ static inline int l2cap_ecred_conn_rsp(struct l2cap_conn *conn, |
10030 |
+ struct l2cap_ecred_conn_rsp *rsp = (void *) data; |
10031 |
+ struct hci_conn *hcon = conn->hcon; |
10032 |
+ u16 mtu, mps, credits, result; |
10033 |
+- struct l2cap_chan *chan; |
10034 |
++ struct l2cap_chan *chan, *tmp; |
10035 |
+ int err = 0, sec_level; |
10036 |
+ int i = 0; |
10037 |
+ |
10038 |
+@@ -6081,7 +6081,7 @@ static inline int l2cap_ecred_conn_rsp(struct l2cap_conn *conn, |
10039 |
+ |
10040 |
+ cmd_len -= sizeof(*rsp); |
10041 |
+ |
10042 |
+- list_for_each_entry(chan, &conn->chan_l, list) { |
10043 |
++ list_for_each_entry_safe(chan, tmp, &conn->chan_l, list) { |
10044 |
+ u16 dcid; |
10045 |
+ |
10046 |
+ if (chan->ident != cmd->ident || |
10047 |
+@@ -6244,7 +6244,7 @@ static inline int l2cap_ecred_reconf_rsp(struct l2cap_conn *conn, |
10048 |
+ struct l2cap_cmd_hdr *cmd, u16 cmd_len, |
10049 |
+ u8 *data) |
10050 |
+ { |
10051 |
+- struct l2cap_chan *chan; |
10052 |
++ struct l2cap_chan *chan, *tmp; |
10053 |
+ struct l2cap_ecred_conn_rsp *rsp = (void *) data; |
10054 |
+ u16 result; |
10055 |
+ |
10056 |
+@@ -6258,7 +6258,7 @@ static inline int l2cap_ecred_reconf_rsp(struct l2cap_conn *conn, |
10057 |
+ if (!result) |
10058 |
+ return 0; |
10059 |
+ |
10060 |
+- list_for_each_entry(chan, &conn->chan_l, list) { |
10061 |
++ list_for_each_entry_safe(chan, tmp, &conn->chan_l, list) { |
10062 |
+ if (chan->ident != cmd->ident) |
10063 |
+ continue; |
10064 |
+ |
10065 |
+diff --git a/net/bluetooth/mgmt.c b/net/bluetooth/mgmt.c |
10066 |
+index 71de147f55584..b4f6773b1a5b6 100644 |
10067 |
+--- a/net/bluetooth/mgmt.c |
10068 |
++++ b/net/bluetooth/mgmt.c |
10069 |
+@@ -250,12 +250,15 @@ static const u8 mgmt_status_table[] = { |
10070 |
+ MGMT_STATUS_TIMEOUT, /* Instant Passed */ |
10071 |
+ MGMT_STATUS_NOT_SUPPORTED, /* Pairing Not Supported */ |
10072 |
+ MGMT_STATUS_FAILED, /* Transaction Collision */ |
10073 |
++ MGMT_STATUS_FAILED, /* Reserved for future use */ |
10074 |
+ MGMT_STATUS_INVALID_PARAMS, /* Unacceptable Parameter */ |
10075 |
+ MGMT_STATUS_REJECTED, /* QoS Rejected */ |
10076 |
+ MGMT_STATUS_NOT_SUPPORTED, /* Classification Not Supported */ |
10077 |
+ MGMT_STATUS_REJECTED, /* Insufficient Security */ |
10078 |
+ MGMT_STATUS_INVALID_PARAMS, /* Parameter Out Of Range */ |
10079 |
++ MGMT_STATUS_FAILED, /* Reserved for future use */ |
10080 |
+ MGMT_STATUS_BUSY, /* Role Switch Pending */ |
10081 |
++ MGMT_STATUS_FAILED, /* Reserved for future use */ |
10082 |
+ MGMT_STATUS_FAILED, /* Slot Violation */ |
10083 |
+ MGMT_STATUS_FAILED, /* Role Switch Failed */ |
10084 |
+ MGMT_STATUS_INVALID_PARAMS, /* EIR Too Large */ |
10085 |
+@@ -4053,6 +4056,8 @@ static int get_device_flags(struct sock *sk, struct hci_dev *hdev, void *data, |
10086 |
+ |
10087 |
+ hci_dev_lock(hdev); |
10088 |
+ |
10089 |
++ memset(&rp, 0, sizeof(rp)); |
10090 |
++ |
10091 |
+ if (cp->addr.type == BDADDR_BREDR) { |
10092 |
+ br_params = hci_bdaddr_list_lookup_with_flags(&hdev->whitelist, |
10093 |
+ &cp->addr.bdaddr, |
10094 |
+diff --git a/net/bridge/br_mrp.c b/net/bridge/br_mrp.c |
10095 |
+index 12487f6fe9b48..58254fbfda858 100644 |
10096 |
+--- a/net/bridge/br_mrp.c |
10097 |
++++ b/net/bridge/br_mrp.c |
10098 |
+@@ -620,8 +620,7 @@ int br_mrp_set_ring_state(struct net_bridge *br, |
10099 |
+ if (!mrp) |
10100 |
+ return -EINVAL; |
10101 |
+ |
10102 |
+- if (mrp->ring_state == BR_MRP_RING_STATE_CLOSED && |
10103 |
+- state->ring_state != BR_MRP_RING_STATE_CLOSED) |
10104 |
++ if (mrp->ring_state != state->ring_state) |
10105 |
+ mrp->ring_transitions++; |
10106 |
+ |
10107 |
+ mrp->ring_state = state->ring_state; |
10108 |
+@@ -708,8 +707,7 @@ int br_mrp_set_in_state(struct net_bridge *br, struct br_mrp_in_state *state) |
10109 |
+ if (!mrp) |
10110 |
+ return -EINVAL; |
10111 |
+ |
10112 |
+- if (mrp->in_state == BR_MRP_IN_STATE_CLOSED && |
10113 |
+- state->in_state != BR_MRP_IN_STATE_CLOSED) |
10114 |
++ if (mrp->in_state != state->in_state) |
10115 |
+ mrp->in_transitions++; |
10116 |
+ |
10117 |
+ mrp->in_state = state->in_state; |
10118 |
+diff --git a/net/core/dev.c b/net/core/dev.c |
10119 |
+index 9631944740586..a8c89cad1ca48 100644 |
10120 |
+--- a/net/core/dev.c |
10121 |
++++ b/net/core/dev.c |
10122 |
+@@ -6472,11 +6472,18 @@ EXPORT_SYMBOL(napi_schedule_prep); |
10123 |
+ * __napi_schedule_irqoff - schedule for receive |
10124 |
+ * @n: entry to schedule |
10125 |
+ * |
10126 |
+- * Variant of __napi_schedule() assuming hard irqs are masked |
10127 |
++ * Variant of __napi_schedule() assuming hard irqs are masked. |
10128 |
++ * |
10129 |
++ * On PREEMPT_RT enabled kernels this maps to __napi_schedule() |
10130 |
++ * because the interrupt disabled assumption might not be true |
10131 |
++ * due to force-threaded interrupts and spinlock substitution. |
10132 |
+ */ |
10133 |
+ void __napi_schedule_irqoff(struct napi_struct *n) |
10134 |
+ { |
10135 |
+- ____napi_schedule(this_cpu_ptr(&softnet_data), n); |
10136 |
++ if (!IS_ENABLED(CONFIG_PREEMPT_RT)) |
10137 |
++ ____napi_schedule(this_cpu_ptr(&softnet_data), n); |
10138 |
++ else |
10139 |
++ __napi_schedule(n); |
10140 |
+ } |
10141 |
+ EXPORT_SYMBOL(__napi_schedule_irqoff); |
10142 |
+ |
10143 |
+diff --git a/net/core/sock.c b/net/core/sock.c |
10144 |
+index a266760cd65ea..60750f9ae32d4 100644 |
10145 |
+--- a/net/core/sock.c |
10146 |
++++ b/net/core/sock.c |
10147 |
+@@ -1622,6 +1622,13 @@ int sock_getsockopt(struct socket *sock, int level, int optname, |
10148 |
+ v.val = sk->sk_bound_dev_if; |
10149 |
+ break; |
10150 |
+ |
10151 |
++ case SO_NETNS_COOKIE: |
10152 |
++ lv = sizeof(u64); |
10153 |
++ if (len != lv) |
10154 |
++ return -EINVAL; |
10155 |
++ v.val64 = sock_net(sk)->net_cookie; |
10156 |
++ break; |
10157 |
++ |
10158 |
+ default: |
10159 |
+ /* We implement the SO_SNDLOWAT etc to not be settable |
10160 |
+ * (1003.1g 7). |
10161 |
+diff --git a/net/hsr/hsr_framereg.c b/net/hsr/hsr_framereg.c |
10162 |
+index bb1351c38397f..e31949479305e 100644 |
10163 |
+--- a/net/hsr/hsr_framereg.c |
10164 |
++++ b/net/hsr/hsr_framereg.c |
10165 |
+@@ -397,7 +397,8 @@ void hsr_register_frame_in(struct hsr_node *node, struct hsr_port *port, |
10166 |
+ * ensures entries of restarted nodes gets pruned so that they can |
10167 |
+ * re-register and resume communications. |
10168 |
+ */ |
10169 |
+- if (seq_nr_before(sequence_nr, node->seq_out[port->type])) |
10170 |
++ if (!(port->dev->features & NETIF_F_HW_HSR_TAG_RM) && |
10171 |
++ seq_nr_before(sequence_nr, node->seq_out[port->type])) |
10172 |
+ return; |
10173 |
+ |
10174 |
+ node->time_in[port->type] = jiffies; |
10175 |
+diff --git a/net/ipv4/ip_output.c b/net/ipv4/ip_output.c |
10176 |
+index 3aab53beb4ea2..3ec3b67c184fb 100644 |
10177 |
+--- a/net/ipv4/ip_output.c |
10178 |
++++ b/net/ipv4/ip_output.c |
10179 |
+@@ -1054,7 +1054,7 @@ static int __ip_append_data(struct sock *sk, |
10180 |
+ unsigned int datalen; |
10181 |
+ unsigned int fraglen; |
10182 |
+ unsigned int fraggap; |
10183 |
+- unsigned int alloclen; |
10184 |
++ unsigned int alloclen, alloc_extra; |
10185 |
+ unsigned int pagedlen; |
10186 |
+ struct sk_buff *skb_prev; |
10187 |
+ alloc_new_skb: |
10188 |
+@@ -1074,35 +1074,39 @@ alloc_new_skb: |
10189 |
+ fraglen = datalen + fragheaderlen; |
10190 |
+ pagedlen = 0; |
10191 |
+ |
10192 |
++ alloc_extra = hh_len + 15; |
10193 |
++ alloc_extra += exthdrlen; |
10194 |
++ |
10195 |
++ /* The last fragment gets additional space at tail. |
10196 |
++ * Note, with MSG_MORE we overallocate on fragments, |
10197 |
++ * because we have no idea what fragment will be |
10198 |
++ * the last. |
10199 |
++ */ |
10200 |
++ if (datalen == length + fraggap) |
10201 |
++ alloc_extra += rt->dst.trailer_len; |
10202 |
++ |
10203 |
+ if ((flags & MSG_MORE) && |
10204 |
+ !(rt->dst.dev->features&NETIF_F_SG)) |
10205 |
+ alloclen = mtu; |
10206 |
+- else if (!paged) |
10207 |
++ else if (!paged && |
10208 |
++ (fraglen + alloc_extra < SKB_MAX_ALLOC || |
10209 |
++ !(rt->dst.dev->features & NETIF_F_SG))) |
10210 |
+ alloclen = fraglen; |
10211 |
+ else { |
10212 |
+ alloclen = min_t(int, fraglen, MAX_HEADER); |
10213 |
+ pagedlen = fraglen - alloclen; |
10214 |
+ } |
10215 |
+ |
10216 |
+- alloclen += exthdrlen; |
10217 |
+- |
10218 |
+- /* The last fragment gets additional space at tail. |
10219 |
+- * Note, with MSG_MORE we overallocate on fragments, |
10220 |
+- * because we have no idea what fragment will be |
10221 |
+- * the last. |
10222 |
+- */ |
10223 |
+- if (datalen == length + fraggap) |
10224 |
+- alloclen += rt->dst.trailer_len; |
10225 |
++ alloclen += alloc_extra; |
10226 |
+ |
10227 |
+ if (transhdrlen) { |
10228 |
+- skb = sock_alloc_send_skb(sk, |
10229 |
+- alloclen + hh_len + 15, |
10230 |
++ skb = sock_alloc_send_skb(sk, alloclen, |
10231 |
+ (flags & MSG_DONTWAIT), &err); |
10232 |
+ } else { |
10233 |
+ skb = NULL; |
10234 |
+ if (refcount_read(&sk->sk_wmem_alloc) + wmem_alloc_delta <= |
10235 |
+ 2 * sk->sk_sndbuf) |
10236 |
+- skb = alloc_skb(alloclen + hh_len + 15, |
10237 |
++ skb = alloc_skb(alloclen, |
10238 |
+ sk->sk_allocation); |
10239 |
+ if (unlikely(!skb)) |
10240 |
+ err = -ENOBUFS; |
10241 |
+diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c |
10242 |
+index 69a545db80d2e..e567fff1d1a66 100644 |
10243 |
+--- a/net/ipv4/tcp_input.c |
10244 |
++++ b/net/ipv4/tcp_input.c |
10245 |
+@@ -2816,8 +2816,17 @@ static void tcp_process_loss(struct sock *sk, int flag, int num_dupack, |
10246 |
+ *rexmit = REXMIT_LOST; |
10247 |
+ } |
10248 |
+ |
10249 |
++static bool tcp_force_fast_retransmit(struct sock *sk) |
10250 |
++{ |
10251 |
++ struct tcp_sock *tp = tcp_sk(sk); |
10252 |
++ |
10253 |
++ return after(tcp_highest_sack_seq(tp), |
10254 |
++ tp->snd_una + tp->reordering * tp->mss_cache); |
10255 |
++} |
10256 |
++ |
10257 |
+ /* Undo during fast recovery after partial ACK. */ |
10258 |
+-static bool tcp_try_undo_partial(struct sock *sk, u32 prior_snd_una) |
10259 |
++static bool tcp_try_undo_partial(struct sock *sk, u32 prior_snd_una, |
10260 |
++ bool *do_lost) |
10261 |
+ { |
10262 |
+ struct tcp_sock *tp = tcp_sk(sk); |
10263 |
+ |
10264 |
+@@ -2842,7 +2851,9 @@ static bool tcp_try_undo_partial(struct sock *sk, u32 prior_snd_una) |
10265 |
+ tcp_undo_cwnd_reduction(sk, true); |
10266 |
+ NET_INC_STATS(sock_net(sk), LINUX_MIB_TCPPARTIALUNDO); |
10267 |
+ tcp_try_keep_open(sk); |
10268 |
+- return true; |
10269 |
++ } else { |
10270 |
++ /* Partial ACK arrived. Force fast retransmit. */ |
10271 |
++ *do_lost = tcp_force_fast_retransmit(sk); |
10272 |
+ } |
10273 |
+ return false; |
10274 |
+ } |
10275 |
+@@ -2866,14 +2877,6 @@ static void tcp_identify_packet_loss(struct sock *sk, int *ack_flag) |
10276 |
+ } |
10277 |
+ } |
10278 |
+ |
10279 |
+-static bool tcp_force_fast_retransmit(struct sock *sk) |
10280 |
+-{ |
10281 |
+- struct tcp_sock *tp = tcp_sk(sk); |
10282 |
+- |
10283 |
+- return after(tcp_highest_sack_seq(tp), |
10284 |
+- tp->snd_una + tp->reordering * tp->mss_cache); |
10285 |
+-} |
10286 |
+- |
10287 |
+ /* Process an event, which can update packets-in-flight not trivially. |
10288 |
+ * Main goal of this function is to calculate new estimate for left_out, |
10289 |
+ * taking into account both packets sitting in receiver's buffer and |
10290 |
+@@ -2943,17 +2946,21 @@ static void tcp_fastretrans_alert(struct sock *sk, const u32 prior_snd_una, |
10291 |
+ if (!(flag & FLAG_SND_UNA_ADVANCED)) { |
10292 |
+ if (tcp_is_reno(tp)) |
10293 |
+ tcp_add_reno_sack(sk, num_dupack, ece_ack); |
10294 |
+- } else { |
10295 |
+- if (tcp_try_undo_partial(sk, prior_snd_una)) |
10296 |
+- return; |
10297 |
+- /* Partial ACK arrived. Force fast retransmit. */ |
10298 |
+- do_lost = tcp_force_fast_retransmit(sk); |
10299 |
+- } |
10300 |
+- if (tcp_try_undo_dsack(sk)) { |
10301 |
+- tcp_try_keep_open(sk); |
10302 |
++ } else if (tcp_try_undo_partial(sk, prior_snd_una, &do_lost)) |
10303 |
+ return; |
10304 |
+- } |
10305 |
++ |
10306 |
++ if (tcp_try_undo_dsack(sk)) |
10307 |
++ tcp_try_keep_open(sk); |
10308 |
++ |
10309 |
+ tcp_identify_packet_loss(sk, ack_flag); |
10310 |
++ if (icsk->icsk_ca_state != TCP_CA_Recovery) { |
10311 |
++ if (!tcp_time_to_recover(sk, flag)) |
10312 |
++ return; |
10313 |
++ /* Undo reverts the recovery state. If loss is evident, |
10314 |
++ * starts a new recovery (e.g. reordering then loss); |
10315 |
++ */ |
10316 |
++ tcp_enter_recovery(sk, ece_ack); |
10317 |
++ } |
10318 |
+ break; |
10319 |
+ case TCP_CA_Loss: |
10320 |
+ tcp_process_loss(sk, flag, num_dupack, rexmit); |
10321 |
+diff --git a/net/ipv6/ip6_output.c b/net/ipv6/ip6_output.c |
10322 |
+index ff4f9ebcf7f65..497974b4372a7 100644 |
10323 |
+--- a/net/ipv6/ip6_output.c |
10324 |
++++ b/net/ipv6/ip6_output.c |
10325 |
+@@ -1555,7 +1555,7 @@ emsgsize: |
10326 |
+ unsigned int datalen; |
10327 |
+ unsigned int fraglen; |
10328 |
+ unsigned int fraggap; |
10329 |
+- unsigned int alloclen; |
10330 |
++ unsigned int alloclen, alloc_extra; |
10331 |
+ unsigned int pagedlen; |
10332 |
+ alloc_new_skb: |
10333 |
+ /* There's no room in the current skb */ |
10334 |
+@@ -1582,17 +1582,28 @@ alloc_new_skb: |
10335 |
+ fraglen = datalen + fragheaderlen; |
10336 |
+ pagedlen = 0; |
10337 |
+ |
10338 |
++ alloc_extra = hh_len; |
10339 |
++ alloc_extra += dst_exthdrlen; |
10340 |
++ alloc_extra += rt->dst.trailer_len; |
10341 |
++ |
10342 |
++ /* We just reserve space for fragment header. |
10343 |
++ * Note: this may be overallocation if the message |
10344 |
++ * (without MSG_MORE) fits into the MTU. |
10345 |
++ */ |
10346 |
++ alloc_extra += sizeof(struct frag_hdr); |
10347 |
++ |
10348 |
+ if ((flags & MSG_MORE) && |
10349 |
+ !(rt->dst.dev->features&NETIF_F_SG)) |
10350 |
+ alloclen = mtu; |
10351 |
+- else if (!paged) |
10352 |
++ else if (!paged && |
10353 |
++ (fraglen + alloc_extra < SKB_MAX_ALLOC || |
10354 |
++ !(rt->dst.dev->features & NETIF_F_SG))) |
10355 |
+ alloclen = fraglen; |
10356 |
+ else { |
10357 |
+ alloclen = min_t(int, fraglen, MAX_HEADER); |
10358 |
+ pagedlen = fraglen - alloclen; |
10359 |
+ } |
10360 |
+- |
10361 |
+- alloclen += dst_exthdrlen; |
10362 |
++ alloclen += alloc_extra; |
10363 |
+ |
10364 |
+ if (datalen != length + fraggap) { |
10365 |
+ /* |
10366 |
+@@ -1602,30 +1613,21 @@ alloc_new_skb: |
10367 |
+ datalen += rt->dst.trailer_len; |
10368 |
+ } |
10369 |
+ |
10370 |
+- alloclen += rt->dst.trailer_len; |
10371 |
+ fraglen = datalen + fragheaderlen; |
10372 |
+ |
10373 |
+- /* |
10374 |
+- * We just reserve space for fragment header. |
10375 |
+- * Note: this may be overallocation if the message |
10376 |
+- * (without MSG_MORE) fits into the MTU. |
10377 |
+- */ |
10378 |
+- alloclen += sizeof(struct frag_hdr); |
10379 |
+- |
10380 |
+ copy = datalen - transhdrlen - fraggap - pagedlen; |
10381 |
+ if (copy < 0) { |
10382 |
+ err = -EINVAL; |
10383 |
+ goto error; |
10384 |
+ } |
10385 |
+ if (transhdrlen) { |
10386 |
+- skb = sock_alloc_send_skb(sk, |
10387 |
+- alloclen + hh_len, |
10388 |
++ skb = sock_alloc_send_skb(sk, alloclen, |
10389 |
+ (flags & MSG_DONTWAIT), &err); |
10390 |
+ } else { |
10391 |
+ skb = NULL; |
10392 |
+ if (refcount_read(&sk->sk_wmem_alloc) + wmem_alloc_delta <= |
10393 |
+ 2 * sk->sk_sndbuf) |
10394 |
+- skb = alloc_skb(alloclen + hh_len, |
10395 |
++ skb = alloc_skb(alloclen, |
10396 |
+ sk->sk_allocation); |
10397 |
+ if (unlikely(!skb)) |
10398 |
+ err = -ENOBUFS; |
10399 |
+diff --git a/net/ipv6/output_core.c b/net/ipv6/output_core.c |
10400 |
+index af36acc1a6448..2880dc7d9a491 100644 |
10401 |
+--- a/net/ipv6/output_core.c |
10402 |
++++ b/net/ipv6/output_core.c |
10403 |
+@@ -15,29 +15,11 @@ static u32 __ipv6_select_ident(struct net *net, |
10404 |
+ const struct in6_addr *dst, |
10405 |
+ const struct in6_addr *src) |
10406 |
+ { |
10407 |
+- const struct { |
10408 |
+- struct in6_addr dst; |
10409 |
+- struct in6_addr src; |
10410 |
+- } __aligned(SIPHASH_ALIGNMENT) combined = { |
10411 |
+- .dst = *dst, |
10412 |
+- .src = *src, |
10413 |
+- }; |
10414 |
+- u32 hash, id; |
10415 |
+- |
10416 |
+- /* Note the following code is not safe, but this is okay. */ |
10417 |
+- if (unlikely(siphash_key_is_zero(&net->ipv4.ip_id_key))) |
10418 |
+- get_random_bytes(&net->ipv4.ip_id_key, |
10419 |
+- sizeof(net->ipv4.ip_id_key)); |
10420 |
+- |
10421 |
+- hash = siphash(&combined, sizeof(combined), &net->ipv4.ip_id_key); |
10422 |
+- |
10423 |
+- /* Treat id of 0 as unset and if we get 0 back from ip_idents_reserve, |
10424 |
+- * set the hight order instead thus minimizing possible future |
10425 |
+- * collisions. |
10426 |
+- */ |
10427 |
+- id = ip_idents_reserve(hash, 1); |
10428 |
+- if (unlikely(!id)) |
10429 |
+- id = 1 << 31; |
10430 |
++ u32 id; |
10431 |
++ |
10432 |
++ do { |
10433 |
++ id = prandom_u32(); |
10434 |
++ } while (!id); |
10435 |
+ |
10436 |
+ return id; |
10437 |
+ } |
10438 |
+diff --git a/net/mac80211/main.c b/net/mac80211/main.c |
10439 |
+index 9dd741b68f268..937a024a13e2d 100644 |
10440 |
+--- a/net/mac80211/main.c |
10441 |
++++ b/net/mac80211/main.c |
10442 |
+@@ -257,14 +257,13 @@ static void ieee80211_restart_work(struct work_struct *work) |
10443 |
+ /* wait for scan work complete */ |
10444 |
+ flush_workqueue(local->workqueue); |
10445 |
+ flush_work(&local->sched_scan_stopped_work); |
10446 |
++ flush_work(&local->radar_detected_work); |
10447 |
++ |
10448 |
++ rtnl_lock(); |
10449 |
+ |
10450 |
+ WARN(test_bit(SCAN_HW_SCANNING, &local->scanning), |
10451 |
+ "%s called with hardware scan in progress\n", __func__); |
10452 |
+ |
10453 |
+- flush_work(&local->radar_detected_work); |
10454 |
+- /* we might do interface manipulations, so need both */ |
10455 |
+- rtnl_lock(); |
10456 |
+- wiphy_lock(local->hw.wiphy); |
10457 |
+ list_for_each_entry(sdata, &local->interfaces, list) { |
10458 |
+ /* |
10459 |
+ * XXX: there may be more work for other vif types and even |
10460 |
+diff --git a/net/mac80211/sta_info.c b/net/mac80211/sta_info.c |
10461 |
+index 13250cadb4202..e18c3855f6161 100644 |
10462 |
+--- a/net/mac80211/sta_info.c |
10463 |
++++ b/net/mac80211/sta_info.c |
10464 |
+@@ -2088,10 +2088,9 @@ static struct ieee80211_sta_rx_stats * |
10465 |
+ sta_get_last_rx_stats(struct sta_info *sta) |
10466 |
+ { |
10467 |
+ struct ieee80211_sta_rx_stats *stats = &sta->rx_stats; |
10468 |
+- struct ieee80211_local *local = sta->local; |
10469 |
+ int cpu; |
10470 |
+ |
10471 |
+- if (!ieee80211_hw_check(&local->hw, USES_RSS)) |
10472 |
++ if (!sta->pcpu_rx_stats) |
10473 |
+ return stats; |
10474 |
+ |
10475 |
+ for_each_possible_cpu(cpu) { |
10476 |
+@@ -2191,9 +2190,7 @@ static void sta_set_tidstats(struct sta_info *sta, |
10477 |
+ int cpu; |
10478 |
+ |
10479 |
+ if (!(tidstats->filled & BIT(NL80211_TID_STATS_RX_MSDU))) { |
10480 |
+- if (!ieee80211_hw_check(&local->hw, USES_RSS)) |
10481 |
+- tidstats->rx_msdu += |
10482 |
+- sta_get_tidstats_msdu(&sta->rx_stats, tid); |
10483 |
++ tidstats->rx_msdu += sta_get_tidstats_msdu(&sta->rx_stats, tid); |
10484 |
+ |
10485 |
+ if (sta->pcpu_rx_stats) { |
10486 |
+ for_each_possible_cpu(cpu) { |
10487 |
+@@ -2272,7 +2269,6 @@ void sta_set_sinfo(struct sta_info *sta, struct station_info *sinfo, |
10488 |
+ sinfo->rx_beacon = sdata->u.mgd.count_beacon_signal; |
10489 |
+ |
10490 |
+ drv_sta_statistics(local, sdata, &sta->sta, sinfo); |
10491 |
+- |
10492 |
+ sinfo->filled |= BIT_ULL(NL80211_STA_INFO_INACTIVE_TIME) | |
10493 |
+ BIT_ULL(NL80211_STA_INFO_STA_FLAGS) | |
10494 |
+ BIT_ULL(NL80211_STA_INFO_BSS_PARAM) | |
10495 |
+@@ -2307,8 +2303,7 @@ void sta_set_sinfo(struct sta_info *sta, struct station_info *sinfo, |
10496 |
+ |
10497 |
+ if (!(sinfo->filled & (BIT_ULL(NL80211_STA_INFO_RX_BYTES64) | |
10498 |
+ BIT_ULL(NL80211_STA_INFO_RX_BYTES)))) { |
10499 |
+- if (!ieee80211_hw_check(&local->hw, USES_RSS)) |
10500 |
+- sinfo->rx_bytes += sta_get_stats_bytes(&sta->rx_stats); |
10501 |
++ sinfo->rx_bytes += sta_get_stats_bytes(&sta->rx_stats); |
10502 |
+ |
10503 |
+ if (sta->pcpu_rx_stats) { |
10504 |
+ for_each_possible_cpu(cpu) { |
10505 |
+diff --git a/net/sched/act_api.c b/net/sched/act_api.c |
10506 |
+index f6d5755d669eb..d17a66aab8eea 100644 |
10507 |
+--- a/net/sched/act_api.c |
10508 |
++++ b/net/sched/act_api.c |
10509 |
+@@ -381,7 +381,8 @@ static int tcf_del_walker(struct tcf_idrinfo *idrinfo, struct sk_buff *skb, |
10510 |
+ } |
10511 |
+ mutex_unlock(&idrinfo->lock); |
10512 |
+ |
10513 |
+- if (nla_put_u32(skb, TCA_FCNT, n_i)) |
10514 |
++ ret = nla_put_u32(skb, TCA_FCNT, n_i); |
10515 |
++ if (ret) |
10516 |
+ goto nla_put_failure; |
10517 |
+ nla_nest_end(skb, nest); |
10518 |
+ |
10519 |
+diff --git a/net/sched/cls_api.c b/net/sched/cls_api.c |
10520 |
+index 94f6942d7ec11..2f82ac7c0f93c 100644 |
10521 |
+--- a/net/sched/cls_api.c |
10522 |
++++ b/net/sched/cls_api.c |
10523 |
+@@ -1531,7 +1531,7 @@ static inline int __tcf_classify(struct sk_buff *skb, |
10524 |
+ u32 *last_executed_chain) |
10525 |
+ { |
10526 |
+ #ifdef CONFIG_NET_CLS_ACT |
10527 |
+- const int max_reclassify_loop = 4; |
10528 |
++ const int max_reclassify_loop = 16; |
10529 |
+ const struct tcf_proto *first_tp; |
10530 |
+ int limit = 0; |
10531 |
+ |
10532 |
+diff --git a/net/sctp/bind_addr.c b/net/sctp/bind_addr.c |
10533 |
+index 53e5ed79f63f3..59e653b528b1f 100644 |
10534 |
+--- a/net/sctp/bind_addr.c |
10535 |
++++ b/net/sctp/bind_addr.c |
10536 |
+@@ -270,22 +270,19 @@ int sctp_raw_to_bind_addrs(struct sctp_bind_addr *bp, __u8 *raw_addr_list, |
10537 |
+ rawaddr = (union sctp_addr_param *)raw_addr_list; |
10538 |
+ |
10539 |
+ af = sctp_get_af_specific(param_type2af(param->type)); |
10540 |
+- if (unlikely(!af)) { |
10541 |
++ if (unlikely(!af) || |
10542 |
++ !af->from_addr_param(&addr, rawaddr, htons(port), 0)) { |
10543 |
+ retval = -EINVAL; |
10544 |
+- sctp_bind_addr_clean(bp); |
10545 |
+- break; |
10546 |
++ goto out_err; |
10547 |
+ } |
10548 |
+ |
10549 |
+- af->from_addr_param(&addr, rawaddr, htons(port), 0); |
10550 |
+ if (sctp_bind_addr_state(bp, &addr) != -1) |
10551 |
+ goto next; |
10552 |
+ retval = sctp_add_bind_addr(bp, &addr, sizeof(addr), |
10553 |
+ SCTP_ADDR_SRC, gfp); |
10554 |
+- if (retval) { |
10555 |
++ if (retval) |
10556 |
+ /* Can't finish building the list, clean up. */ |
10557 |
+- sctp_bind_addr_clean(bp); |
10558 |
+- break; |
10559 |
+- } |
10560 |
++ goto out_err; |
10561 |
+ |
10562 |
+ next: |
10563 |
+ len = ntohs(param->length); |
10564 |
+@@ -294,6 +291,12 @@ next: |
10565 |
+ } |
10566 |
+ |
10567 |
+ return retval; |
10568 |
++ |
10569 |
++out_err: |
10570 |
++ if (retval) |
10571 |
++ sctp_bind_addr_clean(bp); |
10572 |
++ |
10573 |
++ return retval; |
10574 |
+ } |
10575 |
+ |
10576 |
+ /******************************************************************** |
10577 |
+diff --git a/net/sctp/input.c b/net/sctp/input.c |
10578 |
+index d508f6f3dd08a..f72bff93745c4 100644 |
10579 |
+--- a/net/sctp/input.c |
10580 |
++++ b/net/sctp/input.c |
10581 |
+@@ -1131,7 +1131,8 @@ static struct sctp_association *__sctp_rcv_init_lookup(struct net *net, |
10582 |
+ if (!af) |
10583 |
+ continue; |
10584 |
+ |
10585 |
+- af->from_addr_param(paddr, params.addr, sh->source, 0); |
10586 |
++ if (!af->from_addr_param(paddr, params.addr, sh->source, 0)) |
10587 |
++ continue; |
10588 |
+ |
10589 |
+ asoc = __sctp_lookup_association(net, laddr, paddr, transportp); |
10590 |
+ if (asoc) |
10591 |
+@@ -1174,7 +1175,8 @@ static struct sctp_association *__sctp_rcv_asconf_lookup( |
10592 |
+ if (unlikely(!af)) |
10593 |
+ return NULL; |
10594 |
+ |
10595 |
+- af->from_addr_param(&paddr, param, peer_port, 0); |
10596 |
++ if (af->from_addr_param(&paddr, param, peer_port, 0)) |
10597 |
++ return NULL; |
10598 |
+ |
10599 |
+ return __sctp_lookup_association(net, laddr, &paddr, transportp); |
10600 |
+ } |
10601 |
+@@ -1245,7 +1247,7 @@ static struct sctp_association *__sctp_rcv_walk_lookup(struct net *net, |
10602 |
+ |
10603 |
+ ch = (struct sctp_chunkhdr *)ch_end; |
10604 |
+ chunk_num++; |
10605 |
+- } while (ch_end < skb_tail_pointer(skb)); |
10606 |
++ } while (ch_end + sizeof(*ch) < skb_tail_pointer(skb)); |
10607 |
+ |
10608 |
+ return asoc; |
10609 |
+ } |
10610 |
+diff --git a/net/sctp/ipv6.c b/net/sctp/ipv6.c |
10611 |
+index bd08807c9e447..5c6f5ced9cfa6 100644 |
10612 |
+--- a/net/sctp/ipv6.c |
10613 |
++++ b/net/sctp/ipv6.c |
10614 |
+@@ -551,15 +551,20 @@ static void sctp_v6_to_sk_daddr(union sctp_addr *addr, struct sock *sk) |
10615 |
+ } |
10616 |
+ |
10617 |
+ /* Initialize a sctp_addr from an address parameter. */ |
10618 |
+-static void sctp_v6_from_addr_param(union sctp_addr *addr, |
10619 |
++static bool sctp_v6_from_addr_param(union sctp_addr *addr, |
10620 |
+ union sctp_addr_param *param, |
10621 |
+ __be16 port, int iif) |
10622 |
+ { |
10623 |
++ if (ntohs(param->v6.param_hdr.length) < sizeof(struct sctp_ipv6addr_param)) |
10624 |
++ return false; |
10625 |
++ |
10626 |
+ addr->v6.sin6_family = AF_INET6; |
10627 |
+ addr->v6.sin6_port = port; |
10628 |
+ addr->v6.sin6_flowinfo = 0; /* BUG */ |
10629 |
+ addr->v6.sin6_addr = param->v6.addr; |
10630 |
+ addr->v6.sin6_scope_id = iif; |
10631 |
++ |
10632 |
++ return true; |
10633 |
+ } |
10634 |
+ |
10635 |
+ /* Initialize an address parameter from a sctp_addr and return the length |
10636 |
+diff --git a/net/sctp/protocol.c b/net/sctp/protocol.c |
10637 |
+index 6f2bbfeec3a4c..25192b378e2ec 100644 |
10638 |
+--- a/net/sctp/protocol.c |
10639 |
++++ b/net/sctp/protocol.c |
10640 |
+@@ -254,14 +254,19 @@ static void sctp_v4_to_sk_daddr(union sctp_addr *addr, struct sock *sk) |
10641 |
+ } |
10642 |
+ |
10643 |
+ /* Initialize a sctp_addr from an address parameter. */ |
10644 |
+-static void sctp_v4_from_addr_param(union sctp_addr *addr, |
10645 |
++static bool sctp_v4_from_addr_param(union sctp_addr *addr, |
10646 |
+ union sctp_addr_param *param, |
10647 |
+ __be16 port, int iif) |
10648 |
+ { |
10649 |
++ if (ntohs(param->v4.param_hdr.length) < sizeof(struct sctp_ipv4addr_param)) |
10650 |
++ return false; |
10651 |
++ |
10652 |
+ addr->v4.sin_family = AF_INET; |
10653 |
+ addr->v4.sin_port = port; |
10654 |
+ addr->v4.sin_addr.s_addr = param->v4.addr.s_addr; |
10655 |
+ memset(addr->v4.sin_zero, 0, sizeof(addr->v4.sin_zero)); |
10656 |
++ |
10657 |
++ return true; |
10658 |
+ } |
10659 |
+ |
10660 |
+ /* Initialize an address parameter from a sctp_addr and return the length |
10661 |
+diff --git a/net/sctp/sm_make_chunk.c b/net/sctp/sm_make_chunk.c |
10662 |
+index da4ce0947c3aa..1fdbde6f07b82 100644 |
10663 |
+--- a/net/sctp/sm_make_chunk.c |
10664 |
++++ b/net/sctp/sm_make_chunk.c |
10665 |
+@@ -2350,11 +2350,13 @@ int sctp_process_init(struct sctp_association *asoc, struct sctp_chunk *chunk, |
10666 |
+ |
10667 |
+ /* Process the initialization parameters. */ |
10668 |
+ sctp_walk_params(param, peer_init, init_hdr.params) { |
10669 |
+- if (!src_match && (param.p->type == SCTP_PARAM_IPV4_ADDRESS || |
10670 |
+- param.p->type == SCTP_PARAM_IPV6_ADDRESS)) { |
10671 |
++ if (!src_match && |
10672 |
++ (param.p->type == SCTP_PARAM_IPV4_ADDRESS || |
10673 |
++ param.p->type == SCTP_PARAM_IPV6_ADDRESS)) { |
10674 |
+ af = sctp_get_af_specific(param_type2af(param.p->type)); |
10675 |
+- af->from_addr_param(&addr, param.addr, |
10676 |
+- chunk->sctp_hdr->source, 0); |
10677 |
++ if (!af->from_addr_param(&addr, param.addr, |
10678 |
++ chunk->sctp_hdr->source, 0)) |
10679 |
++ continue; |
10680 |
+ if (sctp_cmp_addr_exact(sctp_source(chunk), &addr)) |
10681 |
+ src_match = 1; |
10682 |
+ } |
10683 |
+@@ -2535,7 +2537,8 @@ static int sctp_process_param(struct sctp_association *asoc, |
10684 |
+ break; |
10685 |
+ do_addr_param: |
10686 |
+ af = sctp_get_af_specific(param_type2af(param.p->type)); |
10687 |
+- af->from_addr_param(&addr, param.addr, htons(asoc->peer.port), 0); |
10688 |
++ if (!af->from_addr_param(&addr, param.addr, htons(asoc->peer.port), 0)) |
10689 |
++ break; |
10690 |
+ scope = sctp_scope(peer_addr); |
10691 |
+ if (sctp_in_scope(net, &addr, scope)) |
10692 |
+ if (!sctp_assoc_add_peer(asoc, &addr, gfp, SCTP_UNCONFIRMED)) |
10693 |
+@@ -2636,15 +2639,13 @@ do_addr_param: |
10694 |
+ addr_param = param.v + sizeof(struct sctp_addip_param); |
10695 |
+ |
10696 |
+ af = sctp_get_af_specific(param_type2af(addr_param->p.type)); |
10697 |
+- if (af == NULL) |
10698 |
++ if (!af) |
10699 |
+ break; |
10700 |
+ |
10701 |
+- af->from_addr_param(&addr, addr_param, |
10702 |
+- htons(asoc->peer.port), 0); |
10703 |
++ if (!af->from_addr_param(&addr, addr_param, |
10704 |
++ htons(asoc->peer.port), 0)) |
10705 |
++ break; |
10706 |
+ |
10707 |
+- /* if the address is invalid, we can't process it. |
10708 |
+- * XXX: see spec for what to do. |
10709 |
+- */ |
10710 |
+ if (!af->addr_valid(&addr, NULL, NULL)) |
10711 |
+ break; |
10712 |
+ |
10713 |
+@@ -3058,7 +3059,8 @@ static __be16 sctp_process_asconf_param(struct sctp_association *asoc, |
10714 |
+ if (unlikely(!af)) |
10715 |
+ return SCTP_ERROR_DNS_FAILED; |
10716 |
+ |
10717 |
+- af->from_addr_param(&addr, addr_param, htons(asoc->peer.port), 0); |
10718 |
++ if (!af->from_addr_param(&addr, addr_param, htons(asoc->peer.port), 0)) |
10719 |
++ return SCTP_ERROR_DNS_FAILED; |
10720 |
+ |
10721 |
+ /* ADDIP 4.2.1 This parameter MUST NOT contain a broadcast |
10722 |
+ * or multicast address. |
10723 |
+@@ -3335,7 +3337,8 @@ static void sctp_asconf_param_success(struct sctp_association *asoc, |
10724 |
+ |
10725 |
+ /* We have checked the packet before, so we do not check again. */ |
10726 |
+ af = sctp_get_af_specific(param_type2af(addr_param->p.type)); |
10727 |
+- af->from_addr_param(&addr, addr_param, htons(bp->port), 0); |
10728 |
++ if (!af->from_addr_param(&addr, addr_param, htons(bp->port), 0)) |
10729 |
++ return; |
10730 |
+ |
10731 |
+ switch (asconf_param->param_hdr.type) { |
10732 |
+ case SCTP_PARAM_ADD_IP: |
10733 |
+diff --git a/net/vmw_vsock/af_vsock.c b/net/vmw_vsock/af_vsock.c |
10734 |
+index bc7fb9bf3351e..2a82fbf32ccc7 100644 |
10735 |
+--- a/net/vmw_vsock/af_vsock.c |
10736 |
++++ b/net/vmw_vsock/af_vsock.c |
10737 |
+@@ -1369,7 +1369,7 @@ static int vsock_stream_connect(struct socket *sock, struct sockaddr *addr, |
10738 |
+ |
10739 |
+ if (signal_pending(current)) { |
10740 |
+ err = sock_intr_errno(timeout); |
10741 |
+- sk->sk_state = TCP_CLOSE; |
10742 |
++ sk->sk_state = sk->sk_state == TCP_ESTABLISHED ? TCP_CLOSING : TCP_CLOSE; |
10743 |
+ sock->state = SS_UNCONNECTED; |
10744 |
+ vsock_transport_cancel_pkt(vsk); |
10745 |
+ goto out_wait; |
10746 |
+diff --git a/net/wireless/nl80211.c b/net/wireless/nl80211.c |
10747 |
+index a5224da638328..be0f616f85d34 100644 |
10748 |
+--- a/net/wireless/nl80211.c |
10749 |
++++ b/net/wireless/nl80211.c |
10750 |
+@@ -4779,11 +4779,10 @@ static int nl80211_parse_tx_bitrate_mask(struct genl_info *info, |
10751 |
+ sband->ht_cap.mcs.rx_mask, |
10752 |
+ sizeof(mask->control[i].ht_mcs)); |
10753 |
+ |
10754 |
+- if (!sband->vht_cap.vht_supported) |
10755 |
+- continue; |
10756 |
+- |
10757 |
+- vht_tx_mcs_map = le16_to_cpu(sband->vht_cap.vht_mcs.tx_mcs_map); |
10758 |
+- vht_build_mcs_mask(vht_tx_mcs_map, mask->control[i].vht_mcs); |
10759 |
++ if (sband->vht_cap.vht_supported) { |
10760 |
++ vht_tx_mcs_map = le16_to_cpu(sband->vht_cap.vht_mcs.tx_mcs_map); |
10761 |
++ vht_build_mcs_mask(vht_tx_mcs_map, mask->control[i].vht_mcs); |
10762 |
++ } |
10763 |
+ |
10764 |
+ he_cap = ieee80211_get_he_iftype_cap(sband, wdev->iftype); |
10765 |
+ if (!he_cap) |
10766 |
+diff --git a/net/wireless/wext-spy.c b/net/wireless/wext-spy.c |
10767 |
+index 33bef22e44e95..b379a03716539 100644 |
10768 |
+--- a/net/wireless/wext-spy.c |
10769 |
++++ b/net/wireless/wext-spy.c |
10770 |
+@@ -120,8 +120,8 @@ int iw_handler_set_thrspy(struct net_device * dev, |
10771 |
+ return -EOPNOTSUPP; |
10772 |
+ |
10773 |
+ /* Just do it */ |
10774 |
+- memcpy(&(spydata->spy_thr_low), &(threshold->low), |
10775 |
+- 2 * sizeof(struct iw_quality)); |
10776 |
++ spydata->spy_thr_low = threshold->low; |
10777 |
++ spydata->spy_thr_high = threshold->high; |
10778 |
+ |
10779 |
+ /* Clear flag */ |
10780 |
+ memset(spydata->spy_thr_under, '\0', sizeof(spydata->spy_thr_under)); |
10781 |
+@@ -147,8 +147,8 @@ int iw_handler_get_thrspy(struct net_device * dev, |
10782 |
+ return -EOPNOTSUPP; |
10783 |
+ |
10784 |
+ /* Just do it */ |
10785 |
+- memcpy(&(threshold->low), &(spydata->spy_thr_low), |
10786 |
+- 2 * sizeof(struct iw_quality)); |
10787 |
++ threshold->low = spydata->spy_thr_low; |
10788 |
++ threshold->high = spydata->spy_thr_high; |
10789 |
+ |
10790 |
+ return 0; |
10791 |
+ } |
10792 |
+@@ -173,10 +173,10 @@ static void iw_send_thrspy_event(struct net_device * dev, |
10793 |
+ memcpy(threshold.addr.sa_data, address, ETH_ALEN); |
10794 |
+ threshold.addr.sa_family = ARPHRD_ETHER; |
10795 |
+ /* Copy stats */ |
10796 |
+- memcpy(&(threshold.qual), wstats, sizeof(struct iw_quality)); |
10797 |
++ threshold.qual = *wstats; |
10798 |
+ /* Copy also thresholds */ |
10799 |
+- memcpy(&(threshold.low), &(spydata->spy_thr_low), |
10800 |
+- 2 * sizeof(struct iw_quality)); |
10801 |
++ threshold.low = spydata->spy_thr_low; |
10802 |
++ threshold.high = spydata->spy_thr_high; |
10803 |
+ |
10804 |
+ /* Send event to user space */ |
10805 |
+ wireless_send_event(dev, SIOCGIWTHRSPY, &wrqu, (char *) &threshold); |
10806 |
+diff --git a/net/xfrm/xfrm_user.c b/net/xfrm/xfrm_user.c |
10807 |
+index 5a0ef4361e436..817e714dedea0 100644 |
10808 |
+--- a/net/xfrm/xfrm_user.c |
10809 |
++++ b/net/xfrm/xfrm_user.c |
10810 |
+@@ -580,6 +580,20 @@ static struct xfrm_state *xfrm_state_construct(struct net *net, |
10811 |
+ |
10812 |
+ copy_from_user_state(x, p); |
10813 |
+ |
10814 |
++ if (attrs[XFRMA_ENCAP]) { |
10815 |
++ x->encap = kmemdup(nla_data(attrs[XFRMA_ENCAP]), |
10816 |
++ sizeof(*x->encap), GFP_KERNEL); |
10817 |
++ if (x->encap == NULL) |
10818 |
++ goto error; |
10819 |
++ } |
10820 |
++ |
10821 |
++ if (attrs[XFRMA_COADDR]) { |
10822 |
++ x->coaddr = kmemdup(nla_data(attrs[XFRMA_COADDR]), |
10823 |
++ sizeof(*x->coaddr), GFP_KERNEL); |
10824 |
++ if (x->coaddr == NULL) |
10825 |
++ goto error; |
10826 |
++ } |
10827 |
++ |
10828 |
+ if (attrs[XFRMA_SA_EXTRA_FLAGS]) |
10829 |
+ x->props.extra_flags = nla_get_u32(attrs[XFRMA_SA_EXTRA_FLAGS]); |
10830 |
+ |
10831 |
+@@ -600,23 +614,9 @@ static struct xfrm_state *xfrm_state_construct(struct net *net, |
10832 |
+ attrs[XFRMA_ALG_COMP]))) |
10833 |
+ goto error; |
10834 |
+ |
10835 |
+- if (attrs[XFRMA_ENCAP]) { |
10836 |
+- x->encap = kmemdup(nla_data(attrs[XFRMA_ENCAP]), |
10837 |
+- sizeof(*x->encap), GFP_KERNEL); |
10838 |
+- if (x->encap == NULL) |
10839 |
+- goto error; |
10840 |
+- } |
10841 |
+- |
10842 |
+ if (attrs[XFRMA_TFCPAD]) |
10843 |
+ x->tfcpad = nla_get_u32(attrs[XFRMA_TFCPAD]); |
10844 |
+ |
10845 |
+- if (attrs[XFRMA_COADDR]) { |
10846 |
+- x->coaddr = kmemdup(nla_data(attrs[XFRMA_COADDR]), |
10847 |
+- sizeof(*x->coaddr), GFP_KERNEL); |
10848 |
+- if (x->coaddr == NULL) |
10849 |
+- goto error; |
10850 |
+- } |
10851 |
+- |
10852 |
+ xfrm_mark_get(attrs, &x->mark); |
10853 |
+ |
10854 |
+ xfrm_smark_init(attrs, &x->props.smark); |
10855 |
+diff --git a/security/selinux/avc.c b/security/selinux/avc.c |
10856 |
+index ad451cf9375e4..a2dc83228daf4 100644 |
10857 |
+--- a/security/selinux/avc.c |
10858 |
++++ b/security/selinux/avc.c |
10859 |
+@@ -297,26 +297,27 @@ static struct avc_xperms_decision_node |
10860 |
+ struct avc_xperms_decision_node *xpd_node; |
10861 |
+ struct extended_perms_decision *xpd; |
10862 |
+ |
10863 |
+- xpd_node = kmem_cache_zalloc(avc_xperms_decision_cachep, GFP_NOWAIT); |
10864 |
++ xpd_node = kmem_cache_zalloc(avc_xperms_decision_cachep, |
10865 |
++ GFP_NOWAIT | __GFP_NOWARN); |
10866 |
+ if (!xpd_node) |
10867 |
+ return NULL; |
10868 |
+ |
10869 |
+ xpd = &xpd_node->xpd; |
10870 |
+ if (which & XPERMS_ALLOWED) { |
10871 |
+ xpd->allowed = kmem_cache_zalloc(avc_xperms_data_cachep, |
10872 |
+- GFP_NOWAIT); |
10873 |
++ GFP_NOWAIT | __GFP_NOWARN); |
10874 |
+ if (!xpd->allowed) |
10875 |
+ goto error; |
10876 |
+ } |
10877 |
+ if (which & XPERMS_AUDITALLOW) { |
10878 |
+ xpd->auditallow = kmem_cache_zalloc(avc_xperms_data_cachep, |
10879 |
+- GFP_NOWAIT); |
10880 |
++ GFP_NOWAIT | __GFP_NOWARN); |
10881 |
+ if (!xpd->auditallow) |
10882 |
+ goto error; |
10883 |
+ } |
10884 |
+ if (which & XPERMS_DONTAUDIT) { |
10885 |
+ xpd->dontaudit = kmem_cache_zalloc(avc_xperms_data_cachep, |
10886 |
+- GFP_NOWAIT); |
10887 |
++ GFP_NOWAIT | __GFP_NOWARN); |
10888 |
+ if (!xpd->dontaudit) |
10889 |
+ goto error; |
10890 |
+ } |
10891 |
+@@ -344,7 +345,7 @@ static struct avc_xperms_node *avc_xperms_alloc(void) |
10892 |
+ { |
10893 |
+ struct avc_xperms_node *xp_node; |
10894 |
+ |
10895 |
+- xp_node = kmem_cache_zalloc(avc_xperms_cachep, GFP_NOWAIT); |
10896 |
++ xp_node = kmem_cache_zalloc(avc_xperms_cachep, GFP_NOWAIT | __GFP_NOWARN); |
10897 |
+ if (!xp_node) |
10898 |
+ return xp_node; |
10899 |
+ INIT_LIST_HEAD(&xp_node->xpd_head); |
10900 |
+@@ -500,7 +501,7 @@ static struct avc_node *avc_alloc_node(struct selinux_avc *avc) |
10901 |
+ { |
10902 |
+ struct avc_node *node; |
10903 |
+ |
10904 |
+- node = kmem_cache_zalloc(avc_node_cachep, GFP_NOWAIT); |
10905 |
++ node = kmem_cache_zalloc(avc_node_cachep, GFP_NOWAIT | __GFP_NOWARN); |
10906 |
+ if (!node) |
10907 |
+ goto out; |
10908 |
+ |
10909 |
+diff --git a/security/smack/smackfs.c b/security/smack/smackfs.c |
10910 |
+index 22ded2c26089c..1ad7d0d1ea62e 100644 |
10911 |
+--- a/security/smack/smackfs.c |
10912 |
++++ b/security/smack/smackfs.c |
10913 |
+@@ -855,6 +855,8 @@ static ssize_t smk_set_cipso(struct file *file, const char __user *buf, |
10914 |
+ if (format == SMK_FIXED24_FMT && |
10915 |
+ (count < SMK_CIPSOMIN || count > SMK_CIPSOMAX)) |
10916 |
+ return -EINVAL; |
10917 |
++ if (count > PAGE_SIZE) |
10918 |
++ return -EINVAL; |
10919 |
+ |
10920 |
+ data = memdup_user_nul(buf, count); |
10921 |
+ if (IS_ERR(data)) |
10922 |
+diff --git a/sound/soc/tegra/tegra_alc5632.c b/sound/soc/tegra/tegra_alc5632.c |
10923 |
+index 0a0efd24e4b0f..81ea6ceba689a 100644 |
10924 |
+--- a/sound/soc/tegra/tegra_alc5632.c |
10925 |
++++ b/sound/soc/tegra/tegra_alc5632.c |
10926 |
+@@ -139,6 +139,7 @@ static struct snd_soc_dai_link tegra_alc5632_dai = { |
10927 |
+ |
10928 |
+ static struct snd_soc_card snd_soc_tegra_alc5632 = { |
10929 |
+ .name = "tegra-alc5632", |
10930 |
++ .driver_name = "tegra", |
10931 |
+ .owner = THIS_MODULE, |
10932 |
+ .dai_link = &tegra_alc5632_dai, |
10933 |
+ .num_links = 1, |
10934 |
+diff --git a/sound/soc/tegra/tegra_max98090.c b/sound/soc/tegra/tegra_max98090.c |
10935 |
+index 00c19704057b6..5a649810c0c87 100644 |
10936 |
+--- a/sound/soc/tegra/tegra_max98090.c |
10937 |
++++ b/sound/soc/tegra/tegra_max98090.c |
10938 |
+@@ -182,6 +182,7 @@ static struct snd_soc_dai_link tegra_max98090_dai = { |
10939 |
+ |
10940 |
+ static struct snd_soc_card snd_soc_tegra_max98090 = { |
10941 |
+ .name = "tegra-max98090", |
10942 |
++ .driver_name = "tegra", |
10943 |
+ .owner = THIS_MODULE, |
10944 |
+ .dai_link = &tegra_max98090_dai, |
10945 |
+ .num_links = 1, |
10946 |
+diff --git a/sound/soc/tegra/tegra_rt5640.c b/sound/soc/tegra/tegra_rt5640.c |
10947 |
+index 9afba37a3b086..3344f16258bec 100644 |
10948 |
+--- a/sound/soc/tegra/tegra_rt5640.c |
10949 |
++++ b/sound/soc/tegra/tegra_rt5640.c |
10950 |
+@@ -132,6 +132,7 @@ static struct snd_soc_dai_link tegra_rt5640_dai = { |
10951 |
+ |
10952 |
+ static struct snd_soc_card snd_soc_tegra_rt5640 = { |
10953 |
+ .name = "tegra-rt5640", |
10954 |
++ .driver_name = "tegra", |
10955 |
+ .owner = THIS_MODULE, |
10956 |
+ .dai_link = &tegra_rt5640_dai, |
10957 |
+ .num_links = 1, |
10958 |
+diff --git a/sound/soc/tegra/tegra_rt5677.c b/sound/soc/tegra/tegra_rt5677.c |
10959 |
+index d30f8b6deda4b..0f03e97d93558 100644 |
10960 |
+--- a/sound/soc/tegra/tegra_rt5677.c |
10961 |
++++ b/sound/soc/tegra/tegra_rt5677.c |
10962 |
+@@ -175,6 +175,7 @@ static struct snd_soc_dai_link tegra_rt5677_dai = { |
10963 |
+ |
10964 |
+ static struct snd_soc_card snd_soc_tegra_rt5677 = { |
10965 |
+ .name = "tegra-rt5677", |
10966 |
++ .driver_name = "tegra", |
10967 |
+ .owner = THIS_MODULE, |
10968 |
+ .dai_link = &tegra_rt5677_dai, |
10969 |
+ .num_links = 1, |
10970 |
+diff --git a/sound/soc/tegra/tegra_sgtl5000.c b/sound/soc/tegra/tegra_sgtl5000.c |
10971 |
+index 885332170c77b..ef6a553e0b7da 100644 |
10972 |
+--- a/sound/soc/tegra/tegra_sgtl5000.c |
10973 |
++++ b/sound/soc/tegra/tegra_sgtl5000.c |
10974 |
+@@ -97,6 +97,7 @@ static struct snd_soc_dai_link tegra_sgtl5000_dai = { |
10975 |
+ |
10976 |
+ static struct snd_soc_card snd_soc_tegra_sgtl5000 = { |
10977 |
+ .name = "tegra-sgtl5000", |
10978 |
++ .driver_name = "tegra", |
10979 |
+ .owner = THIS_MODULE, |
10980 |
+ .dai_link = &tegra_sgtl5000_dai, |
10981 |
+ .num_links = 1, |
10982 |
+diff --git a/sound/soc/tegra/tegra_wm8753.c b/sound/soc/tegra/tegra_wm8753.c |
10983 |
+index efd7938866895..27089077f2ea4 100644 |
10984 |
+--- a/sound/soc/tegra/tegra_wm8753.c |
10985 |
++++ b/sound/soc/tegra/tegra_wm8753.c |
10986 |
+@@ -101,6 +101,7 @@ static struct snd_soc_dai_link tegra_wm8753_dai = { |
10987 |
+ |
10988 |
+ static struct snd_soc_card snd_soc_tegra_wm8753 = { |
10989 |
+ .name = "tegra-wm8753", |
10990 |
++ .driver_name = "tegra", |
10991 |
+ .owner = THIS_MODULE, |
10992 |
+ .dai_link = &tegra_wm8753_dai, |
10993 |
+ .num_links = 1, |
10994 |
+diff --git a/sound/soc/tegra/tegra_wm8903.c b/sound/soc/tegra/tegra_wm8903.c |
10995 |
+index e4863fa37b0c6..f219c26d66a31 100644 |
10996 |
+--- a/sound/soc/tegra/tegra_wm8903.c |
10997 |
++++ b/sound/soc/tegra/tegra_wm8903.c |
10998 |
+@@ -235,6 +235,7 @@ static struct snd_soc_dai_link tegra_wm8903_dai = { |
10999 |
+ |
11000 |
+ static struct snd_soc_card snd_soc_tegra_wm8903 = { |
11001 |
+ .name = "tegra-wm8903", |
11002 |
++ .driver_name = "tegra", |
11003 |
+ .owner = THIS_MODULE, |
11004 |
+ .dai_link = &tegra_wm8903_dai, |
11005 |
+ .num_links = 1, |
11006 |
+diff --git a/sound/soc/tegra/tegra_wm9712.c b/sound/soc/tegra/tegra_wm9712.c |
11007 |
+index 4f09a178049d3..c66da161c85aa 100644 |
11008 |
+--- a/sound/soc/tegra/tegra_wm9712.c |
11009 |
++++ b/sound/soc/tegra/tegra_wm9712.c |
11010 |
+@@ -54,6 +54,7 @@ static struct snd_soc_dai_link tegra_wm9712_dai = { |
11011 |
+ |
11012 |
+ static struct snd_soc_card snd_soc_tegra_wm9712 = { |
11013 |
+ .name = "tegra-wm9712", |
11014 |
++ .driver_name = "tegra", |
11015 |
+ .owner = THIS_MODULE, |
11016 |
+ .dai_link = &tegra_wm9712_dai, |
11017 |
+ .num_links = 1, |
11018 |
+diff --git a/sound/soc/tegra/trimslice.c b/sound/soc/tegra/trimslice.c |
11019 |
+index 6c1cc3d0ac336..cb4c8f72e4e67 100644 |
11020 |
+--- a/sound/soc/tegra/trimslice.c |
11021 |
++++ b/sound/soc/tegra/trimslice.c |
11022 |
+@@ -94,6 +94,7 @@ static struct snd_soc_dai_link trimslice_tlv320aic23_dai = { |
11023 |
+ |
11024 |
+ static struct snd_soc_card snd_soc_trimslice = { |
11025 |
+ .name = "tegra-trimslice", |
11026 |
++ .driver_name = "tegra", |
11027 |
+ .owner = THIS_MODULE, |
11028 |
+ .dai_link = &trimslice_tlv320aic23_dai, |
11029 |
+ .num_links = 1, |
11030 |
+diff --git a/tools/testing/selftests/drivers/net/mlxsw/devlink_trap_l3_drops.sh b/tools/testing/selftests/drivers/net/mlxsw/devlink_trap_l3_drops.sh |
11031 |
+index 4029833f7e271..160891dcb4bcb 100755 |
11032 |
+--- a/tools/testing/selftests/drivers/net/mlxsw/devlink_trap_l3_drops.sh |
11033 |
++++ b/tools/testing/selftests/drivers/net/mlxsw/devlink_trap_l3_drops.sh |
11034 |
+@@ -109,6 +109,9 @@ router_destroy() |
11035 |
+ __addr_add_del $rp1 del 192.0.2.2/24 2001:db8:1::2/64 |
11036 |
+ |
11037 |
+ tc qdisc del dev $rp2 clsact |
11038 |
++ |
11039 |
++ ip link set dev $rp2 down |
11040 |
++ ip link set dev $rp1 down |
11041 |
+ } |
11042 |
+ |
11043 |
+ setup_prepare() |
11044 |
+diff --git a/tools/testing/selftests/drivers/net/mlxsw/devlink_trap_l3_exceptions.sh b/tools/testing/selftests/drivers/net/mlxsw/devlink_trap_l3_exceptions.sh |
11045 |
+index 1fedfc9da434f..1d157b1bd838a 100755 |
11046 |
+--- a/tools/testing/selftests/drivers/net/mlxsw/devlink_trap_l3_exceptions.sh |
11047 |
++++ b/tools/testing/selftests/drivers/net/mlxsw/devlink_trap_l3_exceptions.sh |
11048 |
+@@ -111,6 +111,9 @@ router_destroy() |
11049 |
+ __addr_add_del $rp1 del 192.0.2.2/24 2001:db8:1::2/64 |
11050 |
+ |
11051 |
+ tc qdisc del dev $rp2 clsact |
11052 |
++ |
11053 |
++ ip link set dev $rp2 down |
11054 |
++ ip link set dev $rp1 down |
11055 |
+ } |
11056 |
+ |
11057 |
+ setup_prepare() |
11058 |
+diff --git a/tools/testing/selftests/drivers/net/mlxsw/qos_dscp_bridge.sh b/tools/testing/selftests/drivers/net/mlxsw/qos_dscp_bridge.sh |
11059 |
+index 5cbff8038f84c..28a570006d4d9 100755 |
11060 |
+--- a/tools/testing/selftests/drivers/net/mlxsw/qos_dscp_bridge.sh |
11061 |
++++ b/tools/testing/selftests/drivers/net/mlxsw/qos_dscp_bridge.sh |
11062 |
+@@ -93,7 +93,9 @@ switch_destroy() |
11063 |
+ lldptool -T -i $swp1 -V APP -d $(dscp_map 10) >/dev/null |
11064 |
+ lldpad_app_wait_del |
11065 |
+ |
11066 |
++ ip link set dev $swp2 down |
11067 |
+ ip link set dev $swp2 nomaster |
11068 |
++ ip link set dev $swp1 down |
11069 |
+ ip link set dev $swp1 nomaster |
11070 |
+ ip link del dev br1 |
11071 |
+ } |
11072 |
+diff --git a/tools/testing/selftests/lkdtm/tests.txt b/tools/testing/selftests/lkdtm/tests.txt |
11073 |
+index 11ef159be0fd4..a5fce7fd4520d 100644 |
11074 |
+--- a/tools/testing/selftests/lkdtm/tests.txt |
11075 |
++++ b/tools/testing/selftests/lkdtm/tests.txt |
11076 |
+@@ -11,7 +11,7 @@ CORRUPT_LIST_ADD list_add corruption |
11077 |
+ CORRUPT_LIST_DEL list_del corruption |
11078 |
+ STACK_GUARD_PAGE_LEADING |
11079 |
+ STACK_GUARD_PAGE_TRAILING |
11080 |
+-UNSET_SMEP CR4 bits went missing |
11081 |
++UNSET_SMEP pinned CR4 bits changed: |
11082 |
+ DOUBLE_FAULT |
11083 |
+ CORRUPT_PAC |
11084 |
+ UNALIGNED_LOAD_STORE_WRITE |
11085 |
+diff --git a/tools/testing/selftests/net/forwarding/pedit_dsfield.sh b/tools/testing/selftests/net/forwarding/pedit_dsfield.sh |
11086 |
+index 55eeacf592411..64fbd211d907b 100755 |
11087 |
+--- a/tools/testing/selftests/net/forwarding/pedit_dsfield.sh |
11088 |
++++ b/tools/testing/selftests/net/forwarding/pedit_dsfield.sh |
11089 |
+@@ -75,7 +75,9 @@ switch_destroy() |
11090 |
+ tc qdisc del dev $swp2 clsact |
11091 |
+ tc qdisc del dev $swp1 clsact |
11092 |
+ |
11093 |
++ ip link set dev $swp2 down |
11094 |
+ ip link set dev $swp2 nomaster |
11095 |
++ ip link set dev $swp1 down |
11096 |
+ ip link set dev $swp1 nomaster |
11097 |
+ ip link del dev br1 |
11098 |
+ } |
11099 |
+diff --git a/tools/testing/selftests/net/forwarding/pedit_l4port.sh b/tools/testing/selftests/net/forwarding/pedit_l4port.sh |
11100 |
+index 5f20d289ee43c..10e594c551175 100755 |
11101 |
+--- a/tools/testing/selftests/net/forwarding/pedit_l4port.sh |
11102 |
++++ b/tools/testing/selftests/net/forwarding/pedit_l4port.sh |
11103 |
+@@ -71,7 +71,9 @@ switch_destroy() |
11104 |
+ tc qdisc del dev $swp2 clsact |
11105 |
+ tc qdisc del dev $swp1 clsact |
11106 |
+ |
11107 |
++ ip link set dev $swp2 down |
11108 |
+ ip link set dev $swp2 nomaster |
11109 |
++ ip link set dev $swp1 down |
11110 |
+ ip link set dev $swp1 nomaster |
11111 |
+ ip link del dev br1 |
11112 |
+ } |
11113 |
+diff --git a/tools/testing/selftests/net/forwarding/skbedit_priority.sh b/tools/testing/selftests/net/forwarding/skbedit_priority.sh |
11114 |
+index e3bd8a6bb8b40..bde11dc27873c 100755 |
11115 |
+--- a/tools/testing/selftests/net/forwarding/skbedit_priority.sh |
11116 |
++++ b/tools/testing/selftests/net/forwarding/skbedit_priority.sh |
11117 |
+@@ -72,7 +72,9 @@ switch_destroy() |
11118 |
+ tc qdisc del dev $swp2 clsact |
11119 |
+ tc qdisc del dev $swp1 clsact |
11120 |
+ |
11121 |
++ ip link set dev $swp2 down |
11122 |
+ ip link set dev $swp2 nomaster |
11123 |
++ ip link set dev $swp1 down |
11124 |
+ ip link set dev $swp1 nomaster |
11125 |
+ ip link del dev br1 |
11126 |
+ } |
11127 |
+diff --git a/tools/testing/selftests/resctrl/README b/tools/testing/selftests/resctrl/README |
11128 |
+index 6e5a0ffa18e8b..20502cb4791fc 100644 |
11129 |
+--- a/tools/testing/selftests/resctrl/README |
11130 |
++++ b/tools/testing/selftests/resctrl/README |
11131 |
+@@ -47,7 +47,7 @@ Parameter '-h' shows usage information. |
11132 |
+ |
11133 |
+ usage: resctrl_tests [-h] [-b "benchmark_cmd [options]"] [-t test list] [-n no_of_bits] |
11134 |
+ -b benchmark_cmd [options]: run specified benchmark for MBM, MBA and CQM default benchmark is builtin fill_buf |
11135 |
+- -t test list: run tests specified in the test list, e.g. -t mbm, mba, cqm, cat |
11136 |
++ -t test list: run tests specified in the test list, e.g. -t mbm,mba,cqm,cat |
11137 |
+ -n no_of_bits: run cache tests using specified no of bits in cache bit mask |
11138 |
+ -p cpu_no: specify CPU number to run the test. 1 is default |
11139 |
+ -h: help |
11140 |
+diff --git a/tools/testing/selftests/resctrl/resctrl_tests.c b/tools/testing/selftests/resctrl/resctrl_tests.c |
11141 |
+index ac2269610aa9d..bd98746c6f858 100644 |
11142 |
+--- a/tools/testing/selftests/resctrl/resctrl_tests.c |
11143 |
++++ b/tools/testing/selftests/resctrl/resctrl_tests.c |
11144 |
+@@ -40,7 +40,7 @@ static void cmd_help(void) |
11145 |
+ printf("\t-b benchmark_cmd [options]: run specified benchmark for MBM, MBA and CQM"); |
11146 |
+ printf("\t default benchmark is builtin fill_buf\n"); |
11147 |
+ printf("\t-t test list: run tests specified in the test list, "); |
11148 |
+- printf("e.g. -t mbm, mba, cqm, cat\n"); |
11149 |
++ printf("e.g. -t mbm,mba,cqm,cat\n"); |
11150 |
+ printf("\t-n no_of_bits: run cache tests using specified no of bits in cache bit mask\n"); |
11151 |
+ printf("\t-p cpu_no: specify CPU number to run the test. 1 is default\n"); |
11152 |
+ printf("\t-h: help\n"); |
11153 |
+@@ -98,7 +98,7 @@ int main(int argc, char **argv) |
11154 |
+ |
11155 |
+ return -1; |
11156 |
+ } |
11157 |
+- token = strtok(NULL, ":\t"); |
11158 |
++ token = strtok(NULL, ","); |
11159 |
+ } |
11160 |
+ break; |
11161 |
+ case 'p': |