1 |
commit: 8eefaf79a2b1d9b42374f02f4c13f2a74f87713d |
2 |
Author: Mike Pagano <mpagano <AT> gentoo <DOT> org> |
3 |
AuthorDate: Sat Nov 17 14:51:58 2018 +0000 |
4 |
Commit: Mike Pagano <mpagano <AT> gentoo <DOT> org> |
5 |
CommitDate: Sat Nov 17 14:51:58 2018 +0000 |
6 |
URL: https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=8eefaf79 |
7 |
|
8 |
proj/linux-patches: Port patches to the 4.20 branch |
9 |
|
10 |
Patch to support for namespace user.pax.* on tmpfs. |
11 |
Enable link security restrictions by default. |
12 |
Add UAS disable quirk. See bug #640082. |
13 |
hid-apple patch to enable swapping of the FN and left Control keys and |
14 |
on some apple keyboards. See bug #622902. |
15 |
Enable control of the unaligned access control policy from sysctl |
16 |
Kernel patch enables gcc >= v4.13 optimizations for additional CPUs. |
17 |
|
18 |
Signed-off-by: Mike Pagano <mpagano <AT> gentoo.org> |
19 |
|
20 |
0000_README | 24 + |
21 |
1500_XATTR_USER_PREFIX.patch | 69 +++ |
22 |
...ble-link-security-restrictions-by-default.patch | 20 + |
23 |
...age-Disable-UAS-on-JMicron-SATA-enclosure.patch | 40 ++ |
24 |
2600_enable-key-swapping-for-apple-mac.patch | 114 +++++ |
25 |
4400_alpha-sysctl-uac.patch | 142 ++++++ |
26 |
...able-additional-cpu-optimizations-for-gcc.patch | 545 +++++++++++++++++++++ |
27 |
7 files changed, 954 insertions(+) |
28 |
|
29 |
diff --git a/0000_README b/0000_README |
30 |
index 9018993..f19e624 100644 |
31 |
--- a/0000_README |
32 |
+++ b/0000_README |
33 |
@@ -43,6 +43,30 @@ EXPERIMENTAL |
34 |
Individual Patch Descriptions: |
35 |
-------------------------------------------------------------------------- |
36 |
|
37 |
+Patch: 1500_XATTR_USER_PREFIX.patch |
38 |
+From: https://bugs.gentoo.org/show_bug.cgi?id=470644 |
39 |
+Desc: Support for namespace user.pax.* on tmpfs. |
40 |
+ |
41 |
+Patch: 1510_fs-enable-link-security-restrictions-by-default.patch |
42 |
+From: http://sources.debian.net/src/linux/3.16.7-ckt4-3/debian/patches/debian/fs-enable-link-security-restrictions-by-default.patch/ |
43 |
+Desc: Enable link security restrictions by default. |
44 |
+ |
45 |
+Patch: 2500_usb-storage-Disable-UAS-on-JMicron-SATA-enclosure.patch |
46 |
+From: https://bugzilla.redhat.com/show_bug.cgi?id=1260207#c5 |
47 |
+Desc: Add UAS disable quirk. See bug #640082. |
48 |
+ |
49 |
+Patch: 2600_enable-key-swapping-for-apple-mac.patch |
50 |
+From: https://github.com/free5lot/hid-apple-patched |
51 |
+Desc: This hid-apple patch enables swapping of the FN and left Control keys and some additional on some apple keyboards. See bug #622902 |
52 |
+ |
53 |
+Patch: 4400_alpha-sysctl-uac.patch |
54 |
+From: Tobias Klausmann (klausman@g.o) and http://bugs.gentoo.org/show_bug.cgi?id=217323 |
55 |
+Desc: Enable control of the unaligned access control policy from sysctl |
56 |
+ |
57 |
Patch: 4567_distro-Gentoo-Kconfig.patch |
58 |
From: Tom Wijsman <TomWij@g.o> |
59 |
Desc: Add Gentoo Linux support config settings and defaults. |
60 |
+ |
61 |
+Patch: 5010_enable-additional-cpu-optimizations-for-gcc.patch |
62 |
+From: https://github.com/graysky2/kernel_gcc_patch/ |
63 |
+Desc: Kernel patch enables gcc >= v4.13 optimizations for additional CPUs. |
64 |
|
65 |
diff --git a/1500_XATTR_USER_PREFIX.patch b/1500_XATTR_USER_PREFIX.patch |
66 |
new file mode 100644 |
67 |
index 0000000..bacd032 |
68 |
--- /dev/null |
69 |
+++ b/1500_XATTR_USER_PREFIX.patch |
70 |
@@ -0,0 +1,69 @@ |
71 |
+From: Anthony G. Basile <blueness@g.o> |
72 |
+ |
73 |
+This patch adds support for a restricted user-controlled namespace on |
74 |
+tmpfs filesystem used to house PaX flags. The namespace must be of the |
75 |
+form user.pax.* and its value cannot exceed a size of 8 bytes. |
76 |
+ |
77 |
+This is needed even on all Gentoo systems so that XATTR_PAX flags |
78 |
+are preserved for users who might build packages using portage on |
79 |
+a tmpfs system with a non-hardened kernel and then switch to a |
80 |
+hardened kernel with XATTR_PAX enabled. |
81 |
+ |
82 |
+The namespace is added to any user with Extended Attribute support |
83 |
+enabled for tmpfs. Users who do not enable xattrs will not have |
84 |
+the XATTR_PAX flags preserved. |
85 |
+ |
86 |
+diff --git a/include/uapi/linux/xattr.h b/include/uapi/linux/xattr.h |
87 |
+index 1590c49..5eab462 100644 |
88 |
+--- a/include/uapi/linux/xattr.h |
89 |
++++ b/include/uapi/linux/xattr.h |
90 |
+@@ -73,5 +73,9 @@ |
91 |
+ #define XATTR_POSIX_ACL_DEFAULT "posix_acl_default" |
92 |
+ #define XATTR_NAME_POSIX_ACL_DEFAULT XATTR_SYSTEM_PREFIX XATTR_POSIX_ACL_DEFAULT |
93 |
+ |
94 |
++/* User namespace */ |
95 |
++#define XATTR_PAX_PREFIX XATTR_USER_PREFIX "pax." |
96 |
++#define XATTR_PAX_FLAGS_SUFFIX "flags" |
97 |
++#define XATTR_NAME_PAX_FLAGS XATTR_PAX_PREFIX XATTR_PAX_FLAGS_SUFFIX |
98 |
+ |
99 |
+ #endif /* _UAPI_LINUX_XATTR_H */ |
100 |
+diff --git a/mm/shmem.c b/mm/shmem.c |
101 |
+index 440e2a7..c377172 100644 |
102 |
+--- a/mm/shmem.c |
103 |
++++ b/mm/shmem.c |
104 |
+@@ -2667,6 +2667,14 @@ static int shmem_xattr_handler_set(const struct xattr_handler *handler, |
105 |
+ struct shmem_inode_info *info = SHMEM_I(d_inode(dentry)); |
106 |
+ |
107 |
+ name = xattr_full_name(handler, name); |
108 |
++ |
109 |
++ if (!strncmp(name, XATTR_USER_PREFIX, XATTR_USER_PREFIX_LEN)) { |
110 |
++ if (strcmp(name, XATTR_NAME_PAX_FLAGS)) |
111 |
++ return -EOPNOTSUPP; |
112 |
++ if (size > 8) |
113 |
++ return -EINVAL; |
114 |
++ } |
115 |
++ |
116 |
+ return simple_xattr_set(&info->xattrs, name, value, size, flags); |
117 |
+ } |
118 |
+ |
119 |
+@@ -2682,6 +2690,12 @@ static const struct xattr_handler shmem_trusted_xattr_handler = { |
120 |
+ .set = shmem_xattr_handler_set, |
121 |
+ }; |
122 |
+ |
123 |
++static const struct xattr_handler shmem_user_xattr_handler = { |
124 |
++ .prefix = XATTR_USER_PREFIX, |
125 |
++ .get = shmem_xattr_handler_get, |
126 |
++ .set = shmem_xattr_handler_set, |
127 |
++}; |
128 |
++ |
129 |
+ static const struct xattr_handler *shmem_xattr_handlers[] = { |
130 |
+ #ifdef CONFIG_TMPFS_POSIX_ACL |
131 |
+ &posix_acl_access_xattr_handler, |
132 |
+@@ -2689,6 +2703,7 @@ static const struct xattr_handler *shmem_xattr_handlers[] = { |
133 |
+ #endif |
134 |
+ &shmem_security_xattr_handler, |
135 |
+ &shmem_trusted_xattr_handler, |
136 |
++ &shmem_user_xattr_handler, |
137 |
+ NULL |
138 |
+ }; |
139 |
+ |
140 |
|
141 |
diff --git a/1510_fs-enable-link-security-restrictions-by-default.patch b/1510_fs-enable-link-security-restrictions-by-default.patch |
142 |
new file mode 100644 |
143 |
index 0000000..f0ed144 |
144 |
--- /dev/null |
145 |
+++ b/1510_fs-enable-link-security-restrictions-by-default.patch |
146 |
@@ -0,0 +1,20 @@ |
147 |
+From: Ben Hutchings <ben@××××××××××××.uk> |
148 |
+Subject: fs: Enable link security restrictions by default |
149 |
+Date: Fri, 02 Nov 2012 05:32:06 +0000 |
150 |
+Bug-Debian: https://bugs.debian.org/609455 |
151 |
+Forwarded: not-needed |
152 |
+This reverts commit 561ec64ae67ef25cac8d72bb9c4bfc955edfd415 |
153 |
+('VFS: don't do protected {sym,hard}links by default'). |
154 |
+--- a/fs/namei.c 2018-09-28 07:56:07.770005006 -0400 |
155 |
++++ b/fs/namei.c 2018-09-28 07:56:43.370349204 -0400 |
156 |
+@@ -885,8 +885,8 @@ static inline void put_link(struct namei |
157 |
+ path_put(&last->link); |
158 |
+ } |
159 |
+ |
160 |
+-int sysctl_protected_symlinks __read_mostly = 0; |
161 |
+-int sysctl_protected_hardlinks __read_mostly = 0; |
162 |
++int sysctl_protected_symlinks __read_mostly = 1; |
163 |
++int sysctl_protected_hardlinks __read_mostly = 1; |
164 |
+ int sysctl_protected_fifos __read_mostly; |
165 |
+ int sysctl_protected_regular __read_mostly; |
166 |
+ |
167 |
|
168 |
diff --git a/2500_usb-storage-Disable-UAS-on-JMicron-SATA-enclosure.patch b/2500_usb-storage-Disable-UAS-on-JMicron-SATA-enclosure.patch |
169 |
new file mode 100644 |
170 |
index 0000000..0dd93ef |
171 |
--- /dev/null |
172 |
+++ b/2500_usb-storage-Disable-UAS-on-JMicron-SATA-enclosure.patch |
173 |
@@ -0,0 +1,40 @@ |
174 |
+From d02a55182307c01136b599fd048b4679f259a84e Mon Sep 17 00:00:00 2001 |
175 |
+From: Laura Abbott <labbott@×××××××××××××.org> |
176 |
+Date: Tue, 8 Sep 2015 09:53:38 -0700 |
177 |
+Subject: [PATCH] usb-storage: Disable UAS on JMicron SATA enclosure |
178 |
+ |
179 |
+Steve Ellis reported incorrect block sizes and alignement |
180 |
+offsets with a SATA enclosure. Adding a quirk to disable |
181 |
+UAS fixes the problems. |
182 |
+ |
183 |
+Reported-by: Steven Ellis <sellis@××××××.com> |
184 |
+Signed-off-by: Laura Abbott <labbott@×××××××××××××.org> |
185 |
+--- |
186 |
+ drivers/usb/storage/unusual_uas.h | 7 +++++-- |
187 |
+ 1 file changed, 5 insertions(+), 2 deletions(-) |
188 |
+ |
189 |
+diff --git a/drivers/usb/storage/unusual_uas.h b/drivers/usb/storage/unusual_uas.h |
190 |
+index c85ea53..216d93d 100644 |
191 |
+--- a/drivers/usb/storage/unusual_uas.h |
192 |
++++ b/drivers/usb/storage/unusual_uas.h |
193 |
+@@ -141,12 +141,15 @@ UNUSUAL_DEV(0x2109, 0x0711, 0x0000, 0x9999, |
194 |
+ USB_SC_DEVICE, USB_PR_DEVICE, NULL, |
195 |
+ US_FL_NO_ATA_1X), |
196 |
+ |
197 |
+-/* Reported-by: Takeo Nakayama <javhera@×××.com> */ |
198 |
++/* |
199 |
++ * Initially Reported-by: Takeo Nakayama <javhera@×××.com> |
200 |
++ * UAS Ignore Reported by Steven Ellis <sellis@××××××.com> |
201 |
++ */ |
202 |
+ UNUSUAL_DEV(0x357d, 0x7788, 0x0000, 0x9999, |
203 |
+ "JMicron", |
204 |
+ "JMS566", |
205 |
+ USB_SC_DEVICE, USB_PR_DEVICE, NULL, |
206 |
+- US_FL_NO_REPORT_OPCODES), |
207 |
++ US_FL_NO_REPORT_OPCODES | US_FL_IGNORE_UAS), |
208 |
+ |
209 |
+ /* Reported-by: Hans de Goede <hdegoede@××××××.com> */ |
210 |
+ UNUSUAL_DEV(0x4971, 0x1012, 0x0000, 0x9999, |
211 |
+-- |
212 |
+2.4.3 |
213 |
+ |
214 |
|
215 |
diff --git a/2600_enable-key-swapping-for-apple-mac.patch b/2600_enable-key-swapping-for-apple-mac.patch |
216 |
new file mode 100644 |
217 |
index 0000000..ab228d3 |
218 |
--- /dev/null |
219 |
+++ b/2600_enable-key-swapping-for-apple-mac.patch |
220 |
@@ -0,0 +1,114 @@ |
221 |
+--- a/drivers/hid/hid-apple.c |
222 |
++++ b/drivers/hid/hid-apple.c |
223 |
+@@ -52,6 +52,22 @@ |
224 |
+ "(For people who want to keep Windows PC keyboard muscle memory. " |
225 |
+ "[0] = as-is, Mac layout. 1 = swapped, Windows layout.)"); |
226 |
+ |
227 |
++static unsigned int swap_fn_leftctrl; |
228 |
++module_param(swap_fn_leftctrl, uint, 0644); |
229 |
++MODULE_PARM_DESC(swap_fn_leftctrl, "Swap the Fn and left Control keys. " |
230 |
++ "(For people who want to keep PC keyboard muscle memory. " |
231 |
++ "[0] = as-is, Mac layout, 1 = swapped, PC layout)"); |
232 |
++ |
233 |
++static unsigned int rightalt_as_rightctrl; |
234 |
++module_param(rightalt_as_rightctrl, uint, 0644); |
235 |
++MODULE_PARM_DESC(rightalt_as_rightctrl, "Use the right Alt key as a right Ctrl key. " |
236 |
++ "[0] = as-is, Mac layout. 1 = Right Alt is right Ctrl"); |
237 |
++ |
238 |
++static unsigned int ejectcd_as_delete; |
239 |
++module_param(ejectcd_as_delete, uint, 0644); |
240 |
++MODULE_PARM_DESC(ejectcd_as_delete, "Use Eject-CD key as Delete key. " |
241 |
++ "([0] = disabled, 1 = enabled)"); |
242 |
++ |
243 |
+ struct apple_sc { |
244 |
+ unsigned long quirks; |
245 |
+ unsigned int fn_on; |
246 |
+@@ -164,6 +180,21 @@ |
247 |
+ { } |
248 |
+ }; |
249 |
+ |
250 |
++static const struct apple_key_translation swapped_fn_leftctrl_keys[] = { |
251 |
++ { KEY_FN, KEY_LEFTCTRL }, |
252 |
++ { } |
253 |
++}; |
254 |
++ |
255 |
++static const struct apple_key_translation rightalt_as_rightctrl_keys[] = { |
256 |
++ { KEY_RIGHTALT, KEY_RIGHTCTRL }, |
257 |
++ { } |
258 |
++}; |
259 |
++ |
260 |
++static const struct apple_key_translation ejectcd_as_delete_keys[] = { |
261 |
++ { KEY_EJECTCD, KEY_DELETE }, |
262 |
++ { } |
263 |
++}; |
264 |
++ |
265 |
+ static const struct apple_key_translation *apple_find_translation( |
266 |
+ const struct apple_key_translation *table, u16 from) |
267 |
+ { |
268 |
+@@ -183,9 +214,11 @@ |
269 |
+ struct apple_sc *asc = hid_get_drvdata(hid); |
270 |
+ const struct apple_key_translation *trans, *table; |
271 |
+ |
272 |
+- if (usage->code == KEY_FN) { |
273 |
++ u16 fn_keycode = (swap_fn_leftctrl) ? (KEY_LEFTCTRL) : (KEY_FN); |
274 |
++ |
275 |
++ if (usage->code == fn_keycode) { |
276 |
+ asc->fn_on = !!value; |
277 |
+- input_event(input, usage->type, usage->code, value); |
278 |
++ input_event(input, usage->type, KEY_FN, value); |
279 |
+ return 1; |
280 |
+ } |
281 |
+ |
282 |
+@@ -264,6 +297,30 @@ |
283 |
+ } |
284 |
+ } |
285 |
+ |
286 |
++ if (swap_fn_leftctrl) { |
287 |
++ trans = apple_find_translation(swapped_fn_leftctrl_keys, usage->code); |
288 |
++ if (trans) { |
289 |
++ input_event(input, usage->type, trans->to, value); |
290 |
++ return 1; |
291 |
++ } |
292 |
++ } |
293 |
++ |
294 |
++ if (ejectcd_as_delete) { |
295 |
++ trans = apple_find_translation(ejectcd_as_delete_keys, usage->code); |
296 |
++ if (trans) { |
297 |
++ input_event(input, usage->type, trans->to, value); |
298 |
++ return 1; |
299 |
++ } |
300 |
++ } |
301 |
++ |
302 |
++ if (rightalt_as_rightctrl) { |
303 |
++ trans = apple_find_translation(rightalt_as_rightctrl_keys, usage->code); |
304 |
++ if (trans) { |
305 |
++ input_event(input, usage->type, trans->to, value); |
306 |
++ return 1; |
307 |
++ } |
308 |
++ } |
309 |
++ |
310 |
+ return 0; |
311 |
+ } |
312 |
+ |
313 |
+@@ -327,6 +384,21 @@ |
314 |
+ |
315 |
+ for (trans = apple_iso_keyboard; trans->from; trans++) |
316 |
+ set_bit(trans->to, input->keybit); |
317 |
++ |
318 |
++ if (swap_fn_leftctrl) { |
319 |
++ for (trans = swapped_fn_leftctrl_keys; trans->from; trans++) |
320 |
++ set_bit(trans->to, input->keybit); |
321 |
++ } |
322 |
++ |
323 |
++ if (ejectcd_as_delete) { |
324 |
++ for (trans = ejectcd_as_delete_keys; trans->from; trans++) |
325 |
++ set_bit(trans->to, input->keybit); |
326 |
++ } |
327 |
++ |
328 |
++ if (rightalt_as_rightctrl) { |
329 |
++ for (trans = rightalt_as_rightctrl_keys; trans->from; trans++) |
330 |
++ set_bit(trans->to, input->keybit); |
331 |
++ } |
332 |
+ } |
333 |
+ |
334 |
+ static int apple_input_mapping(struct hid_device *hdev, struct hid_input *hi, |
335 |
|
336 |
diff --git a/4400_alpha-sysctl-uac.patch b/4400_alpha-sysctl-uac.patch |
337 |
new file mode 100644 |
338 |
index 0000000..d42b4ed |
339 |
--- /dev/null |
340 |
+++ b/4400_alpha-sysctl-uac.patch |
341 |
@@ -0,0 +1,142 @@ |
342 |
+diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig |
343 |
+index 7f312d8..1eb686b 100644 |
344 |
+--- a/arch/alpha/Kconfig |
345 |
++++ b/arch/alpha/Kconfig |
346 |
+@@ -697,6 +697,33 @@ config HZ |
347 |
+ default 1200 if HZ_1200 |
348 |
+ default 1024 |
349 |
+ |
350 |
++config ALPHA_UAC_SYSCTL |
351 |
++ bool "Configure UAC policy via sysctl" |
352 |
++ depends on SYSCTL |
353 |
++ default y |
354 |
++ ---help--- |
355 |
++ Configuring the UAC (unaligned access control) policy on a Linux |
356 |
++ system usually involves setting a compile time define. If you say |
357 |
++ Y here, you will be able to modify the UAC policy at runtime using |
358 |
++ the /proc interface. |
359 |
++ |
360 |
++ The UAC policy defines the action Linux should take when an |
361 |
++ unaligned memory access occurs. The action can include printing a |
362 |
++ warning message (NOPRINT), sending a signal to the offending |
363 |
++ program to help developers debug their applications (SIGBUS), or |
364 |
++ disabling the transparent fixing (NOFIX). |
365 |
++ |
366 |
++ The sysctls will be initialized to the compile-time defined UAC |
367 |
++ policy. You can change these manually, or with the sysctl(8) |
368 |
++ userspace utility. |
369 |
++ |
370 |
++ To disable the warning messages at runtime, you would use |
371 |
++ |
372 |
++ echo 1 > /proc/sys/kernel/uac/noprint |
373 |
++ |
374 |
++ This is pretty harmless. Say Y if you're not sure. |
375 |
++ |
376 |
++ |
377 |
+ source "drivers/pci/Kconfig" |
378 |
+ source "drivers/eisa/Kconfig" |
379 |
+ |
380 |
+diff --git a/arch/alpha/kernel/traps.c b/arch/alpha/kernel/traps.c |
381 |
+index 74aceea..cb35d80 100644 |
382 |
+--- a/arch/alpha/kernel/traps.c |
383 |
++++ b/arch/alpha/kernel/traps.c |
384 |
+@@ -103,6 +103,49 @@ static char * ireg_name[] = {"v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6", |
385 |
+ "t10", "t11", "ra", "pv", "at", "gp", "sp", "zero"}; |
386 |
+ #endif |
387 |
+ |
388 |
++#ifdef CONFIG_ALPHA_UAC_SYSCTL |
389 |
++ |
390 |
++#include <linux/sysctl.h> |
391 |
++ |
392 |
++static int enabled_noprint = 0; |
393 |
++static int enabled_sigbus = 0; |
394 |
++static int enabled_nofix = 0; |
395 |
++ |
396 |
++struct ctl_table uac_table[] = { |
397 |
++ { |
398 |
++ .procname = "noprint", |
399 |
++ .data = &enabled_noprint, |
400 |
++ .maxlen = sizeof (int), |
401 |
++ .mode = 0644, |
402 |
++ .proc_handler = &proc_dointvec, |
403 |
++ }, |
404 |
++ { |
405 |
++ .procname = "sigbus", |
406 |
++ .data = &enabled_sigbus, |
407 |
++ .maxlen = sizeof (int), |
408 |
++ .mode = 0644, |
409 |
++ .proc_handler = &proc_dointvec, |
410 |
++ }, |
411 |
++ { |
412 |
++ .procname = "nofix", |
413 |
++ .data = &enabled_nofix, |
414 |
++ .maxlen = sizeof (int), |
415 |
++ .mode = 0644, |
416 |
++ .proc_handler = &proc_dointvec, |
417 |
++ }, |
418 |
++ { } |
419 |
++}; |
420 |
++ |
421 |
++static int __init init_uac_sysctl(void) |
422 |
++{ |
423 |
++ /* Initialize sysctls with the #defined UAC policy */ |
424 |
++ enabled_noprint = (test_thread_flag (TS_UAC_NOPRINT)) ? 1 : 0; |
425 |
++ enabled_sigbus = (test_thread_flag (TS_UAC_SIGBUS)) ? 1 : 0; |
426 |
++ enabled_nofix = (test_thread_flag (TS_UAC_NOFIX)) ? 1 : 0; |
427 |
++ return 0; |
428 |
++} |
429 |
++#endif |
430 |
++ |
431 |
+ static void |
432 |
+ dik_show_code(unsigned int *pc) |
433 |
+ { |
434 |
+@@ -785,7 +828,12 @@ do_entUnaUser(void __user * va, unsigned long opcode, |
435 |
+ /* Check the UAC bits to decide what the user wants us to do |
436 |
+ with the unaliged access. */ |
437 |
+ |
438 |
++#ifndef CONFIG_ALPHA_UAC_SYSCTL |
439 |
+ if (!(current_thread_info()->status & TS_UAC_NOPRINT)) { |
440 |
++#else /* CONFIG_ALPHA_UAC_SYSCTL */ |
441 |
++ if (!(current_thread_info()->status & TS_UAC_NOPRINT) && |
442 |
++ !(enabled_noprint)) { |
443 |
++#endif /* CONFIG_ALPHA_UAC_SYSCTL */ |
444 |
+ if (__ratelimit(&ratelimit)) { |
445 |
+ printk("%s(%d): unaligned trap at %016lx: %p %lx %ld\n", |
446 |
+ current->comm, task_pid_nr(current), |
447 |
+@@ -1090,3 +1138,6 @@ trap_init(void) |
448 |
+ wrent(entSys, 5); |
449 |
+ wrent(entDbg, 6); |
450 |
+ } |
451 |
++#ifdef CONFIG_ALPHA_UAC_SYSCTL |
452 |
++ __initcall(init_uac_sysctl); |
453 |
++#endif |
454 |
+diff --git a/kernel/sysctl.c b/kernel/sysctl.c |
455 |
+index 87b2fc3..55021a8 100644 |
456 |
+--- a/kernel/sysctl.c |
457 |
++++ b/kernel/sysctl.c |
458 |
+@@ -152,6 +152,11 @@ static unsigned long hung_task_timeout_max = (LONG_MAX/HZ); |
459 |
+ #ifdef CONFIG_INOTIFY_USER |
460 |
+ #include <linux/inotify.h> |
461 |
+ #endif |
462 |
++ |
463 |
++#ifdef CONFIG_ALPHA_UAC_SYSCTL |
464 |
++extern struct ctl_table uac_table[]; |
465 |
++#endif |
466 |
++ |
467 |
+ #ifdef CONFIG_SPARC |
468 |
+ #endif |
469 |
+ |
470 |
+@@ -1844,6 +1849,13 @@ static struct ctl_table debug_table[] = { |
471 |
+ .extra2 = &one, |
472 |
+ }, |
473 |
+ #endif |
474 |
++#ifdef CONFIG_ALPHA_UAC_SYSCTL |
475 |
++ { |
476 |
++ .procname = "uac", |
477 |
++ .mode = 0555, |
478 |
++ .child = uac_table, |
479 |
++ }, |
480 |
++#endif /* CONFIG_ALPHA_UAC_SYSCTL */ |
481 |
+ { } |
482 |
+ }; |
483 |
+ |
484 |
|
485 |
diff --git a/5010_enable-additional-cpu-optimizations-for-gcc.patch b/5010_enable-additional-cpu-optimizations-for-gcc.patch |
486 |
new file mode 100644 |
487 |
index 0000000..a8aa759 |
488 |
--- /dev/null |
489 |
+++ b/5010_enable-additional-cpu-optimizations-for-gcc.patch |
490 |
@@ -0,0 +1,545 @@ |
491 |
+WARNING |
492 |
+This patch works with gcc versions 4.9+ and with kernel version 4.13+ and should |
493 |
+NOT be applied when compiling on older versions of gcc due to key name changes |
494 |
+of the march flags introduced with the version 4.9 release of gcc.[1] |
495 |
+ |
496 |
+Use the older version of this patch hosted on the same github for older |
497 |
+versions of gcc. |
498 |
+ |
499 |
+FEATURES |
500 |
+This patch adds additional CPU options to the Linux kernel accessible under: |
501 |
+ Processor type and features ---> |
502 |
+ Processor family ---> |
503 |
+ |
504 |
+The expanded microarchitectures include: |
505 |
+* AMD Improved K8-family |
506 |
+* AMD K10-family |
507 |
+* AMD Family 10h (Barcelona) |
508 |
+* AMD Family 14h (Bobcat) |
509 |
+* AMD Family 16h (Jaguar) |
510 |
+* AMD Family 15h (Bulldozer) |
511 |
+* AMD Family 15h (Piledriver) |
512 |
+* AMD Family 15h (Steamroller) |
513 |
+* AMD Family 15h (Excavator) |
514 |
+* AMD Family 17h (Zen) |
515 |
+* Intel Silvermont low-power processors |
516 |
+* Intel 1st Gen Core i3/i5/i7 (Nehalem) |
517 |
+* Intel 1.5 Gen Core i3/i5/i7 (Westmere) |
518 |
+* Intel 2nd Gen Core i3/i5/i7 (Sandybridge) |
519 |
+* Intel 3rd Gen Core i3/i5/i7 (Ivybridge) |
520 |
+* Intel 4th Gen Core i3/i5/i7 (Haswell) |
521 |
+* Intel 5th Gen Core i3/i5/i7 (Broadwell) |
522 |
+* Intel 6th Gen Core i3/i5/i7 (Skylake) |
523 |
+* Intel 6th Gen Core i7/i9 (Skylake X) |
524 |
+ |
525 |
+It also offers to compile passing the 'native' option which, "selects the CPU |
526 |
+to generate code for at compilation time by determining the processor type of |
527 |
+the compiling machine. Using -march=native enables all instruction subsets |
528 |
+supported by the local machine and will produce code optimized for the local |
529 |
+machine under the constraints of the selected instruction set."[3] |
530 |
+ |
531 |
+MINOR NOTES |
532 |
+This patch also changes 'atom' to 'bonnell' in accordance with the gcc v4.9 |
533 |
+changes. Note that upstream is using the deprecated 'match=atom' flags when I |
534 |
+believe it should use the newer 'march=bonnell' flag for atom processors.[2] |
535 |
+ |
536 |
+It is not recommended to compile on Atom-CPUs with the 'native' option.[4] The |
537 |
+recommendation is to use the 'atom' option instead. |
538 |
+ |
539 |
+BENEFITS |
540 |
+Small but real speed increases are measurable using a make endpoint comparing |
541 |
+a generic kernel to one built with one of the respective microarchs. |
542 |
+ |
543 |
+See the following experimental evidence supporting this statement: |
544 |
+https://github.com/graysky2/kernel_gcc_patch |
545 |
+ |
546 |
+REQUIREMENTS |
547 |
+linux version >=4.13 |
548 |
+gcc version >=4.9 |
549 |
+ |
550 |
+ACKNOWLEDGMENTS |
551 |
+This patch builds on the seminal work by Jeroen.[5] |
552 |
+ |
553 |
+REFERENCES |
554 |
+1. https://gcc.gnu.org/gcc-4.9/changes.html |
555 |
+2. https://bugzilla.kernel.org/show_bug.cgi?id=77461 |
556 |
+3. https://gcc.gnu.org/onlinedocs/gcc/x86-Options.html |
557 |
+4. https://github.com/graysky2/kernel_gcc_patch/issues/15 |
558 |
+5. http://www.linuxforge.net/docs/linux/linux-gcc.php |
559 |
+ |
560 |
+--- a/arch/x86/include/asm/module.h 2018-01-28 16:20:33.000000000 -0500 |
561 |
++++ b/arch/x86/include/asm/module.h 2018-03-10 06:42:38.688317317 -0500 |
562 |
+@@ -25,6 +25,26 @@ struct mod_arch_specific { |
563 |
+ #define MODULE_PROC_FAMILY "586MMX " |
564 |
+ #elif defined CONFIG_MCORE2 |
565 |
+ #define MODULE_PROC_FAMILY "CORE2 " |
566 |
++#elif defined CONFIG_MNATIVE |
567 |
++#define MODULE_PROC_FAMILY "NATIVE " |
568 |
++#elif defined CONFIG_MNEHALEM |
569 |
++#define MODULE_PROC_FAMILY "NEHALEM " |
570 |
++#elif defined CONFIG_MWESTMERE |
571 |
++#define MODULE_PROC_FAMILY "WESTMERE " |
572 |
++#elif defined CONFIG_MSILVERMONT |
573 |
++#define MODULE_PROC_FAMILY "SILVERMONT " |
574 |
++#elif defined CONFIG_MSANDYBRIDGE |
575 |
++#define MODULE_PROC_FAMILY "SANDYBRIDGE " |
576 |
++#elif defined CONFIG_MIVYBRIDGE |
577 |
++#define MODULE_PROC_FAMILY "IVYBRIDGE " |
578 |
++#elif defined CONFIG_MHASWELL |
579 |
++#define MODULE_PROC_FAMILY "HASWELL " |
580 |
++#elif defined CONFIG_MBROADWELL |
581 |
++#define MODULE_PROC_FAMILY "BROADWELL " |
582 |
++#elif defined CONFIG_MSKYLAKE |
583 |
++#define MODULE_PROC_FAMILY "SKYLAKE " |
584 |
++#elif defined CONFIG_MSKYLAKEX |
585 |
++#define MODULE_PROC_FAMILY "SKYLAKEX " |
586 |
+ #elif defined CONFIG_MATOM |
587 |
+ #define MODULE_PROC_FAMILY "ATOM " |
588 |
+ #elif defined CONFIG_M686 |
589 |
+@@ -43,6 +63,26 @@ struct mod_arch_specific { |
590 |
+ #define MODULE_PROC_FAMILY "K7 " |
591 |
+ #elif defined CONFIG_MK8 |
592 |
+ #define MODULE_PROC_FAMILY "K8 " |
593 |
++#elif defined CONFIG_MK8SSE3 |
594 |
++#define MODULE_PROC_FAMILY "K8SSE3 " |
595 |
++#elif defined CONFIG_MK10 |
596 |
++#define MODULE_PROC_FAMILY "K10 " |
597 |
++#elif defined CONFIG_MBARCELONA |
598 |
++#define MODULE_PROC_FAMILY "BARCELONA " |
599 |
++#elif defined CONFIG_MBOBCAT |
600 |
++#define MODULE_PROC_FAMILY "BOBCAT " |
601 |
++#elif defined CONFIG_MBULLDOZER |
602 |
++#define MODULE_PROC_FAMILY "BULLDOZER " |
603 |
++#elif defined CONFIG_MPILEDRIVER |
604 |
++#define MODULE_PROC_FAMILY "PILEDRIVER " |
605 |
++#elif defined CONFIG_MSTEAMROLLER |
606 |
++#define MODULE_PROC_FAMILY "STEAMROLLER " |
607 |
++#elif defined CONFIG_MJAGUAR |
608 |
++#define MODULE_PROC_FAMILY "JAGUAR " |
609 |
++#elif defined CONFIG_MEXCAVATOR |
610 |
++#define MODULE_PROC_FAMILY "EXCAVATOR " |
611 |
++#elif defined CONFIG_MZEN |
612 |
++#define MODULE_PROC_FAMILY "ZEN " |
613 |
+ #elif defined CONFIG_MELAN |
614 |
+ #define MODULE_PROC_FAMILY "ELAN " |
615 |
+ #elif defined CONFIG_MCRUSOE |
616 |
+--- a/arch/x86/Kconfig.cpu 2018-01-28 16:20:33.000000000 -0500 |
617 |
++++ b/arch/x86/Kconfig.cpu 2018-03-10 06:45:50.244371799 -0500 |
618 |
+@@ -116,6 +116,7 @@ config MPENTIUMM |
619 |
+ config MPENTIUM4 |
620 |
+ bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon" |
621 |
+ depends on X86_32 |
622 |
++ select X86_P6_NOP |
623 |
+ ---help--- |
624 |
+ Select this for Intel Pentium 4 chips. This includes the |
625 |
+ Pentium 4, Pentium D, P4-based Celeron and Xeon, and |
626 |
+@@ -148,9 +149,8 @@ config MPENTIUM4 |
627 |
+ -Paxville |
628 |
+ -Dempsey |
629 |
+ |
630 |
+- |
631 |
+ config MK6 |
632 |
+- bool "K6/K6-II/K6-III" |
633 |
++ bool "AMD K6/K6-II/K6-III" |
634 |
+ depends on X86_32 |
635 |
+ ---help--- |
636 |
+ Select this for an AMD K6-family processor. Enables use of |
637 |
+@@ -158,7 +158,7 @@ config MK6 |
638 |
+ flags to GCC. |
639 |
+ |
640 |
+ config MK7 |
641 |
+- bool "Athlon/Duron/K7" |
642 |
++ bool "AMD Athlon/Duron/K7" |
643 |
+ depends on X86_32 |
644 |
+ ---help--- |
645 |
+ Select this for an AMD Athlon K7-family processor. Enables use of |
646 |
+@@ -166,12 +166,83 @@ config MK7 |
647 |
+ flags to GCC. |
648 |
+ |
649 |
+ config MK8 |
650 |
+- bool "Opteron/Athlon64/Hammer/K8" |
651 |
++ bool "AMD Opteron/Athlon64/Hammer/K8" |
652 |
+ ---help--- |
653 |
+ Select this for an AMD Opteron or Athlon64 Hammer-family processor. |
654 |
+ Enables use of some extended instructions, and passes appropriate |
655 |
+ optimization flags to GCC. |
656 |
+ |
657 |
++config MK8SSE3 |
658 |
++ bool "AMD Opteron/Athlon64/Hammer/K8 with SSE3" |
659 |
++ ---help--- |
660 |
++ Select this for improved AMD Opteron or Athlon64 Hammer-family processors. |
661 |
++ Enables use of some extended instructions, and passes appropriate |
662 |
++ optimization flags to GCC. |
663 |
++ |
664 |
++config MK10 |
665 |
++ bool "AMD 61xx/7x50/PhenomX3/X4/II/K10" |
666 |
++ ---help--- |
667 |
++ Select this for an AMD 61xx Eight-Core Magny-Cours, Athlon X2 7x50, |
668 |
++ Phenom X3/X4/II, Athlon II X2/X3/X4, or Turion II-family processor. |
669 |
++ Enables use of some extended instructions, and passes appropriate |
670 |
++ optimization flags to GCC. |
671 |
++ |
672 |
++config MBARCELONA |
673 |
++ bool "AMD Barcelona" |
674 |
++ ---help--- |
675 |
++ Select this for AMD Family 10h Barcelona processors. |
676 |
++ |
677 |
++ Enables -march=barcelona |
678 |
++ |
679 |
++config MBOBCAT |
680 |
++ bool "AMD Bobcat" |
681 |
++ ---help--- |
682 |
++ Select this for AMD Family 14h Bobcat processors. |
683 |
++ |
684 |
++ Enables -march=btver1 |
685 |
++ |
686 |
++config MJAGUAR |
687 |
++ bool "AMD Jaguar" |
688 |
++ ---help--- |
689 |
++ Select this for AMD Family 16h Jaguar processors. |
690 |
++ |
691 |
++ Enables -march=btver2 |
692 |
++ |
693 |
++config MBULLDOZER |
694 |
++ bool "AMD Bulldozer" |
695 |
++ ---help--- |
696 |
++ Select this for AMD Family 15h Bulldozer processors. |
697 |
++ |
698 |
++ Enables -march=bdver1 |
699 |
++ |
700 |
++config MPILEDRIVER |
701 |
++ bool "AMD Piledriver" |
702 |
++ ---help--- |
703 |
++ Select this for AMD Family 15h Piledriver processors. |
704 |
++ |
705 |
++ Enables -march=bdver2 |
706 |
++ |
707 |
++config MSTEAMROLLER |
708 |
++ bool "AMD Steamroller" |
709 |
++ ---help--- |
710 |
++ Select this for AMD Family 15h Steamroller processors. |
711 |
++ |
712 |
++ Enables -march=bdver3 |
713 |
++ |
714 |
++config MEXCAVATOR |
715 |
++ bool "AMD Excavator" |
716 |
++ ---help--- |
717 |
++ Select this for AMD Family 15h Excavator processors. |
718 |
++ |
719 |
++ Enables -march=bdver4 |
720 |
++ |
721 |
++config MZEN |
722 |
++ bool "AMD Zen" |
723 |
++ ---help--- |
724 |
++ Select this for AMD Family 17h Zen processors. |
725 |
++ |
726 |
++ Enables -march=znver1 |
727 |
++ |
728 |
+ config MCRUSOE |
729 |
+ bool "Crusoe" |
730 |
+ depends on X86_32 |
731 |
+@@ -253,6 +324,7 @@ config MVIAC7 |
732 |
+ |
733 |
+ config MPSC |
734 |
+ bool "Intel P4 / older Netburst based Xeon" |
735 |
++ select X86_P6_NOP |
736 |
+ depends on X86_64 |
737 |
+ ---help--- |
738 |
+ Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey |
739 |
+@@ -262,8 +334,19 @@ config MPSC |
740 |
+ using the cpu family field |
741 |
+ in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one. |
742 |
+ |
743 |
++config MATOM |
744 |
++ bool "Intel Atom" |
745 |
++ select X86_P6_NOP |
746 |
++ ---help--- |
747 |
++ |
748 |
++ Select this for the Intel Atom platform. Intel Atom CPUs have an |
749 |
++ in-order pipelining architecture and thus can benefit from |
750 |
++ accordingly optimized code. Use a recent GCC with specific Atom |
751 |
++ support in order to fully benefit from selecting this option. |
752 |
++ |
753 |
+ config MCORE2 |
754 |
+- bool "Core 2/newer Xeon" |
755 |
++ bool "Intel Core 2" |
756 |
++ select X86_P6_NOP |
757 |
+ ---help--- |
758 |
+ |
759 |
+ Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and |
760 |
+@@ -271,14 +354,88 @@ config MCORE2 |
761 |
+ family in /proc/cpuinfo. Newer ones have 6 and older ones 15 |
762 |
+ (not a typo) |
763 |
+ |
764 |
+-config MATOM |
765 |
+- bool "Intel Atom" |
766 |
++ Enables -march=core2 |
767 |
++ |
768 |
++config MNEHALEM |
769 |
++ bool "Intel Nehalem" |
770 |
++ select X86_P6_NOP |
771 |
+ ---help--- |
772 |
+ |
773 |
+- Select this for the Intel Atom platform. Intel Atom CPUs have an |
774 |
+- in-order pipelining architecture and thus can benefit from |
775 |
+- accordingly optimized code. Use a recent GCC with specific Atom |
776 |
+- support in order to fully benefit from selecting this option. |
777 |
++ Select this for 1st Gen Core processors in the Nehalem family. |
778 |
++ |
779 |
++ Enables -march=nehalem |
780 |
++ |
781 |
++config MWESTMERE |
782 |
++ bool "Intel Westmere" |
783 |
++ select X86_P6_NOP |
784 |
++ ---help--- |
785 |
++ |
786 |
++ Select this for the Intel Westmere formerly Nehalem-C family. |
787 |
++ |
788 |
++ Enables -march=westmere |
789 |
++ |
790 |
++config MSILVERMONT |
791 |
++ bool "Intel Silvermont" |
792 |
++ select X86_P6_NOP |
793 |
++ ---help--- |
794 |
++ |
795 |
++ Select this for the Intel Silvermont platform. |
796 |
++ |
797 |
++ Enables -march=silvermont |
798 |
++ |
799 |
++config MSANDYBRIDGE |
800 |
++ bool "Intel Sandy Bridge" |
801 |
++ select X86_P6_NOP |
802 |
++ ---help--- |
803 |
++ |
804 |
++ Select this for 2nd Gen Core processors in the Sandy Bridge family. |
805 |
++ |
806 |
++ Enables -march=sandybridge |
807 |
++ |
808 |
++config MIVYBRIDGE |
809 |
++ bool "Intel Ivy Bridge" |
810 |
++ select X86_P6_NOP |
811 |
++ ---help--- |
812 |
++ |
813 |
++ Select this for 3rd Gen Core processors in the Ivy Bridge family. |
814 |
++ |
815 |
++ Enables -march=ivybridge |
816 |
++ |
817 |
++config MHASWELL |
818 |
++ bool "Intel Haswell" |
819 |
++ select X86_P6_NOP |
820 |
++ ---help--- |
821 |
++ |
822 |
++ Select this for 4th Gen Core processors in the Haswell family. |
823 |
++ |
824 |
++ Enables -march=haswell |
825 |
++ |
826 |
++config MBROADWELL |
827 |
++ bool "Intel Broadwell" |
828 |
++ select X86_P6_NOP |
829 |
++ ---help--- |
830 |
++ |
831 |
++ Select this for 5th Gen Core processors in the Broadwell family. |
832 |
++ |
833 |
++ Enables -march=broadwell |
834 |
++ |
835 |
++config MSKYLAKE |
836 |
++ bool "Intel Skylake" |
837 |
++ select X86_P6_NOP |
838 |
++ ---help--- |
839 |
++ |
840 |
++ Select this for 6th Gen Core processors in the Skylake family. |
841 |
++ |
842 |
++ Enables -march=skylake |
843 |
++ |
844 |
++config MSKYLAKEX |
845 |
++ bool "Intel Skylake X" |
846 |
++ select X86_P6_NOP |
847 |
++ ---help--- |
848 |
++ |
849 |
++ Select this for 6th Gen Core processors in the Skylake X family. |
850 |
++ |
851 |
++ Enables -march=skylake-avx512 |
852 |
+ |
853 |
+ config GENERIC_CPU |
854 |
+ bool "Generic-x86-64" |
855 |
+@@ -287,6 +444,19 @@ config GENERIC_CPU |
856 |
+ Generic x86-64 CPU. |
857 |
+ Run equally well on all x86-64 CPUs. |
858 |
+ |
859 |
++config MNATIVE |
860 |
++ bool "Native optimizations autodetected by GCC" |
861 |
++ ---help--- |
862 |
++ |
863 |
++ GCC 4.2 and above support -march=native, which automatically detects |
864 |
++ the optimum settings to use based on your processor. -march=native |
865 |
++ also detects and applies additional settings beyond -march specific |
866 |
++ to your CPU, (eg. -msse4). Unless you have a specific reason not to |
867 |
++ (e.g. distcc cross-compiling), you should probably be using |
868 |
++ -march=native rather than anything listed below. |
869 |
++ |
870 |
++ Enables -march=native |
871 |
++ |
872 |
+ endchoice |
873 |
+ |
874 |
+ config X86_GENERIC |
875 |
+@@ -311,7 +481,7 @@ config X86_INTERNODE_CACHE_SHIFT |
876 |
+ config X86_L1_CACHE_SHIFT |
877 |
+ int |
878 |
+ default "7" if MPENTIUM4 || MPSC |
879 |
+- default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU |
880 |
++ default "6" if MK7 || MK8 || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MJAGUAR || MPENTIUMM || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MNATIVE || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU |
881 |
+ default "4" if MELAN || M486 || MGEODEGX1 |
882 |
+ default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX |
883 |
+ |
884 |
+@@ -342,35 +512,36 @@ config X86_ALIGNMENT_16 |
885 |
+ |
886 |
+ config X86_INTEL_USERCOPY |
887 |
+ def_bool y |
888 |
+- depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2 |
889 |
++ depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK8SSE3 || MK7 || MEFFICEON || MCORE2 || MK10 || MBARCELONA || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MNATIVE |
890 |
+ |
891 |
+ config X86_USE_PPRO_CHECKSUM |
892 |
+ def_bool y |
893 |
+- depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM |
894 |
++ depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MK10 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MK8SSE3 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MATOM || MNATIVE |
895 |
+ |
896 |
+ config X86_USE_3DNOW |
897 |
+ def_bool y |
898 |
+ depends on (MCYRIXIII || MK7 || MGEODE_LX) && !UML |
899 |
+ |
900 |
+-# |
901 |
+-# P6_NOPs are a relatively minor optimization that require a family >= |
902 |
+-# 6 processor, except that it is broken on certain VIA chips. |
903 |
+-# Furthermore, AMD chips prefer a totally different sequence of NOPs |
904 |
+-# (which work on all CPUs). In addition, it looks like Virtual PC |
905 |
+-# does not understand them. |
906 |
+-# |
907 |
+-# As a result, disallow these if we're not compiling for X86_64 (these |
908 |
+-# NOPs do work on all x86-64 capable chips); the list of processors in |
909 |
+-# the right-hand clause are the cores that benefit from this optimization. |
910 |
+-# |
911 |
+ config X86_P6_NOP |
912 |
+- def_bool y |
913 |
+- depends on X86_64 |
914 |
+- depends on (MCORE2 || MPENTIUM4 || MPSC) |
915 |
++ default n |
916 |
++ bool "Support for P6_NOPs on Intel chips" |
917 |
++ depends on (MCORE2 || MPENTIUM4 || MPSC || MATOM || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MNATIVE) |
918 |
++ ---help--- |
919 |
++ P6_NOPs are a relatively minor optimization that require a family >= |
920 |
++ 6 processor, except that it is broken on certain VIA chips. |
921 |
++ Furthermore, AMD chips prefer a totally different sequence of NOPs |
922 |
++ (which work on all CPUs). In addition, it looks like Virtual PC |
923 |
++ does not understand them. |
924 |
++ |
925 |
++ As a result, disallow these if we're not compiling for X86_64 (these |
926 |
++ NOPs do work on all x86-64 capable chips); the list of processors in |
927 |
++ the right-hand clause are the cores that benefit from this optimization. |
928 |
++ |
929 |
++ Say Y if you have Intel CPU newer than Pentium Pro, N otherwise. |
930 |
+ |
931 |
+ config X86_TSC |
932 |
+ def_bool y |
933 |
+- depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MATOM) || X86_64 |
934 |
++ depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MK8SSE3 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MNATIVE || MATOM) || X86_64 |
935 |
+ |
936 |
+ config X86_CMPXCHG64 |
937 |
+ def_bool y |
938 |
+@@ -380,7 +551,7 @@ config X86_CMPXCHG64 |
939 |
+ # generates cmov. |
940 |
+ config X86_CMOV |
941 |
+ def_bool y |
942 |
+- depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM || MGEODE_LX) |
943 |
++ depends on (MK8 || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MJAGUAR || MK7 || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MNATIVE || MATOM || MGEODE_LX) |
944 |
+ |
945 |
+ config X86_MINIMUM_CPU_FAMILY |
946 |
+ int |
947 |
+--- a/arch/x86/Makefile 2018-01-28 16:20:33.000000000 -0500 |
948 |
++++ b/arch/x86/Makefile 2018-03-10 06:47:00.284240139 -0500 |
949 |
+@@ -124,13 +124,42 @@ else |
950 |
+ KBUILD_CFLAGS += $(call cc-option,-mskip-rax-setup) |
951 |
+ |
952 |
+ # FIXME - should be integrated in Makefile.cpu (Makefile_32.cpu) |
953 |
++ cflags-$(CONFIG_MNATIVE) += $(call cc-option,-march=native) |
954 |
+ cflags-$(CONFIG_MK8) += $(call cc-option,-march=k8) |
955 |
++ cflags-$(CONFIG_MK8SSE3) += $(call cc-option,-march=k8-sse3,-mtune=k8) |
956 |
++ cflags-$(CONFIG_MK10) += $(call cc-option,-march=amdfam10) |
957 |
++ cflags-$(CONFIG_MBARCELONA) += $(call cc-option,-march=barcelona) |
958 |
++ cflags-$(CONFIG_MBOBCAT) += $(call cc-option,-march=btver1) |
959 |
++ cflags-$(CONFIG_MJAGUAR) += $(call cc-option,-march=btver2) |
960 |
++ cflags-$(CONFIG_MBULLDOZER) += $(call cc-option,-march=bdver1) |
961 |
++ cflags-$(CONFIG_MPILEDRIVER) += $(call cc-option,-march=bdver2) |
962 |
++ cflags-$(CONFIG_MSTEAMROLLER) += $(call cc-option,-march=bdver3) |
963 |
++ cflags-$(CONFIG_MEXCAVATOR) += $(call cc-option,-march=bdver4) |
964 |
++ cflags-$(CONFIG_MZEN) += $(call cc-option,-march=znver1) |
965 |
+ cflags-$(CONFIG_MPSC) += $(call cc-option,-march=nocona) |
966 |
+ |
967 |
+ cflags-$(CONFIG_MCORE2) += \ |
968 |
+- $(call cc-option,-march=core2,$(call cc-option,-mtune=generic)) |
969 |
+- cflags-$(CONFIG_MATOM) += $(call cc-option,-march=atom) \ |
970 |
+- $(call cc-option,-mtune=atom,$(call cc-option,-mtune=generic)) |
971 |
++ $(call cc-option,-march=core2,$(call cc-option,-mtune=core2)) |
972 |
++ cflags-$(CONFIG_MNEHALEM) += \ |
973 |
++ $(call cc-option,-march=nehalem,$(call cc-option,-mtune=nehalem)) |
974 |
++ cflags-$(CONFIG_MWESTMERE) += \ |
975 |
++ $(call cc-option,-march=westmere,$(call cc-option,-mtune=westmere)) |
976 |
++ cflags-$(CONFIG_MSILVERMONT) += \ |
977 |
++ $(call cc-option,-march=silvermont,$(call cc-option,-mtune=silvermont)) |
978 |
++ cflags-$(CONFIG_MSANDYBRIDGE) += \ |
979 |
++ $(call cc-option,-march=sandybridge,$(call cc-option,-mtune=sandybridge)) |
980 |
++ cflags-$(CONFIG_MIVYBRIDGE) += \ |
981 |
++ $(call cc-option,-march=ivybridge,$(call cc-option,-mtune=ivybridge)) |
982 |
++ cflags-$(CONFIG_MHASWELL) += \ |
983 |
++ $(call cc-option,-march=haswell,$(call cc-option,-mtune=haswell)) |
984 |
++ cflags-$(CONFIG_MBROADWELL) += \ |
985 |
++ $(call cc-option,-march=broadwell,$(call cc-option,-mtune=broadwell)) |
986 |
++ cflags-$(CONFIG_MSKYLAKE) += \ |
987 |
++ $(call cc-option,-march=skylake,$(call cc-option,-mtune=skylake)) |
988 |
++ cflags-$(CONFIG_MSKYLAKEX) += \ |
989 |
++ $(call cc-option,-march=skylake-avx512,$(call cc-option,-mtune=skylake-avx512)) |
990 |
++ cflags-$(CONFIG_MATOM) += $(call cc-option,-march=bonnell) \ |
991 |
++ $(call cc-option,-mtune=bonnell,$(call cc-option,-mtune=generic)) |
992 |
+ cflags-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=generic) |
993 |
+ KBUILD_CFLAGS += $(cflags-y) |
994 |
+ |
995 |
+--- a/arch/x86/Makefile_32.cpu 2018-01-28 16:20:33.000000000 -0500 |
996 |
++++ b/arch/x86/Makefile_32.cpu 2018-03-10 06:47:46.025992644 -0500 |
997 |
+@@ -23,7 +23,18 @@ cflags-$(CONFIG_MK6) += -march=k6 |
998 |
+ # Please note, that patches that add -march=athlon-xp and friends are pointless. |
999 |
+ # They make zero difference whatsosever to performance at this time. |
1000 |
+ cflags-$(CONFIG_MK7) += -march=athlon |
1001 |
++cflags-$(CONFIG_MNATIVE) += $(call cc-option,-march=native) |
1002 |
+ cflags-$(CONFIG_MK8) += $(call cc-option,-march=k8,-march=athlon) |
1003 |
++cflags-$(CONFIG_MK8SSE3) += $(call cc-option,-march=k8-sse3,-march=athlon) |
1004 |
++cflags-$(CONFIG_MK10) += $(call cc-option,-march=amdfam10,-march=athlon) |
1005 |
++cflags-$(CONFIG_MBARCELONA) += $(call cc-option,-march=barcelona,-march=athlon) |
1006 |
++cflags-$(CONFIG_MBOBCAT) += $(call cc-option,-march=btver1,-march=athlon) |
1007 |
++cflags-$(CONFIG_MJAGUAR) += $(call cc-option,-march=btver2,-march=athlon) |
1008 |
++cflags-$(CONFIG_MBULLDOZER) += $(call cc-option,-march=bdver1,-march=athlon) |
1009 |
++cflags-$(CONFIG_MPILEDRIVER) += $(call cc-option,-march=bdver2,-march=athlon) |
1010 |
++cflags-$(CONFIG_MSTEAMROLLER) += $(call cc-option,-march=bdver3,-march=athlon) |
1011 |
++cflags-$(CONFIG_MEXCAVATOR) += $(call cc-option,-march=bdver4,-march=athlon) |
1012 |
++cflags-$(CONFIG_MZEN) += $(call cc-option,-march=znver1,-march=athlon) |
1013 |
+ cflags-$(CONFIG_MCRUSOE) += -march=i686 -falign-functions=0 -falign-jumps=0 -falign-loops=0 |
1014 |
+ cflags-$(CONFIG_MEFFICEON) += -march=i686 $(call tune,pentium3) -falign-functions=0 -falign-jumps=0 -falign-loops=0 |
1015 |
+ cflags-$(CONFIG_MWINCHIPC6) += $(call cc-option,-march=winchip-c6,-march=i586) |
1016 |
+@@ -32,8 +43,17 @@ cflags-$(CONFIG_MCYRIXIII) += $(call cc- |
1017 |
+ cflags-$(CONFIG_MVIAC3_2) += $(call cc-option,-march=c3-2,-march=i686) |
1018 |
+ cflags-$(CONFIG_MVIAC7) += -march=i686 |
1019 |
+ cflags-$(CONFIG_MCORE2) += -march=i686 $(call tune,core2) |
1020 |
+-cflags-$(CONFIG_MATOM) += $(call cc-option,-march=atom,$(call cc-option,-march=core2,-march=i686)) \ |
1021 |
+- $(call cc-option,-mtune=atom,$(call cc-option,-mtune=generic)) |
1022 |
++cflags-$(CONFIG_MNEHALEM) += -march=i686 $(call tune,nehalem) |
1023 |
++cflags-$(CONFIG_MWESTMERE) += -march=i686 $(call tune,westmere) |
1024 |
++cflags-$(CONFIG_MSILVERMONT) += -march=i686 $(call tune,silvermont) |
1025 |
++cflags-$(CONFIG_MSANDYBRIDGE) += -march=i686 $(call tune,sandybridge) |
1026 |
++cflags-$(CONFIG_MIVYBRIDGE) += -march=i686 $(call tune,ivybridge) |
1027 |
++cflags-$(CONFIG_MHASWELL) += -march=i686 $(call tune,haswell) |
1028 |
++cflags-$(CONFIG_MBROADWELL) += -march=i686 $(call tune,broadwell) |
1029 |
++cflags-$(CONFIG_MSKYLAKE) += -march=i686 $(call tune,skylake) |
1030 |
++cflags-$(CONFIG_MSKYLAKEX) += -march=i686 $(call tune,skylake-avx512) |
1031 |
++cflags-$(CONFIG_MATOM) += $(call cc-option,-march=bonnell,$(call cc-option,-march=core2,-march=i686)) \ |
1032 |
++ $(call cc-option,-mtune=bonnell,$(call cc-option,-mtune=generic)) |
1033 |
+ |
1034 |
+ # AMD Elan support |
1035 |
+ cflags-$(CONFIG_MELAN) += -march=i486 |