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commit: 5c3b5e006cbd915252a6dc345940e824f0275af9 |
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Author: Andreas K. Hüttel <dilfridge <AT> gentoo <DOT> org> |
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AuthorDate: Sun Feb 27 15:45:43 2022 +0000 |
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Commit: Andreas K. Hüttel <dilfridge <AT> gentoo <DOT> org> |
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CommitDate: Sun Feb 27 15:45:43 2022 +0000 |
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URL: https://gitweb.gentoo.org/proj/catalyst.git/commit/?id=5c3b5e00 |
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|
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arch: Add riscv64 lp64d musl definition |
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|
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Signed-off-by: Andreas K. Hüttel <dilfridge <AT> gentoo.org> |
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|
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catalyst/arch/riscv.py | 7 +++++++ |
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1 file changed, 7 insertions(+) |
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|
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diff --git a/catalyst/arch/riscv.py b/catalyst/arch/riscv.py |
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index 1fb2c69b..d7b76c37 100644 |
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--- a/catalyst/arch/riscv.py |
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+++ b/catalyst/arch/riscv.py |
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@@ -23,6 +23,12 @@ class arch_rv64_lp64d(generic_riscv): |
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def __init__(self,myspec): |
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generic_riscv.__init__(self,myspec) |
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|
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+class arch_rv64_lp64d_musl(generic_riscv): |
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+ "builder class for rv64_lp64d_musl" |
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+ def __init__(self,myspec): |
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+ generic_riscv.__init__(self,myspec) |
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+ self.settings["CHOST"]="riscv64-gentoo-linux-musl" |
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+ |
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class arch_rv64_lp64(generic_riscv): |
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"builder class for rv64_lp64" |
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def __init__(self,myspec): |
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@@ -47,6 +53,7 @@ def register(): |
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"riscv" : arch_riscv, |
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"rv64_multilib" : arch_rv64_multilib, |
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"rv64_lp64d" : arch_rv64_lp64d, |
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+ "rv64_lp64d_musl" : arch_rv64_lp64d_musl, |
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"rv64_lp64" : arch_rv64_lp64, |
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"rv32_ilp32d" : arch_rv32_ilp32d, |
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"rv32_ilp32" : arch_rv32_ilp32 |
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