Gentoo Archives: gentoo-commits

From: Mike Pagano <mpagano@g.o>
To: gentoo-commits@l.g.o
Subject: [gentoo-commits] proj/linux-patches:4.4 commit in: /
Date: Sun, 13 Jan 2019 19:46:08
Message-Id: 1547408075.f19784aca917c8868a833e8c6de08e327fcbe06e.mpagano@gentoo
1 commit: f19784aca917c8868a833e8c6de08e327fcbe06e
2 Author: Mike Pagano <mpagano <AT> gentoo <DOT> org>
3 AuthorDate: Sun Jan 13 19:34:35 2019 +0000
4 Commit: Mike Pagano <mpagano <AT> gentoo <DOT> org>
5 CommitDate: Sun Jan 13 19:34:35 2019 +0000
6 URL: https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=f19784ac
7
8 proj/linux-patches: Remove gcc opt patch for gcc 4.9
9
10 4.9 gcc is masked in the tree
11
12 Signed-off-by: Mike Pagano <mpagano <AT> gentoo.org>
13
14 0000_README | 4 -
15 ...-additional-cpu-optimizations-for-gcc-4.9.patch | 426 ---------------------
16 2 files changed, 430 deletions(-)
17
18 diff --git a/0000_README b/0000_README
19 index d9bb48e..ff5384e 100644
20 --- a/0000_README
21 +++ b/0000_README
22 @@ -770,7 +770,3 @@ Desc: BFQ v7r11 patch 3 for 4.4: Early Queue Merge (EQM)
23 Patch: 5004_blkck-bfq-turn-BFQ-v7r11-for-4.7.0-into-BFQ-v8r3-for-4.patch1
24 From: http://algo.ing.unimo.it/people/paolo/disk_sched/
25 Desc: BFQ v8r3 patch 4 for 4.7: Early Queue Merge (EQM)
26 -
27 -Patch: 5010_enable-additional-cpu-optimizations-for-gcc-4.9.patch
28 -From: https://github.com/graysky2/kernel_gcc_patch/
29 -Desc: Kernel patch enables gcc >= v4.9 optimizations for additional CPUs.
30
31 diff --git a/5010_enable-additional-cpu-optimizations-for-gcc-4.9.patch b/5010_enable-additional-cpu-optimizations-for-gcc-4.9.patch
32 deleted file mode 100644
33 index d9729b2..0000000
34 --- a/5010_enable-additional-cpu-optimizations-for-gcc-4.9.patch
35 +++ /dev/null
36 @@ -1,426 +0,0 @@
37 -WARNING - this version of the patch works with version 4.9+ of gcc and with
38 -kernel version 3.15.x+ and should NOT be applied when compiling on older
39 -versions due to name changes of the flags with the 4.9 release of gcc.
40 -Use the older version of this patch hosted on the same github for older
41 -versions of gcc. For example:
42 -
43 -corei7 --> nehalem
44 -corei7-avx --> sandybridge
45 -core-avx-i --> ivybridge
46 -core-avx2 --> haswell
47 -
48 -For more, see: https://gcc.gnu.org/gcc-4.9/changes.html
49 -
50 -It also changes 'atom' to 'bonnell' in accordance with the gcc v4.9 changes.
51 -Note that upstream is using the deprecated 'match=atom' flags when I believe it
52 -should use the newer 'march=bonnell' flag for atom processors.
53 -
54 -I have made that change to this patch set as well. See the following kernel
55 -bug report to see if I'm right: https://bugzilla.kernel.org/show_bug.cgi?id=77461
56 -
57 -This patch will expand the number of microarchitectures to include newer
58 -processors including: AMD K10-family, AMD Family 10h (Barcelona), AMD Family
59 -14h (Bobcat), AMD Family 15h (Bulldozer), AMD Family 15h (Piledriver), AMD
60 -Family 15h (Steamroller), Family 16h (Jaguar), Intel 1st Gen Core i3/i5/i7
61 -(Nehalem), Intel 1.5 Gen Core i3/i5/i7 (Westmere), Intel 2nd Gen Core i3/i5/i7
62 -(Sandybridge), Intel 3rd Gen Core i3/i5/i7 (Ivybridge), Intel 4th Gen Core
63 -i3/i5/i7 (Haswell), Intel 5th Gen Core i3/i5/i7 (Broadwell), and the low power
64 -Silvermont series of Atom processors (Silvermont). It also offers the compiler
65 -the 'native' flag.
66 -
67 -Small but real speed increases are measurable using a make endpoint comparing
68 -a generic kernel to one built with one of the respective microarchs.
69 -
70 -See the following experimental evidence supporting this statement:
71 -https://github.com/graysky2/kernel_gcc_patch
72 -
73 -REQUIREMENTS
74 -linux version >=3.15
75 -gcc version >=4.9
76 -
77 ---- a/arch/x86/include/asm/module.h 2015-08-30 14:34:09.000000000 -0400
78 -+++ b/arch/x86/include/asm/module.h 2015-11-06 14:18:24.234941036 -0500
79 -@@ -15,6 +15,24 @@
80 - #define MODULE_PROC_FAMILY "586MMX "
81 - #elif defined CONFIG_MCORE2
82 - #define MODULE_PROC_FAMILY "CORE2 "
83 -+#elif defined CONFIG_MNATIVE
84 -+#define MODULE_PROC_FAMILY "NATIVE "
85 -+#elif defined CONFIG_MNEHALEM
86 -+#define MODULE_PROC_FAMILY "NEHALEM "
87 -+#elif defined CONFIG_MWESTMERE
88 -+#define MODULE_PROC_FAMILY "WESTMERE "
89 -+#elif defined CONFIG_MSILVERMONT
90 -+#define MODULE_PROC_FAMILY "SILVERMONT "
91 -+#elif defined CONFIG_MSANDYBRIDGE
92 -+#define MODULE_PROC_FAMILY "SANDYBRIDGE "
93 -+#elif defined CONFIG_MIVYBRIDGE
94 -+#define MODULE_PROC_FAMILY "IVYBRIDGE "
95 -+#elif defined CONFIG_MHASWELL
96 -+#define MODULE_PROC_FAMILY "HASWELL "
97 -+#elif defined CONFIG_MBROADWELL
98 -+#define MODULE_PROC_FAMILY "BROADWELL "
99 -+#elif defined CONFIG_MSKYLAKE
100 -+#define MODULE_PROC_FAMILY "SKYLAKE "
101 - #elif defined CONFIG_MATOM
102 - #define MODULE_PROC_FAMILY "ATOM "
103 - #elif defined CONFIG_M686
104 -@@ -33,6 +51,22 @@
105 - #define MODULE_PROC_FAMILY "K7 "
106 - #elif defined CONFIG_MK8
107 - #define MODULE_PROC_FAMILY "K8 "
108 -+#elif defined CONFIG_MK8SSE3
109 -+#define MODULE_PROC_FAMILY "K8SSE3 "
110 -+#elif defined CONFIG_MK10
111 -+#define MODULE_PROC_FAMILY "K10 "
112 -+#elif defined CONFIG_MBARCELONA
113 -+#define MODULE_PROC_FAMILY "BARCELONA "
114 -+#elif defined CONFIG_MBOBCAT
115 -+#define MODULE_PROC_FAMILY "BOBCAT "
116 -+#elif defined CONFIG_MBULLDOZER
117 -+#define MODULE_PROC_FAMILY "BULLDOZER "
118 -+#elif defined CONFIG_MPILEDRIVER
119 -+#define MODULE_PROC_FAMILY "STEAMROLLER "
120 -+#elif defined CONFIG_MSTEAMROLLER
121 -+#define MODULE_PROC_FAMILY "PILEDRIVER "
122 -+#elif defined CONFIG_MJAGUAR
123 -+#define MODULE_PROC_FAMILY "JAGUAR "
124 - #elif defined CONFIG_MELAN
125 - #define MODULE_PROC_FAMILY "ELAN "
126 - #elif defined CONFIG_MCRUSOE
127 ---- a/arch/x86/Kconfig.cpu 2015-08-30 14:34:09.000000000 -0400
128 -+++ b/arch/x86/Kconfig.cpu 2015-11-06 14:20:14.948369244 -0500
129 -@@ -137,9 +137,8 @@ config MPENTIUM4
130 - -Paxville
131 - -Dempsey
132 -
133 --
134 - config MK6
135 -- bool "K6/K6-II/K6-III"
136 -+ bool "AMD K6/K6-II/K6-III"
137 - depends on X86_32
138 - ---help---
139 - Select this for an AMD K6-family processor. Enables use of
140 -@@ -147,7 +146,7 @@ config MK6
141 - flags to GCC.
142 -
143 - config MK7
144 -- bool "Athlon/Duron/K7"
145 -+ bool "AMD Athlon/Duron/K7"
146 - depends on X86_32
147 - ---help---
148 - Select this for an AMD Athlon K7-family processor. Enables use of
149 -@@ -155,12 +154,69 @@ config MK7
150 - flags to GCC.
151 -
152 - config MK8
153 -- bool "Opteron/Athlon64/Hammer/K8"
154 -+ bool "AMD Opteron/Athlon64/Hammer/K8"
155 - ---help---
156 - Select this for an AMD Opteron or Athlon64 Hammer-family processor.
157 - Enables use of some extended instructions, and passes appropriate
158 - optimization flags to GCC.
159 -
160 -+config MK8SSE3
161 -+ bool "AMD Opteron/Athlon64/Hammer/K8 with SSE3"
162 -+ ---help---
163 -+ Select this for improved AMD Opteron or Athlon64 Hammer-family processors.
164 -+ Enables use of some extended instructions, and passes appropriate
165 -+ optimization flags to GCC.
166 -+
167 -+config MK10
168 -+ bool "AMD 61xx/7x50/PhenomX3/X4/II/K10"
169 -+ ---help---
170 -+ Select this for an AMD 61xx Eight-Core Magny-Cours, Athlon X2 7x50,
171 -+ Phenom X3/X4/II, Athlon II X2/X3/X4, or Turion II-family processor.
172 -+ Enables use of some extended instructions, and passes appropriate
173 -+ optimization flags to GCC.
174 -+
175 -+config MBARCELONA
176 -+ bool "AMD Barcelona"
177 -+ ---help---
178 -+ Select this for AMD Barcelona and newer processors.
179 -+
180 -+ Enables -march=barcelona
181 -+
182 -+config MBOBCAT
183 -+ bool "AMD Bobcat"
184 -+ ---help---
185 -+ Select this for AMD Bobcat processors.
186 -+
187 -+ Enables -march=btver1
188 -+
189 -+config MBULLDOZER
190 -+ bool "AMD Bulldozer"
191 -+ ---help---
192 -+ Select this for AMD Bulldozer processors.
193 -+
194 -+ Enables -march=bdver1
195 -+
196 -+config MPILEDRIVER
197 -+ bool "AMD Piledriver"
198 -+ ---help---
199 -+ Select this for AMD Piledriver processors.
200 -+
201 -+ Enables -march=bdver2
202 -+
203 -+config MSTEAMROLLER
204 -+ bool "AMD Steamroller"
205 -+ ---help---
206 -+ Select this for AMD Steamroller processors.
207 -+
208 -+ Enables -march=bdver3
209 -+
210 -+config MJAGUAR
211 -+ bool "AMD Jaguar"
212 -+ ---help---
213 -+ Select this for AMD Jaguar processors.
214 -+
215 -+ Enables -march=btver2
216 -+
217 - config MCRUSOE
218 - bool "Crusoe"
219 - depends on X86_32
220 -@@ -251,8 +307,17 @@ config MPSC
221 - using the cpu family field
222 - in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one.
223 -
224 -+config MATOM
225 -+ bool "Intel Atom"
226 -+ ---help---
227 -+
228 -+ Select this for the Intel Atom platform. Intel Atom CPUs have an
229 -+ in-order pipelining architecture and thus can benefit from
230 -+ accordingly optimized code. Use a recent GCC with specific Atom
231 -+ support in order to fully benefit from selecting this option.
232 -+
233 - config MCORE2
234 -- bool "Core 2/newer Xeon"
235 -+ bool "Intel Core 2"
236 - ---help---
237 -
238 - Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and
239 -@@ -260,14 +325,71 @@ config MCORE2
240 - family in /proc/cpuinfo. Newer ones have 6 and older ones 15
241 - (not a typo)
242 -
243 --config MATOM
244 -- bool "Intel Atom"
245 -+ Enables -march=core2
246 -+
247 -+config MNEHALEM
248 -+ bool "Intel Nehalem"
249 - ---help---
250 -
251 -- Select this for the Intel Atom platform. Intel Atom CPUs have an
252 -- in-order pipelining architecture and thus can benefit from
253 -- accordingly optimized code. Use a recent GCC with specific Atom
254 -- support in order to fully benefit from selecting this option.
255 -+ Select this for 1st Gen Core processors in the Nehalem family.
256 -+
257 -+ Enables -march=nehalem
258 -+
259 -+config MWESTMERE
260 -+ bool "Intel Westmere"
261 -+ ---help---
262 -+
263 -+ Select this for the Intel Westmere formerly Nehalem-C family.
264 -+
265 -+ Enables -march=westmere
266 -+
267 -+config MSILVERMONT
268 -+ bool "Intel Silvermont"
269 -+ ---help---
270 -+
271 -+ Select this for the Intel Silvermont platform.
272 -+
273 -+ Enables -march=silvermont
274 -+
275 -+config MSANDYBRIDGE
276 -+ bool "Intel Sandy Bridge"
277 -+ ---help---
278 -+
279 -+ Select this for 2nd Gen Core processors in the Sandy Bridge family.
280 -+
281 -+ Enables -march=sandybridge
282 -+
283 -+config MIVYBRIDGE
284 -+ bool "Intel Ivy Bridge"
285 -+ ---help---
286 -+
287 -+ Select this for 3rd Gen Core processors in the Ivy Bridge family.
288 -+
289 -+ Enables -march=ivybridge
290 -+
291 -+config MHASWELL
292 -+ bool "Intel Haswell"
293 -+ ---help---
294 -+
295 -+ Select this for 4th Gen Core processors in the Haswell family.
296 -+
297 -+ Enables -march=haswell
298 -+
299 -+config MBROADWELL
300 -+ bool "Intel Broadwell"
301 -+ ---help---
302 -+
303 -+ Select this for 5th Gen Core processors in the Broadwell family.
304 -+
305 -+ Enables -march=broadwell
306 -+
307 -+config MSKYLAKE
308 -+ bool "Intel Skylake"
309 -+ ---help---
310 -+
311 -+ Select this for 6th Gen Core processors in the Skylake family.
312 -+
313 -+ Enables -march=skylake
314 -
315 - config GENERIC_CPU
316 - bool "Generic-x86-64"
317 -@@ -276,6 +398,19 @@ config GENERIC_CPU
318 - Generic x86-64 CPU.
319 - Run equally well on all x86-64 CPUs.
320 -
321 -+config MNATIVE
322 -+ bool "Native optimizations autodetected by GCC"
323 -+ ---help---
324 -+
325 -+ GCC 4.2 and above support -march=native, which automatically detects
326 -+ the optimum settings to use based on your processor. -march=native
327 -+ also detects and applies additional settings beyond -march specific
328 -+ to your CPU, (eg. -msse4). Unless you have a specific reason not to
329 -+ (e.g. distcc cross-compiling), you should probably be using
330 -+ -march=native rather than anything listed below.
331 -+
332 -+ Enables -march=native
333 -+
334 - endchoice
335 -
336 - config X86_GENERIC
337 -@@ -300,7 +435,7 @@ config X86_INTERNODE_CACHE_SHIFT
338 - config X86_L1_CACHE_SHIFT
339 - int
340 - default "7" if MPENTIUM4 || MPSC
341 -- default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
342 -+ default "6" if MK7 || MK8 || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MJAGUAR || MPENTIUMM || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MNATIVE || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
343 - default "4" if MELAN || M486 || MGEODEGX1
344 - default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
345 -
346 -@@ -331,11 +466,11 @@ config X86_ALIGNMENT_16
347 -
348 - config X86_INTEL_USERCOPY
349 - def_bool y
350 -- depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2
351 -+ depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK8SSE3 || MK7 || MEFFICEON || MCORE2 || MK10 || MBARCELONA || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MNATIVE
352 -
353 - config X86_USE_PPRO_CHECKSUM
354 - def_bool y
355 -- depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM
356 -+ depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MK10 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MK8SSE3 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MATOM || MNATIVE
357 -
358 - config X86_USE_3DNOW
359 - def_bool y
360 -@@ -359,17 +494,17 @@ config X86_P6_NOP
361 -
362 - config X86_TSC
363 - def_bool y
364 -- depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MATOM) || X86_64
365 -+ depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MK8SSE3 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MNATIVE || MATOM) || X86_64
366 -
367 - config X86_CMPXCHG64
368 - def_bool y
369 -- depends on X86_PAE || X86_64 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MATOM
370 -+ depends on X86_PAE || X86_64 || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MATOM || MNATIVE
371 -
372 - # this should be set for all -march=.. options where the compiler
373 - # generates cmov.
374 - config X86_CMOV
375 - def_bool y
376 -- depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM || MGEODE_LX)
377 -+ depends on (MK8 || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MJAGUAR || MK7 || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MNATIVE || MATOM || MGEODE_LX)
378 -
379 - config X86_MINIMUM_CPU_FAMILY
380 - int
381 ---- a/arch/x86/Makefile 2015-08-30 14:34:09.000000000 -0400
382 -+++ b/arch/x86/Makefile 2015-11-06 14:21:05.708983344 -0500
383 -@@ -94,13 +94,38 @@ else
384 - KBUILD_CFLAGS += $(call cc-option,-mskip-rax-setup)
385 -
386 - # FIXME - should be integrated in Makefile.cpu (Makefile_32.cpu)
387 -+ cflags-$(CONFIG_MNATIVE) += $(call cc-option,-march=native)
388 - cflags-$(CONFIG_MK8) += $(call cc-option,-march=k8)
389 -+ cflags-$(CONFIG_MK8SSE3) += $(call cc-option,-march=k8-sse3,-mtune=k8)
390 -+ cflags-$(CONFIG_MK10) += $(call cc-option,-march=amdfam10)
391 -+ cflags-$(CONFIG_MBARCELONA) += $(call cc-option,-march=barcelona)
392 -+ cflags-$(CONFIG_MBOBCAT) += $(call cc-option,-march=btver1)
393 -+ cflags-$(CONFIG_MBULLDOZER) += $(call cc-option,-march=bdver1)
394 -+ cflags-$(CONFIG_MPILEDRIVER) += $(call cc-option,-march=bdver2)
395 -+ cflags-$(CONFIG_MSTEAMROLLER) += $(call cc-option,-march=bdver3)
396 -+ cflags-$(CONFIG_MJAGUAR) += $(call cc-option,-march=btver2)
397 - cflags-$(CONFIG_MPSC) += $(call cc-option,-march=nocona)
398 -
399 - cflags-$(CONFIG_MCORE2) += \
400 -- $(call cc-option,-march=core2,$(call cc-option,-mtune=generic))
401 -- cflags-$(CONFIG_MATOM) += $(call cc-option,-march=atom) \
402 -- $(call cc-option,-mtune=atom,$(call cc-option,-mtune=generic))
403 -+ $(call cc-option,-march=core2,$(call cc-option,-mtune=core2))
404 -+ cflags-$(CONFIG_MNEHALEM) += \
405 -+ $(call cc-option,-march=nehalem,$(call cc-option,-mtune=nehalem))
406 -+ cflags-$(CONFIG_MWESTMERE) += \
407 -+ $(call cc-option,-march=westmere,$(call cc-option,-mtune=westmere))
408 -+ cflags-$(CONFIG_MSILVERMONT) += \
409 -+ $(call cc-option,-march=silvermont,$(call cc-option,-mtune=silvermont))
410 -+ cflags-$(CONFIG_MSANDYBRIDGE) += \
411 -+ $(call cc-option,-march=sandybridge,$(call cc-option,-mtune=sandybridge))
412 -+ cflags-$(CONFIG_MIVYBRIDGE) += \
413 -+ $(call cc-option,-march=ivybridge,$(call cc-option,-mtune=ivybridge))
414 -+ cflags-$(CONFIG_MHASWELL) += \
415 -+ $(call cc-option,-march=haswell,$(call cc-option,-mtune=haswell))
416 -+ cflags-$(CONFIG_MBROADWELL) += \
417 -+ $(call cc-option,-march=broadwell,$(call cc-option,-mtune=broadwell))
418 -+ cflags-$(CONFIG_MSKYLAKE) += \
419 -+ $(call cc-option,-march=skylake,$(call cc-option,-mtune=skylake))
420 -+ cflags-$(CONFIG_MATOM) += $(call cc-option,-march=bonnell) \
421 -+ $(call cc-option,-mtune=bonnell,$(call cc-option,-mtune=generic))
422 - cflags-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=generic)
423 - KBUILD_CFLAGS += $(cflags-y)
424 -
425 ---- a/arch/x86/Makefile_32.cpu 2015-08-30 14:34:09.000000000 -0400
426 -+++ b/arch/x86/Makefile_32.cpu 2015-11-06 14:21:43.604429077 -0500
427 -@@ -23,7 +23,16 @@ cflags-$(CONFIG_MK6) += -march=k6
428 - # Please note, that patches that add -march=athlon-xp and friends are pointless.
429 - # They make zero difference whatsosever to performance at this time.
430 - cflags-$(CONFIG_MK7) += -march=athlon
431 -+cflags-$(CONFIG_MNATIVE) += $(call cc-option,-march=native)
432 - cflags-$(CONFIG_MK8) += $(call cc-option,-march=k8,-march=athlon)
433 -+cflags-$(CONFIG_MK8SSE3) += $(call cc-option,-march=k8-sse3,-march=athlon)
434 -+cflags-$(CONFIG_MK10) += $(call cc-option,-march=amdfam10,-march=athlon)
435 -+cflags-$(CONFIG_MBARCELONA) += $(call cc-option,-march=barcelona,-march=athlon)
436 -+cflags-$(CONFIG_MBOBCAT) += $(call cc-option,-march=btver1,-march=athlon)
437 -+cflags-$(CONFIG_MBULLDOZER) += $(call cc-option,-march=bdver1,-march=athlon)
438 -+cflags-$(CONFIG_MPILEDRIVER) += $(call cc-option,-march=bdver2,-march=athlon)
439 -+cflags-$(CONFIG_MSTEAMROLLER) += $(call cc-option,-march=bdver3,-march=athlon)
440 -+cflags-$(CONFIG_MJAGUAR) += $(call cc-option,-march=btver2,-march=athlon)
441 - cflags-$(CONFIG_MCRUSOE) += -march=i686 $(align)-functions=0 $(align)-jumps=0 $(align)-loops=0
442 - cflags-$(CONFIG_MEFFICEON) += -march=i686 $(call tune,pentium3) $(align)-functions=0 $(align)-jumps=0 $(align)-loops=0
443 - cflags-$(CONFIG_MWINCHIPC6) += $(call cc-option,-march=winchip-c6,-march=i586)
444 -@@ -32,8 +41,16 @@ cflags-$(CONFIG_MCYRIXIII) += $(call cc-
445 - cflags-$(CONFIG_MVIAC3_2) += $(call cc-option,-march=c3-2,-march=i686)
446 - cflags-$(CONFIG_MVIAC7) += -march=i686
447 - cflags-$(CONFIG_MCORE2) += -march=i686 $(call tune,core2)
448 --cflags-$(CONFIG_MATOM) += $(call cc-option,-march=atom,$(call cc-option,-march=core2,-march=i686)) \
449 -- $(call cc-option,-mtune=atom,$(call cc-option,-mtune=generic))
450 -+cflags-$(CONFIG_MNEHALEM) += -march=i686 $(call tune,nehalem)
451 -+cflags-$(CONFIG_MWESTMERE) += -march=i686 $(call tune,westmere)
452 -+cflags-$(CONFIG_MSILVERMONT) += -march=i686 $(call tune,silvermont)
453 -+cflags-$(CONFIG_MSANDYBRIDGE) += -march=i686 $(call tune,sandybridge)
454 -+cflags-$(CONFIG_MIVYBRIDGE) += -march=i686 $(call tune,ivybridge)
455 -+cflags-$(CONFIG_MHASWELL) += -march=i686 $(call tune,haswell)
456 -+cflags-$(CONFIG_MBROADWELL) += -march=i686 $(call tune,broadwell)
457 -+cflags-$(CONFIG_MSKYLAKE) += -march=i686 $(call tune,skylake)
458 -+cflags-$(CONFIG_MATOM) += $(call cc-option,-march=bonnell,$(call cc-option,-march=core2,-march=i686)) \
459 -+ $(call cc-option,-mtune=bonnell,$(call cc-option,-mtune=generic))
460 -
461 - # AMD Elan support
462 - cflags-$(CONFIG_MELAN) += -march=i486