Gentoo Archives: gentoo-commits

From: "Mike Pagano (mpagano)" <mpagano@g.o>
To: gentoo-commits@l.g.o
Subject: [gentoo-commits] linux-patches r2725 - genpatches-2.6/trunk/3.14
Date: Tue, 01 Apr 2014 12:39:40
Message-Id: 20140401123934.B04C52005E@flycatcher.gentoo.org
1 Author: mpagano
2 Date: 2014-04-01 12:39:34 +0000 (Tue, 01 Apr 2014)
3 New Revision: 2725
4
5 Added:
6 genpatches-2.6/trunk/3.14/5000_enable-additional-cpu-optimizations-for-gcc.patch
7 Modified:
8 genpatches-2.6/trunk/3.14/0000_README
9 Log:
10 Kernel patch enables gcc optimizations for additional CPUs.
11
12 Modified: genpatches-2.6/trunk/3.14/0000_README
13 ===================================================================
14 --- genpatches-2.6/trunk/3.14/0000_README 2014-04-01 12:32:06 UTC (rev 2724)
15 +++ genpatches-2.6/trunk/3.14/0000_README 2014-04-01 12:39:34 UTC (rev 2725)
16 @@ -78,6 +78,9 @@
17 From: Tom Wijsman <TomWij@g.o>
18 Desc: Add Gentoo Linux support config settings and defaults.
19
20 +Patch: 5000_enable-additional-cpu-optimizations-for-gcc.patch
21 +From: https://github.com/graysky2/kernel_gcc_patch/
22 +Desc: Kernel patch enables gcc optimizations for additional CPUs.
23
24 Patch: 5001_BFQ-1-block-cgroups-kconfig-build-bits-for-v7r2-3.14.patch
25 From: http://algo.ing.unimo.it/people/paolo/disk_sched/
26
27 Added: genpatches-2.6/trunk/3.14/5000_enable-additional-cpu-optimizations-for-gcc.patch
28 ===================================================================
29 --- genpatches-2.6/trunk/3.14/5000_enable-additional-cpu-optimizations-for-gcc.patch (rev 0)
30 +++ genpatches-2.6/trunk/3.14/5000_enable-additional-cpu-optimizations-for-gcc.patch 2014-04-01 12:39:34 UTC (rev 2725)
31 @@ -0,0 +1,325 @@
32 +This patch has been tested on and known to work with kernel versions from 3.2
33 +up to the latest git version (pulled on 12/14/2013).
34 +
35 +This patch will expand the number of microarchitectures to include new
36 +processors including: AMD K10-family, AMD Family 10h (Barcelona), AMD Family
37 +14h (Bobcat), AMD Family 15h (Bulldozer), AMD Family 15h (Piledriver), AMD
38 +Family 16h (Jaguar), Intel 1st Gen Core i3/i5/i7 (Nehalem), Intel 2nd Gen Core
39 +i3/i5/i7 (Sandybridge), Intel 3rd Gen Core i3/i5/i7 (Ivybridge), and Intel 4th
40 +Gen Core i3/i5/i7 (Haswell). It also offers the compiler the 'native' flag.
41 +
42 +Small but real speed increases are measurable using a make endpoint comparing
43 +a generic kernel to one built with one of the respective microarchs.
44 +
45 +See the following experimental evidence supporting this statement:
46 +https://github.com/graysky2/kernel_gcc_patch
47 +
48 +---
49 +diff -uprN a/arch/x86/include/asm/module.h b/arch/x86/include/asm/module.h
50 +--- a/arch/x86/include/asm/module.h 2013-11-03 18:41:51.000000000 -0500
51 ++++ b/arch/x86/include/asm/module.h 2013-12-15 06:21:24.351122516 -0500
52 +@@ -15,6 +15,16 @@
53 + #define MODULE_PROC_FAMILY "586MMX "
54 + #elif defined CONFIG_MCORE2
55 + #define MODULE_PROC_FAMILY "CORE2 "
56 ++#elif defined CONFIG_MNATIVE
57 ++#define MODULE_PROC_FAMILY "NATIVE "
58 ++#elif defined CONFIG_MCOREI7
59 ++#define MODULE_PROC_FAMILY "COREI7 "
60 ++#elif defined CONFIG_MCOREI7AVX
61 ++#define MODULE_PROC_FAMILY "COREI7AVX "
62 ++#elif defined CONFIG_MCOREAVXI
63 ++#define MODULE_PROC_FAMILY "COREAVXI "
64 ++#elif defined CONFIG_MCOREAVX2
65 ++#define MODULE_PROC_FAMILY "COREAVX2 "
66 + #elif defined CONFIG_MATOM
67 + #define MODULE_PROC_FAMILY "ATOM "
68 + #elif defined CONFIG_M686
69 +@@ -33,6 +43,18 @@
70 + #define MODULE_PROC_FAMILY "K7 "
71 + #elif defined CONFIG_MK8
72 + #define MODULE_PROC_FAMILY "K8 "
73 ++#elif defined CONFIG_MK10
74 ++#define MODULE_PROC_FAMILY "K10 "
75 ++#elif defined CONFIG_MBARCELONA
76 ++#define MODULE_PROC_FAMILY "BARCELONA "
77 ++#elif defined CONFIG_MBOBCAT
78 ++#define MODULE_PROC_FAMILY "BOBCAT "
79 ++#elif defined CONFIG_MBULLDOZER
80 ++#define MODULE_PROC_FAMILY "BULLDOZER "
81 ++#elif defined CONFIG_MPILEDRIVER
82 ++#define MODULE_PROC_FAMILY "PILEDRIVER "
83 ++#elif defined CONFIG_MJAGUAR
84 ++#define MODULE_PROC_FAMILY "JAGUAR "
85 + #elif defined CONFIG_MELAN
86 + #define MODULE_PROC_FAMILY "ELAN "
87 + #elif defined CONFIG_MCRUSOE
88 +diff -uprN a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu
89 +--- a/arch/x86/Kconfig.cpu 2013-11-03 18:41:51.000000000 -0500
90 ++++ b/arch/x86/Kconfig.cpu 2013-12-15 06:21:24.351122516 -0500
91 +@@ -139,7 +139,7 @@ config MPENTIUM4
92 +
93 +
94 + config MK6
95 +- bool "K6/K6-II/K6-III"
96 ++ bool "AMD K6/K6-II/K6-III"
97 + depends on X86_32
98 + ---help---
99 + Select this for an AMD K6-family processor. Enables use of
100 +@@ -147,7 +147,7 @@ config MK6
101 + flags to GCC.
102 +
103 + config MK7
104 +- bool "Athlon/Duron/K7"
105 ++ bool "AMD Athlon/Duron/K7"
106 + depends on X86_32
107 + ---help---
108 + Select this for an AMD Athlon K7-family processor. Enables use of
109 +@@ -155,12 +155,55 @@ config MK7
110 + flags to GCC.
111 +
112 + config MK8
113 +- bool "Opteron/Athlon64/Hammer/K8"
114 ++ bool "AMD Opteron/Athlon64/Hammer/K8"
115 + ---help---
116 + Select this for an AMD Opteron or Athlon64 Hammer-family processor.
117 + Enables use of some extended instructions, and passes appropriate
118 + optimization flags to GCC.
119 +
120 ++config MK10
121 ++ bool "AMD 61xx/7x50/PhenomX3/X4/II/K10"
122 ++ ---help---
123 ++ Select this for an AMD 61xx Eight-Core Magny-Cours, Athlon X2 7x50,
124 ++ Phenom X3/X4/II, Athlon II X2/X3/X4, or Turion II-family processor.
125 ++ Enables use of some extended instructions, and passes appropriate
126 ++ optimization flags to GCC.
127 ++
128 ++config MBARCELONA
129 ++ bool "AMD Barcelona"
130 ++ ---help---
131 ++ Select this for AMD Barcelona and newer processors.
132 ++
133 ++ Enables -march=barcelona
134 ++
135 ++config MBOBCAT
136 ++ bool "AMD Bobcat"
137 ++ ---help---
138 ++ Select this for AMD Bobcat processors.
139 ++
140 ++ Enables -march=btver1
141 ++
142 ++config MBULLDOZER
143 ++ bool "AMD Bulldozer"
144 ++ ---help---
145 ++ Select this for AMD Bulldozer processors.
146 ++
147 ++ Enables -march=bdver1
148 ++
149 ++config MPILEDRIVER
150 ++ bool "AMD Piledriver"
151 ++ ---help---
152 ++ Select this for AMD Piledriver processors.
153 ++
154 ++ Enables -march=bdver2
155 ++
156 ++config MJAGUAR
157 ++ bool "AMD Jaguar"
158 ++ ---help---
159 ++ Select this for AMD Jaguar processors.
160 ++
161 ++ Enables -march=btver2
162 ++
163 + config MCRUSOE
164 + bool "Crusoe"
165 + depends on X86_32
166 +@@ -251,8 +294,17 @@ config MPSC
167 + using the cpu family field
168 + in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one.
169 +
170 ++config MATOM
171 ++ bool "Intel Atom"
172 ++ ---help---
173 ++
174 ++ Select this for the Intel Atom platform. Intel Atom CPUs have an
175 ++ in-order pipelining architecture and thus can benefit from
176 ++ accordingly optimized code. Use a recent GCC with specific Atom
177 ++ support in order to fully benefit from selecting this option.
178 ++
179 + config MCORE2
180 +- bool "Core 2/newer Xeon"
181 ++ bool "Intel Core 2"
182 + ---help---
183 +
184 + Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and
185 +@@ -260,14 +312,40 @@ config MCORE2
186 + family in /proc/cpuinfo. Newer ones have 6 and older ones 15
187 + (not a typo)
188 +
189 +-config MATOM
190 +- bool "Intel Atom"
191 ++ Enables -march=core2
192 ++
193 ++config MCOREI7
194 ++ bool "Intel Core i7"
195 + ---help---
196 +
197 +- Select this for the Intel Atom platform. Intel Atom CPUs have an
198 +- in-order pipelining architecture and thus can benefit from
199 +- accordingly optimized code. Use a recent GCC with specific Atom
200 +- support in order to fully benefit from selecting this option.
201 ++ Select this for the Intel Nehalem platform. Intel Nehalem proecessors
202 ++ include Core i3, i5, i7, Xeon: 34xx, 35xx, 55xx, 56xx, 75xx processors.
203 ++
204 ++ Enables -march=corei7
205 ++
206 ++config MCOREI7AVX
207 ++ bool "Intel Core 2nd Gen AVX"
208 ++ ---help---
209 ++
210 ++ Select this for 2nd Gen Core processors including Sandy Bridge.
211 ++
212 ++ Enables -march=corei7-avx
213 ++
214 ++config MCOREAVXI
215 ++ bool "Intel Core 3rd Gen AVX"
216 ++ ---help---
217 ++
218 ++ Select this for 3rd Gen Core processors including Ivy Bridge.
219 ++
220 ++ Enables -march=core-avx-i
221 ++
222 ++config MCOREAVX2
223 ++ bool "Intel Core AVX2"
224 ++ ---help---
225 ++
226 ++ Select this for AVX2 enabled processors including Haswell.
227 ++
228 ++ Enables -march=core-avx2
229 +
230 + config GENERIC_CPU
231 + bool "Generic-x86-64"
232 +@@ -276,6 +354,19 @@ config GENERIC_CPU
233 + Generic x86-64 CPU.
234 + Run equally well on all x86-64 CPUs.
235 +
236 ++config MNATIVE
237 ++ bool "Native optimizations autodetected by GCC"
238 ++ ---help---
239 ++
240 ++ GCC 4.2 and above support -march=native, which automatically detects
241 ++ the optimum settings to use based on your processor. -march=native
242 ++ also detects and applies additional settings beyond -march specific
243 ++ to your CPU, (eg. -msse4). Unless you have a specific reason not to
244 ++ (e.g. distcc cross-compiling), you should probably be using
245 ++ -march=native rather than anything listed below.
246 ++
247 ++ Enables -march=native
248 ++
249 + endchoice
250 +
251 + config X86_GENERIC
252 +@@ -300,7 +391,7 @@ config X86_INTERNODE_CACHE_SHIFT
253 + config X86_L1_CACHE_SHIFT
254 + int
255 + default "7" if MPENTIUM4 || MPSC
256 +- default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
257 ++ default "6" if MK7 || MK8 || MK10 || MBARCELONA || MBOBCAT || MBULLDOZER || MPILEDRIVER || MJAGUAR || MPENTIUMM || MCORE2 || MCOREI7 || MCOREI7AVX || MCOREAVXI || MCOREAVX2 || MATOM || MVIAC7 || X86_GENERIC || MNATIVE || GENERIC_CPU
258 + default "4" if MELAN || M486 || MGEODEGX1
259 + default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
260 +
261 +@@ -331,11 +422,11 @@ config X86_ALIGNMENT_16
262 +
263 + config X86_INTEL_USERCOPY
264 + def_bool y
265 +- depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2
266 ++ depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || MNATIVE || X86_GENERIC || MK8 || MK7 || MK10 || MBARCELONA || MEFFICEON || MCORE2 || MCOREI7 || MCOREI7AVX || MCOREAVXI || MCOREAVX2
267 +
268 + config X86_USE_PPRO_CHECKSUM
269 + def_bool y
270 +- depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM
271 ++ depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MK10 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MCOREI7 || MCOREI7AVX || MCOREAVXI || MCOREAVX2 || MATOM || MNATIVE
272 +
273 + config X86_USE_3DNOW
274 + def_bool y
275 +@@ -363,17 +454,17 @@ config X86_P6_NOP
276 +
277 + config X86_TSC
278 + def_bool y
279 +- depends on ((MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MATOM) && !X86_NUMAQ) || X86_64
280 ++ depends on ((MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MK10 || MBARCELONA || MBOBCAT || MBULLDOZER || MPILEDRIVER || MJAGUAR || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MCOREI7 || MCOREI7-AVX || MATOM) && !X86_NUMAQ) || X86_64 || MNATIVE
281 +
282 + config X86_CMPXCHG64
283 + def_bool y
284 +- depends on X86_PAE || X86_64 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MATOM
285 ++ depends on X86_PAE || X86_64 || MCORE2 || MCOREI7 || MCOREI7AVX || MCOREAVXI || MCOREAVX2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MATOM || MNATIVE
286 +
287 + # this should be set for all -march=.. options where the compiler
288 + # generates cmov.
289 + config X86_CMOV
290 + def_bool y
291 +- depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM || MGEODE_LX)
292 ++ depends on (MK8 || MK10 || MBARCELONA || MBOBCAT || MBULLDOZER || MPILEDRIVER || MJAGUAR || MK7 || MCORE2 || MCOREI7 || MCOREI7AVX || MCOREAVXI || MCOREAVX2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MNATIVE || MATOM || MGEODE_LX)
293 +
294 + config X86_MINIMUM_CPU_FAMILY
295 + int
296 +diff -uprN a/arch/x86/Makefile b/arch/x86/Makefile
297 +--- a/arch/x86/Makefile 2013-11-03 18:41:51.000000000 -0500
298 ++++ b/arch/x86/Makefile 2013-12-15 06:21:24.354455723 -0500
299 +@@ -61,11 +61,26 @@ else
300 + KBUILD_CFLAGS += $(call cc-option,-mno-sse -mpreferred-stack-boundary=3)
301 +
302 + # FIXME - should be integrated in Makefile.cpu (Makefile_32.cpu)
303 ++ cflags-$(CONFIG_MNATIVE) += $(call cc-option,-march=native)
304 + cflags-$(CONFIG_MK8) += $(call cc-option,-march=k8)
305 ++ cflags-$(CONFIG_MK10) += $(call cc-option,-march=amdfam10)
306 ++ cflags-$(CONFIG_MBARCELONA) += $(call cc-option,-march=barcelona)
307 ++ cflags-$(CONFIG_MBOBCAT) += $(call cc-option,-march=btver1)
308 ++ cflags-$(CONFIG_MBULLDOZER) += $(call cc-option,-march=bdver1)
309 ++ cflags-$(CONFIG_MPILEDRIVER) += $(call cc-option,-march=bdver2)
310 ++ cflags-$(CONFIG_MJAGUAR) += $(call cc-option,-march=btver2)
311 + cflags-$(CONFIG_MPSC) += $(call cc-option,-march=nocona)
312 +
313 + cflags-$(CONFIG_MCORE2) += \
314 +- $(call cc-option,-march=core2,$(call cc-option,-mtune=generic))
315 ++ $(call cc-option,-march=core2,$(call cc-option,-mtune=core2))
316 ++ cflags-$(CONFIG_MCOREI7) += \
317 ++ $(call cc-option,-march=corei7,$(call cc-option,-mtune=corei7))
318 ++ cflags-$(CONFIG_MCOREI7AVX) += \
319 ++ $(call cc-option,-march=corei7-avx,$(call cc-option,-mtune=corei7-avx))
320 ++ cflags-$(CONFIG_MCOREAVXI) += \
321 ++ $(call cc-option,-march=core-avx-i,$(call cc-option,-mtune=core-avx-i))
322 ++ cflags-$(CONFIG_MCOREAVX2) += \
323 ++ $(call cc-option,-march=core-avx2,$(call cc-option,-mtune=core-avx2))
324 + cflags-$(CONFIG_MATOM) += $(call cc-option,-march=atom) \
325 + $(call cc-option,-mtune=atom,$(call cc-option,-mtune=generic))
326 + cflags-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=generic)
327 +diff -uprN a/arch/x86/Makefile_32.cpu b/arch/x86/Makefile_32.cpu
328 +--- a/arch/x86/Makefile_32.cpu 2013-11-03 18:41:51.000000000 -0500
329 ++++ b/arch/x86/Makefile_32.cpu 2013-12-15 06:21:24.354455723 -0500
330 +@@ -23,7 +23,14 @@ cflags-$(CONFIG_MK6) += -march=k6
331 + # Please note, that patches that add -march=athlon-xp and friends are pointless.
332 + # They make zero difference whatsosever to performance at this time.
333 + cflags-$(CONFIG_MK7) += -march=athlon
334 ++cflags-$(CONFIG_MNATIVE) += $(call cc-option,-march=native)
335 + cflags-$(CONFIG_MK8) += $(call cc-option,-march=k8,-march=athlon)
336 ++cflags-$(CONFIG_MK10) += $(call cc-option,-march=amdfam10,-march=athlon)
337 ++cflags-$(CONFIG_MBARCELONA) += $(call cc-option,-march=barcelona,-march=athlon)
338 ++cflags-$(CONFIG_MBOBCAT) += $(call cc-option,-march=btver1,-march=athlon)
339 ++cflags-$(CONFIG_MBULLDOZER) += $(call cc-option,-march=bdver1,-march=athlon)
340 ++cflags-$(CONFIG_MPILEDRIVER) += $(call cc-option,-march=bdver2,-march=athlon)
341 ++cflags-$(CONFIG_MJAGUAR) += $(call cc-option,-march=btver2,-march=athlon)
342 + cflags-$(CONFIG_MCRUSOE) += -march=i686 $(align)-functions=0 $(align)-jumps=0 $(align)-loops=0
343 + cflags-$(CONFIG_MEFFICEON) += -march=i686 $(call tune,pentium3) $(align)-functions=0 $(align)-jumps=0 $(align)-loops=0
344 + cflags-$(CONFIG_MWINCHIPC6) += $(call cc-option,-march=winchip-c6,-march=i586)
345 +@@ -32,6 +39,10 @@ cflags-$(CONFIG_MCYRIXIII) += $(call cc-
346 + cflags-$(CONFIG_MVIAC3_2) += $(call cc-option,-march=c3-2,-march=i686)
347 + cflags-$(CONFIG_MVIAC7) += -march=i686
348 + cflags-$(CONFIG_MCORE2) += -march=i686 $(call tune,core2)
349 ++cflags-$(CONFIG_MCOREI7) += -march=i686 $(call tune,corei7)
350 ++cflags-$(CONFIG_MCOREI7AVX) += -march=i686 $(call tune,corei7-avx)
351 ++cflags-$(CONFIG_MCOREAVXI) += -march=i686 $(call tune,core-avx-i)
352 ++cflags-$(CONFIG_MCOREAVX2) += -march=i686 $(call tune,core-avx2)
353 + cflags-$(CONFIG_MATOM) += $(call cc-option,-march=atom,$(call cc-option,-march=core2,-march=i686)) \
354 + $(call cc-option,-mtune=atom,$(call cc-option,-mtune=generic))
355 +
356 +