[gentoo-commits] repo/gentoo:master commit in: dev-libs/beignet/, dev-libs/beignet/files/

[Marek Szuba]

commit:     2517438cae9831332178378078fc273cb8ffb466
Author:     Marek Szuba <marecki <AT> gentoo <DOT> org>
AuthorDate: Fri Aug 31 13:27:16 2018 +0000
Commit:     Marek Szuba <marecki <AT> gentoo <DOT> org>
CommitDate: Fri Aug 31 13:27:16 2018 +0000
URL:        https://gitweb.gentoo.org/repo/gentoo.git/commit/?id=2517438c

dev-libs/beignet: disable optimisations broken on some platforms

Certain optimisation introduced in 1.3.2 is now known not to work
correctly on Skylake and Haswell systems. Upstream has been notified but
has yet to respond.

Upstream-Bug: https://bugs.freedesktop.org/show_bug.cgi?id=102137
Closes: https://bugs.gentoo.org/662760
Package-Manager: Portage-2.3.40, Repoman-2.3.9

 dev-libs/beignet/beignet-1.3.2-r2.ebuild           | 107 +++++++++++++++++++++
 ...eignet-1.3.2_disable-doNegAddOptimization.patch |  66 +++++++++++++
 2 files changed, 173 insertions(+)

diff --git a/dev-libs/beignet/beignet-1.3.2-r2.ebuild b/dev-libs/beignet/beignet-1.3.2-r2.ebuild
new file mode 100644
index 00000000000..bc69b887c3d
--- /dev/null
+++ b/dev-libs/beignet/beignet-1.3.2-r2.ebuild
@@ -0,0 +1,107 @@
+# Copyright 1999-2018 Gentoo Foundation
+# Distributed under the terms of the GNU General Public License v2
+
+EAPI=6
+
+PYTHON_COMPAT=( python{2_7,3_4,3_5,3_6} )
+CMAKE_BUILD_TYPE="Release"
+
+inherit python-any-r1 cmake-multilib flag-o-matic llvm toolchain-funcs
+
+DESCRIPTION="OpenCL implementation for Intel GPUs"
+HOMEPAGE="https://01.org/beignet"
+
+LICENSE="LGPL-2.1+"
+SLOT="0"
+IUSE="ocl-icd ocl20"
+
+if [[ "${PV}" == "9999" ]]; then
+	inherit git-r3
+	EGIT_REPO_URI="https://anongit.freedesktop.org/git/beignet.git"
+	KEYWORDS=""
+else
+	KEYWORDS="~amd64"
+	SRC_URI="https://01.org/sites/default/files/${P}-source.tar.gz"
+	S=${WORKDIR}/Beignet-${PV}-Source
+fi
+
+COMMON="media-libs/mesa[${MULTILIB_USEDEP}]
+	<sys-devel/clang-6.0.9999:=[${MULTILIB_USEDEP}]
+	>=x11-libs/libdrm-2.4.70[video_cards_intel,${MULTILIB_USEDEP}]
+	x11-libs/libXext[${MULTILIB_USEDEP}]
+	x11-libs/libXfixes[${MULTILIB_USEDEP}]"
+RDEPEND="${COMMON}
+	app-eselect/eselect-opencl"
+DEPEND="${COMMON}
+	${PYTHON_DEPS}
+	ocl-icd? ( dev-libs/ocl-icd )
+	virtual/pkgconfig"
+
+LLVM_MAX_SLOT=6
+
+PATCHES=(
+	"${FILESDIR}"/no-debian-multiarch.patch
+	"${FILESDIR}"/${PN}-1.3.2_disable-doNegAddOptimization.patch
+	"${FILESDIR}"/${PN}-1.3.2_cmake-llvm-config-multilib.patch
+	"${FILESDIR}"/${PN}-1.3.2_llvm6.patch
+	"${FILESDIR}"/${PN}-1.3.1-oclicd_no_upstream_icdfile.patch
+	"${FILESDIR}"/${PN}-1.2.0_no-hardcoded-cflags.patch
+	"${FILESDIR}"/llvm-terminfo.patch
+)
+
+DOCS=(
+	docs/.
+)
+
+pkg_pretend() {
+	if [[ ${MERGE_TYPE} != "binary" ]]; then
+		if tc-is-gcc; then
+			if [[ $(gcc-major-version) -eq 4 ]] && [[ $(gcc-minor-version) -lt 6 ]]; then
+				eerror "Compilation with gcc older than 4.6 is not supported"
+				die "Too old gcc found."
+			fi
+		fi
+	fi
+}
+
+pkg_setup() {
+	llvm_pkg_setup
+	python_setup
+}
+
+src_prepare() {
+	# See Bug #593968
+	append-flags -fPIC
+
+	cmake-utils_src_prepare
+	# We cannot run tests because they require permissions to access
+	# the hardware, and building them is very time-consuming.
+	cmake_comment_add_subdirectory utests
+}
+
+multilib_src_configure() {
+	VENDOR_DIR="/usr/$(get_libdir)/OpenCL/vendors/${PN}"
+
+	local mycmakeargs=(
+		-DCMAKE_INSTALL_PREFIX="${EPREFIX}${VENDOR_DIR}"
+		-DOCLICD_COMPAT=$(usex ocl-icd)
+		$(usex ocl20 "" "-DENABLE_OPENCL_20=OFF")
+	)
+
+	cmake-utils_src_configure
+}
+
+multilib_src_install() {
+	VENDOR_DIR="/usr/$(get_libdir)/OpenCL/vendors/${PN}"
+
+	cmake-utils_src_install
+
+	insinto /etc/OpenCL/vendors/
+	echo "${EPREFIX}${VENDOR_DIR}/lib/${PN}/libcl.so" > "${PN}-${ABI}.icd" || die "Failed to generate ICD file"
+	doins "${PN}-${ABI}.icd"
+
+	dosym "lib/${PN}/libcl.so" "${VENDOR_DIR}"/libOpenCL.so.1
+	dosym "lib/${PN}/libcl.so" "${VENDOR_DIR}"/libOpenCL.so
+	dosym "lib/${PN}/libcl.so" "${VENDOR_DIR}"/libcl.so.1
+	dosym "lib/${PN}/libcl.so" "${VENDOR_DIR}"/libcl.so
+}

diff --git a/dev-libs/beignet/files/beignet-1.3.2_disable-doNegAddOptimization.patch b/dev-libs/beignet/files/beignet-1.3.2_disable-doNegAddOptimization.patch
new file mode 100644
index 00000000000..ae399b17f05
--- /dev/null
+++ b/dev-libs/beignet/files/beignet-1.3.2_disable-doNegAddOptimization.patch
@@ -0,0 +1,66 @@
+--- b/backend/src/backend/gen_insn_selection_optimize.cpp
++++ a/backend/src/backend/gen_insn_selection_optimize.cpp
+@@ -74,7 +74,8 @@ namespace gbe
+                   const GenRegister& replacement) :
+                   insn(insn), intermedia(intermedia), replacement(replacement)
+       {
+-        assert(insn.opcode == SEL_OP_MOV || insn.opcode == SEL_OP_ADD);
++        assert(insn.opcode == SEL_OP_MOV);
++        assert(&(insn.src(0)) == &replacement);
+         assert(&(insn.dst(0)) == &intermedia);
+         this->elements = CalculateElements(intermedia, insn.state.execWidth);
+         replacementOverwritten = false;
+@@ -101,7 +102,6 @@ namespace gbe
+     void doReplacement(ReplaceInfo* info);
+     bool CanBeReplaced(const ReplaceInfo* info, const SelectionInstruction& insn, const GenRegister& var);
+     void cleanReplaceInfoMap();
+-    void doNegAddOptimization(SelectionInstruction &insn);
+ 
+     SelectionBlock &bb;
+     const ir::Liveness::LiveOut& liveout;
+@@ -159,13 +159,8 @@ namespace gbe
+ 
+   void SelBasicBlockOptimizer::addToReplaceInfoMap(SelectionInstruction& insn)
+   {
+-    assert(insn.opcode == SEL_OP_MOV || insn.opcode == SEL_OP_ADD);
+-    GenRegister &src = insn.src(0);
+-    if (insn.opcode == SEL_OP_ADD) {
+-      if (src.file == GEN_IMMEDIATE_VALUE)
+-        src = insn.src(1);
+-    }
+-
++    assert(insn.opcode == SEL_OP_MOV);
++    const GenRegister& src = insn.src(0);
+     const GenRegister& dst = insn.dst(0);
+     if (src.type != dst.type || src.file != dst.file)
+       return;
+@@ -254,29 +249,10 @@ namespace gbe
+ 
+       if (insn.opcode == SEL_OP_MOV)
+         addToReplaceInfoMap(insn);
+-
+-      doNegAddOptimization(insn);
+     }
+     cleanReplaceInfoMap();
+   }
+ 
+-  /* LLVM transform Mad(a, -b, c) to
+-     Add b, -b, 0
+-     Mad val, a, b, c
+-     for Gen support negtive modifier, mad(a, -b, c) is native suppoted.
+-     Also it can be used for the same like instruction sequence.
+-     Do it just like a:  mov b, -b, so it is a Mov operation like LocalCopyPropagation
+-  */
+-  void SelBasicBlockOptimizer::doNegAddOptimization(SelectionInstruction &insn) {
+-    if (insn.opcode == SEL_OP_ADD) {
+-      GenRegister src0 = insn.src(0);
+-      GenRegister src1 = insn.src(1);
+-      if ((src0.negation && src1.file == GEN_IMMEDIATE_VALUE && src1.value.f == 0.0f) ||
+-          (src1.negation && src0.file == GEN_IMMEDIATE_VALUE && src0.value.f == 0.0f))
+-        addToReplaceInfoMap(insn);
+-    }
+-  }
+-
+   void SelBasicBlockOptimizer::run()
+   {
+     for (size_t i = 0; i < MaxTries; ++i) {