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commit: 9b011d8f5602cd19e7e6be5c6a7cc908f3da0679 |
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Author: Mike Pagano <mpagano <AT> gentoo <DOT> org> |
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AuthorDate: Wed Apr 28 18:31:00 2021 +0000 |
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Commit: Mike Pagano <mpagano <AT> gentoo <DOT> org> |
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CommitDate: Wed Apr 28 18:31:00 2021 +0000 |
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URL: https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=9b011d8f |
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|
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Remove CPU OPT patch for gcc=4.9, long out of the tree |
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|
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Signed-off-by: Mike Pagano <mpagano <AT> gentoo.org> |
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|
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0000_README | 4 - |
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...-additional-cpu-optimizations-for-gcc-4.9.patch | 545 --------------------- |
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2 files changed, 549 deletions(-) |
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|
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diff --git a/0000_README b/0000_README |
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index a3a9c1c..2d7a098 100644 |
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--- a/0000_README |
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+++ b/0000_README |
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@@ -819,10 +819,6 @@ Patch: 4567_distro-Gentoo-Kconfig.patch |
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From: Tom Wijsman <TomWij@g.o> |
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Desc: Add Gentoo Linux support config settings and defaults. |
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|
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-Patch: 5010_enable-additional-cpu-optimizations-for-gcc-4.9.patch |
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-From: https://github.com/graysky2/kernel_gcc_patch/ |
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-Desc: Kernel patch enables gcc >= v4.13 optimizations for additional CPUs. |
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- |
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Patch: 5011_enable-cpu-optimizations-for-gcc8.patch |
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From: https://github.com/graysky2/kernel_gcc_patch/ |
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Desc: Kernel patch for >= gccv8 enables kernel >= v4.13 optimizations for additional CPUs. |
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|
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diff --git a/5010_enable-additional-cpu-optimizations-for-gcc-4.9.patch b/5010_enable-additional-cpu-optimizations-for-gcc-4.9.patch |
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deleted file mode 100644 |
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index a8aa759..0000000 |
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--- a/5010_enable-additional-cpu-optimizations-for-gcc-4.9.patch |
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+++ /dev/null |
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@@ -1,545 +0,0 @@ |
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-WARNING |
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-This patch works with gcc versions 4.9+ and with kernel version 4.13+ and should |
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-NOT be applied when compiling on older versions of gcc due to key name changes |
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-of the march flags introduced with the version 4.9 release of gcc.[1] |
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- |
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-Use the older version of this patch hosted on the same github for older |
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-versions of gcc. |
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- |
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-FEATURES |
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-This patch adds additional CPU options to the Linux kernel accessible under: |
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- Processor type and features ---> |
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- Processor family ---> |
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- |
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-The expanded microarchitectures include: |
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-* AMD Improved K8-family |
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-* AMD K10-family |
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-* AMD Family 10h (Barcelona) |
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-* AMD Family 14h (Bobcat) |
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-* AMD Family 16h (Jaguar) |
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-* AMD Family 15h (Bulldozer) |
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-* AMD Family 15h (Piledriver) |
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-* AMD Family 15h (Steamroller) |
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-* AMD Family 15h (Excavator) |
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-* AMD Family 17h (Zen) |
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-* Intel Silvermont low-power processors |
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-* Intel 1st Gen Core i3/i5/i7 (Nehalem) |
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-* Intel 1.5 Gen Core i3/i5/i7 (Westmere) |
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-* Intel 2nd Gen Core i3/i5/i7 (Sandybridge) |
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-* Intel 3rd Gen Core i3/i5/i7 (Ivybridge) |
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-* Intel 4th Gen Core i3/i5/i7 (Haswell) |
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-* Intel 5th Gen Core i3/i5/i7 (Broadwell) |
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-* Intel 6th Gen Core i3/i5/i7 (Skylake) |
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-* Intel 6th Gen Core i7/i9 (Skylake X) |
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- |
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-It also offers to compile passing the 'native' option which, "selects the CPU |
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-to generate code for at compilation time by determining the processor type of |
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-the compiling machine. Using -march=native enables all instruction subsets |
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-supported by the local machine and will produce code optimized for the local |
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-machine under the constraints of the selected instruction set."[3] |
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- |
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-MINOR NOTES |
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-This patch also changes 'atom' to 'bonnell' in accordance with the gcc v4.9 |
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-changes. Note that upstream is using the deprecated 'match=atom' flags when I |
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-believe it should use the newer 'march=bonnell' flag for atom processors.[2] |
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- |
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-It is not recommended to compile on Atom-CPUs with the 'native' option.[4] The |
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-recommendation is to use the 'atom' option instead. |
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- |
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-BENEFITS |
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-Small but real speed increases are measurable using a make endpoint comparing |
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-a generic kernel to one built with one of the respective microarchs. |
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- |
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-See the following experimental evidence supporting this statement: |
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-https://github.com/graysky2/kernel_gcc_patch |
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- |
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-REQUIREMENTS |
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-linux version >=4.13 |
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-gcc version >=4.9 |
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- |
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-ACKNOWLEDGMENTS |
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-This patch builds on the seminal work by Jeroen.[5] |
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- |
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-REFERENCES |
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-1. https://gcc.gnu.org/gcc-4.9/changes.html |
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-2. https://bugzilla.kernel.org/show_bug.cgi?id=77461 |
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-3. https://gcc.gnu.org/onlinedocs/gcc/x86-Options.html |
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-4. https://github.com/graysky2/kernel_gcc_patch/issues/15 |
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-5. http://www.linuxforge.net/docs/linux/linux-gcc.php |
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- |
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---- a/arch/x86/include/asm/module.h 2018-01-28 16:20:33.000000000 -0500 |
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-+++ b/arch/x86/include/asm/module.h 2018-03-10 06:42:38.688317317 -0500 |
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-@@ -25,6 +25,26 @@ struct mod_arch_specific { |
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- #define MODULE_PROC_FAMILY "586MMX " |
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- #elif defined CONFIG_MCORE2 |
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- #define MODULE_PROC_FAMILY "CORE2 " |
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-+#elif defined CONFIG_MNATIVE |
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-+#define MODULE_PROC_FAMILY "NATIVE " |
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-+#elif defined CONFIG_MNEHALEM |
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-+#define MODULE_PROC_FAMILY "NEHALEM " |
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-+#elif defined CONFIG_MWESTMERE |
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-+#define MODULE_PROC_FAMILY "WESTMERE " |
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-+#elif defined CONFIG_MSILVERMONT |
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-+#define MODULE_PROC_FAMILY "SILVERMONT " |
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-+#elif defined CONFIG_MSANDYBRIDGE |
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-+#define MODULE_PROC_FAMILY "SANDYBRIDGE " |
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-+#elif defined CONFIG_MIVYBRIDGE |
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-+#define MODULE_PROC_FAMILY "IVYBRIDGE " |
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-+#elif defined CONFIG_MHASWELL |
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-+#define MODULE_PROC_FAMILY "HASWELL " |
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-+#elif defined CONFIG_MBROADWELL |
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-+#define MODULE_PROC_FAMILY "BROADWELL " |
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-+#elif defined CONFIG_MSKYLAKE |
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-+#define MODULE_PROC_FAMILY "SKYLAKE " |
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-+#elif defined CONFIG_MSKYLAKEX |
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-+#define MODULE_PROC_FAMILY "SKYLAKEX " |
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- #elif defined CONFIG_MATOM |
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- #define MODULE_PROC_FAMILY "ATOM " |
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- #elif defined CONFIG_M686 |
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-@@ -43,6 +63,26 @@ struct mod_arch_specific { |
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- #define MODULE_PROC_FAMILY "K7 " |
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- #elif defined CONFIG_MK8 |
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- #define MODULE_PROC_FAMILY "K8 " |
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-+#elif defined CONFIG_MK8SSE3 |
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-+#define MODULE_PROC_FAMILY "K8SSE3 " |
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-+#elif defined CONFIG_MK10 |
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-+#define MODULE_PROC_FAMILY "K10 " |
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-+#elif defined CONFIG_MBARCELONA |
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-+#define MODULE_PROC_FAMILY "BARCELONA " |
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-+#elif defined CONFIG_MBOBCAT |
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-+#define MODULE_PROC_FAMILY "BOBCAT " |
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-+#elif defined CONFIG_MBULLDOZER |
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-+#define MODULE_PROC_FAMILY "BULLDOZER " |
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-+#elif defined CONFIG_MPILEDRIVER |
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-+#define MODULE_PROC_FAMILY "PILEDRIVER " |
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-+#elif defined CONFIG_MSTEAMROLLER |
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-+#define MODULE_PROC_FAMILY "STEAMROLLER " |
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-+#elif defined CONFIG_MJAGUAR |
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-+#define MODULE_PROC_FAMILY "JAGUAR " |
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-+#elif defined CONFIG_MEXCAVATOR |
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-+#define MODULE_PROC_FAMILY "EXCAVATOR " |
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-+#elif defined CONFIG_MZEN |
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-+#define MODULE_PROC_FAMILY "ZEN " |
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- #elif defined CONFIG_MELAN |
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- #define MODULE_PROC_FAMILY "ELAN " |
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- #elif defined CONFIG_MCRUSOE |
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---- a/arch/x86/Kconfig.cpu 2018-01-28 16:20:33.000000000 -0500 |
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-+++ b/arch/x86/Kconfig.cpu 2018-03-10 06:45:50.244371799 -0500 |
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-@@ -116,6 +116,7 @@ config MPENTIUMM |
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- config MPENTIUM4 |
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- bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon" |
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- depends on X86_32 |
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-+ select X86_P6_NOP |
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- ---help--- |
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- Select this for Intel Pentium 4 chips. This includes the |
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- Pentium 4, Pentium D, P4-based Celeron and Xeon, and |
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-@@ -148,9 +149,8 @@ config MPENTIUM4 |
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- -Paxville |
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- -Dempsey |
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- |
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-- |
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- config MK6 |
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-- bool "K6/K6-II/K6-III" |
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-+ bool "AMD K6/K6-II/K6-III" |
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- depends on X86_32 |
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- ---help--- |
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- Select this for an AMD K6-family processor. Enables use of |
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-@@ -158,7 +158,7 @@ config MK6 |
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- flags to GCC. |
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- |
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- config MK7 |
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-- bool "Athlon/Duron/K7" |
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-+ bool "AMD Athlon/Duron/K7" |
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- depends on X86_32 |
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- ---help--- |
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- Select this for an AMD Athlon K7-family processor. Enables use of |
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-@@ -166,12 +166,83 @@ config MK7 |
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- flags to GCC. |
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- |
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- config MK8 |
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-- bool "Opteron/Athlon64/Hammer/K8" |
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-+ bool "AMD Opteron/Athlon64/Hammer/K8" |
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- ---help--- |
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- Select this for an AMD Opteron or Athlon64 Hammer-family processor. |
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- Enables use of some extended instructions, and passes appropriate |
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- optimization flags to GCC. |
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- |
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-+config MK8SSE3 |
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-+ bool "AMD Opteron/Athlon64/Hammer/K8 with SSE3" |
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-+ ---help--- |
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-+ Select this for improved AMD Opteron or Athlon64 Hammer-family processors. |
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-+ Enables use of some extended instructions, and passes appropriate |
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-+ optimization flags to GCC. |
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-+ |
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-+config MK10 |
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-+ bool "AMD 61xx/7x50/PhenomX3/X4/II/K10" |
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-+ ---help--- |
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-+ Select this for an AMD 61xx Eight-Core Magny-Cours, Athlon X2 7x50, |
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-+ Phenom X3/X4/II, Athlon II X2/X3/X4, or Turion II-family processor. |
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-+ Enables use of some extended instructions, and passes appropriate |
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-+ optimization flags to GCC. |
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-+ |
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-+config MBARCELONA |
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-+ bool "AMD Barcelona" |
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-+ ---help--- |
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-+ Select this for AMD Family 10h Barcelona processors. |
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-+ |
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-+ Enables -march=barcelona |
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-+ |
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-+config MBOBCAT |
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-+ bool "AMD Bobcat" |
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-+ ---help--- |
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-+ Select this for AMD Family 14h Bobcat processors. |
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-+ |
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-+ Enables -march=btver1 |
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-+ |
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-+config MJAGUAR |
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-+ bool "AMD Jaguar" |
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-+ ---help--- |
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-+ Select this for AMD Family 16h Jaguar processors. |
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-+ |
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-+ Enables -march=btver2 |
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-+ |
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-+config MBULLDOZER |
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-+ bool "AMD Bulldozer" |
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-+ ---help--- |
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-+ Select this for AMD Family 15h Bulldozer processors. |
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-+ |
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-+ Enables -march=bdver1 |
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-+ |
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-+config MPILEDRIVER |
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-+ bool "AMD Piledriver" |
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-+ ---help--- |
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-+ Select this for AMD Family 15h Piledriver processors. |
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-+ |
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-+ Enables -march=bdver2 |
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-+ |
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-+config MSTEAMROLLER |
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-+ bool "AMD Steamroller" |
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-+ ---help--- |
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-+ Select this for AMD Family 15h Steamroller processors. |
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-+ |
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-+ Enables -march=bdver3 |
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-+ |
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-+config MEXCAVATOR |
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-+ bool "AMD Excavator" |
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-+ ---help--- |
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-+ Select this for AMD Family 15h Excavator processors. |
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-+ |
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-+ Enables -march=bdver4 |
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-+ |
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-+config MZEN |
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-+ bool "AMD Zen" |
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-+ ---help--- |
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-+ Select this for AMD Family 17h Zen processors. |
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-+ |
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-+ Enables -march=znver1 |
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-+ |
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- config MCRUSOE |
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- bool "Crusoe" |
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- depends on X86_32 |
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-@@ -253,6 +324,7 @@ config MVIAC7 |
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- |
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- config MPSC |
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- bool "Intel P4 / older Netburst based Xeon" |
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-+ select X86_P6_NOP |
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- depends on X86_64 |
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- ---help--- |
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- Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey |
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-@@ -262,8 +334,19 @@ config MPSC |
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- using the cpu family field |
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- in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one. |
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- |
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-+config MATOM |
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-+ bool "Intel Atom" |
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-+ select X86_P6_NOP |
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-+ ---help--- |
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-+ |
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-+ Select this for the Intel Atom platform. Intel Atom CPUs have an |
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-+ in-order pipelining architecture and thus can benefit from |
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-+ accordingly optimized code. Use a recent GCC with specific Atom |
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-+ support in order to fully benefit from selecting this option. |
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-+ |
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- config MCORE2 |
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-- bool "Core 2/newer Xeon" |
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-+ bool "Intel Core 2" |
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-+ select X86_P6_NOP |
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- ---help--- |
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- |
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- Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and |
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-@@ -271,14 +354,88 @@ config MCORE2 |
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- family in /proc/cpuinfo. Newer ones have 6 and older ones 15 |
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- (not a typo) |
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- |
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--config MATOM |
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-- bool "Intel Atom" |
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-+ Enables -march=core2 |
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-+ |
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-+config MNEHALEM |
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-+ bool "Intel Nehalem" |
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-+ select X86_P6_NOP |
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- ---help--- |
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- |
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-- Select this for the Intel Atom platform. Intel Atom CPUs have an |
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-- in-order pipelining architecture and thus can benefit from |
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-- accordingly optimized code. Use a recent GCC with specific Atom |
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-- support in order to fully benefit from selecting this option. |
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-+ Select this for 1st Gen Core processors in the Nehalem family. |
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-+ |
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-+ Enables -march=nehalem |
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-+ |
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-+config MWESTMERE |
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-+ bool "Intel Westmere" |
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-+ select X86_P6_NOP |
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-+ ---help--- |
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-+ |
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-+ Select this for the Intel Westmere formerly Nehalem-C family. |
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-+ |
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-+ Enables -march=westmere |
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-+ |
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-+config MSILVERMONT |
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-+ bool "Intel Silvermont" |
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-+ select X86_P6_NOP |
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-+ ---help--- |
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-+ |
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-+ Select this for the Intel Silvermont platform. |
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-+ |
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-+ Enables -march=silvermont |
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-+ |
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-+config MSANDYBRIDGE |
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-+ bool "Intel Sandy Bridge" |
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-+ select X86_P6_NOP |
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-+ ---help--- |
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-+ |
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-+ Select this for 2nd Gen Core processors in the Sandy Bridge family. |
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-+ |
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-+ Enables -march=sandybridge |
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-+ |
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-+config MIVYBRIDGE |
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-+ bool "Intel Ivy Bridge" |
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-+ select X86_P6_NOP |
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-+ ---help--- |
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-+ |
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-+ Select this for 3rd Gen Core processors in the Ivy Bridge family. |
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-+ |
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-+ Enables -march=ivybridge |
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-+ |
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-+config MHASWELL |
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-+ bool "Intel Haswell" |
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-+ select X86_P6_NOP |
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-+ ---help--- |
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-+ |
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-+ Select this for 4th Gen Core processors in the Haswell family. |
370 |
-+ |
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-+ Enables -march=haswell |
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-+ |
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-+config MBROADWELL |
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-+ bool "Intel Broadwell" |
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-+ select X86_P6_NOP |
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-+ ---help--- |
377 |
-+ |
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-+ Select this for 5th Gen Core processors in the Broadwell family. |
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-+ |
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-+ Enables -march=broadwell |
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-+ |
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-+config MSKYLAKE |
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-+ bool "Intel Skylake" |
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-+ select X86_P6_NOP |
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-+ ---help--- |
386 |
-+ |
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-+ Select this for 6th Gen Core processors in the Skylake family. |
388 |
-+ |
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-+ Enables -march=skylake |
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-+ |
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-+config MSKYLAKEX |
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-+ bool "Intel Skylake X" |
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-+ select X86_P6_NOP |
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-+ ---help--- |
395 |
-+ |
396 |
-+ Select this for 6th Gen Core processors in the Skylake X family. |
397 |
-+ |
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-+ Enables -march=skylake-avx512 |
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- |
400 |
- config GENERIC_CPU |
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- bool "Generic-x86-64" |
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-@@ -287,6 +444,19 @@ config GENERIC_CPU |
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- Generic x86-64 CPU. |
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- Run equally well on all x86-64 CPUs. |
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- |
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-+config MNATIVE |
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-+ bool "Native optimizations autodetected by GCC" |
408 |
-+ ---help--- |
409 |
-+ |
410 |
-+ GCC 4.2 and above support -march=native, which automatically detects |
411 |
-+ the optimum settings to use based on your processor. -march=native |
412 |
-+ also detects and applies additional settings beyond -march specific |
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-+ to your CPU, (eg. -msse4). Unless you have a specific reason not to |
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-+ (e.g. distcc cross-compiling), you should probably be using |
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-+ -march=native rather than anything listed below. |
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-+ |
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-+ Enables -march=native |
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-+ |
419 |
- endchoice |
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- |
421 |
- config X86_GENERIC |
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-@@ -311,7 +481,7 @@ config X86_INTERNODE_CACHE_SHIFT |
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- config X86_L1_CACHE_SHIFT |
424 |
- int |
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- default "7" if MPENTIUM4 || MPSC |
426 |
-- default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU |
427 |
-+ default "6" if MK7 || MK8 || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MJAGUAR || MPENTIUMM || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MNATIVE || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU |
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- default "4" if MELAN || M486 || MGEODEGX1 |
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- default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX |
430 |
- |
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-@@ -342,35 +512,36 @@ config X86_ALIGNMENT_16 |
432 |
- |
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- config X86_INTEL_USERCOPY |
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- def_bool y |
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-- depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2 |
436 |
-+ depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK8SSE3 || MK7 || MEFFICEON || MCORE2 || MK10 || MBARCELONA || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MNATIVE |
437 |
- |
438 |
- config X86_USE_PPRO_CHECKSUM |
439 |
- def_bool y |
440 |
-- depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM |
441 |
-+ depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MK10 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MK8SSE3 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MATOM || MNATIVE |
442 |
- |
443 |
- config X86_USE_3DNOW |
444 |
- def_bool y |
445 |
- depends on (MCYRIXIII || MK7 || MGEODE_LX) && !UML |
446 |
- |
447 |
--# |
448 |
--# P6_NOPs are a relatively minor optimization that require a family >= |
449 |
--# 6 processor, except that it is broken on certain VIA chips. |
450 |
--# Furthermore, AMD chips prefer a totally different sequence of NOPs |
451 |
--# (which work on all CPUs). In addition, it looks like Virtual PC |
452 |
--# does not understand them. |
453 |
--# |
454 |
--# As a result, disallow these if we're not compiling for X86_64 (these |
455 |
--# NOPs do work on all x86-64 capable chips); the list of processors in |
456 |
--# the right-hand clause are the cores that benefit from this optimization. |
457 |
--# |
458 |
- config X86_P6_NOP |
459 |
-- def_bool y |
460 |
-- depends on X86_64 |
461 |
-- depends on (MCORE2 || MPENTIUM4 || MPSC) |
462 |
-+ default n |
463 |
-+ bool "Support for P6_NOPs on Intel chips" |
464 |
-+ depends on (MCORE2 || MPENTIUM4 || MPSC || MATOM || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MNATIVE) |
465 |
-+ ---help--- |
466 |
-+ P6_NOPs are a relatively minor optimization that require a family >= |
467 |
-+ 6 processor, except that it is broken on certain VIA chips. |
468 |
-+ Furthermore, AMD chips prefer a totally different sequence of NOPs |
469 |
-+ (which work on all CPUs). In addition, it looks like Virtual PC |
470 |
-+ does not understand them. |
471 |
-+ |
472 |
-+ As a result, disallow these if we're not compiling for X86_64 (these |
473 |
-+ NOPs do work on all x86-64 capable chips); the list of processors in |
474 |
-+ the right-hand clause are the cores that benefit from this optimization. |
475 |
-+ |
476 |
-+ Say Y if you have Intel CPU newer than Pentium Pro, N otherwise. |
477 |
- |
478 |
- config X86_TSC |
479 |
- def_bool y |
480 |
-- depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MATOM) || X86_64 |
481 |
-+ depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MK8SSE3 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MNATIVE || MATOM) || X86_64 |
482 |
- |
483 |
- config X86_CMPXCHG64 |
484 |
- def_bool y |
485 |
-@@ -380,7 +551,7 @@ config X86_CMPXCHG64 |
486 |
- # generates cmov. |
487 |
- config X86_CMOV |
488 |
- def_bool y |
489 |
-- depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM || MGEODE_LX) |
490 |
-+ depends on (MK8 || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MJAGUAR || MK7 || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MNATIVE || MATOM || MGEODE_LX) |
491 |
- |
492 |
- config X86_MINIMUM_CPU_FAMILY |
493 |
- int |
494 |
---- a/arch/x86/Makefile 2018-01-28 16:20:33.000000000 -0500 |
495 |
-+++ b/arch/x86/Makefile 2018-03-10 06:47:00.284240139 -0500 |
496 |
-@@ -124,13 +124,42 @@ else |
497 |
- KBUILD_CFLAGS += $(call cc-option,-mskip-rax-setup) |
498 |
- |
499 |
- # FIXME - should be integrated in Makefile.cpu (Makefile_32.cpu) |
500 |
-+ cflags-$(CONFIG_MNATIVE) += $(call cc-option,-march=native) |
501 |
- cflags-$(CONFIG_MK8) += $(call cc-option,-march=k8) |
502 |
-+ cflags-$(CONFIG_MK8SSE3) += $(call cc-option,-march=k8-sse3,-mtune=k8) |
503 |
-+ cflags-$(CONFIG_MK10) += $(call cc-option,-march=amdfam10) |
504 |
-+ cflags-$(CONFIG_MBARCELONA) += $(call cc-option,-march=barcelona) |
505 |
-+ cflags-$(CONFIG_MBOBCAT) += $(call cc-option,-march=btver1) |
506 |
-+ cflags-$(CONFIG_MJAGUAR) += $(call cc-option,-march=btver2) |
507 |
-+ cflags-$(CONFIG_MBULLDOZER) += $(call cc-option,-march=bdver1) |
508 |
-+ cflags-$(CONFIG_MPILEDRIVER) += $(call cc-option,-march=bdver2) |
509 |
-+ cflags-$(CONFIG_MSTEAMROLLER) += $(call cc-option,-march=bdver3) |
510 |
-+ cflags-$(CONFIG_MEXCAVATOR) += $(call cc-option,-march=bdver4) |
511 |
-+ cflags-$(CONFIG_MZEN) += $(call cc-option,-march=znver1) |
512 |
- cflags-$(CONFIG_MPSC) += $(call cc-option,-march=nocona) |
513 |
- |
514 |
- cflags-$(CONFIG_MCORE2) += \ |
515 |
-- $(call cc-option,-march=core2,$(call cc-option,-mtune=generic)) |
516 |
-- cflags-$(CONFIG_MATOM) += $(call cc-option,-march=atom) \ |
517 |
-- $(call cc-option,-mtune=atom,$(call cc-option,-mtune=generic)) |
518 |
-+ $(call cc-option,-march=core2,$(call cc-option,-mtune=core2)) |
519 |
-+ cflags-$(CONFIG_MNEHALEM) += \ |
520 |
-+ $(call cc-option,-march=nehalem,$(call cc-option,-mtune=nehalem)) |
521 |
-+ cflags-$(CONFIG_MWESTMERE) += \ |
522 |
-+ $(call cc-option,-march=westmere,$(call cc-option,-mtune=westmere)) |
523 |
-+ cflags-$(CONFIG_MSILVERMONT) += \ |
524 |
-+ $(call cc-option,-march=silvermont,$(call cc-option,-mtune=silvermont)) |
525 |
-+ cflags-$(CONFIG_MSANDYBRIDGE) += \ |
526 |
-+ $(call cc-option,-march=sandybridge,$(call cc-option,-mtune=sandybridge)) |
527 |
-+ cflags-$(CONFIG_MIVYBRIDGE) += \ |
528 |
-+ $(call cc-option,-march=ivybridge,$(call cc-option,-mtune=ivybridge)) |
529 |
-+ cflags-$(CONFIG_MHASWELL) += \ |
530 |
-+ $(call cc-option,-march=haswell,$(call cc-option,-mtune=haswell)) |
531 |
-+ cflags-$(CONFIG_MBROADWELL) += \ |
532 |
-+ $(call cc-option,-march=broadwell,$(call cc-option,-mtune=broadwell)) |
533 |
-+ cflags-$(CONFIG_MSKYLAKE) += \ |
534 |
-+ $(call cc-option,-march=skylake,$(call cc-option,-mtune=skylake)) |
535 |
-+ cflags-$(CONFIG_MSKYLAKEX) += \ |
536 |
-+ $(call cc-option,-march=skylake-avx512,$(call cc-option,-mtune=skylake-avx512)) |
537 |
-+ cflags-$(CONFIG_MATOM) += $(call cc-option,-march=bonnell) \ |
538 |
-+ $(call cc-option,-mtune=bonnell,$(call cc-option,-mtune=generic)) |
539 |
- cflags-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=generic) |
540 |
- KBUILD_CFLAGS += $(cflags-y) |
541 |
- |
542 |
---- a/arch/x86/Makefile_32.cpu 2018-01-28 16:20:33.000000000 -0500 |
543 |
-+++ b/arch/x86/Makefile_32.cpu 2018-03-10 06:47:46.025992644 -0500 |
544 |
-@@ -23,7 +23,18 @@ cflags-$(CONFIG_MK6) += -march=k6 |
545 |
- # Please note, that patches that add -march=athlon-xp and friends are pointless. |
546 |
- # They make zero difference whatsosever to performance at this time. |
547 |
- cflags-$(CONFIG_MK7) += -march=athlon |
548 |
-+cflags-$(CONFIG_MNATIVE) += $(call cc-option,-march=native) |
549 |
- cflags-$(CONFIG_MK8) += $(call cc-option,-march=k8,-march=athlon) |
550 |
-+cflags-$(CONFIG_MK8SSE3) += $(call cc-option,-march=k8-sse3,-march=athlon) |
551 |
-+cflags-$(CONFIG_MK10) += $(call cc-option,-march=amdfam10,-march=athlon) |
552 |
-+cflags-$(CONFIG_MBARCELONA) += $(call cc-option,-march=barcelona,-march=athlon) |
553 |
-+cflags-$(CONFIG_MBOBCAT) += $(call cc-option,-march=btver1,-march=athlon) |
554 |
-+cflags-$(CONFIG_MJAGUAR) += $(call cc-option,-march=btver2,-march=athlon) |
555 |
-+cflags-$(CONFIG_MBULLDOZER) += $(call cc-option,-march=bdver1,-march=athlon) |
556 |
-+cflags-$(CONFIG_MPILEDRIVER) += $(call cc-option,-march=bdver2,-march=athlon) |
557 |
-+cflags-$(CONFIG_MSTEAMROLLER) += $(call cc-option,-march=bdver3,-march=athlon) |
558 |
-+cflags-$(CONFIG_MEXCAVATOR) += $(call cc-option,-march=bdver4,-march=athlon) |
559 |
-+cflags-$(CONFIG_MZEN) += $(call cc-option,-march=znver1,-march=athlon) |
560 |
- cflags-$(CONFIG_MCRUSOE) += -march=i686 -falign-functions=0 -falign-jumps=0 -falign-loops=0 |
561 |
- cflags-$(CONFIG_MEFFICEON) += -march=i686 $(call tune,pentium3) -falign-functions=0 -falign-jumps=0 -falign-loops=0 |
562 |
- cflags-$(CONFIG_MWINCHIPC6) += $(call cc-option,-march=winchip-c6,-march=i586) |
563 |
-@@ -32,8 +43,17 @@ cflags-$(CONFIG_MCYRIXIII) += $(call cc- |
564 |
- cflags-$(CONFIG_MVIAC3_2) += $(call cc-option,-march=c3-2,-march=i686) |
565 |
- cflags-$(CONFIG_MVIAC7) += -march=i686 |
566 |
- cflags-$(CONFIG_MCORE2) += -march=i686 $(call tune,core2) |
567 |
--cflags-$(CONFIG_MATOM) += $(call cc-option,-march=atom,$(call cc-option,-march=core2,-march=i686)) \ |
568 |
-- $(call cc-option,-mtune=atom,$(call cc-option,-mtune=generic)) |
569 |
-+cflags-$(CONFIG_MNEHALEM) += -march=i686 $(call tune,nehalem) |
570 |
-+cflags-$(CONFIG_MWESTMERE) += -march=i686 $(call tune,westmere) |
571 |
-+cflags-$(CONFIG_MSILVERMONT) += -march=i686 $(call tune,silvermont) |
572 |
-+cflags-$(CONFIG_MSANDYBRIDGE) += -march=i686 $(call tune,sandybridge) |
573 |
-+cflags-$(CONFIG_MIVYBRIDGE) += -march=i686 $(call tune,ivybridge) |
574 |
-+cflags-$(CONFIG_MHASWELL) += -march=i686 $(call tune,haswell) |
575 |
-+cflags-$(CONFIG_MBROADWELL) += -march=i686 $(call tune,broadwell) |
576 |
-+cflags-$(CONFIG_MSKYLAKE) += -march=i686 $(call tune,skylake) |
577 |
-+cflags-$(CONFIG_MSKYLAKEX) += -march=i686 $(call tune,skylake-avx512) |
578 |
-+cflags-$(CONFIG_MATOM) += $(call cc-option,-march=bonnell,$(call cc-option,-march=core2,-march=i686)) \ |
579 |
-+ $(call cc-option,-mtune=bonnell,$(call cc-option,-mtune=generic)) |
580 |
- |
581 |
- # AMD Elan support |
582 |
- cflags-$(CONFIG_MELAN) += -march=i486 |