[gentoo-commits] proj/linux-patches:5.14 commit in: /

[Mike Pagano]

commit:     225c81bb151672296321343fb081bac386ff4dee
Author:     Mike Pagano <mpagano <AT> gentoo <DOT> org>
AuthorDate: Sun Sep 26 14:11:30 2021 +0000
Commit:     Mike Pagano <mpagano <AT> gentoo <DOT> org>
CommitDate: Sun Sep 26 14:11:30 2021 +0000
URL:        https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=225c81bb

Linux patch 5.14.8

Signed-off-by: Mike Pagano <mpagano <AT> gentoo.org>

 0000_README             |    4 +
 1007_linux-5.14.8.patch | 6040 +++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 6044 insertions(+)

diff --git a/0000_README b/0000_README
index 0c8fa67..dcc9f9a 100644
--- a/0000_README
+++ b/0000_README
@@ -75,6 +75,10 @@ Patch:  1006_linux-5.14.7.patch
 From:   http://www.kernel.org
 Desc:   Linux 5.14.7
 
+Patch:  1007_linux-5.14.8.patch
+From:   http://www.kernel.org
+Desc:   Linux 5.14.8
+
 Patch:  1500_XATTR_USER_PREFIX.patch
 From:   https://bugs.gentoo.org/show_bug.cgi?id=470644
 Desc:   Support for namespace user.pax.* on tmpfs.

diff --git a/1007_linux-5.14.8.patch b/1007_linux-5.14.8.patch
new file mode 100644
index 0000000..15b9ec2
--- /dev/null
+++ b/1007_linux-5.14.8.patch
@@ -0,0 +1,6040 @@
+diff --git a/Documentation/driver-api/cxl/memory-devices.rst b/Documentation/driver-api/cxl/memory-devices.rst
+index 487ce4f41d770..a86e2c7c551ab 100644
+--- a/Documentation/driver-api/cxl/memory-devices.rst
++++ b/Documentation/driver-api/cxl/memory-devices.rst
+@@ -36,7 +36,7 @@ CXL Core
+ .. kernel-doc:: drivers/cxl/cxl.h
+    :internal:
+ 
+-.. kernel-doc:: drivers/cxl/core.c
++.. kernel-doc:: drivers/cxl/core/bus.c
+    :doc: cxl core
+ 
+ External Interfaces
+diff --git a/Makefile b/Makefile
+index efb603f06e711..d6b4737194b88 100644
+--- a/Makefile
++++ b/Makefile
+@@ -1,7 +1,7 @@
+ # SPDX-License-Identifier: GPL-2.0
+ VERSION = 5
+ PATCHLEVEL = 14
+-SUBLEVEL = 7
++SUBLEVEL = 8
+ EXTRAVERSION =
+ NAME = Opossums on Parade
+ 
+diff --git a/arch/arm64/kernel/cacheinfo.c b/arch/arm64/kernel/cacheinfo.c
+index 7fa6828bb488a..587543c6c51cb 100644
+--- a/arch/arm64/kernel/cacheinfo.c
++++ b/arch/arm64/kernel/cacheinfo.c
+@@ -43,7 +43,7 @@ static void ci_leaf_init(struct cacheinfo *this_leaf,
+ 	this_leaf->type = type;
+ }
+ 
+-static int __init_cache_level(unsigned int cpu)
++int init_cache_level(unsigned int cpu)
+ {
+ 	unsigned int ctype, level, leaves, fw_level;
+ 	struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
+@@ -78,7 +78,7 @@ static int __init_cache_level(unsigned int cpu)
+ 	return 0;
+ }
+ 
+-static int __populate_cache_leaves(unsigned int cpu)
++int populate_cache_leaves(unsigned int cpu)
+ {
+ 	unsigned int level, idx;
+ 	enum cache_type type;
+@@ -97,6 +97,3 @@ static int __populate_cache_leaves(unsigned int cpu)
+ 	}
+ 	return 0;
+ }
+-
+-DEFINE_SMP_CALL_CACHE_FUNCTION(init_cache_level)
+-DEFINE_SMP_CALL_CACHE_FUNCTION(populate_cache_leaves)
+diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
+index 1fdb7bb7c1984..0ad4afc9359b5 100644
+--- a/arch/arm64/mm/init.c
++++ b/arch/arm64/mm/init.c
+@@ -319,7 +319,21 @@ static void __init fdt_enforce_memory_region(void)
+ 
+ void __init arm64_memblock_init(void)
+ {
+-	const s64 linear_region_size = PAGE_END - _PAGE_OFFSET(vabits_actual);
++	s64 linear_region_size = PAGE_END - _PAGE_OFFSET(vabits_actual);
++
++	/*
++	 * Corner case: 52-bit VA capable systems running KVM in nVHE mode may
++	 * be limited in their ability to support a linear map that exceeds 51
++	 * bits of VA space, depending on the placement of the ID map. Given
++	 * that the placement of the ID map may be randomized, let's simply
++	 * limit the kernel's linear map to 51 bits as well if we detect this
++	 * configuration.
++	 */
++	if (IS_ENABLED(CONFIG_KVM) && vabits_actual == 52 &&
++	    is_hyp_mode_available() && !is_kernel_in_hyp_mode()) {
++		pr_info("Capping linear region to 51 bits for KVM in nVHE mode on LVA capable hardware.\n");
++		linear_region_size = min_t(u64, linear_region_size, BIT(51));
++	}
+ 
+ 	/* Handle linux,usable-memory-range property */
+ 	fdt_enforce_memory_region();
+diff --git a/arch/mips/kernel/cacheinfo.c b/arch/mips/kernel/cacheinfo.c
+index 53d8ea7d36e6d..495dd058231d9 100644
+--- a/arch/mips/kernel/cacheinfo.c
++++ b/arch/mips/kernel/cacheinfo.c
+@@ -17,7 +17,7 @@ do {								\
+ 	leaf++;							\
+ } while (0)
+ 
+-static int __init_cache_level(unsigned int cpu)
++int init_cache_level(unsigned int cpu)
+ {
+ 	struct cpuinfo_mips *c = &current_cpu_data;
+ 	struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
+@@ -74,7 +74,7 @@ static void fill_cpumask_cluster(int cpu, cpumask_t *cpu_map)
+ 			cpumask_set_cpu(cpu1, cpu_map);
+ }
+ 
+-static int __populate_cache_leaves(unsigned int cpu)
++int populate_cache_leaves(unsigned int cpu)
+ {
+ 	struct cpuinfo_mips *c = &current_cpu_data;
+ 	struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
+@@ -114,6 +114,3 @@ static int __populate_cache_leaves(unsigned int cpu)
+ 
+ 	return 0;
+ }
+-
+-DEFINE_SMP_CALL_CACHE_FUNCTION(init_cache_level)
+-DEFINE_SMP_CALL_CACHE_FUNCTION(populate_cache_leaves)
+diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts
+index baea7d204639a..b254c60589a1c 100644
+--- a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts
++++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts
+@@ -16,10 +16,14 @@
+ 
+ 	aliases {
+ 		ethernet0 = &emac1;
++		serial0 = &serial0;
++		serial1 = &serial1;
++		serial2 = &serial2;
++		serial3 = &serial3;
+ 	};
+ 
+ 	chosen {
+-		stdout-path = &serial0;
++		stdout-path = "serial0:115200n8";
+ 	};
+ 
+ 	cpus {
+diff --git a/arch/riscv/kernel/cacheinfo.c b/arch/riscv/kernel/cacheinfo.c
+index d867813570442..90deabfe63eaa 100644
+--- a/arch/riscv/kernel/cacheinfo.c
++++ b/arch/riscv/kernel/cacheinfo.c
+@@ -113,7 +113,7 @@ static void fill_cacheinfo(struct cacheinfo **this_leaf,
+ 	}
+ }
+ 
+-static int __init_cache_level(unsigned int cpu)
++int init_cache_level(unsigned int cpu)
+ {
+ 	struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
+ 	struct device_node *np = of_cpu_device_node_get(cpu);
+@@ -155,7 +155,7 @@ static int __init_cache_level(unsigned int cpu)
+ 	return 0;
+ }
+ 
+-static int __populate_cache_leaves(unsigned int cpu)
++int populate_cache_leaves(unsigned int cpu)
+ {
+ 	struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
+ 	struct cacheinfo *this_leaf = this_cpu_ci->info_list;
+@@ -187,6 +187,3 @@ static int __populate_cache_leaves(unsigned int cpu)
+ 
+ 	return 0;
+ }
+-
+-DEFINE_SMP_CALL_CACHE_FUNCTION(init_cache_level)
+-DEFINE_SMP_CALL_CACHE_FUNCTION(populate_cache_leaves)
+diff --git a/arch/s390/include/asm/stacktrace.h b/arch/s390/include/asm/stacktrace.h
+index 3d8a4b94c620b..dd00d98804ec2 100644
+--- a/arch/s390/include/asm/stacktrace.h
++++ b/arch/s390/include/asm/stacktrace.h
+@@ -34,16 +34,6 @@ static inline bool on_stack(struct stack_info *info,
+ 	return addr >= info->begin && addr + len <= info->end;
+ }
+ 
+-static __always_inline unsigned long get_stack_pointer(struct task_struct *task,
+-						       struct pt_regs *regs)
+-{
+-	if (regs)
+-		return (unsigned long) kernel_stack_pointer(regs);
+-	if (task == current)
+-		return current_stack_pointer();
+-	return (unsigned long) task->thread.ksp;
+-}
+-
+ /*
+  * Stack layout of a C stack frame.
+  */
+@@ -74,6 +64,16 @@ struct stack_frame {
+ 	((unsigned long)__builtin_frame_address(0) -			\
+ 	 offsetof(struct stack_frame, back_chain))
+ 
++static __always_inline unsigned long get_stack_pointer(struct task_struct *task,
++						       struct pt_regs *regs)
++{
++	if (regs)
++		return (unsigned long)kernel_stack_pointer(regs);
++	if (task == current)
++		return current_frame_address();
++	return (unsigned long)task->thread.ksp;
++}
++
+ /*
+  * To keep this simple mark register 2-6 as being changed (volatile)
+  * by the called function, even though register 6 is saved/nonvolatile.
+diff --git a/arch/s390/include/asm/unwind.h b/arch/s390/include/asm/unwind.h
+index de9006b0cfebb..5ebf534ef7533 100644
+--- a/arch/s390/include/asm/unwind.h
++++ b/arch/s390/include/asm/unwind.h
+@@ -55,10 +55,10 @@ static inline bool unwind_error(struct unwind_state *state)
+ 	return state->error;
+ }
+ 
+-static inline void unwind_start(struct unwind_state *state,
+-				struct task_struct *task,
+-				struct pt_regs *regs,
+-				unsigned long first_frame)
++static __always_inline void unwind_start(struct unwind_state *state,
++					 struct task_struct *task,
++					 struct pt_regs *regs,
++					 unsigned long first_frame)
+ {
+ 	task = task ?: current;
+ 	first_frame = first_frame ?: get_stack_pointer(task, regs);
+diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S
+index b9716a7e326d0..4c9b967290ae0 100644
+--- a/arch/s390/kernel/entry.S
++++ b/arch/s390/kernel/entry.S
+@@ -140,10 +140,10 @@ _LPP_OFFSET	= __LC_LPP
+ 	TSTMSK	__LC_MCCK_CODE,(MCCK_CODE_STG_ERROR|MCCK_CODE_STG_KEY_ERROR)
+ 	jnz	\errlabel
+ 	TSTMSK	__LC_MCCK_CODE,MCCK_CODE_STG_DEGRAD
+-	jz	oklabel\@
++	jz	.Loklabel\@
+ 	TSTMSK	__LC_MCCK_CODE,MCCK_CODE_STG_FAIL_ADDR
+ 	jnz	\errlabel
+-oklabel\@:
++.Loklabel\@:
+ 	.endm
+ 
+ #if IS_ENABLED(CONFIG_KVM)
+diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
+index ee23908f1b960..6f0d2d4dea74a 100644
+--- a/arch/s390/kernel/setup.c
++++ b/arch/s390/kernel/setup.c
+@@ -50,6 +50,7 @@
+ #include <linux/compat.h>
+ #include <linux/start_kernel.h>
+ #include <linux/hugetlb.h>
++#include <linux/kmemleak.h>
+ 
+ #include <asm/boot_data.h>
+ #include <asm/ipl.h>
+@@ -312,9 +313,12 @@ void *restart_stack;
+ unsigned long stack_alloc(void)
+ {
+ #ifdef CONFIG_VMAP_STACK
+-	return (unsigned long)__vmalloc_node(THREAD_SIZE, THREAD_SIZE,
+-			THREADINFO_GFP, NUMA_NO_NODE,
+-			__builtin_return_address(0));
++	void *ret;
++
++	ret = __vmalloc_node(THREAD_SIZE, THREAD_SIZE, THREADINFO_GFP,
++			     NUMA_NO_NODE, __builtin_return_address(0));
++	kmemleak_not_leak(ret);
++	return (unsigned long)ret;
+ #else
+ 	return __get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER);
+ #endif
+diff --git a/arch/um/drivers/virtio_uml.c b/arch/um/drivers/virtio_uml.c
+index 4412d6febadef..6bf7bd4479aee 100644
+--- a/arch/um/drivers/virtio_uml.c
++++ b/arch/um/drivers/virtio_uml.c
+@@ -1139,7 +1139,7 @@ static int virtio_uml_probe(struct platform_device *pdev)
+ 		rc = os_connect_socket(pdata->socket_path);
+ 	} while (rc == -EINTR);
+ 	if (rc < 0)
+-		return rc;
++		goto error_free;
+ 	vu_dev->sock = rc;
+ 
+ 	spin_lock_init(&vu_dev->sock_lock);
+@@ -1160,6 +1160,8 @@ static int virtio_uml_probe(struct platform_device *pdev)
+ 
+ error_init:
+ 	os_close_file(vu_dev->sock);
++error_free:
++	kfree(vu_dev);
+ 	return rc;
+ }
+ 
+diff --git a/arch/um/kernel/skas/clone.c b/arch/um/kernel/skas/clone.c
+index 5afac0fef24ea..ff5061f291674 100644
+--- a/arch/um/kernel/skas/clone.c
++++ b/arch/um/kernel/skas/clone.c
+@@ -24,8 +24,7 @@
+ void __attribute__ ((__section__ (".__syscall_stub")))
+ stub_clone_handler(void)
+ {
+-	int stack;
+-	struct stub_data *data = (void *) ((unsigned long)&stack & ~(UM_KERN_PAGE_SIZE - 1));
++	struct stub_data *data = get_stub_page();
+ 	long err;
+ 
+ 	err = stub_syscall2(__NR_clone, CLONE_PARENT | CLONE_FILES | SIGCHLD,
+diff --git a/arch/x86/kernel/cpu/cacheinfo.c b/arch/x86/kernel/cpu/cacheinfo.c
+index d66af2950e06e..b5e36bd0425b5 100644
+--- a/arch/x86/kernel/cpu/cacheinfo.c
++++ b/arch/x86/kernel/cpu/cacheinfo.c
+@@ -985,7 +985,7 @@ static void ci_leaf_init(struct cacheinfo *this_leaf,
+ 	this_leaf->priv = base->nb;
+ }
+ 
+-static int __init_cache_level(unsigned int cpu)
++int init_cache_level(unsigned int cpu)
+ {
+ 	struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
+ 
+@@ -1014,7 +1014,7 @@ static void get_cache_id(int cpu, struct _cpuid4_info_regs *id4_regs)
+ 	id4_regs->id = c->apicid >> index_msb;
+ }
+ 
+-static int __populate_cache_leaves(unsigned int cpu)
++int populate_cache_leaves(unsigned int cpu)
+ {
+ 	unsigned int idx, ret;
+ 	struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
+@@ -1033,6 +1033,3 @@ static int __populate_cache_leaves(unsigned int cpu)
+ 
+ 	return 0;
+ }
+-
+-DEFINE_SMP_CALL_CACHE_FUNCTION(init_cache_level)
+-DEFINE_SMP_CALL_CACHE_FUNCTION(populate_cache_leaves)
+diff --git a/arch/x86/um/shared/sysdep/stub_32.h b/arch/x86/um/shared/sysdep/stub_32.h
+index b95db9daf0e82..4c6c2be0c8997 100644
+--- a/arch/x86/um/shared/sysdep/stub_32.h
++++ b/arch/x86/um/shared/sysdep/stub_32.h
+@@ -101,4 +101,16 @@ static inline void remap_stack_and_trap(void)
+ 		"memory");
+ }
+ 
++static __always_inline void *get_stub_page(void)
++{
++	unsigned long ret;
++
++	asm volatile (
++		"movl %%esp,%0 ;"
++		"andl %1,%0"
++		: "=a" (ret)
++		: "g" (~(UM_KERN_PAGE_SIZE - 1)));
++
++	return (void *)ret;
++}
+ #endif
+diff --git a/arch/x86/um/shared/sysdep/stub_64.h b/arch/x86/um/shared/sysdep/stub_64.h
+index 6e2626b77a2e4..e9c4b2b388039 100644
+--- a/arch/x86/um/shared/sysdep/stub_64.h
++++ b/arch/x86/um/shared/sysdep/stub_64.h
+@@ -108,4 +108,16 @@ static inline void remap_stack_and_trap(void)
+ 		__syscall_clobber, "r10", "r8", "r9");
+ }
+ 
++static __always_inline void *get_stub_page(void)
++{
++	unsigned long ret;
++
++	asm volatile (
++		"movq %%rsp,%0 ;"
++		"andq %1,%0"
++		: "=a" (ret)
++		: "g" (~(UM_KERN_PAGE_SIZE - 1)));
++
++	return (void *)ret;
++}
+ #endif
+diff --git a/arch/x86/um/stub_segv.c b/arch/x86/um/stub_segv.c
+index 21836eaf17259..f7eefba034f96 100644
+--- a/arch/x86/um/stub_segv.c
++++ b/arch/x86/um/stub_segv.c
+@@ -11,9 +11,8 @@
+ void __attribute__ ((__section__ (".__syscall_stub")))
+ stub_segv_handler(int sig, siginfo_t *info, void *p)
+ {
+-	int stack;
++	struct faultinfo *f = get_stub_page();
+ 	ucontext_t *uc = p;
+-	struct faultinfo *f = (void *)(((unsigned long)&stack) & ~(UM_KERN_PAGE_SIZE - 1));
+ 
+ 	GET_FAULTINFO_FROM_MC(*f, &uc->uc_mcontext);
+ 	trap_myself();
+diff --git a/block/blk-mq.c b/block/blk-mq.c
+index 9d4fdc2be88a5..9c64f0025a562 100644
+--- a/block/blk-mq.c
++++ b/block/blk-mq.c
+@@ -2135,6 +2135,18 @@ static void blk_add_rq_to_plug(struct blk_plug *plug, struct request *rq)
+ 	}
+ }
+ 
++/*
++ * Allow 4x BLK_MAX_REQUEST_COUNT requests on plug queue for multiple
++ * queues. This is important for md arrays to benefit from merging
++ * requests.
++ */
++static inline unsigned short blk_plug_max_rq_count(struct blk_plug *plug)
++{
++	if (plug->multiple_queues)
++		return BLK_MAX_REQUEST_COUNT * 4;
++	return BLK_MAX_REQUEST_COUNT;
++}
++
+ /**
+  * blk_mq_submit_bio - Create and send a request to block device.
+  * @bio: Bio pointer.
+@@ -2231,7 +2243,7 @@ blk_qc_t blk_mq_submit_bio(struct bio *bio)
+ 		else
+ 			last = list_entry_rq(plug->mq_list.prev);
+ 
+-		if (request_count >= BLK_MAX_REQUEST_COUNT || (last &&
++		if (request_count >= blk_plug_max_rq_count(plug) || (last &&
+ 		    blk_rq_bytes(last) >= BLK_PLUG_FLUSH_SIZE)) {
+ 			blk_flush_plug_list(plug, false);
+ 			trace_block_plug(q);
+diff --git a/block/blk-throttle.c b/block/blk-throttle.c
+index 55c49015e5333..7c4e7993ba970 100644
+--- a/block/blk-throttle.c
++++ b/block/blk-throttle.c
+@@ -2458,6 +2458,7 @@ int blk_throtl_init(struct request_queue *q)
+ void blk_throtl_exit(struct request_queue *q)
+ {
+ 	BUG_ON(!q->td);
++	del_timer_sync(&q->td->service_queue.pending_timer);
+ 	throtl_shutdown_wq(q);
+ 	blkcg_deactivate_policy(q, &blkcg_policy_throtl);
+ 	free_percpu(q->td->latency_buckets[READ]);
+diff --git a/block/genhd.c b/block/genhd.c
+index 298ee78c1bdac..9aba654044169 100644
+--- a/block/genhd.c
++++ b/block/genhd.c
+@@ -164,6 +164,7 @@ static struct blk_major_name {
+ 	void (*probe)(dev_t devt);
+ } *major_names[BLKDEV_MAJOR_HASH_SIZE];
+ static DEFINE_MUTEX(major_names_lock);
++static DEFINE_SPINLOCK(major_names_spinlock);
+ 
+ /* index in the above - for now: assume no multimajor ranges */
+ static inline int major_to_index(unsigned major)
+@@ -176,11 +177,11 @@ void blkdev_show(struct seq_file *seqf, off_t offset)
+ {
+ 	struct blk_major_name *dp;
+ 
+-	mutex_lock(&major_names_lock);
++	spin_lock(&major_names_spinlock);
+ 	for (dp = major_names[major_to_index(offset)]; dp; dp = dp->next)
+ 		if (dp->major == offset)
+ 			seq_printf(seqf, "%3d %s\n", dp->major, dp->name);
+-	mutex_unlock(&major_names_lock);
++	spin_unlock(&major_names_spinlock);
+ }
+ #endif /* CONFIG_PROC_FS */
+ 
+@@ -252,6 +253,7 @@ int __register_blkdev(unsigned int major, const char *name,
+ 	p->next = NULL;
+ 	index = major_to_index(major);
+ 
++	spin_lock(&major_names_spinlock);
+ 	for (n = &major_names[index]; *n; n = &(*n)->next) {
+ 		if ((*n)->major == major)
+ 			break;
+@@ -260,6 +262,7 @@ int __register_blkdev(unsigned int major, const char *name,
+ 		*n = p;
+ 	else
+ 		ret = -EBUSY;
++	spin_unlock(&major_names_spinlock);
+ 
+ 	if (ret < 0) {
+ 		printk("register_blkdev: cannot get major %u for %s\n",
+@@ -279,6 +282,7 @@ void unregister_blkdev(unsigned int major, const char *name)
+ 	int index = major_to_index(major);
+ 
+ 	mutex_lock(&major_names_lock);
++	spin_lock(&major_names_spinlock);
+ 	for (n = &major_names[index]; *n; n = &(*n)->next)
+ 		if ((*n)->major == major)
+ 			break;
+@@ -288,6 +292,7 @@ void unregister_blkdev(unsigned int major, const char *name)
+ 		p = *n;
+ 		*n = p->next;
+ 	}
++	spin_unlock(&major_names_spinlock);
+ 	mutex_unlock(&major_names_lock);
+ 	kfree(p);
+ }
+diff --git a/drivers/acpi/x86/s2idle.c b/drivers/acpi/x86/s2idle.c
+index 3a308461246a8..bd92b549fd5a4 100644
+--- a/drivers/acpi/x86/s2idle.c
++++ b/drivers/acpi/x86/s2idle.c
+@@ -449,25 +449,30 @@ int acpi_s2idle_prepare_late(void)
+ 	if (pm_debug_messages_on)
+ 		lpi_check_constraints();
+ 
+-	if (lps0_dsm_func_mask_microsoft > 0) {
++	/* Screen off */
++	if (lps0_dsm_func_mask > 0)
++		acpi_sleep_run_lps0_dsm(acpi_s2idle_vendor_amd() ?
++					ACPI_LPS0_SCREEN_OFF_AMD :
++					ACPI_LPS0_SCREEN_OFF,
++					lps0_dsm_func_mask, lps0_dsm_guid);
++
++	if (lps0_dsm_func_mask_microsoft > 0)
+ 		acpi_sleep_run_lps0_dsm(ACPI_LPS0_SCREEN_OFF,
+ 				lps0_dsm_func_mask_microsoft, lps0_dsm_guid_microsoft);
+-		acpi_sleep_run_lps0_dsm(ACPI_LPS0_MS_ENTRY,
+-				lps0_dsm_func_mask_microsoft, lps0_dsm_guid_microsoft);
++
++	/* LPS0 entry */
++	if (lps0_dsm_func_mask > 0)
++		acpi_sleep_run_lps0_dsm(acpi_s2idle_vendor_amd() ?
++					ACPI_LPS0_ENTRY_AMD :
++					ACPI_LPS0_ENTRY,
++					lps0_dsm_func_mask, lps0_dsm_guid);
++	if (lps0_dsm_func_mask_microsoft > 0) {
+ 		acpi_sleep_run_lps0_dsm(ACPI_LPS0_ENTRY,
+ 				lps0_dsm_func_mask_microsoft, lps0_dsm_guid_microsoft);
+-	} else if (acpi_s2idle_vendor_amd()) {
+-		acpi_sleep_run_lps0_dsm(ACPI_LPS0_SCREEN_OFF_AMD,
+-				lps0_dsm_func_mask, lps0_dsm_guid);
+-		acpi_sleep_run_lps0_dsm(ACPI_LPS0_ENTRY_AMD,
+-				lps0_dsm_func_mask, lps0_dsm_guid);
+-	} else {
+-		acpi_sleep_run_lps0_dsm(ACPI_LPS0_SCREEN_OFF,
+-				lps0_dsm_func_mask, lps0_dsm_guid);
+-		acpi_sleep_run_lps0_dsm(ACPI_LPS0_ENTRY,
+-				lps0_dsm_func_mask, lps0_dsm_guid);
++		/* modern standby entry */
++		acpi_sleep_run_lps0_dsm(ACPI_LPS0_MS_ENTRY,
++				lps0_dsm_func_mask_microsoft, lps0_dsm_guid_microsoft);
+ 	}
+-
+ 	return 0;
+ }
+ 
+@@ -476,24 +481,30 @@ void acpi_s2idle_restore_early(void)
+ 	if (!lps0_device_handle || sleep_no_lps0)
+ 		return;
+ 
+-	if (lps0_dsm_func_mask_microsoft > 0) {
+-		acpi_sleep_run_lps0_dsm(ACPI_LPS0_EXIT,
+-				lps0_dsm_func_mask_microsoft, lps0_dsm_guid_microsoft);
++	/* Modern standby exit */
++	if (lps0_dsm_func_mask_microsoft > 0)
+ 		acpi_sleep_run_lps0_dsm(ACPI_LPS0_MS_EXIT,
+ 				lps0_dsm_func_mask_microsoft, lps0_dsm_guid_microsoft);
+-		acpi_sleep_run_lps0_dsm(ACPI_LPS0_SCREEN_ON,
+-				lps0_dsm_func_mask_microsoft, lps0_dsm_guid_microsoft);
+-	} else if (acpi_s2idle_vendor_amd()) {
+-		acpi_sleep_run_lps0_dsm(ACPI_LPS0_EXIT_AMD,
+-				lps0_dsm_func_mask, lps0_dsm_guid);
+-		acpi_sleep_run_lps0_dsm(ACPI_LPS0_SCREEN_ON_AMD,
+-				lps0_dsm_func_mask, lps0_dsm_guid);
+-	} else {
++
++	/* LPS0 exit */
++	if (lps0_dsm_func_mask > 0)
++		acpi_sleep_run_lps0_dsm(acpi_s2idle_vendor_amd() ?
++					ACPI_LPS0_EXIT_AMD :
++					ACPI_LPS0_EXIT,
++					lps0_dsm_func_mask, lps0_dsm_guid);
++	if (lps0_dsm_func_mask_microsoft > 0)
+ 		acpi_sleep_run_lps0_dsm(ACPI_LPS0_EXIT,
+-				lps0_dsm_func_mask, lps0_dsm_guid);
++				lps0_dsm_func_mask_microsoft, lps0_dsm_guid_microsoft);
++
++	/* Screen on */
++	if (lps0_dsm_func_mask_microsoft > 0)
+ 		acpi_sleep_run_lps0_dsm(ACPI_LPS0_SCREEN_ON,
+-				lps0_dsm_func_mask, lps0_dsm_guid);
+-	}
++				lps0_dsm_func_mask_microsoft, lps0_dsm_guid_microsoft);
++	if (lps0_dsm_func_mask > 0)
++		acpi_sleep_run_lps0_dsm(acpi_s2idle_vendor_amd() ?
++					ACPI_LPS0_SCREEN_ON_AMD :
++					ACPI_LPS0_SCREEN_ON,
++					lps0_dsm_func_mask, lps0_dsm_guid);
+ }
+ 
+ static const struct platform_s2idle_ops acpi_s2idle_ops_lps0 = {
+diff --git a/drivers/base/power/main.c b/drivers/base/power/main.c
+index d568772152c2d..cbea78e79f3df 100644
+--- a/drivers/base/power/main.c
++++ b/drivers/base/power/main.c
+@@ -1642,7 +1642,7 @@ static int __device_suspend(struct device *dev, pm_message_t state, bool async)
+ 	}
+ 
+ 	dev->power.may_skip_resume = true;
+-	dev->power.must_resume = false;
++	dev->power.must_resume = !dev_pm_test_driver_flags(dev, DPM_FLAG_MAY_SKIP_RESUME);
+ 
+ 	dpm_watchdog_set(&wd, dev);
+ 	device_lock(dev);
+diff --git a/drivers/block/n64cart.c b/drivers/block/n64cart.c
+index c84be0028f635..26798da661bd4 100644
+--- a/drivers/block/n64cart.c
++++ b/drivers/block/n64cart.c
+@@ -129,8 +129,8 @@ static int __init n64cart_probe(struct platform_device *pdev)
+ 	}
+ 
+ 	reg_base = devm_platform_ioremap_resource(pdev, 0);
+-	if (!reg_base)
+-		return -EINVAL;
++	if (IS_ERR(reg_base))
++		return PTR_ERR(reg_base);
+ 
+ 	disk = blk_alloc_disk(NUMA_NO_NODE);
+ 	if (!disk)
+diff --git a/drivers/cxl/Makefile b/drivers/cxl/Makefile
+index 32954059b37ba..d1aaabc940f3c 100644
+--- a/drivers/cxl/Makefile
++++ b/drivers/cxl/Makefile
+@@ -1,11 +1,9 @@
+ # SPDX-License-Identifier: GPL-2.0
+-obj-$(CONFIG_CXL_BUS) += cxl_core.o
++obj-$(CONFIG_CXL_BUS) += core/
+ obj-$(CONFIG_CXL_MEM) += cxl_pci.o
+ obj-$(CONFIG_CXL_ACPI) += cxl_acpi.o
+ obj-$(CONFIG_CXL_PMEM) += cxl_pmem.o
+ 
+-ccflags-y += -DDEFAULT_SYMBOL_NAMESPACE=CXL
+-cxl_core-y := core.o
+ cxl_pci-y := pci.o
+ cxl_acpi-y := acpi.o
+ cxl_pmem-y := pmem.o
+diff --git a/drivers/cxl/core.c b/drivers/cxl/core.c
+deleted file mode 100644
+index a2e4d54fc7bc4..0000000000000
+--- a/drivers/cxl/core.c
++++ /dev/null
+@@ -1,1067 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0-only
+-/* Copyright(c) 2020 Intel Corporation. All rights reserved. */
+-#include <linux/io-64-nonatomic-lo-hi.h>
+-#include <linux/device.h>
+-#include <linux/module.h>
+-#include <linux/pci.h>
+-#include <linux/slab.h>
+-#include <linux/idr.h>
+-#include "cxl.h"
+-#include "mem.h"
+-
+-/**
+- * DOC: cxl core
+- *
+- * The CXL core provides a sysfs hierarchy for control devices and a rendezvous
+- * point for cross-device interleave coordination through cxl ports.
+- */
+-
+-static DEFINE_IDA(cxl_port_ida);
+-
+-static ssize_t devtype_show(struct device *dev, struct device_attribute *attr,
+-			    char *buf)
+-{
+-	return sysfs_emit(buf, "%s\n", dev->type->name);
+-}
+-static DEVICE_ATTR_RO(devtype);
+-
+-static struct attribute *cxl_base_attributes[] = {
+-	&dev_attr_devtype.attr,
+-	NULL,
+-};
+-
+-static struct attribute_group cxl_base_attribute_group = {
+-	.attrs = cxl_base_attributes,
+-};
+-
+-static ssize_t start_show(struct device *dev, struct device_attribute *attr,
+-			  char *buf)
+-{
+-	struct cxl_decoder *cxld = to_cxl_decoder(dev);
+-
+-	return sysfs_emit(buf, "%#llx\n", cxld->range.start);
+-}
+-static DEVICE_ATTR_RO(start);
+-
+-static ssize_t size_show(struct device *dev, struct device_attribute *attr,
+-			char *buf)
+-{
+-	struct cxl_decoder *cxld = to_cxl_decoder(dev);
+-
+-	return sysfs_emit(buf, "%#llx\n", range_len(&cxld->range));
+-}
+-static DEVICE_ATTR_RO(size);
+-
+-#define CXL_DECODER_FLAG_ATTR(name, flag)                            \
+-static ssize_t name##_show(struct device *dev,                       \
+-			   struct device_attribute *attr, char *buf) \
+-{                                                                    \
+-	struct cxl_decoder *cxld = to_cxl_decoder(dev);              \
+-                                                                     \
+-	return sysfs_emit(buf, "%s\n",                               \
+-			  (cxld->flags & (flag)) ? "1" : "0");       \
+-}                                                                    \
+-static DEVICE_ATTR_RO(name)
+-
+-CXL_DECODER_FLAG_ATTR(cap_pmem, CXL_DECODER_F_PMEM);
+-CXL_DECODER_FLAG_ATTR(cap_ram, CXL_DECODER_F_RAM);
+-CXL_DECODER_FLAG_ATTR(cap_type2, CXL_DECODER_F_TYPE2);
+-CXL_DECODER_FLAG_ATTR(cap_type3, CXL_DECODER_F_TYPE3);
+-CXL_DECODER_FLAG_ATTR(locked, CXL_DECODER_F_LOCK);
+-
+-static ssize_t target_type_show(struct device *dev,
+-				struct device_attribute *attr, char *buf)
+-{
+-	struct cxl_decoder *cxld = to_cxl_decoder(dev);
+-
+-	switch (cxld->target_type) {
+-	case CXL_DECODER_ACCELERATOR:
+-		return sysfs_emit(buf, "accelerator\n");
+-	case CXL_DECODER_EXPANDER:
+-		return sysfs_emit(buf, "expander\n");
+-	}
+-	return -ENXIO;
+-}
+-static DEVICE_ATTR_RO(target_type);
+-
+-static ssize_t target_list_show(struct device *dev,
+-			       struct device_attribute *attr, char *buf)
+-{
+-	struct cxl_decoder *cxld = to_cxl_decoder(dev);
+-	ssize_t offset = 0;
+-	int i, rc = 0;
+-
+-	device_lock(dev);
+-	for (i = 0; i < cxld->interleave_ways; i++) {
+-		struct cxl_dport *dport = cxld->target[i];
+-		struct cxl_dport *next = NULL;
+-
+-		if (!dport)
+-			break;
+-
+-		if (i + 1 < cxld->interleave_ways)
+-			next = cxld->target[i + 1];
+-		rc = sysfs_emit_at(buf, offset, "%d%s", dport->port_id,
+-				   next ? "," : "");
+-		if (rc < 0)
+-			break;
+-		offset += rc;
+-	}
+-	device_unlock(dev);
+-
+-	if (rc < 0)
+-		return rc;
+-
+-	rc = sysfs_emit_at(buf, offset, "\n");
+-	if (rc < 0)
+-		return rc;
+-
+-	return offset + rc;
+-}
+-static DEVICE_ATTR_RO(target_list);
+-
+-static struct attribute *cxl_decoder_base_attrs[] = {
+-	&dev_attr_start.attr,
+-	&dev_attr_size.attr,
+-	&dev_attr_locked.attr,
+-	&dev_attr_target_list.attr,
+-	NULL,
+-};
+-
+-static struct attribute_group cxl_decoder_base_attribute_group = {
+-	.attrs = cxl_decoder_base_attrs,
+-};
+-
+-static struct attribute *cxl_decoder_root_attrs[] = {
+-	&dev_attr_cap_pmem.attr,
+-	&dev_attr_cap_ram.attr,
+-	&dev_attr_cap_type2.attr,
+-	&dev_attr_cap_type3.attr,
+-	NULL,
+-};
+-
+-static struct attribute_group cxl_decoder_root_attribute_group = {
+-	.attrs = cxl_decoder_root_attrs,
+-};
+-
+-static const struct attribute_group *cxl_decoder_root_attribute_groups[] = {
+-	&cxl_decoder_root_attribute_group,
+-	&cxl_decoder_base_attribute_group,
+-	&cxl_base_attribute_group,
+-	NULL,
+-};
+-
+-static struct attribute *cxl_decoder_switch_attrs[] = {
+-	&dev_attr_target_type.attr,
+-	NULL,
+-};
+-
+-static struct attribute_group cxl_decoder_switch_attribute_group = {
+-	.attrs = cxl_decoder_switch_attrs,
+-};
+-
+-static const struct attribute_group *cxl_decoder_switch_attribute_groups[] = {
+-	&cxl_decoder_switch_attribute_group,
+-	&cxl_decoder_base_attribute_group,
+-	&cxl_base_attribute_group,
+-	NULL,
+-};
+-
+-static void cxl_decoder_release(struct device *dev)
+-{
+-	struct cxl_decoder *cxld = to_cxl_decoder(dev);
+-	struct cxl_port *port = to_cxl_port(dev->parent);
+-
+-	ida_free(&port->decoder_ida, cxld->id);
+-	kfree(cxld);
+-}
+-
+-static const struct device_type cxl_decoder_switch_type = {
+-	.name = "cxl_decoder_switch",
+-	.release = cxl_decoder_release,
+-	.groups = cxl_decoder_switch_attribute_groups,
+-};
+-
+-static const struct device_type cxl_decoder_root_type = {
+-	.name = "cxl_decoder_root",
+-	.release = cxl_decoder_release,
+-	.groups = cxl_decoder_root_attribute_groups,
+-};
+-
+-bool is_root_decoder(struct device *dev)
+-{
+-	return dev->type == &cxl_decoder_root_type;
+-}
+-EXPORT_SYMBOL_GPL(is_root_decoder);
+-
+-struct cxl_decoder *to_cxl_decoder(struct device *dev)
+-{
+-	if (dev_WARN_ONCE(dev, dev->type->release != cxl_decoder_release,
+-			  "not a cxl_decoder device\n"))
+-		return NULL;
+-	return container_of(dev, struct cxl_decoder, dev);
+-}
+-EXPORT_SYMBOL_GPL(to_cxl_decoder);
+-
+-static void cxl_dport_release(struct cxl_dport *dport)
+-{
+-	list_del(&dport->list);
+-	put_device(dport->dport);
+-	kfree(dport);
+-}
+-
+-static void cxl_port_release(struct device *dev)
+-{
+-	struct cxl_port *port = to_cxl_port(dev);
+-	struct cxl_dport *dport, *_d;
+-
+-	device_lock(dev);
+-	list_for_each_entry_safe(dport, _d, &port->dports, list)
+-		cxl_dport_release(dport);
+-	device_unlock(dev);
+-	ida_free(&cxl_port_ida, port->id);
+-	kfree(port);
+-}
+-
+-static const struct attribute_group *cxl_port_attribute_groups[] = {
+-	&cxl_base_attribute_group,
+-	NULL,
+-};
+-
+-static const struct device_type cxl_port_type = {
+-	.name = "cxl_port",
+-	.release = cxl_port_release,
+-	.groups = cxl_port_attribute_groups,
+-};
+-
+-struct cxl_port *to_cxl_port(struct device *dev)
+-{
+-	if (dev_WARN_ONCE(dev, dev->type != &cxl_port_type,
+-			  "not a cxl_port device\n"))
+-		return NULL;
+-	return container_of(dev, struct cxl_port, dev);
+-}
+-
+-static void unregister_port(void *_port)
+-{
+-	struct cxl_port *port = _port;
+-	struct cxl_dport *dport;
+-
+-	device_lock(&port->dev);
+-	list_for_each_entry(dport, &port->dports, list) {
+-		char link_name[CXL_TARGET_STRLEN];
+-
+-		if (snprintf(link_name, CXL_TARGET_STRLEN, "dport%d",
+-			     dport->port_id) >= CXL_TARGET_STRLEN)
+-			continue;
+-		sysfs_remove_link(&port->dev.kobj, link_name);
+-	}
+-	device_unlock(&port->dev);
+-	device_unregister(&port->dev);
+-}
+-
+-static void cxl_unlink_uport(void *_port)
+-{
+-	struct cxl_port *port = _port;
+-
+-	sysfs_remove_link(&port->dev.kobj, "uport");
+-}
+-
+-static int devm_cxl_link_uport(struct device *host, struct cxl_port *port)
+-{
+-	int rc;
+-
+-	rc = sysfs_create_link(&port->dev.kobj, &port->uport->kobj, "uport");
+-	if (rc)
+-		return rc;
+-	return devm_add_action_or_reset(host, cxl_unlink_uport, port);
+-}
+-
+-static struct cxl_port *cxl_port_alloc(struct device *uport,
+-				       resource_size_t component_reg_phys,
+-				       struct cxl_port *parent_port)
+-{
+-	struct cxl_port *port;
+-	struct device *dev;
+-	int rc;
+-
+-	port = kzalloc(sizeof(*port), GFP_KERNEL);
+-	if (!port)
+-		return ERR_PTR(-ENOMEM);
+-
+-	rc = ida_alloc(&cxl_port_ida, GFP_KERNEL);
+-	if (rc < 0)
+-		goto err;
+-	port->id = rc;
+-
+-	/*
+-	 * The top-level cxl_port "cxl_root" does not have a cxl_port as
+-	 * its parent and it does not have any corresponding component
+-	 * registers as its decode is described by a fixed platform
+-	 * description.
+-	 */
+-	dev = &port->dev;
+-	if (parent_port)
+-		dev->parent = &parent_port->dev;
+-	else
+-		dev->parent = uport;
+-
+-	port->uport = uport;
+-	port->component_reg_phys = component_reg_phys;
+-	ida_init(&port->decoder_ida);
+-	INIT_LIST_HEAD(&port->dports);
+-
+-	device_initialize(dev);
+-	device_set_pm_not_required(dev);
+-	dev->bus = &cxl_bus_type;
+-	dev->type = &cxl_port_type;
+-
+-	return port;
+-
+-err:
+-	kfree(port);
+-	return ERR_PTR(rc);
+-}
+-
+-/**
+- * devm_cxl_add_port - register a cxl_port in CXL memory decode hierarchy
+- * @host: host device for devm operations
+- * @uport: "physical" device implementing this upstream port
+- * @component_reg_phys: (optional) for configurable cxl_port instances
+- * @parent_port: next hop up in the CXL memory decode hierarchy
+- */
+-struct cxl_port *devm_cxl_add_port(struct device *host, struct device *uport,
+-				   resource_size_t component_reg_phys,
+-				   struct cxl_port *parent_port)
+-{
+-	struct cxl_port *port;
+-	struct device *dev;
+-	int rc;
+-
+-	port = cxl_port_alloc(uport, component_reg_phys, parent_port);
+-	if (IS_ERR(port))
+-		return port;
+-
+-	dev = &port->dev;
+-	if (parent_port)
+-		rc = dev_set_name(dev, "port%d", port->id);
+-	else
+-		rc = dev_set_name(dev, "root%d", port->id);
+-	if (rc)
+-		goto err;
+-
+-	rc = device_add(dev);
+-	if (rc)
+-		goto err;
+-
+-	rc = devm_add_action_or_reset(host, unregister_port, port);
+-	if (rc)
+-		return ERR_PTR(rc);
+-
+-	rc = devm_cxl_link_uport(host, port);
+-	if (rc)
+-		return ERR_PTR(rc);
+-
+-	return port;
+-
+-err:
+-	put_device(dev);
+-	return ERR_PTR(rc);
+-}
+-EXPORT_SYMBOL_GPL(devm_cxl_add_port);
+-
+-static struct cxl_dport *find_dport(struct cxl_port *port, int id)
+-{
+-	struct cxl_dport *dport;
+-
+-	device_lock_assert(&port->dev);
+-	list_for_each_entry (dport, &port->dports, list)
+-		if (dport->port_id == id)
+-			return dport;
+-	return NULL;
+-}
+-
+-static int add_dport(struct cxl_port *port, struct cxl_dport *new)
+-{
+-	struct cxl_dport *dup;
+-
+-	device_lock(&port->dev);
+-	dup = find_dport(port, new->port_id);
+-	if (dup)
+-		dev_err(&port->dev,
+-			"unable to add dport%d-%s non-unique port id (%s)\n",
+-			new->port_id, dev_name(new->dport),
+-			dev_name(dup->dport));
+-	else
+-		list_add_tail(&new->list, &port->dports);
+-	device_unlock(&port->dev);
+-
+-	return dup ? -EEXIST : 0;
+-}
+-
+-/**
+- * cxl_add_dport - append downstream port data to a cxl_port
+- * @port: the cxl_port that references this dport
+- * @dport_dev: firmware or PCI device representing the dport
+- * @port_id: identifier for this dport in a decoder's target list
+- * @component_reg_phys: optional location of CXL component registers
+- *
+- * Note that all allocations and links are undone by cxl_port deletion
+- * and release.
+- */
+-int cxl_add_dport(struct cxl_port *port, struct device *dport_dev, int port_id,
+-		  resource_size_t component_reg_phys)
+-{
+-	char link_name[CXL_TARGET_STRLEN];
+-	struct cxl_dport *dport;
+-	int rc;
+-
+-	if (snprintf(link_name, CXL_TARGET_STRLEN, "dport%d", port_id) >=
+-	    CXL_TARGET_STRLEN)
+-		return -EINVAL;
+-
+-	dport = kzalloc(sizeof(*dport), GFP_KERNEL);
+-	if (!dport)
+-		return -ENOMEM;
+-
+-	INIT_LIST_HEAD(&dport->list);
+-	dport->dport = get_device(dport_dev);
+-	dport->port_id = port_id;
+-	dport->component_reg_phys = component_reg_phys;
+-	dport->port = port;
+-
+-	rc = add_dport(port, dport);
+-	if (rc)
+-		goto err;
+-
+-	rc = sysfs_create_link(&port->dev.kobj, &dport_dev->kobj, link_name);
+-	if (rc)
+-		goto err;
+-
+-	return 0;
+-err:
+-	cxl_dport_release(dport);
+-	return rc;
+-}
+-EXPORT_SYMBOL_GPL(cxl_add_dport);
+-
+-static struct cxl_decoder *
+-cxl_decoder_alloc(struct cxl_port *port, int nr_targets, resource_size_t base,
+-		  resource_size_t len, int interleave_ways,
+-		  int interleave_granularity, enum cxl_decoder_type type,
+-		  unsigned long flags)
+-{
+-	struct cxl_decoder *cxld;
+-	struct device *dev;
+-	int rc = 0;
+-
+-	if (interleave_ways < 1)
+-		return ERR_PTR(-EINVAL);
+-
+-	device_lock(&port->dev);
+-	if (list_empty(&port->dports))
+-		rc = -EINVAL;
+-	device_unlock(&port->dev);
+-	if (rc)
+-		return ERR_PTR(rc);
+-
+-	cxld = kzalloc(struct_size(cxld, target, nr_targets), GFP_KERNEL);
+-	if (!cxld)
+-		return ERR_PTR(-ENOMEM);
+-
+-	rc = ida_alloc(&port->decoder_ida, GFP_KERNEL);
+-	if (rc < 0)
+-		goto err;
+-
+-	*cxld = (struct cxl_decoder) {
+-		.id = rc,
+-		.range = {
+-			.start = base,
+-			.end = base + len - 1,
+-		},
+-		.flags = flags,
+-		.interleave_ways = interleave_ways,
+-		.interleave_granularity = interleave_granularity,
+-		.target_type = type,
+-	};
+-
+-	/* handle implied target_list */
+-	if (interleave_ways == 1)
+-		cxld->target[0] =
+-			list_first_entry(&port->dports, struct cxl_dport, list);
+-	dev = &cxld->dev;
+-	device_initialize(dev);
+-	device_set_pm_not_required(dev);
+-	dev->parent = &port->dev;
+-	dev->bus = &cxl_bus_type;
+-
+-	/* root ports do not have a cxl_port_type parent */
+-	if (port->dev.parent->type == &cxl_port_type)
+-		dev->type = &cxl_decoder_switch_type;
+-	else
+-		dev->type = &cxl_decoder_root_type;
+-
+-	return cxld;
+-err:
+-	kfree(cxld);
+-	return ERR_PTR(rc);
+-}
+-
+-static void unregister_dev(void *dev)
+-{
+-	device_unregister(dev);
+-}
+-
+-struct cxl_decoder *
+-devm_cxl_add_decoder(struct device *host, struct cxl_port *port, int nr_targets,
+-		     resource_size_t base, resource_size_t len,
+-		     int interleave_ways, int interleave_granularity,
+-		     enum cxl_decoder_type type, unsigned long flags)
+-{
+-	struct cxl_decoder *cxld;
+-	struct device *dev;
+-	int rc;
+-
+-	cxld = cxl_decoder_alloc(port, nr_targets, base, len, interleave_ways,
+-				 interleave_granularity, type, flags);
+-	if (IS_ERR(cxld))
+-		return cxld;
+-
+-	dev = &cxld->dev;
+-	rc = dev_set_name(dev, "decoder%d.%d", port->id, cxld->id);
+-	if (rc)
+-		goto err;
+-
+-	rc = device_add(dev);
+-	if (rc)
+-		goto err;
+-
+-	rc = devm_add_action_or_reset(host, unregister_dev, dev);
+-	if (rc)
+-		return ERR_PTR(rc);
+-	return cxld;
+-
+-err:
+-	put_device(dev);
+-	return ERR_PTR(rc);
+-}
+-EXPORT_SYMBOL_GPL(devm_cxl_add_decoder);
+-
+-/**
+- * cxl_probe_component_regs() - Detect CXL Component register blocks
+- * @dev: Host device of the @base mapping
+- * @base: Mapping containing the HDM Decoder Capability Header
+- * @map: Map object describing the register block information found
+- *
+- * See CXL 2.0 8.2.4 Component Register Layout and Definition
+- * See CXL 2.0 8.2.5.5 CXL Device Register Interface
+- *
+- * Probe for component register information and return it in map object.
+- */
+-void cxl_probe_component_regs(struct device *dev, void __iomem *base,
+-			      struct cxl_component_reg_map *map)
+-{
+-	int cap, cap_count;
+-	u64 cap_array;
+-
+-	*map = (struct cxl_component_reg_map) { 0 };
+-
+-	/*
+-	 * CXL.cache and CXL.mem registers are at offset 0x1000 as defined in
+-	 * CXL 2.0 8.2.4 Table 141.
+-	 */
+-	base += CXL_CM_OFFSET;
+-
+-	cap_array = readq(base + CXL_CM_CAP_HDR_OFFSET);
+-
+-	if (FIELD_GET(CXL_CM_CAP_HDR_ID_MASK, cap_array) != CM_CAP_HDR_CAP_ID) {
+-		dev_err(dev,
+-			"Couldn't locate the CXL.cache and CXL.mem capability array header./n");
+-		return;
+-	}
+-
+-	/* It's assumed that future versions will be backward compatible */
+-	cap_count = FIELD_GET(CXL_CM_CAP_HDR_ARRAY_SIZE_MASK, cap_array);
+-
+-	for (cap = 1; cap <= cap_count; cap++) {
+-		void __iomem *register_block;
+-		u32 hdr;
+-		int decoder_cnt;
+-		u16 cap_id, offset;
+-		u32 length;
+-
+-		hdr = readl(base + cap * 0x4);
+-
+-		cap_id = FIELD_GET(CXL_CM_CAP_HDR_ID_MASK, hdr);
+-		offset = FIELD_GET(CXL_CM_CAP_PTR_MASK, hdr);
+-		register_block = base + offset;
+-
+-		switch (cap_id) {
+-		case CXL_CM_CAP_CAP_ID_HDM:
+-			dev_dbg(dev, "found HDM decoder capability (0x%x)\n",
+-				offset);
+-
+-			hdr = readl(register_block);
+-
+-			decoder_cnt = cxl_hdm_decoder_count(hdr);
+-			length = 0x20 * decoder_cnt + 0x10;
+-
+-			map->hdm_decoder.valid = true;
+-			map->hdm_decoder.offset = CXL_CM_OFFSET + offset;
+-			map->hdm_decoder.size = length;
+-			break;
+-		default:
+-			dev_dbg(dev, "Unknown CM cap ID: %d (0x%x)\n", cap_id,
+-				offset);
+-			break;
+-		}
+-	}
+-}
+-EXPORT_SYMBOL_GPL(cxl_probe_component_regs);
+-
+-static void cxl_nvdimm_bridge_release(struct device *dev)
+-{
+-	struct cxl_nvdimm_bridge *cxl_nvb = to_cxl_nvdimm_bridge(dev);
+-
+-	kfree(cxl_nvb);
+-}
+-
+-static const struct attribute_group *cxl_nvdimm_bridge_attribute_groups[] = {
+-	&cxl_base_attribute_group,
+-	NULL,
+-};
+-
+-static const struct device_type cxl_nvdimm_bridge_type = {
+-	.name = "cxl_nvdimm_bridge",
+-	.release = cxl_nvdimm_bridge_release,
+-	.groups = cxl_nvdimm_bridge_attribute_groups,
+-};
+-
+-struct cxl_nvdimm_bridge *to_cxl_nvdimm_bridge(struct device *dev)
+-{
+-	if (dev_WARN_ONCE(dev, dev->type != &cxl_nvdimm_bridge_type,
+-			  "not a cxl_nvdimm_bridge device\n"))
+-		return NULL;
+-	return container_of(dev, struct cxl_nvdimm_bridge, dev);
+-}
+-EXPORT_SYMBOL_GPL(to_cxl_nvdimm_bridge);
+-
+-static struct cxl_nvdimm_bridge *
+-cxl_nvdimm_bridge_alloc(struct cxl_port *port)
+-{
+-	struct cxl_nvdimm_bridge *cxl_nvb;
+-	struct device *dev;
+-
+-	cxl_nvb = kzalloc(sizeof(*cxl_nvb), GFP_KERNEL);
+-	if (!cxl_nvb)
+-		return ERR_PTR(-ENOMEM);
+-
+-	dev = &cxl_nvb->dev;
+-	cxl_nvb->port = port;
+-	cxl_nvb->state = CXL_NVB_NEW;
+-	device_initialize(dev);
+-	device_set_pm_not_required(dev);
+-	dev->parent = &port->dev;
+-	dev->bus = &cxl_bus_type;
+-	dev->type = &cxl_nvdimm_bridge_type;
+-
+-	return cxl_nvb;
+-}
+-
+-static void unregister_nvb(void *_cxl_nvb)
+-{
+-	struct cxl_nvdimm_bridge *cxl_nvb = _cxl_nvb;
+-	bool flush;
+-
+-	/*
+-	 * If the bridge was ever activated then there might be in-flight state
+-	 * work to flush. Once the state has been changed to 'dead' then no new
+-	 * work can be queued by user-triggered bind.
+-	 */
+-	device_lock(&cxl_nvb->dev);
+-	flush = cxl_nvb->state != CXL_NVB_NEW;
+-	cxl_nvb->state = CXL_NVB_DEAD;
+-	device_unlock(&cxl_nvb->dev);
+-
+-	/*
+-	 * Even though the device core will trigger device_release_driver()
+-	 * before the unregister, it does not know about the fact that
+-	 * cxl_nvdimm_bridge_driver defers ->remove() work. So, do the driver
+-	 * release not and flush it before tearing down the nvdimm device
+-	 * hierarchy.
+-	 */
+-	device_release_driver(&cxl_nvb->dev);
+-	if (flush)
+-		flush_work(&cxl_nvb->state_work);
+-	device_unregister(&cxl_nvb->dev);
+-}
+-
+-struct cxl_nvdimm_bridge *devm_cxl_add_nvdimm_bridge(struct device *host,
+-						     struct cxl_port *port)
+-{
+-	struct cxl_nvdimm_bridge *cxl_nvb;
+-	struct device *dev;
+-	int rc;
+-
+-	if (!IS_ENABLED(CONFIG_CXL_PMEM))
+-		return ERR_PTR(-ENXIO);
+-
+-	cxl_nvb = cxl_nvdimm_bridge_alloc(port);
+-	if (IS_ERR(cxl_nvb))
+-		return cxl_nvb;
+-
+-	dev = &cxl_nvb->dev;
+-	rc = dev_set_name(dev, "nvdimm-bridge");
+-	if (rc)
+-		goto err;
+-
+-	rc = device_add(dev);
+-	if (rc)
+-		goto err;
+-
+-	rc = devm_add_action_or_reset(host, unregister_nvb, cxl_nvb);
+-	if (rc)
+-		return ERR_PTR(rc);
+-
+-	return cxl_nvb;
+-
+-err:
+-	put_device(dev);
+-	return ERR_PTR(rc);
+-}
+-EXPORT_SYMBOL_GPL(devm_cxl_add_nvdimm_bridge);
+-
+-static void cxl_nvdimm_release(struct device *dev)
+-{
+-	struct cxl_nvdimm *cxl_nvd = to_cxl_nvdimm(dev);
+-
+-	kfree(cxl_nvd);
+-}
+-
+-static const struct attribute_group *cxl_nvdimm_attribute_groups[] = {
+-	&cxl_base_attribute_group,
+-	NULL,
+-};
+-
+-static const struct device_type cxl_nvdimm_type = {
+-	.name = "cxl_nvdimm",
+-	.release = cxl_nvdimm_release,
+-	.groups = cxl_nvdimm_attribute_groups,
+-};
+-
+-bool is_cxl_nvdimm(struct device *dev)
+-{
+-	return dev->type == &cxl_nvdimm_type;
+-}
+-EXPORT_SYMBOL_GPL(is_cxl_nvdimm);
+-
+-struct cxl_nvdimm *to_cxl_nvdimm(struct device *dev)
+-{
+-	if (dev_WARN_ONCE(dev, !is_cxl_nvdimm(dev),
+-			  "not a cxl_nvdimm device\n"))
+-		return NULL;
+-	return container_of(dev, struct cxl_nvdimm, dev);
+-}
+-EXPORT_SYMBOL_GPL(to_cxl_nvdimm);
+-
+-static struct cxl_nvdimm *cxl_nvdimm_alloc(struct cxl_memdev *cxlmd)
+-{
+-	struct cxl_nvdimm *cxl_nvd;
+-	struct device *dev;
+-
+-	cxl_nvd = kzalloc(sizeof(*cxl_nvd), GFP_KERNEL);
+-	if (!cxl_nvd)
+-		return ERR_PTR(-ENOMEM);
+-
+-	dev = &cxl_nvd->dev;
+-	cxl_nvd->cxlmd = cxlmd;
+-	device_initialize(dev);
+-	device_set_pm_not_required(dev);
+-	dev->parent = &cxlmd->dev;
+-	dev->bus = &cxl_bus_type;
+-	dev->type = &cxl_nvdimm_type;
+-
+-	return cxl_nvd;
+-}
+-
+-int devm_cxl_add_nvdimm(struct device *host, struct cxl_memdev *cxlmd)
+-{
+-	struct cxl_nvdimm *cxl_nvd;
+-	struct device *dev;
+-	int rc;
+-
+-	cxl_nvd = cxl_nvdimm_alloc(cxlmd);
+-	if (IS_ERR(cxl_nvd))
+-		return PTR_ERR(cxl_nvd);
+-
+-	dev = &cxl_nvd->dev;
+-	rc = dev_set_name(dev, "pmem%d", cxlmd->id);
+-	if (rc)
+-		goto err;
+-
+-	rc = device_add(dev);
+-	if (rc)
+-		goto err;
+-
+-	dev_dbg(host, "%s: register %s\n", dev_name(dev->parent),
+-		dev_name(dev));
+-
+-	return devm_add_action_or_reset(host, unregister_dev, dev);
+-
+-err:
+-	put_device(dev);
+-	return rc;
+-}
+-EXPORT_SYMBOL_GPL(devm_cxl_add_nvdimm);
+-
+-/**
+- * cxl_probe_device_regs() - Detect CXL Device register blocks
+- * @dev: Host device of the @base mapping
+- * @base: Mapping of CXL 2.0 8.2.8 CXL Device Register Interface
+- * @map: Map object describing the register block information found
+- *
+- * Probe for device register information and return it in map object.
+- */
+-void cxl_probe_device_regs(struct device *dev, void __iomem *base,
+-			   struct cxl_device_reg_map *map)
+-{
+-	int cap, cap_count;
+-	u64 cap_array;
+-
+-	*map = (struct cxl_device_reg_map){ 0 };
+-
+-	cap_array = readq(base + CXLDEV_CAP_ARRAY_OFFSET);
+-	if (FIELD_GET(CXLDEV_CAP_ARRAY_ID_MASK, cap_array) !=
+-	    CXLDEV_CAP_ARRAY_CAP_ID)
+-		return;
+-
+-	cap_count = FIELD_GET(CXLDEV_CAP_ARRAY_COUNT_MASK, cap_array);
+-
+-	for (cap = 1; cap <= cap_count; cap++) {
+-		u32 offset, length;
+-		u16 cap_id;
+-
+-		cap_id = FIELD_GET(CXLDEV_CAP_HDR_CAP_ID_MASK,
+-				   readl(base + cap * 0x10));
+-		offset = readl(base + cap * 0x10 + 0x4);
+-		length = readl(base + cap * 0x10 + 0x8);
+-
+-		switch (cap_id) {
+-		case CXLDEV_CAP_CAP_ID_DEVICE_STATUS:
+-			dev_dbg(dev, "found Status capability (0x%x)\n", offset);
+-
+-			map->status.valid = true;
+-			map->status.offset = offset;
+-			map->status.size = length;
+-			break;
+-		case CXLDEV_CAP_CAP_ID_PRIMARY_MAILBOX:
+-			dev_dbg(dev, "found Mailbox capability (0x%x)\n", offset);
+-			map->mbox.valid = true;
+-			map->mbox.offset = offset;
+-			map->mbox.size = length;
+-			break;
+-		case CXLDEV_CAP_CAP_ID_SECONDARY_MAILBOX:
+-			dev_dbg(dev, "found Secondary Mailbox capability (0x%x)\n", offset);
+-			break;
+-		case CXLDEV_CAP_CAP_ID_MEMDEV:
+-			dev_dbg(dev, "found Memory Device capability (0x%x)\n", offset);
+-			map->memdev.valid = true;
+-			map->memdev.offset = offset;
+-			map->memdev.size = length;
+-			break;
+-		default:
+-			if (cap_id >= 0x8000)
+-				dev_dbg(dev, "Vendor cap ID: %#x offset: %#x\n", cap_id, offset);
+-			else
+-				dev_dbg(dev, "Unknown cap ID: %#x offset: %#x\n", cap_id, offset);
+-			break;
+-		}
+-	}
+-}
+-EXPORT_SYMBOL_GPL(cxl_probe_device_regs);
+-
+-static void __iomem *devm_cxl_iomap_block(struct device *dev,
+-					  resource_size_t addr,
+-					  resource_size_t length)
+-{
+-	void __iomem *ret_val;
+-	struct resource *res;
+-
+-	res = devm_request_mem_region(dev, addr, length, dev_name(dev));
+-	if (!res) {
+-		resource_size_t end = addr + length - 1;
+-
+-		dev_err(dev, "Failed to request region %pa-%pa\n", &addr, &end);
+-		return NULL;
+-	}
+-
+-	ret_val = devm_ioremap(dev, addr, length);
+-	if (!ret_val)
+-		dev_err(dev, "Failed to map region %pr\n", res);
+-
+-	return ret_val;
+-}
+-
+-int cxl_map_component_regs(struct pci_dev *pdev,
+-			   struct cxl_component_regs *regs,
+-			   struct cxl_register_map *map)
+-{
+-	struct device *dev = &pdev->dev;
+-	resource_size_t phys_addr;
+-	resource_size_t length;
+-
+-	phys_addr = pci_resource_start(pdev, map->barno);
+-	phys_addr += map->block_offset;
+-
+-	phys_addr += map->component_map.hdm_decoder.offset;
+-	length = map->component_map.hdm_decoder.size;
+-	regs->hdm_decoder = devm_cxl_iomap_block(dev, phys_addr, length);
+-	if (!regs->hdm_decoder)
+-		return -ENOMEM;
+-
+-	return 0;
+-}
+-EXPORT_SYMBOL_GPL(cxl_map_component_regs);
+-
+-int cxl_map_device_regs(struct pci_dev *pdev,
+-			struct cxl_device_regs *regs,
+-			struct cxl_register_map *map)
+-{
+-	struct device *dev = &pdev->dev;
+-	resource_size_t phys_addr;
+-
+-	phys_addr = pci_resource_start(pdev, map->barno);
+-	phys_addr += map->block_offset;
+-
+-	if (map->device_map.status.valid) {
+-		resource_size_t addr;
+-		resource_size_t length;
+-
+-		addr = phys_addr + map->device_map.status.offset;
+-		length = map->device_map.status.size;
+-		regs->status = devm_cxl_iomap_block(dev, addr, length);
+-		if (!regs->status)
+-			return -ENOMEM;
+-	}
+-
+-	if (map->device_map.mbox.valid) {
+-		resource_size_t addr;
+-		resource_size_t length;
+-
+-		addr = phys_addr + map->device_map.mbox.offset;
+-		length = map->device_map.mbox.size;
+-		regs->mbox = devm_cxl_iomap_block(dev, addr, length);
+-		if (!regs->mbox)
+-			return -ENOMEM;
+-	}
+-
+-	if (map->device_map.memdev.valid) {
+-		resource_size_t addr;
+-		resource_size_t length;
+-
+-		addr = phys_addr + map->device_map.memdev.offset;
+-		length = map->device_map.memdev.size;
+-		regs->memdev = devm_cxl_iomap_block(dev, addr, length);
+-		if (!regs->memdev)
+-			return -ENOMEM;
+-	}
+-
+-	return 0;
+-}
+-EXPORT_SYMBOL_GPL(cxl_map_device_regs);
+-
+-/**
+- * __cxl_driver_register - register a driver for the cxl bus
+- * @cxl_drv: cxl driver structure to attach
+- * @owner: owning module/driver
+- * @modname: KBUILD_MODNAME for parent driver
+- */
+-int __cxl_driver_register(struct cxl_driver *cxl_drv, struct module *owner,
+-			  const char *modname)
+-{
+-	if (!cxl_drv->probe) {
+-		pr_debug("%s ->probe() must be specified\n", modname);
+-		return -EINVAL;
+-	}
+-
+-	if (!cxl_drv->name) {
+-		pr_debug("%s ->name must be specified\n", modname);
+-		return -EINVAL;
+-	}
+-
+-	if (!cxl_drv->id) {
+-		pr_debug("%s ->id must be specified\n", modname);
+-		return -EINVAL;
+-	}
+-
+-	cxl_drv->drv.bus = &cxl_bus_type;
+-	cxl_drv->drv.owner = owner;
+-	cxl_drv->drv.mod_name = modname;
+-	cxl_drv->drv.name = cxl_drv->name;
+-
+-	return driver_register(&cxl_drv->drv);
+-}
+-EXPORT_SYMBOL_GPL(__cxl_driver_register);
+-
+-void cxl_driver_unregister(struct cxl_driver *cxl_drv)
+-{
+-	driver_unregister(&cxl_drv->drv);
+-}
+-EXPORT_SYMBOL_GPL(cxl_driver_unregister);
+-
+-static int cxl_device_id(struct device *dev)
+-{
+-	if (dev->type == &cxl_nvdimm_bridge_type)
+-		return CXL_DEVICE_NVDIMM_BRIDGE;
+-	if (dev->type == &cxl_nvdimm_type)
+-		return CXL_DEVICE_NVDIMM;
+-	return 0;
+-}
+-
+-static int cxl_bus_uevent(struct device *dev, struct kobj_uevent_env *env)
+-{
+-	return add_uevent_var(env, "MODALIAS=" CXL_MODALIAS_FMT,
+-			      cxl_device_id(dev));
+-}
+-
+-static int cxl_bus_match(struct device *dev, struct device_driver *drv)
+-{
+-	return cxl_device_id(dev) == to_cxl_drv(drv)->id;
+-}
+-
+-static int cxl_bus_probe(struct device *dev)
+-{
+-	return to_cxl_drv(dev->driver)->probe(dev);
+-}
+-
+-static int cxl_bus_remove(struct device *dev)
+-{
+-	struct cxl_driver *cxl_drv = to_cxl_drv(dev->driver);
+-
+-	if (cxl_drv->remove)
+-		cxl_drv->remove(dev);
+-	return 0;
+-}
+-
+-struct bus_type cxl_bus_type = {
+-	.name = "cxl",
+-	.uevent = cxl_bus_uevent,
+-	.match = cxl_bus_match,
+-	.probe = cxl_bus_probe,
+-	.remove = cxl_bus_remove,
+-};
+-EXPORT_SYMBOL_GPL(cxl_bus_type);
+-
+-static __init int cxl_core_init(void)
+-{
+-	return bus_register(&cxl_bus_type);
+-}
+-
+-static void cxl_core_exit(void)
+-{
+-	bus_unregister(&cxl_bus_type);
+-}
+-
+-module_init(cxl_core_init);
+-module_exit(cxl_core_exit);
+-MODULE_LICENSE("GPL v2");
+diff --git a/drivers/cxl/core/Makefile b/drivers/cxl/core/Makefile
+new file mode 100644
+index 0000000000000..ad137f96e5c84
+--- /dev/null
++++ b/drivers/cxl/core/Makefile
+@@ -0,0 +1,5 @@
++# SPDX-License-Identifier: GPL-2.0
++obj-$(CONFIG_CXL_BUS) += cxl_core.o
++
++ccflags-y += -DDEFAULT_SYMBOL_NAMESPACE=CXL -I$(srctree)/drivers/cxl
++cxl_core-y := bus.o
+diff --git a/drivers/cxl/core/bus.c b/drivers/cxl/core/bus.c
+new file mode 100644
+index 0000000000000..0815eec239443
+--- /dev/null
++++ b/drivers/cxl/core/bus.c
+@@ -0,0 +1,1067 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/* Copyright(c) 2020 Intel Corporation. All rights reserved. */
++#include <linux/io-64-nonatomic-lo-hi.h>
++#include <linux/device.h>
++#include <linux/module.h>
++#include <linux/pci.h>
++#include <linux/slab.h>
++#include <linux/idr.h>
++#include <cxlmem.h>
++#include <cxl.h>
++
++/**
++ * DOC: cxl core
++ *
++ * The CXL core provides a sysfs hierarchy for control devices and a rendezvous
++ * point for cross-device interleave coordination through cxl ports.
++ */
++
++static DEFINE_IDA(cxl_port_ida);
++
++static ssize_t devtype_show(struct device *dev, struct device_attribute *attr,
++			    char *buf)
++{
++	return sysfs_emit(buf, "%s\n", dev->type->name);
++}
++static DEVICE_ATTR_RO(devtype);
++
++static struct attribute *cxl_base_attributes[] = {
++	&dev_attr_devtype.attr,
++	NULL,
++};
++
++static struct attribute_group cxl_base_attribute_group = {
++	.attrs = cxl_base_attributes,
++};
++
++static ssize_t start_show(struct device *dev, struct device_attribute *attr,
++			  char *buf)
++{
++	struct cxl_decoder *cxld = to_cxl_decoder(dev);
++
++	return sysfs_emit(buf, "%#llx\n", cxld->range.start);
++}
++static DEVICE_ATTR_RO(start);
++
++static ssize_t size_show(struct device *dev, struct device_attribute *attr,
++			char *buf)
++{
++	struct cxl_decoder *cxld = to_cxl_decoder(dev);
++
++	return sysfs_emit(buf, "%#llx\n", range_len(&cxld->range));
++}
++static DEVICE_ATTR_RO(size);
++
++#define CXL_DECODER_FLAG_ATTR(name, flag)                            \
++static ssize_t name##_show(struct device *dev,                       \
++			   struct device_attribute *attr, char *buf) \
++{                                                                    \
++	struct cxl_decoder *cxld = to_cxl_decoder(dev);              \
++                                                                     \
++	return sysfs_emit(buf, "%s\n",                               \
++			  (cxld->flags & (flag)) ? "1" : "0");       \
++}                                                                    \
++static DEVICE_ATTR_RO(name)
++
++CXL_DECODER_FLAG_ATTR(cap_pmem, CXL_DECODER_F_PMEM);
++CXL_DECODER_FLAG_ATTR(cap_ram, CXL_DECODER_F_RAM);
++CXL_DECODER_FLAG_ATTR(cap_type2, CXL_DECODER_F_TYPE2);
++CXL_DECODER_FLAG_ATTR(cap_type3, CXL_DECODER_F_TYPE3);
++CXL_DECODER_FLAG_ATTR(locked, CXL_DECODER_F_LOCK);
++
++static ssize_t target_type_show(struct device *dev,
++				struct device_attribute *attr, char *buf)
++{
++	struct cxl_decoder *cxld = to_cxl_decoder(dev);
++
++	switch (cxld->target_type) {
++	case CXL_DECODER_ACCELERATOR:
++		return sysfs_emit(buf, "accelerator\n");
++	case CXL_DECODER_EXPANDER:
++		return sysfs_emit(buf, "expander\n");
++	}
++	return -ENXIO;
++}
++static DEVICE_ATTR_RO(target_type);
++
++static ssize_t target_list_show(struct device *dev,
++			       struct device_attribute *attr, char *buf)
++{
++	struct cxl_decoder *cxld = to_cxl_decoder(dev);
++	ssize_t offset = 0;
++	int i, rc = 0;
++
++	device_lock(dev);
++	for (i = 0; i < cxld->interleave_ways; i++) {
++		struct cxl_dport *dport = cxld->target[i];
++		struct cxl_dport *next = NULL;
++
++		if (!dport)
++			break;
++
++		if (i + 1 < cxld->interleave_ways)
++			next = cxld->target[i + 1];
++		rc = sysfs_emit_at(buf, offset, "%d%s", dport->port_id,
++				   next ? "," : "");
++		if (rc < 0)
++			break;
++		offset += rc;
++	}
++	device_unlock(dev);
++
++	if (rc < 0)
++		return rc;
++
++	rc = sysfs_emit_at(buf, offset, "\n");
++	if (rc < 0)
++		return rc;
++
++	return offset + rc;
++}
++static DEVICE_ATTR_RO(target_list);
++
++static struct attribute *cxl_decoder_base_attrs[] = {
++	&dev_attr_start.attr,
++	&dev_attr_size.attr,
++	&dev_attr_locked.attr,
++	&dev_attr_target_list.attr,
++	NULL,
++};
++
++static struct attribute_group cxl_decoder_base_attribute_group = {
++	.attrs = cxl_decoder_base_attrs,
++};
++
++static struct attribute *cxl_decoder_root_attrs[] = {
++	&dev_attr_cap_pmem.attr,
++	&dev_attr_cap_ram.attr,
++	&dev_attr_cap_type2.attr,
++	&dev_attr_cap_type3.attr,
++	NULL,
++};
++
++static struct attribute_group cxl_decoder_root_attribute_group = {
++	.attrs = cxl_decoder_root_attrs,
++};
++
++static const struct attribute_group *cxl_decoder_root_attribute_groups[] = {
++	&cxl_decoder_root_attribute_group,
++	&cxl_decoder_base_attribute_group,
++	&cxl_base_attribute_group,
++	NULL,
++};
++
++static struct attribute *cxl_decoder_switch_attrs[] = {
++	&dev_attr_target_type.attr,
++	NULL,
++};
++
++static struct attribute_group cxl_decoder_switch_attribute_group = {
++	.attrs = cxl_decoder_switch_attrs,
++};
++
++static const struct attribute_group *cxl_decoder_switch_attribute_groups[] = {
++	&cxl_decoder_switch_attribute_group,
++	&cxl_decoder_base_attribute_group,
++	&cxl_base_attribute_group,
++	NULL,
++};
++
++static void cxl_decoder_release(struct device *dev)
++{
++	struct cxl_decoder *cxld = to_cxl_decoder(dev);
++	struct cxl_port *port = to_cxl_port(dev->parent);
++
++	ida_free(&port->decoder_ida, cxld->id);
++	kfree(cxld);
++}
++
++static const struct device_type cxl_decoder_switch_type = {
++	.name = "cxl_decoder_switch",
++	.release = cxl_decoder_release,
++	.groups = cxl_decoder_switch_attribute_groups,
++};
++
++static const struct device_type cxl_decoder_root_type = {
++	.name = "cxl_decoder_root",
++	.release = cxl_decoder_release,
++	.groups = cxl_decoder_root_attribute_groups,
++};
++
++bool is_root_decoder(struct device *dev)
++{
++	return dev->type == &cxl_decoder_root_type;
++}
++EXPORT_SYMBOL_GPL(is_root_decoder);
++
++struct cxl_decoder *to_cxl_decoder(struct device *dev)
++{
++	if (dev_WARN_ONCE(dev, dev->type->release != cxl_decoder_release,
++			  "not a cxl_decoder device\n"))
++		return NULL;
++	return container_of(dev, struct cxl_decoder, dev);
++}
++EXPORT_SYMBOL_GPL(to_cxl_decoder);
++
++static void cxl_dport_release(struct cxl_dport *dport)
++{
++	list_del(&dport->list);
++	put_device(dport->dport);
++	kfree(dport);
++}
++
++static void cxl_port_release(struct device *dev)
++{
++	struct cxl_port *port = to_cxl_port(dev);
++	struct cxl_dport *dport, *_d;
++
++	device_lock(dev);
++	list_for_each_entry_safe(dport, _d, &port->dports, list)
++		cxl_dport_release(dport);
++	device_unlock(dev);
++	ida_free(&cxl_port_ida, port->id);
++	kfree(port);
++}
++
++static const struct attribute_group *cxl_port_attribute_groups[] = {
++	&cxl_base_attribute_group,
++	NULL,
++};
++
++static const struct device_type cxl_port_type = {
++	.name = "cxl_port",
++	.release = cxl_port_release,
++	.groups = cxl_port_attribute_groups,
++};
++
++struct cxl_port *to_cxl_port(struct device *dev)
++{
++	if (dev_WARN_ONCE(dev, dev->type != &cxl_port_type,
++			  "not a cxl_port device\n"))
++		return NULL;
++	return container_of(dev, struct cxl_port, dev);
++}
++
++static void unregister_port(void *_port)
++{
++	struct cxl_port *port = _port;
++	struct cxl_dport *dport;
++
++	device_lock(&port->dev);
++	list_for_each_entry(dport, &port->dports, list) {
++		char link_name[CXL_TARGET_STRLEN];
++
++		if (snprintf(link_name, CXL_TARGET_STRLEN, "dport%d",
++			     dport->port_id) >= CXL_TARGET_STRLEN)
++			continue;
++		sysfs_remove_link(&port->dev.kobj, link_name);
++	}
++	device_unlock(&port->dev);
++	device_unregister(&port->dev);
++}
++
++static void cxl_unlink_uport(void *_port)
++{
++	struct cxl_port *port = _port;
++
++	sysfs_remove_link(&port->dev.kobj, "uport");
++}
++
++static int devm_cxl_link_uport(struct device *host, struct cxl_port *port)
++{
++	int rc;
++
++	rc = sysfs_create_link(&port->dev.kobj, &port->uport->kobj, "uport");
++	if (rc)
++		return rc;
++	return devm_add_action_or_reset(host, cxl_unlink_uport, port);
++}
++
++static struct cxl_port *cxl_port_alloc(struct device *uport,
++				       resource_size_t component_reg_phys,
++				       struct cxl_port *parent_port)
++{
++	struct cxl_port *port;
++	struct device *dev;
++	int rc;
++
++	port = kzalloc(sizeof(*port), GFP_KERNEL);
++	if (!port)
++		return ERR_PTR(-ENOMEM);
++
++	rc = ida_alloc(&cxl_port_ida, GFP_KERNEL);
++	if (rc < 0)
++		goto err;
++	port->id = rc;
++
++	/*
++	 * The top-level cxl_port "cxl_root" does not have a cxl_port as
++	 * its parent and it does not have any corresponding component
++	 * registers as its decode is described by a fixed platform
++	 * description.
++	 */
++	dev = &port->dev;
++	if (parent_port)
++		dev->parent = &parent_port->dev;
++	else
++		dev->parent = uport;
++
++	port->uport = uport;
++	port->component_reg_phys = component_reg_phys;
++	ida_init(&port->decoder_ida);
++	INIT_LIST_HEAD(&port->dports);
++
++	device_initialize(dev);
++	device_set_pm_not_required(dev);
++	dev->bus = &cxl_bus_type;
++	dev->type = &cxl_port_type;
++
++	return port;
++
++err:
++	kfree(port);
++	return ERR_PTR(rc);
++}
++
++/**
++ * devm_cxl_add_port - register a cxl_port in CXL memory decode hierarchy
++ * @host: host device for devm operations
++ * @uport: "physical" device implementing this upstream port
++ * @component_reg_phys: (optional) for configurable cxl_port instances
++ * @parent_port: next hop up in the CXL memory decode hierarchy
++ */
++struct cxl_port *devm_cxl_add_port(struct device *host, struct device *uport,
++				   resource_size_t component_reg_phys,
++				   struct cxl_port *parent_port)
++{
++	struct cxl_port *port;
++	struct device *dev;
++	int rc;
++
++	port = cxl_port_alloc(uport, component_reg_phys, parent_port);
++	if (IS_ERR(port))
++		return port;
++
++	dev = &port->dev;
++	if (parent_port)
++		rc = dev_set_name(dev, "port%d", port->id);
++	else
++		rc = dev_set_name(dev, "root%d", port->id);
++	if (rc)
++		goto err;
++
++	rc = device_add(dev);
++	if (rc)
++		goto err;
++
++	rc = devm_add_action_or_reset(host, unregister_port, port);
++	if (rc)
++		return ERR_PTR(rc);
++
++	rc = devm_cxl_link_uport(host, port);
++	if (rc)
++		return ERR_PTR(rc);
++
++	return port;
++
++err:
++	put_device(dev);
++	return ERR_PTR(rc);
++}
++EXPORT_SYMBOL_GPL(devm_cxl_add_port);
++
++static struct cxl_dport *find_dport(struct cxl_port *port, int id)
++{
++	struct cxl_dport *dport;
++
++	device_lock_assert(&port->dev);
++	list_for_each_entry (dport, &port->dports, list)
++		if (dport->port_id == id)
++			return dport;
++	return NULL;
++}
++
++static int add_dport(struct cxl_port *port, struct cxl_dport *new)
++{
++	struct cxl_dport *dup;
++
++	device_lock(&port->dev);
++	dup = find_dport(port, new->port_id);
++	if (dup)
++		dev_err(&port->dev,
++			"unable to add dport%d-%s non-unique port id (%s)\n",
++			new->port_id, dev_name(new->dport),
++			dev_name(dup->dport));
++	else
++		list_add_tail(&new->list, &port->dports);
++	device_unlock(&port->dev);
++
++	return dup ? -EEXIST : 0;
++}
++
++/**
++ * cxl_add_dport - append downstream port data to a cxl_port
++ * @port: the cxl_port that references this dport
++ * @dport_dev: firmware or PCI device representing the dport
++ * @port_id: identifier for this dport in a decoder's target list
++ * @component_reg_phys: optional location of CXL component registers
++ *
++ * Note that all allocations and links are undone by cxl_port deletion
++ * and release.
++ */
++int cxl_add_dport(struct cxl_port *port, struct device *dport_dev, int port_id,
++		  resource_size_t component_reg_phys)
++{
++	char link_name[CXL_TARGET_STRLEN];
++	struct cxl_dport *dport;
++	int rc;
++
++	if (snprintf(link_name, CXL_TARGET_STRLEN, "dport%d", port_id) >=
++	    CXL_TARGET_STRLEN)
++		return -EINVAL;
++
++	dport = kzalloc(sizeof(*dport), GFP_KERNEL);
++	if (!dport)
++		return -ENOMEM;
++
++	INIT_LIST_HEAD(&dport->list);
++	dport->dport = get_device(dport_dev);
++	dport->port_id = port_id;
++	dport->component_reg_phys = component_reg_phys;
++	dport->port = port;
++
++	rc = add_dport(port, dport);
++	if (rc)
++		goto err;
++
++	rc = sysfs_create_link(&port->dev.kobj, &dport_dev->kobj, link_name);
++	if (rc)
++		goto err;
++
++	return 0;
++err:
++	cxl_dport_release(dport);
++	return rc;
++}
++EXPORT_SYMBOL_GPL(cxl_add_dport);
++
++static struct cxl_decoder *
++cxl_decoder_alloc(struct cxl_port *port, int nr_targets, resource_size_t base,
++		  resource_size_t len, int interleave_ways,
++		  int interleave_granularity, enum cxl_decoder_type type,
++		  unsigned long flags)
++{
++	struct cxl_decoder *cxld;
++	struct device *dev;
++	int rc = 0;
++
++	if (interleave_ways < 1)
++		return ERR_PTR(-EINVAL);
++
++	device_lock(&port->dev);
++	if (list_empty(&port->dports))
++		rc = -EINVAL;
++	device_unlock(&port->dev);
++	if (rc)
++		return ERR_PTR(rc);
++
++	cxld = kzalloc(struct_size(cxld, target, nr_targets), GFP_KERNEL);
++	if (!cxld)
++		return ERR_PTR(-ENOMEM);
++
++	rc = ida_alloc(&port->decoder_ida, GFP_KERNEL);
++	if (rc < 0)
++		goto err;
++
++	*cxld = (struct cxl_decoder) {
++		.id = rc,
++		.range = {
++			.start = base,
++			.end = base + len - 1,
++		},
++		.flags = flags,
++		.interleave_ways = interleave_ways,
++		.interleave_granularity = interleave_granularity,
++		.target_type = type,
++	};
++
++	/* handle implied target_list */
++	if (interleave_ways == 1)
++		cxld->target[0] =
++			list_first_entry(&port->dports, struct cxl_dport, list);
++	dev = &cxld->dev;
++	device_initialize(dev);
++	device_set_pm_not_required(dev);
++	dev->parent = &port->dev;
++	dev->bus = &cxl_bus_type;
++
++	/* root ports do not have a cxl_port_type parent */
++	if (port->dev.parent->type == &cxl_port_type)
++		dev->type = &cxl_decoder_switch_type;
++	else
++		dev->type = &cxl_decoder_root_type;
++
++	return cxld;
++err:
++	kfree(cxld);
++	return ERR_PTR(rc);
++}
++
++static void unregister_dev(void *dev)
++{
++	device_unregister(dev);
++}
++
++struct cxl_decoder *
++devm_cxl_add_decoder(struct device *host, struct cxl_port *port, int nr_targets,
++		     resource_size_t base, resource_size_t len,
++		     int interleave_ways, int interleave_granularity,
++		     enum cxl_decoder_type type, unsigned long flags)
++{
++	struct cxl_decoder *cxld;
++	struct device *dev;
++	int rc;
++
++	cxld = cxl_decoder_alloc(port, nr_targets, base, len, interleave_ways,
++				 interleave_granularity, type, flags);
++	if (IS_ERR(cxld))
++		return cxld;
++
++	dev = &cxld->dev;
++	rc = dev_set_name(dev, "decoder%d.%d", port->id, cxld->id);
++	if (rc)
++		goto err;
++
++	rc = device_add(dev);
++	if (rc)
++		goto err;
++
++	rc = devm_add_action_or_reset(host, unregister_dev, dev);
++	if (rc)
++		return ERR_PTR(rc);
++	return cxld;
++
++err:
++	put_device(dev);
++	return ERR_PTR(rc);
++}
++EXPORT_SYMBOL_GPL(devm_cxl_add_decoder);
++
++/**
++ * cxl_probe_component_regs() - Detect CXL Component register blocks
++ * @dev: Host device of the @base mapping
++ * @base: Mapping containing the HDM Decoder Capability Header
++ * @map: Map object describing the register block information found
++ *
++ * See CXL 2.0 8.2.4 Component Register Layout and Definition
++ * See CXL 2.0 8.2.5.5 CXL Device Register Interface
++ *
++ * Probe for component register information and return it in map object.
++ */
++void cxl_probe_component_regs(struct device *dev, void __iomem *base,
++			      struct cxl_component_reg_map *map)
++{
++	int cap, cap_count;
++	u64 cap_array;
++
++	*map = (struct cxl_component_reg_map) { 0 };
++
++	/*
++	 * CXL.cache and CXL.mem registers are at offset 0x1000 as defined in
++	 * CXL 2.0 8.2.4 Table 141.
++	 */
++	base += CXL_CM_OFFSET;
++
++	cap_array = readq(base + CXL_CM_CAP_HDR_OFFSET);
++
++	if (FIELD_GET(CXL_CM_CAP_HDR_ID_MASK, cap_array) != CM_CAP_HDR_CAP_ID) {
++		dev_err(dev,
++			"Couldn't locate the CXL.cache and CXL.mem capability array header./n");
++		return;
++	}
++
++	/* It's assumed that future versions will be backward compatible */
++	cap_count = FIELD_GET(CXL_CM_CAP_HDR_ARRAY_SIZE_MASK, cap_array);
++
++	for (cap = 1; cap <= cap_count; cap++) {
++		void __iomem *register_block;
++		u32 hdr;
++		int decoder_cnt;
++		u16 cap_id, offset;
++		u32 length;
++
++		hdr = readl(base + cap * 0x4);
++
++		cap_id = FIELD_GET(CXL_CM_CAP_HDR_ID_MASK, hdr);
++		offset = FIELD_GET(CXL_CM_CAP_PTR_MASK, hdr);
++		register_block = base + offset;
++
++		switch (cap_id) {
++		case CXL_CM_CAP_CAP_ID_HDM:
++			dev_dbg(dev, "found HDM decoder capability (0x%x)\n",
++				offset);
++
++			hdr = readl(register_block);
++
++			decoder_cnt = cxl_hdm_decoder_count(hdr);
++			length = 0x20 * decoder_cnt + 0x10;
++
++			map->hdm_decoder.valid = true;
++			map->hdm_decoder.offset = CXL_CM_OFFSET + offset;
++			map->hdm_decoder.size = length;
++			break;
++		default:
++			dev_dbg(dev, "Unknown CM cap ID: %d (0x%x)\n", cap_id,
++				offset);
++			break;
++		}
++	}
++}
++EXPORT_SYMBOL_GPL(cxl_probe_component_regs);
++
++static void cxl_nvdimm_bridge_release(struct device *dev)
++{
++	struct cxl_nvdimm_bridge *cxl_nvb = to_cxl_nvdimm_bridge(dev);
++
++	kfree(cxl_nvb);
++}
++
++static const struct attribute_group *cxl_nvdimm_bridge_attribute_groups[] = {
++	&cxl_base_attribute_group,
++	NULL,
++};
++
++static const struct device_type cxl_nvdimm_bridge_type = {
++	.name = "cxl_nvdimm_bridge",
++	.release = cxl_nvdimm_bridge_release,
++	.groups = cxl_nvdimm_bridge_attribute_groups,
++};
++
++struct cxl_nvdimm_bridge *to_cxl_nvdimm_bridge(struct device *dev)
++{
++	if (dev_WARN_ONCE(dev, dev->type != &cxl_nvdimm_bridge_type,
++			  "not a cxl_nvdimm_bridge device\n"))
++		return NULL;
++	return container_of(dev, struct cxl_nvdimm_bridge, dev);
++}
++EXPORT_SYMBOL_GPL(to_cxl_nvdimm_bridge);
++
++static struct cxl_nvdimm_bridge *
++cxl_nvdimm_bridge_alloc(struct cxl_port *port)
++{
++	struct cxl_nvdimm_bridge *cxl_nvb;
++	struct device *dev;
++
++	cxl_nvb = kzalloc(sizeof(*cxl_nvb), GFP_KERNEL);
++	if (!cxl_nvb)
++		return ERR_PTR(-ENOMEM);
++
++	dev = &cxl_nvb->dev;
++	cxl_nvb->port = port;
++	cxl_nvb->state = CXL_NVB_NEW;
++	device_initialize(dev);
++	device_set_pm_not_required(dev);
++	dev->parent = &port->dev;
++	dev->bus = &cxl_bus_type;
++	dev->type = &cxl_nvdimm_bridge_type;
++
++	return cxl_nvb;
++}
++
++static void unregister_nvb(void *_cxl_nvb)
++{
++	struct cxl_nvdimm_bridge *cxl_nvb = _cxl_nvb;
++	bool flush;
++
++	/*
++	 * If the bridge was ever activated then there might be in-flight state
++	 * work to flush. Once the state has been changed to 'dead' then no new
++	 * work can be queued by user-triggered bind.
++	 */
++	device_lock(&cxl_nvb->dev);
++	flush = cxl_nvb->state != CXL_NVB_NEW;
++	cxl_nvb->state = CXL_NVB_DEAD;
++	device_unlock(&cxl_nvb->dev);
++
++	/*
++	 * Even though the device core will trigger device_release_driver()
++	 * before the unregister, it does not know about the fact that
++	 * cxl_nvdimm_bridge_driver defers ->remove() work. So, do the driver
++	 * release not and flush it before tearing down the nvdimm device
++	 * hierarchy.
++	 */
++	device_release_driver(&cxl_nvb->dev);
++	if (flush)
++		flush_work(&cxl_nvb->state_work);
++	device_unregister(&cxl_nvb->dev);
++}
++
++struct cxl_nvdimm_bridge *devm_cxl_add_nvdimm_bridge(struct device *host,
++						     struct cxl_port *port)
++{
++	struct cxl_nvdimm_bridge *cxl_nvb;
++	struct device *dev;
++	int rc;
++
++	if (!IS_ENABLED(CONFIG_CXL_PMEM))
++		return ERR_PTR(-ENXIO);
++
++	cxl_nvb = cxl_nvdimm_bridge_alloc(port);
++	if (IS_ERR(cxl_nvb))
++		return cxl_nvb;
++
++	dev = &cxl_nvb->dev;
++	rc = dev_set_name(dev, "nvdimm-bridge");
++	if (rc)
++		goto err;
++
++	rc = device_add(dev);
++	if (rc)
++		goto err;
++
++	rc = devm_add_action_or_reset(host, unregister_nvb, cxl_nvb);
++	if (rc)
++		return ERR_PTR(rc);
++
++	return cxl_nvb;
++
++err:
++	put_device(dev);
++	return ERR_PTR(rc);
++}
++EXPORT_SYMBOL_GPL(devm_cxl_add_nvdimm_bridge);
++
++static void cxl_nvdimm_release(struct device *dev)
++{
++	struct cxl_nvdimm *cxl_nvd = to_cxl_nvdimm(dev);
++
++	kfree(cxl_nvd);
++}
++
++static const struct attribute_group *cxl_nvdimm_attribute_groups[] = {
++	&cxl_base_attribute_group,
++	NULL,
++};
++
++static const struct device_type cxl_nvdimm_type = {
++	.name = "cxl_nvdimm",
++	.release = cxl_nvdimm_release,
++	.groups = cxl_nvdimm_attribute_groups,
++};
++
++bool is_cxl_nvdimm(struct device *dev)
++{
++	return dev->type == &cxl_nvdimm_type;
++}
++EXPORT_SYMBOL_GPL(is_cxl_nvdimm);
++
++struct cxl_nvdimm *to_cxl_nvdimm(struct device *dev)
++{
++	if (dev_WARN_ONCE(dev, !is_cxl_nvdimm(dev),
++			  "not a cxl_nvdimm device\n"))
++		return NULL;
++	return container_of(dev, struct cxl_nvdimm, dev);
++}
++EXPORT_SYMBOL_GPL(to_cxl_nvdimm);
++
++static struct cxl_nvdimm *cxl_nvdimm_alloc(struct cxl_memdev *cxlmd)
++{
++	struct cxl_nvdimm *cxl_nvd;
++	struct device *dev;
++
++	cxl_nvd = kzalloc(sizeof(*cxl_nvd), GFP_KERNEL);
++	if (!cxl_nvd)
++		return ERR_PTR(-ENOMEM);
++
++	dev = &cxl_nvd->dev;
++	cxl_nvd->cxlmd = cxlmd;
++	device_initialize(dev);
++	device_set_pm_not_required(dev);
++	dev->parent = &cxlmd->dev;
++	dev->bus = &cxl_bus_type;
++	dev->type = &cxl_nvdimm_type;
++
++	return cxl_nvd;
++}
++
++int devm_cxl_add_nvdimm(struct device *host, struct cxl_memdev *cxlmd)
++{
++	struct cxl_nvdimm *cxl_nvd;
++	struct device *dev;
++	int rc;
++
++	cxl_nvd = cxl_nvdimm_alloc(cxlmd);
++	if (IS_ERR(cxl_nvd))
++		return PTR_ERR(cxl_nvd);
++
++	dev = &cxl_nvd->dev;
++	rc = dev_set_name(dev, "pmem%d", cxlmd->id);
++	if (rc)
++		goto err;
++
++	rc = device_add(dev);
++	if (rc)
++		goto err;
++
++	dev_dbg(host, "%s: register %s\n", dev_name(dev->parent),
++		dev_name(dev));
++
++	return devm_add_action_or_reset(host, unregister_dev, dev);
++
++err:
++	put_device(dev);
++	return rc;
++}
++EXPORT_SYMBOL_GPL(devm_cxl_add_nvdimm);
++
++/**
++ * cxl_probe_device_regs() - Detect CXL Device register blocks
++ * @dev: Host device of the @base mapping
++ * @base: Mapping of CXL 2.0 8.2.8 CXL Device Register Interface
++ * @map: Map object describing the register block information found
++ *
++ * Probe for device register information and return it in map object.
++ */
++void cxl_probe_device_regs(struct device *dev, void __iomem *base,
++			   struct cxl_device_reg_map *map)
++{
++	int cap, cap_count;
++	u64 cap_array;
++
++	*map = (struct cxl_device_reg_map){ 0 };
++
++	cap_array = readq(base + CXLDEV_CAP_ARRAY_OFFSET);
++	if (FIELD_GET(CXLDEV_CAP_ARRAY_ID_MASK, cap_array) !=
++	    CXLDEV_CAP_ARRAY_CAP_ID)
++		return;
++
++	cap_count = FIELD_GET(CXLDEV_CAP_ARRAY_COUNT_MASK, cap_array);
++
++	for (cap = 1; cap <= cap_count; cap++) {
++		u32 offset, length;
++		u16 cap_id;
++
++		cap_id = FIELD_GET(CXLDEV_CAP_HDR_CAP_ID_MASK,
++				   readl(base + cap * 0x10));
++		offset = readl(base + cap * 0x10 + 0x4);
++		length = readl(base + cap * 0x10 + 0x8);
++
++		switch (cap_id) {
++		case CXLDEV_CAP_CAP_ID_DEVICE_STATUS:
++			dev_dbg(dev, "found Status capability (0x%x)\n", offset);
++
++			map->status.valid = true;
++			map->status.offset = offset;
++			map->status.size = length;
++			break;
++		case CXLDEV_CAP_CAP_ID_PRIMARY_MAILBOX:
++			dev_dbg(dev, "found Mailbox capability (0x%x)\n", offset);
++			map->mbox.valid = true;
++			map->mbox.offset = offset;
++			map->mbox.size = length;
++			break;
++		case CXLDEV_CAP_CAP_ID_SECONDARY_MAILBOX:
++			dev_dbg(dev, "found Secondary Mailbox capability (0x%x)\n", offset);
++			break;
++		case CXLDEV_CAP_CAP_ID_MEMDEV:
++			dev_dbg(dev, "found Memory Device capability (0x%x)\n", offset);
++			map->memdev.valid = true;
++			map->memdev.offset = offset;
++			map->memdev.size = length;
++			break;
++		default:
++			if (cap_id >= 0x8000)
++				dev_dbg(dev, "Vendor cap ID: %#x offset: %#x\n", cap_id, offset);
++			else
++				dev_dbg(dev, "Unknown cap ID: %#x offset: %#x\n", cap_id, offset);
++			break;
++		}
++	}
++}
++EXPORT_SYMBOL_GPL(cxl_probe_device_regs);
++
++static void __iomem *devm_cxl_iomap_block(struct device *dev,
++					  resource_size_t addr,
++					  resource_size_t length)
++{
++	void __iomem *ret_val;
++	struct resource *res;
++
++	res = devm_request_mem_region(dev, addr, length, dev_name(dev));
++	if (!res) {
++		resource_size_t end = addr + length - 1;
++
++		dev_err(dev, "Failed to request region %pa-%pa\n", &addr, &end);
++		return NULL;
++	}
++
++	ret_val = devm_ioremap(dev, addr, length);
++	if (!ret_val)
++		dev_err(dev, "Failed to map region %pr\n", res);
++
++	return ret_val;
++}
++
++int cxl_map_component_regs(struct pci_dev *pdev,
++			   struct cxl_component_regs *regs,
++			   struct cxl_register_map *map)
++{
++	struct device *dev = &pdev->dev;
++	resource_size_t phys_addr;
++	resource_size_t length;
++
++	phys_addr = pci_resource_start(pdev, map->barno);
++	phys_addr += map->block_offset;
++
++	phys_addr += map->component_map.hdm_decoder.offset;
++	length = map->component_map.hdm_decoder.size;
++	regs->hdm_decoder = devm_cxl_iomap_block(dev, phys_addr, length);
++	if (!regs->hdm_decoder)
++		return -ENOMEM;
++
++	return 0;
++}
++EXPORT_SYMBOL_GPL(cxl_map_component_regs);
++
++int cxl_map_device_regs(struct pci_dev *pdev,
++			struct cxl_device_regs *regs,
++			struct cxl_register_map *map)
++{
++	struct device *dev = &pdev->dev;
++	resource_size_t phys_addr;
++
++	phys_addr = pci_resource_start(pdev, map->barno);
++	phys_addr += map->block_offset;
++
++	if (map->device_map.status.valid) {
++		resource_size_t addr;
++		resource_size_t length;
++
++		addr = phys_addr + map->device_map.status.offset;
++		length = map->device_map.status.size;
++		regs->status = devm_cxl_iomap_block(dev, addr, length);
++		if (!regs->status)
++			return -ENOMEM;
++	}
++
++	if (map->device_map.mbox.valid) {
++		resource_size_t addr;
++		resource_size_t length;
++
++		addr = phys_addr + map->device_map.mbox.offset;
++		length = map->device_map.mbox.size;
++		regs->mbox = devm_cxl_iomap_block(dev, addr, length);
++		if (!regs->mbox)
++			return -ENOMEM;
++	}
++
++	if (map->device_map.memdev.valid) {
++		resource_size_t addr;
++		resource_size_t length;
++
++		addr = phys_addr + map->device_map.memdev.offset;
++		length = map->device_map.memdev.size;
++		regs->memdev = devm_cxl_iomap_block(dev, addr, length);
++		if (!regs->memdev)
++			return -ENOMEM;
++	}
++
++	return 0;
++}
++EXPORT_SYMBOL_GPL(cxl_map_device_regs);
++
++/**
++ * __cxl_driver_register - register a driver for the cxl bus
++ * @cxl_drv: cxl driver structure to attach
++ * @owner: owning module/driver
++ * @modname: KBUILD_MODNAME for parent driver
++ */
++int __cxl_driver_register(struct cxl_driver *cxl_drv, struct module *owner,
++			  const char *modname)
++{
++	if (!cxl_drv->probe) {
++		pr_debug("%s ->probe() must be specified\n", modname);
++		return -EINVAL;
++	}
++
++	if (!cxl_drv->name) {
++		pr_debug("%s ->name must be specified\n", modname);
++		return -EINVAL;
++	}
++
++	if (!cxl_drv->id) {
++		pr_debug("%s ->id must be specified\n", modname);
++		return -EINVAL;
++	}
++
++	cxl_drv->drv.bus = &cxl_bus_type;
++	cxl_drv->drv.owner = owner;
++	cxl_drv->drv.mod_name = modname;
++	cxl_drv->drv.name = cxl_drv->name;
++
++	return driver_register(&cxl_drv->drv);
++}
++EXPORT_SYMBOL_GPL(__cxl_driver_register);
++
++void cxl_driver_unregister(struct cxl_driver *cxl_drv)
++{
++	driver_unregister(&cxl_drv->drv);
++}
++EXPORT_SYMBOL_GPL(cxl_driver_unregister);
++
++static int cxl_device_id(struct device *dev)
++{
++	if (dev->type == &cxl_nvdimm_bridge_type)
++		return CXL_DEVICE_NVDIMM_BRIDGE;
++	if (dev->type == &cxl_nvdimm_type)
++		return CXL_DEVICE_NVDIMM;
++	return 0;
++}
++
++static int cxl_bus_uevent(struct device *dev, struct kobj_uevent_env *env)
++{
++	return add_uevent_var(env, "MODALIAS=" CXL_MODALIAS_FMT,
++			      cxl_device_id(dev));
++}
++
++static int cxl_bus_match(struct device *dev, struct device_driver *drv)
++{
++	return cxl_device_id(dev) == to_cxl_drv(drv)->id;
++}
++
++static int cxl_bus_probe(struct device *dev)
++{
++	return to_cxl_drv(dev->driver)->probe(dev);
++}
++
++static int cxl_bus_remove(struct device *dev)
++{
++	struct cxl_driver *cxl_drv = to_cxl_drv(dev->driver);
++
++	if (cxl_drv->remove)
++		cxl_drv->remove(dev);
++	return 0;
++}
++
++struct bus_type cxl_bus_type = {
++	.name = "cxl",
++	.uevent = cxl_bus_uevent,
++	.match = cxl_bus_match,
++	.probe = cxl_bus_probe,
++	.remove = cxl_bus_remove,
++};
++EXPORT_SYMBOL_GPL(cxl_bus_type);
++
++static __init int cxl_core_init(void)
++{
++	return bus_register(&cxl_bus_type);
++}
++
++static void cxl_core_exit(void)
++{
++	bus_unregister(&cxl_bus_type);
++}
++
++module_init(cxl_core_init);
++module_exit(cxl_core_exit);
++MODULE_LICENSE("GPL v2");
+diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h
+new file mode 100644
+index 0000000000000..0cd463de13423
+--- /dev/null
++++ b/drivers/cxl/cxlmem.h
+@@ -0,0 +1,96 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++/* Copyright(c) 2020-2021 Intel Corporation. */
++#ifndef __CXL_MEM_H__
++#define __CXL_MEM_H__
++#include <linux/cdev.h>
++#include "cxl.h"
++
++/* CXL 2.0 8.2.8.5.1.1 Memory Device Status Register */
++#define CXLMDEV_STATUS_OFFSET 0x0
++#define   CXLMDEV_DEV_FATAL BIT(0)
++#define   CXLMDEV_FW_HALT BIT(1)
++#define   CXLMDEV_STATUS_MEDIA_STATUS_MASK GENMASK(3, 2)
++#define     CXLMDEV_MS_NOT_READY 0
++#define     CXLMDEV_MS_READY 1
++#define     CXLMDEV_MS_ERROR 2
++#define     CXLMDEV_MS_DISABLED 3
++#define CXLMDEV_READY(status)                                                  \
++	(FIELD_GET(CXLMDEV_STATUS_MEDIA_STATUS_MASK, status) ==                \
++	 CXLMDEV_MS_READY)
++#define   CXLMDEV_MBOX_IF_READY BIT(4)
++#define   CXLMDEV_RESET_NEEDED_MASK GENMASK(7, 5)
++#define     CXLMDEV_RESET_NEEDED_NOT 0
++#define     CXLMDEV_RESET_NEEDED_COLD 1
++#define     CXLMDEV_RESET_NEEDED_WARM 2
++#define     CXLMDEV_RESET_NEEDED_HOT 3
++#define     CXLMDEV_RESET_NEEDED_CXL 4
++#define CXLMDEV_RESET_NEEDED(status)                                           \
++	(FIELD_GET(CXLMDEV_RESET_NEEDED_MASK, status) !=                       \
++	 CXLMDEV_RESET_NEEDED_NOT)
++
++/*
++ * An entire PCI topology full of devices should be enough for any
++ * config
++ */
++#define CXL_MEM_MAX_DEVS 65536
++
++/**
++ * struct cdevm_file_operations - devm coordinated cdev file operations
++ * @fops: file operations that are synchronized against @shutdown
++ * @shutdown: disconnect driver data
++ *
++ * @shutdown is invoked in the devres release path to disconnect any
++ * driver instance data from @dev. It assumes synchronization with any
++ * fops operation that requires driver data. After @shutdown an
++ * operation may only reference @device data.
++ */
++struct cdevm_file_operations {
++	struct file_operations fops;
++	void (*shutdown)(struct device *dev);
++};
++
++/**
++ * struct cxl_memdev - CXL bus object representing a Type-3 Memory Device
++ * @dev: driver core device object
++ * @cdev: char dev core object for ioctl operations
++ * @cxlm: pointer to the parent device driver data
++ * @id: id number of this memdev instance.
++ */
++struct cxl_memdev {
++	struct device dev;
++	struct cdev cdev;
++	struct cxl_mem *cxlm;
++	int id;
++};
++
++/**
++ * struct cxl_mem - A CXL memory device
++ * @pdev: The PCI device associated with this CXL device.
++ * @cxlmd: Logical memory device chardev / interface
++ * @regs: Parsed register blocks
++ * @payload_size: Size of space for payload
++ *                (CXL 2.0 8.2.8.4.3 Mailbox Capabilities Register)
++ * @lsa_size: Size of Label Storage Area
++ *                (CXL 2.0 8.2.9.5.1.1 Identify Memory Device)
++ * @mbox_mutex: Mutex to synchronize mailbox access.
++ * @firmware_version: Firmware version for the memory device.
++ * @enabled_cmds: Hardware commands found enabled in CEL.
++ * @pmem_range: Persistent memory capacity information.
++ * @ram_range: Volatile memory capacity information.
++ */
++struct cxl_mem {
++	struct pci_dev *pdev;
++	struct cxl_memdev *cxlmd;
++
++	struct cxl_regs regs;
++
++	size_t payload_size;
++	size_t lsa_size;
++	struct mutex mbox_mutex; /* Protects device mailbox and firmware */
++	char firmware_version[0x10];
++	unsigned long *enabled_cmds;
++
++	struct range pmem_range;
++	struct range ram_range;
++};
++#endif /* __CXL_MEM_H__ */
+diff --git a/drivers/cxl/mem.h b/drivers/cxl/mem.h
+deleted file mode 100644
+index 8f02d02b26b45..0000000000000
+--- a/drivers/cxl/mem.h
++++ /dev/null
+@@ -1,81 +0,0 @@
+-/* SPDX-License-Identifier: GPL-2.0-only */
+-/* Copyright(c) 2020-2021 Intel Corporation. */
+-#ifndef __CXL_MEM_H__
+-#define __CXL_MEM_H__
+-#include <linux/cdev.h>
+-#include "cxl.h"
+-
+-/* CXL 2.0 8.2.8.5.1.1 Memory Device Status Register */
+-#define CXLMDEV_STATUS_OFFSET 0x0
+-#define   CXLMDEV_DEV_FATAL BIT(0)
+-#define   CXLMDEV_FW_HALT BIT(1)
+-#define   CXLMDEV_STATUS_MEDIA_STATUS_MASK GENMASK(3, 2)
+-#define     CXLMDEV_MS_NOT_READY 0
+-#define     CXLMDEV_MS_READY 1
+-#define     CXLMDEV_MS_ERROR 2
+-#define     CXLMDEV_MS_DISABLED 3
+-#define CXLMDEV_READY(status)                                                  \
+-	(FIELD_GET(CXLMDEV_STATUS_MEDIA_STATUS_MASK, status) ==                \
+-	 CXLMDEV_MS_READY)
+-#define   CXLMDEV_MBOX_IF_READY BIT(4)
+-#define   CXLMDEV_RESET_NEEDED_MASK GENMASK(7, 5)
+-#define     CXLMDEV_RESET_NEEDED_NOT 0
+-#define     CXLMDEV_RESET_NEEDED_COLD 1
+-#define     CXLMDEV_RESET_NEEDED_WARM 2
+-#define     CXLMDEV_RESET_NEEDED_HOT 3
+-#define     CXLMDEV_RESET_NEEDED_CXL 4
+-#define CXLMDEV_RESET_NEEDED(status)                                           \
+-	(FIELD_GET(CXLMDEV_RESET_NEEDED_MASK, status) !=                       \
+-	 CXLMDEV_RESET_NEEDED_NOT)
+-
+-/*
+- * An entire PCI topology full of devices should be enough for any
+- * config
+- */
+-#define CXL_MEM_MAX_DEVS 65536
+-
+-/**
+- * struct cxl_memdev - CXL bus object representing a Type-3 Memory Device
+- * @dev: driver core device object
+- * @cdev: char dev core object for ioctl operations
+- * @cxlm: pointer to the parent device driver data
+- * @id: id number of this memdev instance.
+- */
+-struct cxl_memdev {
+-	struct device dev;
+-	struct cdev cdev;
+-	struct cxl_mem *cxlm;
+-	int id;
+-};
+-
+-/**
+- * struct cxl_mem - A CXL memory device
+- * @pdev: The PCI device associated with this CXL device.
+- * @cxlmd: Logical memory device chardev / interface
+- * @regs: Parsed register blocks
+- * @payload_size: Size of space for payload
+- *                (CXL 2.0 8.2.8.4.3 Mailbox Capabilities Register)
+- * @lsa_size: Size of Label Storage Area
+- *                (CXL 2.0 8.2.9.5.1.1 Identify Memory Device)
+- * @mbox_mutex: Mutex to synchronize mailbox access.
+- * @firmware_version: Firmware version for the memory device.
+- * @enabled_cmds: Hardware commands found enabled in CEL.
+- * @pmem_range: Persistent memory capacity information.
+- * @ram_range: Volatile memory capacity information.
+- */
+-struct cxl_mem {
+-	struct pci_dev *pdev;
+-	struct cxl_memdev *cxlmd;
+-
+-	struct cxl_regs regs;
+-
+-	size_t payload_size;
+-	size_t lsa_size;
+-	struct mutex mbox_mutex; /* Protects device mailbox and firmware */
+-	char firmware_version[0x10];
+-	unsigned long *enabled_cmds;
+-
+-	struct range pmem_range;
+-	struct range ram_range;
+-};
+-#endif /* __CXL_MEM_H__ */
+diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c
+index 145ad4bc305fc..e809596049b66 100644
+--- a/drivers/cxl/pci.c
++++ b/drivers/cxl/pci.c
+@@ -12,9 +12,9 @@
+ #include <linux/pci.h>
+ #include <linux/io.h>
+ #include <linux/io-64-nonatomic-lo-hi.h>
++#include "cxlmem.h"
+ #include "pci.h"
+ #include "cxl.h"
+-#include "mem.h"
+ 
+ /**
+  * DOC: cxl pci
+@@ -806,13 +806,30 @@ static int cxl_memdev_release_file(struct inode *inode, struct file *file)
+ 	return 0;
+ }
+ 
+-static const struct file_operations cxl_memdev_fops = {
+-	.owner = THIS_MODULE,
+-	.unlocked_ioctl = cxl_memdev_ioctl,
+-	.open = cxl_memdev_open,
+-	.release = cxl_memdev_release_file,
+-	.compat_ioctl = compat_ptr_ioctl,
+-	.llseek = noop_llseek,
++static struct cxl_memdev *to_cxl_memdev(struct device *dev)
++{
++	return container_of(dev, struct cxl_memdev, dev);
++}
++
++static void cxl_memdev_shutdown(struct device *dev)
++{
++	struct cxl_memdev *cxlmd = to_cxl_memdev(dev);
++
++	down_write(&cxl_memdev_rwsem);
++	cxlmd->cxlm = NULL;
++	up_write(&cxl_memdev_rwsem);
++}
++
++static const struct cdevm_file_operations cxl_memdev_fops = {
++	.fops = {
++		.owner = THIS_MODULE,
++		.unlocked_ioctl = cxl_memdev_ioctl,
++		.open = cxl_memdev_open,
++		.release = cxl_memdev_release_file,
++		.compat_ioctl = compat_ptr_ioctl,
++		.llseek = noop_llseek,
++	},
++	.shutdown = cxl_memdev_shutdown,
+ };
+ 
+ static inline struct cxl_mem_command *cxl_mem_find_command(u16 opcode)
+@@ -1161,11 +1178,6 @@ free_maps:
+ 	return ret;
+ }
+ 
+-static struct cxl_memdev *to_cxl_memdev(struct device *dev)
+-{
+-	return container_of(dev, struct cxl_memdev, dev);
+-}
+-
+ static void cxl_memdev_release(struct device *dev)
+ {
+ 	struct cxl_memdev *cxlmd = to_cxl_memdev(dev);
+@@ -1281,24 +1293,22 @@ static const struct device_type cxl_memdev_type = {
+ 	.groups = cxl_memdev_attribute_groups,
+ };
+ 
+-static void cxl_memdev_shutdown(struct cxl_memdev *cxlmd)
+-{
+-	down_write(&cxl_memdev_rwsem);
+-	cxlmd->cxlm = NULL;
+-	up_write(&cxl_memdev_rwsem);
+-}
+-
+ static void cxl_memdev_unregister(void *_cxlmd)
+ {
+ 	struct cxl_memdev *cxlmd = _cxlmd;
+ 	struct device *dev = &cxlmd->dev;
++	struct cdev *cdev = &cxlmd->cdev;
++	const struct cdevm_file_operations *cdevm_fops;
++
++	cdevm_fops = container_of(cdev->ops, typeof(*cdevm_fops), fops);
++	cdevm_fops->shutdown(dev);
+ 
+ 	cdev_device_del(&cxlmd->cdev, dev);
+-	cxl_memdev_shutdown(cxlmd);
+ 	put_device(dev);
+ }
+ 
+-static struct cxl_memdev *cxl_memdev_alloc(struct cxl_mem *cxlm)
++static struct cxl_memdev *cxl_memdev_alloc(struct cxl_mem *cxlm,
++					   const struct file_operations *fops)
+ {
+ 	struct pci_dev *pdev = cxlm->pdev;
+ 	struct cxl_memdev *cxlmd;
+@@ -1324,7 +1334,7 @@ static struct cxl_memdev *cxl_memdev_alloc(struct cxl_mem *cxlm)
+ 	device_set_pm_not_required(dev);
+ 
+ 	cdev = &cxlmd->cdev;
+-	cdev_init(cdev, &cxl_memdev_fops);
++	cdev_init(cdev, fops);
+ 	return cxlmd;
+ 
+ err:
+@@ -1332,15 +1342,16 @@ err:
+ 	return ERR_PTR(rc);
+ }
+ 
+-static struct cxl_memdev *devm_cxl_add_memdev(struct device *host,
+-					      struct cxl_mem *cxlm)
++static struct cxl_memdev *
++devm_cxl_add_memdev(struct device *host, struct cxl_mem *cxlm,
++		    const struct cdevm_file_operations *cdevm_fops)
+ {
+ 	struct cxl_memdev *cxlmd;
+ 	struct device *dev;
+ 	struct cdev *cdev;
+ 	int rc;
+ 
+-	cxlmd = cxl_memdev_alloc(cxlm);
++	cxlmd = cxl_memdev_alloc(cxlm, &cdevm_fops->fops);
+ 	if (IS_ERR(cxlmd))
+ 		return cxlmd;
+ 
+@@ -1370,7 +1381,7 @@ err:
+ 	 * The cdev was briefly live, shutdown any ioctl operations that
+ 	 * saw that state.
+ 	 */
+-	cxl_memdev_shutdown(cxlmd);
++	cdevm_fops->shutdown(dev);
+ 	put_device(dev);
+ 	return ERR_PTR(rc);
+ }
+@@ -1611,7 +1622,7 @@ static int cxl_mem_probe(struct pci_dev *pdev, const struct pci_device_id *id)
+ 	if (rc)
+ 		return rc;
+ 
+-	cxlmd = devm_cxl_add_memdev(&pdev->dev, cxlm);
++	cxlmd = devm_cxl_add_memdev(&pdev->dev, cxlm, &cxl_memdev_fops);
+ 	if (IS_ERR(cxlmd))
+ 		return PTR_ERR(cxlmd);
+ 
+diff --git a/drivers/cxl/pmem.c b/drivers/cxl/pmem.c
+index 0088e41dd2f32..9652c3ee41e7f 100644
+--- a/drivers/cxl/pmem.c
++++ b/drivers/cxl/pmem.c
+@@ -6,7 +6,7 @@
+ #include <linux/ndctl.h>
+ #include <linux/async.h>
+ #include <linux/slab.h>
+-#include "mem.h"
++#include "cxlmem.h"
+ #include "cxl.h"
+ 
+ /*
+diff --git a/drivers/dma-buf/Kconfig b/drivers/dma-buf/Kconfig
+index 4e16c71c24b71..6eb4d13f426ee 100644
+--- a/drivers/dma-buf/Kconfig
++++ b/drivers/dma-buf/Kconfig
+@@ -42,6 +42,7 @@ config UDMABUF
+ config DMABUF_MOVE_NOTIFY
+ 	bool "Move notify between drivers (EXPERIMENTAL)"
+ 	default n
++	depends on DMA_SHARED_BUFFER
+ 	help
+ 	  Don't pin buffers if the dynamic DMA-buf interface is available on
+ 	  both the exporter as well as the importer. This fixes a security
+@@ -52,6 +53,7 @@ config DMABUF_MOVE_NOTIFY
+ 
+ config DMABUF_DEBUG
+ 	bool "DMA-BUF debug checks"
++	depends on DMA_SHARED_BUFFER
+ 	default y if DMA_API_DEBUG
+ 	help
+ 	  This option enables additional checks for DMA-BUF importers and
+diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
+index 39b5b46e880f2..4f70cf57471a9 100644
+--- a/drivers/dma/Kconfig
++++ b/drivers/dma/Kconfig
+@@ -279,7 +279,7 @@ config INTEL_IDMA64
+ 
+ config INTEL_IDXD
+ 	tristate "Intel Data Accelerators support"
+-	depends on PCI && X86_64
++	depends on PCI && X86_64 && !UML
+ 	depends on PCI_MSI
+ 	depends on SBITMAP
+ 	select DMA_ENGINE
+@@ -315,7 +315,7 @@ config INTEL_IDXD_PERFMON
+ 
+ config INTEL_IOATDMA
+ 	tristate "Intel I/OAT DMA support"
+-	depends on PCI && X86_64
++	depends on PCI && X86_64 && !UML
+ 	select DMA_ENGINE
+ 	select DMA_ENGINE_RAID
+ 	select DCA
+diff --git a/drivers/dma/acpi-dma.c b/drivers/dma/acpi-dma.c
+index 235f1396f9686..52768dc8ce124 100644
+--- a/drivers/dma/acpi-dma.c
++++ b/drivers/dma/acpi-dma.c
+@@ -70,10 +70,14 @@ static int acpi_dma_parse_resource_group(const struct acpi_csrt_group *grp,
+ 
+ 	si = (const struct acpi_csrt_shared_info *)&grp[1];
+ 
+-	/* Match device by MMIO and IRQ */
++	/* Match device by MMIO */
+ 	if (si->mmio_base_low != lower_32_bits(mem) ||
+-	    si->mmio_base_high != upper_32_bits(mem) ||
+-	    si->gsi_interrupt != irq)
++	    si->mmio_base_high != upper_32_bits(mem))
++		return 0;
++
++	/* Match device by Linux vIRQ */
++	ret = acpi_register_gsi(NULL, si->gsi_interrupt, si->interrupt_mode, si->interrupt_polarity);
++	if (ret != irq)
+ 		return 0;
+ 
+ 	dev_dbg(&adev->dev, "matches with %.4s%04X (rev %u)\n",
+diff --git a/drivers/dma/idxd/device.c b/drivers/dma/idxd/device.c
+index 420b93fe5febc..9c6760ae5aef2 100644
+--- a/drivers/dma/idxd/device.c
++++ b/drivers/dma/idxd/device.c
+@@ -15,6 +15,8 @@
+ 
+ static void idxd_cmd_exec(struct idxd_device *idxd, int cmd_code, u32 operand,
+ 			  u32 *status);
++static void idxd_device_wqs_clear_state(struct idxd_device *idxd);
++static void idxd_wq_disable_cleanup(struct idxd_wq *wq);
+ 
+ /* Interrupt control bits */
+ void idxd_mask_msix_vector(struct idxd_device *idxd, int vec_id)
+@@ -234,7 +236,7 @@ int idxd_wq_enable(struct idxd_wq *wq)
+ 	return 0;
+ }
+ 
+-int idxd_wq_disable(struct idxd_wq *wq)
++int idxd_wq_disable(struct idxd_wq *wq, bool reset_config)
+ {
+ 	struct idxd_device *idxd = wq->idxd;
+ 	struct device *dev = &idxd->pdev->dev;
+@@ -255,6 +257,8 @@ int idxd_wq_disable(struct idxd_wq *wq)
+ 		return -ENXIO;
+ 	}
+ 
++	if (reset_config)
++		idxd_wq_disable_cleanup(wq);
+ 	wq->state = IDXD_WQ_DISABLED;
+ 	dev_dbg(dev, "WQ %d disabled\n", wq->id);
+ 	return 0;
+@@ -289,6 +293,7 @@ void idxd_wq_reset(struct idxd_wq *wq)
+ 
+ 	operand = BIT(wq->id % 16) | ((wq->id / 16) << 16);
+ 	idxd_cmd_exec(idxd, IDXD_CMD_RESET_WQ, operand, NULL);
++	idxd_wq_disable_cleanup(wq);
+ 	wq->state = IDXD_WQ_DISABLED;
+ }
+ 
+@@ -337,7 +342,7 @@ int idxd_wq_set_pasid(struct idxd_wq *wq, int pasid)
+ 	unsigned int offset;
+ 	unsigned long flags;
+ 
+-	rc = idxd_wq_disable(wq);
++	rc = idxd_wq_disable(wq, false);
+ 	if (rc < 0)
+ 		return rc;
+ 
+@@ -364,7 +369,7 @@ int idxd_wq_disable_pasid(struct idxd_wq *wq)
+ 	unsigned int offset;
+ 	unsigned long flags;
+ 
+-	rc = idxd_wq_disable(wq);
++	rc = idxd_wq_disable(wq, false);
+ 	if (rc < 0)
+ 		return rc;
+ 
+@@ -383,11 +388,11 @@ int idxd_wq_disable_pasid(struct idxd_wq *wq)
+ 	return 0;
+ }
+ 
+-void idxd_wq_disable_cleanup(struct idxd_wq *wq)
++static void idxd_wq_disable_cleanup(struct idxd_wq *wq)
+ {
+ 	struct idxd_device *idxd = wq->idxd;
+ 
+-	lockdep_assert_held(&idxd->dev_lock);
++	lockdep_assert_held(&wq->wq_lock);
+ 	memset(wq->wqcfg, 0, idxd->wqcfg_size);
+ 	wq->type = IDXD_WQT_NONE;
+ 	wq->size = 0;
+@@ -396,6 +401,7 @@ void idxd_wq_disable_cleanup(struct idxd_wq *wq)
+ 	wq->priority = 0;
+ 	wq->ats_dis = 0;
+ 	clear_bit(WQ_FLAG_DEDICATED, &wq->flags);
++	clear_bit(WQ_FLAG_BLOCK_ON_FAULT, &wq->flags);
+ 	memset(wq->name, 0, WQ_NAME_SIZE);
+ }
+ 
+@@ -481,6 +487,7 @@ static void idxd_cmd_exec(struct idxd_device *idxd, int cmd_code, u32 operand,
+ 	union idxd_command_reg cmd;
+ 	DECLARE_COMPLETION_ONSTACK(done);
+ 	unsigned long flags;
++	u32 stat;
+ 
+ 	if (idxd_device_is_halted(idxd)) {
+ 		dev_warn(&idxd->pdev->dev, "Device is HALTED!\n");
+@@ -513,11 +520,11 @@ static void idxd_cmd_exec(struct idxd_device *idxd, int cmd_code, u32 operand,
+ 	 */
+ 	spin_unlock_irqrestore(&idxd->cmd_lock, flags);
+ 	wait_for_completion(&done);
++	stat = ioread32(idxd->reg_base + IDXD_CMDSTS_OFFSET);
+ 	spin_lock_irqsave(&idxd->cmd_lock, flags);
+-	if (status) {
+-		*status = ioread32(idxd->reg_base + IDXD_CMDSTS_OFFSET);
+-		idxd->cmd_status = *status & GENMASK(7, 0);
+-	}
++	if (status)
++		*status = stat;
++	idxd->cmd_status = stat & GENMASK(7, 0);
+ 
+ 	__clear_bit(IDXD_FLAG_CMD_RUNNING, &idxd->flags);
+ 	/* Wake up other pending commands */
+@@ -548,22 +555,6 @@ int idxd_device_enable(struct idxd_device *idxd)
+ 	return 0;
+ }
+ 
+-void idxd_device_wqs_clear_state(struct idxd_device *idxd)
+-{
+-	int i;
+-
+-	lockdep_assert_held(&idxd->dev_lock);
+-
+-	for (i = 0; i < idxd->max_wqs; i++) {
+-		struct idxd_wq *wq = idxd->wqs[i];
+-
+-		if (wq->state == IDXD_WQ_ENABLED) {
+-			idxd_wq_disable_cleanup(wq);
+-			wq->state = IDXD_WQ_DISABLED;
+-		}
+-	}
+-}
+-
+ int idxd_device_disable(struct idxd_device *idxd)
+ {
+ 	struct device *dev = &idxd->pdev->dev;
+@@ -585,7 +576,7 @@ int idxd_device_disable(struct idxd_device *idxd)
+ 	}
+ 
+ 	spin_lock_irqsave(&idxd->dev_lock, flags);
+-	idxd_device_wqs_clear_state(idxd);
++	idxd_device_clear_state(idxd);
+ 	idxd->state = IDXD_DEV_CONF_READY;
+ 	spin_unlock_irqrestore(&idxd->dev_lock, flags);
+ 	return 0;
+@@ -597,7 +588,7 @@ void idxd_device_reset(struct idxd_device *idxd)
+ 
+ 	idxd_cmd_exec(idxd, IDXD_CMD_RESET_DEVICE, 0, NULL);
+ 	spin_lock_irqsave(&idxd->dev_lock, flags);
+-	idxd_device_wqs_clear_state(idxd);
++	idxd_device_clear_state(idxd);
+ 	idxd->state = IDXD_DEV_CONF_READY;
+ 	spin_unlock_irqrestore(&idxd->dev_lock, flags);
+ }
+@@ -685,6 +676,59 @@ int idxd_device_release_int_handle(struct idxd_device *idxd, int handle,
+ }
+ 
+ /* Device configuration bits */
++static void idxd_engines_clear_state(struct idxd_device *idxd)
++{
++	struct idxd_engine *engine;
++	int i;
++
++	lockdep_assert_held(&idxd->dev_lock);
++	for (i = 0; i < idxd->max_engines; i++) {
++		engine = idxd->engines[i];
++		engine->group = NULL;
++	}
++}
++
++static void idxd_groups_clear_state(struct idxd_device *idxd)
++{
++	struct idxd_group *group;
++	int i;
++
++	lockdep_assert_held(&idxd->dev_lock);
++	for (i = 0; i < idxd->max_groups; i++) {
++		group = idxd->groups[i];
++		memset(&group->grpcfg, 0, sizeof(group->grpcfg));
++		group->num_engines = 0;
++		group->num_wqs = 0;
++		group->use_token_limit = false;
++		group->tokens_allowed = 0;
++		group->tokens_reserved = 0;
++		group->tc_a = -1;
++		group->tc_b = -1;
++	}
++}
++
++static void idxd_device_wqs_clear_state(struct idxd_device *idxd)
++{
++	int i;
++
++	lockdep_assert_held(&idxd->dev_lock);
++	for (i = 0; i < idxd->max_wqs; i++) {
++		struct idxd_wq *wq = idxd->wqs[i];
++
++		if (wq->state == IDXD_WQ_ENABLED) {
++			idxd_wq_disable_cleanup(wq);
++			wq->state = IDXD_WQ_DISABLED;
++		}
++	}
++}
++
++void idxd_device_clear_state(struct idxd_device *idxd)
++{
++	idxd_groups_clear_state(idxd);
++	idxd_engines_clear_state(idxd);
++	idxd_device_wqs_clear_state(idxd);
++}
++
+ void idxd_msix_perm_setup(struct idxd_device *idxd)
+ {
+ 	union msix_perm mperm;
+diff --git a/drivers/dma/idxd/idxd.h b/drivers/dma/idxd/idxd.h
+index fc708be7ad9a2..0f27374eae4b3 100644
+--- a/drivers/dma/idxd/idxd.h
++++ b/drivers/dma/idxd/idxd.h
+@@ -428,9 +428,8 @@ int idxd_device_init_reset(struct idxd_device *idxd);
+ int idxd_device_enable(struct idxd_device *idxd);
+ int idxd_device_disable(struct idxd_device *idxd);
+ void idxd_device_reset(struct idxd_device *idxd);
+-void idxd_device_cleanup(struct idxd_device *idxd);
++void idxd_device_clear_state(struct idxd_device *idxd);
+ int idxd_device_config(struct idxd_device *idxd);
+-void idxd_device_wqs_clear_state(struct idxd_device *idxd);
+ void idxd_device_drain_pasid(struct idxd_device *idxd, int pasid);
+ int idxd_device_load_config(struct idxd_device *idxd);
+ int idxd_device_request_int_handle(struct idxd_device *idxd, int idx, int *handle,
+@@ -443,12 +442,11 @@ void idxd_wqs_unmap_portal(struct idxd_device *idxd);
+ int idxd_wq_alloc_resources(struct idxd_wq *wq);
+ void idxd_wq_free_resources(struct idxd_wq *wq);
+ int idxd_wq_enable(struct idxd_wq *wq);
+-int idxd_wq_disable(struct idxd_wq *wq);
++int idxd_wq_disable(struct idxd_wq *wq, bool reset_config);
+ void idxd_wq_drain(struct idxd_wq *wq);
+ void idxd_wq_reset(struct idxd_wq *wq);
+ int idxd_wq_map_portal(struct idxd_wq *wq);
+ void idxd_wq_unmap_portal(struct idxd_wq *wq);
+-void idxd_wq_disable_cleanup(struct idxd_wq *wq);
+ int idxd_wq_set_pasid(struct idxd_wq *wq, int pasid);
+ int idxd_wq_disable_pasid(struct idxd_wq *wq);
+ void idxd_wq_quiesce(struct idxd_wq *wq);
+diff --git a/drivers/dma/idxd/irq.c b/drivers/dma/idxd/irq.c
+index 4e3a7198c0caf..ba839d3569cdf 100644
+--- a/drivers/dma/idxd/irq.c
++++ b/drivers/dma/idxd/irq.c
+@@ -59,7 +59,7 @@ static void idxd_device_reinit(struct work_struct *work)
+ 	return;
+ 
+  out:
+-	idxd_device_wqs_clear_state(idxd);
++	idxd_device_clear_state(idxd);
+ }
+ 
+ static void idxd_device_fault_work(struct work_struct *work)
+@@ -192,7 +192,7 @@ static int process_misc_interrupts(struct idxd_device *idxd, u32 cause)
+ 			spin_lock_bh(&idxd->dev_lock);
+ 			idxd_wqs_quiesce(idxd);
+ 			idxd_wqs_unmap_portal(idxd);
+-			idxd_device_wqs_clear_state(idxd);
++			idxd_device_clear_state(idxd);
+ 			dev_err(&idxd->pdev->dev,
+ 				"idxd halted, need %s.\n",
+ 				gensts.reset_type == IDXD_DEVICE_RESET_FLR ?
+@@ -269,7 +269,11 @@ static int irq_process_pending_llist(struct idxd_irq_entry *irq_entry,
+ 		u8 status = desc->completion->status & DSA_COMP_STATUS_MASK;
+ 
+ 		if (status) {
+-			if (unlikely(status == IDXD_COMP_DESC_ABORT)) {
++			/*
++			 * Check against the original status as ABORT is software defined
++			 * and 0xff, which DSA_COMP_STATUS_MASK can mask out.
++			 */
++			if (unlikely(desc->completion->status == IDXD_COMP_DESC_ABORT)) {
+ 				complete_desc(desc, IDXD_COMPLETE_ABORT);
+ 				(*processed)++;
+ 				continue;
+@@ -333,7 +337,11 @@ static int irq_process_work_list(struct idxd_irq_entry *irq_entry,
+ 	list_for_each_entry(desc, &flist, list) {
+ 		u8 status = desc->completion->status & DSA_COMP_STATUS_MASK;
+ 
+-		if (unlikely(status == IDXD_COMP_DESC_ABORT)) {
++		/*
++		 * Check against the original status as ABORT is software defined
++		 * and 0xff, which DSA_COMP_STATUS_MASK can mask out.
++		 */
++		if (unlikely(desc->completion->status == IDXD_COMP_DESC_ABORT)) {
+ 			complete_desc(desc, IDXD_COMPLETE_ABORT);
+ 			continue;
+ 		}
+diff --git a/drivers/dma/idxd/submit.c b/drivers/dma/idxd/submit.c
+index 36c9c1a89b7e7..196d6cf119656 100644
+--- a/drivers/dma/idxd/submit.c
++++ b/drivers/dma/idxd/submit.c
+@@ -67,7 +67,7 @@ struct idxd_desc *idxd_alloc_desc(struct idxd_wq *wq, enum idxd_op_type optype)
+ 		if (signal_pending_state(TASK_INTERRUPTIBLE, current))
+ 			break;
+ 		idx = sbitmap_queue_get(sbq, &cpu);
+-		if (idx > 0)
++		if (idx >= 0)
+ 			break;
+ 		schedule();
+ 	}
+diff --git a/drivers/dma/idxd/sysfs.c b/drivers/dma/idxd/sysfs.c
+index bb4df63906a72..528cde54724b4 100644
+--- a/drivers/dma/idxd/sysfs.c
++++ b/drivers/dma/idxd/sysfs.c
+@@ -129,7 +129,7 @@ static int enable_wq(struct idxd_wq *wq)
+ 	rc = idxd_wq_map_portal(wq);
+ 	if (rc < 0) {
+ 		dev_warn(dev, "wq portal mapping failed: %d\n", rc);
+-		rc = idxd_wq_disable(wq);
++		rc = idxd_wq_disable(wq, false);
+ 		if (rc < 0)
+ 			dev_warn(dev, "IDXD wq disable failed\n");
+ 		mutex_unlock(&wq->wq_lock);
+@@ -262,8 +262,6 @@ static void disable_wq(struct idxd_wq *wq)
+ 
+ static int idxd_config_bus_remove(struct device *dev)
+ {
+-	int rc;
+-
+ 	dev_dbg(dev, "%s called for %s\n", __func__, dev_name(dev));
+ 
+ 	/* disable workqueue here */
+@@ -288,22 +286,12 @@ static int idxd_config_bus_remove(struct device *dev)
+ 		}
+ 
+ 		idxd_unregister_dma_device(idxd);
+-		rc = idxd_device_disable(idxd);
+-		if (test_bit(IDXD_FLAG_CONFIGURABLE, &idxd->flags)) {
+-			for (i = 0; i < idxd->max_wqs; i++) {
+-				struct idxd_wq *wq = idxd->wqs[i];
+-
+-				mutex_lock(&wq->wq_lock);
+-				idxd_wq_disable_cleanup(wq);
+-				mutex_unlock(&wq->wq_lock);
+-			}
+-		}
++		idxd_device_disable(idxd);
++		if (test_bit(IDXD_FLAG_CONFIGURABLE, &idxd->flags))
++			idxd_device_reset(idxd);
+ 		module_put(THIS_MODULE);
+-		if (rc < 0)
+-			dev_warn(dev, "Device disable failed\n");
+-		else
+-			dev_info(dev, "Device %s disabled\n", dev_name(dev));
+ 
++		dev_info(dev, "Device %s disabled\n", dev_name(dev));
+ 	}
+ 
+ 	return 0;
+diff --git a/drivers/dma/sprd-dma.c b/drivers/dma/sprd-dma.c
+index 0ef5ca81ba4d0..4357d2395e6b7 100644
+--- a/drivers/dma/sprd-dma.c
++++ b/drivers/dma/sprd-dma.c
+@@ -1265,6 +1265,7 @@ static const struct of_device_id sprd_dma_match[] = {
+ 	{ .compatible = "sprd,sc9860-dma", },
+ 	{},
+ };
++MODULE_DEVICE_TABLE(of, sprd_dma_match);
+ 
+ static int __maybe_unused sprd_dma_runtime_suspend(struct device *dev)
+ {
+diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
+index 4b9530a7bf652..434b1ff22e318 100644
+--- a/drivers/dma/xilinx/xilinx_dma.c
++++ b/drivers/dma/xilinx/xilinx_dma.c
+@@ -3077,7 +3077,7 @@ static int xilinx_dma_probe(struct platform_device *pdev)
+ 		xdev->ext_addr = false;
+ 
+ 	/* Set the dma mask bits */
+-	dma_set_mask(xdev->dev, DMA_BIT_MASK(addr_width));
++	dma_set_mask_and_coherent(xdev->dev, DMA_BIT_MASK(addr_width));
+ 
+ 	/* Initialize the DMA engine */
+ 	xdev->common.dev = &pdev->dev;
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
+index 8f53837d4d3ee..97178b307ed6f 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
+@@ -468,14 +468,18 @@ bool amdgpu_atomfirmware_dynamic_boot_config_supported(struct amdgpu_device *ade
+ 	return (fw_cap & ATOM_FIRMWARE_CAP_DYNAMIC_BOOT_CFG_ENABLE) ? true : false;
+ }
+ 
+-/*
+- * Helper function to query RAS EEPROM address
+- *
+- * @adev: amdgpu_device pointer
++/**
++ * amdgpu_atomfirmware_ras_rom_addr -- Get the RAS EEPROM addr from VBIOS
++ * adev: amdgpu_device pointer
++ * i2c_address: pointer to u8; if not NULL, will contain
++ *    the RAS EEPROM address if the function returns true
+  *
+- * Return true if vbios supports ras rom address reporting
++ * Return true if VBIOS supports RAS EEPROM address reporting,
++ * else return false. If true and @i2c_address is not NULL,
++ * will contain the RAS ROM address.
+  */
+-bool amdgpu_atomfirmware_ras_rom_addr(struct amdgpu_device *adev, uint8_t* i2c_address)
++bool amdgpu_atomfirmware_ras_rom_addr(struct amdgpu_device *adev,
++				      u8 *i2c_address)
+ {
+ 	struct amdgpu_mode_info *mode_info = &adev->mode_info;
+ 	int index;
+@@ -483,27 +487,39 @@ bool amdgpu_atomfirmware_ras_rom_addr(struct amdgpu_device *adev, uint8_t* i2c_a
+ 	union firmware_info *firmware_info;
+ 	u8 frev, crev;
+ 
+-	if (i2c_address == NULL)
+-		return false;
+-
+-	*i2c_address = 0;
+-
+ 	index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
+-			firmwareinfo);
++					    firmwareinfo);
+ 
+ 	if (amdgpu_atom_parse_data_header(adev->mode_info.atom_context,
+-				index, &size, &frev, &crev, &data_offset)) {
++					  index, &size, &frev, &crev,
++					  &data_offset)) {
+ 		/* support firmware_info 3.4 + */
+ 		if ((frev == 3 && crev >=4) || (frev > 3)) {
+ 			firmware_info = (union firmware_info *)
+ 				(mode_info->atom_context->bios + data_offset);
+-			*i2c_address = firmware_info->v34.ras_rom_i2c_slave_addr;
++			/* The ras_rom_i2c_slave_addr should ideally
++			 * be a 19-bit EEPROM address, which would be
++			 * used as is by the driver; see top of
++			 * amdgpu_eeprom.c.
++			 *
++			 * When this is the case, 0 is of course a
++			 * valid RAS EEPROM address, in which case,
++			 * we'll drop the first "if (firm...)" and only
++			 * leave the check for the pointer.
++			 *
++			 * The reason this works right now is because
++			 * ras_rom_i2c_slave_addr contains the EEPROM
++			 * device type qualifier 1010b in the top 4
++			 * bits.
++			 */
++			if (firmware_info->v34.ras_rom_i2c_slave_addr) {
++				if (i2c_address)
++					*i2c_address = firmware_info->v34.ras_rom_i2c_slave_addr;
++				return true;
++			}
+ 		}
+ 	}
+ 
+-	if (*i2c_address != 0)
+-		return true;
+-
+ 	return false;
+ }
+ 
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
+index d94c5419ec25c..5a6857c44bb66 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
+@@ -59,6 +59,7 @@ void amdgpu_show_fdinfo(struct seq_file *m, struct file *f)
+ 	uint64_t vram_mem = 0, gtt_mem = 0, cpu_mem = 0;
+ 	struct drm_file *file = f->private_data;
+ 	struct amdgpu_device *adev = drm_to_adev(file->minor->dev);
++	struct amdgpu_bo *root;
+ 	int ret;
+ 
+ 	ret = amdgpu_file_to_fpriv(f, &fpriv);
+@@ -69,13 +70,19 @@ void amdgpu_show_fdinfo(struct seq_file *m, struct file *f)
+ 	dev = PCI_SLOT(adev->pdev->devfn);
+ 	fn = PCI_FUNC(adev->pdev->devfn);
+ 
+-	ret = amdgpu_bo_reserve(fpriv->vm.root.bo, false);
++	root = amdgpu_bo_ref(fpriv->vm.root.bo);
++	if (!root)
++		return;
++
++	ret = amdgpu_bo_reserve(root, false);
+ 	if (ret) {
+ 		DRM_ERROR("Fail to reserve bo\n");
+ 		return;
+ 	}
+ 	amdgpu_vm_get_memory(&fpriv->vm, &vram_mem, &gtt_mem, &cpu_mem);
+-	amdgpu_bo_unreserve(fpriv->vm.root.bo);
++	amdgpu_bo_unreserve(root);
++	amdgpu_bo_unref(&root);
++
+ 	seq_printf(m, "pdev:\t%04x:%02x:%02x.%d\npasid:\t%u\n", domain, bus,
+ 			dev, fn, fpriv->vm.pasid);
+ 	seq_printf(m, "vram mem:\t%llu kB\n", vram_mem/1024UL);
+diff --git a/drivers/gpu/drm/amd/display/dc/dcn303/dcn303_resource.c b/drivers/gpu/drm/amd/display/dc/dcn303/dcn303_resource.c
+index dc7823d23ba89..dd38796ba30ad 100644
+--- a/drivers/gpu/drm/amd/display/dc/dcn303/dcn303_resource.c
++++ b/drivers/gpu/drm/amd/display/dc/dcn303/dcn303_resource.c
+@@ -510,8 +510,12 @@ static struct stream_encoder *dcn303_stream_encoder_create(enum engine_id eng_id
+ 	vpg = dcn303_vpg_create(ctx, vpg_inst);
+ 	afmt = dcn303_afmt_create(ctx, afmt_inst);
+ 
+-	if (!enc1 || !vpg || !afmt)
++	if (!enc1 || !vpg || !afmt) {
++		kfree(enc1);
++		kfree(vpg);
++		kfree(afmt);
+ 		return NULL;
++	}
+ 
+ 	dcn30_dio_stream_encoder_construct(enc1, ctx, ctx->dc_bios, eng_id, vpg, afmt, &stream_enc_regs[eng_id],
+ 			&se_shift, &se_mask);
+diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
+index 0541bfc81c1b4..1d76cf7cd85d5 100644
+--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
++++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
+@@ -27,6 +27,9 @@
+ #include <linux/pci.h>
+ #include <linux/slab.h>
+ #include <asm/div64.h>
++#if IS_ENABLED(CONFIG_X86_64)
++#include <asm/intel-family.h>
++#endif
+ #include <drm/amdgpu_drm.h>
+ #include "ppatomctrl.h"
+ #include "atombios.h"
+@@ -1733,6 +1736,17 @@ static int smu7_disable_dpm_tasks(struct pp_hwmgr *hwmgr)
+ 	return result;
+ }
+ 
++static bool intel_core_rkl_chk(void)
++{
++#if IS_ENABLED(CONFIG_X86_64)
++	struct cpuinfo_x86 *c = &cpu_data(0);
++
++	return (c->x86 == 6 && c->x86_model == INTEL_FAM6_ROCKETLAKE);
++#else
++	return false;
++#endif
++}
++
+ static void smu7_init_dpm_defaults(struct pp_hwmgr *hwmgr)
+ {
+ 	struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
+@@ -1758,7 +1772,8 @@ static void smu7_init_dpm_defaults(struct pp_hwmgr *hwmgr)
+ 
+ 	data->mclk_dpm_key_disabled = hwmgr->feature_mask & PP_MCLK_DPM_MASK ? false : true;
+ 	data->sclk_dpm_key_disabled = hwmgr->feature_mask & PP_SCLK_DPM_MASK ? false : true;
+-	data->pcie_dpm_key_disabled = hwmgr->feature_mask & PP_PCIE_DPM_MASK ? false : true;
++	data->pcie_dpm_key_disabled =
++		intel_core_rkl_chk() || !(hwmgr->feature_mask & PP_PCIE_DPM_MASK);
+ 	/* need to set voltage control types before EVV patching */
+ 	data->voltage_control = SMU7_VOLTAGE_CONTROL_NONE;
+ 	data->vddci_control = SMU7_VOLTAGE_CONTROL_NONE;
+diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c
+index b0ece71aefdee..ce774579c89d1 100644
+--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c
++++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c
+@@ -57,7 +57,7 @@ nvkm_control_mthd_pstate_info(struct nvkm_control *ctrl, void *data, u32 size)
+ 		args->v0.count = 0;
+ 		args->v0.ustate_ac = NVIF_CONTROL_PSTATE_INFO_V0_USTATE_DISABLE;
+ 		args->v0.ustate_dc = NVIF_CONTROL_PSTATE_INFO_V0_USTATE_DISABLE;
+-		args->v0.pwrsrc = -ENOSYS;
++		args->v0.pwrsrc = -ENODEV;
+ 		args->v0.pstate = NVIF_CONTROL_PSTATE_INFO_V0_PSTATE_UNKNOWN;
+ 	}
+ 
+diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
+index 32202385073a2..b47a5053eb854 100644
+--- a/drivers/gpu/drm/ttm/ttm_bo.c
++++ b/drivers/gpu/drm/ttm/ttm_bo.c
+@@ -1157,9 +1157,9 @@ int ttm_bo_swapout(struct ttm_buffer_object *bo, struct ttm_operation_ctx *ctx,
+ 	}
+ 
+ 	if (bo->deleted) {
+-		ttm_bo_cleanup_refs(bo, false, false, locked);
++		ret = ttm_bo_cleanup_refs(bo, false, false, locked);
+ 		ttm_bo_put(bo);
+-		return 0;
++		return ret == -EBUSY ? -ENOSPC : ret;
+ 	}
+ 
+ 	ttm_bo_del_from_lru(bo);
+@@ -1213,7 +1213,7 @@ out:
+ 	if (locked)
+ 		dma_resv_unlock(bo->base.resv);
+ 	ttm_bo_put(bo);
+-	return ret;
++	return ret == -EBUSY ? -ENOSPC : ret;
+ }
+ 
+ void ttm_bo_tt_destroy(struct ttm_buffer_object *bo)
+diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+index bf4d9f6658ff9..c320891c8763c 100644
+--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
++++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+@@ -2004,6 +2004,7 @@ static void set_default_caps(struct hns_roce_dev *hr_dev)
+ 	caps->gid_table_len[0] = HNS_ROCE_V2_GID_INDEX_NUM;
+ 
+ 	if (hr_dev->pci_dev->revision >= PCI_REVISION_ID_HIP09) {
++		caps->flags |= HNS_ROCE_CAP_FLAG_STASH;
+ 		caps->max_sq_inline = HNS_ROCE_V3_MAX_SQ_INLINE;
+ 	} else {
+ 		caps->max_sq_inline = HNS_ROCE_V2_MAX_SQ_INLINE;
+diff --git a/drivers/infiniband/hw/mlx5/mr.c b/drivers/infiniband/hw/mlx5/mr.c
+index 19713cdd7b789..061dbee55cac1 100644
+--- a/drivers/infiniband/hw/mlx5/mr.c
++++ b/drivers/infiniband/hw/mlx5/mr.c
+@@ -995,7 +995,7 @@ static struct mlx5_ib_mr *alloc_cacheable_mr(struct ib_pd *pd,
+ static void *mlx5_ib_alloc_xlt(size_t *nents, size_t ent_size, gfp_t gfp_mask)
+ {
+ 	const size_t xlt_chunk_align =
+-		MLX5_UMR_MTT_ALIGNMENT / sizeof(ent_size);
++		MLX5_UMR_MTT_ALIGNMENT / ent_size;
+ 	size_t size;
+ 	void *res = NULL;
+ 
+diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c
+index 46280e6e1535b..5c21f1ee50983 100644
+--- a/drivers/iommu/amd/init.c
++++ b/drivers/iommu/amd/init.c
+@@ -298,6 +298,22 @@ int amd_iommu_get_num_iommus(void)
+ 	return amd_iommus_present;
+ }
+ 
++#ifdef CONFIG_IRQ_REMAP
++static bool check_feature_on_all_iommus(u64 mask)
++{
++	bool ret = false;
++	struct amd_iommu *iommu;
++
++	for_each_iommu(iommu) {
++		ret = iommu_feature(iommu, mask);
++		if (!ret)
++			return false;
++	}
++
++	return true;
++}
++#endif
++
+ /*
+  * For IVHD type 0x11/0x40, EFR is also available via IVHD.
+  * Default to IVHD EFR since it is available sooner
+@@ -854,13 +870,6 @@ static int iommu_init_ga(struct amd_iommu *iommu)
+ 	int ret = 0;
+ 
+ #ifdef CONFIG_IRQ_REMAP
+-	/* Note: We have already checked GASup from IVRS table.
+-	 *       Now, we need to make sure that GAMSup is set.
+-	 */
+-	if (AMD_IOMMU_GUEST_IR_VAPIC(amd_iommu_guest_ir) &&
+-	    !iommu_feature(iommu, FEATURE_GAM_VAPIC))
+-		amd_iommu_guest_ir = AMD_IOMMU_GUEST_IR_LEGACY_GA;
+-
+ 	ret = iommu_init_ga_log(iommu);
+ #endif /* CONFIG_IRQ_REMAP */
+ 
+@@ -2477,6 +2486,14 @@ static void early_enable_iommus(void)
+ 	}
+ 
+ #ifdef CONFIG_IRQ_REMAP
++	/*
++	 * Note: We have already checked GASup from IVRS table.
++	 *       Now, we need to make sure that GAMSup is set.
++	 */
++	if (AMD_IOMMU_GUEST_IR_VAPIC(amd_iommu_guest_ir) &&
++	    !check_feature_on_all_iommus(FEATURE_GAM_VAPIC))
++		amd_iommu_guest_ir = AMD_IOMMU_GUEST_IR_LEGACY_GA;
++
+ 	if (AMD_IOMMU_GUEST_IR_VAPIC(amd_iommu_guest_ir))
+ 		amd_iommu_irq_ops.capability |= (1 << IRQ_POSTING_CAP);
+ #endif
+diff --git a/drivers/iommu/intel/svm.c b/drivers/iommu/intel/svm.c
+index 4b9b3f35ba0ea..d575082567ca7 100644
+--- a/drivers/iommu/intel/svm.c
++++ b/drivers/iommu/intel/svm.c
+@@ -516,9 +516,6 @@ static void load_pasid(struct mm_struct *mm, u32 pasid)
+ {
+ 	mutex_lock(&mm->context.lock);
+ 
+-	/* Synchronize with READ_ONCE in update_pasid(). */
+-	smp_store_release(&mm->pasid, pasid);
+-
+ 	/* Update PASID MSR on all CPUs running the mm's tasks. */
+ 	on_each_cpu_mask(mm_cpumask(mm), _load_pasid, NULL, true);
+ 
+@@ -796,7 +793,19 @@ prq_retry:
+ 		goto prq_retry;
+ 	}
+ 
++	/*
++	 * A work in IO page fault workqueue may try to lock pasid_mutex now.
++	 * Holding pasid_mutex while waiting in iopf_queue_flush_dev() for
++	 * all works in the workqueue to finish may cause deadlock.
++	 *
++	 * It's unnecessary to hold pasid_mutex in iopf_queue_flush_dev().
++	 * Unlock it to allow the works to be handled while waiting for
++	 * them to finish.
++	 */
++	lockdep_assert_held(&pasid_mutex);
++	mutex_unlock(&pasid_mutex);
+ 	iopf_queue_flush_dev(dev);
++	mutex_lock(&pasid_mutex);
+ 
+ 	/*
+ 	 * Perform steps described in VT-d spec CH7.10 to drain page
+diff --git a/drivers/misc/habanalabs/common/command_buffer.c b/drivers/misc/habanalabs/common/command_buffer.c
+index 719168c980a45..402ac2395fc82 100644
+--- a/drivers/misc/habanalabs/common/command_buffer.c
++++ b/drivers/misc/habanalabs/common/command_buffer.c
+@@ -314,8 +314,6 @@ int hl_cb_create(struct hl_device *hdev, struct hl_cb_mgr *mgr,
+ 
+ 	spin_lock(&mgr->cb_lock);
+ 	rc = idr_alloc(&mgr->cb_handles, cb, 1, 0, GFP_ATOMIC);
+-	if (rc < 0)
+-		rc = idr_alloc(&mgr->cb_handles, cb, 1, 0, GFP_KERNEL);
+ 	spin_unlock(&mgr->cb_lock);
+ 
+ 	if (rc < 0) {
+diff --git a/drivers/misc/habanalabs/common/debugfs.c b/drivers/misc/habanalabs/common/debugfs.c
+index 703d79fb6f3f5..379529bffc700 100644
+--- a/drivers/misc/habanalabs/common/debugfs.c
++++ b/drivers/misc/habanalabs/common/debugfs.c
+@@ -349,7 +349,7 @@ static int mmu_show(struct seq_file *s, void *data)
+ 		return 0;
+ 	}
+ 
+-	phys_addr = hops_info.hop_info[hops_info.used_hops - 1].hop_pte_val;
++	hl_mmu_va_to_pa(ctx, virt_addr, &phys_addr);
+ 
+ 	if (hops_info.scrambled_vaddr &&
+ 		(dev_entry->mmu_addr != hops_info.scrambled_vaddr))
+diff --git a/drivers/misc/habanalabs/common/device.c b/drivers/misc/habanalabs/common/device.c
+index ff4cbde289c0b..4e9b677460bad 100644
+--- a/drivers/misc/habanalabs/common/device.c
++++ b/drivers/misc/habanalabs/common/device.c
+@@ -23,6 +23,8 @@ enum hl_device_status hl_device_status(struct hl_device *hdev)
+ 		status = HL_DEVICE_STATUS_NEEDS_RESET;
+ 	else if (hdev->disabled)
+ 		status = HL_DEVICE_STATUS_MALFUNCTION;
++	else if (!hdev->init_done)
++		status = HL_DEVICE_STATUS_IN_DEVICE_CREATION;
+ 	else
+ 		status = HL_DEVICE_STATUS_OPERATIONAL;
+ 
+@@ -44,6 +46,7 @@ bool hl_device_operational(struct hl_device *hdev,
+ 	case HL_DEVICE_STATUS_NEEDS_RESET:
+ 		return false;
+ 	case HL_DEVICE_STATUS_OPERATIONAL:
++	case HL_DEVICE_STATUS_IN_DEVICE_CREATION:
+ 	default:
+ 		return true;
+ 	}
+diff --git a/drivers/misc/habanalabs/common/habanalabs.h b/drivers/misc/habanalabs/common/habanalabs.h
+index 6b3cdd7e068a3..61db72ecec0e0 100644
+--- a/drivers/misc/habanalabs/common/habanalabs.h
++++ b/drivers/misc/habanalabs/common/habanalabs.h
+@@ -1798,7 +1798,7 @@ struct hl_dbg_device_entry {
+ 
+ #define HL_STR_MAX	32
+ 
+-#define HL_DEV_STS_MAX (HL_DEVICE_STATUS_NEEDS_RESET + 1)
++#define HL_DEV_STS_MAX (HL_DEVICE_STATUS_LAST + 1)
+ 
+ /* Theoretical limit only. A single host can only contain up to 4 or 8 PCIe
+  * x16 cards. In extreme cases, there are hosts that can accommodate 16 cards.
+diff --git a/drivers/misc/habanalabs/common/habanalabs_drv.c b/drivers/misc/habanalabs/common/habanalabs_drv.c
+index 4194cda2d04c3..536451a9a16c9 100644
+--- a/drivers/misc/habanalabs/common/habanalabs_drv.c
++++ b/drivers/misc/habanalabs/common/habanalabs_drv.c
+@@ -318,12 +318,16 @@ int create_hdev(struct hl_device **dev, struct pci_dev *pdev,
+ 		hdev->asic_prop.fw_security_enabled = false;
+ 
+ 	/* Assign status description string */
+-	strncpy(hdev->status[HL_DEVICE_STATUS_MALFUNCTION],
+-					"disabled", HL_STR_MAX);
++	strncpy(hdev->status[HL_DEVICE_STATUS_OPERATIONAL],
++					"operational", HL_STR_MAX);
+ 	strncpy(hdev->status[HL_DEVICE_STATUS_IN_RESET],
+ 					"in reset", HL_STR_MAX);
++	strncpy(hdev->status[HL_DEVICE_STATUS_MALFUNCTION],
++					"disabled", HL_STR_MAX);
+ 	strncpy(hdev->status[HL_DEVICE_STATUS_NEEDS_RESET],
+ 					"needs reset", HL_STR_MAX);
++	strncpy(hdev->status[HL_DEVICE_STATUS_IN_DEVICE_CREATION],
++					"in device creation", HL_STR_MAX);
+ 
+ 	hdev->major = hl_major;
+ 	hdev->reset_on_lockup = reset_on_lockup;
+diff --git a/drivers/misc/habanalabs/common/memory.c b/drivers/misc/habanalabs/common/memory.c
+index af339ce1ab4f2..fcadde594a580 100644
+--- a/drivers/misc/habanalabs/common/memory.c
++++ b/drivers/misc/habanalabs/common/memory.c
+@@ -124,7 +124,7 @@ static int alloc_device_memory(struct hl_ctx *ctx, struct hl_mem_in *args,
+ 
+ 	spin_lock(&vm->idr_lock);
+ 	handle = idr_alloc(&vm->phys_pg_pack_handles, phys_pg_pack, 1, 0,
+-				GFP_KERNEL);
++				GFP_ATOMIC);
+ 	spin_unlock(&vm->idr_lock);
+ 
+ 	if (handle < 0) {
+diff --git a/drivers/misc/habanalabs/common/mmu/mmu_v1.c b/drivers/misc/habanalabs/common/mmu/mmu_v1.c
+index c5e93ff325866..0f536f79dd9c9 100644
+--- a/drivers/misc/habanalabs/common/mmu/mmu_v1.c
++++ b/drivers/misc/habanalabs/common/mmu/mmu_v1.c
+@@ -470,13 +470,13 @@ static void hl_mmu_v1_fini(struct hl_device *hdev)
+ 	if (!ZERO_OR_NULL_PTR(hdev->mmu_priv.hr.mmu_shadow_hop0)) {
+ 		kvfree(hdev->mmu_priv.dr.mmu_shadow_hop0);
+ 		gen_pool_destroy(hdev->mmu_priv.dr.mmu_pgt_pool);
+-	}
+ 
+-	/* Make sure that if we arrive here again without init was called we
+-	 * won't cause kernel panic. This can happen for example if we fail
+-	 * during hard reset code at certain points
+-	 */
+-	hdev->mmu_priv.dr.mmu_shadow_hop0 = NULL;
++		/* Make sure that if we arrive here again without init was
++		 * called we won't cause kernel panic. This can happen for
++		 * example if we fail during hard reset code at certain points
++		 */
++		hdev->mmu_priv.dr.mmu_shadow_hop0 = NULL;
++	}
+ }
+ 
+ /**
+diff --git a/drivers/misc/habanalabs/common/sysfs.c b/drivers/misc/habanalabs/common/sysfs.c
+index db72df282ef8d..34f9f2779962a 100644
+--- a/drivers/misc/habanalabs/common/sysfs.c
++++ b/drivers/misc/habanalabs/common/sysfs.c
+@@ -9,8 +9,7 @@
+ 
+ #include <linux/pci.h>
+ 
+-long hl_get_frequency(struct hl_device *hdev, u32 pll_index,
+-								bool curr)
++long hl_get_frequency(struct hl_device *hdev, u32 pll_index, bool curr)
+ {
+ 	struct cpucp_packet pkt;
+ 	u32 used_pll_idx;
+@@ -44,8 +43,7 @@ long hl_get_frequency(struct hl_device *hdev, u32 pll_index,
+ 	return (long) result;
+ }
+ 
+-void hl_set_frequency(struct hl_device *hdev, u32 pll_index,
+-								u64 freq)
++void hl_set_frequency(struct hl_device *hdev, u32 pll_index, u64 freq)
+ {
+ 	struct cpucp_packet pkt;
+ 	u32 used_pll_idx;
+@@ -285,16 +283,12 @@ static ssize_t status_show(struct device *dev, struct device_attribute *attr,
+ 				char *buf)
+ {
+ 	struct hl_device *hdev = dev_get_drvdata(dev);
+-	char *str;
++	char str[HL_STR_MAX];
+ 
+-	if (atomic_read(&hdev->in_reset))
+-		str = "In reset";
+-	else if (hdev->disabled)
+-		str = "Malfunction";
+-	else if (hdev->needs_reset)
+-		str = "Needs Reset";
+-	else
+-		str = "Operational";
++	strscpy(str, hdev->status[hl_device_status(hdev)], HL_STR_MAX);
++
++	/* use uppercase for backward compatibility */
++	str[0] = 'A' + (str[0] - 'a');
+ 
+ 	return sprintf(buf, "%s\n", str);
+ }
+diff --git a/drivers/misc/habanalabs/gaudi/gaudi.c b/drivers/misc/habanalabs/gaudi/gaudi.c
+index aa8a0ca5aca24..409f05c962f24 100644
+--- a/drivers/misc/habanalabs/gaudi/gaudi.c
++++ b/drivers/misc/habanalabs/gaudi/gaudi.c
+@@ -7809,6 +7809,12 @@ static void gaudi_handle_eqe(struct hl_device *hdev,
+ 	u8 cause;
+ 	bool reset_required;
+ 
++	if (event_type >= GAUDI_EVENT_SIZE) {
++		dev_err(hdev->dev, "Event type %u exceeds maximum of %u",
++				event_type, GAUDI_EVENT_SIZE - 1);
++		return;
++	}
++
+ 	gaudi->events_stat[event_type]++;
+ 	gaudi->events_stat_aggregate[event_type]++;
+ 
+diff --git a/drivers/misc/habanalabs/goya/goya.c b/drivers/misc/habanalabs/goya/goya.c
+index 755e08cf2ecc8..bfb22f96c1a33 100644
+--- a/drivers/misc/habanalabs/goya/goya.c
++++ b/drivers/misc/habanalabs/goya/goya.c
+@@ -4797,6 +4797,12 @@ void goya_handle_eqe(struct hl_device *hdev, struct hl_eq_entry *eq_entry)
+ 				>> EQ_CTL_EVENT_TYPE_SHIFT);
+ 	struct goya_device *goya = hdev->asic_specific;
+ 
++	if (event_type >= GOYA_ASYNC_EVENT_ID_SIZE) {
++		dev_err(hdev->dev, "Event type %u exceeds maximum of %u",
++				event_type, GOYA_ASYNC_EVENT_ID_SIZE - 1);
++		return;
++	}
++
+ 	goya->events_stat[event_type]++;
+ 	goya->events_stat_aggregate[event_type]++;
+ 
+diff --git a/drivers/nvme/target/configfs.c b/drivers/nvme/target/configfs.c
+index 2735551271889..fa88bf9cba4d0 100644
+--- a/drivers/nvme/target/configfs.c
++++ b/drivers/nvme/target/configfs.c
+@@ -1067,7 +1067,8 @@ static ssize_t nvmet_subsys_attr_serial_show(struct config_item *item,
+ {
+ 	struct nvmet_subsys *subsys = to_subsys(item);
+ 
+-	return snprintf(page, PAGE_SIZE, "%s\n", subsys->serial);
++	return snprintf(page, PAGE_SIZE, "%*s\n",
++			NVMET_SN_MAX_SIZE, subsys->serial);
+ }
+ 
+ static ssize_t
+diff --git a/drivers/of/property.c b/drivers/of/property.c
+index 6c028632f425f..0b9c2fb843e79 100644
+--- a/drivers/of/property.c
++++ b/drivers/of/property.c
+@@ -1434,6 +1434,9 @@ static int of_fwnode_add_links(struct fwnode_handle *fwnode)
+ 	struct property *p;
+ 	struct device_node *con_np = to_of_node(fwnode);
+ 
++	if (IS_ENABLED(CONFIG_X86))
++		return 0;
++
+ 	if (!con_np)
+ 		return -EINVAL;
+ 
+diff --git a/drivers/parisc/dino.c b/drivers/parisc/dino.c
+index 889d7ce282ebb..952a92504df69 100644
+--- a/drivers/parisc/dino.c
++++ b/drivers/parisc/dino.c
+@@ -156,15 +156,6 @@ static inline struct dino_device *DINO_DEV(struct pci_hba_data *hba)
+ 	return container_of(hba, struct dino_device, hba);
+ }
+ 
+-/* Check if PCI device is behind a Card-mode Dino. */
+-static int pci_dev_is_behind_card_dino(struct pci_dev *dev)
+-{
+-	struct dino_device *dino_dev;
+-
+-	dino_dev = DINO_DEV(parisc_walk_tree(dev->bus->bridge));
+-	return is_card_dino(&dino_dev->hba.dev->id);
+-}
+-
+ /*
+  * Dino Configuration Space Accessor Functions
+  */
+@@ -447,6 +438,15 @@ static void quirk_cirrus_cardbus(struct pci_dev *dev)
+ DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_6832, quirk_cirrus_cardbus );
+ 
+ #ifdef CONFIG_TULIP
++/* Check if PCI device is behind a Card-mode Dino. */
++static int pci_dev_is_behind_card_dino(struct pci_dev *dev)
++{
++	struct dino_device *dino_dev;
++
++	dino_dev = DINO_DEV(parisc_walk_tree(dev->bus->bridge));
++	return is_card_dino(&dino_dev->hba.dev->id);
++}
++
+ static void pci_fixup_tulip(struct pci_dev *dev)
+ {
+ 	if (!pci_dev_is_behind_card_dino(dev))
+diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
+index fdbf051586970..0e4a46af82288 100644
+--- a/drivers/pci/controller/pci-aardvark.c
++++ b/drivers/pci/controller/pci-aardvark.c
+@@ -218,6 +218,8 @@
+ 
+ #define MSI_IRQ_NUM			32
+ 
++#define CFG_RD_CRS_VAL			0xffff0001
++
+ struct advk_pcie {
+ 	struct platform_device *pdev;
+ 	void __iomem *base;
+@@ -587,7 +589,7 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie)
+ 	advk_writel(pcie, reg, PCIE_CORE_CMD_STATUS_REG);
+ }
+ 
+-static int advk_pcie_check_pio_status(struct advk_pcie *pcie, u32 *val)
++static int advk_pcie_check_pio_status(struct advk_pcie *pcie, bool allow_crs, u32 *val)
+ {
+ 	struct device *dev = &pcie->pdev->dev;
+ 	u32 reg;
+@@ -629,9 +631,30 @@ static int advk_pcie_check_pio_status(struct advk_pcie *pcie, u32 *val)
+ 		strcomp_status = "UR";
+ 		break;
+ 	case PIO_COMPLETION_STATUS_CRS:
++		if (allow_crs && val) {
++			/* PCIe r4.0, sec 2.3.2, says:
++			 * If CRS Software Visibility is enabled:
++			 * For a Configuration Read Request that includes both
++			 * bytes of the Vendor ID field of a device Function's
++			 * Configuration Space Header, the Root Complex must
++			 * complete the Request to the host by returning a
++			 * read-data value of 0001h for the Vendor ID field and
++			 * all '1's for any additional bytes included in the
++			 * request.
++			 *
++			 * So CRS in this case is not an error status.
++			 */
++			*val = CFG_RD_CRS_VAL;
++			strcomp_status = NULL;
++			break;
++		}
+ 		/* PCIe r4.0, sec 2.3.2, says:
+ 		 * If CRS Software Visibility is not enabled, the Root Complex
+ 		 * must re-issue the Configuration Request as a new Request.
++		 * If CRS Software Visibility is enabled: For a Configuration
++		 * Write Request or for any other Configuration Read Request,
++		 * the Root Complex must re-issue the Configuration Request as
++		 * a new Request.
+ 		 * A Root Complex implementation may choose to limit the number
+ 		 * of Configuration Request/CRS Completion Status loops before
+ 		 * determining that something is wrong with the target of the
+@@ -700,6 +723,7 @@ advk_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge,
+ 	case PCI_EXP_RTCTL: {
+ 		u32 val = advk_readl(pcie, PCIE_ISR0_MASK_REG);
+ 		*value = (val & PCIE_MSG_PM_PME_MASK) ? 0 : PCI_EXP_RTCTL_PMEIE;
++		*value |= PCI_EXP_RTCAP_CRSVIS << 16;
+ 		return PCI_BRIDGE_EMUL_HANDLED;
+ 	}
+ 
+@@ -781,6 +805,7 @@ static struct pci_bridge_emul_ops advk_pci_bridge_emul_ops = {
+ static int advk_sw_pci_bridge_init(struct advk_pcie *pcie)
+ {
+ 	struct pci_bridge_emul *bridge = &pcie->bridge;
++	int ret;
+ 
+ 	bridge->conf.vendor =
+ 		cpu_to_le16(advk_readl(pcie, PCIE_CORE_DEV_ID_REG) & 0xffff);
+@@ -804,7 +829,15 @@ static int advk_sw_pci_bridge_init(struct advk_pcie *pcie)
+ 	bridge->data = pcie;
+ 	bridge->ops = &advk_pci_bridge_emul_ops;
+ 
+-	return pci_bridge_emul_init(bridge, 0);
++	/* PCIe config space can be initialized after pci_bridge_emul_init() */
++	ret = pci_bridge_emul_init(bridge, 0);
++	if (ret < 0)
++		return ret;
++
++	/* Indicates supports for Completion Retry Status */
++	bridge->pcie_conf.rootcap = cpu_to_le16(PCI_EXP_RTCAP_CRSVIS);
++
++	return 0;
+ }
+ 
+ static bool advk_pcie_valid_device(struct advk_pcie *pcie, struct pci_bus *bus,
+@@ -856,6 +889,7 @@ static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn,
+ 			     int where, int size, u32 *val)
+ {
+ 	struct advk_pcie *pcie = bus->sysdata;
++	bool allow_crs;
+ 	u32 reg;
+ 	int ret;
+ 
+@@ -868,7 +902,24 @@ static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn,
+ 		return pci_bridge_emul_conf_read(&pcie->bridge, where,
+ 						 size, val);
+ 
++	/*
++	 * Completion Retry Status is possible to return only when reading all
++	 * 4 bytes from PCI_VENDOR_ID and PCI_DEVICE_ID registers at once and
++	 * CRSSVE flag on Root Bridge is enabled.
++	 */
++	allow_crs = (where == PCI_VENDOR_ID) && (size == 4) &&
++		    (le16_to_cpu(pcie->bridge.pcie_conf.rootctl) &
++		     PCI_EXP_RTCTL_CRSSVE);
++
+ 	if (advk_pcie_pio_is_running(pcie)) {
++		/*
++		 * If it is possible return Completion Retry Status so caller
++		 * tries to issue the request again instead of failing.
++		 */
++		if (allow_crs) {
++			*val = CFG_RD_CRS_VAL;
++			return PCIBIOS_SUCCESSFUL;
++		}
+ 		*val = 0xffffffff;
+ 		return PCIBIOS_SET_FAILED;
+ 	}
+@@ -896,12 +947,20 @@ static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn,
+ 
+ 	ret = advk_pcie_wait_pio(pcie);
+ 	if (ret < 0) {
++		/*
++		 * If it is possible return Completion Retry Status so caller
++		 * tries to issue the request again instead of failing.
++		 */
++		if (allow_crs) {
++			*val = CFG_RD_CRS_VAL;
++			return PCIBIOS_SUCCESSFUL;
++		}
+ 		*val = 0xffffffff;
+ 		return PCIBIOS_SET_FAILED;
+ 	}
+ 
+ 	/* Check PIO status and get the read result */
+-	ret = advk_pcie_check_pio_status(pcie, val);
++	ret = advk_pcie_check_pio_status(pcie, allow_crs, val);
+ 	if (ret < 0) {
+ 		*val = 0xffffffff;
+ 		return PCIBIOS_SET_FAILED;
+@@ -970,7 +1029,7 @@ static int advk_pcie_wr_conf(struct pci_bus *bus, u32 devfn,
+ 	if (ret < 0)
+ 		return PCIBIOS_SET_FAILED;
+ 
+-	ret = advk_pcie_check_pio_status(pcie, NULL);
++	ret = advk_pcie_check_pio_status(pcie, false, NULL);
+ 	if (ret < 0)
+ 		return PCIBIOS_SET_FAILED;
+ 
+diff --git a/drivers/pci/pci-bridge-emul.h b/drivers/pci/pci-bridge-emul.h
+index b31883022a8e6..49bbd37ee318a 100644
+--- a/drivers/pci/pci-bridge-emul.h
++++ b/drivers/pci/pci-bridge-emul.h
+@@ -54,7 +54,7 @@ struct pci_bridge_emul_pcie_conf {
+ 	__le16 slotctl;
+ 	__le16 slotsta;
+ 	__le16 rootctl;
+-	__le16 rsvd;
++	__le16 rootcap;
+ 	__le32 rootsta;
+ 	__le32 devcap2;
+ 	__le16 devctl2;
+diff --git a/drivers/platform/chrome/Makefile b/drivers/platform/chrome/Makefile
+index 41baccba033f7..f901d2e43166c 100644
+--- a/drivers/platform/chrome/Makefile
++++ b/drivers/platform/chrome/Makefile
+@@ -20,7 +20,7 @@ obj-$(CONFIG_CROS_EC_CHARDEV)		+= cros_ec_chardev.o
+ obj-$(CONFIG_CROS_EC_LIGHTBAR)		+= cros_ec_lightbar.o
+ obj-$(CONFIG_CROS_EC_VBC)		+= cros_ec_vbc.o
+ obj-$(CONFIG_CROS_EC_DEBUGFS)		+= cros_ec_debugfs.o
+-cros-ec-sensorhub-objs			:= cros_ec_sensorhub.o cros_ec_sensorhub_ring.o
++cros-ec-sensorhub-objs			:= cros_ec_sensorhub.o cros_ec_sensorhub_ring.o cros_ec_trace.o
+ obj-$(CONFIG_CROS_EC_SENSORHUB)		+= cros-ec-sensorhub.o
+ obj-$(CONFIG_CROS_EC_SYSFS)		+= cros_ec_sysfs.o
+ obj-$(CONFIG_CROS_USBPD_LOGGER)		+= cros_usbpd_logger.o
+diff --git a/drivers/platform/chrome/cros_ec_sensorhub_ring.c b/drivers/platform/chrome/cros_ec_sensorhub_ring.c
+index 8921f24e83bac..98e37080f7609 100644
+--- a/drivers/platform/chrome/cros_ec_sensorhub_ring.c
++++ b/drivers/platform/chrome/cros_ec_sensorhub_ring.c
+@@ -17,6 +17,8 @@
+ #include <linux/sort.h>
+ #include <linux/slab.h>
+ 
++#include "cros_ec_trace.h"
++
+ /* Precision of fixed point for the m values from the filter */
+ #define M_PRECISION BIT(23)
+ 
+@@ -291,6 +293,7 @@ cros_ec_sensor_ring_ts_filter_update(struct cros_ec_sensors_ts_filter_state
+ 		state->median_m = 0;
+ 		state->median_error = 0;
+ 	}
++	trace_cros_ec_sensorhub_filter(state, dx, dy);
+ }
+ 
+ /**
+@@ -427,6 +430,11 @@ cros_ec_sensor_ring_process_event(struct cros_ec_sensorhub *sensorhub,
+ 			if (new_timestamp - *current_timestamp > 0)
+ 				*current_timestamp = new_timestamp;
+ 		}
++		trace_cros_ec_sensorhub_timestamp(in->timestamp,
++						  fifo_info->timestamp,
++						  fifo_timestamp,
++						  *current_timestamp,
++						  now);
+ 	}
+ 
+ 	if (in->flags & MOTIONSENSE_SENSOR_FLAG_ODR) {
+@@ -460,6 +468,12 @@ cros_ec_sensor_ring_process_event(struct cros_ec_sensorhub *sensorhub,
+ 
+ 	/* Regular sample */
+ 	out->sensor_id = in->sensor_num;
++	trace_cros_ec_sensorhub_data(in->sensor_num,
++				     fifo_info->timestamp,
++				     fifo_timestamp,
++				     *current_timestamp,
++				     now);
++
+ 	if (*current_timestamp - now > 0) {
+ 		/*
+ 		 * This fix is needed to overcome the timestamp filter putting
+diff --git a/drivers/platform/chrome/cros_ec_trace.h b/drivers/platform/chrome/cros_ec_trace.h
+index f744b21bc655f..7e7cfc98657a4 100644
+--- a/drivers/platform/chrome/cros_ec_trace.h
++++ b/drivers/platform/chrome/cros_ec_trace.h
+@@ -15,6 +15,7 @@
+ #include <linux/types.h>
+ #include <linux/platform_data/cros_ec_commands.h>
+ #include <linux/platform_data/cros_ec_proto.h>
++#include <linux/platform_data/cros_ec_sensorhub.h>
+ 
+ #include <linux/tracepoint.h>
+ 
+@@ -70,6 +71,99 @@ TRACE_EVENT(cros_ec_request_done,
+ 		  __entry->retval)
+ );
+ 
++TRACE_EVENT(cros_ec_sensorhub_timestamp,
++	    TP_PROTO(u32 ec_sample_timestamp, u32 ec_fifo_timestamp, s64 fifo_timestamp,
++		     s64 current_timestamp, s64 current_time),
++	TP_ARGS(ec_sample_timestamp, ec_fifo_timestamp, fifo_timestamp, current_timestamp,
++		current_time),
++	TP_STRUCT__entry(
++		__field(u32, ec_sample_timestamp)
++		__field(u32, ec_fifo_timestamp)
++		__field(s64, fifo_timestamp)
++		__field(s64, current_timestamp)
++		__field(s64, current_time)
++		__field(s64, delta)
++	),
++	TP_fast_assign(
++		__entry->ec_sample_timestamp = ec_sample_timestamp;
++		__entry->ec_fifo_timestamp = ec_fifo_timestamp;
++		__entry->fifo_timestamp = fifo_timestamp;
++		__entry->current_timestamp = current_timestamp;
++		__entry->current_time = current_time;
++		__entry->delta = current_timestamp - current_time;
++	),
++	TP_printk("ec_ts: %9u, ec_fifo_ts: %9u, fifo_ts: %12lld, curr_ts: %12lld, curr_time: %12lld, delta %12lld",
++		  __entry->ec_sample_timestamp,
++		__entry->ec_fifo_timestamp,
++		__entry->fifo_timestamp,
++		__entry->current_timestamp,
++		__entry->current_time,
++		__entry->delta
++	)
++);
++
++TRACE_EVENT(cros_ec_sensorhub_data,
++	    TP_PROTO(u32 ec_sensor_num, u32 ec_fifo_timestamp, s64 fifo_timestamp,
++		     s64 current_timestamp, s64 current_time),
++	TP_ARGS(ec_sensor_num, ec_fifo_timestamp, fifo_timestamp, current_timestamp, current_time),
++	TP_STRUCT__entry(
++		__field(u32, ec_sensor_num)
++		__field(u32, ec_fifo_timestamp)
++		__field(s64, fifo_timestamp)
++		__field(s64, current_timestamp)
++		__field(s64, current_time)
++		__field(s64, delta)
++	),
++	TP_fast_assign(
++		__entry->ec_sensor_num = ec_sensor_num;
++		__entry->ec_fifo_timestamp = ec_fifo_timestamp;
++		__entry->fifo_timestamp = fifo_timestamp;
++		__entry->current_timestamp = current_timestamp;
++		__entry->current_time = current_time;
++		__entry->delta = current_timestamp - current_time;
++	),
++	TP_printk("ec_num: %4u, ec_fifo_ts: %9u, fifo_ts: %12lld, curr_ts: %12lld, curr_time: %12lld, delta %12lld",
++		  __entry->ec_sensor_num,
++		__entry->ec_fifo_timestamp,
++		__entry->fifo_timestamp,
++		__entry->current_timestamp,
++		__entry->current_time,
++		__entry->delta
++	)
++);
++
++TRACE_EVENT(cros_ec_sensorhub_filter,
++	    TP_PROTO(struct cros_ec_sensors_ts_filter_state *state, s64 dx, s64 dy),
++	TP_ARGS(state, dx, dy),
++	TP_STRUCT__entry(
++		__field(s64, dx)
++		__field(s64, dy)
++		__field(s64, median_m)
++		__field(s64, median_error)
++		__field(s64, history_len)
++		__field(s64, x)
++		__field(s64, y)
++	),
++	TP_fast_assign(
++		__entry->dx = dx;
++		__entry->dy = dy;
++		__entry->median_m = state->median_m;
++		__entry->median_error = state->median_error;
++		__entry->history_len = state->history_len;
++		__entry->x = state->x_offset;
++		__entry->y = state->y_offset;
++	),
++	TP_printk("dx: %12lld. dy: %12lld median_m: %12lld median_error: %12lld len: %lld x: %12lld y: %12lld",
++		  __entry->dx,
++		__entry->dy,
++		__entry->median_m,
++		__entry->median_error,
++		__entry->history_len,
++		__entry->x,
++		__entry->y
++	)
++);
++
+ 
+ #endif /* _CROS_EC_TRACE_H_ */
+ 
+diff --git a/drivers/pwm/pwm-ab8500.c b/drivers/pwm/pwm-ab8500.c
+index e2a26d9da25b3..281f74a1c50bd 100644
+--- a/drivers/pwm/pwm-ab8500.c
++++ b/drivers/pwm/pwm-ab8500.c
+@@ -22,14 +22,21 @@
+ 
+ struct ab8500_pwm_chip {
+ 	struct pwm_chip chip;
++	unsigned int hwid;
+ };
+ 
++static struct ab8500_pwm_chip *ab8500_pwm_from_chip(struct pwm_chip *chip)
++{
++	return container_of(chip, struct ab8500_pwm_chip, chip);
++}
++
+ static int ab8500_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
+ 			    const struct pwm_state *state)
+ {
+ 	int ret;
+ 	u8 reg;
+ 	unsigned int higher_val, lower_val;
++	struct ab8500_pwm_chip *ab8500 = ab8500_pwm_from_chip(chip);
+ 
+ 	if (state->polarity != PWM_POLARITY_NORMAL)
+ 		return -EINVAL;
+@@ -37,7 +44,7 @@ static int ab8500_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
+ 	if (!state->enabled) {
+ 		ret = abx500_mask_and_set_register_interruptible(chip->dev,
+ 					AB8500_MISC, AB8500_PWM_OUT_CTRL7_REG,
+-					1 << (chip->base - 1), 0);
++					1 << ab8500->hwid, 0);
+ 
+ 		if (ret < 0)
+ 			dev_err(chip->dev, "%s: Failed to disable PWM, Error %d\n",
+@@ -56,7 +63,7 @@ static int ab8500_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
+ 	 */
+ 	higher_val = ((state->duty_cycle & 0x0300) >> 8);
+ 
+-	reg = AB8500_PWM_OUT_CTRL1_REG + ((chip->base - 1) * 2);
++	reg = AB8500_PWM_OUT_CTRL1_REG + (ab8500->hwid * 2);
+ 
+ 	ret = abx500_set_register_interruptible(chip->dev, AB8500_MISC,
+ 			reg, (u8)lower_val);
+@@ -70,7 +77,7 @@ static int ab8500_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
+ 
+ 	ret = abx500_mask_and_set_register_interruptible(chip->dev,
+ 				AB8500_MISC, AB8500_PWM_OUT_CTRL7_REG,
+-				1 << (chip->base - 1), 1 << (chip->base - 1));
++				1 << ab8500->hwid, 1 << ab8500->hwid);
+ 	if (ret < 0)
+ 		dev_err(chip->dev, "%s: Failed to enable PWM, Error %d\n",
+ 							pwm->label, ret);
+@@ -88,6 +95,9 @@ static int ab8500_pwm_probe(struct platform_device *pdev)
+ 	struct ab8500_pwm_chip *ab8500;
+ 	int err;
+ 
++	if (pdev->id < 1 || pdev->id > 31)
++		return dev_err_probe(&pdev->dev, EINVAL, "Invalid device id %d\n", pdev->id);
++
+ 	/*
+ 	 * Nothing to be done in probe, this is required to get the
+ 	 * device which is required for ab8500 read and write
+@@ -99,6 +109,7 @@ static int ab8500_pwm_probe(struct platform_device *pdev)
+ 	ab8500->chip.dev = &pdev->dev;
+ 	ab8500->chip.ops = &ab8500_pwm_ops;
+ 	ab8500->chip.npwm = 1;
++	ab8500->hwid = pdev->id - 1;
+ 
+ 	err = pwmchip_add(&ab8500->chip);
+ 	if (err < 0)
+diff --git a/drivers/pwm/pwm-img.c b/drivers/pwm/pwm-img.c
+index 11b16ecc4f967..18d8e34d0d08a 100644
+--- a/drivers/pwm/pwm-img.c
++++ b/drivers/pwm/pwm-img.c
+@@ -326,23 +326,7 @@ err_pm_disable:
+ static int img_pwm_remove(struct platform_device *pdev)
+ {
+ 	struct img_pwm_chip *pwm_chip = platform_get_drvdata(pdev);
+-	u32 val;
+-	unsigned int i;
+-	int ret;
+-
+-	ret = pm_runtime_get_sync(&pdev->dev);
+-	if (ret < 0) {
+-		pm_runtime_put(&pdev->dev);
+-		return ret;
+-	}
+-
+-	for (i = 0; i < pwm_chip->chip.npwm; i++) {
+-		val = img_pwm_readl(pwm_chip, PWM_CTRL_CFG);
+-		val &= ~BIT(i);
+-		img_pwm_writel(pwm_chip, PWM_CTRL_CFG, val);
+-	}
+ 
+-	pm_runtime_put(&pdev->dev);
+ 	pm_runtime_disable(&pdev->dev);
+ 	if (!pm_runtime_status_suspended(&pdev->dev))
+ 		img_pwm_runtime_suspend(&pdev->dev);
+diff --git a/drivers/pwm/pwm-lpc32xx.c b/drivers/pwm/pwm-lpc32xx.c
+index 2834a0f001d3a..719e8e9136569 100644
+--- a/drivers/pwm/pwm-lpc32xx.c
++++ b/drivers/pwm/pwm-lpc32xx.c
+@@ -117,17 +117,17 @@ static int lpc32xx_pwm_probe(struct platform_device *pdev)
+ 	lpc32xx->chip.ops = &lpc32xx_pwm_ops;
+ 	lpc32xx->chip.npwm = 1;
+ 
++	/* If PWM is disabled, configure the output to the default value */
++	val = readl(lpc32xx->base + (lpc32xx->chip.pwms[0].hwpwm << 2));
++	val &= ~PWM_PIN_LEVEL;
++	writel(val, lpc32xx->base + (lpc32xx->chip.pwms[0].hwpwm << 2));
++
+ 	ret = pwmchip_add(&lpc32xx->chip);
+ 	if (ret < 0) {
+ 		dev_err(&pdev->dev, "failed to add PWM chip, error %d\n", ret);
+ 		return ret;
+ 	}
+ 
+-	/* When PWM is disable, configure the output to the default value */
+-	val = readl(lpc32xx->base + (lpc32xx->chip.pwms[0].hwpwm << 2));
+-	val &= ~PWM_PIN_LEVEL;
+-	writel(val, lpc32xx->base + (lpc32xx->chip.pwms[0].hwpwm << 2));
+-
+ 	platform_set_drvdata(pdev, lpc32xx);
+ 
+ 	return 0;
+diff --git a/drivers/pwm/pwm-mxs.c b/drivers/pwm/pwm-mxs.c
+index a22180803bd7d..558dc1de8f5d5 100644
+--- a/drivers/pwm/pwm-mxs.c
++++ b/drivers/pwm/pwm-mxs.c
+@@ -145,6 +145,11 @@ static int mxs_pwm_probe(struct platform_device *pdev)
+ 		return ret;
+ 	}
+ 
++	/* FIXME: Only do this if the PWM isn't already running */
++	ret = stmp_reset_block(mxs->base);
++	if (ret)
++		return dev_err_probe(&pdev->dev, ret, "failed to reset PWM\n");
++
+ 	ret = pwmchip_add(&mxs->chip);
+ 	if (ret < 0) {
+ 		dev_err(&pdev->dev, "failed to add pwm chip %d\n", ret);
+@@ -153,15 +158,7 @@ static int mxs_pwm_probe(struct platform_device *pdev)
+ 
+ 	platform_set_drvdata(pdev, mxs);
+ 
+-	ret = stmp_reset_block(mxs->base);
+-	if (ret)
+-		goto pwm_remove;
+-
+ 	return 0;
+-
+-pwm_remove:
+-	pwmchip_remove(&mxs->chip);
+-	return ret;
+ }
+ 
+ static int mxs_pwm_remove(struct platform_device *pdev)
+diff --git a/drivers/pwm/pwm-rockchip.c b/drivers/pwm/pwm-rockchip.c
+index cbe900877724f..8fcef29948d77 100644
+--- a/drivers/pwm/pwm-rockchip.c
++++ b/drivers/pwm/pwm-rockchip.c
+@@ -384,20 +384,6 @@ static int rockchip_pwm_remove(struct platform_device *pdev)
+ {
+ 	struct rockchip_pwm_chip *pc = platform_get_drvdata(pdev);
+ 
+-	/*
+-	 * Disable the PWM clk before unpreparing it if the PWM device is still
+-	 * running. This should only happen when the last PWM user left it
+-	 * enabled, or when nobody requested a PWM that was previously enabled
+-	 * by the bootloader.
+-	 *
+-	 * FIXME: Maybe the core should disable all PWM devices in
+-	 * pwmchip_remove(). In this case we'd only have to call
+-	 * clk_unprepare() after pwmchip_remove().
+-	 *
+-	 */
+-	if (pwm_is_enabled(pc->chip.pwms))
+-		clk_disable(pc->clk);
+-
+ 	clk_unprepare(pc->pclk);
+ 	clk_unprepare(pc->clk);
+ 
+diff --git a/drivers/pwm/pwm-stm32-lp.c b/drivers/pwm/pwm-stm32-lp.c
+index 93dd03618465b..e4a10aac354d6 100644
+--- a/drivers/pwm/pwm-stm32-lp.c
++++ b/drivers/pwm/pwm-stm32-lp.c
+@@ -222,8 +222,6 @@ static int stm32_pwm_lp_remove(struct platform_device *pdev)
+ {
+ 	struct stm32_pwm_lp *priv = platform_get_drvdata(pdev);
+ 
+-	pwm_disable(&priv->chip.pwms[0]);
+-
+ 	return pwmchip_remove(&priv->chip);
+ }
+ 
+diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
+index 12153d5801ce1..f7bf87097a9fb 100644
+--- a/drivers/rtc/Kconfig
++++ b/drivers/rtc/Kconfig
+@@ -624,6 +624,7 @@ config RTC_DRV_FM3130
+ 
+ config RTC_DRV_RX8010
+ 	tristate "Epson RX8010SJ"
++	select REGMAP_I2C
+ 	help
+ 	  If you say yes here you get support for the Epson RX8010SJ RTC
+ 	  chip.
+diff --git a/drivers/staging/rtl8192u/r8192U_core.c b/drivers/staging/rtl8192u/r8192U_core.c
+index db26edeccea6e..b6698656fc014 100644
+--- a/drivers/staging/rtl8192u/r8192U_core.c
++++ b/drivers/staging/rtl8192u/r8192U_core.c
+@@ -4265,7 +4265,7 @@ static void TranslateRxSignalStuff819xUsb(struct sk_buff *skb,
+ 	bpacket_match_bssid = (type != IEEE80211_FTYPE_CTL) &&
+ 			       (ether_addr_equal(priv->ieee80211->current_network.bssid,  (fc & IEEE80211_FCTL_TODS) ? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS) ? hdr->addr2 : hdr->addr3))
+ 			       && (!pstats->bHwError) && (!pstats->bCRC) && (!pstats->bICV);
+-	bpacket_toself =  bpacket_match_bssid &
++	bpacket_toself =  bpacket_match_bssid &&
+ 			  (ether_addr_equal(praddr, priv->ieee80211->dev->dev_addr));
+ 
+ 	if (WLAN_FC_GET_FRAMETYPE(fc) == IEEE80211_STYPE_BEACON)
+diff --git a/drivers/staging/rtl8723bs/os_dep/ioctl_linux.c b/drivers/staging/rtl8723bs/os_dep/ioctl_linux.c
+index f95000df89422..965558516cbdc 100644
+--- a/drivers/staging/rtl8723bs/os_dep/ioctl_linux.c
++++ b/drivers/staging/rtl8723bs/os_dep/ioctl_linux.c
+@@ -349,16 +349,16 @@ static int wpa_set_auth_algs(struct net_device *dev, u32 value)
+ 	struct adapter *padapter = rtw_netdev_priv(dev);
+ 	int ret = 0;
+ 
+-	if ((value & WLAN_AUTH_SHARED_KEY) && (value & WLAN_AUTH_OPEN)) {
++	if ((value & IW_AUTH_ALG_SHARED_KEY) && (value & IW_AUTH_ALG_OPEN_SYSTEM)) {
+ 		padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled;
+ 		padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeAutoSwitch;
+ 		padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Auto;
+-	} else if (value & WLAN_AUTH_SHARED_KEY)	{
++	} else if (value & IW_AUTH_ALG_SHARED_KEY)	{
+ 		padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled;
+ 
+ 		padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeShared;
+ 		padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Shared;
+-	} else if (value & WLAN_AUTH_OPEN) {
++	} else if (value & IW_AUTH_ALG_OPEN_SYSTEM) {
+ 		/* padapter->securitypriv.ndisencryptstatus = Ndis802_11EncryptionDisabled; */
+ 		if (padapter->securitypriv.ndisauthtype < Ndis802_11AuthModeWPAPSK) {
+ 			padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeOpen;
+diff --git a/drivers/thermal/qcom/qcom-spmi-adc-tm5.c b/drivers/thermal/qcom/qcom-spmi-adc-tm5.c
+index 232fd0b333251..8494cc04aa210 100644
+--- a/drivers/thermal/qcom/qcom-spmi-adc-tm5.c
++++ b/drivers/thermal/qcom/qcom-spmi-adc-tm5.c
+@@ -359,6 +359,12 @@ static int adc_tm5_register_tzd(struct adc_tm5_chip *adc_tm)
+ 							   &adc_tm->channels[i],
+ 							   &adc_tm5_ops);
+ 		if (IS_ERR(tzd)) {
++			if (PTR_ERR(tzd) == -ENODEV) {
++				dev_warn(adc_tm->dev, "thermal sensor on channel %d is not used\n",
++					 adc_tm->channels[i].channel);
++				continue;
++			}
++
+ 			dev_err(adc_tm->dev, "Error registering TZ zone for channel %d: %ld\n",
+ 				adc_tm->channels[i].channel, PTR_ERR(tzd));
+ 			return PTR_ERR(tzd);
+diff --git a/drivers/thermal/rcar_gen3_thermal.c b/drivers/thermal/rcar_gen3_thermal.c
+index fdf16aa34eb47..702696cf58b67 100644
+--- a/drivers/thermal/rcar_gen3_thermal.c
++++ b/drivers/thermal/rcar_gen3_thermal.c
+@@ -84,7 +84,7 @@ struct rcar_gen3_thermal_tsc {
+ 	struct thermal_zone_device *zone;
+ 	struct equation_coefs coef;
+ 	int tj_t;
+-	int id; /* thermal channel id */
++	unsigned int id; /* thermal channel id */
+ };
+ 
+ struct rcar_gen3_thermal_priv {
+@@ -310,7 +310,8 @@ static int rcar_gen3_thermal_probe(struct platform_device *pdev)
+ 	const int *ths_tj_1 = of_device_get_match_data(dev);
+ 	struct resource *res;
+ 	struct thermal_zone_device *zone;
+-	int ret, i;
++	unsigned int i;
++	int ret;
+ 
+ 	/* default values if FUSEs are missing */
+ 	/* TODO: Read values from hardware on supported platforms */
+@@ -376,7 +377,7 @@ static int rcar_gen3_thermal_probe(struct platform_device *pdev)
+ 		if (ret < 0)
+ 			goto error_unregister;
+ 
+-		dev_info(dev, "TSC%d: Loaded %d trip points\n", i, ret);
++		dev_info(dev, "TSC%u: Loaded %d trip points\n", i, ret);
+ 	}
+ 
+ 	priv->num_tscs = i;
+diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
+index e9a90bc23b11d..f4ab4c5b4b626 100644
+--- a/drivers/thermal/samsung/exynos_tmu.c
++++ b/drivers/thermal/samsung/exynos_tmu.c
+@@ -1073,6 +1073,7 @@ static int exynos_tmu_probe(struct platform_device *pdev)
+ 		data->sclk = devm_clk_get(&pdev->dev, "tmu_sclk");
+ 		if (IS_ERR(data->sclk)) {
+ 			dev_err(&pdev->dev, "Failed to get sclk\n");
++			ret = PTR_ERR(data->sclk);
+ 			goto err_clk;
+ 		} else {
+ 			ret = clk_prepare_enable(data->sclk);
+diff --git a/drivers/tty/vt/vt.c b/drivers/tty/vt/vt.c
+index ef981d3b7bb49..cb72393f92d3a 100644
+--- a/drivers/tty/vt/vt.c
++++ b/drivers/tty/vt/vt.c
+@@ -2059,7 +2059,7 @@ static void restore_cur(struct vc_data *vc)
+ 
+ enum { ESnormal, ESesc, ESsquare, ESgetpars, ESfunckey,
+ 	EShash, ESsetG0, ESsetG1, ESpercent, EScsiignore, ESnonstd,
+-	ESpalette, ESosc };
++	ESpalette, ESosc, ESapc, ESpm, ESdcs };
+ 
+ /* console_lock is held (except via vc_init()) */
+ static void reset_terminal(struct vc_data *vc, int do_clear)
+@@ -2133,20 +2133,28 @@ static void vc_setGx(struct vc_data *vc, unsigned int which, int c)
+ 		vc->vc_translate = set_translate(*charset, vc);
+ }
+ 
++/* is this state an ANSI control string? */
++static bool ansi_control_string(unsigned int state)
++{
++	if (state == ESosc || state == ESapc || state == ESpm || state == ESdcs)
++		return true;
++	return false;
++}
++
+ /* console_lock is held */
+ static void do_con_trol(struct tty_struct *tty, struct vc_data *vc, int c)
+ {
+ 	/*
+ 	 *  Control characters can be used in the _middle_
+-	 *  of an escape sequence.
++	 *  of an escape sequence, aside from ANSI control strings.
+ 	 */
+-	if (vc->vc_state == ESosc && c>=8 && c<=13) /* ... except for OSC */
++	if (ansi_control_string(vc->vc_state) && c >= 8 && c <= 13)
+ 		return;
+ 	switch (c) {
+ 	case 0:
+ 		return;
+ 	case 7:
+-		if (vc->vc_state == ESosc)
++		if (ansi_control_string(vc->vc_state))
+ 			vc->vc_state = ESnormal;
+ 		else if (vc->vc_bell_duration)
+ 			kd_mksound(vc->vc_bell_pitch, vc->vc_bell_duration);
+@@ -2207,6 +2215,12 @@ static void do_con_trol(struct tty_struct *tty, struct vc_data *vc, int c)
+ 		case ']':
+ 			vc->vc_state = ESnonstd;
+ 			return;
++		case '_':
++			vc->vc_state = ESapc;
++			return;
++		case '^':
++			vc->vc_state = ESpm;
++			return;
+ 		case '%':
+ 			vc->vc_state = ESpercent;
+ 			return;
+@@ -2224,6 +2238,9 @@ static void do_con_trol(struct tty_struct *tty, struct vc_data *vc, int c)
+ 			if (vc->state.x < VC_TABSTOPS_COUNT)
+ 				set_bit(vc->state.x, vc->vc_tab_stop);
+ 			return;
++		case 'P':
++			vc->vc_state = ESdcs;
++			return;
+ 		case 'Z':
+ 			respond_ID(tty);
+ 			return;
+@@ -2520,8 +2537,14 @@ static void do_con_trol(struct tty_struct *tty, struct vc_data *vc, int c)
+ 		vc_setGx(vc, 1, c);
+ 		vc->vc_state = ESnormal;
+ 		return;
++	case ESapc:
++		return;
+ 	case ESosc:
+ 		return;
++	case ESpm:
++		return;
++	case ESdcs:
++		return;
+ 	default:
+ 		vc->vc_state = ESnormal;
+ 	}
+diff --git a/fs/btrfs/ioctl.c b/fs/btrfs/ioctl.c
+index 0ba98e08a0290..50e12989e84a1 100644
+--- a/fs/btrfs/ioctl.c
++++ b/fs/btrfs/ioctl.c
+@@ -3205,6 +3205,8 @@ static long btrfs_ioctl_rm_dev_v2(struct file *file, void __user *arg)
+ 	struct inode *inode = file_inode(file);
+ 	struct btrfs_fs_info *fs_info = btrfs_sb(inode->i_sb);
+ 	struct btrfs_ioctl_vol_args_v2 *vol_args;
++	struct block_device *bdev = NULL;
++	fmode_t mode;
+ 	int ret;
+ 	bool cancel = false;
+ 
+@@ -3237,9 +3239,9 @@ static long btrfs_ioctl_rm_dev_v2(struct file *file, void __user *arg)
+ 	/* Exclusive operation is now claimed */
+ 
+ 	if (vol_args->flags & BTRFS_DEVICE_SPEC_BY_ID)
+-		ret = btrfs_rm_device(fs_info, NULL, vol_args->devid);
++		ret = btrfs_rm_device(fs_info, NULL, vol_args->devid, &bdev, &mode);
+ 	else
+-		ret = btrfs_rm_device(fs_info, vol_args->name, 0);
++		ret = btrfs_rm_device(fs_info, vol_args->name, 0, &bdev, &mode);
+ 
+ 	btrfs_exclop_finish(fs_info);
+ 
+@@ -3255,6 +3257,8 @@ out:
+ 	kfree(vol_args);
+ err_drop:
+ 	mnt_drop_write_file(file);
++	if (bdev)
++		blkdev_put(bdev, mode);
+ 	return ret;
+ }
+ 
+@@ -3263,6 +3267,8 @@ static long btrfs_ioctl_rm_dev(struct file *file, void __user *arg)
+ 	struct inode *inode = file_inode(file);
+ 	struct btrfs_fs_info *fs_info = btrfs_sb(inode->i_sb);
+ 	struct btrfs_ioctl_vol_args *vol_args;
++	struct block_device *bdev = NULL;
++	fmode_t mode;
+ 	int ret;
+ 	bool cancel;
+ 
+@@ -3284,7 +3290,7 @@ static long btrfs_ioctl_rm_dev(struct file *file, void __user *arg)
+ 	ret = exclop_start_or_cancel_reloc(fs_info, BTRFS_EXCLOP_DEV_REMOVE,
+ 					   cancel);
+ 	if (ret == 0) {
+-		ret = btrfs_rm_device(fs_info, vol_args->name, 0);
++		ret = btrfs_rm_device(fs_info, vol_args->name, 0, &bdev, &mode);
+ 		if (!ret)
+ 			btrfs_info(fs_info, "disk deleted %s", vol_args->name);
+ 		btrfs_exclop_finish(fs_info);
+@@ -3293,7 +3299,8 @@ static long btrfs_ioctl_rm_dev(struct file *file, void __user *arg)
+ 	kfree(vol_args);
+ out_drop_write:
+ 	mnt_drop_write_file(file);
+-
++	if (bdev)
++		blkdev_put(bdev, mode);
+ 	return ret;
+ }
+ 
+diff --git a/fs/btrfs/volumes.c b/fs/btrfs/volumes.c
+index 10dd2d210b0f4..682416d4edefa 100644
+--- a/fs/btrfs/volumes.c
++++ b/fs/btrfs/volumes.c
+@@ -570,6 +570,8 @@ static int btrfs_free_stale_devices(const char *path,
+ 	struct btrfs_device *device, *tmp_device;
+ 	int ret = 0;
+ 
++	lockdep_assert_held(&uuid_mutex);
++
+ 	if (path)
+ 		ret = -ENOENT;
+ 
+@@ -1000,11 +1002,12 @@ static struct btrfs_fs_devices *clone_fs_devices(struct btrfs_fs_devices *orig)
+ 	struct btrfs_device *orig_dev;
+ 	int ret = 0;
+ 
++	lockdep_assert_held(&uuid_mutex);
++
+ 	fs_devices = alloc_fs_devices(orig->fsid, NULL);
+ 	if (IS_ERR(fs_devices))
+ 		return fs_devices;
+ 
+-	mutex_lock(&orig->device_list_mutex);
+ 	fs_devices->total_devices = orig->total_devices;
+ 
+ 	list_for_each_entry(orig_dev, &orig->devices, dev_list) {
+@@ -1036,10 +1039,8 @@ static struct btrfs_fs_devices *clone_fs_devices(struct btrfs_fs_devices *orig)
+ 		device->fs_devices = fs_devices;
+ 		fs_devices->num_devices++;
+ 	}
+-	mutex_unlock(&orig->device_list_mutex);
+ 	return fs_devices;
+ error:
+-	mutex_unlock(&orig->device_list_mutex);
+ 	free_fs_devices(fs_devices);
+ 	return ERR_PTR(ret);
+ }
+@@ -1928,15 +1929,17 @@ out:
+  * Function to update ctime/mtime for a given device path.
+  * Mainly used for ctime/mtime based probe like libblkid.
+  */
+-static void update_dev_time(const char *path_name)
++static void update_dev_time(struct block_device *bdev)
+ {
+-	struct file *filp;
++	struct inode *inode = bdev->bd_inode;
++	struct timespec64 now;
+ 
+-	filp = filp_open(path_name, O_RDWR, 0);
+-	if (IS_ERR(filp))
++	/* Shouldn't happen but just in case. */
++	if (!inode)
+ 		return;
+-	file_update_time(filp);
+-	filp_close(filp, NULL);
++
++	now = current_time(inode);
++	generic_update_time(inode, &now, S_MTIME | S_CTIME);
+ }
+ 
+ static int btrfs_rm_dev_item(struct btrfs_device *device)
+@@ -2116,11 +2119,11 @@ void btrfs_scratch_superblocks(struct btrfs_fs_info *fs_info,
+ 	btrfs_kobject_uevent(bdev, KOBJ_CHANGE);
+ 
+ 	/* Update ctime/mtime for device path for libblkid */
+-	update_dev_time(device_path);
++	update_dev_time(bdev);
+ }
+ 
+ int btrfs_rm_device(struct btrfs_fs_info *fs_info, const char *device_path,
+-		    u64 devid)
++		    u64 devid, struct block_device **bdev, fmode_t *mode)
+ {
+ 	struct btrfs_device *device;
+ 	struct btrfs_fs_devices *cur_devices;
+@@ -2234,15 +2237,26 @@ int btrfs_rm_device(struct btrfs_fs_info *fs_info, const char *device_path,
+ 	mutex_unlock(&fs_devices->device_list_mutex);
+ 
+ 	/*
+-	 * at this point, the device is zero sized and detached from
+-	 * the devices list.  All that's left is to zero out the old
+-	 * supers and free the device.
++	 * At this point, the device is zero sized and detached from the
++	 * devices list.  All that's left is to zero out the old supers and
++	 * free the device.
++	 *
++	 * We cannot call btrfs_close_bdev() here because we're holding the sb
++	 * write lock, and blkdev_put() will pull in the ->open_mutex on the
++	 * block device and it's dependencies.  Instead just flush the device
++	 * and let the caller do the final blkdev_put.
+ 	 */
+-	if (test_bit(BTRFS_DEV_STATE_WRITEABLE, &device->dev_state))
++	if (test_bit(BTRFS_DEV_STATE_WRITEABLE, &device->dev_state)) {
+ 		btrfs_scratch_superblocks(fs_info, device->bdev,
+ 					  device->name->str);
++		if (device->bdev) {
++			sync_blockdev(device->bdev);
++			invalidate_bdev(device->bdev);
++		}
++	}
+ 
+-	btrfs_close_bdev(device);
++	*bdev = device->bdev;
++	*mode = device->mode;
+ 	synchronize_rcu();
+ 	btrfs_free_device(device);
+ 
+@@ -2769,7 +2783,7 @@ int btrfs_init_new_device(struct btrfs_fs_info *fs_info, const char *device_path
+ 	btrfs_forget_devices(device_path);
+ 
+ 	/* Update ctime/mtime for blkid or udev */
+-	update_dev_time(device_path);
++	update_dev_time(bdev);
+ 
+ 	return ret;
+ 
+diff --git a/fs/btrfs/volumes.h b/fs/btrfs/volumes.h
+index 55a8ba244716b..f77f869dfd2cf 100644
+--- a/fs/btrfs/volumes.h
++++ b/fs/btrfs/volumes.h
+@@ -472,7 +472,8 @@ struct btrfs_device *btrfs_alloc_device(struct btrfs_fs_info *fs_info,
+ 					const u8 *uuid);
+ void btrfs_free_device(struct btrfs_device *device);
+ int btrfs_rm_device(struct btrfs_fs_info *fs_info,
+-		    const char *device_path, u64 devid);
++		    const char *device_path, u64 devid,
++		    struct block_device **bdev, fmode_t *mode);
+ void __exit btrfs_cleanup_fs_uuids(void);
+ int btrfs_num_copies(struct btrfs_fs_info *fs_info, u64 logical, u64 len);
+ int btrfs_grow_device(struct btrfs_trans_handle *trans,
+diff --git a/fs/ceph/caps.c b/fs/ceph/caps.c
+index ba562efdf07b8..3296a93be907c 100644
+--- a/fs/ceph/caps.c
++++ b/fs/ceph/caps.c
+@@ -1859,6 +1859,8 @@ static u64 __mark_caps_flushing(struct inode *inode,
+  * try to invalidate mapping pages without blocking.
+  */
+ static int try_nonblocking_invalidate(struct inode *inode)
++	__releases(ci->i_ceph_lock)
++	__acquires(ci->i_ceph_lock)
+ {
+ 	struct ceph_inode_info *ci = ceph_inode(inode);
+ 	u32 invalidating_gen = ci->i_rdcache_gen;
+@@ -3117,7 +3119,16 @@ void ceph_put_wrbuffer_cap_refs(struct ceph_inode_info *ci, int nr,
+ 				break;
+ 			}
+ 		}
+-		BUG_ON(!found);
++
++		if (!found) {
++			/*
++			 * The capsnap should already be removed when removing
++			 * auth cap in the case of a forced unmount.
++			 */
++			WARN_ON_ONCE(ci->i_auth_cap);
++			goto unlock;
++		}
++
+ 		capsnap->dirty_pages -= nr;
+ 		if (capsnap->dirty_pages == 0) {
+ 			complete_capsnap = true;
+@@ -3139,6 +3150,7 @@ void ceph_put_wrbuffer_cap_refs(struct ceph_inode_info *ci, int nr,
+ 		     complete_capsnap ? " (complete capsnap)" : "");
+ 	}
+ 
++unlock:
+ 	spin_unlock(&ci->i_ceph_lock);
+ 
+ 	if (last) {
+@@ -3609,6 +3621,43 @@ out:
+ 		iput(inode);
+ }
+ 
++void __ceph_remove_capsnap(struct inode *inode, struct ceph_cap_snap *capsnap,
++			   bool *wake_ci, bool *wake_mdsc)
++{
++	struct ceph_inode_info *ci = ceph_inode(inode);
++	struct ceph_mds_client *mdsc = ceph_sb_to_client(inode->i_sb)->mdsc;
++	bool ret;
++
++	lockdep_assert_held(&ci->i_ceph_lock);
++
++	dout("removing capsnap %p, inode %p ci %p\n", capsnap, inode, ci);
++
++	list_del_init(&capsnap->ci_item);
++	ret = __detach_cap_flush_from_ci(ci, &capsnap->cap_flush);
++	if (wake_ci)
++		*wake_ci = ret;
++
++	spin_lock(&mdsc->cap_dirty_lock);
++	if (list_empty(&ci->i_cap_flush_list))
++		list_del_init(&ci->i_flushing_item);
++
++	ret = __detach_cap_flush_from_mdsc(mdsc, &capsnap->cap_flush);
++	if (wake_mdsc)
++		*wake_mdsc = ret;
++	spin_unlock(&mdsc->cap_dirty_lock);
++}
++
++void ceph_remove_capsnap(struct inode *inode, struct ceph_cap_snap *capsnap,
++			 bool *wake_ci, bool *wake_mdsc)
++{
++	struct ceph_inode_info *ci = ceph_inode(inode);
++
++	lockdep_assert_held(&ci->i_ceph_lock);
++
++	WARN_ON_ONCE(capsnap->dirty_pages || capsnap->writing);
++	__ceph_remove_capsnap(inode, capsnap, wake_ci, wake_mdsc);
++}
++
+ /*
+  * Handle FLUSHSNAP_ACK.  MDS has flushed snap data to disk and we can
+  * throw away our cap_snap.
+@@ -3646,23 +3695,10 @@ static void handle_cap_flushsnap_ack(struct inode *inode, u64 flush_tid,
+ 			     capsnap, capsnap->follows);
+ 		}
+ 	}
+-	if (flushed) {
+-		WARN_ON(capsnap->dirty_pages || capsnap->writing);
+-		dout(" removing %p cap_snap %p follows %lld\n",
+-		     inode, capsnap, follows);
+-		list_del(&capsnap->ci_item);
+-		wake_ci |= __detach_cap_flush_from_ci(ci, &capsnap->cap_flush);
+-
+-		spin_lock(&mdsc->cap_dirty_lock);
+-
+-		if (list_empty(&ci->i_cap_flush_list))
+-			list_del_init(&ci->i_flushing_item);
+-
+-		wake_mdsc |= __detach_cap_flush_from_mdsc(mdsc,
+-							  &capsnap->cap_flush);
+-		spin_unlock(&mdsc->cap_dirty_lock);
+-	}
++	if (flushed)
++		ceph_remove_capsnap(inode, capsnap, &wake_ci, &wake_mdsc);
+ 	spin_unlock(&ci->i_ceph_lock);
++
+ 	if (flushed) {
+ 		ceph_put_snap_context(capsnap->context);
+ 		ceph_put_cap_snap(capsnap);
+@@ -4137,8 +4173,9 @@ void ceph_handle_caps(struct ceph_mds_session *session,
+ done:
+ 	mutex_unlock(&session->s_mutex);
+ done_unlocked:
+-	ceph_put_string(extra_info.pool_ns);
+ 	iput(inode);
++out:
++	ceph_put_string(extra_info.pool_ns);
+ 	return;
+ 
+ flush_cap_releases:
+@@ -4153,7 +4190,7 @@ flush_cap_releases:
+ bad:
+ 	pr_err("ceph_handle_caps: corrupt message\n");
+ 	ceph_msg_dump(msg);
+-	return;
++	goto out;
+ }
+ 
+ /*
+diff --git a/fs/ceph/file.c b/fs/ceph/file.c
+index d1755ac1d964a..3daebfaec8c6d 100644
+--- a/fs/ceph/file.c
++++ b/fs/ceph/file.c
+@@ -1722,32 +1722,26 @@ retry_snap:
+ 		goto out;
+ 	}
+ 
+-	err = file_remove_privs(file);
+-	if (err)
++	down_read(&osdc->lock);
++	map_flags = osdc->osdmap->flags;
++	pool_flags = ceph_pg_pool_flags(osdc->osdmap, ci->i_layout.pool_id);
++	up_read(&osdc->lock);
++	if ((map_flags & CEPH_OSDMAP_FULL) ||
++	    (pool_flags & CEPH_POOL_FLAG_FULL)) {
++		err = -ENOSPC;
+ 		goto out;
++	}
+ 
+-	err = file_update_time(file);
++	err = file_remove_privs(file);
+ 	if (err)
+ 		goto out;
+ 
+-	inode_inc_iversion_raw(inode);
+-
+ 	if (ci->i_inline_version != CEPH_INLINE_NONE) {
+ 		err = ceph_uninline_data(file, NULL);
+ 		if (err < 0)
+ 			goto out;
+ 	}
+ 
+-	down_read(&osdc->lock);
+-	map_flags = osdc->osdmap->flags;
+-	pool_flags = ceph_pg_pool_flags(osdc->osdmap, ci->i_layout.pool_id);
+-	up_read(&osdc->lock);
+-	if ((map_flags & CEPH_OSDMAP_FULL) ||
+-	    (pool_flags & CEPH_POOL_FLAG_FULL)) {
+-		err = -ENOSPC;
+-		goto out;
+-	}
+-
+ 	dout("aio_write %p %llx.%llx %llu~%zd getting caps. i_size %llu\n",
+ 	     inode, ceph_vinop(inode), pos, count, i_size_read(inode));
+ 	if (fi->fmode & CEPH_FILE_MODE_LAZY)
+@@ -1759,6 +1753,12 @@ retry_snap:
+ 	if (err < 0)
+ 		goto out;
+ 
++	err = file_update_time(file);
++	if (err)
++		goto out_caps;
++
++	inode_inc_iversion_raw(inode);
++
+ 	dout("aio_write %p %llx.%llx %llu~%zd got cap refs on %s\n",
+ 	     inode, ceph_vinop(inode), pos, count, ceph_cap_string(got));
+ 
+@@ -1842,6 +1842,8 @@ retry_snap:
+ 	}
+ 
+ 	goto out_unlocked;
++out_caps:
++	ceph_put_cap_refs(ci, got);
+ out:
+ 	if (direct_lock)
+ 		ceph_end_io_direct(inode);
+diff --git a/fs/ceph/mds_client.c b/fs/ceph/mds_client.c
+index 0b69aec23e5c4..52b3ddc5f1991 100644
+--- a/fs/ceph/mds_client.c
++++ b/fs/ceph/mds_client.c
+@@ -1583,14 +1583,39 @@ out:
+ 	return ret;
+ }
+ 
++static int remove_capsnaps(struct ceph_mds_client *mdsc, struct inode *inode)
++{
++	struct ceph_inode_info *ci = ceph_inode(inode);
++	struct ceph_cap_snap *capsnap;
++	int capsnap_release = 0;
++
++	lockdep_assert_held(&ci->i_ceph_lock);
++
++	dout("removing capsnaps, ci is %p, inode is %p\n", ci, inode);
++
++	while (!list_empty(&ci->i_cap_snaps)) {
++		capsnap = list_first_entry(&ci->i_cap_snaps,
++					   struct ceph_cap_snap, ci_item);
++		__ceph_remove_capsnap(inode, capsnap, NULL, NULL);
++		ceph_put_snap_context(capsnap->context);
++		ceph_put_cap_snap(capsnap);
++		capsnap_release++;
++	}
++	wake_up_all(&ci->i_cap_wq);
++	wake_up_all(&mdsc->cap_flushing_wq);
++	return capsnap_release;
++}
++
+ static int remove_session_caps_cb(struct inode *inode, struct ceph_cap *cap,
+ 				  void *arg)
+ {
+ 	struct ceph_fs_client *fsc = (struct ceph_fs_client *)arg;
++	struct ceph_mds_client *mdsc = fsc->mdsc;
+ 	struct ceph_inode_info *ci = ceph_inode(inode);
+ 	LIST_HEAD(to_remove);
+ 	bool dirty_dropped = false;
+ 	bool invalidate = false;
++	int capsnap_release = 0;
+ 
+ 	dout("removing cap %p, ci is %p, inode is %p\n",
+ 	     cap, ci, &ci->vfs_inode);
+@@ -1598,7 +1623,6 @@ static int remove_session_caps_cb(struct inode *inode, struct ceph_cap *cap,
+ 	__ceph_remove_cap(cap, false);
+ 	if (!ci->i_auth_cap) {
+ 		struct ceph_cap_flush *cf;
+-		struct ceph_mds_client *mdsc = fsc->mdsc;
+ 
+ 		if (READ_ONCE(fsc->mount_state) >= CEPH_MOUNT_SHUTDOWN) {
+ 			if (inode->i_data.nrpages > 0)
+@@ -1662,6 +1686,9 @@ static int remove_session_caps_cb(struct inode *inode, struct ceph_cap *cap,
+ 			list_add(&ci->i_prealloc_cap_flush->i_list, &to_remove);
+ 			ci->i_prealloc_cap_flush = NULL;
+ 		}
++
++		if (!list_empty(&ci->i_cap_snaps))
++			capsnap_release = remove_capsnaps(mdsc, inode);
+ 	}
+ 	spin_unlock(&ci->i_ceph_lock);
+ 	while (!list_empty(&to_remove)) {
+@@ -1678,6 +1705,8 @@ static int remove_session_caps_cb(struct inode *inode, struct ceph_cap *cap,
+ 		ceph_queue_invalidate(inode);
+ 	if (dirty_dropped)
+ 		iput(inode);
++	while (capsnap_release--)
++		iput(inode);
+ 	return 0;
+ }
+ 
+@@ -4912,7 +4941,6 @@ void ceph_mdsc_destroy(struct ceph_fs_client *fsc)
+ 
+ 	ceph_metric_destroy(&mdsc->metric);
+ 
+-	flush_delayed_work(&mdsc->metric.delayed_work);
+ 	fsc->mdsc = NULL;
+ 	kfree(mdsc);
+ 	dout("mdsc_destroy %p done\n", mdsc);
+diff --git a/fs/ceph/metric.c b/fs/ceph/metric.c
+index 5ac151eb0d498..04d5df29bbbfb 100644
+--- a/fs/ceph/metric.c
++++ b/fs/ceph/metric.c
+@@ -302,6 +302,8 @@ void ceph_metric_destroy(struct ceph_client_metric *m)
+ 	if (!m)
+ 		return;
+ 
++	cancel_delayed_work_sync(&m->delayed_work);
++
+ 	percpu_counter_destroy(&m->total_inodes);
+ 	percpu_counter_destroy(&m->opened_inodes);
+ 	percpu_counter_destroy(&m->i_caps_mis);
+@@ -309,8 +311,6 @@ void ceph_metric_destroy(struct ceph_client_metric *m)
+ 	percpu_counter_destroy(&m->d_lease_mis);
+ 	percpu_counter_destroy(&m->d_lease_hit);
+ 
+-	cancel_delayed_work_sync(&m->delayed_work);
+-
+ 	ceph_put_mds_session(m->session);
+ }
+ 
+diff --git a/fs/ceph/super.h b/fs/ceph/super.h
+index b1a363641beb6..2200ed76b1230 100644
+--- a/fs/ceph/super.h
++++ b/fs/ceph/super.h
+@@ -1163,6 +1163,12 @@ extern void ceph_put_cap_refs_no_check_caps(struct ceph_inode_info *ci,
+ 					    int had);
+ extern void ceph_put_wrbuffer_cap_refs(struct ceph_inode_info *ci, int nr,
+ 				       struct ceph_snap_context *snapc);
++extern void __ceph_remove_capsnap(struct inode *inode,
++				  struct ceph_cap_snap *capsnap,
++				  bool *wake_ci, bool *wake_mdsc);
++extern void ceph_remove_capsnap(struct inode *inode,
++				struct ceph_cap_snap *capsnap,
++				bool *wake_ci, bool *wake_mdsc);
+ extern void ceph_flush_snaps(struct ceph_inode_info *ci,
+ 			     struct ceph_mds_session **psession);
+ extern bool __ceph_should_report_size(struct ceph_inode_info *ci);
+diff --git a/fs/cifs/smb2ops.c b/fs/cifs/smb2ops.c
+index 2dfd0d8297eb3..1b9de38a136aa 100644
+--- a/fs/cifs/smb2ops.c
++++ b/fs/cifs/smb2ops.c
+@@ -689,13 +689,19 @@ smb2_close_cached_fid(struct kref *ref)
+ 		cifs_dbg(FYI, "clear cached root file handle\n");
+ 		SMB2_close(0, cfid->tcon, cfid->fid->persistent_fid,
+ 			   cfid->fid->volatile_fid);
+-		cfid->is_valid = false;
+-		cfid->file_all_info_is_valid = false;
+-		cfid->has_lease = false;
+-		if (cfid->dentry) {
+-			dput(cfid->dentry);
+-			cfid->dentry = NULL;
+-		}
++	}
++
++	/*
++	 * We only check validity above to send SMB2_close,
++	 * but we still need to invalidate these entries
++	 * when this function is called
++	 */
++	cfid->is_valid = false;
++	cfid->file_all_info_is_valid = false;
++	cfid->has_lease = false;
++	if (cfid->dentry) {
++		dput(cfid->dentry);
++		cfid->dentry = NULL;
+ 	}
+ }
+ 
+diff --git a/fs/coredump.c b/fs/coredump.c
+index 07afb5ddb1c4e..19fe5312c10f3 100644
+--- a/fs/coredump.c
++++ b/fs/coredump.c
+@@ -1127,8 +1127,10 @@ int dump_vma_snapshot(struct coredump_params *cprm, int *vma_count,
+ 
+ 	mmap_write_unlock(mm);
+ 
+-	if (WARN_ON(i != *vma_count))
++	if (WARN_ON(i != *vma_count)) {
++		kvfree(*vma_meta);
+ 		return -EFAULT;
++	}
+ 
+ 	*vma_data_size_ptr = vma_data_size;
+ 	return 0;
+diff --git a/fs/io_uring.c b/fs/io_uring.c
+index 43aaa35664315..754d59f734d84 100644
+--- a/fs/io_uring.c
++++ b/fs/io_uring.c
+@@ -10335,7 +10335,7 @@ static int __init io_uring_init(void)
+ 	BUILD_BUG_ON(SQE_VALID_FLAGS >= (1 << 8));
+ 
+ 	BUILD_BUG_ON(ARRAY_SIZE(io_op_defs) != IORING_OP_LAST);
+-	BUILD_BUG_ON(__REQ_F_LAST_BIT >= 8 * sizeof(int));
++	BUILD_BUG_ON(__REQ_F_LAST_BIT > 8 * sizeof(int));
+ 
+ 	req_cachep = KMEM_CACHE(io_kiocb, SLAB_HWCACHE_ALIGN | SLAB_PANIC |
+ 				SLAB_ACCOUNT);
+diff --git a/fs/nilfs2/sysfs.c b/fs/nilfs2/sysfs.c
+index 68e8d61e28dd5..62f8a7ac19c85 100644
+--- a/fs/nilfs2/sysfs.c
++++ b/fs/nilfs2/sysfs.c
+@@ -51,11 +51,9 @@ static const struct sysfs_ops nilfs_##name##_attr_ops = { \
+ #define NILFS_DEV_INT_GROUP_TYPE(name, parent_name) \
+ static void nilfs_##name##_attr_release(struct kobject *kobj) \
+ { \
+-	struct nilfs_sysfs_##parent_name##_subgroups *subgroups; \
+-	struct the_nilfs *nilfs = container_of(kobj->parent, \
+-						struct the_nilfs, \
+-						ns_##parent_name##_kobj); \
+-	subgroups = nilfs->ns_##parent_name##_subgroups; \
++	struct nilfs_sysfs_##parent_name##_subgroups *subgroups = container_of(kobj, \
++						struct nilfs_sysfs_##parent_name##_subgroups, \
++						sg_##name##_kobj); \
+ 	complete(&subgroups->sg_##name##_kobj_unregister); \
+ } \
+ static struct kobj_type nilfs_##name##_ktype = { \
+@@ -81,12 +79,12 @@ static int nilfs_sysfs_create_##name##_group(struct the_nilfs *nilfs) \
+ 	err = kobject_init_and_add(kobj, &nilfs_##name##_ktype, parent, \
+ 				    #name); \
+ 	if (err) \
+-		return err; \
+-	return 0; \
++		kobject_put(kobj); \
++	return err; \
+ } \
+ static void nilfs_sysfs_delete_##name##_group(struct the_nilfs *nilfs) \
+ { \
+-	kobject_del(&nilfs->ns_##parent_name##_subgroups->sg_##name##_kobj); \
++	kobject_put(&nilfs->ns_##parent_name##_subgroups->sg_##name##_kobj); \
+ }
+ 
+ /************************************************************************
+@@ -197,14 +195,14 @@ int nilfs_sysfs_create_snapshot_group(struct nilfs_root *root)
+ 	}
+ 
+ 	if (err)
+-		return err;
++		kobject_put(&root->snapshot_kobj);
+ 
+-	return 0;
++	return err;
+ }
+ 
+ void nilfs_sysfs_delete_snapshot_group(struct nilfs_root *root)
+ {
+-	kobject_del(&root->snapshot_kobj);
++	kobject_put(&root->snapshot_kobj);
+ }
+ 
+ /************************************************************************
+@@ -986,7 +984,7 @@ int nilfs_sysfs_create_device_group(struct super_block *sb)
+ 	err = kobject_init_and_add(&nilfs->ns_dev_kobj, &nilfs_dev_ktype, NULL,
+ 				    "%s", sb->s_id);
+ 	if (err)
+-		goto free_dev_subgroups;
++		goto cleanup_dev_kobject;
+ 
+ 	err = nilfs_sysfs_create_mounted_snapshots_group(nilfs);
+ 	if (err)
+@@ -1023,9 +1021,7 @@ delete_mounted_snapshots_group:
+ 	nilfs_sysfs_delete_mounted_snapshots_group(nilfs);
+ 
+ cleanup_dev_kobject:
+-	kobject_del(&nilfs->ns_dev_kobj);
+-
+-free_dev_subgroups:
++	kobject_put(&nilfs->ns_dev_kobj);
+ 	kfree(nilfs->ns_dev_subgroups);
+ 
+ failed_create_device_group:
+diff --git a/fs/nilfs2/the_nilfs.c b/fs/nilfs2/the_nilfs.c
+index 8b7b01a380cea..c8bfc01da5d71 100644
+--- a/fs/nilfs2/the_nilfs.c
++++ b/fs/nilfs2/the_nilfs.c
+@@ -792,14 +792,13 @@ nilfs_find_or_create_root(struct the_nilfs *nilfs, __u64 cno)
+ 
+ void nilfs_put_root(struct nilfs_root *root)
+ {
+-	if (refcount_dec_and_test(&root->count)) {
+-		struct the_nilfs *nilfs = root->nilfs;
++	struct the_nilfs *nilfs = root->nilfs;
+ 
+-		nilfs_sysfs_delete_snapshot_group(root);
+-
+-		spin_lock(&nilfs->ns_cptree_lock);
++	if (refcount_dec_and_lock(&root->count, &nilfs->ns_cptree_lock)) {
+ 		rb_erase(&root->rb_node, &nilfs->ns_cptree);
+ 		spin_unlock(&nilfs->ns_cptree_lock);
++
++		nilfs_sysfs_delete_snapshot_group(root);
+ 		iput(root->ifile);
+ 
+ 		kfree(root);
+diff --git a/include/linux/cacheinfo.h b/include/linux/cacheinfo.h
+index 4f72b47973c30..2f909ed084c63 100644
+--- a/include/linux/cacheinfo.h
++++ b/include/linux/cacheinfo.h
+@@ -79,24 +79,6 @@ struct cpu_cacheinfo {
+ 	bool cpu_map_populated;
+ };
+ 
+-/*
+- * Helpers to make sure "func" is executed on the cpu whose cache
+- * attributes are being detected
+- */
+-#define DEFINE_SMP_CALL_CACHE_FUNCTION(func)			\
+-static inline void _##func(void *ret)				\
+-{								\
+-	int cpu = smp_processor_id();				\
+-	*(int *)ret = __##func(cpu);				\
+-}								\
+-								\
+-int func(unsigned int cpu)					\
+-{								\
+-	int ret;						\
+-	smp_call_function_single(cpu, _##func, &ret, true);	\
+-	return ret;						\
+-}
+-
+ struct cpu_cacheinfo *get_cpu_cacheinfo(unsigned int cpu);
+ int init_cache_level(unsigned int cpu);
+ int populate_cache_leaves(unsigned int cpu);
+diff --git a/include/linux/thermal.h b/include/linux/thermal.h
+index d296f3b88fb98..8050d929a5b45 100644
+--- a/include/linux/thermal.h
++++ b/include/linux/thermal.h
+@@ -404,12 +404,13 @@ static inline void thermal_zone_device_unregister(
+ 	struct thermal_zone_device *tz)
+ { }
+ static inline struct thermal_cooling_device *
+-thermal_cooling_device_register(char *type, void *devdata,
++thermal_cooling_device_register(const char *type, void *devdata,
+ 	const struct thermal_cooling_device_ops *ops)
+ { return ERR_PTR(-ENODEV); }
+ static inline struct thermal_cooling_device *
+ thermal_of_cooling_device_register(struct device_node *np,
+-	char *type, void *devdata, const struct thermal_cooling_device_ops *ops)
++	const char *type, void *devdata,
++	const struct thermal_cooling_device_ops *ops)
+ { return ERR_PTR(-ENODEV); }
+ static inline struct thermal_cooling_device *
+ devm_thermal_of_cooling_device_register(struct device *dev,
+diff --git a/include/uapi/misc/habanalabs.h b/include/uapi/misc/habanalabs.h
+index a47a731e45277..b4b681b81df81 100644
+--- a/include/uapi/misc/habanalabs.h
++++ b/include/uapi/misc/habanalabs.h
+@@ -276,7 +276,9 @@ enum hl_device_status {
+ 	HL_DEVICE_STATUS_OPERATIONAL,
+ 	HL_DEVICE_STATUS_IN_RESET,
+ 	HL_DEVICE_STATUS_MALFUNCTION,
+-	HL_DEVICE_STATUS_NEEDS_RESET
++	HL_DEVICE_STATUS_NEEDS_RESET,
++	HL_DEVICE_STATUS_IN_DEVICE_CREATION,
++	HL_DEVICE_STATUS_LAST = HL_DEVICE_STATUS_IN_DEVICE_CREATION
+ };
+ 
+ /* Opcode for management ioctl
+diff --git a/init/initramfs.c b/init/initramfs.c
+index af27abc596436..a842c05447456 100644
+--- a/init/initramfs.c
++++ b/init/initramfs.c
+@@ -15,6 +15,7 @@
+ #include <linux/mm.h>
+ #include <linux/namei.h>
+ #include <linux/init_syscalls.h>
++#include <linux/umh.h>
+ 
+ static ssize_t __init xwrite(struct file *file, const char *p, size_t count,
+ 		loff_t *pos)
+@@ -727,6 +728,7 @@ static int __init populate_rootfs(void)
+ {
+ 	initramfs_cookie = async_schedule_domain(do_populate_rootfs, NULL,
+ 						 &initramfs_domain);
++	usermodehelper_enable();
+ 	if (!initramfs_async)
+ 		wait_for_initramfs();
+ 	return 0;
+diff --git a/init/main.c b/init/main.c
+index 8d97aba78c3ad..90733a916791f 100644
+--- a/init/main.c
++++ b/init/main.c
+@@ -1392,7 +1392,6 @@ static void __init do_basic_setup(void)
+ 	driver_init();
+ 	init_irq_proc();
+ 	do_ctors();
+-	usermodehelper_enable();
+ 	do_initcalls();
+ }
+ 
+diff --git a/init/noinitramfs.c b/init/noinitramfs.c
+index 3d62b07f3bb9c..d1d26b93d25cd 100644
+--- a/init/noinitramfs.c
++++ b/init/noinitramfs.c
+@@ -10,6 +10,7 @@
+ #include <linux/kdev_t.h>
+ #include <linux/syscalls.h>
+ #include <linux/init_syscalls.h>
++#include <linux/umh.h>
+ 
+ /*
+  * Create a simple rootfs that is similar to the default initramfs
+@@ -18,6 +19,7 @@ static int __init default_rootfs(void)
+ {
+ 	int err;
+ 
++	usermodehelper_enable();
+ 	err = init_mkdir("/dev", 0755);
+ 	if (err < 0)
+ 		goto out;
+diff --git a/kernel/profile.c b/kernel/profile.c
+index c2ebddb5e9746..eb9c7f0f5ac52 100644
+--- a/kernel/profile.c
++++ b/kernel/profile.c
+@@ -41,7 +41,8 @@ struct profile_hit {
+ #define NR_PROFILE_GRP		(NR_PROFILE_HIT/PROFILE_GRPSZ)
+ 
+ static atomic_t *prof_buffer;
+-static unsigned long prof_len, prof_shift;
++static unsigned long prof_len;
++static unsigned short int prof_shift;
+ 
+ int prof_on __read_mostly;
+ EXPORT_SYMBOL_GPL(prof_on);
+@@ -67,8 +68,8 @@ int profile_setup(char *str)
+ 		if (str[strlen(sleepstr)] == ',')
+ 			str += strlen(sleepstr) + 1;
+ 		if (get_option(&str, &par))
+-			prof_shift = par;
+-		pr_info("kernel sleep profiling enabled (shift: %ld)\n",
++			prof_shift = clamp(par, 0, BITS_PER_LONG - 1);
++		pr_info("kernel sleep profiling enabled (shift: %u)\n",
+ 			prof_shift);
+ #else
+ 		pr_warn("kernel sleep profiling requires CONFIG_SCHEDSTATS\n");
+@@ -78,21 +79,21 @@ int profile_setup(char *str)
+ 		if (str[strlen(schedstr)] == ',')
+ 			str += strlen(schedstr) + 1;
+ 		if (get_option(&str, &par))
+-			prof_shift = par;
+-		pr_info("kernel schedule profiling enabled (shift: %ld)\n",
++			prof_shift = clamp(par, 0, BITS_PER_LONG - 1);
++		pr_info("kernel schedule profiling enabled (shift: %u)\n",
+ 			prof_shift);
+ 	} else if (!strncmp(str, kvmstr, strlen(kvmstr))) {
+ 		prof_on = KVM_PROFILING;
+ 		if (str[strlen(kvmstr)] == ',')
+ 			str += strlen(kvmstr) + 1;
+ 		if (get_option(&str, &par))
+-			prof_shift = par;
+-		pr_info("kernel KVM profiling enabled (shift: %ld)\n",
++			prof_shift = clamp(par, 0, BITS_PER_LONG - 1);
++		pr_info("kernel KVM profiling enabled (shift: %u)\n",
+ 			prof_shift);
+ 	} else if (get_option(&str, &par)) {
+-		prof_shift = par;
++		prof_shift = clamp(par, 0, BITS_PER_LONG - 1);
+ 		prof_on = CPU_PROFILING;
+-		pr_info("kernel profiling enabled (shift: %ld)\n",
++		pr_info("kernel profiling enabled (shift: %u)\n",
+ 			prof_shift);
+ 	}
+ 	return 1;
+@@ -468,7 +469,7 @@ read_profile(struct file *file, char __user *buf, size_t count, loff_t *ppos)
+ 	unsigned long p = *ppos;
+ 	ssize_t read;
+ 	char *pnt;
+-	unsigned int sample_step = 1 << prof_shift;
++	unsigned long sample_step = 1UL << prof_shift;
+ 
+ 	profile_flip_buffers();
+ 	if (p >= (prof_len+1)*sizeof(unsigned int))
+diff --git a/kernel/sched/idle.c b/kernel/sched/idle.c
+index 912b47aa99d82..d17b0a5ce6ac3 100644
+--- a/kernel/sched/idle.c
++++ b/kernel/sched/idle.c
+@@ -379,10 +379,10 @@ void play_idle_precise(u64 duration_ns, u64 latency_ns)
+ 	cpuidle_use_deepest_state(latency_ns);
+ 
+ 	it.done = 0;
+-	hrtimer_init_on_stack(&it.timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
++	hrtimer_init_on_stack(&it.timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL_HARD);
+ 	it.timer.function = idle_inject_timer_fn;
+ 	hrtimer_start(&it.timer, ns_to_ktime(duration_ns),
+-		      HRTIMER_MODE_REL_PINNED);
++		      HRTIMER_MODE_REL_PINNED_HARD);
+ 
+ 	while (!READ_ONCE(it.done))
+ 		do_idle();
+diff --git a/kernel/sys.c b/kernel/sys.c
+index ef1a78f5d71c7..6ec50924b5176 100644
+--- a/kernel/sys.c
++++ b/kernel/sys.c
+@@ -1959,13 +1959,6 @@ static int validate_prctl_map_addr(struct prctl_mm_map *prctl_map)
+ 
+ 	error = -EINVAL;
+ 
+-	/*
+-	 * @brk should be after @end_data in traditional maps.
+-	 */
+-	if (prctl_map->start_brk <= prctl_map->end_data ||
+-	    prctl_map->brk <= prctl_map->end_data)
+-		goto out;
+-
+ 	/*
+ 	 * Neither we should allow to override limits if they set.
+ 	 */
+diff --git a/kernel/trace/trace_boot.c b/kernel/trace/trace_boot.c
+index d713714cba67f..4bd8f94a56c63 100644
+--- a/kernel/trace/trace_boot.c
++++ b/kernel/trace/trace_boot.c
+@@ -235,14 +235,14 @@ trace_boot_init_events(struct trace_array *tr, struct xbc_node *node)
+ 	if (!node)
+ 		return;
+ 	/* per-event key starts with "event.GROUP.EVENT" */
+-	xbc_node_for_each_child(node, gnode) {
++	xbc_node_for_each_subkey(node, gnode) {
+ 		data = xbc_node_get_data(gnode);
+ 		if (!strcmp(data, "enable")) {
+ 			enable_all = true;
+ 			continue;
+ 		}
+ 		enable = false;
+-		xbc_node_for_each_child(gnode, enode) {
++		xbc_node_for_each_subkey(gnode, enode) {
+ 			data = xbc_node_get_data(enode);
+ 			if (!strcmp(data, "enable")) {
+ 				enable = true;
+@@ -338,7 +338,7 @@ trace_boot_init_instances(struct xbc_node *node)
+ 	if (!node)
+ 		return;
+ 
+-	xbc_node_for_each_child(node, inode) {
++	xbc_node_for_each_subkey(node, inode) {
+ 		p = xbc_node_get_data(inode);
+ 		if (!p || *p == '\0')
+ 			continue;
+diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug
+index 5ddd575159fb8..ffd22e499997a 100644
+--- a/lib/Kconfig.debug
++++ b/lib/Kconfig.debug
+@@ -1062,7 +1062,6 @@ config HARDLOCKUP_DETECTOR
+ 	depends on HAVE_HARDLOCKUP_DETECTOR_PERF || HAVE_HARDLOCKUP_DETECTOR_ARCH
+ 	select LOCKUP_DETECTOR
+ 	select HARDLOCKUP_DETECTOR_PERF if HAVE_HARDLOCKUP_DETECTOR_PERF
+-	select HARDLOCKUP_DETECTOR_ARCH if HAVE_HARDLOCKUP_DETECTOR_ARCH
+ 	help
+ 	  Say Y here to enable the kernel to act as a watchdog to detect
+ 	  hard lockups.
+@@ -2460,8 +2459,7 @@ config SLUB_KUNIT_TEST
+ 
+ config RATIONAL_KUNIT_TEST
+ 	tristate "KUnit test for rational.c" if !KUNIT_ALL_TESTS
+-	depends on KUNIT
+-	select RATIONAL
++	depends on KUNIT && RATIONAL
+ 	default KUNIT_ALL_TESTS
+ 	help
+ 	  This builds the rational math unit test.
+diff --git a/net/9p/trans_virtio.c b/net/9p/trans_virtio.c
+index 2bbd7dce0f1d3..490a4c9003395 100644
+--- a/net/9p/trans_virtio.c
++++ b/net/9p/trans_virtio.c
+@@ -610,7 +610,7 @@ static int p9_virtio_probe(struct virtio_device *vdev)
+ 	chan->vc_wq = kmalloc(sizeof(wait_queue_head_t), GFP_KERNEL);
+ 	if (!chan->vc_wq) {
+ 		err = -ENOMEM;
+-		goto out_free_tag;
++		goto out_remove_file;
+ 	}
+ 	init_waitqueue_head(chan->vc_wq);
+ 	chan->ring_bufs_avail = 1;
+@@ -628,6 +628,8 @@ static int p9_virtio_probe(struct virtio_device *vdev)
+ 
+ 	return 0;
+ 
++out_remove_file:
++	sysfs_remove_file(&vdev->dev.kobj, &dev_attr_mount_tag.attr);
+ out_free_tag:
+ 	kfree(tag);
+ out_free_vq:
+diff --git a/net/sunrpc/svc_xprt.c b/net/sunrpc/svc_xprt.c
+index dbb41821b1b85..cd5a2b186f0d0 100644
+--- a/net/sunrpc/svc_xprt.c
++++ b/net/sunrpc/svc_xprt.c
+@@ -662,7 +662,7 @@ static int svc_alloc_arg(struct svc_rqst *rqstp)
+ {
+ 	struct svc_serv *serv = rqstp->rq_server;
+ 	struct xdr_buf *arg = &rqstp->rq_arg;
+-	unsigned long pages, filled;
++	unsigned long pages, filled, ret;
+ 
+ 	pages = (serv->sv_max_mesg + 2 * PAGE_SIZE) >> PAGE_SHIFT;
+ 	if (pages > RPCSVC_MAXPAGES) {
+@@ -672,11 +672,12 @@ static int svc_alloc_arg(struct svc_rqst *rqstp)
+ 		pages = RPCSVC_MAXPAGES;
+ 	}
+ 
+-	for (;;) {
+-		filled = alloc_pages_bulk_array(GFP_KERNEL, pages,
+-						rqstp->rq_pages);
+-		if (filled == pages)
+-			break;
++	for (filled = 0; filled < pages; filled = ret) {
++		ret = alloc_pages_bulk_array(GFP_KERNEL, pages,
++					     rqstp->rq_pages);
++		if (ret > filled)
++			/* Made progress, don't sleep yet */
++			continue;
+ 
+ 		set_current_state(TASK_INTERRUPTIBLE);
+ 		if (signalled() || kthread_should_stop()) {
+diff --git a/security/selinux/hooks.c b/security/selinux/hooks.c
+index b0032c42333eb..572e564bf6cd9 100644
+--- a/security/selinux/hooks.c
++++ b/security/selinux/hooks.c
+@@ -2155,7 +2155,7 @@ static int selinux_ptrace_access_check(struct task_struct *child,
+ static int selinux_ptrace_traceme(struct task_struct *parent)
+ {
+ 	return avc_has_perm(&selinux_state,
+-			    task_sid_subj(parent), task_sid_obj(current),
++			    task_sid_obj(parent), task_sid_obj(current),
+ 			    SECCLASS_PROCESS, PROCESS__PTRACE, NULL);
+ }
+ 
+@@ -6218,7 +6218,7 @@ static int selinux_msg_queue_msgrcv(struct kern_ipc_perm *msq, struct msg_msg *m
+ 	struct ipc_security_struct *isec;
+ 	struct msg_security_struct *msec;
+ 	struct common_audit_data ad;
+-	u32 sid = task_sid_subj(target);
++	u32 sid = task_sid_obj(target);
+ 	int rc;
+ 
+ 	isec = selinux_ipc(msq);
+diff --git a/security/smack/smack_lsm.c b/security/smack/smack_lsm.c
+index 223a6da0e6dc5..b1694fa6f12b1 100644
+--- a/security/smack/smack_lsm.c
++++ b/security/smack/smack_lsm.c
+@@ -2016,7 +2016,7 @@ static int smk_curacc_on_task(struct task_struct *p, int access,
+ 				const char *caller)
+ {
+ 	struct smk_audit_info ad;
+-	struct smack_known *skp = smk_of_task_struct_subj(p);
++	struct smack_known *skp = smk_of_task_struct_obj(p);
+ 	int rc;
+ 
+ 	smk_ad_init(&ad, caller, LSM_AUDIT_DATA_TASK);
+@@ -3480,7 +3480,7 @@ static void smack_d_instantiate(struct dentry *opt_dentry, struct inode *inode)
+  */
+ static int smack_getprocattr(struct task_struct *p, char *name, char **value)
+ {
+-	struct smack_known *skp = smk_of_task_struct_subj(p);
++	struct smack_known *skp = smk_of_task_struct_obj(p);
+ 	char *cp;
+ 	int slen;
+ 
+diff --git a/sound/soc/generic/audio-graph-card.c b/sound/soc/generic/audio-graph-card.c
+index 5e71382467e88..546f6fd0609e1 100644
+--- a/sound/soc/generic/audio-graph-card.c
++++ b/sound/soc/generic/audio-graph-card.c
+@@ -285,6 +285,7 @@ static int graph_dai_link_of_dpcm(struct asoc_simple_priv *priv,
+ 	if (li->cpu) {
+ 		struct snd_soc_card *card = simple_priv_to_card(priv);
+ 		struct snd_soc_dai_link_component *cpus = asoc_link_to_cpu(dai_link, 0);
++		struct snd_soc_dai_link_component *platforms = asoc_link_to_platform(dai_link, 0);
+ 		int is_single_links = 0;
+ 
+ 		/* Codec is dummy */
+@@ -313,6 +314,7 @@ static int graph_dai_link_of_dpcm(struct asoc_simple_priv *priv,
+ 			dai_link->no_pcm = 1;
+ 
+ 		asoc_simple_canonicalize_cpu(cpus, is_single_links);
++		asoc_simple_canonicalize_platform(platforms, cpus);
+ 	} else {
+ 		struct snd_soc_codec_conf *cconf = simple_props_to_codec_conf(dai_props, 0);
+ 		struct snd_soc_dai_link_component *codecs = asoc_link_to_codec(dai_link, 0);
+@@ -366,6 +368,7 @@ static int graph_dai_link_of(struct asoc_simple_priv *priv,
+ 	struct snd_soc_dai_link *dai_link = simple_priv_to_link(priv, li->link);
+ 	struct snd_soc_dai_link_component *cpus = asoc_link_to_cpu(dai_link, 0);
+ 	struct snd_soc_dai_link_component *codecs = asoc_link_to_codec(dai_link, 0);
++	struct snd_soc_dai_link_component *platforms = asoc_link_to_platform(dai_link, 0);
+ 	char dai_name[64];
+ 	int ret, is_single_links = 0;
+ 
+@@ -383,6 +386,7 @@ static int graph_dai_link_of(struct asoc_simple_priv *priv,
+ 		 "%s-%s", cpus->dai_name, codecs->dai_name);
+ 
+ 	asoc_simple_canonicalize_cpu(cpus, is_single_links);
++	asoc_simple_canonicalize_platform(platforms, cpus);
+ 
+ 	ret = graph_link_init(priv, cpu_ep, codec_ep, li, dai_name);
+ 	if (ret < 0)
+@@ -608,6 +612,7 @@ static int graph_count_noml(struct asoc_simple_priv *priv,
+ 
+ 	li->num[li->link].cpus		= 1;
+ 	li->num[li->link].codecs	= 1;
++	li->num[li->link].platforms     = 1;
+ 
+ 	li->link += 1; /* 1xCPU-Codec */
+ 
+@@ -630,6 +635,7 @@ static int graph_count_dpcm(struct asoc_simple_priv *priv,
+ 
+ 	if (li->cpu) {
+ 		li->num[li->link].cpus		= 1;
++		li->num[li->link].platforms     = 1;
+ 
+ 		li->link++; /* 1xCPU-dummy */
+ 	} else {
+diff --git a/tools/bootconfig/scripts/ftrace2bconf.sh b/tools/bootconfig/scripts/ftrace2bconf.sh
+index a0c3bcc6da4f3..fb201d5afe2c1 100755
+--- a/tools/bootconfig/scripts/ftrace2bconf.sh
++++ b/tools/bootconfig/scripts/ftrace2bconf.sh
+@@ -222,8 +222,8 @@ instance_options() { # [instance-name]
+ 		emit_kv $PREFIX.cpumask = $val
+ 	fi
+ 	val=`cat $INSTANCE/tracing_on`
+-	if [ `echo $val | sed -e s/f//g`x != x ]; then
+-		emit_kv $PREFIX.tracing_on = $val
++	if [ "$val" = "0" ]; then
++		emit_kv $PREFIX.tracing_on = 0
+ 	fi
+ 
+ 	val=
+diff --git a/tools/perf/tests/bpf.c b/tools/perf/tests/bpf.c
+index dbf5f5215abee..fa03ff0dc0831 100644
+--- a/tools/perf/tests/bpf.c
++++ b/tools/perf/tests/bpf.c
+@@ -192,7 +192,7 @@ static int do_test(struct bpf_object *obj, int (*func)(void),
+ 	}
+ 
+ 	if (count != expect * evlist->core.nr_entries) {
+-		pr_debug("BPF filter result incorrect, expected %d, got %d samples\n", expect, count);
++		pr_debug("BPF filter result incorrect, expected %d, got %d samples\n", expect * evlist->core.nr_entries, count);
+ 		goto out_delete_evlist;
+ 	}
+ 
+diff --git a/tools/perf/util/dso.c b/tools/perf/util/dso.c
+index ee15db2be2f43..9ed9a5676d352 100644
+--- a/tools/perf/util/dso.c
++++ b/tools/perf/util/dso.c
+@@ -1349,6 +1349,16 @@ void dso__set_build_id(struct dso *dso, struct build_id *bid)
+ 
+ bool dso__build_id_equal(const struct dso *dso, struct build_id *bid)
+ {
++	if (dso->bid.size > bid->size && dso->bid.size == BUILD_ID_SIZE) {
++		/*
++		 * For the backward compatibility, it allows a build-id has
++		 * trailing zeros.
++		 */
++		return !memcmp(dso->bid.data, bid->data, bid->size) &&
++			!memchr_inv(&dso->bid.data[bid->size], 0,
++				    dso->bid.size - bid->size);
++	}
++
+ 	return dso->bid.size == bid->size &&
+ 	       memcmp(dso->bid.data, bid->data, dso->bid.size) == 0;
+ }
+diff --git a/tools/perf/util/symbol.c b/tools/perf/util/symbol.c
+index 77fc46ca07c07..0fc9a54107399 100644
+--- a/tools/perf/util/symbol.c
++++ b/tools/perf/util/symbol.c
+@@ -1581,10 +1581,6 @@ int dso__load_bfd_symbols(struct dso *dso, const char *debugfile)
+ 	if (bfd_get_flavour(abfd) == bfd_target_elf_flavour)
+ 		goto out_close;
+ 
+-	section = bfd_get_section_by_name(abfd, ".text");
+-	if (section)
+-		dso->text_offset = section->vma - section->filepos;
+-
+ 	symbols_size = bfd_get_symtab_upper_bound(abfd);
+ 	if (symbols_size == 0) {
+ 		bfd_close(abfd);
+@@ -1602,6 +1598,22 @@ int dso__load_bfd_symbols(struct dso *dso, const char *debugfile)
+ 	if (symbols_count < 0)
+ 		goto out_free;
+ 
++	section = bfd_get_section_by_name(abfd, ".text");
++	if (section) {
++		for (i = 0; i < symbols_count; ++i) {
++			if (!strcmp(bfd_asymbol_name(symbols[i]), "__ImageBase") ||
++			    !strcmp(bfd_asymbol_name(symbols[i]), "__image_base__"))
++				break;
++		}
++		if (i < symbols_count) {
++			/* PE symbols can only have 4 bytes, so use .text high bits */
++			dso->text_offset = section->vma - (u32)section->vma;
++			dso->text_offset += (u32)bfd_asymbol_value(symbols[i]);
++		} else {
++			dso->text_offset = section->vma - section->filepos;
++		}
++	}
++
+ 	qsort(symbols, symbols_count, sizeof(asymbol *), bfd_symbols__cmpvalue);
+ 
+ #ifdef bfd_get_section