1 |
commit: 490d5af622c424f52dc4032477639b11b50edfa8 |
2 |
Author: Mike Pagano <mpagano <AT> gentoo <DOT> org> |
3 |
AuthorDate: Thu Sep 8 10:48:13 2022 +0000 |
4 |
Commit: Mike Pagano <mpagano <AT> gentoo <DOT> org> |
5 |
CommitDate: Thu Sep 8 10:48:13 2022 +0000 |
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URL: https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=490d5af6 |
7 |
|
8 |
Linux patch 5.15.66 |
9 |
|
10 |
Signed-off-by: Mike Pagano <mpagano <AT> gentoo.org> |
11 |
|
12 |
0000_README | 4 + |
13 |
1065_linux-5.15.66.patch | 7081 ++++++++++++++++++++++++++++++++++++++++++++++ |
14 |
2 files changed, 7085 insertions(+) |
15 |
|
16 |
diff --git a/0000_README b/0000_README |
17 |
index 079ad2a6..25df4d69 100644 |
18 |
--- a/0000_README |
19 |
+++ b/0000_README |
20 |
@@ -303,6 +303,10 @@ Patch: 1064_linux-5.15.65.patch |
21 |
From: http://www.kernel.org |
22 |
Desc: Linux 5.15.65 |
23 |
|
24 |
+Patch: 1065_linux-5.15.66.patch |
25 |
+From: http://www.kernel.org |
26 |
+Desc: Linux 5.15.66 |
27 |
+ |
28 |
Patch: 1500_XATTR_USER_PREFIX.patch |
29 |
From: https://bugs.gentoo.org/show_bug.cgi?id=470644 |
30 |
Desc: Support for namespace user.pax.* on tmpfs. |
31 |
|
32 |
diff --git a/1065_linux-5.15.66.patch b/1065_linux-5.15.66.patch |
33 |
new file mode 100644 |
34 |
index 00000000..731e8732 |
35 |
--- /dev/null |
36 |
+++ b/1065_linux-5.15.66.patch |
37 |
@@ -0,0 +1,7081 @@ |
38 |
+diff --git a/Makefile b/Makefile |
39 |
+index 9142dbf41f0d8..4e747c99e7e07 100644 |
40 |
+--- a/Makefile |
41 |
++++ b/Makefile |
42 |
+@@ -1,7 +1,7 @@ |
43 |
+ # SPDX-License-Identifier: GPL-2.0 |
44 |
+ VERSION = 5 |
45 |
+ PATCHLEVEL = 15 |
46 |
+-SUBLEVEL = 65 |
47 |
++SUBLEVEL = 66 |
48 |
+ EXTRAVERSION = |
49 |
+ NAME = Trick or Treat |
50 |
+ |
51 |
+@@ -480,6 +480,8 @@ LZ4 = lz4c |
52 |
+ XZ = xz |
53 |
+ ZSTD = zstd |
54 |
+ |
55 |
++PAHOLE_FLAGS = $(shell PAHOLE=$(PAHOLE) $(srctree)/scripts/pahole-flags.sh) |
56 |
++ |
57 |
+ CHECKFLAGS := -D__linux__ -Dlinux -D__STDC__ -Dunix -D__unix__ \ |
58 |
+ -Wbitwise -Wno-return-void -Wno-unknown-attribute $(CF) |
59 |
+ NOSTDINC_FLAGS := |
60 |
+@@ -534,6 +536,7 @@ export KBUILD_CFLAGS CFLAGS_KERNEL CFLAGS_MODULE |
61 |
+ export KBUILD_AFLAGS AFLAGS_KERNEL AFLAGS_MODULE |
62 |
+ export KBUILD_AFLAGS_MODULE KBUILD_CFLAGS_MODULE KBUILD_LDFLAGS_MODULE |
63 |
+ export KBUILD_AFLAGS_KERNEL KBUILD_CFLAGS_KERNEL |
64 |
++export PAHOLE_FLAGS |
65 |
+ |
66 |
+ # Files to ignore in find ... statements |
67 |
+ |
68 |
+diff --git a/arch/powerpc/kernel/systbl.S b/arch/powerpc/kernel/systbl.S |
69 |
+index cb3358886203e..6c1db3b6de2dc 100644 |
70 |
+--- a/arch/powerpc/kernel/systbl.S |
71 |
++++ b/arch/powerpc/kernel/systbl.S |
72 |
+@@ -18,6 +18,7 @@ |
73 |
+ .p2align 3 |
74 |
+ #define __SYSCALL(nr, entry) .8byte entry |
75 |
+ #else |
76 |
++ .p2align 2 |
77 |
+ #define __SYSCALL(nr, entry) .long entry |
78 |
+ #endif |
79 |
+ |
80 |
+diff --git a/arch/riscv/mm/pageattr.c b/arch/riscv/mm/pageattr.c |
81 |
+index 5e49e4b4a4ccc..86c56616e5dea 100644 |
82 |
+--- a/arch/riscv/mm/pageattr.c |
83 |
++++ b/arch/riscv/mm/pageattr.c |
84 |
+@@ -118,10 +118,10 @@ static int __set_memory(unsigned long addr, int numpages, pgprot_t set_mask, |
85 |
+ if (!numpages) |
86 |
+ return 0; |
87 |
+ |
88 |
+- mmap_read_lock(&init_mm); |
89 |
++ mmap_write_lock(&init_mm); |
90 |
+ ret = walk_page_range_novma(&init_mm, start, end, &pageattr_ops, NULL, |
91 |
+ &masks); |
92 |
+- mmap_read_unlock(&init_mm); |
93 |
++ mmap_write_unlock(&init_mm); |
94 |
+ |
95 |
+ flush_tlb_kernel_range(start, end); |
96 |
+ |
97 |
+diff --git a/arch/s390/include/asm/hugetlb.h b/arch/s390/include/asm/hugetlb.h |
98 |
+index 60f9241e5e4a6..d3642fb634bd9 100644 |
99 |
+--- a/arch/s390/include/asm/hugetlb.h |
100 |
++++ b/arch/s390/include/asm/hugetlb.h |
101 |
+@@ -28,9 +28,11 @@ pte_t huge_ptep_get_and_clear(struct mm_struct *mm, |
102 |
+ static inline int prepare_hugepage_range(struct file *file, |
103 |
+ unsigned long addr, unsigned long len) |
104 |
+ { |
105 |
+- if (len & ~HPAGE_MASK) |
106 |
++ struct hstate *h = hstate_file(file); |
107 |
++ |
108 |
++ if (len & ~huge_page_mask(h)) |
109 |
+ return -EINVAL; |
110 |
+- if (addr & ~HPAGE_MASK) |
111 |
++ if (addr & ~huge_page_mask(h)) |
112 |
+ return -EINVAL; |
113 |
+ return 0; |
114 |
+ } |
115 |
+diff --git a/arch/s390/kernel/vmlinux.lds.S b/arch/s390/kernel/vmlinux.lds.S |
116 |
+index 42c43521878ff..b508ccad4856d 100644 |
117 |
+--- a/arch/s390/kernel/vmlinux.lds.S |
118 |
++++ b/arch/s390/kernel/vmlinux.lds.S |
119 |
+@@ -132,6 +132,7 @@ SECTIONS |
120 |
+ /* |
121 |
+ * Table with the patch locations to undo expolines |
122 |
+ */ |
123 |
++ . = ALIGN(4); |
124 |
+ .nospec_call_table : { |
125 |
+ __nospec_call_start = . ; |
126 |
+ *(.s390_indirect*) |
127 |
+diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c |
128 |
+index cfb3a5c809f2e..e5584e974c774 100644 |
129 |
+--- a/arch/x86/kvm/vmx/vmx.c |
130 |
++++ b/arch/x86/kvm/vmx/vmx.c |
131 |
+@@ -831,8 +831,7 @@ static bool msr_write_intercepted(struct vcpu_vmx *vmx, u32 msr) |
132 |
+ if (!(exec_controls_get(vmx) & CPU_BASED_USE_MSR_BITMAPS)) |
133 |
+ return true; |
134 |
+ |
135 |
+- return vmx_test_msr_bitmap_write(vmx->loaded_vmcs->msr_bitmap, |
136 |
+- MSR_IA32_SPEC_CTRL); |
137 |
++ return vmx_test_msr_bitmap_write(vmx->loaded_vmcs->msr_bitmap, msr); |
138 |
+ } |
139 |
+ |
140 |
+ unsigned int __vmx_vcpu_run_flags(struct vcpu_vmx *vmx) |
141 |
+diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c |
142 |
+index f5b7a05530eb0..9109e5589b421 100644 |
143 |
+--- a/arch/x86/kvm/x86.c |
144 |
++++ b/arch/x86/kvm/x86.c |
145 |
+@@ -1465,12 +1465,32 @@ static const u32 msr_based_features_all[] = { |
146 |
+ static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)]; |
147 |
+ static unsigned int num_msr_based_features; |
148 |
+ |
149 |
++/* |
150 |
++ * Some IA32_ARCH_CAPABILITIES bits have dependencies on MSRs that KVM |
151 |
++ * does not yet virtualize. These include: |
152 |
++ * 10 - MISC_PACKAGE_CTRLS |
153 |
++ * 11 - ENERGY_FILTERING_CTL |
154 |
++ * 12 - DOITM |
155 |
++ * 18 - FB_CLEAR_CTRL |
156 |
++ * 21 - XAPIC_DISABLE_STATUS |
157 |
++ * 23 - OVERCLOCKING_STATUS |
158 |
++ */ |
159 |
++ |
160 |
++#define KVM_SUPPORTED_ARCH_CAP \ |
161 |
++ (ARCH_CAP_RDCL_NO | ARCH_CAP_IBRS_ALL | ARCH_CAP_RSBA | \ |
162 |
++ ARCH_CAP_SKIP_VMENTRY_L1DFLUSH | ARCH_CAP_SSB_NO | ARCH_CAP_MDS_NO | \ |
163 |
++ ARCH_CAP_PSCHANGE_MC_NO | ARCH_CAP_TSX_CTRL_MSR | ARCH_CAP_TAA_NO | \ |
164 |
++ ARCH_CAP_SBDR_SSDP_NO | ARCH_CAP_FBSDP_NO | ARCH_CAP_PSDP_NO | \ |
165 |
++ ARCH_CAP_FB_CLEAR | ARCH_CAP_RRSBA | ARCH_CAP_PBRSB_NO) |
166 |
++ |
167 |
+ static u64 kvm_get_arch_capabilities(void) |
168 |
+ { |
169 |
+ u64 data = 0; |
170 |
+ |
171 |
+- if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES)) |
172 |
++ if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES)) { |
173 |
+ rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data); |
174 |
++ data &= KVM_SUPPORTED_ARCH_CAP; |
175 |
++ } |
176 |
+ |
177 |
+ /* |
178 |
+ * If nx_huge_pages is enabled, KVM's shadow paging will ensure that |
179 |
+@@ -1518,9 +1538,6 @@ static u64 kvm_get_arch_capabilities(void) |
180 |
+ */ |
181 |
+ } |
182 |
+ |
183 |
+- /* Guests don't need to know "Fill buffer clear control" exists */ |
184 |
+- data &= ~ARCH_CAP_FB_CLEAR_CTRL; |
185 |
+- |
186 |
+ return data; |
187 |
+ } |
188 |
+ |
189 |
+diff --git a/drivers/android/binder.c b/drivers/android/binder.c |
190 |
+index 56a2387656a03..00c6c03ff8222 100644 |
191 |
+--- a/drivers/android/binder.c |
192 |
++++ b/drivers/android/binder.c |
193 |
+@@ -1358,6 +1358,18 @@ static int binder_inc_ref_for_node(struct binder_proc *proc, |
194 |
+ } |
195 |
+ ret = binder_inc_ref_olocked(ref, strong, target_list); |
196 |
+ *rdata = ref->data; |
197 |
++ if (ret && ref == new_ref) { |
198 |
++ /* |
199 |
++ * Cleanup the failed reference here as the target |
200 |
++ * could now be dead and have already released its |
201 |
++ * references by now. Calling on the new reference |
202 |
++ * with strong=0 and a tmp_refs will not decrement |
203 |
++ * the node. The new_ref gets kfree'd below. |
204 |
++ */ |
205 |
++ binder_cleanup_ref_olocked(new_ref); |
206 |
++ ref = NULL; |
207 |
++ } |
208 |
++ |
209 |
+ binder_proc_unlock(proc); |
210 |
+ if (new_ref && ref != new_ref) |
211 |
+ /* |
212 |
+diff --git a/drivers/android/binder_alloc.c b/drivers/android/binder_alloc.c |
213 |
+index f2d9587833d4b..849f8dff0be1b 100644 |
214 |
+--- a/drivers/android/binder_alloc.c |
215 |
++++ b/drivers/android/binder_alloc.c |
216 |
+@@ -322,7 +322,6 @@ static inline void binder_alloc_set_vma(struct binder_alloc *alloc, |
217 |
+ */ |
218 |
+ if (vma) { |
219 |
+ vm_start = vma->vm_start; |
220 |
+- alloc->vma_vm_mm = vma->vm_mm; |
221 |
+ mmap_assert_write_locked(alloc->vma_vm_mm); |
222 |
+ } else { |
223 |
+ mmap_assert_locked(alloc->vma_vm_mm); |
224 |
+@@ -795,7 +794,6 @@ int binder_alloc_mmap_handler(struct binder_alloc *alloc, |
225 |
+ binder_insert_free_buffer(alloc, buffer); |
226 |
+ alloc->free_async_space = alloc->buffer_size / 2; |
227 |
+ binder_alloc_set_vma(alloc, vma); |
228 |
+- mmgrab(alloc->vma_vm_mm); |
229 |
+ |
230 |
+ return 0; |
231 |
+ |
232 |
+@@ -1095,6 +1093,8 @@ static struct shrinker binder_shrinker = { |
233 |
+ void binder_alloc_init(struct binder_alloc *alloc) |
234 |
+ { |
235 |
+ alloc->pid = current->group_leader->pid; |
236 |
++ alloc->vma_vm_mm = current->mm; |
237 |
++ mmgrab(alloc->vma_vm_mm); |
238 |
+ mutex_init(&alloc->mutex); |
239 |
+ INIT_LIST_HEAD(&alloc->buffers); |
240 |
+ } |
241 |
+diff --git a/drivers/base/dd.c b/drivers/base/dd.c |
242 |
+index 70e9ee8a10f79..63cc011188109 100644 |
243 |
+--- a/drivers/base/dd.c |
244 |
++++ b/drivers/base/dd.c |
245 |
+@@ -877,6 +877,11 @@ static int __device_attach_driver(struct device_driver *drv, void *_data) |
246 |
+ dev_dbg(dev, "Device match requests probe deferral\n"); |
247 |
+ dev->can_match = true; |
248 |
+ driver_deferred_probe_add(dev); |
249 |
++ /* |
250 |
++ * Device can't match with a driver right now, so don't attempt |
251 |
++ * to match or bind with other drivers on the bus. |
252 |
++ */ |
253 |
++ return ret; |
254 |
+ } else if (ret < 0) { |
255 |
+ dev_dbg(dev, "Bus failed to match device: %d\n", ret); |
256 |
+ return ret; |
257 |
+@@ -1115,6 +1120,11 @@ static int __driver_attach(struct device *dev, void *data) |
258 |
+ dev_dbg(dev, "Device match requests probe deferral\n"); |
259 |
+ dev->can_match = true; |
260 |
+ driver_deferred_probe_add(dev); |
261 |
++ /* |
262 |
++ * Driver could not match with device, but may match with |
263 |
++ * another device on the bus. |
264 |
++ */ |
265 |
++ return 0; |
266 |
+ } else if (ret < 0) { |
267 |
+ dev_dbg(dev, "Bus failed to match device: %d\n", ret); |
268 |
+ return ret; |
269 |
+diff --git a/drivers/block/xen-blkback/common.h b/drivers/block/xen-blkback/common.h |
270 |
+index bda5c815e4415..a28473470e662 100644 |
271 |
+--- a/drivers/block/xen-blkback/common.h |
272 |
++++ b/drivers/block/xen-blkback/common.h |
273 |
+@@ -226,6 +226,9 @@ struct xen_vbd { |
274 |
+ sector_t size; |
275 |
+ unsigned int flush_support:1; |
276 |
+ unsigned int discard_secure:1; |
277 |
++ /* Connect-time cached feature_persistent parameter value */ |
278 |
++ unsigned int feature_gnt_persistent_parm:1; |
279 |
++ /* Persistent grants feature negotiation result */ |
280 |
+ unsigned int feature_gnt_persistent:1; |
281 |
+ unsigned int overflow_max_grants:1; |
282 |
+ }; |
283 |
+diff --git a/drivers/block/xen-blkback/xenbus.c b/drivers/block/xen-blkback/xenbus.c |
284 |
+index 78b50ac11e191..1525e28c5d703 100644 |
285 |
+--- a/drivers/block/xen-blkback/xenbus.c |
286 |
++++ b/drivers/block/xen-blkback/xenbus.c |
287 |
+@@ -910,7 +910,7 @@ again: |
288 |
+ xen_blkbk_barrier(xbt, be, be->blkif->vbd.flush_support); |
289 |
+ |
290 |
+ err = xenbus_printf(xbt, dev->nodename, "feature-persistent", "%u", |
291 |
+- be->blkif->vbd.feature_gnt_persistent); |
292 |
++ be->blkif->vbd.feature_gnt_persistent_parm); |
293 |
+ if (err) { |
294 |
+ xenbus_dev_fatal(dev, err, "writing %s/feature-persistent", |
295 |
+ dev->nodename); |
296 |
+@@ -1088,7 +1088,9 @@ static int connect_ring(struct backend_info *be) |
297 |
+ return -ENOSYS; |
298 |
+ } |
299 |
+ |
300 |
+- blkif->vbd.feature_gnt_persistent = feature_persistent && |
301 |
++ blkif->vbd.feature_gnt_persistent_parm = feature_persistent; |
302 |
++ blkif->vbd.feature_gnt_persistent = |
303 |
++ blkif->vbd.feature_gnt_persistent_parm && |
304 |
+ xenbus_read_unsigned(dev->otherend, "feature-persistent", 0); |
305 |
+ |
306 |
+ blkif->vbd.overflow_max_grants = 0; |
307 |
+diff --git a/drivers/block/xen-blkfront.c b/drivers/block/xen-blkfront.c |
308 |
+index 23fc4c8f26039..24a86d829f92a 100644 |
309 |
+--- a/drivers/block/xen-blkfront.c |
310 |
++++ b/drivers/block/xen-blkfront.c |
311 |
+@@ -212,6 +212,9 @@ struct blkfront_info |
312 |
+ unsigned int feature_fua:1; |
313 |
+ unsigned int feature_discard:1; |
314 |
+ unsigned int feature_secdiscard:1; |
315 |
++ /* Connect-time cached feature_persistent parameter */ |
316 |
++ unsigned int feature_persistent_parm:1; |
317 |
++ /* Persistent grants feature negotiation result */ |
318 |
+ unsigned int feature_persistent:1; |
319 |
+ unsigned int bounce:1; |
320 |
+ unsigned int discard_granularity; |
321 |
+@@ -1782,6 +1785,12 @@ abort_transaction: |
322 |
+ return err; |
323 |
+ } |
324 |
+ |
325 |
++/* Enable the persistent grants feature. */ |
326 |
++static bool feature_persistent = true; |
327 |
++module_param(feature_persistent, bool, 0644); |
328 |
++MODULE_PARM_DESC(feature_persistent, |
329 |
++ "Enables the persistent grants feature"); |
330 |
++ |
331 |
+ /* Common code used when first setting up, and when resuming. */ |
332 |
+ static int talk_to_blkback(struct xenbus_device *dev, |
333 |
+ struct blkfront_info *info) |
334 |
+@@ -1873,8 +1882,9 @@ again: |
335 |
+ message = "writing protocol"; |
336 |
+ goto abort_transaction; |
337 |
+ } |
338 |
++ info->feature_persistent_parm = feature_persistent; |
339 |
+ err = xenbus_printf(xbt, dev->nodename, "feature-persistent", "%u", |
340 |
+- info->feature_persistent); |
341 |
++ info->feature_persistent_parm); |
342 |
+ if (err) |
343 |
+ dev_warn(&dev->dev, |
344 |
+ "writing persistent grants feature to xenbus"); |
345 |
+@@ -1942,12 +1952,6 @@ static int negotiate_mq(struct blkfront_info *info) |
346 |
+ return 0; |
347 |
+ } |
348 |
+ |
349 |
+-/* Enable the persistent grants feature. */ |
350 |
+-static bool feature_persistent = true; |
351 |
+-module_param(feature_persistent, bool, 0644); |
352 |
+-MODULE_PARM_DESC(feature_persistent, |
353 |
+- "Enables the persistent grants feature"); |
354 |
+- |
355 |
+ /* |
356 |
+ * Entry point to this code when a new device is created. Allocate the basic |
357 |
+ * structures and the ring buffer for communication with the backend, and |
358 |
+@@ -2307,7 +2311,7 @@ static void blkfront_gather_backend_features(struct blkfront_info *info) |
359 |
+ if (xenbus_read_unsigned(info->xbdev->otherend, "feature-discard", 0)) |
360 |
+ blkfront_setup_discard(info); |
361 |
+ |
362 |
+- if (feature_persistent) |
363 |
++ if (info->feature_persistent_parm) |
364 |
+ info->feature_persistent = |
365 |
+ !!xenbus_read_unsigned(info->xbdev->otherend, |
366 |
+ "feature-persistent", 0); |
367 |
+diff --git a/drivers/clk/bcm/clk-raspberrypi.c b/drivers/clk/bcm/clk-raspberrypi.c |
368 |
+index dd3b71eafabf3..56c5166f841ae 100644 |
369 |
+--- a/drivers/clk/bcm/clk-raspberrypi.c |
370 |
++++ b/drivers/clk/bcm/clk-raspberrypi.c |
371 |
+@@ -139,7 +139,7 @@ static unsigned long raspberrypi_fw_get_rate(struct clk_hw *hw, |
372 |
+ ret = raspberrypi_clock_property(rpi->firmware, data, |
373 |
+ RPI_FIRMWARE_GET_CLOCK_RATE, &val); |
374 |
+ if (ret) |
375 |
+- return ret; |
376 |
++ return 0; |
377 |
+ |
378 |
+ return val; |
379 |
+ } |
380 |
+@@ -156,7 +156,7 @@ static int raspberrypi_fw_set_rate(struct clk_hw *hw, unsigned long rate, |
381 |
+ ret = raspberrypi_clock_property(rpi->firmware, data, |
382 |
+ RPI_FIRMWARE_SET_CLOCK_RATE, &_rate); |
383 |
+ if (ret) |
384 |
+- dev_err_ratelimited(rpi->dev, "Failed to change %s frequency: %d", |
385 |
++ dev_err_ratelimited(rpi->dev, "Failed to change %s frequency: %d\n", |
386 |
+ clk_hw_get_name(hw), ret); |
387 |
+ |
388 |
+ return ret; |
389 |
+@@ -208,7 +208,7 @@ static struct clk_hw *raspberrypi_clk_register(struct raspberrypi_clk *rpi, |
390 |
+ RPI_FIRMWARE_GET_MIN_CLOCK_RATE, |
391 |
+ &min_rate); |
392 |
+ if (ret) { |
393 |
+- dev_err(rpi->dev, "Failed to get clock %d min freq: %d", |
394 |
++ dev_err(rpi->dev, "Failed to get clock %d min freq: %d\n", |
395 |
+ id, ret); |
396 |
+ return ERR_PTR(ret); |
397 |
+ } |
398 |
+@@ -251,8 +251,13 @@ static int raspberrypi_discover_clocks(struct raspberrypi_clk *rpi, |
399 |
+ struct rpi_firmware_get_clocks_response *clks; |
400 |
+ int ret; |
401 |
+ |
402 |
++ /* |
403 |
++ * The firmware doesn't guarantee that the last element of |
404 |
++ * RPI_FIRMWARE_GET_CLOCKS is zeroed. So allocate an additional |
405 |
++ * zero element as sentinel. |
406 |
++ */ |
407 |
+ clks = devm_kcalloc(rpi->dev, |
408 |
+- sizeof(*clks), RPI_FIRMWARE_NUM_CLK_ID, |
409 |
++ RPI_FIRMWARE_NUM_CLK_ID + 1, sizeof(*clks), |
410 |
+ GFP_KERNEL); |
411 |
+ if (!clks) |
412 |
+ return -ENOMEM; |
413 |
+diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c |
414 |
+index d6dc58bd07b33..0674dbc62eb55 100644 |
415 |
+--- a/drivers/clk/clk.c |
416 |
++++ b/drivers/clk/clk.c |
417 |
+@@ -846,10 +846,9 @@ static void clk_core_unprepare(struct clk_core *core) |
418 |
+ if (core->ops->unprepare) |
419 |
+ core->ops->unprepare(core->hw); |
420 |
+ |
421 |
+- clk_pm_runtime_put(core); |
422 |
+- |
423 |
+ trace_clk_unprepare_complete(core); |
424 |
+ clk_core_unprepare(core->parent); |
425 |
++ clk_pm_runtime_put(core); |
426 |
+ } |
427 |
+ |
428 |
+ static void clk_core_unprepare_lock(struct clk_core *core) |
429 |
+diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c |
430 |
+index 64befd6f702b2..4860bf3b7e002 100644 |
431 |
+--- a/drivers/gpio/gpio-pca953x.c |
432 |
++++ b/drivers/gpio/gpio-pca953x.c |
433 |
+@@ -1163,7 +1163,9 @@ static int pca953x_suspend(struct device *dev) |
434 |
+ { |
435 |
+ struct pca953x_chip *chip = dev_get_drvdata(dev); |
436 |
+ |
437 |
++ mutex_lock(&chip->i2c_lock); |
438 |
+ regcache_cache_only(chip->regmap, true); |
439 |
++ mutex_unlock(&chip->i2c_lock); |
440 |
+ |
441 |
+ if (atomic_read(&chip->wakeup_path)) |
442 |
+ device_set_wakeup_path(dev); |
443 |
+@@ -1186,13 +1188,17 @@ static int pca953x_resume(struct device *dev) |
444 |
+ } |
445 |
+ } |
446 |
+ |
447 |
++ mutex_lock(&chip->i2c_lock); |
448 |
+ regcache_cache_only(chip->regmap, false); |
449 |
+ regcache_mark_dirty(chip->regmap); |
450 |
+ ret = pca953x_regcache_sync(dev); |
451 |
+- if (ret) |
452 |
++ if (ret) { |
453 |
++ mutex_unlock(&chip->i2c_lock); |
454 |
+ return ret; |
455 |
++ } |
456 |
+ |
457 |
+ ret = regcache_sync(chip->regmap); |
458 |
++ mutex_unlock(&chip->i2c_lock); |
459 |
+ if (ret) { |
460 |
+ dev_err(dev, "Failed to restore register map: %d\n", ret); |
461 |
+ return ret; |
462 |
+diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile |
463 |
+index 26cf754229451..9d371be7dc5cd 100644 |
464 |
+--- a/drivers/gpu/drm/i915/Makefile |
465 |
++++ b/drivers/gpu/drm/i915/Makefile |
466 |
+@@ -249,6 +249,7 @@ i915-y += \ |
467 |
+ display/g4x_dp.o \ |
468 |
+ display/g4x_hdmi.o \ |
469 |
+ display/icl_dsi.o \ |
470 |
++ display/intel_backlight.o \ |
471 |
+ display/intel_crt.o \ |
472 |
+ display/intel_ddi.o \ |
473 |
+ display/intel_ddi_buf_trans.o \ |
474 |
+diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c |
475 |
+index de0f358184aa3..29c0eca647e34 100644 |
476 |
+--- a/drivers/gpu/drm/i915/display/g4x_dp.c |
477 |
++++ b/drivers/gpu/drm/i915/display/g4x_dp.c |
478 |
+@@ -7,6 +7,7 @@ |
479 |
+ |
480 |
+ #include "g4x_dp.h" |
481 |
+ #include "intel_audio.h" |
482 |
++#include "intel_backlight.h" |
483 |
+ #include "intel_connector.h" |
484 |
+ #include "intel_de.h" |
485 |
+ #include "intel_display_types.h" |
486 |
+@@ -16,7 +17,6 @@ |
487 |
+ #include "intel_fifo_underrun.h" |
488 |
+ #include "intel_hdmi.h" |
489 |
+ #include "intel_hotplug.h" |
490 |
+-#include "intel_panel.h" |
491 |
+ #include "intel_pps.h" |
492 |
+ #include "intel_sideband.h" |
493 |
+ |
494 |
+diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c |
495 |
+index 638a00b2dc2d2..2601873e15466 100644 |
496 |
+--- a/drivers/gpu/drm/i915/display/icl_dsi.c |
497 |
++++ b/drivers/gpu/drm/i915/display/icl_dsi.c |
498 |
+@@ -29,6 +29,7 @@ |
499 |
+ #include <drm/drm_mipi_dsi.h> |
500 |
+ |
501 |
+ #include "intel_atomic.h" |
502 |
++#include "intel_backlight.h" |
503 |
+ #include "intel_combo_phy.h" |
504 |
+ #include "intel_connector.h" |
505 |
+ #include "intel_crtc.h" |
506 |
+diff --git a/drivers/gpu/drm/i915/display/intel_backlight.c b/drivers/gpu/drm/i915/display/intel_backlight.c |
507 |
+new file mode 100644 |
508 |
+index 0000000000000..60f91ac7d1427 |
509 |
+--- /dev/null |
510 |
++++ b/drivers/gpu/drm/i915/display/intel_backlight.c |
511 |
+@@ -0,0 +1,1776 @@ |
512 |
++// SPDX-License-Identifier: MIT |
513 |
++/* |
514 |
++ * Copyright © 2021 Intel Corporation |
515 |
++ */ |
516 |
++ |
517 |
++#include <linux/kernel.h> |
518 |
++#include <linux/pwm.h> |
519 |
++ |
520 |
++#include "intel_backlight.h" |
521 |
++#include "intel_connector.h" |
522 |
++#include "intel_de.h" |
523 |
++#include "intel_display_types.h" |
524 |
++#include "intel_dp_aux_backlight.h" |
525 |
++#include "intel_dsi_dcs_backlight.h" |
526 |
++#include "intel_panel.h" |
527 |
++ |
528 |
++/** |
529 |
++ * scale - scale values from one range to another |
530 |
++ * @source_val: value in range [@source_min..@source_max] |
531 |
++ * @source_min: minimum legal value for @source_val |
532 |
++ * @source_max: maximum legal value for @source_val |
533 |
++ * @target_min: corresponding target value for @source_min |
534 |
++ * @target_max: corresponding target value for @source_max |
535 |
++ * |
536 |
++ * Return @source_val in range [@source_min..@source_max] scaled to range |
537 |
++ * [@target_min..@target_max]. |
538 |
++ */ |
539 |
++static u32 scale(u32 source_val, |
540 |
++ u32 source_min, u32 source_max, |
541 |
++ u32 target_min, u32 target_max) |
542 |
++{ |
543 |
++ u64 target_val; |
544 |
++ |
545 |
++ WARN_ON(source_min > source_max); |
546 |
++ WARN_ON(target_min > target_max); |
547 |
++ |
548 |
++ /* defensive */ |
549 |
++ source_val = clamp(source_val, source_min, source_max); |
550 |
++ |
551 |
++ /* avoid overflows */ |
552 |
++ target_val = mul_u32_u32(source_val - source_min, |
553 |
++ target_max - target_min); |
554 |
++ target_val = DIV_ROUND_CLOSEST_ULL(target_val, source_max - source_min); |
555 |
++ target_val += target_min; |
556 |
++ |
557 |
++ return target_val; |
558 |
++} |
559 |
++ |
560 |
++/* |
561 |
++ * Scale user_level in range [0..user_max] to [0..hw_max], clamping the result |
562 |
++ * to [hw_min..hw_max]. |
563 |
++ */ |
564 |
++static u32 clamp_user_to_hw(struct intel_connector *connector, |
565 |
++ u32 user_level, u32 user_max) |
566 |
++{ |
567 |
++ struct intel_panel *panel = &connector->panel; |
568 |
++ u32 hw_level; |
569 |
++ |
570 |
++ hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max); |
571 |
++ hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max); |
572 |
++ |
573 |
++ return hw_level; |
574 |
++} |
575 |
++ |
576 |
++/* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */ |
577 |
++static u32 scale_hw_to_user(struct intel_connector *connector, |
578 |
++ u32 hw_level, u32 user_max) |
579 |
++{ |
580 |
++ struct intel_panel *panel = &connector->panel; |
581 |
++ |
582 |
++ return scale(hw_level, panel->backlight.min, panel->backlight.max, |
583 |
++ 0, user_max); |
584 |
++} |
585 |
++ |
586 |
++u32 intel_panel_invert_pwm_level(struct intel_connector *connector, u32 val) |
587 |
++{ |
588 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
589 |
++ struct intel_panel *panel = &connector->panel; |
590 |
++ |
591 |
++ drm_WARN_ON(&dev_priv->drm, panel->backlight.pwm_level_max == 0); |
592 |
++ |
593 |
++ if (dev_priv->params.invert_brightness < 0) |
594 |
++ return val; |
595 |
++ |
596 |
++ if (dev_priv->params.invert_brightness > 0 || |
597 |
++ dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) { |
598 |
++ return panel->backlight.pwm_level_max - val + panel->backlight.pwm_level_min; |
599 |
++ } |
600 |
++ |
601 |
++ return val; |
602 |
++} |
603 |
++ |
604 |
++void intel_panel_set_pwm_level(const struct drm_connector_state *conn_state, u32 val) |
605 |
++{ |
606 |
++ struct intel_connector *connector = to_intel_connector(conn_state->connector); |
607 |
++ struct drm_i915_private *i915 = to_i915(connector->base.dev); |
608 |
++ struct intel_panel *panel = &connector->panel; |
609 |
++ |
610 |
++ drm_dbg_kms(&i915->drm, "set backlight PWM = %d\n", val); |
611 |
++ panel->backlight.pwm_funcs->set(conn_state, val); |
612 |
++} |
613 |
++ |
614 |
++u32 intel_panel_backlight_level_to_pwm(struct intel_connector *connector, u32 val) |
615 |
++{ |
616 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
617 |
++ struct intel_panel *panel = &connector->panel; |
618 |
++ |
619 |
++ drm_WARN_ON_ONCE(&dev_priv->drm, |
620 |
++ panel->backlight.max == 0 || panel->backlight.pwm_level_max == 0); |
621 |
++ |
622 |
++ val = scale(val, panel->backlight.min, panel->backlight.max, |
623 |
++ panel->backlight.pwm_level_min, panel->backlight.pwm_level_max); |
624 |
++ |
625 |
++ return intel_panel_invert_pwm_level(connector, val); |
626 |
++} |
627 |
++ |
628 |
++u32 intel_panel_backlight_level_from_pwm(struct intel_connector *connector, u32 val) |
629 |
++{ |
630 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
631 |
++ struct intel_panel *panel = &connector->panel; |
632 |
++ |
633 |
++ drm_WARN_ON_ONCE(&dev_priv->drm, |
634 |
++ panel->backlight.max == 0 || panel->backlight.pwm_level_max == 0); |
635 |
++ |
636 |
++ if (dev_priv->params.invert_brightness > 0 || |
637 |
++ (dev_priv->params.invert_brightness == 0 && dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS)) |
638 |
++ val = panel->backlight.pwm_level_max - (val - panel->backlight.pwm_level_min); |
639 |
++ |
640 |
++ return scale(val, panel->backlight.pwm_level_min, panel->backlight.pwm_level_max, |
641 |
++ panel->backlight.min, panel->backlight.max); |
642 |
++} |
643 |
++ |
644 |
++static u32 lpt_get_backlight(struct intel_connector *connector, enum pipe unused) |
645 |
++{ |
646 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
647 |
++ |
648 |
++ return intel_de_read(dev_priv, BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK; |
649 |
++} |
650 |
++ |
651 |
++static u32 pch_get_backlight(struct intel_connector *connector, enum pipe unused) |
652 |
++{ |
653 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
654 |
++ |
655 |
++ return intel_de_read(dev_priv, BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; |
656 |
++} |
657 |
++ |
658 |
++static u32 i9xx_get_backlight(struct intel_connector *connector, enum pipe unused) |
659 |
++{ |
660 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
661 |
++ struct intel_panel *panel = &connector->panel; |
662 |
++ u32 val; |
663 |
++ |
664 |
++ val = intel_de_read(dev_priv, BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; |
665 |
++ if (DISPLAY_VER(dev_priv) < 4) |
666 |
++ val >>= 1; |
667 |
++ |
668 |
++ if (panel->backlight.combination_mode) { |
669 |
++ u8 lbpc; |
670 |
++ |
671 |
++ pci_read_config_byte(to_pci_dev(dev_priv->drm.dev), LBPC, &lbpc); |
672 |
++ val *= lbpc; |
673 |
++ } |
674 |
++ |
675 |
++ return val; |
676 |
++} |
677 |
++ |
678 |
++static u32 vlv_get_backlight(struct intel_connector *connector, enum pipe pipe) |
679 |
++{ |
680 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
681 |
++ |
682 |
++ if (drm_WARN_ON(&dev_priv->drm, pipe != PIPE_A && pipe != PIPE_B)) |
683 |
++ return 0; |
684 |
++ |
685 |
++ return intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK; |
686 |
++} |
687 |
++ |
688 |
++static u32 bxt_get_backlight(struct intel_connector *connector, enum pipe unused) |
689 |
++{ |
690 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
691 |
++ struct intel_panel *panel = &connector->panel; |
692 |
++ |
693 |
++ return intel_de_read(dev_priv, |
694 |
++ BXT_BLC_PWM_DUTY(panel->backlight.controller)); |
695 |
++} |
696 |
++ |
697 |
++static u32 ext_pwm_get_backlight(struct intel_connector *connector, enum pipe unused) |
698 |
++{ |
699 |
++ struct intel_panel *panel = &connector->panel; |
700 |
++ struct pwm_state state; |
701 |
++ |
702 |
++ pwm_get_state(panel->backlight.pwm, &state); |
703 |
++ return pwm_get_relative_duty_cycle(&state, 100); |
704 |
++} |
705 |
++ |
706 |
++static void lpt_set_backlight(const struct drm_connector_state *conn_state, u32 level) |
707 |
++{ |
708 |
++ struct intel_connector *connector = to_intel_connector(conn_state->connector); |
709 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
710 |
++ |
711 |
++ u32 val = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK; |
712 |
++ intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, val | level); |
713 |
++} |
714 |
++ |
715 |
++static void pch_set_backlight(const struct drm_connector_state *conn_state, u32 level) |
716 |
++{ |
717 |
++ struct intel_connector *connector = to_intel_connector(conn_state->connector); |
718 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
719 |
++ u32 tmp; |
720 |
++ |
721 |
++ tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; |
722 |
++ intel_de_write(dev_priv, BLC_PWM_CPU_CTL, tmp | level); |
723 |
++} |
724 |
++ |
725 |
++static void i9xx_set_backlight(const struct drm_connector_state *conn_state, u32 level) |
726 |
++{ |
727 |
++ struct intel_connector *connector = to_intel_connector(conn_state->connector); |
728 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
729 |
++ struct intel_panel *panel = &connector->panel; |
730 |
++ u32 tmp, mask; |
731 |
++ |
732 |
++ drm_WARN_ON(&dev_priv->drm, panel->backlight.pwm_level_max == 0); |
733 |
++ |
734 |
++ if (panel->backlight.combination_mode) { |
735 |
++ u8 lbpc; |
736 |
++ |
737 |
++ lbpc = level * 0xfe / panel->backlight.pwm_level_max + 1; |
738 |
++ level /= lbpc; |
739 |
++ pci_write_config_byte(to_pci_dev(dev_priv->drm.dev), LBPC, lbpc); |
740 |
++ } |
741 |
++ |
742 |
++ if (DISPLAY_VER(dev_priv) == 4) { |
743 |
++ mask = BACKLIGHT_DUTY_CYCLE_MASK; |
744 |
++ } else { |
745 |
++ level <<= 1; |
746 |
++ mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV; |
747 |
++ } |
748 |
++ |
749 |
++ tmp = intel_de_read(dev_priv, BLC_PWM_CTL) & ~mask; |
750 |
++ intel_de_write(dev_priv, BLC_PWM_CTL, tmp | level); |
751 |
++} |
752 |
++ |
753 |
++static void vlv_set_backlight(const struct drm_connector_state *conn_state, u32 level) |
754 |
++{ |
755 |
++ struct intel_connector *connector = to_intel_connector(conn_state->connector); |
756 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
757 |
++ enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe; |
758 |
++ u32 tmp; |
759 |
++ |
760 |
++ tmp = intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK; |
761 |
++ intel_de_write(dev_priv, VLV_BLC_PWM_CTL(pipe), tmp | level); |
762 |
++} |
763 |
++ |
764 |
++static void bxt_set_backlight(const struct drm_connector_state *conn_state, u32 level) |
765 |
++{ |
766 |
++ struct intel_connector *connector = to_intel_connector(conn_state->connector); |
767 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
768 |
++ struct intel_panel *panel = &connector->panel; |
769 |
++ |
770 |
++ intel_de_write(dev_priv, |
771 |
++ BXT_BLC_PWM_DUTY(panel->backlight.controller), level); |
772 |
++} |
773 |
++ |
774 |
++static void ext_pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level) |
775 |
++{ |
776 |
++ struct intel_panel *panel = &to_intel_connector(conn_state->connector)->panel; |
777 |
++ |
778 |
++ pwm_set_relative_duty_cycle(&panel->backlight.pwm_state, level, 100); |
779 |
++ pwm_apply_state(panel->backlight.pwm, &panel->backlight.pwm_state); |
780 |
++} |
781 |
++ |
782 |
++static void |
783 |
++intel_panel_actually_set_backlight(const struct drm_connector_state *conn_state, u32 level) |
784 |
++{ |
785 |
++ struct intel_connector *connector = to_intel_connector(conn_state->connector); |
786 |
++ struct drm_i915_private *i915 = to_i915(connector->base.dev); |
787 |
++ struct intel_panel *panel = &connector->panel; |
788 |
++ |
789 |
++ drm_dbg_kms(&i915->drm, "set backlight level = %d\n", level); |
790 |
++ |
791 |
++ panel->backlight.funcs->set(conn_state, level); |
792 |
++} |
793 |
++ |
794 |
++/* set backlight brightness to level in range [0..max], assuming hw min is |
795 |
++ * respected. |
796 |
++ */ |
797 |
++void intel_panel_set_backlight_acpi(const struct drm_connector_state *conn_state, |
798 |
++ u32 user_level, u32 user_max) |
799 |
++{ |
800 |
++ struct intel_connector *connector = to_intel_connector(conn_state->connector); |
801 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
802 |
++ struct intel_panel *panel = &connector->panel; |
803 |
++ u32 hw_level; |
804 |
++ |
805 |
++ /* |
806 |
++ * Lack of crtc may occur during driver init because |
807 |
++ * connection_mutex isn't held across the entire backlight |
808 |
++ * setup + modeset readout, and the BIOS can issue the |
809 |
++ * requests at any time. |
810 |
++ */ |
811 |
++ if (!panel->backlight.present || !conn_state->crtc) |
812 |
++ return; |
813 |
++ |
814 |
++ mutex_lock(&dev_priv->backlight_lock); |
815 |
++ |
816 |
++ drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0); |
817 |
++ |
818 |
++ hw_level = clamp_user_to_hw(connector, user_level, user_max); |
819 |
++ panel->backlight.level = hw_level; |
820 |
++ |
821 |
++ if (panel->backlight.device) |
822 |
++ panel->backlight.device->props.brightness = |
823 |
++ scale_hw_to_user(connector, |
824 |
++ panel->backlight.level, |
825 |
++ panel->backlight.device->props.max_brightness); |
826 |
++ |
827 |
++ if (panel->backlight.enabled) |
828 |
++ intel_panel_actually_set_backlight(conn_state, hw_level); |
829 |
++ |
830 |
++ mutex_unlock(&dev_priv->backlight_lock); |
831 |
++} |
832 |
++ |
833 |
++static void lpt_disable_backlight(const struct drm_connector_state *old_conn_state, u32 level) |
834 |
++{ |
835 |
++ struct intel_connector *connector = to_intel_connector(old_conn_state->connector); |
836 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
837 |
++ u32 tmp; |
838 |
++ |
839 |
++ intel_panel_set_pwm_level(old_conn_state, level); |
840 |
++ |
841 |
++ /* |
842 |
++ * Although we don't support or enable CPU PWM with LPT/SPT based |
843 |
++ * systems, it may have been enabled prior to loading the |
844 |
++ * driver. Disable to avoid warnings on LCPLL disable. |
845 |
++ * |
846 |
++ * This needs rework if we need to add support for CPU PWM on PCH split |
847 |
++ * platforms. |
848 |
++ */ |
849 |
++ tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); |
850 |
++ if (tmp & BLM_PWM_ENABLE) { |
851 |
++ drm_dbg_kms(&dev_priv->drm, |
852 |
++ "cpu backlight was enabled, disabling\n"); |
853 |
++ intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, |
854 |
++ tmp & ~BLM_PWM_ENABLE); |
855 |
++ } |
856 |
++ |
857 |
++ tmp = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); |
858 |
++ intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE); |
859 |
++} |
860 |
++ |
861 |
++static void pch_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) |
862 |
++{ |
863 |
++ struct intel_connector *connector = to_intel_connector(old_conn_state->connector); |
864 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
865 |
++ u32 tmp; |
866 |
++ |
867 |
++ intel_panel_set_pwm_level(old_conn_state, val); |
868 |
++ |
869 |
++ tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); |
870 |
++ intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE); |
871 |
++ |
872 |
++ tmp = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); |
873 |
++ intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE); |
874 |
++} |
875 |
++ |
876 |
++static void i9xx_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) |
877 |
++{ |
878 |
++ intel_panel_set_pwm_level(old_conn_state, val); |
879 |
++} |
880 |
++ |
881 |
++static void i965_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) |
882 |
++{ |
883 |
++ struct drm_i915_private *dev_priv = to_i915(old_conn_state->connector->dev); |
884 |
++ u32 tmp; |
885 |
++ |
886 |
++ intel_panel_set_pwm_level(old_conn_state, val); |
887 |
++ |
888 |
++ tmp = intel_de_read(dev_priv, BLC_PWM_CTL2); |
889 |
++ intel_de_write(dev_priv, BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE); |
890 |
++} |
891 |
++ |
892 |
++static void vlv_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) |
893 |
++{ |
894 |
++ struct intel_connector *connector = to_intel_connector(old_conn_state->connector); |
895 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
896 |
++ enum pipe pipe = to_intel_crtc(old_conn_state->crtc)->pipe; |
897 |
++ u32 tmp; |
898 |
++ |
899 |
++ intel_panel_set_pwm_level(old_conn_state, val); |
900 |
++ |
901 |
++ tmp = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe)); |
902 |
++ intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), |
903 |
++ tmp & ~BLM_PWM_ENABLE); |
904 |
++} |
905 |
++ |
906 |
++static void bxt_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) |
907 |
++{ |
908 |
++ struct intel_connector *connector = to_intel_connector(old_conn_state->connector); |
909 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
910 |
++ struct intel_panel *panel = &connector->panel; |
911 |
++ u32 tmp; |
912 |
++ |
913 |
++ intel_panel_set_pwm_level(old_conn_state, val); |
914 |
++ |
915 |
++ tmp = intel_de_read(dev_priv, |
916 |
++ BXT_BLC_PWM_CTL(panel->backlight.controller)); |
917 |
++ intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), |
918 |
++ tmp & ~BXT_BLC_PWM_ENABLE); |
919 |
++ |
920 |
++ if (panel->backlight.controller == 1) { |
921 |
++ val = intel_de_read(dev_priv, UTIL_PIN_CTL); |
922 |
++ val &= ~UTIL_PIN_ENABLE; |
923 |
++ intel_de_write(dev_priv, UTIL_PIN_CTL, val); |
924 |
++ } |
925 |
++} |
926 |
++ |
927 |
++static void cnp_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) |
928 |
++{ |
929 |
++ struct intel_connector *connector = to_intel_connector(old_conn_state->connector); |
930 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
931 |
++ struct intel_panel *panel = &connector->panel; |
932 |
++ u32 tmp; |
933 |
++ |
934 |
++ intel_panel_set_pwm_level(old_conn_state, val); |
935 |
++ |
936 |
++ tmp = intel_de_read(dev_priv, |
937 |
++ BXT_BLC_PWM_CTL(panel->backlight.controller)); |
938 |
++ intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), |
939 |
++ tmp & ~BXT_BLC_PWM_ENABLE); |
940 |
++} |
941 |
++ |
942 |
++static void ext_pwm_disable_backlight(const struct drm_connector_state *old_conn_state, u32 level) |
943 |
++{ |
944 |
++ struct intel_connector *connector = to_intel_connector(old_conn_state->connector); |
945 |
++ struct intel_panel *panel = &connector->panel; |
946 |
++ |
947 |
++ panel->backlight.pwm_state.enabled = false; |
948 |
++ pwm_apply_state(panel->backlight.pwm, &panel->backlight.pwm_state); |
949 |
++} |
950 |
++ |
951 |
++void intel_panel_disable_backlight(const struct drm_connector_state *old_conn_state) |
952 |
++{ |
953 |
++ struct intel_connector *connector = to_intel_connector(old_conn_state->connector); |
954 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
955 |
++ struct intel_panel *panel = &connector->panel; |
956 |
++ |
957 |
++ if (!panel->backlight.present) |
958 |
++ return; |
959 |
++ |
960 |
++ /* |
961 |
++ * Do not disable backlight on the vga_switcheroo path. When switching |
962 |
++ * away from i915, the other client may depend on i915 to handle the |
963 |
++ * backlight. This will leave the backlight on unnecessarily when |
964 |
++ * another client is not activated. |
965 |
++ */ |
966 |
++ if (dev_priv->drm.switch_power_state == DRM_SWITCH_POWER_CHANGING) { |
967 |
++ drm_dbg_kms(&dev_priv->drm, |
968 |
++ "Skipping backlight disable on vga switch\n"); |
969 |
++ return; |
970 |
++ } |
971 |
++ |
972 |
++ mutex_lock(&dev_priv->backlight_lock); |
973 |
++ |
974 |
++ if (panel->backlight.device) |
975 |
++ panel->backlight.device->props.power = FB_BLANK_POWERDOWN; |
976 |
++ panel->backlight.enabled = false; |
977 |
++ panel->backlight.funcs->disable(old_conn_state, 0); |
978 |
++ |
979 |
++ mutex_unlock(&dev_priv->backlight_lock); |
980 |
++} |
981 |
++ |
982 |
++static void lpt_enable_backlight(const struct intel_crtc_state *crtc_state, |
983 |
++ const struct drm_connector_state *conn_state, u32 level) |
984 |
++{ |
985 |
++ struct intel_connector *connector = to_intel_connector(conn_state->connector); |
986 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
987 |
++ struct intel_panel *panel = &connector->panel; |
988 |
++ u32 pch_ctl1, pch_ctl2, schicken; |
989 |
++ |
990 |
++ pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); |
991 |
++ if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { |
992 |
++ drm_dbg_kms(&dev_priv->drm, "pch backlight already enabled\n"); |
993 |
++ pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; |
994 |
++ intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1); |
995 |
++ } |
996 |
++ |
997 |
++ if (HAS_PCH_LPT(dev_priv)) { |
998 |
++ schicken = intel_de_read(dev_priv, SOUTH_CHICKEN2); |
999 |
++ if (panel->backlight.alternate_pwm_increment) |
1000 |
++ schicken |= LPT_PWM_GRANULARITY; |
1001 |
++ else |
1002 |
++ schicken &= ~LPT_PWM_GRANULARITY; |
1003 |
++ intel_de_write(dev_priv, SOUTH_CHICKEN2, schicken); |
1004 |
++ } else { |
1005 |
++ schicken = intel_de_read(dev_priv, SOUTH_CHICKEN1); |
1006 |
++ if (panel->backlight.alternate_pwm_increment) |
1007 |
++ schicken |= SPT_PWM_GRANULARITY; |
1008 |
++ else |
1009 |
++ schicken &= ~SPT_PWM_GRANULARITY; |
1010 |
++ intel_de_write(dev_priv, SOUTH_CHICKEN1, schicken); |
1011 |
++ } |
1012 |
++ |
1013 |
++ pch_ctl2 = panel->backlight.pwm_level_max << 16; |
1014 |
++ intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, pch_ctl2); |
1015 |
++ |
1016 |
++ pch_ctl1 = 0; |
1017 |
++ if (panel->backlight.active_low_pwm) |
1018 |
++ pch_ctl1 |= BLM_PCH_POLARITY; |
1019 |
++ |
1020 |
++ /* After LPT, override is the default. */ |
1021 |
++ if (HAS_PCH_LPT(dev_priv)) |
1022 |
++ pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE; |
1023 |
++ |
1024 |
++ intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1); |
1025 |
++ intel_de_posting_read(dev_priv, BLC_PWM_PCH_CTL1); |
1026 |
++ intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, |
1027 |
++ pch_ctl1 | BLM_PCH_PWM_ENABLE); |
1028 |
++ |
1029 |
++ /* This won't stick until the above enable. */ |
1030 |
++ intel_panel_set_pwm_level(conn_state, level); |
1031 |
++} |
1032 |
++ |
1033 |
++static void pch_enable_backlight(const struct intel_crtc_state *crtc_state, |
1034 |
++ const struct drm_connector_state *conn_state, u32 level) |
1035 |
++{ |
1036 |
++ struct intel_connector *connector = to_intel_connector(conn_state->connector); |
1037 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
1038 |
++ struct intel_panel *panel = &connector->panel; |
1039 |
++ enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; |
1040 |
++ u32 cpu_ctl2, pch_ctl1, pch_ctl2; |
1041 |
++ |
1042 |
++ cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); |
1043 |
++ if (cpu_ctl2 & BLM_PWM_ENABLE) { |
1044 |
++ drm_dbg_kms(&dev_priv->drm, "cpu backlight already enabled\n"); |
1045 |
++ cpu_ctl2 &= ~BLM_PWM_ENABLE; |
1046 |
++ intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2); |
1047 |
++ } |
1048 |
++ |
1049 |
++ pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); |
1050 |
++ if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { |
1051 |
++ drm_dbg_kms(&dev_priv->drm, "pch backlight already enabled\n"); |
1052 |
++ pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; |
1053 |
++ intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1); |
1054 |
++ } |
1055 |
++ |
1056 |
++ if (cpu_transcoder == TRANSCODER_EDP) |
1057 |
++ cpu_ctl2 = BLM_TRANSCODER_EDP; |
1058 |
++ else |
1059 |
++ cpu_ctl2 = BLM_PIPE(cpu_transcoder); |
1060 |
++ intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2); |
1061 |
++ intel_de_posting_read(dev_priv, BLC_PWM_CPU_CTL2); |
1062 |
++ intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE); |
1063 |
++ |
1064 |
++ /* This won't stick until the above enable. */ |
1065 |
++ intel_panel_set_pwm_level(conn_state, level); |
1066 |
++ |
1067 |
++ pch_ctl2 = panel->backlight.pwm_level_max << 16; |
1068 |
++ intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, pch_ctl2); |
1069 |
++ |
1070 |
++ pch_ctl1 = 0; |
1071 |
++ if (panel->backlight.active_low_pwm) |
1072 |
++ pch_ctl1 |= BLM_PCH_POLARITY; |
1073 |
++ |
1074 |
++ intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1); |
1075 |
++ intel_de_posting_read(dev_priv, BLC_PWM_PCH_CTL1); |
1076 |
++ intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, |
1077 |
++ pch_ctl1 | BLM_PCH_PWM_ENABLE); |
1078 |
++} |
1079 |
++ |
1080 |
++static void i9xx_enable_backlight(const struct intel_crtc_state *crtc_state, |
1081 |
++ const struct drm_connector_state *conn_state, u32 level) |
1082 |
++{ |
1083 |
++ struct intel_connector *connector = to_intel_connector(conn_state->connector); |
1084 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
1085 |
++ struct intel_panel *panel = &connector->panel; |
1086 |
++ u32 ctl, freq; |
1087 |
++ |
1088 |
++ ctl = intel_de_read(dev_priv, BLC_PWM_CTL); |
1089 |
++ if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) { |
1090 |
++ drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); |
1091 |
++ intel_de_write(dev_priv, BLC_PWM_CTL, 0); |
1092 |
++ } |
1093 |
++ |
1094 |
++ freq = panel->backlight.pwm_level_max; |
1095 |
++ if (panel->backlight.combination_mode) |
1096 |
++ freq /= 0xff; |
1097 |
++ |
1098 |
++ ctl = freq << 17; |
1099 |
++ if (panel->backlight.combination_mode) |
1100 |
++ ctl |= BLM_LEGACY_MODE; |
1101 |
++ if (IS_PINEVIEW(dev_priv) && panel->backlight.active_low_pwm) |
1102 |
++ ctl |= BLM_POLARITY_PNV; |
1103 |
++ |
1104 |
++ intel_de_write(dev_priv, BLC_PWM_CTL, ctl); |
1105 |
++ intel_de_posting_read(dev_priv, BLC_PWM_CTL); |
1106 |
++ |
1107 |
++ /* XXX: combine this into above write? */ |
1108 |
++ intel_panel_set_pwm_level(conn_state, level); |
1109 |
++ |
1110 |
++ /* |
1111 |
++ * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is |
1112 |
++ * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2 |
1113 |
++ * that has backlight. |
1114 |
++ */ |
1115 |
++ if (DISPLAY_VER(dev_priv) == 2) |
1116 |
++ intel_de_write(dev_priv, BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE); |
1117 |
++} |
1118 |
++ |
1119 |
++static void i965_enable_backlight(const struct intel_crtc_state *crtc_state, |
1120 |
++ const struct drm_connector_state *conn_state, u32 level) |
1121 |
++{ |
1122 |
++ struct intel_connector *connector = to_intel_connector(conn_state->connector); |
1123 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
1124 |
++ struct intel_panel *panel = &connector->panel; |
1125 |
++ enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe; |
1126 |
++ u32 ctl, ctl2, freq; |
1127 |
++ |
1128 |
++ ctl2 = intel_de_read(dev_priv, BLC_PWM_CTL2); |
1129 |
++ if (ctl2 & BLM_PWM_ENABLE) { |
1130 |
++ drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); |
1131 |
++ ctl2 &= ~BLM_PWM_ENABLE; |
1132 |
++ intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2); |
1133 |
++ } |
1134 |
++ |
1135 |
++ freq = panel->backlight.pwm_level_max; |
1136 |
++ if (panel->backlight.combination_mode) |
1137 |
++ freq /= 0xff; |
1138 |
++ |
1139 |
++ ctl = freq << 16; |
1140 |
++ intel_de_write(dev_priv, BLC_PWM_CTL, ctl); |
1141 |
++ |
1142 |
++ ctl2 = BLM_PIPE(pipe); |
1143 |
++ if (panel->backlight.combination_mode) |
1144 |
++ ctl2 |= BLM_COMBINATION_MODE; |
1145 |
++ if (panel->backlight.active_low_pwm) |
1146 |
++ ctl2 |= BLM_POLARITY_I965; |
1147 |
++ intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2); |
1148 |
++ intel_de_posting_read(dev_priv, BLC_PWM_CTL2); |
1149 |
++ intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE); |
1150 |
++ |
1151 |
++ intel_panel_set_pwm_level(conn_state, level); |
1152 |
++} |
1153 |
++ |
1154 |
++static void vlv_enable_backlight(const struct intel_crtc_state *crtc_state, |
1155 |
++ const struct drm_connector_state *conn_state, u32 level) |
1156 |
++{ |
1157 |
++ struct intel_connector *connector = to_intel_connector(conn_state->connector); |
1158 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
1159 |
++ struct intel_panel *panel = &connector->panel; |
1160 |
++ enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; |
1161 |
++ u32 ctl, ctl2; |
1162 |
++ |
1163 |
++ ctl2 = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe)); |
1164 |
++ if (ctl2 & BLM_PWM_ENABLE) { |
1165 |
++ drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); |
1166 |
++ ctl2 &= ~BLM_PWM_ENABLE; |
1167 |
++ intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), ctl2); |
1168 |
++ } |
1169 |
++ |
1170 |
++ ctl = panel->backlight.pwm_level_max << 16; |
1171 |
++ intel_de_write(dev_priv, VLV_BLC_PWM_CTL(pipe), ctl); |
1172 |
++ |
1173 |
++ /* XXX: combine this into above write? */ |
1174 |
++ intel_panel_set_pwm_level(conn_state, level); |
1175 |
++ |
1176 |
++ ctl2 = 0; |
1177 |
++ if (panel->backlight.active_low_pwm) |
1178 |
++ ctl2 |= BLM_POLARITY_I965; |
1179 |
++ intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), ctl2); |
1180 |
++ intel_de_posting_read(dev_priv, VLV_BLC_PWM_CTL2(pipe)); |
1181 |
++ intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), |
1182 |
++ ctl2 | BLM_PWM_ENABLE); |
1183 |
++} |
1184 |
++ |
1185 |
++static void bxt_enable_backlight(const struct intel_crtc_state *crtc_state, |
1186 |
++ const struct drm_connector_state *conn_state, u32 level) |
1187 |
++{ |
1188 |
++ struct intel_connector *connector = to_intel_connector(conn_state->connector); |
1189 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
1190 |
++ struct intel_panel *panel = &connector->panel; |
1191 |
++ enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; |
1192 |
++ u32 pwm_ctl, val; |
1193 |
++ |
1194 |
++ /* Controller 1 uses the utility pin. */ |
1195 |
++ if (panel->backlight.controller == 1) { |
1196 |
++ val = intel_de_read(dev_priv, UTIL_PIN_CTL); |
1197 |
++ if (val & UTIL_PIN_ENABLE) { |
1198 |
++ drm_dbg_kms(&dev_priv->drm, |
1199 |
++ "util pin already enabled\n"); |
1200 |
++ val &= ~UTIL_PIN_ENABLE; |
1201 |
++ intel_de_write(dev_priv, UTIL_PIN_CTL, val); |
1202 |
++ } |
1203 |
++ |
1204 |
++ val = 0; |
1205 |
++ if (panel->backlight.util_pin_active_low) |
1206 |
++ val |= UTIL_PIN_POLARITY; |
1207 |
++ intel_de_write(dev_priv, UTIL_PIN_CTL, |
1208 |
++ val | UTIL_PIN_PIPE(pipe) | UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE); |
1209 |
++ } |
1210 |
++ |
1211 |
++ pwm_ctl = intel_de_read(dev_priv, |
1212 |
++ BXT_BLC_PWM_CTL(panel->backlight.controller)); |
1213 |
++ if (pwm_ctl & BXT_BLC_PWM_ENABLE) { |
1214 |
++ drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); |
1215 |
++ pwm_ctl &= ~BXT_BLC_PWM_ENABLE; |
1216 |
++ intel_de_write(dev_priv, |
1217 |
++ BXT_BLC_PWM_CTL(panel->backlight.controller), |
1218 |
++ pwm_ctl); |
1219 |
++ } |
1220 |
++ |
1221 |
++ intel_de_write(dev_priv, |
1222 |
++ BXT_BLC_PWM_FREQ(panel->backlight.controller), |
1223 |
++ panel->backlight.pwm_level_max); |
1224 |
++ |
1225 |
++ intel_panel_set_pwm_level(conn_state, level); |
1226 |
++ |
1227 |
++ pwm_ctl = 0; |
1228 |
++ if (panel->backlight.active_low_pwm) |
1229 |
++ pwm_ctl |= BXT_BLC_PWM_POLARITY; |
1230 |
++ |
1231 |
++ intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), |
1232 |
++ pwm_ctl); |
1233 |
++ intel_de_posting_read(dev_priv, |
1234 |
++ BXT_BLC_PWM_CTL(panel->backlight.controller)); |
1235 |
++ intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), |
1236 |
++ pwm_ctl | BXT_BLC_PWM_ENABLE); |
1237 |
++} |
1238 |
++ |
1239 |
++static void cnp_enable_backlight(const struct intel_crtc_state *crtc_state, |
1240 |
++ const struct drm_connector_state *conn_state, u32 level) |
1241 |
++{ |
1242 |
++ struct intel_connector *connector = to_intel_connector(conn_state->connector); |
1243 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
1244 |
++ struct intel_panel *panel = &connector->panel; |
1245 |
++ u32 pwm_ctl; |
1246 |
++ |
1247 |
++ pwm_ctl = intel_de_read(dev_priv, |
1248 |
++ BXT_BLC_PWM_CTL(panel->backlight.controller)); |
1249 |
++ if (pwm_ctl & BXT_BLC_PWM_ENABLE) { |
1250 |
++ drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); |
1251 |
++ pwm_ctl &= ~BXT_BLC_PWM_ENABLE; |
1252 |
++ intel_de_write(dev_priv, |
1253 |
++ BXT_BLC_PWM_CTL(panel->backlight.controller), |
1254 |
++ pwm_ctl); |
1255 |
++ } |
1256 |
++ |
1257 |
++ intel_de_write(dev_priv, |
1258 |
++ BXT_BLC_PWM_FREQ(panel->backlight.controller), |
1259 |
++ panel->backlight.pwm_level_max); |
1260 |
++ |
1261 |
++ intel_panel_set_pwm_level(conn_state, level); |
1262 |
++ |
1263 |
++ pwm_ctl = 0; |
1264 |
++ if (panel->backlight.active_low_pwm) |
1265 |
++ pwm_ctl |= BXT_BLC_PWM_POLARITY; |
1266 |
++ |
1267 |
++ intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), |
1268 |
++ pwm_ctl); |
1269 |
++ intel_de_posting_read(dev_priv, |
1270 |
++ BXT_BLC_PWM_CTL(panel->backlight.controller)); |
1271 |
++ intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), |
1272 |
++ pwm_ctl | BXT_BLC_PWM_ENABLE); |
1273 |
++} |
1274 |
++ |
1275 |
++static void ext_pwm_enable_backlight(const struct intel_crtc_state *crtc_state, |
1276 |
++ const struct drm_connector_state *conn_state, u32 level) |
1277 |
++{ |
1278 |
++ struct intel_connector *connector = to_intel_connector(conn_state->connector); |
1279 |
++ struct intel_panel *panel = &connector->panel; |
1280 |
++ |
1281 |
++ pwm_set_relative_duty_cycle(&panel->backlight.pwm_state, level, 100); |
1282 |
++ panel->backlight.pwm_state.enabled = true; |
1283 |
++ pwm_apply_state(panel->backlight.pwm, &panel->backlight.pwm_state); |
1284 |
++} |
1285 |
++ |
1286 |
++static void __intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state, |
1287 |
++ const struct drm_connector_state *conn_state) |
1288 |
++{ |
1289 |
++ struct intel_connector *connector = to_intel_connector(conn_state->connector); |
1290 |
++ struct intel_panel *panel = &connector->panel; |
1291 |
++ |
1292 |
++ WARN_ON(panel->backlight.max == 0); |
1293 |
++ |
1294 |
++ if (panel->backlight.level <= panel->backlight.min) { |
1295 |
++ panel->backlight.level = panel->backlight.max; |
1296 |
++ if (panel->backlight.device) |
1297 |
++ panel->backlight.device->props.brightness = |
1298 |
++ scale_hw_to_user(connector, |
1299 |
++ panel->backlight.level, |
1300 |
++ panel->backlight.device->props.max_brightness); |
1301 |
++ } |
1302 |
++ |
1303 |
++ panel->backlight.funcs->enable(crtc_state, conn_state, panel->backlight.level); |
1304 |
++ panel->backlight.enabled = true; |
1305 |
++ if (panel->backlight.device) |
1306 |
++ panel->backlight.device->props.power = FB_BLANK_UNBLANK; |
1307 |
++} |
1308 |
++ |
1309 |
++void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state, |
1310 |
++ const struct drm_connector_state *conn_state) |
1311 |
++{ |
1312 |
++ struct intel_connector *connector = to_intel_connector(conn_state->connector); |
1313 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
1314 |
++ struct intel_panel *panel = &connector->panel; |
1315 |
++ enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; |
1316 |
++ |
1317 |
++ if (!panel->backlight.present) |
1318 |
++ return; |
1319 |
++ |
1320 |
++ drm_dbg_kms(&dev_priv->drm, "pipe %c\n", pipe_name(pipe)); |
1321 |
++ |
1322 |
++ mutex_lock(&dev_priv->backlight_lock); |
1323 |
++ |
1324 |
++ __intel_panel_enable_backlight(crtc_state, conn_state); |
1325 |
++ |
1326 |
++ mutex_unlock(&dev_priv->backlight_lock); |
1327 |
++} |
1328 |
++ |
1329 |
++#if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE) |
1330 |
++static u32 intel_panel_get_backlight(struct intel_connector *connector) |
1331 |
++{ |
1332 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
1333 |
++ struct intel_panel *panel = &connector->panel; |
1334 |
++ u32 val = 0; |
1335 |
++ |
1336 |
++ mutex_lock(&dev_priv->backlight_lock); |
1337 |
++ |
1338 |
++ if (panel->backlight.enabled) |
1339 |
++ val = panel->backlight.funcs->get(connector, intel_connector_get_pipe(connector)); |
1340 |
++ |
1341 |
++ mutex_unlock(&dev_priv->backlight_lock); |
1342 |
++ |
1343 |
++ drm_dbg_kms(&dev_priv->drm, "get backlight PWM = %d\n", val); |
1344 |
++ return val; |
1345 |
++} |
1346 |
++ |
1347 |
++/* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */ |
1348 |
++static u32 scale_user_to_hw(struct intel_connector *connector, |
1349 |
++ u32 user_level, u32 user_max) |
1350 |
++{ |
1351 |
++ struct intel_panel *panel = &connector->panel; |
1352 |
++ |
1353 |
++ return scale(user_level, 0, user_max, |
1354 |
++ panel->backlight.min, panel->backlight.max); |
1355 |
++} |
1356 |
++ |
1357 |
++/* set backlight brightness to level in range [0..max], scaling wrt hw min */ |
1358 |
++static void intel_panel_set_backlight(const struct drm_connector_state *conn_state, |
1359 |
++ u32 user_level, u32 user_max) |
1360 |
++{ |
1361 |
++ struct intel_connector *connector = to_intel_connector(conn_state->connector); |
1362 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
1363 |
++ struct intel_panel *panel = &connector->panel; |
1364 |
++ u32 hw_level; |
1365 |
++ |
1366 |
++ if (!panel->backlight.present) |
1367 |
++ return; |
1368 |
++ |
1369 |
++ mutex_lock(&dev_priv->backlight_lock); |
1370 |
++ |
1371 |
++ drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0); |
1372 |
++ |
1373 |
++ hw_level = scale_user_to_hw(connector, user_level, user_max); |
1374 |
++ panel->backlight.level = hw_level; |
1375 |
++ |
1376 |
++ if (panel->backlight.enabled) |
1377 |
++ intel_panel_actually_set_backlight(conn_state, hw_level); |
1378 |
++ |
1379 |
++ mutex_unlock(&dev_priv->backlight_lock); |
1380 |
++} |
1381 |
++ |
1382 |
++static int intel_backlight_device_update_status(struct backlight_device *bd) |
1383 |
++{ |
1384 |
++ struct intel_connector *connector = bl_get_data(bd); |
1385 |
++ struct intel_panel *panel = &connector->panel; |
1386 |
++ struct drm_device *dev = connector->base.dev; |
1387 |
++ |
1388 |
++ drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); |
1389 |
++ DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n", |
1390 |
++ bd->props.brightness, bd->props.max_brightness); |
1391 |
++ intel_panel_set_backlight(connector->base.state, bd->props.brightness, |
1392 |
++ bd->props.max_brightness); |
1393 |
++ |
1394 |
++ /* |
1395 |
++ * Allow flipping bl_power as a sub-state of enabled. Sadly the |
1396 |
++ * backlight class device does not make it easy to differentiate |
1397 |
++ * between callbacks for brightness and bl_power, so our backlight_power |
1398 |
++ * callback needs to take this into account. |
1399 |
++ */ |
1400 |
++ if (panel->backlight.enabled) { |
1401 |
++ if (panel->backlight.power) { |
1402 |
++ bool enable = bd->props.power == FB_BLANK_UNBLANK && |
1403 |
++ bd->props.brightness != 0; |
1404 |
++ panel->backlight.power(connector, enable); |
1405 |
++ } |
1406 |
++ } else { |
1407 |
++ bd->props.power = FB_BLANK_POWERDOWN; |
1408 |
++ } |
1409 |
++ |
1410 |
++ drm_modeset_unlock(&dev->mode_config.connection_mutex); |
1411 |
++ return 0; |
1412 |
++} |
1413 |
++ |
1414 |
++static int intel_backlight_device_get_brightness(struct backlight_device *bd) |
1415 |
++{ |
1416 |
++ struct intel_connector *connector = bl_get_data(bd); |
1417 |
++ struct drm_device *dev = connector->base.dev; |
1418 |
++ struct drm_i915_private *dev_priv = to_i915(dev); |
1419 |
++ intel_wakeref_t wakeref; |
1420 |
++ int ret = 0; |
1421 |
++ |
1422 |
++ with_intel_runtime_pm(&dev_priv->runtime_pm, wakeref) { |
1423 |
++ u32 hw_level; |
1424 |
++ |
1425 |
++ drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); |
1426 |
++ |
1427 |
++ hw_level = intel_panel_get_backlight(connector); |
1428 |
++ ret = scale_hw_to_user(connector, |
1429 |
++ hw_level, bd->props.max_brightness); |
1430 |
++ |
1431 |
++ drm_modeset_unlock(&dev->mode_config.connection_mutex); |
1432 |
++ } |
1433 |
++ |
1434 |
++ return ret; |
1435 |
++} |
1436 |
++ |
1437 |
++static const struct backlight_ops intel_backlight_device_ops = { |
1438 |
++ .update_status = intel_backlight_device_update_status, |
1439 |
++ .get_brightness = intel_backlight_device_get_brightness, |
1440 |
++}; |
1441 |
++ |
1442 |
++int intel_backlight_device_register(struct intel_connector *connector) |
1443 |
++{ |
1444 |
++ struct drm_i915_private *i915 = to_i915(connector->base.dev); |
1445 |
++ struct intel_panel *panel = &connector->panel; |
1446 |
++ struct backlight_properties props; |
1447 |
++ struct backlight_device *bd; |
1448 |
++ const char *name; |
1449 |
++ int ret = 0; |
1450 |
++ |
1451 |
++ if (WARN_ON(panel->backlight.device)) |
1452 |
++ return -ENODEV; |
1453 |
++ |
1454 |
++ if (!panel->backlight.present) |
1455 |
++ return 0; |
1456 |
++ |
1457 |
++ WARN_ON(panel->backlight.max == 0); |
1458 |
++ |
1459 |
++ memset(&props, 0, sizeof(props)); |
1460 |
++ props.type = BACKLIGHT_RAW; |
1461 |
++ |
1462 |
++ /* |
1463 |
++ * Note: Everything should work even if the backlight device max |
1464 |
++ * presented to the userspace is arbitrarily chosen. |
1465 |
++ */ |
1466 |
++ props.max_brightness = panel->backlight.max; |
1467 |
++ props.brightness = scale_hw_to_user(connector, |
1468 |
++ panel->backlight.level, |
1469 |
++ props.max_brightness); |
1470 |
++ |
1471 |
++ if (panel->backlight.enabled) |
1472 |
++ props.power = FB_BLANK_UNBLANK; |
1473 |
++ else |
1474 |
++ props.power = FB_BLANK_POWERDOWN; |
1475 |
++ |
1476 |
++ name = kstrdup("intel_backlight", GFP_KERNEL); |
1477 |
++ if (!name) |
1478 |
++ return -ENOMEM; |
1479 |
++ |
1480 |
++ bd = backlight_device_get_by_name(name); |
1481 |
++ if (bd) { |
1482 |
++ put_device(&bd->dev); |
1483 |
++ /* |
1484 |
++ * Using the same name independent of the drm device or connector |
1485 |
++ * prevents registration of multiple backlight devices in the |
1486 |
++ * driver. However, we need to use the default name for backward |
1487 |
++ * compatibility. Use unique names for subsequent backlight devices as a |
1488 |
++ * fallback when the default name already exists. |
1489 |
++ */ |
1490 |
++ kfree(name); |
1491 |
++ name = kasprintf(GFP_KERNEL, "card%d-%s-backlight", |
1492 |
++ i915->drm.primary->index, connector->base.name); |
1493 |
++ if (!name) |
1494 |
++ return -ENOMEM; |
1495 |
++ } |
1496 |
++ bd = backlight_device_register(name, connector->base.kdev, connector, |
1497 |
++ &intel_backlight_device_ops, &props); |
1498 |
++ |
1499 |
++ if (IS_ERR(bd)) { |
1500 |
++ drm_err(&i915->drm, |
1501 |
++ "[CONNECTOR:%d:%s] backlight device %s register failed: %ld\n", |
1502 |
++ connector->base.base.id, connector->base.name, name, PTR_ERR(bd)); |
1503 |
++ ret = PTR_ERR(bd); |
1504 |
++ goto out; |
1505 |
++ } |
1506 |
++ |
1507 |
++ panel->backlight.device = bd; |
1508 |
++ |
1509 |
++ drm_dbg_kms(&i915->drm, |
1510 |
++ "[CONNECTOR:%d:%s] backlight device %s registered\n", |
1511 |
++ connector->base.base.id, connector->base.name, name); |
1512 |
++ |
1513 |
++out: |
1514 |
++ kfree(name); |
1515 |
++ |
1516 |
++ return ret; |
1517 |
++} |
1518 |
++ |
1519 |
++void intel_backlight_device_unregister(struct intel_connector *connector) |
1520 |
++{ |
1521 |
++ struct intel_panel *panel = &connector->panel; |
1522 |
++ |
1523 |
++ if (panel->backlight.device) { |
1524 |
++ backlight_device_unregister(panel->backlight.device); |
1525 |
++ panel->backlight.device = NULL; |
1526 |
++ } |
1527 |
++} |
1528 |
++#endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */ |
1529 |
++ |
1530 |
++/* |
1531 |
++ * CNP: PWM clock frequency is 19.2 MHz or 24 MHz. |
1532 |
++ * PWM increment = 1 |
1533 |
++ */ |
1534 |
++static u32 cnp_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) |
1535 |
++{ |
1536 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
1537 |
++ |
1538 |
++ return DIV_ROUND_CLOSEST(KHz(RUNTIME_INFO(dev_priv)->rawclk_freq), |
1539 |
++ pwm_freq_hz); |
1540 |
++} |
1541 |
++ |
1542 |
++/* |
1543 |
++ * BXT: PWM clock frequency = 19.2 MHz. |
1544 |
++ */ |
1545 |
++static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) |
1546 |
++{ |
1547 |
++ return DIV_ROUND_CLOSEST(KHz(19200), pwm_freq_hz); |
1548 |
++} |
1549 |
++ |
1550 |
++/* |
1551 |
++ * SPT: This value represents the period of the PWM stream in clock periods |
1552 |
++ * multiplied by 16 (default increment) or 128 (alternate increment selected in |
1553 |
++ * SCHICKEN_1 bit 0). PWM clock is 24 MHz. |
1554 |
++ */ |
1555 |
++static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) |
1556 |
++{ |
1557 |
++ struct intel_panel *panel = &connector->panel; |
1558 |
++ u32 mul; |
1559 |
++ |
1560 |
++ if (panel->backlight.alternate_pwm_increment) |
1561 |
++ mul = 128; |
1562 |
++ else |
1563 |
++ mul = 16; |
1564 |
++ |
1565 |
++ return DIV_ROUND_CLOSEST(MHz(24), pwm_freq_hz * mul); |
1566 |
++} |
1567 |
++ |
1568 |
++/* |
1569 |
++ * LPT: This value represents the period of the PWM stream in clock periods |
1570 |
++ * multiplied by 128 (default increment) or 16 (alternate increment, selected in |
1571 |
++ * LPT SOUTH_CHICKEN2 register bit 5). |
1572 |
++ */ |
1573 |
++static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) |
1574 |
++{ |
1575 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
1576 |
++ struct intel_panel *panel = &connector->panel; |
1577 |
++ u32 mul, clock; |
1578 |
++ |
1579 |
++ if (panel->backlight.alternate_pwm_increment) |
1580 |
++ mul = 16; |
1581 |
++ else |
1582 |
++ mul = 128; |
1583 |
++ |
1584 |
++ if (HAS_PCH_LPT_H(dev_priv)) |
1585 |
++ clock = MHz(135); /* LPT:H */ |
1586 |
++ else |
1587 |
++ clock = MHz(24); /* LPT:LP */ |
1588 |
++ |
1589 |
++ return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul); |
1590 |
++} |
1591 |
++ |
1592 |
++/* |
1593 |
++ * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH |
1594 |
++ * display raw clocks multiplied by 128. |
1595 |
++ */ |
1596 |
++static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) |
1597 |
++{ |
1598 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
1599 |
++ |
1600 |
++ return DIV_ROUND_CLOSEST(KHz(RUNTIME_INFO(dev_priv)->rawclk_freq), |
1601 |
++ pwm_freq_hz * 128); |
1602 |
++} |
1603 |
++ |
1604 |
++/* |
1605 |
++ * Gen2: This field determines the number of time base events (display core |
1606 |
++ * clock frequency/32) in total for a complete cycle of modulated backlight |
1607 |
++ * control. |
1608 |
++ * |
1609 |
++ * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock) |
1610 |
++ * divided by 32. |
1611 |
++ */ |
1612 |
++static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) |
1613 |
++{ |
1614 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
1615 |
++ int clock; |
1616 |
++ |
1617 |
++ if (IS_PINEVIEW(dev_priv)) |
1618 |
++ clock = KHz(RUNTIME_INFO(dev_priv)->rawclk_freq); |
1619 |
++ else |
1620 |
++ clock = KHz(dev_priv->cdclk.hw.cdclk); |
1621 |
++ |
1622 |
++ return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 32); |
1623 |
++} |
1624 |
++ |
1625 |
++/* |
1626 |
++ * Gen4: This value represents the period of the PWM stream in display core |
1627 |
++ * clocks ([DevCTG] HRAW clocks) multiplied by 128. |
1628 |
++ * |
1629 |
++ */ |
1630 |
++static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) |
1631 |
++{ |
1632 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
1633 |
++ int clock; |
1634 |
++ |
1635 |
++ if (IS_G4X(dev_priv)) |
1636 |
++ clock = KHz(RUNTIME_INFO(dev_priv)->rawclk_freq); |
1637 |
++ else |
1638 |
++ clock = KHz(dev_priv->cdclk.hw.cdclk); |
1639 |
++ |
1640 |
++ return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 128); |
1641 |
++} |
1642 |
++ |
1643 |
++/* |
1644 |
++ * VLV: This value represents the period of the PWM stream in display core |
1645 |
++ * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks |
1646 |
++ * multiplied by 16. CHV uses a 19.2MHz S0IX clock. |
1647 |
++ */ |
1648 |
++static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) |
1649 |
++{ |
1650 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
1651 |
++ int mul, clock; |
1652 |
++ |
1653 |
++ if ((intel_de_read(dev_priv, CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) { |
1654 |
++ if (IS_CHERRYVIEW(dev_priv)) |
1655 |
++ clock = KHz(19200); |
1656 |
++ else |
1657 |
++ clock = MHz(25); |
1658 |
++ mul = 16; |
1659 |
++ } else { |
1660 |
++ clock = KHz(RUNTIME_INFO(dev_priv)->rawclk_freq); |
1661 |
++ mul = 128; |
1662 |
++ } |
1663 |
++ |
1664 |
++ return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul); |
1665 |
++} |
1666 |
++ |
1667 |
++static u16 get_vbt_pwm_freq(struct drm_i915_private *dev_priv) |
1668 |
++{ |
1669 |
++ u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz; |
1670 |
++ |
1671 |
++ if (pwm_freq_hz) { |
1672 |
++ drm_dbg_kms(&dev_priv->drm, |
1673 |
++ "VBT defined backlight frequency %u Hz\n", |
1674 |
++ pwm_freq_hz); |
1675 |
++ } else { |
1676 |
++ pwm_freq_hz = 200; |
1677 |
++ drm_dbg_kms(&dev_priv->drm, |
1678 |
++ "default backlight frequency %u Hz\n", |
1679 |
++ pwm_freq_hz); |
1680 |
++ } |
1681 |
++ |
1682 |
++ return pwm_freq_hz; |
1683 |
++} |
1684 |
++ |
1685 |
++static u32 get_backlight_max_vbt(struct intel_connector *connector) |
1686 |
++{ |
1687 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
1688 |
++ struct intel_panel *panel = &connector->panel; |
1689 |
++ u16 pwm_freq_hz = get_vbt_pwm_freq(dev_priv); |
1690 |
++ u32 pwm; |
1691 |
++ |
1692 |
++ if (!panel->backlight.pwm_funcs->hz_to_pwm) { |
1693 |
++ drm_dbg_kms(&dev_priv->drm, |
1694 |
++ "backlight frequency conversion not supported\n"); |
1695 |
++ return 0; |
1696 |
++ } |
1697 |
++ |
1698 |
++ pwm = panel->backlight.pwm_funcs->hz_to_pwm(connector, pwm_freq_hz); |
1699 |
++ if (!pwm) { |
1700 |
++ drm_dbg_kms(&dev_priv->drm, |
1701 |
++ "backlight frequency conversion failed\n"); |
1702 |
++ return 0; |
1703 |
++ } |
1704 |
++ |
1705 |
++ return pwm; |
1706 |
++} |
1707 |
++ |
1708 |
++/* |
1709 |
++ * Note: The setup hooks can't assume pipe is set! |
1710 |
++ */ |
1711 |
++static u32 get_backlight_min_vbt(struct intel_connector *connector) |
1712 |
++{ |
1713 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
1714 |
++ struct intel_panel *panel = &connector->panel; |
1715 |
++ int min; |
1716 |
++ |
1717 |
++ drm_WARN_ON(&dev_priv->drm, panel->backlight.pwm_level_max == 0); |
1718 |
++ |
1719 |
++ /* |
1720 |
++ * XXX: If the vbt value is 255, it makes min equal to max, which leads |
1721 |
++ * to problems. There are such machines out there. Either our |
1722 |
++ * interpretation is wrong or the vbt has bogus data. Or both. Safeguard |
1723 |
++ * against this by letting the minimum be at most (arbitrarily chosen) |
1724 |
++ * 25% of the max. |
1725 |
++ */ |
1726 |
++ min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64); |
1727 |
++ if (min != dev_priv->vbt.backlight.min_brightness) { |
1728 |
++ drm_dbg_kms(&dev_priv->drm, |
1729 |
++ "clamping VBT min backlight %d/255 to %d/255\n", |
1730 |
++ dev_priv->vbt.backlight.min_brightness, min); |
1731 |
++ } |
1732 |
++ |
1733 |
++ /* vbt value is a coefficient in range [0..255] */ |
1734 |
++ return scale(min, 0, 255, 0, panel->backlight.pwm_level_max); |
1735 |
++} |
1736 |
++ |
1737 |
++static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused) |
1738 |
++{ |
1739 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
1740 |
++ struct intel_panel *panel = &connector->panel; |
1741 |
++ u32 cpu_ctl2, pch_ctl1, pch_ctl2, val; |
1742 |
++ bool alt, cpu_mode; |
1743 |
++ |
1744 |
++ if (HAS_PCH_LPT(dev_priv)) |
1745 |
++ alt = intel_de_read(dev_priv, SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY; |
1746 |
++ else |
1747 |
++ alt = intel_de_read(dev_priv, SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY; |
1748 |
++ panel->backlight.alternate_pwm_increment = alt; |
1749 |
++ |
1750 |
++ pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); |
1751 |
++ panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; |
1752 |
++ |
1753 |
++ pch_ctl2 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2); |
1754 |
++ panel->backlight.pwm_level_max = pch_ctl2 >> 16; |
1755 |
++ |
1756 |
++ cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); |
1757 |
++ |
1758 |
++ if (!panel->backlight.pwm_level_max) |
1759 |
++ panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); |
1760 |
++ |
1761 |
++ if (!panel->backlight.pwm_level_max) |
1762 |
++ return -ENODEV; |
1763 |
++ |
1764 |
++ panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); |
1765 |
++ |
1766 |
++ panel->backlight.pwm_enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE; |
1767 |
++ |
1768 |
++ cpu_mode = panel->backlight.pwm_enabled && HAS_PCH_LPT(dev_priv) && |
1769 |
++ !(pch_ctl1 & BLM_PCH_OVERRIDE_ENABLE) && |
1770 |
++ (cpu_ctl2 & BLM_PWM_ENABLE); |
1771 |
++ |
1772 |
++ if (cpu_mode) { |
1773 |
++ val = pch_get_backlight(connector, unused); |
1774 |
++ |
1775 |
++ drm_dbg_kms(&dev_priv->drm, |
1776 |
++ "CPU backlight register was enabled, switching to PCH override\n"); |
1777 |
++ |
1778 |
++ /* Write converted CPU PWM value to PCH override register */ |
1779 |
++ lpt_set_backlight(connector->base.state, val); |
1780 |
++ intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, |
1781 |
++ pch_ctl1 | BLM_PCH_OVERRIDE_ENABLE); |
1782 |
++ |
1783 |
++ intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, |
1784 |
++ cpu_ctl2 & ~BLM_PWM_ENABLE); |
1785 |
++ } |
1786 |
++ |
1787 |
++ return 0; |
1788 |
++} |
1789 |
++ |
1790 |
++static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused) |
1791 |
++{ |
1792 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
1793 |
++ struct intel_panel *panel = &connector->panel; |
1794 |
++ u32 cpu_ctl2, pch_ctl1, pch_ctl2; |
1795 |
++ |
1796 |
++ pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); |
1797 |
++ panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; |
1798 |
++ |
1799 |
++ pch_ctl2 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2); |
1800 |
++ panel->backlight.pwm_level_max = pch_ctl2 >> 16; |
1801 |
++ |
1802 |
++ if (!panel->backlight.pwm_level_max) |
1803 |
++ panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); |
1804 |
++ |
1805 |
++ if (!panel->backlight.pwm_level_max) |
1806 |
++ return -ENODEV; |
1807 |
++ |
1808 |
++ panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); |
1809 |
++ |
1810 |
++ cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); |
1811 |
++ panel->backlight.pwm_enabled = (cpu_ctl2 & BLM_PWM_ENABLE) && |
1812 |
++ (pch_ctl1 & BLM_PCH_PWM_ENABLE); |
1813 |
++ |
1814 |
++ return 0; |
1815 |
++} |
1816 |
++ |
1817 |
++static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused) |
1818 |
++{ |
1819 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
1820 |
++ struct intel_panel *panel = &connector->panel; |
1821 |
++ u32 ctl, val; |
1822 |
++ |
1823 |
++ ctl = intel_de_read(dev_priv, BLC_PWM_CTL); |
1824 |
++ |
1825 |
++ if (DISPLAY_VER(dev_priv) == 2 || IS_I915GM(dev_priv) || IS_I945GM(dev_priv)) |
1826 |
++ panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE; |
1827 |
++ |
1828 |
++ if (IS_PINEVIEW(dev_priv)) |
1829 |
++ panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV; |
1830 |
++ |
1831 |
++ panel->backlight.pwm_level_max = ctl >> 17; |
1832 |
++ |
1833 |
++ if (!panel->backlight.pwm_level_max) { |
1834 |
++ panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); |
1835 |
++ panel->backlight.pwm_level_max >>= 1; |
1836 |
++ } |
1837 |
++ |
1838 |
++ if (!panel->backlight.pwm_level_max) |
1839 |
++ return -ENODEV; |
1840 |
++ |
1841 |
++ if (panel->backlight.combination_mode) |
1842 |
++ panel->backlight.pwm_level_max *= 0xff; |
1843 |
++ |
1844 |
++ panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); |
1845 |
++ |
1846 |
++ val = i9xx_get_backlight(connector, unused); |
1847 |
++ val = intel_panel_invert_pwm_level(connector, val); |
1848 |
++ val = clamp(val, panel->backlight.pwm_level_min, panel->backlight.pwm_level_max); |
1849 |
++ |
1850 |
++ panel->backlight.pwm_enabled = val != 0; |
1851 |
++ |
1852 |
++ return 0; |
1853 |
++} |
1854 |
++ |
1855 |
++static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused) |
1856 |
++{ |
1857 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
1858 |
++ struct intel_panel *panel = &connector->panel; |
1859 |
++ u32 ctl, ctl2; |
1860 |
++ |
1861 |
++ ctl2 = intel_de_read(dev_priv, BLC_PWM_CTL2); |
1862 |
++ panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE; |
1863 |
++ panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; |
1864 |
++ |
1865 |
++ ctl = intel_de_read(dev_priv, BLC_PWM_CTL); |
1866 |
++ panel->backlight.pwm_level_max = ctl >> 16; |
1867 |
++ |
1868 |
++ if (!panel->backlight.pwm_level_max) |
1869 |
++ panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); |
1870 |
++ |
1871 |
++ if (!panel->backlight.pwm_level_max) |
1872 |
++ return -ENODEV; |
1873 |
++ |
1874 |
++ if (panel->backlight.combination_mode) |
1875 |
++ panel->backlight.pwm_level_max *= 0xff; |
1876 |
++ |
1877 |
++ panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); |
1878 |
++ |
1879 |
++ panel->backlight.pwm_enabled = ctl2 & BLM_PWM_ENABLE; |
1880 |
++ |
1881 |
++ return 0; |
1882 |
++} |
1883 |
++ |
1884 |
++static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe) |
1885 |
++{ |
1886 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
1887 |
++ struct intel_panel *panel = &connector->panel; |
1888 |
++ u32 ctl, ctl2; |
1889 |
++ |
1890 |
++ if (drm_WARN_ON(&dev_priv->drm, pipe != PIPE_A && pipe != PIPE_B)) |
1891 |
++ return -ENODEV; |
1892 |
++ |
1893 |
++ ctl2 = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe)); |
1894 |
++ panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; |
1895 |
++ |
1896 |
++ ctl = intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe)); |
1897 |
++ panel->backlight.pwm_level_max = ctl >> 16; |
1898 |
++ |
1899 |
++ if (!panel->backlight.pwm_level_max) |
1900 |
++ panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); |
1901 |
++ |
1902 |
++ if (!panel->backlight.pwm_level_max) |
1903 |
++ return -ENODEV; |
1904 |
++ |
1905 |
++ panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); |
1906 |
++ |
1907 |
++ panel->backlight.pwm_enabled = ctl2 & BLM_PWM_ENABLE; |
1908 |
++ |
1909 |
++ return 0; |
1910 |
++} |
1911 |
++ |
1912 |
++static int |
1913 |
++bxt_setup_backlight(struct intel_connector *connector, enum pipe unused) |
1914 |
++{ |
1915 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
1916 |
++ struct intel_panel *panel = &connector->panel; |
1917 |
++ u32 pwm_ctl, val; |
1918 |
++ |
1919 |
++ panel->backlight.controller = dev_priv->vbt.backlight.controller; |
1920 |
++ |
1921 |
++ pwm_ctl = intel_de_read(dev_priv, |
1922 |
++ BXT_BLC_PWM_CTL(panel->backlight.controller)); |
1923 |
++ |
1924 |
++ /* Controller 1 uses the utility pin. */ |
1925 |
++ if (panel->backlight.controller == 1) { |
1926 |
++ val = intel_de_read(dev_priv, UTIL_PIN_CTL); |
1927 |
++ panel->backlight.util_pin_active_low = |
1928 |
++ val & UTIL_PIN_POLARITY; |
1929 |
++ } |
1930 |
++ |
1931 |
++ panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY; |
1932 |
++ panel->backlight.pwm_level_max = |
1933 |
++ intel_de_read(dev_priv, BXT_BLC_PWM_FREQ(panel->backlight.controller)); |
1934 |
++ |
1935 |
++ if (!panel->backlight.pwm_level_max) |
1936 |
++ panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); |
1937 |
++ |
1938 |
++ if (!panel->backlight.pwm_level_max) |
1939 |
++ return -ENODEV; |
1940 |
++ |
1941 |
++ panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); |
1942 |
++ |
1943 |
++ panel->backlight.pwm_enabled = pwm_ctl & BXT_BLC_PWM_ENABLE; |
1944 |
++ |
1945 |
++ return 0; |
1946 |
++} |
1947 |
++ |
1948 |
++static int |
1949 |
++cnp_setup_backlight(struct intel_connector *connector, enum pipe unused) |
1950 |
++{ |
1951 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
1952 |
++ struct intel_panel *panel = &connector->panel; |
1953 |
++ u32 pwm_ctl; |
1954 |
++ |
1955 |
++ /* |
1956 |
++ * CNP has the BXT implementation of backlight, but with only one |
1957 |
++ * controller. TODO: ICP has multiple controllers but we only use |
1958 |
++ * controller 0 for now. |
1959 |
++ */ |
1960 |
++ panel->backlight.controller = 0; |
1961 |
++ |
1962 |
++ pwm_ctl = intel_de_read(dev_priv, |
1963 |
++ BXT_BLC_PWM_CTL(panel->backlight.controller)); |
1964 |
++ |
1965 |
++ panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY; |
1966 |
++ panel->backlight.pwm_level_max = |
1967 |
++ intel_de_read(dev_priv, BXT_BLC_PWM_FREQ(panel->backlight.controller)); |
1968 |
++ |
1969 |
++ if (!panel->backlight.pwm_level_max) |
1970 |
++ panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); |
1971 |
++ |
1972 |
++ if (!panel->backlight.pwm_level_max) |
1973 |
++ return -ENODEV; |
1974 |
++ |
1975 |
++ panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); |
1976 |
++ |
1977 |
++ panel->backlight.pwm_enabled = pwm_ctl & BXT_BLC_PWM_ENABLE; |
1978 |
++ |
1979 |
++ return 0; |
1980 |
++} |
1981 |
++ |
1982 |
++static int ext_pwm_setup_backlight(struct intel_connector *connector, |
1983 |
++ enum pipe pipe) |
1984 |
++{ |
1985 |
++ struct drm_device *dev = connector->base.dev; |
1986 |
++ struct drm_i915_private *dev_priv = to_i915(dev); |
1987 |
++ struct intel_panel *panel = &connector->panel; |
1988 |
++ const char *desc; |
1989 |
++ u32 level; |
1990 |
++ |
1991 |
++ /* Get the right PWM chip for DSI backlight according to VBT */ |
1992 |
++ if (dev_priv->vbt.dsi.config->pwm_blc == PPS_BLC_PMIC) { |
1993 |
++ panel->backlight.pwm = pwm_get(dev->dev, "pwm_pmic_backlight"); |
1994 |
++ desc = "PMIC"; |
1995 |
++ } else { |
1996 |
++ panel->backlight.pwm = pwm_get(dev->dev, "pwm_soc_backlight"); |
1997 |
++ desc = "SoC"; |
1998 |
++ } |
1999 |
++ |
2000 |
++ if (IS_ERR(panel->backlight.pwm)) { |
2001 |
++ drm_err(&dev_priv->drm, "Failed to get the %s PWM chip\n", |
2002 |
++ desc); |
2003 |
++ panel->backlight.pwm = NULL; |
2004 |
++ return -ENODEV; |
2005 |
++ } |
2006 |
++ |
2007 |
++ panel->backlight.pwm_level_max = 100; /* 100% */ |
2008 |
++ panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); |
2009 |
++ |
2010 |
++ if (pwm_is_enabled(panel->backlight.pwm)) { |
2011 |
++ /* PWM is already enabled, use existing settings */ |
2012 |
++ pwm_get_state(panel->backlight.pwm, &panel->backlight.pwm_state); |
2013 |
++ |
2014 |
++ level = pwm_get_relative_duty_cycle(&panel->backlight.pwm_state, |
2015 |
++ 100); |
2016 |
++ level = intel_panel_invert_pwm_level(connector, level); |
2017 |
++ panel->backlight.pwm_enabled = true; |
2018 |
++ |
2019 |
++ drm_dbg_kms(&dev_priv->drm, "PWM already enabled at freq %ld, VBT freq %d, level %d\n", |
2020 |
++ NSEC_PER_SEC / (unsigned long)panel->backlight.pwm_state.period, |
2021 |
++ get_vbt_pwm_freq(dev_priv), level); |
2022 |
++ } else { |
2023 |
++ /* Set period from VBT frequency, leave other settings at 0. */ |
2024 |
++ panel->backlight.pwm_state.period = |
2025 |
++ NSEC_PER_SEC / get_vbt_pwm_freq(dev_priv); |
2026 |
++ } |
2027 |
++ |
2028 |
++ drm_info(&dev_priv->drm, "Using %s PWM for LCD backlight control\n", |
2029 |
++ desc); |
2030 |
++ return 0; |
2031 |
++} |
2032 |
++ |
2033 |
++static void intel_pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level) |
2034 |
++{ |
2035 |
++ struct intel_connector *connector = to_intel_connector(conn_state->connector); |
2036 |
++ struct intel_panel *panel = &connector->panel; |
2037 |
++ |
2038 |
++ panel->backlight.pwm_funcs->set(conn_state, |
2039 |
++ intel_panel_invert_pwm_level(connector, level)); |
2040 |
++} |
2041 |
++ |
2042 |
++static u32 intel_pwm_get_backlight(struct intel_connector *connector, enum pipe pipe) |
2043 |
++{ |
2044 |
++ struct intel_panel *panel = &connector->panel; |
2045 |
++ |
2046 |
++ return intel_panel_invert_pwm_level(connector, |
2047 |
++ panel->backlight.pwm_funcs->get(connector, pipe)); |
2048 |
++} |
2049 |
++ |
2050 |
++static void intel_pwm_enable_backlight(const struct intel_crtc_state *crtc_state, |
2051 |
++ const struct drm_connector_state *conn_state, u32 level) |
2052 |
++{ |
2053 |
++ struct intel_connector *connector = to_intel_connector(conn_state->connector); |
2054 |
++ struct intel_panel *panel = &connector->panel; |
2055 |
++ |
2056 |
++ panel->backlight.pwm_funcs->enable(crtc_state, conn_state, |
2057 |
++ intel_panel_invert_pwm_level(connector, level)); |
2058 |
++} |
2059 |
++ |
2060 |
++static void intel_pwm_disable_backlight(const struct drm_connector_state *conn_state, u32 level) |
2061 |
++{ |
2062 |
++ struct intel_connector *connector = to_intel_connector(conn_state->connector); |
2063 |
++ struct intel_panel *panel = &connector->panel; |
2064 |
++ |
2065 |
++ panel->backlight.pwm_funcs->disable(conn_state, |
2066 |
++ intel_panel_invert_pwm_level(connector, level)); |
2067 |
++} |
2068 |
++ |
2069 |
++static int intel_pwm_setup_backlight(struct intel_connector *connector, enum pipe pipe) |
2070 |
++{ |
2071 |
++ struct intel_panel *panel = &connector->panel; |
2072 |
++ int ret = panel->backlight.pwm_funcs->setup(connector, pipe); |
2073 |
++ |
2074 |
++ if (ret < 0) |
2075 |
++ return ret; |
2076 |
++ |
2077 |
++ panel->backlight.min = panel->backlight.pwm_level_min; |
2078 |
++ panel->backlight.max = panel->backlight.pwm_level_max; |
2079 |
++ panel->backlight.level = intel_pwm_get_backlight(connector, pipe); |
2080 |
++ panel->backlight.enabled = panel->backlight.pwm_enabled; |
2081 |
++ |
2082 |
++ return 0; |
2083 |
++} |
2084 |
++ |
2085 |
++void intel_panel_update_backlight(struct intel_atomic_state *state, |
2086 |
++ struct intel_encoder *encoder, |
2087 |
++ const struct intel_crtc_state *crtc_state, |
2088 |
++ const struct drm_connector_state *conn_state) |
2089 |
++{ |
2090 |
++ struct intel_connector *connector = to_intel_connector(conn_state->connector); |
2091 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
2092 |
++ struct intel_panel *panel = &connector->panel; |
2093 |
++ |
2094 |
++ if (!panel->backlight.present) |
2095 |
++ return; |
2096 |
++ |
2097 |
++ mutex_lock(&dev_priv->backlight_lock); |
2098 |
++ if (!panel->backlight.enabled) |
2099 |
++ __intel_panel_enable_backlight(crtc_state, conn_state); |
2100 |
++ |
2101 |
++ mutex_unlock(&dev_priv->backlight_lock); |
2102 |
++} |
2103 |
++ |
2104 |
++int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe) |
2105 |
++{ |
2106 |
++ struct drm_i915_private *dev_priv = to_i915(connector->dev); |
2107 |
++ struct intel_connector *intel_connector = to_intel_connector(connector); |
2108 |
++ struct intel_panel *panel = &intel_connector->panel; |
2109 |
++ int ret; |
2110 |
++ |
2111 |
++ if (!dev_priv->vbt.backlight.present) { |
2112 |
++ if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) { |
2113 |
++ drm_dbg_kms(&dev_priv->drm, |
2114 |
++ "no backlight present per VBT, but present per quirk\n"); |
2115 |
++ } else { |
2116 |
++ drm_dbg_kms(&dev_priv->drm, |
2117 |
++ "no backlight present per VBT\n"); |
2118 |
++ return 0; |
2119 |
++ } |
2120 |
++ } |
2121 |
++ |
2122 |
++ /* ensure intel_panel has been initialized first */ |
2123 |
++ if (drm_WARN_ON(&dev_priv->drm, !panel->backlight.funcs)) |
2124 |
++ return -ENODEV; |
2125 |
++ |
2126 |
++ /* set level and max in panel struct */ |
2127 |
++ mutex_lock(&dev_priv->backlight_lock); |
2128 |
++ ret = panel->backlight.funcs->setup(intel_connector, pipe); |
2129 |
++ mutex_unlock(&dev_priv->backlight_lock); |
2130 |
++ |
2131 |
++ if (ret) { |
2132 |
++ drm_dbg_kms(&dev_priv->drm, |
2133 |
++ "failed to setup backlight for connector %s\n", |
2134 |
++ connector->name); |
2135 |
++ return ret; |
2136 |
++ } |
2137 |
++ |
2138 |
++ panel->backlight.present = true; |
2139 |
++ |
2140 |
++ drm_dbg_kms(&dev_priv->drm, |
2141 |
++ "Connector %s backlight initialized, %s, brightness %u/%u\n", |
2142 |
++ connector->name, |
2143 |
++ enableddisabled(panel->backlight.enabled), |
2144 |
++ panel->backlight.level, panel->backlight.max); |
2145 |
++ |
2146 |
++ return 0; |
2147 |
++} |
2148 |
++ |
2149 |
++void intel_panel_destroy_backlight(struct intel_panel *panel) |
2150 |
++{ |
2151 |
++ /* dispose of the pwm */ |
2152 |
++ if (panel->backlight.pwm) |
2153 |
++ pwm_put(panel->backlight.pwm); |
2154 |
++ |
2155 |
++ panel->backlight.present = false; |
2156 |
++} |
2157 |
++ |
2158 |
++static const struct intel_panel_bl_funcs bxt_pwm_funcs = { |
2159 |
++ .setup = bxt_setup_backlight, |
2160 |
++ .enable = bxt_enable_backlight, |
2161 |
++ .disable = bxt_disable_backlight, |
2162 |
++ .set = bxt_set_backlight, |
2163 |
++ .get = bxt_get_backlight, |
2164 |
++ .hz_to_pwm = bxt_hz_to_pwm, |
2165 |
++}; |
2166 |
++ |
2167 |
++static const struct intel_panel_bl_funcs cnp_pwm_funcs = { |
2168 |
++ .setup = cnp_setup_backlight, |
2169 |
++ .enable = cnp_enable_backlight, |
2170 |
++ .disable = cnp_disable_backlight, |
2171 |
++ .set = bxt_set_backlight, |
2172 |
++ .get = bxt_get_backlight, |
2173 |
++ .hz_to_pwm = cnp_hz_to_pwm, |
2174 |
++}; |
2175 |
++ |
2176 |
++static const struct intel_panel_bl_funcs lpt_pwm_funcs = { |
2177 |
++ .setup = lpt_setup_backlight, |
2178 |
++ .enable = lpt_enable_backlight, |
2179 |
++ .disable = lpt_disable_backlight, |
2180 |
++ .set = lpt_set_backlight, |
2181 |
++ .get = lpt_get_backlight, |
2182 |
++ .hz_to_pwm = lpt_hz_to_pwm, |
2183 |
++}; |
2184 |
++ |
2185 |
++static const struct intel_panel_bl_funcs spt_pwm_funcs = { |
2186 |
++ .setup = lpt_setup_backlight, |
2187 |
++ .enable = lpt_enable_backlight, |
2188 |
++ .disable = lpt_disable_backlight, |
2189 |
++ .set = lpt_set_backlight, |
2190 |
++ .get = lpt_get_backlight, |
2191 |
++ .hz_to_pwm = spt_hz_to_pwm, |
2192 |
++}; |
2193 |
++ |
2194 |
++static const struct intel_panel_bl_funcs pch_pwm_funcs = { |
2195 |
++ .setup = pch_setup_backlight, |
2196 |
++ .enable = pch_enable_backlight, |
2197 |
++ .disable = pch_disable_backlight, |
2198 |
++ .set = pch_set_backlight, |
2199 |
++ .get = pch_get_backlight, |
2200 |
++ .hz_to_pwm = pch_hz_to_pwm, |
2201 |
++}; |
2202 |
++ |
2203 |
++static const struct intel_panel_bl_funcs ext_pwm_funcs = { |
2204 |
++ .setup = ext_pwm_setup_backlight, |
2205 |
++ .enable = ext_pwm_enable_backlight, |
2206 |
++ .disable = ext_pwm_disable_backlight, |
2207 |
++ .set = ext_pwm_set_backlight, |
2208 |
++ .get = ext_pwm_get_backlight, |
2209 |
++}; |
2210 |
++ |
2211 |
++static const struct intel_panel_bl_funcs vlv_pwm_funcs = { |
2212 |
++ .setup = vlv_setup_backlight, |
2213 |
++ .enable = vlv_enable_backlight, |
2214 |
++ .disable = vlv_disable_backlight, |
2215 |
++ .set = vlv_set_backlight, |
2216 |
++ .get = vlv_get_backlight, |
2217 |
++ .hz_to_pwm = vlv_hz_to_pwm, |
2218 |
++}; |
2219 |
++ |
2220 |
++static const struct intel_panel_bl_funcs i965_pwm_funcs = { |
2221 |
++ .setup = i965_setup_backlight, |
2222 |
++ .enable = i965_enable_backlight, |
2223 |
++ .disable = i965_disable_backlight, |
2224 |
++ .set = i9xx_set_backlight, |
2225 |
++ .get = i9xx_get_backlight, |
2226 |
++ .hz_to_pwm = i965_hz_to_pwm, |
2227 |
++}; |
2228 |
++ |
2229 |
++static const struct intel_panel_bl_funcs i9xx_pwm_funcs = { |
2230 |
++ .setup = i9xx_setup_backlight, |
2231 |
++ .enable = i9xx_enable_backlight, |
2232 |
++ .disable = i9xx_disable_backlight, |
2233 |
++ .set = i9xx_set_backlight, |
2234 |
++ .get = i9xx_get_backlight, |
2235 |
++ .hz_to_pwm = i9xx_hz_to_pwm, |
2236 |
++}; |
2237 |
++ |
2238 |
++static const struct intel_panel_bl_funcs pwm_bl_funcs = { |
2239 |
++ .setup = intel_pwm_setup_backlight, |
2240 |
++ .enable = intel_pwm_enable_backlight, |
2241 |
++ .disable = intel_pwm_disable_backlight, |
2242 |
++ .set = intel_pwm_set_backlight, |
2243 |
++ .get = intel_pwm_get_backlight, |
2244 |
++}; |
2245 |
++ |
2246 |
++/* Set up chip specific backlight functions */ |
2247 |
++void |
2248 |
++intel_panel_init_backlight_funcs(struct intel_panel *panel) |
2249 |
++{ |
2250 |
++ struct intel_connector *connector = |
2251 |
++ container_of(panel, struct intel_connector, panel); |
2252 |
++ struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
2253 |
++ |
2254 |
++ if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI && |
2255 |
++ intel_dsi_dcs_init_backlight_funcs(connector) == 0) |
2256 |
++ return; |
2257 |
++ |
2258 |
++ if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) { |
2259 |
++ panel->backlight.pwm_funcs = &bxt_pwm_funcs; |
2260 |
++ } else if (INTEL_PCH_TYPE(dev_priv) >= PCH_CNP) { |
2261 |
++ panel->backlight.pwm_funcs = &cnp_pwm_funcs; |
2262 |
++ } else if (INTEL_PCH_TYPE(dev_priv) >= PCH_LPT) { |
2263 |
++ if (HAS_PCH_LPT(dev_priv)) |
2264 |
++ panel->backlight.pwm_funcs = &lpt_pwm_funcs; |
2265 |
++ else |
2266 |
++ panel->backlight.pwm_funcs = &spt_pwm_funcs; |
2267 |
++ } else if (HAS_PCH_SPLIT(dev_priv)) { |
2268 |
++ panel->backlight.pwm_funcs = &pch_pwm_funcs; |
2269 |
++ } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { |
2270 |
++ if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) { |
2271 |
++ panel->backlight.pwm_funcs = &ext_pwm_funcs; |
2272 |
++ } else { |
2273 |
++ panel->backlight.pwm_funcs = &vlv_pwm_funcs; |
2274 |
++ } |
2275 |
++ } else if (DISPLAY_VER(dev_priv) == 4) { |
2276 |
++ panel->backlight.pwm_funcs = &i965_pwm_funcs; |
2277 |
++ } else { |
2278 |
++ panel->backlight.pwm_funcs = &i9xx_pwm_funcs; |
2279 |
++ } |
2280 |
++ |
2281 |
++ if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP && |
2282 |
++ intel_dp_aux_init_backlight_funcs(connector) == 0) |
2283 |
++ return; |
2284 |
++ |
2285 |
++ /* We're using a standard PWM backlight interface */ |
2286 |
++ panel->backlight.funcs = &pwm_bl_funcs; |
2287 |
++} |
2288 |
+diff --git a/drivers/gpu/drm/i915/display/intel_backlight.h b/drivers/gpu/drm/i915/display/intel_backlight.h |
2289 |
+new file mode 100644 |
2290 |
+index 0000000000000..282020cb47d5b |
2291 |
+--- /dev/null |
2292 |
++++ b/drivers/gpu/drm/i915/display/intel_backlight.h |
2293 |
+@@ -0,0 +1,51 @@ |
2294 |
++/* SPDX-License-Identifier: MIT */ |
2295 |
++/* |
2296 |
++ * Copyright © 2021 Intel Corporation |
2297 |
++ */ |
2298 |
++ |
2299 |
++#ifndef __INTEL_BACKLIGHT_H__ |
2300 |
++#define __INTEL_BACKLIGHT_H__ |
2301 |
++ |
2302 |
++#include <linux/types.h> |
2303 |
++ |
2304 |
++struct drm_connector; |
2305 |
++struct drm_connector_state; |
2306 |
++struct intel_atomic_state; |
2307 |
++struct intel_connector; |
2308 |
++struct intel_crtc_state; |
2309 |
++struct intel_encoder; |
2310 |
++struct intel_panel; |
2311 |
++enum pipe; |
2312 |
++ |
2313 |
++void intel_panel_init_backlight_funcs(struct intel_panel *panel); |
2314 |
++void intel_panel_destroy_backlight(struct intel_panel *panel); |
2315 |
++void intel_panel_set_backlight_acpi(const struct drm_connector_state *conn_state, |
2316 |
++ u32 level, u32 max); |
2317 |
++int intel_panel_setup_backlight(struct drm_connector *connector, |
2318 |
++ enum pipe pipe); |
2319 |
++void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state, |
2320 |
++ const struct drm_connector_state *conn_state); |
2321 |
++void intel_panel_update_backlight(struct intel_atomic_state *state, |
2322 |
++ struct intel_encoder *encoder, |
2323 |
++ const struct intel_crtc_state *crtc_state, |
2324 |
++ const struct drm_connector_state *conn_state); |
2325 |
++void intel_panel_disable_backlight(const struct drm_connector_state *old_conn_state); |
2326 |
++void intel_panel_set_pwm_level(const struct drm_connector_state *conn_state, u32 level); |
2327 |
++u32 intel_panel_invert_pwm_level(struct intel_connector *connector, u32 level); |
2328 |
++u32 intel_panel_backlight_level_to_pwm(struct intel_connector *connector, u32 level); |
2329 |
++u32 intel_panel_backlight_level_from_pwm(struct intel_connector *connector, u32 val); |
2330 |
++ |
2331 |
++#if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE) |
2332 |
++int intel_backlight_device_register(struct intel_connector *connector); |
2333 |
++void intel_backlight_device_unregister(struct intel_connector *connector); |
2334 |
++#else /* CONFIG_BACKLIGHT_CLASS_DEVICE */ |
2335 |
++static inline int intel_backlight_device_register(struct intel_connector *connector) |
2336 |
++{ |
2337 |
++ return 0; |
2338 |
++} |
2339 |
++static inline void intel_backlight_device_unregister(struct intel_connector *connector) |
2340 |
++{ |
2341 |
++} |
2342 |
++#endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */ |
2343 |
++ |
2344 |
++#endif /* __INTEL_BACKLIGHT_H__ */ |
2345 |
+diff --git a/drivers/gpu/drm/i915/display/intel_connector.c b/drivers/gpu/drm/i915/display/intel_connector.c |
2346 |
+index 9bed1ccecea0d..4f49d782eca23 100644 |
2347 |
+--- a/drivers/gpu/drm/i915/display/intel_connector.c |
2348 |
++++ b/drivers/gpu/drm/i915/display/intel_connector.c |
2349 |
+@@ -29,13 +29,13 @@ |
2350 |
+ #include <drm/drm_atomic_helper.h> |
2351 |
+ #include <drm/drm_edid.h> |
2352 |
+ |
2353 |
+-#include "display/intel_panel.h" |
2354 |
+- |
2355 |
+ #include "i915_drv.h" |
2356 |
++#include "intel_backlight.h" |
2357 |
+ #include "intel_connector.h" |
2358 |
+ #include "intel_display_debugfs.h" |
2359 |
+ #include "intel_display_types.h" |
2360 |
+ #include "intel_hdcp.h" |
2361 |
++#include "intel_panel.h" |
2362 |
+ |
2363 |
+ int intel_connector_init(struct intel_connector *connector) |
2364 |
+ { |
2365 |
+diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c |
2366 |
+index f61901e26409e..68489c7298302 100644 |
2367 |
+--- a/drivers/gpu/drm/i915/display/intel_ddi.c |
2368 |
++++ b/drivers/gpu/drm/i915/display/intel_ddi.c |
2369 |
+@@ -29,6 +29,7 @@ |
2370 |
+ |
2371 |
+ #include "i915_drv.h" |
2372 |
+ #include "intel_audio.h" |
2373 |
++#include "intel_backlight.h" |
2374 |
+ #include "intel_combo_phy.h" |
2375 |
+ #include "intel_connector.h" |
2376 |
+ #include "intel_crtc.h" |
2377 |
+@@ -49,7 +50,6 @@ |
2378 |
+ #include "intel_hdmi.h" |
2379 |
+ #include "intel_hotplug.h" |
2380 |
+ #include "intel_lspcon.h" |
2381 |
+-#include "intel_panel.h" |
2382 |
+ #include "intel_pps.h" |
2383 |
+ #include "intel_psr.h" |
2384 |
+ #include "intel_snps_phy.h" |
2385 |
+diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c |
2386 |
+index 631cf7d4323c8..f87e4d510ea5e 100644 |
2387 |
+--- a/drivers/gpu/drm/i915/display/intel_dp.c |
2388 |
++++ b/drivers/gpu/drm/i915/display/intel_dp.c |
2389 |
+@@ -45,6 +45,7 @@ |
2390 |
+ #include "i915_drv.h" |
2391 |
+ #include "intel_atomic.h" |
2392 |
+ #include "intel_audio.h" |
2393 |
++#include "intel_backlight.h" |
2394 |
+ #include "intel_connector.h" |
2395 |
+ #include "intel_ddi.h" |
2396 |
+ #include "intel_de.h" |
2397 |
+diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c |
2398 |
+index e7b90863aa43d..0a77f0e48aa11 100644 |
2399 |
+--- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c |
2400 |
++++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c |
2401 |
+@@ -34,10 +34,10 @@ |
2402 |
+ * for some reason. |
2403 |
+ */ |
2404 |
+ |
2405 |
++#include "intel_backlight.h" |
2406 |
+ #include "intel_display_types.h" |
2407 |
+ #include "intel_dp.h" |
2408 |
+ #include "intel_dp_aux_backlight.h" |
2409 |
+-#include "intel_panel.h" |
2410 |
+ |
2411 |
+ /* TODO: |
2412 |
+ * Implement HDR, right now we just implement the bare minimum to bring us back into SDR mode so we |
2413 |
+diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c |
2414 |
+index e0381b0fce914..8f5741ebd58dd 100644 |
2415 |
+--- a/drivers/gpu/drm/i915/display/intel_lvds.c |
2416 |
++++ b/drivers/gpu/drm/i915/display/intel_lvds.c |
2417 |
+@@ -40,6 +40,7 @@ |
2418 |
+ |
2419 |
+ #include "i915_drv.h" |
2420 |
+ #include "intel_atomic.h" |
2421 |
++#include "intel_backlight.h" |
2422 |
+ #include "intel_connector.h" |
2423 |
+ #include "intel_de.h" |
2424 |
+ #include "intel_display_types.h" |
2425 |
+diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c |
2426 |
+index f7f49b69830fa..aad5c1cd3898e 100644 |
2427 |
+--- a/drivers/gpu/drm/i915/display/intel_opregion.c |
2428 |
++++ b/drivers/gpu/drm/i915/display/intel_opregion.c |
2429 |
+@@ -30,10 +30,9 @@ |
2430 |
+ #include <linux/firmware.h> |
2431 |
+ #include <acpi/video.h> |
2432 |
+ |
2433 |
+-#include "display/intel_panel.h" |
2434 |
+- |
2435 |
+ #include "i915_drv.h" |
2436 |
+ #include "intel_acpi.h" |
2437 |
++#include "intel_backlight.h" |
2438 |
+ #include "intel_display_types.h" |
2439 |
+ #include "intel_opregion.h" |
2440 |
+ |
2441 |
+diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c |
2442 |
+index 7d7a60b4d2de7..ad54767440c15 100644 |
2443 |
+--- a/drivers/gpu/drm/i915/display/intel_panel.c |
2444 |
++++ b/drivers/gpu/drm/i915/display/intel_panel.c |
2445 |
+@@ -28,17 +28,13 @@ |
2446 |
+ * Chris Wilson <chris@×××××××××××××××.uk> |
2447 |
+ */ |
2448 |
+ |
2449 |
+-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
2450 |
+- |
2451 |
+ #include <linux/kernel.h> |
2452 |
+-#include <linux/moduleparam.h> |
2453 |
+ #include <linux/pwm.h> |
2454 |
+ |
2455 |
++#include "intel_backlight.h" |
2456 |
+ #include "intel_connector.h" |
2457 |
+ #include "intel_de.h" |
2458 |
+ #include "intel_display_types.h" |
2459 |
+-#include "intel_dp_aux_backlight.h" |
2460 |
+-#include "intel_dsi_dcs_backlight.h" |
2461 |
+ #include "intel_panel.h" |
2462 |
+ |
2463 |
+ void |
2464 |
+@@ -456,1767 +452,6 @@ out: |
2465 |
+ return 0; |
2466 |
+ } |
2467 |
+ |
2468 |
+-/** |
2469 |
+- * scale - scale values from one range to another |
2470 |
+- * @source_val: value in range [@source_min..@source_max] |
2471 |
+- * @source_min: minimum legal value for @source_val |
2472 |
+- * @source_max: maximum legal value for @source_val |
2473 |
+- * @target_min: corresponding target value for @source_min |
2474 |
+- * @target_max: corresponding target value for @source_max |
2475 |
+- * |
2476 |
+- * Return @source_val in range [@source_min..@source_max] scaled to range |
2477 |
+- * [@target_min..@target_max]. |
2478 |
+- */ |
2479 |
+-static u32 scale(u32 source_val, |
2480 |
+- u32 source_min, u32 source_max, |
2481 |
+- u32 target_min, u32 target_max) |
2482 |
+-{ |
2483 |
+- u64 target_val; |
2484 |
+- |
2485 |
+- WARN_ON(source_min > source_max); |
2486 |
+- WARN_ON(target_min > target_max); |
2487 |
+- |
2488 |
+- /* defensive */ |
2489 |
+- source_val = clamp(source_val, source_min, source_max); |
2490 |
+- |
2491 |
+- /* avoid overflows */ |
2492 |
+- target_val = mul_u32_u32(source_val - source_min, |
2493 |
+- target_max - target_min); |
2494 |
+- target_val = DIV_ROUND_CLOSEST_ULL(target_val, source_max - source_min); |
2495 |
+- target_val += target_min; |
2496 |
+- |
2497 |
+- return target_val; |
2498 |
+-} |
2499 |
+- |
2500 |
+-/* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result |
2501 |
+- * to [hw_min..hw_max]. */ |
2502 |
+-static u32 clamp_user_to_hw(struct intel_connector *connector, |
2503 |
+- u32 user_level, u32 user_max) |
2504 |
+-{ |
2505 |
+- struct intel_panel *panel = &connector->panel; |
2506 |
+- u32 hw_level; |
2507 |
+- |
2508 |
+- hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max); |
2509 |
+- hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max); |
2510 |
+- |
2511 |
+- return hw_level; |
2512 |
+-} |
2513 |
+- |
2514 |
+-/* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */ |
2515 |
+-static u32 scale_hw_to_user(struct intel_connector *connector, |
2516 |
+- u32 hw_level, u32 user_max) |
2517 |
+-{ |
2518 |
+- struct intel_panel *panel = &connector->panel; |
2519 |
+- |
2520 |
+- return scale(hw_level, panel->backlight.min, panel->backlight.max, |
2521 |
+- 0, user_max); |
2522 |
+-} |
2523 |
+- |
2524 |
+-u32 intel_panel_invert_pwm_level(struct intel_connector *connector, u32 val) |
2525 |
+-{ |
2526 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
2527 |
+- struct intel_panel *panel = &connector->panel; |
2528 |
+- |
2529 |
+- drm_WARN_ON(&dev_priv->drm, panel->backlight.pwm_level_max == 0); |
2530 |
+- |
2531 |
+- if (dev_priv->params.invert_brightness < 0) |
2532 |
+- return val; |
2533 |
+- |
2534 |
+- if (dev_priv->params.invert_brightness > 0 || |
2535 |
+- dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) { |
2536 |
+- return panel->backlight.pwm_level_max - val + panel->backlight.pwm_level_min; |
2537 |
+- } |
2538 |
+- |
2539 |
+- return val; |
2540 |
+-} |
2541 |
+- |
2542 |
+-void intel_panel_set_pwm_level(const struct drm_connector_state *conn_state, u32 val) |
2543 |
+-{ |
2544 |
+- struct intel_connector *connector = to_intel_connector(conn_state->connector); |
2545 |
+- struct drm_i915_private *i915 = to_i915(connector->base.dev); |
2546 |
+- struct intel_panel *panel = &connector->panel; |
2547 |
+- |
2548 |
+- drm_dbg_kms(&i915->drm, "set backlight PWM = %d\n", val); |
2549 |
+- panel->backlight.pwm_funcs->set(conn_state, val); |
2550 |
+-} |
2551 |
+- |
2552 |
+-u32 intel_panel_backlight_level_to_pwm(struct intel_connector *connector, u32 val) |
2553 |
+-{ |
2554 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
2555 |
+- struct intel_panel *panel = &connector->panel; |
2556 |
+- |
2557 |
+- drm_WARN_ON_ONCE(&dev_priv->drm, |
2558 |
+- panel->backlight.max == 0 || panel->backlight.pwm_level_max == 0); |
2559 |
+- |
2560 |
+- val = scale(val, panel->backlight.min, panel->backlight.max, |
2561 |
+- panel->backlight.pwm_level_min, panel->backlight.pwm_level_max); |
2562 |
+- |
2563 |
+- return intel_panel_invert_pwm_level(connector, val); |
2564 |
+-} |
2565 |
+- |
2566 |
+-u32 intel_panel_backlight_level_from_pwm(struct intel_connector *connector, u32 val) |
2567 |
+-{ |
2568 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
2569 |
+- struct intel_panel *panel = &connector->panel; |
2570 |
+- |
2571 |
+- drm_WARN_ON_ONCE(&dev_priv->drm, |
2572 |
+- panel->backlight.max == 0 || panel->backlight.pwm_level_max == 0); |
2573 |
+- |
2574 |
+- if (dev_priv->params.invert_brightness > 0 || |
2575 |
+- (dev_priv->params.invert_brightness == 0 && dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS)) |
2576 |
+- val = panel->backlight.pwm_level_max - (val - panel->backlight.pwm_level_min); |
2577 |
+- |
2578 |
+- return scale(val, panel->backlight.pwm_level_min, panel->backlight.pwm_level_max, |
2579 |
+- panel->backlight.min, panel->backlight.max); |
2580 |
+-} |
2581 |
+- |
2582 |
+-static u32 lpt_get_backlight(struct intel_connector *connector, enum pipe unused) |
2583 |
+-{ |
2584 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
2585 |
+- |
2586 |
+- return intel_de_read(dev_priv, BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK; |
2587 |
+-} |
2588 |
+- |
2589 |
+-static u32 pch_get_backlight(struct intel_connector *connector, enum pipe unused) |
2590 |
+-{ |
2591 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
2592 |
+- |
2593 |
+- return intel_de_read(dev_priv, BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; |
2594 |
+-} |
2595 |
+- |
2596 |
+-static u32 i9xx_get_backlight(struct intel_connector *connector, enum pipe unused) |
2597 |
+-{ |
2598 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
2599 |
+- struct intel_panel *panel = &connector->panel; |
2600 |
+- u32 val; |
2601 |
+- |
2602 |
+- val = intel_de_read(dev_priv, BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; |
2603 |
+- if (DISPLAY_VER(dev_priv) < 4) |
2604 |
+- val >>= 1; |
2605 |
+- |
2606 |
+- if (panel->backlight.combination_mode) { |
2607 |
+- u8 lbpc; |
2608 |
+- |
2609 |
+- pci_read_config_byte(to_pci_dev(dev_priv->drm.dev), LBPC, &lbpc); |
2610 |
+- val *= lbpc; |
2611 |
+- } |
2612 |
+- |
2613 |
+- return val; |
2614 |
+-} |
2615 |
+- |
2616 |
+-static u32 vlv_get_backlight(struct intel_connector *connector, enum pipe pipe) |
2617 |
+-{ |
2618 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
2619 |
+- |
2620 |
+- if (drm_WARN_ON(&dev_priv->drm, pipe != PIPE_A && pipe != PIPE_B)) |
2621 |
+- return 0; |
2622 |
+- |
2623 |
+- return intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK; |
2624 |
+-} |
2625 |
+- |
2626 |
+-static u32 bxt_get_backlight(struct intel_connector *connector, enum pipe unused) |
2627 |
+-{ |
2628 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
2629 |
+- struct intel_panel *panel = &connector->panel; |
2630 |
+- |
2631 |
+- return intel_de_read(dev_priv, |
2632 |
+- BXT_BLC_PWM_DUTY(panel->backlight.controller)); |
2633 |
+-} |
2634 |
+- |
2635 |
+-static u32 ext_pwm_get_backlight(struct intel_connector *connector, enum pipe unused) |
2636 |
+-{ |
2637 |
+- struct intel_panel *panel = &connector->panel; |
2638 |
+- struct pwm_state state; |
2639 |
+- |
2640 |
+- pwm_get_state(panel->backlight.pwm, &state); |
2641 |
+- return pwm_get_relative_duty_cycle(&state, 100); |
2642 |
+-} |
2643 |
+- |
2644 |
+-static void lpt_set_backlight(const struct drm_connector_state *conn_state, u32 level) |
2645 |
+-{ |
2646 |
+- struct intel_connector *connector = to_intel_connector(conn_state->connector); |
2647 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
2648 |
+- |
2649 |
+- u32 val = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK; |
2650 |
+- intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, val | level); |
2651 |
+-} |
2652 |
+- |
2653 |
+-static void pch_set_backlight(const struct drm_connector_state *conn_state, u32 level) |
2654 |
+-{ |
2655 |
+- struct intel_connector *connector = to_intel_connector(conn_state->connector); |
2656 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
2657 |
+- u32 tmp; |
2658 |
+- |
2659 |
+- tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; |
2660 |
+- intel_de_write(dev_priv, BLC_PWM_CPU_CTL, tmp | level); |
2661 |
+-} |
2662 |
+- |
2663 |
+-static void i9xx_set_backlight(const struct drm_connector_state *conn_state, u32 level) |
2664 |
+-{ |
2665 |
+- struct intel_connector *connector = to_intel_connector(conn_state->connector); |
2666 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
2667 |
+- struct intel_panel *panel = &connector->panel; |
2668 |
+- u32 tmp, mask; |
2669 |
+- |
2670 |
+- drm_WARN_ON(&dev_priv->drm, panel->backlight.pwm_level_max == 0); |
2671 |
+- |
2672 |
+- if (panel->backlight.combination_mode) { |
2673 |
+- u8 lbpc; |
2674 |
+- |
2675 |
+- lbpc = level * 0xfe / panel->backlight.pwm_level_max + 1; |
2676 |
+- level /= lbpc; |
2677 |
+- pci_write_config_byte(to_pci_dev(dev_priv->drm.dev), LBPC, lbpc); |
2678 |
+- } |
2679 |
+- |
2680 |
+- if (DISPLAY_VER(dev_priv) == 4) { |
2681 |
+- mask = BACKLIGHT_DUTY_CYCLE_MASK; |
2682 |
+- } else { |
2683 |
+- level <<= 1; |
2684 |
+- mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV; |
2685 |
+- } |
2686 |
+- |
2687 |
+- tmp = intel_de_read(dev_priv, BLC_PWM_CTL) & ~mask; |
2688 |
+- intel_de_write(dev_priv, BLC_PWM_CTL, tmp | level); |
2689 |
+-} |
2690 |
+- |
2691 |
+-static void vlv_set_backlight(const struct drm_connector_state *conn_state, u32 level) |
2692 |
+-{ |
2693 |
+- struct intel_connector *connector = to_intel_connector(conn_state->connector); |
2694 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
2695 |
+- enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe; |
2696 |
+- u32 tmp; |
2697 |
+- |
2698 |
+- tmp = intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK; |
2699 |
+- intel_de_write(dev_priv, VLV_BLC_PWM_CTL(pipe), tmp | level); |
2700 |
+-} |
2701 |
+- |
2702 |
+-static void bxt_set_backlight(const struct drm_connector_state *conn_state, u32 level) |
2703 |
+-{ |
2704 |
+- struct intel_connector *connector = to_intel_connector(conn_state->connector); |
2705 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
2706 |
+- struct intel_panel *panel = &connector->panel; |
2707 |
+- |
2708 |
+- intel_de_write(dev_priv, |
2709 |
+- BXT_BLC_PWM_DUTY(panel->backlight.controller), level); |
2710 |
+-} |
2711 |
+- |
2712 |
+-static void ext_pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level) |
2713 |
+-{ |
2714 |
+- struct intel_panel *panel = &to_intel_connector(conn_state->connector)->panel; |
2715 |
+- |
2716 |
+- pwm_set_relative_duty_cycle(&panel->backlight.pwm_state, level, 100); |
2717 |
+- pwm_apply_state(panel->backlight.pwm, &panel->backlight.pwm_state); |
2718 |
+-} |
2719 |
+- |
2720 |
+-static void |
2721 |
+-intel_panel_actually_set_backlight(const struct drm_connector_state *conn_state, u32 level) |
2722 |
+-{ |
2723 |
+- struct intel_connector *connector = to_intel_connector(conn_state->connector); |
2724 |
+- struct drm_i915_private *i915 = to_i915(connector->base.dev); |
2725 |
+- struct intel_panel *panel = &connector->panel; |
2726 |
+- |
2727 |
+- drm_dbg_kms(&i915->drm, "set backlight level = %d\n", level); |
2728 |
+- |
2729 |
+- panel->backlight.funcs->set(conn_state, level); |
2730 |
+-} |
2731 |
+- |
2732 |
+-/* set backlight brightness to level in range [0..max], assuming hw min is |
2733 |
+- * respected. |
2734 |
+- */ |
2735 |
+-void intel_panel_set_backlight_acpi(const struct drm_connector_state *conn_state, |
2736 |
+- u32 user_level, u32 user_max) |
2737 |
+-{ |
2738 |
+- struct intel_connector *connector = to_intel_connector(conn_state->connector); |
2739 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
2740 |
+- struct intel_panel *panel = &connector->panel; |
2741 |
+- u32 hw_level; |
2742 |
+- |
2743 |
+- /* |
2744 |
+- * Lack of crtc may occur during driver init because |
2745 |
+- * connection_mutex isn't held across the entire backlight |
2746 |
+- * setup + modeset readout, and the BIOS can issue the |
2747 |
+- * requests at any time. |
2748 |
+- */ |
2749 |
+- if (!panel->backlight.present || !conn_state->crtc) |
2750 |
+- return; |
2751 |
+- |
2752 |
+- mutex_lock(&dev_priv->backlight_lock); |
2753 |
+- |
2754 |
+- drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0); |
2755 |
+- |
2756 |
+- hw_level = clamp_user_to_hw(connector, user_level, user_max); |
2757 |
+- panel->backlight.level = hw_level; |
2758 |
+- |
2759 |
+- if (panel->backlight.device) |
2760 |
+- panel->backlight.device->props.brightness = |
2761 |
+- scale_hw_to_user(connector, |
2762 |
+- panel->backlight.level, |
2763 |
+- panel->backlight.device->props.max_brightness); |
2764 |
+- |
2765 |
+- if (panel->backlight.enabled) |
2766 |
+- intel_panel_actually_set_backlight(conn_state, hw_level); |
2767 |
+- |
2768 |
+- mutex_unlock(&dev_priv->backlight_lock); |
2769 |
+-} |
2770 |
+- |
2771 |
+-static void lpt_disable_backlight(const struct drm_connector_state *old_conn_state, u32 level) |
2772 |
+-{ |
2773 |
+- struct intel_connector *connector = to_intel_connector(old_conn_state->connector); |
2774 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
2775 |
+- u32 tmp; |
2776 |
+- |
2777 |
+- intel_panel_set_pwm_level(old_conn_state, level); |
2778 |
+- |
2779 |
+- /* |
2780 |
+- * Although we don't support or enable CPU PWM with LPT/SPT based |
2781 |
+- * systems, it may have been enabled prior to loading the |
2782 |
+- * driver. Disable to avoid warnings on LCPLL disable. |
2783 |
+- * |
2784 |
+- * This needs rework if we need to add support for CPU PWM on PCH split |
2785 |
+- * platforms. |
2786 |
+- */ |
2787 |
+- tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); |
2788 |
+- if (tmp & BLM_PWM_ENABLE) { |
2789 |
+- drm_dbg_kms(&dev_priv->drm, |
2790 |
+- "cpu backlight was enabled, disabling\n"); |
2791 |
+- intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, |
2792 |
+- tmp & ~BLM_PWM_ENABLE); |
2793 |
+- } |
2794 |
+- |
2795 |
+- tmp = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); |
2796 |
+- intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE); |
2797 |
+-} |
2798 |
+- |
2799 |
+-static void pch_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) |
2800 |
+-{ |
2801 |
+- struct intel_connector *connector = to_intel_connector(old_conn_state->connector); |
2802 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
2803 |
+- u32 tmp; |
2804 |
+- |
2805 |
+- intel_panel_set_pwm_level(old_conn_state, val); |
2806 |
+- |
2807 |
+- tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); |
2808 |
+- intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE); |
2809 |
+- |
2810 |
+- tmp = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); |
2811 |
+- intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE); |
2812 |
+-} |
2813 |
+- |
2814 |
+-static void i9xx_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) |
2815 |
+-{ |
2816 |
+- intel_panel_set_pwm_level(old_conn_state, val); |
2817 |
+-} |
2818 |
+- |
2819 |
+-static void i965_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) |
2820 |
+-{ |
2821 |
+- struct drm_i915_private *dev_priv = to_i915(old_conn_state->connector->dev); |
2822 |
+- u32 tmp; |
2823 |
+- |
2824 |
+- intel_panel_set_pwm_level(old_conn_state, val); |
2825 |
+- |
2826 |
+- tmp = intel_de_read(dev_priv, BLC_PWM_CTL2); |
2827 |
+- intel_de_write(dev_priv, BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE); |
2828 |
+-} |
2829 |
+- |
2830 |
+-static void vlv_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) |
2831 |
+-{ |
2832 |
+- struct intel_connector *connector = to_intel_connector(old_conn_state->connector); |
2833 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
2834 |
+- enum pipe pipe = to_intel_crtc(old_conn_state->crtc)->pipe; |
2835 |
+- u32 tmp; |
2836 |
+- |
2837 |
+- intel_panel_set_pwm_level(old_conn_state, val); |
2838 |
+- |
2839 |
+- tmp = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe)); |
2840 |
+- intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), |
2841 |
+- tmp & ~BLM_PWM_ENABLE); |
2842 |
+-} |
2843 |
+- |
2844 |
+-static void bxt_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) |
2845 |
+-{ |
2846 |
+- struct intel_connector *connector = to_intel_connector(old_conn_state->connector); |
2847 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
2848 |
+- struct intel_panel *panel = &connector->panel; |
2849 |
+- u32 tmp; |
2850 |
+- |
2851 |
+- intel_panel_set_pwm_level(old_conn_state, val); |
2852 |
+- |
2853 |
+- tmp = intel_de_read(dev_priv, |
2854 |
+- BXT_BLC_PWM_CTL(panel->backlight.controller)); |
2855 |
+- intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), |
2856 |
+- tmp & ~BXT_BLC_PWM_ENABLE); |
2857 |
+- |
2858 |
+- if (panel->backlight.controller == 1) { |
2859 |
+- val = intel_de_read(dev_priv, UTIL_PIN_CTL); |
2860 |
+- val &= ~UTIL_PIN_ENABLE; |
2861 |
+- intel_de_write(dev_priv, UTIL_PIN_CTL, val); |
2862 |
+- } |
2863 |
+-} |
2864 |
+- |
2865 |
+-static void cnp_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) |
2866 |
+-{ |
2867 |
+- struct intel_connector *connector = to_intel_connector(old_conn_state->connector); |
2868 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
2869 |
+- struct intel_panel *panel = &connector->panel; |
2870 |
+- u32 tmp; |
2871 |
+- |
2872 |
+- intel_panel_set_pwm_level(old_conn_state, val); |
2873 |
+- |
2874 |
+- tmp = intel_de_read(dev_priv, |
2875 |
+- BXT_BLC_PWM_CTL(panel->backlight.controller)); |
2876 |
+- intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), |
2877 |
+- tmp & ~BXT_BLC_PWM_ENABLE); |
2878 |
+-} |
2879 |
+- |
2880 |
+-static void ext_pwm_disable_backlight(const struct drm_connector_state *old_conn_state, u32 level) |
2881 |
+-{ |
2882 |
+- struct intel_connector *connector = to_intel_connector(old_conn_state->connector); |
2883 |
+- struct intel_panel *panel = &connector->panel; |
2884 |
+- |
2885 |
+- panel->backlight.pwm_state.enabled = false; |
2886 |
+- pwm_apply_state(panel->backlight.pwm, &panel->backlight.pwm_state); |
2887 |
+-} |
2888 |
+- |
2889 |
+-void intel_panel_disable_backlight(const struct drm_connector_state *old_conn_state) |
2890 |
+-{ |
2891 |
+- struct intel_connector *connector = to_intel_connector(old_conn_state->connector); |
2892 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
2893 |
+- struct intel_panel *panel = &connector->panel; |
2894 |
+- |
2895 |
+- if (!panel->backlight.present) |
2896 |
+- return; |
2897 |
+- |
2898 |
+- /* |
2899 |
+- * Do not disable backlight on the vga_switcheroo path. When switching |
2900 |
+- * away from i915, the other client may depend on i915 to handle the |
2901 |
+- * backlight. This will leave the backlight on unnecessarily when |
2902 |
+- * another client is not activated. |
2903 |
+- */ |
2904 |
+- if (dev_priv->drm.switch_power_state == DRM_SWITCH_POWER_CHANGING) { |
2905 |
+- drm_dbg_kms(&dev_priv->drm, |
2906 |
+- "Skipping backlight disable on vga switch\n"); |
2907 |
+- return; |
2908 |
+- } |
2909 |
+- |
2910 |
+- mutex_lock(&dev_priv->backlight_lock); |
2911 |
+- |
2912 |
+- if (panel->backlight.device) |
2913 |
+- panel->backlight.device->props.power = FB_BLANK_POWERDOWN; |
2914 |
+- panel->backlight.enabled = false; |
2915 |
+- panel->backlight.funcs->disable(old_conn_state, 0); |
2916 |
+- |
2917 |
+- mutex_unlock(&dev_priv->backlight_lock); |
2918 |
+-} |
2919 |
+- |
2920 |
+-static void lpt_enable_backlight(const struct intel_crtc_state *crtc_state, |
2921 |
+- const struct drm_connector_state *conn_state, u32 level) |
2922 |
+-{ |
2923 |
+- struct intel_connector *connector = to_intel_connector(conn_state->connector); |
2924 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
2925 |
+- struct intel_panel *panel = &connector->panel; |
2926 |
+- u32 pch_ctl1, pch_ctl2, schicken; |
2927 |
+- |
2928 |
+- pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); |
2929 |
+- if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { |
2930 |
+- drm_dbg_kms(&dev_priv->drm, "pch backlight already enabled\n"); |
2931 |
+- pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; |
2932 |
+- intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1); |
2933 |
+- } |
2934 |
+- |
2935 |
+- if (HAS_PCH_LPT(dev_priv)) { |
2936 |
+- schicken = intel_de_read(dev_priv, SOUTH_CHICKEN2); |
2937 |
+- if (panel->backlight.alternate_pwm_increment) |
2938 |
+- schicken |= LPT_PWM_GRANULARITY; |
2939 |
+- else |
2940 |
+- schicken &= ~LPT_PWM_GRANULARITY; |
2941 |
+- intel_de_write(dev_priv, SOUTH_CHICKEN2, schicken); |
2942 |
+- } else { |
2943 |
+- schicken = intel_de_read(dev_priv, SOUTH_CHICKEN1); |
2944 |
+- if (panel->backlight.alternate_pwm_increment) |
2945 |
+- schicken |= SPT_PWM_GRANULARITY; |
2946 |
+- else |
2947 |
+- schicken &= ~SPT_PWM_GRANULARITY; |
2948 |
+- intel_de_write(dev_priv, SOUTH_CHICKEN1, schicken); |
2949 |
+- } |
2950 |
+- |
2951 |
+- pch_ctl2 = panel->backlight.pwm_level_max << 16; |
2952 |
+- intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, pch_ctl2); |
2953 |
+- |
2954 |
+- pch_ctl1 = 0; |
2955 |
+- if (panel->backlight.active_low_pwm) |
2956 |
+- pch_ctl1 |= BLM_PCH_POLARITY; |
2957 |
+- |
2958 |
+- /* After LPT, override is the default. */ |
2959 |
+- if (HAS_PCH_LPT(dev_priv)) |
2960 |
+- pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE; |
2961 |
+- |
2962 |
+- intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1); |
2963 |
+- intel_de_posting_read(dev_priv, BLC_PWM_PCH_CTL1); |
2964 |
+- intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, |
2965 |
+- pch_ctl1 | BLM_PCH_PWM_ENABLE); |
2966 |
+- |
2967 |
+- /* This won't stick until the above enable. */ |
2968 |
+- intel_panel_set_pwm_level(conn_state, level); |
2969 |
+-} |
2970 |
+- |
2971 |
+-static void pch_enable_backlight(const struct intel_crtc_state *crtc_state, |
2972 |
+- const struct drm_connector_state *conn_state, u32 level) |
2973 |
+-{ |
2974 |
+- struct intel_connector *connector = to_intel_connector(conn_state->connector); |
2975 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
2976 |
+- struct intel_panel *panel = &connector->panel; |
2977 |
+- enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; |
2978 |
+- u32 cpu_ctl2, pch_ctl1, pch_ctl2; |
2979 |
+- |
2980 |
+- cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); |
2981 |
+- if (cpu_ctl2 & BLM_PWM_ENABLE) { |
2982 |
+- drm_dbg_kms(&dev_priv->drm, "cpu backlight already enabled\n"); |
2983 |
+- cpu_ctl2 &= ~BLM_PWM_ENABLE; |
2984 |
+- intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2); |
2985 |
+- } |
2986 |
+- |
2987 |
+- pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); |
2988 |
+- if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { |
2989 |
+- drm_dbg_kms(&dev_priv->drm, "pch backlight already enabled\n"); |
2990 |
+- pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; |
2991 |
+- intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1); |
2992 |
+- } |
2993 |
+- |
2994 |
+- if (cpu_transcoder == TRANSCODER_EDP) |
2995 |
+- cpu_ctl2 = BLM_TRANSCODER_EDP; |
2996 |
+- else |
2997 |
+- cpu_ctl2 = BLM_PIPE(cpu_transcoder); |
2998 |
+- intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2); |
2999 |
+- intel_de_posting_read(dev_priv, BLC_PWM_CPU_CTL2); |
3000 |
+- intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE); |
3001 |
+- |
3002 |
+- /* This won't stick until the above enable. */ |
3003 |
+- intel_panel_set_pwm_level(conn_state, level); |
3004 |
+- |
3005 |
+- pch_ctl2 = panel->backlight.pwm_level_max << 16; |
3006 |
+- intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, pch_ctl2); |
3007 |
+- |
3008 |
+- pch_ctl1 = 0; |
3009 |
+- if (panel->backlight.active_low_pwm) |
3010 |
+- pch_ctl1 |= BLM_PCH_POLARITY; |
3011 |
+- |
3012 |
+- intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1); |
3013 |
+- intel_de_posting_read(dev_priv, BLC_PWM_PCH_CTL1); |
3014 |
+- intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, |
3015 |
+- pch_ctl1 | BLM_PCH_PWM_ENABLE); |
3016 |
+-} |
3017 |
+- |
3018 |
+-static void i9xx_enable_backlight(const struct intel_crtc_state *crtc_state, |
3019 |
+- const struct drm_connector_state *conn_state, u32 level) |
3020 |
+-{ |
3021 |
+- struct intel_connector *connector = to_intel_connector(conn_state->connector); |
3022 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
3023 |
+- struct intel_panel *panel = &connector->panel; |
3024 |
+- u32 ctl, freq; |
3025 |
+- |
3026 |
+- ctl = intel_de_read(dev_priv, BLC_PWM_CTL); |
3027 |
+- if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) { |
3028 |
+- drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); |
3029 |
+- intel_de_write(dev_priv, BLC_PWM_CTL, 0); |
3030 |
+- } |
3031 |
+- |
3032 |
+- freq = panel->backlight.pwm_level_max; |
3033 |
+- if (panel->backlight.combination_mode) |
3034 |
+- freq /= 0xff; |
3035 |
+- |
3036 |
+- ctl = freq << 17; |
3037 |
+- if (panel->backlight.combination_mode) |
3038 |
+- ctl |= BLM_LEGACY_MODE; |
3039 |
+- if (IS_PINEVIEW(dev_priv) && panel->backlight.active_low_pwm) |
3040 |
+- ctl |= BLM_POLARITY_PNV; |
3041 |
+- |
3042 |
+- intel_de_write(dev_priv, BLC_PWM_CTL, ctl); |
3043 |
+- intel_de_posting_read(dev_priv, BLC_PWM_CTL); |
3044 |
+- |
3045 |
+- /* XXX: combine this into above write? */ |
3046 |
+- intel_panel_set_pwm_level(conn_state, level); |
3047 |
+- |
3048 |
+- /* |
3049 |
+- * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is |
3050 |
+- * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2 |
3051 |
+- * that has backlight. |
3052 |
+- */ |
3053 |
+- if (DISPLAY_VER(dev_priv) == 2) |
3054 |
+- intel_de_write(dev_priv, BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE); |
3055 |
+-} |
3056 |
+- |
3057 |
+-static void i965_enable_backlight(const struct intel_crtc_state *crtc_state, |
3058 |
+- const struct drm_connector_state *conn_state, u32 level) |
3059 |
+-{ |
3060 |
+- struct intel_connector *connector = to_intel_connector(conn_state->connector); |
3061 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
3062 |
+- struct intel_panel *panel = &connector->panel; |
3063 |
+- enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe; |
3064 |
+- u32 ctl, ctl2, freq; |
3065 |
+- |
3066 |
+- ctl2 = intel_de_read(dev_priv, BLC_PWM_CTL2); |
3067 |
+- if (ctl2 & BLM_PWM_ENABLE) { |
3068 |
+- drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); |
3069 |
+- ctl2 &= ~BLM_PWM_ENABLE; |
3070 |
+- intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2); |
3071 |
+- } |
3072 |
+- |
3073 |
+- freq = panel->backlight.pwm_level_max; |
3074 |
+- if (panel->backlight.combination_mode) |
3075 |
+- freq /= 0xff; |
3076 |
+- |
3077 |
+- ctl = freq << 16; |
3078 |
+- intel_de_write(dev_priv, BLC_PWM_CTL, ctl); |
3079 |
+- |
3080 |
+- ctl2 = BLM_PIPE(pipe); |
3081 |
+- if (panel->backlight.combination_mode) |
3082 |
+- ctl2 |= BLM_COMBINATION_MODE; |
3083 |
+- if (panel->backlight.active_low_pwm) |
3084 |
+- ctl2 |= BLM_POLARITY_I965; |
3085 |
+- intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2); |
3086 |
+- intel_de_posting_read(dev_priv, BLC_PWM_CTL2); |
3087 |
+- intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE); |
3088 |
+- |
3089 |
+- intel_panel_set_pwm_level(conn_state, level); |
3090 |
+-} |
3091 |
+- |
3092 |
+-static void vlv_enable_backlight(const struct intel_crtc_state *crtc_state, |
3093 |
+- const struct drm_connector_state *conn_state, u32 level) |
3094 |
+-{ |
3095 |
+- struct intel_connector *connector = to_intel_connector(conn_state->connector); |
3096 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
3097 |
+- struct intel_panel *panel = &connector->panel; |
3098 |
+- enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; |
3099 |
+- u32 ctl, ctl2; |
3100 |
+- |
3101 |
+- ctl2 = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe)); |
3102 |
+- if (ctl2 & BLM_PWM_ENABLE) { |
3103 |
+- drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); |
3104 |
+- ctl2 &= ~BLM_PWM_ENABLE; |
3105 |
+- intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), ctl2); |
3106 |
+- } |
3107 |
+- |
3108 |
+- ctl = panel->backlight.pwm_level_max << 16; |
3109 |
+- intel_de_write(dev_priv, VLV_BLC_PWM_CTL(pipe), ctl); |
3110 |
+- |
3111 |
+- /* XXX: combine this into above write? */ |
3112 |
+- intel_panel_set_pwm_level(conn_state, level); |
3113 |
+- |
3114 |
+- ctl2 = 0; |
3115 |
+- if (panel->backlight.active_low_pwm) |
3116 |
+- ctl2 |= BLM_POLARITY_I965; |
3117 |
+- intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), ctl2); |
3118 |
+- intel_de_posting_read(dev_priv, VLV_BLC_PWM_CTL2(pipe)); |
3119 |
+- intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), |
3120 |
+- ctl2 | BLM_PWM_ENABLE); |
3121 |
+-} |
3122 |
+- |
3123 |
+-static void bxt_enable_backlight(const struct intel_crtc_state *crtc_state, |
3124 |
+- const struct drm_connector_state *conn_state, u32 level) |
3125 |
+-{ |
3126 |
+- struct intel_connector *connector = to_intel_connector(conn_state->connector); |
3127 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
3128 |
+- struct intel_panel *panel = &connector->panel; |
3129 |
+- enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; |
3130 |
+- u32 pwm_ctl, val; |
3131 |
+- |
3132 |
+- /* Controller 1 uses the utility pin. */ |
3133 |
+- if (panel->backlight.controller == 1) { |
3134 |
+- val = intel_de_read(dev_priv, UTIL_PIN_CTL); |
3135 |
+- if (val & UTIL_PIN_ENABLE) { |
3136 |
+- drm_dbg_kms(&dev_priv->drm, |
3137 |
+- "util pin already enabled\n"); |
3138 |
+- val &= ~UTIL_PIN_ENABLE; |
3139 |
+- intel_de_write(dev_priv, UTIL_PIN_CTL, val); |
3140 |
+- } |
3141 |
+- |
3142 |
+- val = 0; |
3143 |
+- if (panel->backlight.util_pin_active_low) |
3144 |
+- val |= UTIL_PIN_POLARITY; |
3145 |
+- intel_de_write(dev_priv, UTIL_PIN_CTL, |
3146 |
+- val | UTIL_PIN_PIPE(pipe) | UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE); |
3147 |
+- } |
3148 |
+- |
3149 |
+- pwm_ctl = intel_de_read(dev_priv, |
3150 |
+- BXT_BLC_PWM_CTL(panel->backlight.controller)); |
3151 |
+- if (pwm_ctl & BXT_BLC_PWM_ENABLE) { |
3152 |
+- drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); |
3153 |
+- pwm_ctl &= ~BXT_BLC_PWM_ENABLE; |
3154 |
+- intel_de_write(dev_priv, |
3155 |
+- BXT_BLC_PWM_CTL(panel->backlight.controller), |
3156 |
+- pwm_ctl); |
3157 |
+- } |
3158 |
+- |
3159 |
+- intel_de_write(dev_priv, |
3160 |
+- BXT_BLC_PWM_FREQ(panel->backlight.controller), |
3161 |
+- panel->backlight.pwm_level_max); |
3162 |
+- |
3163 |
+- intel_panel_set_pwm_level(conn_state, level); |
3164 |
+- |
3165 |
+- pwm_ctl = 0; |
3166 |
+- if (panel->backlight.active_low_pwm) |
3167 |
+- pwm_ctl |= BXT_BLC_PWM_POLARITY; |
3168 |
+- |
3169 |
+- intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), |
3170 |
+- pwm_ctl); |
3171 |
+- intel_de_posting_read(dev_priv, |
3172 |
+- BXT_BLC_PWM_CTL(panel->backlight.controller)); |
3173 |
+- intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), |
3174 |
+- pwm_ctl | BXT_BLC_PWM_ENABLE); |
3175 |
+-} |
3176 |
+- |
3177 |
+-static void cnp_enable_backlight(const struct intel_crtc_state *crtc_state, |
3178 |
+- const struct drm_connector_state *conn_state, u32 level) |
3179 |
+-{ |
3180 |
+- struct intel_connector *connector = to_intel_connector(conn_state->connector); |
3181 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
3182 |
+- struct intel_panel *panel = &connector->panel; |
3183 |
+- u32 pwm_ctl; |
3184 |
+- |
3185 |
+- pwm_ctl = intel_de_read(dev_priv, |
3186 |
+- BXT_BLC_PWM_CTL(panel->backlight.controller)); |
3187 |
+- if (pwm_ctl & BXT_BLC_PWM_ENABLE) { |
3188 |
+- drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); |
3189 |
+- pwm_ctl &= ~BXT_BLC_PWM_ENABLE; |
3190 |
+- intel_de_write(dev_priv, |
3191 |
+- BXT_BLC_PWM_CTL(panel->backlight.controller), |
3192 |
+- pwm_ctl); |
3193 |
+- } |
3194 |
+- |
3195 |
+- intel_de_write(dev_priv, |
3196 |
+- BXT_BLC_PWM_FREQ(panel->backlight.controller), |
3197 |
+- panel->backlight.pwm_level_max); |
3198 |
+- |
3199 |
+- intel_panel_set_pwm_level(conn_state, level); |
3200 |
+- |
3201 |
+- pwm_ctl = 0; |
3202 |
+- if (panel->backlight.active_low_pwm) |
3203 |
+- pwm_ctl |= BXT_BLC_PWM_POLARITY; |
3204 |
+- |
3205 |
+- intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), |
3206 |
+- pwm_ctl); |
3207 |
+- intel_de_posting_read(dev_priv, |
3208 |
+- BXT_BLC_PWM_CTL(panel->backlight.controller)); |
3209 |
+- intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), |
3210 |
+- pwm_ctl | BXT_BLC_PWM_ENABLE); |
3211 |
+-} |
3212 |
+- |
3213 |
+-static void ext_pwm_enable_backlight(const struct intel_crtc_state *crtc_state, |
3214 |
+- const struct drm_connector_state *conn_state, u32 level) |
3215 |
+-{ |
3216 |
+- struct intel_connector *connector = to_intel_connector(conn_state->connector); |
3217 |
+- struct intel_panel *panel = &connector->panel; |
3218 |
+- |
3219 |
+- pwm_set_relative_duty_cycle(&panel->backlight.pwm_state, level, 100); |
3220 |
+- panel->backlight.pwm_state.enabled = true; |
3221 |
+- pwm_apply_state(panel->backlight.pwm, &panel->backlight.pwm_state); |
3222 |
+-} |
3223 |
+- |
3224 |
+-static void __intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state, |
3225 |
+- const struct drm_connector_state *conn_state) |
3226 |
+-{ |
3227 |
+- struct intel_connector *connector = to_intel_connector(conn_state->connector); |
3228 |
+- struct intel_panel *panel = &connector->panel; |
3229 |
+- |
3230 |
+- WARN_ON(panel->backlight.max == 0); |
3231 |
+- |
3232 |
+- if (panel->backlight.level <= panel->backlight.min) { |
3233 |
+- panel->backlight.level = panel->backlight.max; |
3234 |
+- if (panel->backlight.device) |
3235 |
+- panel->backlight.device->props.brightness = |
3236 |
+- scale_hw_to_user(connector, |
3237 |
+- panel->backlight.level, |
3238 |
+- panel->backlight.device->props.max_brightness); |
3239 |
+- } |
3240 |
+- |
3241 |
+- panel->backlight.funcs->enable(crtc_state, conn_state, panel->backlight.level); |
3242 |
+- panel->backlight.enabled = true; |
3243 |
+- if (panel->backlight.device) |
3244 |
+- panel->backlight.device->props.power = FB_BLANK_UNBLANK; |
3245 |
+-} |
3246 |
+- |
3247 |
+-void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state, |
3248 |
+- const struct drm_connector_state *conn_state) |
3249 |
+-{ |
3250 |
+- struct intel_connector *connector = to_intel_connector(conn_state->connector); |
3251 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
3252 |
+- struct intel_panel *panel = &connector->panel; |
3253 |
+- enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; |
3254 |
+- |
3255 |
+- if (!panel->backlight.present) |
3256 |
+- return; |
3257 |
+- |
3258 |
+- drm_dbg_kms(&dev_priv->drm, "pipe %c\n", pipe_name(pipe)); |
3259 |
+- |
3260 |
+- mutex_lock(&dev_priv->backlight_lock); |
3261 |
+- |
3262 |
+- __intel_panel_enable_backlight(crtc_state, conn_state); |
3263 |
+- |
3264 |
+- mutex_unlock(&dev_priv->backlight_lock); |
3265 |
+-} |
3266 |
+- |
3267 |
+-#if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE) |
3268 |
+-static u32 intel_panel_get_backlight(struct intel_connector *connector) |
3269 |
+-{ |
3270 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
3271 |
+- struct intel_panel *panel = &connector->panel; |
3272 |
+- u32 val = 0; |
3273 |
+- |
3274 |
+- mutex_lock(&dev_priv->backlight_lock); |
3275 |
+- |
3276 |
+- if (panel->backlight.enabled) |
3277 |
+- val = panel->backlight.funcs->get(connector, intel_connector_get_pipe(connector)); |
3278 |
+- |
3279 |
+- mutex_unlock(&dev_priv->backlight_lock); |
3280 |
+- |
3281 |
+- drm_dbg_kms(&dev_priv->drm, "get backlight PWM = %d\n", val); |
3282 |
+- return val; |
3283 |
+-} |
3284 |
+- |
3285 |
+-/* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */ |
3286 |
+-static u32 scale_user_to_hw(struct intel_connector *connector, |
3287 |
+- u32 user_level, u32 user_max) |
3288 |
+-{ |
3289 |
+- struct intel_panel *panel = &connector->panel; |
3290 |
+- |
3291 |
+- return scale(user_level, 0, user_max, |
3292 |
+- panel->backlight.min, panel->backlight.max); |
3293 |
+-} |
3294 |
+- |
3295 |
+-/* set backlight brightness to level in range [0..max], scaling wrt hw min */ |
3296 |
+-static void intel_panel_set_backlight(const struct drm_connector_state *conn_state, |
3297 |
+- u32 user_level, u32 user_max) |
3298 |
+-{ |
3299 |
+- struct intel_connector *connector = to_intel_connector(conn_state->connector); |
3300 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
3301 |
+- struct intel_panel *panel = &connector->panel; |
3302 |
+- u32 hw_level; |
3303 |
+- |
3304 |
+- if (!panel->backlight.present) |
3305 |
+- return; |
3306 |
+- |
3307 |
+- mutex_lock(&dev_priv->backlight_lock); |
3308 |
+- |
3309 |
+- drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0); |
3310 |
+- |
3311 |
+- hw_level = scale_user_to_hw(connector, user_level, user_max); |
3312 |
+- panel->backlight.level = hw_level; |
3313 |
+- |
3314 |
+- if (panel->backlight.enabled) |
3315 |
+- intel_panel_actually_set_backlight(conn_state, hw_level); |
3316 |
+- |
3317 |
+- mutex_unlock(&dev_priv->backlight_lock); |
3318 |
+-} |
3319 |
+- |
3320 |
+-static int intel_backlight_device_update_status(struct backlight_device *bd) |
3321 |
+-{ |
3322 |
+- struct intel_connector *connector = bl_get_data(bd); |
3323 |
+- struct intel_panel *panel = &connector->panel; |
3324 |
+- struct drm_device *dev = connector->base.dev; |
3325 |
+- |
3326 |
+- drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); |
3327 |
+- DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n", |
3328 |
+- bd->props.brightness, bd->props.max_brightness); |
3329 |
+- intel_panel_set_backlight(connector->base.state, bd->props.brightness, |
3330 |
+- bd->props.max_brightness); |
3331 |
+- |
3332 |
+- /* |
3333 |
+- * Allow flipping bl_power as a sub-state of enabled. Sadly the |
3334 |
+- * backlight class device does not make it easy to to differentiate |
3335 |
+- * between callbacks for brightness and bl_power, so our backlight_power |
3336 |
+- * callback needs to take this into account. |
3337 |
+- */ |
3338 |
+- if (panel->backlight.enabled) { |
3339 |
+- if (panel->backlight.power) { |
3340 |
+- bool enable = bd->props.power == FB_BLANK_UNBLANK && |
3341 |
+- bd->props.brightness != 0; |
3342 |
+- panel->backlight.power(connector, enable); |
3343 |
+- } |
3344 |
+- } else { |
3345 |
+- bd->props.power = FB_BLANK_POWERDOWN; |
3346 |
+- } |
3347 |
+- |
3348 |
+- drm_modeset_unlock(&dev->mode_config.connection_mutex); |
3349 |
+- return 0; |
3350 |
+-} |
3351 |
+- |
3352 |
+-static int intel_backlight_device_get_brightness(struct backlight_device *bd) |
3353 |
+-{ |
3354 |
+- struct intel_connector *connector = bl_get_data(bd); |
3355 |
+- struct drm_device *dev = connector->base.dev; |
3356 |
+- struct drm_i915_private *dev_priv = to_i915(dev); |
3357 |
+- intel_wakeref_t wakeref; |
3358 |
+- int ret = 0; |
3359 |
+- |
3360 |
+- with_intel_runtime_pm(&dev_priv->runtime_pm, wakeref) { |
3361 |
+- u32 hw_level; |
3362 |
+- |
3363 |
+- drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); |
3364 |
+- |
3365 |
+- hw_level = intel_panel_get_backlight(connector); |
3366 |
+- ret = scale_hw_to_user(connector, |
3367 |
+- hw_level, bd->props.max_brightness); |
3368 |
+- |
3369 |
+- drm_modeset_unlock(&dev->mode_config.connection_mutex); |
3370 |
+- } |
3371 |
+- |
3372 |
+- return ret; |
3373 |
+-} |
3374 |
+- |
3375 |
+-static const struct backlight_ops intel_backlight_device_ops = { |
3376 |
+- .update_status = intel_backlight_device_update_status, |
3377 |
+- .get_brightness = intel_backlight_device_get_brightness, |
3378 |
+-}; |
3379 |
+- |
3380 |
+-int intel_backlight_device_register(struct intel_connector *connector) |
3381 |
+-{ |
3382 |
+- struct drm_i915_private *i915 = to_i915(connector->base.dev); |
3383 |
+- struct intel_panel *panel = &connector->panel; |
3384 |
+- struct backlight_properties props; |
3385 |
+- struct backlight_device *bd; |
3386 |
+- const char *name; |
3387 |
+- int ret = 0; |
3388 |
+- |
3389 |
+- if (WARN_ON(panel->backlight.device)) |
3390 |
+- return -ENODEV; |
3391 |
+- |
3392 |
+- if (!panel->backlight.present) |
3393 |
+- return 0; |
3394 |
+- |
3395 |
+- WARN_ON(panel->backlight.max == 0); |
3396 |
+- |
3397 |
+- memset(&props, 0, sizeof(props)); |
3398 |
+- props.type = BACKLIGHT_RAW; |
3399 |
+- |
3400 |
+- /* |
3401 |
+- * Note: Everything should work even if the backlight device max |
3402 |
+- * presented to the userspace is arbitrarily chosen. |
3403 |
+- */ |
3404 |
+- props.max_brightness = panel->backlight.max; |
3405 |
+- props.brightness = scale_hw_to_user(connector, |
3406 |
+- panel->backlight.level, |
3407 |
+- props.max_brightness); |
3408 |
+- |
3409 |
+- if (panel->backlight.enabled) |
3410 |
+- props.power = FB_BLANK_UNBLANK; |
3411 |
+- else |
3412 |
+- props.power = FB_BLANK_POWERDOWN; |
3413 |
+- |
3414 |
+- name = kstrdup("intel_backlight", GFP_KERNEL); |
3415 |
+- if (!name) |
3416 |
+- return -ENOMEM; |
3417 |
+- |
3418 |
+- bd = backlight_device_register(name, connector->base.kdev, connector, |
3419 |
+- &intel_backlight_device_ops, &props); |
3420 |
+- |
3421 |
+- /* |
3422 |
+- * Using the same name independent of the drm device or connector |
3423 |
+- * prevents registration of multiple backlight devices in the |
3424 |
+- * driver. However, we need to use the default name for backward |
3425 |
+- * compatibility. Use unique names for subsequent backlight devices as a |
3426 |
+- * fallback when the default name already exists. |
3427 |
+- */ |
3428 |
+- if (IS_ERR(bd) && PTR_ERR(bd) == -EEXIST) { |
3429 |
+- kfree(name); |
3430 |
+- name = kasprintf(GFP_KERNEL, "card%d-%s-backlight", |
3431 |
+- i915->drm.primary->index, connector->base.name); |
3432 |
+- if (!name) |
3433 |
+- return -ENOMEM; |
3434 |
+- |
3435 |
+- bd = backlight_device_register(name, connector->base.kdev, connector, |
3436 |
+- &intel_backlight_device_ops, &props); |
3437 |
+- } |
3438 |
+- |
3439 |
+- if (IS_ERR(bd)) { |
3440 |
+- drm_err(&i915->drm, |
3441 |
+- "[CONNECTOR:%d:%s] backlight device %s register failed: %ld\n", |
3442 |
+- connector->base.base.id, connector->base.name, name, PTR_ERR(bd)); |
3443 |
+- ret = PTR_ERR(bd); |
3444 |
+- goto out; |
3445 |
+- } |
3446 |
+- |
3447 |
+- panel->backlight.device = bd; |
3448 |
+- |
3449 |
+- drm_dbg_kms(&i915->drm, |
3450 |
+- "[CONNECTOR:%d:%s] backlight device %s registered\n", |
3451 |
+- connector->base.base.id, connector->base.name, name); |
3452 |
+- |
3453 |
+-out: |
3454 |
+- kfree(name); |
3455 |
+- |
3456 |
+- return ret; |
3457 |
+-} |
3458 |
+- |
3459 |
+-void intel_backlight_device_unregister(struct intel_connector *connector) |
3460 |
+-{ |
3461 |
+- struct intel_panel *panel = &connector->panel; |
3462 |
+- |
3463 |
+- if (panel->backlight.device) { |
3464 |
+- backlight_device_unregister(panel->backlight.device); |
3465 |
+- panel->backlight.device = NULL; |
3466 |
+- } |
3467 |
+-} |
3468 |
+-#endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */ |
3469 |
+- |
3470 |
+-/* |
3471 |
+- * CNP: PWM clock frequency is 19.2 MHz or 24 MHz. |
3472 |
+- * PWM increment = 1 |
3473 |
+- */ |
3474 |
+-static u32 cnp_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) |
3475 |
+-{ |
3476 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
3477 |
+- |
3478 |
+- return DIV_ROUND_CLOSEST(KHz(RUNTIME_INFO(dev_priv)->rawclk_freq), |
3479 |
+- pwm_freq_hz); |
3480 |
+-} |
3481 |
+- |
3482 |
+-/* |
3483 |
+- * BXT: PWM clock frequency = 19.2 MHz. |
3484 |
+- */ |
3485 |
+-static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) |
3486 |
+-{ |
3487 |
+- return DIV_ROUND_CLOSEST(KHz(19200), pwm_freq_hz); |
3488 |
+-} |
3489 |
+- |
3490 |
+-/* |
3491 |
+- * SPT: This value represents the period of the PWM stream in clock periods |
3492 |
+- * multiplied by 16 (default increment) or 128 (alternate increment selected in |
3493 |
+- * SCHICKEN_1 bit 0). PWM clock is 24 MHz. |
3494 |
+- */ |
3495 |
+-static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) |
3496 |
+-{ |
3497 |
+- struct intel_panel *panel = &connector->panel; |
3498 |
+- u32 mul; |
3499 |
+- |
3500 |
+- if (panel->backlight.alternate_pwm_increment) |
3501 |
+- mul = 128; |
3502 |
+- else |
3503 |
+- mul = 16; |
3504 |
+- |
3505 |
+- return DIV_ROUND_CLOSEST(MHz(24), pwm_freq_hz * mul); |
3506 |
+-} |
3507 |
+- |
3508 |
+-/* |
3509 |
+- * LPT: This value represents the period of the PWM stream in clock periods |
3510 |
+- * multiplied by 128 (default increment) or 16 (alternate increment, selected in |
3511 |
+- * LPT SOUTH_CHICKEN2 register bit 5). |
3512 |
+- */ |
3513 |
+-static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) |
3514 |
+-{ |
3515 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
3516 |
+- struct intel_panel *panel = &connector->panel; |
3517 |
+- u32 mul, clock; |
3518 |
+- |
3519 |
+- if (panel->backlight.alternate_pwm_increment) |
3520 |
+- mul = 16; |
3521 |
+- else |
3522 |
+- mul = 128; |
3523 |
+- |
3524 |
+- if (HAS_PCH_LPT_H(dev_priv)) |
3525 |
+- clock = MHz(135); /* LPT:H */ |
3526 |
+- else |
3527 |
+- clock = MHz(24); /* LPT:LP */ |
3528 |
+- |
3529 |
+- return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul); |
3530 |
+-} |
3531 |
+- |
3532 |
+-/* |
3533 |
+- * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH |
3534 |
+- * display raw clocks multiplied by 128. |
3535 |
+- */ |
3536 |
+-static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) |
3537 |
+-{ |
3538 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
3539 |
+- |
3540 |
+- return DIV_ROUND_CLOSEST(KHz(RUNTIME_INFO(dev_priv)->rawclk_freq), |
3541 |
+- pwm_freq_hz * 128); |
3542 |
+-} |
3543 |
+- |
3544 |
+-/* |
3545 |
+- * Gen2: This field determines the number of time base events (display core |
3546 |
+- * clock frequency/32) in total for a complete cycle of modulated backlight |
3547 |
+- * control. |
3548 |
+- * |
3549 |
+- * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock) |
3550 |
+- * divided by 32. |
3551 |
+- */ |
3552 |
+-static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) |
3553 |
+-{ |
3554 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
3555 |
+- int clock; |
3556 |
+- |
3557 |
+- if (IS_PINEVIEW(dev_priv)) |
3558 |
+- clock = KHz(RUNTIME_INFO(dev_priv)->rawclk_freq); |
3559 |
+- else |
3560 |
+- clock = KHz(dev_priv->cdclk.hw.cdclk); |
3561 |
+- |
3562 |
+- return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 32); |
3563 |
+-} |
3564 |
+- |
3565 |
+-/* |
3566 |
+- * Gen4: This value represents the period of the PWM stream in display core |
3567 |
+- * clocks ([DevCTG] HRAW clocks) multiplied by 128. |
3568 |
+- * |
3569 |
+- */ |
3570 |
+-static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) |
3571 |
+-{ |
3572 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
3573 |
+- int clock; |
3574 |
+- |
3575 |
+- if (IS_G4X(dev_priv)) |
3576 |
+- clock = KHz(RUNTIME_INFO(dev_priv)->rawclk_freq); |
3577 |
+- else |
3578 |
+- clock = KHz(dev_priv->cdclk.hw.cdclk); |
3579 |
+- |
3580 |
+- return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 128); |
3581 |
+-} |
3582 |
+- |
3583 |
+-/* |
3584 |
+- * VLV: This value represents the period of the PWM stream in display core |
3585 |
+- * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks |
3586 |
+- * multiplied by 16. CHV uses a 19.2MHz S0IX clock. |
3587 |
+- */ |
3588 |
+-static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) |
3589 |
+-{ |
3590 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
3591 |
+- int mul, clock; |
3592 |
+- |
3593 |
+- if ((intel_de_read(dev_priv, CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) { |
3594 |
+- if (IS_CHERRYVIEW(dev_priv)) |
3595 |
+- clock = KHz(19200); |
3596 |
+- else |
3597 |
+- clock = MHz(25); |
3598 |
+- mul = 16; |
3599 |
+- } else { |
3600 |
+- clock = KHz(RUNTIME_INFO(dev_priv)->rawclk_freq); |
3601 |
+- mul = 128; |
3602 |
+- } |
3603 |
+- |
3604 |
+- return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul); |
3605 |
+-} |
3606 |
+- |
3607 |
+-static u16 get_vbt_pwm_freq(struct drm_i915_private *dev_priv) |
3608 |
+-{ |
3609 |
+- u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz; |
3610 |
+- |
3611 |
+- if (pwm_freq_hz) { |
3612 |
+- drm_dbg_kms(&dev_priv->drm, |
3613 |
+- "VBT defined backlight frequency %u Hz\n", |
3614 |
+- pwm_freq_hz); |
3615 |
+- } else { |
3616 |
+- pwm_freq_hz = 200; |
3617 |
+- drm_dbg_kms(&dev_priv->drm, |
3618 |
+- "default backlight frequency %u Hz\n", |
3619 |
+- pwm_freq_hz); |
3620 |
+- } |
3621 |
+- |
3622 |
+- return pwm_freq_hz; |
3623 |
+-} |
3624 |
+- |
3625 |
+-static u32 get_backlight_max_vbt(struct intel_connector *connector) |
3626 |
+-{ |
3627 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
3628 |
+- struct intel_panel *panel = &connector->panel; |
3629 |
+- u16 pwm_freq_hz = get_vbt_pwm_freq(dev_priv); |
3630 |
+- u32 pwm; |
3631 |
+- |
3632 |
+- if (!panel->backlight.pwm_funcs->hz_to_pwm) { |
3633 |
+- drm_dbg_kms(&dev_priv->drm, |
3634 |
+- "backlight frequency conversion not supported\n"); |
3635 |
+- return 0; |
3636 |
+- } |
3637 |
+- |
3638 |
+- pwm = panel->backlight.pwm_funcs->hz_to_pwm(connector, pwm_freq_hz); |
3639 |
+- if (!pwm) { |
3640 |
+- drm_dbg_kms(&dev_priv->drm, |
3641 |
+- "backlight frequency conversion failed\n"); |
3642 |
+- return 0; |
3643 |
+- } |
3644 |
+- |
3645 |
+- return pwm; |
3646 |
+-} |
3647 |
+- |
3648 |
+-/* |
3649 |
+- * Note: The setup hooks can't assume pipe is set! |
3650 |
+- */ |
3651 |
+-static u32 get_backlight_min_vbt(struct intel_connector *connector) |
3652 |
+-{ |
3653 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
3654 |
+- struct intel_panel *panel = &connector->panel; |
3655 |
+- int min; |
3656 |
+- |
3657 |
+- drm_WARN_ON(&dev_priv->drm, panel->backlight.pwm_level_max == 0); |
3658 |
+- |
3659 |
+- /* |
3660 |
+- * XXX: If the vbt value is 255, it makes min equal to max, which leads |
3661 |
+- * to problems. There are such machines out there. Either our |
3662 |
+- * interpretation is wrong or the vbt has bogus data. Or both. Safeguard |
3663 |
+- * against this by letting the minimum be at most (arbitrarily chosen) |
3664 |
+- * 25% of the max. |
3665 |
+- */ |
3666 |
+- min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64); |
3667 |
+- if (min != dev_priv->vbt.backlight.min_brightness) { |
3668 |
+- drm_dbg_kms(&dev_priv->drm, |
3669 |
+- "clamping VBT min backlight %d/255 to %d/255\n", |
3670 |
+- dev_priv->vbt.backlight.min_brightness, min); |
3671 |
+- } |
3672 |
+- |
3673 |
+- /* vbt value is a coefficient in range [0..255] */ |
3674 |
+- return scale(min, 0, 255, 0, panel->backlight.pwm_level_max); |
3675 |
+-} |
3676 |
+- |
3677 |
+-static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused) |
3678 |
+-{ |
3679 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
3680 |
+- struct intel_panel *panel = &connector->panel; |
3681 |
+- u32 cpu_ctl2, pch_ctl1, pch_ctl2, val; |
3682 |
+- bool alt, cpu_mode; |
3683 |
+- |
3684 |
+- if (HAS_PCH_LPT(dev_priv)) |
3685 |
+- alt = intel_de_read(dev_priv, SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY; |
3686 |
+- else |
3687 |
+- alt = intel_de_read(dev_priv, SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY; |
3688 |
+- panel->backlight.alternate_pwm_increment = alt; |
3689 |
+- |
3690 |
+- pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); |
3691 |
+- panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; |
3692 |
+- |
3693 |
+- pch_ctl2 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2); |
3694 |
+- panel->backlight.pwm_level_max = pch_ctl2 >> 16; |
3695 |
+- |
3696 |
+- cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); |
3697 |
+- |
3698 |
+- if (!panel->backlight.pwm_level_max) |
3699 |
+- panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); |
3700 |
+- |
3701 |
+- if (!panel->backlight.pwm_level_max) |
3702 |
+- return -ENODEV; |
3703 |
+- |
3704 |
+- panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); |
3705 |
+- |
3706 |
+- panel->backlight.pwm_enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE; |
3707 |
+- |
3708 |
+- cpu_mode = panel->backlight.pwm_enabled && HAS_PCH_LPT(dev_priv) && |
3709 |
+- !(pch_ctl1 & BLM_PCH_OVERRIDE_ENABLE) && |
3710 |
+- (cpu_ctl2 & BLM_PWM_ENABLE); |
3711 |
+- |
3712 |
+- if (cpu_mode) { |
3713 |
+- val = pch_get_backlight(connector, unused); |
3714 |
+- |
3715 |
+- drm_dbg_kms(&dev_priv->drm, |
3716 |
+- "CPU backlight register was enabled, switching to PCH override\n"); |
3717 |
+- |
3718 |
+- /* Write converted CPU PWM value to PCH override register */ |
3719 |
+- lpt_set_backlight(connector->base.state, val); |
3720 |
+- intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, |
3721 |
+- pch_ctl1 | BLM_PCH_OVERRIDE_ENABLE); |
3722 |
+- |
3723 |
+- intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, |
3724 |
+- cpu_ctl2 & ~BLM_PWM_ENABLE); |
3725 |
+- } |
3726 |
+- |
3727 |
+- return 0; |
3728 |
+-} |
3729 |
+- |
3730 |
+-static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused) |
3731 |
+-{ |
3732 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
3733 |
+- struct intel_panel *panel = &connector->panel; |
3734 |
+- u32 cpu_ctl2, pch_ctl1, pch_ctl2; |
3735 |
+- |
3736 |
+- pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); |
3737 |
+- panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; |
3738 |
+- |
3739 |
+- pch_ctl2 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2); |
3740 |
+- panel->backlight.pwm_level_max = pch_ctl2 >> 16; |
3741 |
+- |
3742 |
+- if (!panel->backlight.pwm_level_max) |
3743 |
+- panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); |
3744 |
+- |
3745 |
+- if (!panel->backlight.pwm_level_max) |
3746 |
+- return -ENODEV; |
3747 |
+- |
3748 |
+- panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); |
3749 |
+- |
3750 |
+- cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); |
3751 |
+- panel->backlight.pwm_enabled = (cpu_ctl2 & BLM_PWM_ENABLE) && |
3752 |
+- (pch_ctl1 & BLM_PCH_PWM_ENABLE); |
3753 |
+- |
3754 |
+- return 0; |
3755 |
+-} |
3756 |
+- |
3757 |
+-static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused) |
3758 |
+-{ |
3759 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
3760 |
+- struct intel_panel *panel = &connector->panel; |
3761 |
+- u32 ctl, val; |
3762 |
+- |
3763 |
+- ctl = intel_de_read(dev_priv, BLC_PWM_CTL); |
3764 |
+- |
3765 |
+- if (DISPLAY_VER(dev_priv) == 2 || IS_I915GM(dev_priv) || IS_I945GM(dev_priv)) |
3766 |
+- panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE; |
3767 |
+- |
3768 |
+- if (IS_PINEVIEW(dev_priv)) |
3769 |
+- panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV; |
3770 |
+- |
3771 |
+- panel->backlight.pwm_level_max = ctl >> 17; |
3772 |
+- |
3773 |
+- if (!panel->backlight.pwm_level_max) { |
3774 |
+- panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); |
3775 |
+- panel->backlight.pwm_level_max >>= 1; |
3776 |
+- } |
3777 |
+- |
3778 |
+- if (!panel->backlight.pwm_level_max) |
3779 |
+- return -ENODEV; |
3780 |
+- |
3781 |
+- if (panel->backlight.combination_mode) |
3782 |
+- panel->backlight.pwm_level_max *= 0xff; |
3783 |
+- |
3784 |
+- panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); |
3785 |
+- |
3786 |
+- val = i9xx_get_backlight(connector, unused); |
3787 |
+- val = intel_panel_invert_pwm_level(connector, val); |
3788 |
+- val = clamp(val, panel->backlight.pwm_level_min, panel->backlight.pwm_level_max); |
3789 |
+- |
3790 |
+- panel->backlight.pwm_enabled = val != 0; |
3791 |
+- |
3792 |
+- return 0; |
3793 |
+-} |
3794 |
+- |
3795 |
+-static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused) |
3796 |
+-{ |
3797 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
3798 |
+- struct intel_panel *panel = &connector->panel; |
3799 |
+- u32 ctl, ctl2; |
3800 |
+- |
3801 |
+- ctl2 = intel_de_read(dev_priv, BLC_PWM_CTL2); |
3802 |
+- panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE; |
3803 |
+- panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; |
3804 |
+- |
3805 |
+- ctl = intel_de_read(dev_priv, BLC_PWM_CTL); |
3806 |
+- panel->backlight.pwm_level_max = ctl >> 16; |
3807 |
+- |
3808 |
+- if (!panel->backlight.pwm_level_max) |
3809 |
+- panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); |
3810 |
+- |
3811 |
+- if (!panel->backlight.pwm_level_max) |
3812 |
+- return -ENODEV; |
3813 |
+- |
3814 |
+- if (panel->backlight.combination_mode) |
3815 |
+- panel->backlight.pwm_level_max *= 0xff; |
3816 |
+- |
3817 |
+- panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); |
3818 |
+- |
3819 |
+- panel->backlight.pwm_enabled = ctl2 & BLM_PWM_ENABLE; |
3820 |
+- |
3821 |
+- return 0; |
3822 |
+-} |
3823 |
+- |
3824 |
+-static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe) |
3825 |
+-{ |
3826 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
3827 |
+- struct intel_panel *panel = &connector->panel; |
3828 |
+- u32 ctl, ctl2; |
3829 |
+- |
3830 |
+- if (drm_WARN_ON(&dev_priv->drm, pipe != PIPE_A && pipe != PIPE_B)) |
3831 |
+- return -ENODEV; |
3832 |
+- |
3833 |
+- ctl2 = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe)); |
3834 |
+- panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; |
3835 |
+- |
3836 |
+- ctl = intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe)); |
3837 |
+- panel->backlight.pwm_level_max = ctl >> 16; |
3838 |
+- |
3839 |
+- if (!panel->backlight.pwm_level_max) |
3840 |
+- panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); |
3841 |
+- |
3842 |
+- if (!panel->backlight.pwm_level_max) |
3843 |
+- return -ENODEV; |
3844 |
+- |
3845 |
+- panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); |
3846 |
+- |
3847 |
+- panel->backlight.pwm_enabled = ctl2 & BLM_PWM_ENABLE; |
3848 |
+- |
3849 |
+- return 0; |
3850 |
+-} |
3851 |
+- |
3852 |
+-static int |
3853 |
+-bxt_setup_backlight(struct intel_connector *connector, enum pipe unused) |
3854 |
+-{ |
3855 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
3856 |
+- struct intel_panel *panel = &connector->panel; |
3857 |
+- u32 pwm_ctl, val; |
3858 |
+- |
3859 |
+- panel->backlight.controller = dev_priv->vbt.backlight.controller; |
3860 |
+- |
3861 |
+- pwm_ctl = intel_de_read(dev_priv, |
3862 |
+- BXT_BLC_PWM_CTL(panel->backlight.controller)); |
3863 |
+- |
3864 |
+- /* Controller 1 uses the utility pin. */ |
3865 |
+- if (panel->backlight.controller == 1) { |
3866 |
+- val = intel_de_read(dev_priv, UTIL_PIN_CTL); |
3867 |
+- panel->backlight.util_pin_active_low = |
3868 |
+- val & UTIL_PIN_POLARITY; |
3869 |
+- } |
3870 |
+- |
3871 |
+- panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY; |
3872 |
+- panel->backlight.pwm_level_max = |
3873 |
+- intel_de_read(dev_priv, BXT_BLC_PWM_FREQ(panel->backlight.controller)); |
3874 |
+- |
3875 |
+- if (!panel->backlight.pwm_level_max) |
3876 |
+- panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); |
3877 |
+- |
3878 |
+- if (!panel->backlight.pwm_level_max) |
3879 |
+- return -ENODEV; |
3880 |
+- |
3881 |
+- panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); |
3882 |
+- |
3883 |
+- panel->backlight.pwm_enabled = pwm_ctl & BXT_BLC_PWM_ENABLE; |
3884 |
+- |
3885 |
+- return 0; |
3886 |
+-} |
3887 |
+- |
3888 |
+-static int |
3889 |
+-cnp_setup_backlight(struct intel_connector *connector, enum pipe unused) |
3890 |
+-{ |
3891 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
3892 |
+- struct intel_panel *panel = &connector->panel; |
3893 |
+- u32 pwm_ctl; |
3894 |
+- |
3895 |
+- /* |
3896 |
+- * CNP has the BXT implementation of backlight, but with only one |
3897 |
+- * controller. TODO: ICP has multiple controllers but we only use |
3898 |
+- * controller 0 for now. |
3899 |
+- */ |
3900 |
+- panel->backlight.controller = 0; |
3901 |
+- |
3902 |
+- pwm_ctl = intel_de_read(dev_priv, |
3903 |
+- BXT_BLC_PWM_CTL(panel->backlight.controller)); |
3904 |
+- |
3905 |
+- panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY; |
3906 |
+- panel->backlight.pwm_level_max = |
3907 |
+- intel_de_read(dev_priv, BXT_BLC_PWM_FREQ(panel->backlight.controller)); |
3908 |
+- |
3909 |
+- if (!panel->backlight.pwm_level_max) |
3910 |
+- panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); |
3911 |
+- |
3912 |
+- if (!panel->backlight.pwm_level_max) |
3913 |
+- return -ENODEV; |
3914 |
+- |
3915 |
+- panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); |
3916 |
+- |
3917 |
+- panel->backlight.pwm_enabled = pwm_ctl & BXT_BLC_PWM_ENABLE; |
3918 |
+- |
3919 |
+- return 0; |
3920 |
+-} |
3921 |
+- |
3922 |
+-static int ext_pwm_setup_backlight(struct intel_connector *connector, |
3923 |
+- enum pipe pipe) |
3924 |
+-{ |
3925 |
+- struct drm_device *dev = connector->base.dev; |
3926 |
+- struct drm_i915_private *dev_priv = to_i915(dev); |
3927 |
+- struct intel_panel *panel = &connector->panel; |
3928 |
+- const char *desc; |
3929 |
+- u32 level; |
3930 |
+- |
3931 |
+- /* Get the right PWM chip for DSI backlight according to VBT */ |
3932 |
+- if (dev_priv->vbt.dsi.config->pwm_blc == PPS_BLC_PMIC) { |
3933 |
+- panel->backlight.pwm = pwm_get(dev->dev, "pwm_pmic_backlight"); |
3934 |
+- desc = "PMIC"; |
3935 |
+- } else { |
3936 |
+- panel->backlight.pwm = pwm_get(dev->dev, "pwm_soc_backlight"); |
3937 |
+- desc = "SoC"; |
3938 |
+- } |
3939 |
+- |
3940 |
+- if (IS_ERR(panel->backlight.pwm)) { |
3941 |
+- drm_err(&dev_priv->drm, "Failed to get the %s PWM chip\n", |
3942 |
+- desc); |
3943 |
+- panel->backlight.pwm = NULL; |
3944 |
+- return -ENODEV; |
3945 |
+- } |
3946 |
+- |
3947 |
+- panel->backlight.pwm_level_max = 100; /* 100% */ |
3948 |
+- panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); |
3949 |
+- |
3950 |
+- if (pwm_is_enabled(panel->backlight.pwm)) { |
3951 |
+- /* PWM is already enabled, use existing settings */ |
3952 |
+- pwm_get_state(panel->backlight.pwm, &panel->backlight.pwm_state); |
3953 |
+- |
3954 |
+- level = pwm_get_relative_duty_cycle(&panel->backlight.pwm_state, |
3955 |
+- 100); |
3956 |
+- level = intel_panel_invert_pwm_level(connector, level); |
3957 |
+- panel->backlight.pwm_enabled = true; |
3958 |
+- |
3959 |
+- drm_dbg_kms(&dev_priv->drm, "PWM already enabled at freq %ld, VBT freq %d, level %d\n", |
3960 |
+- NSEC_PER_SEC / (unsigned long)panel->backlight.pwm_state.period, |
3961 |
+- get_vbt_pwm_freq(dev_priv), level); |
3962 |
+- } else { |
3963 |
+- /* Set period from VBT frequency, leave other settings at 0. */ |
3964 |
+- panel->backlight.pwm_state.period = |
3965 |
+- NSEC_PER_SEC / get_vbt_pwm_freq(dev_priv); |
3966 |
+- } |
3967 |
+- |
3968 |
+- drm_info(&dev_priv->drm, "Using %s PWM for LCD backlight control\n", |
3969 |
+- desc); |
3970 |
+- return 0; |
3971 |
+-} |
3972 |
+- |
3973 |
+-static void intel_pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level) |
3974 |
+-{ |
3975 |
+- struct intel_connector *connector = to_intel_connector(conn_state->connector); |
3976 |
+- struct intel_panel *panel = &connector->panel; |
3977 |
+- |
3978 |
+- panel->backlight.pwm_funcs->set(conn_state, |
3979 |
+- intel_panel_invert_pwm_level(connector, level)); |
3980 |
+-} |
3981 |
+- |
3982 |
+-static u32 intel_pwm_get_backlight(struct intel_connector *connector, enum pipe pipe) |
3983 |
+-{ |
3984 |
+- struct intel_panel *panel = &connector->panel; |
3985 |
+- |
3986 |
+- return intel_panel_invert_pwm_level(connector, |
3987 |
+- panel->backlight.pwm_funcs->get(connector, pipe)); |
3988 |
+-} |
3989 |
+- |
3990 |
+-static void intel_pwm_enable_backlight(const struct intel_crtc_state *crtc_state, |
3991 |
+- const struct drm_connector_state *conn_state, u32 level) |
3992 |
+-{ |
3993 |
+- struct intel_connector *connector = to_intel_connector(conn_state->connector); |
3994 |
+- struct intel_panel *panel = &connector->panel; |
3995 |
+- |
3996 |
+- panel->backlight.pwm_funcs->enable(crtc_state, conn_state, |
3997 |
+- intel_panel_invert_pwm_level(connector, level)); |
3998 |
+-} |
3999 |
+- |
4000 |
+-static void intel_pwm_disable_backlight(const struct drm_connector_state *conn_state, u32 level) |
4001 |
+-{ |
4002 |
+- struct intel_connector *connector = to_intel_connector(conn_state->connector); |
4003 |
+- struct intel_panel *panel = &connector->panel; |
4004 |
+- |
4005 |
+- panel->backlight.pwm_funcs->disable(conn_state, |
4006 |
+- intel_panel_invert_pwm_level(connector, level)); |
4007 |
+-} |
4008 |
+- |
4009 |
+-static int intel_pwm_setup_backlight(struct intel_connector *connector, enum pipe pipe) |
4010 |
+-{ |
4011 |
+- struct intel_panel *panel = &connector->panel; |
4012 |
+- int ret = panel->backlight.pwm_funcs->setup(connector, pipe); |
4013 |
+- |
4014 |
+- if (ret < 0) |
4015 |
+- return ret; |
4016 |
+- |
4017 |
+- panel->backlight.min = panel->backlight.pwm_level_min; |
4018 |
+- panel->backlight.max = panel->backlight.pwm_level_max; |
4019 |
+- panel->backlight.level = intel_pwm_get_backlight(connector, pipe); |
4020 |
+- panel->backlight.enabled = panel->backlight.pwm_enabled; |
4021 |
+- |
4022 |
+- return 0; |
4023 |
+-} |
4024 |
+- |
4025 |
+-void intel_panel_update_backlight(struct intel_atomic_state *state, |
4026 |
+- struct intel_encoder *encoder, |
4027 |
+- const struct intel_crtc_state *crtc_state, |
4028 |
+- const struct drm_connector_state *conn_state) |
4029 |
+-{ |
4030 |
+- struct intel_connector *connector = to_intel_connector(conn_state->connector); |
4031 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
4032 |
+- struct intel_panel *panel = &connector->panel; |
4033 |
+- |
4034 |
+- if (!panel->backlight.present) |
4035 |
+- return; |
4036 |
+- |
4037 |
+- mutex_lock(&dev_priv->backlight_lock); |
4038 |
+- if (!panel->backlight.enabled) |
4039 |
+- __intel_panel_enable_backlight(crtc_state, conn_state); |
4040 |
+- |
4041 |
+- mutex_unlock(&dev_priv->backlight_lock); |
4042 |
+-} |
4043 |
+- |
4044 |
+-int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe) |
4045 |
+-{ |
4046 |
+- struct drm_i915_private *dev_priv = to_i915(connector->dev); |
4047 |
+- struct intel_connector *intel_connector = to_intel_connector(connector); |
4048 |
+- struct intel_panel *panel = &intel_connector->panel; |
4049 |
+- int ret; |
4050 |
+- |
4051 |
+- if (!dev_priv->vbt.backlight.present) { |
4052 |
+- if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) { |
4053 |
+- drm_dbg_kms(&dev_priv->drm, |
4054 |
+- "no backlight present per VBT, but present per quirk\n"); |
4055 |
+- } else { |
4056 |
+- drm_dbg_kms(&dev_priv->drm, |
4057 |
+- "no backlight present per VBT\n"); |
4058 |
+- return 0; |
4059 |
+- } |
4060 |
+- } |
4061 |
+- |
4062 |
+- /* ensure intel_panel has been initialized first */ |
4063 |
+- if (drm_WARN_ON(&dev_priv->drm, !panel->backlight.funcs)) |
4064 |
+- return -ENODEV; |
4065 |
+- |
4066 |
+- /* set level and max in panel struct */ |
4067 |
+- mutex_lock(&dev_priv->backlight_lock); |
4068 |
+- ret = panel->backlight.funcs->setup(intel_connector, pipe); |
4069 |
+- mutex_unlock(&dev_priv->backlight_lock); |
4070 |
+- |
4071 |
+- if (ret) { |
4072 |
+- drm_dbg_kms(&dev_priv->drm, |
4073 |
+- "failed to setup backlight for connector %s\n", |
4074 |
+- connector->name); |
4075 |
+- return ret; |
4076 |
+- } |
4077 |
+- |
4078 |
+- panel->backlight.present = true; |
4079 |
+- |
4080 |
+- drm_dbg_kms(&dev_priv->drm, |
4081 |
+- "Connector %s backlight initialized, %s, brightness %u/%u\n", |
4082 |
+- connector->name, |
4083 |
+- enableddisabled(panel->backlight.enabled), |
4084 |
+- panel->backlight.level, panel->backlight.max); |
4085 |
+- |
4086 |
+- return 0; |
4087 |
+-} |
4088 |
+- |
4089 |
+-static void intel_panel_destroy_backlight(struct intel_panel *panel) |
4090 |
+-{ |
4091 |
+- /* dispose of the pwm */ |
4092 |
+- if (panel->backlight.pwm) |
4093 |
+- pwm_put(panel->backlight.pwm); |
4094 |
+- |
4095 |
+- panel->backlight.present = false; |
4096 |
+-} |
4097 |
+- |
4098 |
+-static const struct intel_panel_bl_funcs bxt_pwm_funcs = { |
4099 |
+- .setup = bxt_setup_backlight, |
4100 |
+- .enable = bxt_enable_backlight, |
4101 |
+- .disable = bxt_disable_backlight, |
4102 |
+- .set = bxt_set_backlight, |
4103 |
+- .get = bxt_get_backlight, |
4104 |
+- .hz_to_pwm = bxt_hz_to_pwm, |
4105 |
+-}; |
4106 |
+- |
4107 |
+-static const struct intel_panel_bl_funcs cnp_pwm_funcs = { |
4108 |
+- .setup = cnp_setup_backlight, |
4109 |
+- .enable = cnp_enable_backlight, |
4110 |
+- .disable = cnp_disable_backlight, |
4111 |
+- .set = bxt_set_backlight, |
4112 |
+- .get = bxt_get_backlight, |
4113 |
+- .hz_to_pwm = cnp_hz_to_pwm, |
4114 |
+-}; |
4115 |
+- |
4116 |
+-static const struct intel_panel_bl_funcs lpt_pwm_funcs = { |
4117 |
+- .setup = lpt_setup_backlight, |
4118 |
+- .enable = lpt_enable_backlight, |
4119 |
+- .disable = lpt_disable_backlight, |
4120 |
+- .set = lpt_set_backlight, |
4121 |
+- .get = lpt_get_backlight, |
4122 |
+- .hz_to_pwm = lpt_hz_to_pwm, |
4123 |
+-}; |
4124 |
+- |
4125 |
+-static const struct intel_panel_bl_funcs spt_pwm_funcs = { |
4126 |
+- .setup = lpt_setup_backlight, |
4127 |
+- .enable = lpt_enable_backlight, |
4128 |
+- .disable = lpt_disable_backlight, |
4129 |
+- .set = lpt_set_backlight, |
4130 |
+- .get = lpt_get_backlight, |
4131 |
+- .hz_to_pwm = spt_hz_to_pwm, |
4132 |
+-}; |
4133 |
+- |
4134 |
+-static const struct intel_panel_bl_funcs pch_pwm_funcs = { |
4135 |
+- .setup = pch_setup_backlight, |
4136 |
+- .enable = pch_enable_backlight, |
4137 |
+- .disable = pch_disable_backlight, |
4138 |
+- .set = pch_set_backlight, |
4139 |
+- .get = pch_get_backlight, |
4140 |
+- .hz_to_pwm = pch_hz_to_pwm, |
4141 |
+-}; |
4142 |
+- |
4143 |
+-static const struct intel_panel_bl_funcs ext_pwm_funcs = { |
4144 |
+- .setup = ext_pwm_setup_backlight, |
4145 |
+- .enable = ext_pwm_enable_backlight, |
4146 |
+- .disable = ext_pwm_disable_backlight, |
4147 |
+- .set = ext_pwm_set_backlight, |
4148 |
+- .get = ext_pwm_get_backlight, |
4149 |
+-}; |
4150 |
+- |
4151 |
+-static const struct intel_panel_bl_funcs vlv_pwm_funcs = { |
4152 |
+- .setup = vlv_setup_backlight, |
4153 |
+- .enable = vlv_enable_backlight, |
4154 |
+- .disable = vlv_disable_backlight, |
4155 |
+- .set = vlv_set_backlight, |
4156 |
+- .get = vlv_get_backlight, |
4157 |
+- .hz_to_pwm = vlv_hz_to_pwm, |
4158 |
+-}; |
4159 |
+- |
4160 |
+-static const struct intel_panel_bl_funcs i965_pwm_funcs = { |
4161 |
+- .setup = i965_setup_backlight, |
4162 |
+- .enable = i965_enable_backlight, |
4163 |
+- .disable = i965_disable_backlight, |
4164 |
+- .set = i9xx_set_backlight, |
4165 |
+- .get = i9xx_get_backlight, |
4166 |
+- .hz_to_pwm = i965_hz_to_pwm, |
4167 |
+-}; |
4168 |
+- |
4169 |
+-static const struct intel_panel_bl_funcs i9xx_pwm_funcs = { |
4170 |
+- .setup = i9xx_setup_backlight, |
4171 |
+- .enable = i9xx_enable_backlight, |
4172 |
+- .disable = i9xx_disable_backlight, |
4173 |
+- .set = i9xx_set_backlight, |
4174 |
+- .get = i9xx_get_backlight, |
4175 |
+- .hz_to_pwm = i9xx_hz_to_pwm, |
4176 |
+-}; |
4177 |
+- |
4178 |
+-static const struct intel_panel_bl_funcs pwm_bl_funcs = { |
4179 |
+- .setup = intel_pwm_setup_backlight, |
4180 |
+- .enable = intel_pwm_enable_backlight, |
4181 |
+- .disable = intel_pwm_disable_backlight, |
4182 |
+- .set = intel_pwm_set_backlight, |
4183 |
+- .get = intel_pwm_get_backlight, |
4184 |
+-}; |
4185 |
+- |
4186 |
+-/* Set up chip specific backlight functions */ |
4187 |
+-static void |
4188 |
+-intel_panel_init_backlight_funcs(struct intel_panel *panel) |
4189 |
+-{ |
4190 |
+- struct intel_connector *connector = |
4191 |
+- container_of(panel, struct intel_connector, panel); |
4192 |
+- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
4193 |
+- |
4194 |
+- if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI && |
4195 |
+- intel_dsi_dcs_init_backlight_funcs(connector) == 0) |
4196 |
+- return; |
4197 |
+- |
4198 |
+- if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) { |
4199 |
+- panel->backlight.pwm_funcs = &bxt_pwm_funcs; |
4200 |
+- } else if (INTEL_PCH_TYPE(dev_priv) >= PCH_CNP) { |
4201 |
+- panel->backlight.pwm_funcs = &cnp_pwm_funcs; |
4202 |
+- } else if (INTEL_PCH_TYPE(dev_priv) >= PCH_LPT) { |
4203 |
+- if (HAS_PCH_LPT(dev_priv)) |
4204 |
+- panel->backlight.pwm_funcs = &lpt_pwm_funcs; |
4205 |
+- else |
4206 |
+- panel->backlight.pwm_funcs = &spt_pwm_funcs; |
4207 |
+- } else if (HAS_PCH_SPLIT(dev_priv)) { |
4208 |
+- panel->backlight.pwm_funcs = &pch_pwm_funcs; |
4209 |
+- } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { |
4210 |
+- if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) { |
4211 |
+- panel->backlight.pwm_funcs = &ext_pwm_funcs; |
4212 |
+- } else { |
4213 |
+- panel->backlight.pwm_funcs = &vlv_pwm_funcs; |
4214 |
+- } |
4215 |
+- } else if (DISPLAY_VER(dev_priv) == 4) { |
4216 |
+- panel->backlight.pwm_funcs = &i965_pwm_funcs; |
4217 |
+- } else { |
4218 |
+- panel->backlight.pwm_funcs = &i9xx_pwm_funcs; |
4219 |
+- } |
4220 |
+- |
4221 |
+- if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP && |
4222 |
+- intel_dp_aux_init_backlight_funcs(connector) == 0) |
4223 |
+- return; |
4224 |
+- |
4225 |
+- /* We're using a standard PWM backlight interface */ |
4226 |
+- panel->backlight.funcs = &pwm_bl_funcs; |
4227 |
+-} |
4228 |
+- |
4229 |
+ enum drm_connector_status |
4230 |
+ intel_panel_detect(struct drm_connector *connector, bool force) |
4231 |
+ { |
4232 |
+diff --git a/drivers/gpu/drm/i915/display/intel_panel.h b/drivers/gpu/drm/i915/display/intel_panel.h |
4233 |
+index 1d340f77bffc7..67dbb15026bf1 100644 |
4234 |
+--- a/drivers/gpu/drm/i915/display/intel_panel.h |
4235 |
++++ b/drivers/gpu/drm/i915/display/intel_panel.h |
4236 |
+@@ -8,15 +8,13 @@ |
4237 |
+ |
4238 |
+ #include <linux/types.h> |
4239 |
+ |
4240 |
+-#include "intel_display.h" |
4241 |
+- |
4242 |
++enum drm_connector_status; |
4243 |
+ struct drm_connector; |
4244 |
+ struct drm_connector_state; |
4245 |
+ struct drm_display_mode; |
4246 |
++struct drm_i915_private; |
4247 |
+ struct intel_connector; |
4248 |
+-struct intel_crtc; |
4249 |
+ struct intel_crtc_state; |
4250 |
+-struct intel_encoder; |
4251 |
+ struct intel_panel; |
4252 |
+ |
4253 |
+ int intel_panel_init(struct intel_panel *panel, |
4254 |
+@@ -31,17 +29,6 @@ int intel_pch_panel_fitting(struct intel_crtc_state *crtc_state, |
4255 |
+ const struct drm_connector_state *conn_state); |
4256 |
+ int intel_gmch_panel_fitting(struct intel_crtc_state *crtc_state, |
4257 |
+ const struct drm_connector_state *conn_state); |
4258 |
+-void intel_panel_set_backlight_acpi(const struct drm_connector_state *conn_state, |
4259 |
+- u32 level, u32 max); |
4260 |
+-int intel_panel_setup_backlight(struct drm_connector *connector, |
4261 |
+- enum pipe pipe); |
4262 |
+-void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state, |
4263 |
+- const struct drm_connector_state *conn_state); |
4264 |
+-void intel_panel_update_backlight(struct intel_atomic_state *state, |
4265 |
+- struct intel_encoder *encoder, |
4266 |
+- const struct intel_crtc_state *crtc_state, |
4267 |
+- const struct drm_connector_state *conn_state); |
4268 |
+-void intel_panel_disable_backlight(const struct drm_connector_state *old_conn_state); |
4269 |
+ struct drm_display_mode * |
4270 |
+ intel_panel_edid_downclock_mode(struct intel_connector *connector, |
4271 |
+ const struct drm_display_mode *fixed_mode); |
4272 |
+@@ -49,22 +36,5 @@ struct drm_display_mode * |
4273 |
+ intel_panel_edid_fixed_mode(struct intel_connector *connector); |
4274 |
+ struct drm_display_mode * |
4275 |
+ intel_panel_vbt_fixed_mode(struct intel_connector *connector); |
4276 |
+-void intel_panel_set_pwm_level(const struct drm_connector_state *conn_state, u32 level); |
4277 |
+-u32 intel_panel_invert_pwm_level(struct intel_connector *connector, u32 level); |
4278 |
+-u32 intel_panel_backlight_level_to_pwm(struct intel_connector *connector, u32 level); |
4279 |
+-u32 intel_panel_backlight_level_from_pwm(struct intel_connector *connector, u32 val); |
4280 |
+- |
4281 |
+-#if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE) |
4282 |
+-int intel_backlight_device_register(struct intel_connector *connector); |
4283 |
+-void intel_backlight_device_unregister(struct intel_connector *connector); |
4284 |
+-#else /* CONFIG_BACKLIGHT_CLASS_DEVICE */ |
4285 |
+-static inline int intel_backlight_device_register(struct intel_connector *connector) |
4286 |
+-{ |
4287 |
+- return 0; |
4288 |
+-} |
4289 |
+-static inline void intel_backlight_device_unregister(struct intel_connector *connector) |
4290 |
+-{ |
4291 |
+-} |
4292 |
+-#endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */ |
4293 |
+ |
4294 |
+ #endif /* __INTEL_PANEL_H__ */ |
4295 |
+diff --git a/drivers/gpu/drm/i915/display/intel_quirks.c b/drivers/gpu/drm/i915/display/intel_quirks.c |
4296 |
+index 8a52b7a167746..407b096f53921 100644 |
4297 |
+--- a/drivers/gpu/drm/i915/display/intel_quirks.c |
4298 |
++++ b/drivers/gpu/drm/i915/display/intel_quirks.c |
4299 |
+@@ -190,6 +190,9 @@ static struct intel_quirk intel_quirks[] = { |
4300 |
+ /* ASRock ITX*/ |
4301 |
+ { 0x3185, 0x1849, 0x2212, quirk_increase_ddi_disabled_time }, |
4302 |
+ { 0x3184, 0x1849, 0x2212, quirk_increase_ddi_disabled_time }, |
4303 |
++ /* ECS Liva Q2 */ |
4304 |
++ { 0x3185, 0x1019, 0xa94d, quirk_increase_ddi_disabled_time }, |
4305 |
++ { 0x3184, 0x1019, 0xa94d, quirk_increase_ddi_disabled_time }, |
4306 |
+ }; |
4307 |
+ |
4308 |
+ void intel_init_quirks(struct drm_i915_private *i915) |
4309 |
+diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c |
4310 |
+index 0ee4ff341e25d..b27738df447d0 100644 |
4311 |
+--- a/drivers/gpu/drm/i915/display/vlv_dsi.c |
4312 |
++++ b/drivers/gpu/drm/i915/display/vlv_dsi.c |
4313 |
+@@ -32,6 +32,7 @@ |
4314 |
+ |
4315 |
+ #include "i915_drv.h" |
4316 |
+ #include "intel_atomic.h" |
4317 |
++#include "intel_backlight.h" |
4318 |
+ #include "intel_connector.h" |
4319 |
+ #include "intel_crtc.h" |
4320 |
+ #include "intel_de.h" |
4321 |
+diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c |
4322 |
+index cde0a477fb497..7ed7dba42c834 100644 |
4323 |
+--- a/drivers/gpu/drm/i915/gvt/handlers.c |
4324 |
++++ b/drivers/gpu/drm/i915/gvt/handlers.c |
4325 |
+@@ -909,7 +909,7 @@ static int update_fdi_rx_iir_status(struct intel_vgpu *vgpu, |
4326 |
+ else if (FDI_RX_IMR_TO_PIPE(offset) != INVALID_INDEX) |
4327 |
+ index = FDI_RX_IMR_TO_PIPE(offset); |
4328 |
+ else { |
4329 |
+- gvt_vgpu_err("Unsupport registers %x\n", offset); |
4330 |
++ gvt_vgpu_err("Unsupported registers %x\n", offset); |
4331 |
+ return -EINVAL; |
4332 |
+ } |
4333 |
+ |
4334 |
+diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c |
4335 |
+index 1a27e4833adfa..9123baf723d82 100644 |
4336 |
+--- a/drivers/gpu/drm/i915/intel_pm.c |
4337 |
++++ b/drivers/gpu/drm/i915/intel_pm.c |
4338 |
+@@ -6638,7 +6638,10 @@ void skl_wm_get_hw_state(struct drm_i915_private *dev_priv) |
4339 |
+ enum plane_id plane_id; |
4340 |
+ u8 slices; |
4341 |
+ |
4342 |
+- skl_pipe_wm_get_hw_state(crtc, &crtc_state->wm.skl.optimal); |
4343 |
++ memset(&crtc_state->wm.skl.optimal, 0, |
4344 |
++ sizeof(crtc_state->wm.skl.optimal)); |
4345 |
++ if (crtc_state->hw.active) |
4346 |
++ skl_pipe_wm_get_hw_state(crtc, &crtc_state->wm.skl.optimal); |
4347 |
+ crtc_state->wm.skl.raw = crtc_state->wm.skl.optimal; |
4348 |
+ |
4349 |
+ memset(&dbuf_state->ddb[pipe], 0, sizeof(dbuf_state->ddb[pipe])); |
4350 |
+@@ -6649,6 +6652,9 @@ void skl_wm_get_hw_state(struct drm_i915_private *dev_priv) |
4351 |
+ struct skl_ddb_entry *ddb_uv = |
4352 |
+ &crtc_state->wm.skl.plane_ddb_uv[plane_id]; |
4353 |
+ |
4354 |
++ if (!crtc_state->hw.active) |
4355 |
++ continue; |
4356 |
++ |
4357 |
+ skl_ddb_get_hw_plane_state(dev_priv, crtc->pipe, |
4358 |
+ plane_id, ddb_y, ddb_uv); |
4359 |
+ |
4360 |
+diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c |
4361 |
+index b6f4ce2a48afe..6d9eec98e0d38 100644 |
4362 |
+--- a/drivers/gpu/drm/msm/dp/dp_ctrl.c |
4363 |
++++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c |
4364 |
+@@ -1198,7 +1198,7 @@ static int dp_ctrl_link_train_2(struct dp_ctrl_private *ctrl, |
4365 |
+ if (ret) |
4366 |
+ return ret; |
4367 |
+ |
4368 |
+- dp_ctrl_train_pattern_set(ctrl, pattern | DP_RECOVERED_CLOCK_OUT_EN); |
4369 |
++ dp_ctrl_train_pattern_set(ctrl, pattern); |
4370 |
+ |
4371 |
+ for (tries = 0; tries <= maximum_retries; tries++) { |
4372 |
+ drm_dp_link_train_channel_eq_delay(ctrl->aux, ctrl->panel->dpcd); |
4373 |
+diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c b/drivers/gpu/drm/msm/dsi/dsi_cfg.c |
4374 |
+index 96bbc8b6d0092..ce3901439c69c 100644 |
4375 |
+--- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c |
4376 |
++++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c |
4377 |
+@@ -109,7 +109,7 @@ static const char * const dsi_8996_bus_clk_names[] = { |
4378 |
+ static const struct msm_dsi_config msm8996_dsi_cfg = { |
4379 |
+ .io_offset = DSI_6G_REG_SHIFT, |
4380 |
+ .reg_cfg = { |
4381 |
+- .num = 2, |
4382 |
++ .num = 3, |
4383 |
+ .regs = { |
4384 |
+ {"vdda", 18160, 1 }, /* 1.25 V */ |
4385 |
+ {"vcca", 17000, 32 }, /* 0.925 V */ |
4386 |
+@@ -148,7 +148,7 @@ static const char * const dsi_sdm660_bus_clk_names[] = { |
4387 |
+ static const struct msm_dsi_config sdm660_dsi_cfg = { |
4388 |
+ .io_offset = DSI_6G_REG_SHIFT, |
4389 |
+ .reg_cfg = { |
4390 |
+- .num = 2, |
4391 |
++ .num = 1, |
4392 |
+ .regs = { |
4393 |
+ {"vdda", 12560, 4 }, /* 1.2 V */ |
4394 |
+ }, |
4395 |
+diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c |
4396 |
+index a878b8b079c64..6a917fe69a833 100644 |
4397 |
+--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c |
4398 |
++++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c |
4399 |
+@@ -347,7 +347,7 @@ int msm_dsi_dphy_timing_calc_v3(struct msm_dsi_dphy_timing *timing, |
4400 |
+ } else { |
4401 |
+ timing->shared_timings.clk_pre = |
4402 |
+ linear_inter(tmax, tmin, pcnt2, 0, false); |
4403 |
+- timing->shared_timings.clk_pre_inc_by_2 = 0; |
4404 |
++ timing->shared_timings.clk_pre_inc_by_2 = 0; |
4405 |
+ } |
4406 |
+ |
4407 |
+ timing->ta_go = 3; |
4408 |
+diff --git a/drivers/hwmon/gpio-fan.c b/drivers/hwmon/gpio-fan.c |
4409 |
+index befe989ca7b94..fbf3f5a4ecb67 100644 |
4410 |
+--- a/drivers/hwmon/gpio-fan.c |
4411 |
++++ b/drivers/hwmon/gpio-fan.c |
4412 |
+@@ -391,6 +391,9 @@ static int gpio_fan_set_cur_state(struct thermal_cooling_device *cdev, |
4413 |
+ if (!fan_data) |
4414 |
+ return -EINVAL; |
4415 |
+ |
4416 |
++ if (state >= fan_data->num_speed) |
4417 |
++ return -EINVAL; |
4418 |
++ |
4419 |
+ set_fan_speed(fan_data, state); |
4420 |
+ return 0; |
4421 |
+ } |
4422 |
+diff --git a/drivers/iio/adc/ad7292.c b/drivers/iio/adc/ad7292.c |
4423 |
+index 3271a31afde1c..e3e14a1253e89 100644 |
4424 |
+--- a/drivers/iio/adc/ad7292.c |
4425 |
++++ b/drivers/iio/adc/ad7292.c |
4426 |
+@@ -287,10 +287,8 @@ static int ad7292_probe(struct spi_device *spi) |
4427 |
+ |
4428 |
+ ret = devm_add_action_or_reset(&spi->dev, |
4429 |
+ ad7292_regulator_disable, st); |
4430 |
+- if (ret) { |
4431 |
+- regulator_disable(st->reg); |
4432 |
++ if (ret) |
4433 |
+ return ret; |
4434 |
+- } |
4435 |
+ |
4436 |
+ ret = regulator_get_voltage(st->reg); |
4437 |
+ if (ret < 0) |
4438 |
+diff --git a/drivers/iio/adc/mcp3911.c b/drivers/iio/adc/mcp3911.c |
4439 |
+index e573da5397bb3..65278270a75ce 100644 |
4440 |
+--- a/drivers/iio/adc/mcp3911.c |
4441 |
++++ b/drivers/iio/adc/mcp3911.c |
4442 |
+@@ -38,8 +38,8 @@ |
4443 |
+ #define MCP3911_CHANNEL(x) (MCP3911_REG_CHANNEL0 + x * 3) |
4444 |
+ #define MCP3911_OFFCAL(x) (MCP3911_REG_OFFCAL_CH0 + x * 6) |
4445 |
+ |
4446 |
+-/* Internal voltage reference in uV */ |
4447 |
+-#define MCP3911_INT_VREF_UV 1200000 |
4448 |
++/* Internal voltage reference in mV */ |
4449 |
++#define MCP3911_INT_VREF_MV 1200 |
4450 |
+ |
4451 |
+ #define MCP3911_REG_READ(reg, id) ((((reg) << 1) | ((id) << 5) | (1 << 0)) & 0xff) |
4452 |
+ #define MCP3911_REG_WRITE(reg, id) ((((reg) << 1) | ((id) << 5) | (0 << 0)) & 0xff) |
4453 |
+@@ -111,6 +111,8 @@ static int mcp3911_read_raw(struct iio_dev *indio_dev, |
4454 |
+ if (ret) |
4455 |
+ goto out; |
4456 |
+ |
4457 |
++ *val = sign_extend32(*val, 23); |
4458 |
++ |
4459 |
+ ret = IIO_VAL_INT; |
4460 |
+ break; |
4461 |
+ |
4462 |
+@@ -135,11 +137,18 @@ static int mcp3911_read_raw(struct iio_dev *indio_dev, |
4463 |
+ |
4464 |
+ *val = ret / 1000; |
4465 |
+ } else { |
4466 |
+- *val = MCP3911_INT_VREF_UV; |
4467 |
++ *val = MCP3911_INT_VREF_MV; |
4468 |
+ } |
4469 |
+ |
4470 |
+- *val2 = 24; |
4471 |
+- ret = IIO_VAL_FRACTIONAL_LOG2; |
4472 |
++ /* |
4473 |
++ * For 24bit Conversion |
4474 |
++ * Raw = ((Voltage)/(Vref) * 2^23 * Gain * 1.5 |
4475 |
++ * Voltage = Raw * (Vref)/(2^23 * Gain * 1.5) |
4476 |
++ */ |
4477 |
++ |
4478 |
++ /* val2 = (2^23 * 1.5) */ |
4479 |
++ *val2 = 12582912; |
4480 |
++ ret = IIO_VAL_FRACTIONAL; |
4481 |
+ break; |
4482 |
+ } |
4483 |
+ |
4484 |
+diff --git a/drivers/input/joystick/iforce/iforce-serio.c b/drivers/input/joystick/iforce/iforce-serio.c |
4485 |
+index f95a81b9fac72..2380546d79782 100644 |
4486 |
+--- a/drivers/input/joystick/iforce/iforce-serio.c |
4487 |
++++ b/drivers/input/joystick/iforce/iforce-serio.c |
4488 |
+@@ -39,7 +39,7 @@ static void iforce_serio_xmit(struct iforce *iforce) |
4489 |
+ |
4490 |
+ again: |
4491 |
+ if (iforce->xmit.head == iforce->xmit.tail) { |
4492 |
+- clear_bit(IFORCE_XMIT_RUNNING, iforce->xmit_flags); |
4493 |
++ iforce_clear_xmit_and_wake(iforce); |
4494 |
+ spin_unlock_irqrestore(&iforce->xmit_lock, flags); |
4495 |
+ return; |
4496 |
+ } |
4497 |
+@@ -64,7 +64,7 @@ again: |
4498 |
+ if (test_and_clear_bit(IFORCE_XMIT_AGAIN, iforce->xmit_flags)) |
4499 |
+ goto again; |
4500 |
+ |
4501 |
+- clear_bit(IFORCE_XMIT_RUNNING, iforce->xmit_flags); |
4502 |
++ iforce_clear_xmit_and_wake(iforce); |
4503 |
+ |
4504 |
+ spin_unlock_irqrestore(&iforce->xmit_lock, flags); |
4505 |
+ } |
4506 |
+@@ -169,7 +169,7 @@ static irqreturn_t iforce_serio_irq(struct serio *serio, |
4507 |
+ iforce_serio->cmd_response_len = iforce_serio->len; |
4508 |
+ |
4509 |
+ /* Signal that command is done */ |
4510 |
+- wake_up(&iforce->wait); |
4511 |
++ wake_up_all(&iforce->wait); |
4512 |
+ } else if (likely(iforce->type)) { |
4513 |
+ iforce_process_packet(iforce, iforce_serio->id, |
4514 |
+ iforce_serio->data_in, |
4515 |
+diff --git a/drivers/input/joystick/iforce/iforce-usb.c b/drivers/input/joystick/iforce/iforce-usb.c |
4516 |
+index ea58805c480fa..cba92bd590a8d 100644 |
4517 |
+--- a/drivers/input/joystick/iforce/iforce-usb.c |
4518 |
++++ b/drivers/input/joystick/iforce/iforce-usb.c |
4519 |
+@@ -30,7 +30,7 @@ static void __iforce_usb_xmit(struct iforce *iforce) |
4520 |
+ spin_lock_irqsave(&iforce->xmit_lock, flags); |
4521 |
+ |
4522 |
+ if (iforce->xmit.head == iforce->xmit.tail) { |
4523 |
+- clear_bit(IFORCE_XMIT_RUNNING, iforce->xmit_flags); |
4524 |
++ iforce_clear_xmit_and_wake(iforce); |
4525 |
+ spin_unlock_irqrestore(&iforce->xmit_lock, flags); |
4526 |
+ return; |
4527 |
+ } |
4528 |
+@@ -58,9 +58,9 @@ static void __iforce_usb_xmit(struct iforce *iforce) |
4529 |
+ XMIT_INC(iforce->xmit.tail, n); |
4530 |
+ |
4531 |
+ if ( (n=usb_submit_urb(iforce_usb->out, GFP_ATOMIC)) ) { |
4532 |
+- clear_bit(IFORCE_XMIT_RUNNING, iforce->xmit_flags); |
4533 |
+ dev_warn(&iforce_usb->intf->dev, |
4534 |
+ "usb_submit_urb failed %d\n", n); |
4535 |
++ iforce_clear_xmit_and_wake(iforce); |
4536 |
+ } |
4537 |
+ |
4538 |
+ /* The IFORCE_XMIT_RUNNING bit is not cleared here. That's intended. |
4539 |
+@@ -175,15 +175,15 @@ static void iforce_usb_out(struct urb *urb) |
4540 |
+ struct iforce *iforce = &iforce_usb->iforce; |
4541 |
+ |
4542 |
+ if (urb->status) { |
4543 |
+- clear_bit(IFORCE_XMIT_RUNNING, iforce->xmit_flags); |
4544 |
+ dev_dbg(&iforce_usb->intf->dev, "urb->status %d, exiting\n", |
4545 |
+ urb->status); |
4546 |
++ iforce_clear_xmit_and_wake(iforce); |
4547 |
+ return; |
4548 |
+ } |
4549 |
+ |
4550 |
+ __iforce_usb_xmit(iforce); |
4551 |
+ |
4552 |
+- wake_up(&iforce->wait); |
4553 |
++ wake_up_all(&iforce->wait); |
4554 |
+ } |
4555 |
+ |
4556 |
+ static int iforce_usb_probe(struct usb_interface *intf, |
4557 |
+diff --git a/drivers/input/joystick/iforce/iforce.h b/drivers/input/joystick/iforce/iforce.h |
4558 |
+index 6aa761ebbdf77..9ccb9107ccbef 100644 |
4559 |
+--- a/drivers/input/joystick/iforce/iforce.h |
4560 |
++++ b/drivers/input/joystick/iforce/iforce.h |
4561 |
+@@ -119,6 +119,12 @@ static inline int iforce_get_id_packet(struct iforce *iforce, u8 id, |
4562 |
+ response_data, response_len); |
4563 |
+ } |
4564 |
+ |
4565 |
++static inline void iforce_clear_xmit_and_wake(struct iforce *iforce) |
4566 |
++{ |
4567 |
++ clear_bit(IFORCE_XMIT_RUNNING, iforce->xmit_flags); |
4568 |
++ wake_up_all(&iforce->wait); |
4569 |
++} |
4570 |
++ |
4571 |
+ /* Public functions */ |
4572 |
+ /* iforce-main.c */ |
4573 |
+ int iforce_init_device(struct device *parent, u16 bustype, |
4574 |
+diff --git a/drivers/input/misc/rk805-pwrkey.c b/drivers/input/misc/rk805-pwrkey.c |
4575 |
+index 3fb64dbda1a21..76873aa005b41 100644 |
4576 |
+--- a/drivers/input/misc/rk805-pwrkey.c |
4577 |
++++ b/drivers/input/misc/rk805-pwrkey.c |
4578 |
+@@ -98,6 +98,7 @@ static struct platform_driver rk805_pwrkey_driver = { |
4579 |
+ }; |
4580 |
+ module_platform_driver(rk805_pwrkey_driver); |
4581 |
+ |
4582 |
++MODULE_ALIAS("platform:rk805-pwrkey"); |
4583 |
+ MODULE_AUTHOR("Joseph Chen <chenjh@××××××××××.com>"); |
4584 |
+ MODULE_DESCRIPTION("RK805 PMIC Power Key driver"); |
4585 |
+ MODULE_LICENSE("GPL"); |
4586 |
+diff --git a/drivers/media/rc/mceusb.c b/drivers/media/rc/mceusb.c |
4587 |
+index 5f296f985b07a..deb3db45a94ce 100644 |
4588 |
+--- a/drivers/media/rc/mceusb.c |
4589 |
++++ b/drivers/media/rc/mceusb.c |
4590 |
+@@ -1416,42 +1416,37 @@ static void mceusb_gen1_init(struct mceusb_dev *ir) |
4591 |
+ { |
4592 |
+ int ret; |
4593 |
+ struct device *dev = ir->dev; |
4594 |
+- char *data; |
4595 |
+- |
4596 |
+- data = kzalloc(USB_CTRL_MSG_SZ, GFP_KERNEL); |
4597 |
+- if (!data) { |
4598 |
+- dev_err(dev, "%s: memory allocation failed!", __func__); |
4599 |
+- return; |
4600 |
+- } |
4601 |
++ char data[USB_CTRL_MSG_SZ]; |
4602 |
+ |
4603 |
+ /* |
4604 |
+ * This is a strange one. Windows issues a set address to the device |
4605 |
+ * on the receive control pipe and expect a certain value pair back |
4606 |
+ */ |
4607 |
+- ret = usb_control_msg(ir->usbdev, usb_rcvctrlpipe(ir->usbdev, 0), |
4608 |
+- USB_REQ_SET_ADDRESS, USB_TYPE_VENDOR, 0, 0, |
4609 |
+- data, USB_CTRL_MSG_SZ, 3000); |
4610 |
++ ret = usb_control_msg_recv(ir->usbdev, 0, USB_REQ_SET_ADDRESS, |
4611 |
++ USB_DIR_IN | USB_TYPE_VENDOR, |
4612 |
++ 0, 0, data, USB_CTRL_MSG_SZ, 3000, |
4613 |
++ GFP_KERNEL); |
4614 |
+ dev_dbg(dev, "set address - ret = %d", ret); |
4615 |
+ dev_dbg(dev, "set address - data[0] = %d, data[1] = %d", |
4616 |
+ data[0], data[1]); |
4617 |
+ |
4618 |
+ /* set feature: bit rate 38400 bps */ |
4619 |
+- ret = usb_control_msg(ir->usbdev, usb_sndctrlpipe(ir->usbdev, 0), |
4620 |
+- USB_REQ_SET_FEATURE, USB_TYPE_VENDOR, |
4621 |
+- 0xc04e, 0x0000, NULL, 0, 3000); |
4622 |
++ ret = usb_control_msg_send(ir->usbdev, 0, |
4623 |
++ USB_REQ_SET_FEATURE, USB_TYPE_VENDOR, |
4624 |
++ 0xc04e, 0x0000, NULL, 0, 3000, GFP_KERNEL); |
4625 |
+ |
4626 |
+ dev_dbg(dev, "set feature - ret = %d", ret); |
4627 |
+ |
4628 |
+ /* bRequest 4: set char length to 8 bits */ |
4629 |
+- ret = usb_control_msg(ir->usbdev, usb_sndctrlpipe(ir->usbdev, 0), |
4630 |
+- 4, USB_TYPE_VENDOR, |
4631 |
+- 0x0808, 0x0000, NULL, 0, 3000); |
4632 |
++ ret = usb_control_msg_send(ir->usbdev, 0, |
4633 |
++ 4, USB_TYPE_VENDOR, |
4634 |
++ 0x0808, 0x0000, NULL, 0, 3000, GFP_KERNEL); |
4635 |
+ dev_dbg(dev, "set char length - retB = %d", ret); |
4636 |
+ |
4637 |
+ /* bRequest 2: set handshaking to use DTR/DSR */ |
4638 |
+- ret = usb_control_msg(ir->usbdev, usb_sndctrlpipe(ir->usbdev, 0), |
4639 |
+- 2, USB_TYPE_VENDOR, |
4640 |
+- 0x0000, 0x0100, NULL, 0, 3000); |
4641 |
++ ret = usb_control_msg_send(ir->usbdev, 0, |
4642 |
++ 2, USB_TYPE_VENDOR, |
4643 |
++ 0x0000, 0x0100, NULL, 0, 3000, GFP_KERNEL); |
4644 |
+ dev_dbg(dev, "set handshake - retC = %d", ret); |
4645 |
+ |
4646 |
+ /* device resume */ |
4647 |
+@@ -1459,8 +1454,6 @@ static void mceusb_gen1_init(struct mceusb_dev *ir) |
4648 |
+ |
4649 |
+ /* get hw/sw revision? */ |
4650 |
+ mce_command_out(ir, GET_REVISION, sizeof(GET_REVISION)); |
4651 |
+- |
4652 |
+- kfree(data); |
4653 |
+ } |
4654 |
+ |
4655 |
+ static void mceusb_gen2_init(struct mceusb_dev *ir) |
4656 |
+diff --git a/drivers/misc/fastrpc.c b/drivers/misc/fastrpc.c |
4657 |
+index c7134d2cf69a9..cf5705776c4f6 100644 |
4658 |
+--- a/drivers/misc/fastrpc.c |
4659 |
++++ b/drivers/misc/fastrpc.c |
4660 |
+@@ -1550,7 +1550,12 @@ static int fastrpc_cb_probe(struct platform_device *pdev) |
4661 |
+ of_property_read_u32(dev->of_node, "qcom,nsessions", &sessions); |
4662 |
+ |
4663 |
+ spin_lock_irqsave(&cctx->lock, flags); |
4664 |
+- sess = &cctx->session[cctx->sesscount]; |
4665 |
++ if (cctx->sesscount >= FASTRPC_MAX_SESSIONS) { |
4666 |
++ dev_err(&pdev->dev, "too many sessions\n"); |
4667 |
++ spin_unlock_irqrestore(&cctx->lock, flags); |
4668 |
++ return -ENOSPC; |
4669 |
++ } |
4670 |
++ sess = &cctx->session[cctx->sesscount++]; |
4671 |
+ sess->used = false; |
4672 |
+ sess->valid = true; |
4673 |
+ sess->dev = dev; |
4674 |
+@@ -1563,13 +1568,12 @@ static int fastrpc_cb_probe(struct platform_device *pdev) |
4675 |
+ struct fastrpc_session_ctx *dup_sess; |
4676 |
+ |
4677 |
+ for (i = 1; i < sessions; i++) { |
4678 |
+- if (cctx->sesscount++ >= FASTRPC_MAX_SESSIONS) |
4679 |
++ if (cctx->sesscount >= FASTRPC_MAX_SESSIONS) |
4680 |
+ break; |
4681 |
+- dup_sess = &cctx->session[cctx->sesscount]; |
4682 |
++ dup_sess = &cctx->session[cctx->sesscount++]; |
4683 |
+ memcpy(dup_sess, sess, sizeof(*dup_sess)); |
4684 |
+ } |
4685 |
+ } |
4686 |
+- cctx->sesscount++; |
4687 |
+ spin_unlock_irqrestore(&cctx->lock, flags); |
4688 |
+ rc = dma_set_mask(dev, DMA_BIT_MASK(32)); |
4689 |
+ if (rc) { |
4690 |
+diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c |
4691 |
+index 44e134fa04afb..7e8d4abed602d 100644 |
4692 |
+--- a/drivers/mmc/core/sd.c |
4693 |
++++ b/drivers/mmc/core/sd.c |
4694 |
+@@ -942,15 +942,16 @@ int mmc_sd_setup_card(struct mmc_host *host, struct mmc_card *card, |
4695 |
+ |
4696 |
+ /* Erase init depends on CSD and SSR */ |
4697 |
+ mmc_init_erase(card); |
4698 |
+- |
4699 |
+- /* |
4700 |
+- * Fetch switch information from card. |
4701 |
+- */ |
4702 |
+- err = mmc_read_switch(card); |
4703 |
+- if (err) |
4704 |
+- return err; |
4705 |
+ } |
4706 |
+ |
4707 |
++ /* |
4708 |
++ * Fetch switch information from card. Note, sd3_bus_mode can change if |
4709 |
++ * voltage switch outcome changes, so do this always. |
4710 |
++ */ |
4711 |
++ err = mmc_read_switch(card); |
4712 |
++ if (err) |
4713 |
++ return err; |
4714 |
++ |
4715 |
+ /* |
4716 |
+ * For SPI, enable CRC as appropriate. |
4717 |
+ * This CRC enable is located AFTER the reading of the |
4718 |
+@@ -1473,26 +1474,15 @@ retry: |
4719 |
+ if (!v18_fixup_failed && !mmc_host_is_spi(host) && mmc_host_uhs(host) && |
4720 |
+ mmc_sd_card_using_v18(card) && |
4721 |
+ host->ios.signal_voltage != MMC_SIGNAL_VOLTAGE_180) { |
4722 |
+- /* |
4723 |
+- * Re-read switch information in case it has changed since |
4724 |
+- * oldcard was initialized. |
4725 |
+- */ |
4726 |
+- if (oldcard) { |
4727 |
+- err = mmc_read_switch(card); |
4728 |
+- if (err) |
4729 |
+- goto free_card; |
4730 |
+- } |
4731 |
+- if (mmc_sd_card_using_v18(card)) { |
4732 |
+- if (mmc_host_set_uhs_voltage(host) || |
4733 |
+- mmc_sd_init_uhs_card(card)) { |
4734 |
+- v18_fixup_failed = true; |
4735 |
+- mmc_power_cycle(host, ocr); |
4736 |
+- if (!oldcard) |
4737 |
+- mmc_remove_card(card); |
4738 |
+- goto retry; |
4739 |
+- } |
4740 |
+- goto done; |
4741 |
++ if (mmc_host_set_uhs_voltage(host) || |
4742 |
++ mmc_sd_init_uhs_card(card)) { |
4743 |
++ v18_fixup_failed = true; |
4744 |
++ mmc_power_cycle(host, ocr); |
4745 |
++ if (!oldcard) |
4746 |
++ mmc_remove_card(card); |
4747 |
++ goto retry; |
4748 |
+ } |
4749 |
++ goto cont; |
4750 |
+ } |
4751 |
+ |
4752 |
+ /* Initialization sequence for UHS-I cards */ |
4753 |
+@@ -1527,7 +1517,7 @@ retry: |
4754 |
+ mmc_set_bus_width(host, MMC_BUS_WIDTH_4); |
4755 |
+ } |
4756 |
+ } |
4757 |
+- |
4758 |
++cont: |
4759 |
+ if (!oldcard) { |
4760 |
+ /* Read/parse the extension registers. */ |
4761 |
+ err = sd_read_ext_regs(card); |
4762 |
+@@ -1559,7 +1549,7 @@ retry: |
4763 |
+ err = -EINVAL; |
4764 |
+ goto free_card; |
4765 |
+ } |
4766 |
+-done: |
4767 |
++ |
4768 |
+ host->card = card; |
4769 |
+ return 0; |
4770 |
+ |
4771 |
+diff --git a/drivers/net/dsa/xrs700x/xrs700x.c b/drivers/net/dsa/xrs700x/xrs700x.c |
4772 |
+index 469420941054e..cf363d5a30020 100644 |
4773 |
+--- a/drivers/net/dsa/xrs700x/xrs700x.c |
4774 |
++++ b/drivers/net/dsa/xrs700x/xrs700x.c |
4775 |
+@@ -108,6 +108,7 @@ static void xrs700x_read_port_counters(struct xrs700x *priv, int port) |
4776 |
+ { |
4777 |
+ struct xrs700x_port *p = &priv->ports[port]; |
4778 |
+ struct rtnl_link_stats64 stats; |
4779 |
++ unsigned long flags; |
4780 |
+ int i; |
4781 |
+ |
4782 |
+ memset(&stats, 0, sizeof(stats)); |
4783 |
+@@ -137,9 +138,9 @@ static void xrs700x_read_port_counters(struct xrs700x *priv, int port) |
4784 |
+ */ |
4785 |
+ stats.rx_packets += stats.multicast; |
4786 |
+ |
4787 |
+- u64_stats_update_begin(&p->syncp); |
4788 |
++ flags = u64_stats_update_begin_irqsave(&p->syncp); |
4789 |
+ p->stats64 = stats; |
4790 |
+- u64_stats_update_end(&p->syncp); |
4791 |
++ u64_stats_update_end_irqrestore(&p->syncp, flags); |
4792 |
+ |
4793 |
+ mutex_unlock(&p->mib_mutex); |
4794 |
+ } |
4795 |
+diff --git a/drivers/net/ethernet/cortina/gemini.c b/drivers/net/ethernet/cortina/gemini.c |
4796 |
+index 012ca11a38cc1..8361faf03e429 100644 |
4797 |
+--- a/drivers/net/ethernet/cortina/gemini.c |
4798 |
++++ b/drivers/net/ethernet/cortina/gemini.c |
4799 |
+@@ -1920,7 +1920,7 @@ static void gmac_get_stats64(struct net_device *netdev, |
4800 |
+ |
4801 |
+ /* Racing with RX NAPI */ |
4802 |
+ do { |
4803 |
+- start = u64_stats_fetch_begin(&port->rx_stats_syncp); |
4804 |
++ start = u64_stats_fetch_begin_irq(&port->rx_stats_syncp); |
4805 |
+ |
4806 |
+ stats->rx_packets = port->stats.rx_packets; |
4807 |
+ stats->rx_bytes = port->stats.rx_bytes; |
4808 |
+@@ -1932,11 +1932,11 @@ static void gmac_get_stats64(struct net_device *netdev, |
4809 |
+ stats->rx_crc_errors = port->stats.rx_crc_errors; |
4810 |
+ stats->rx_frame_errors = port->stats.rx_frame_errors; |
4811 |
+ |
4812 |
+- } while (u64_stats_fetch_retry(&port->rx_stats_syncp, start)); |
4813 |
++ } while (u64_stats_fetch_retry_irq(&port->rx_stats_syncp, start)); |
4814 |
+ |
4815 |
+ /* Racing with MIB and TX completion interrupts */ |
4816 |
+ do { |
4817 |
+- start = u64_stats_fetch_begin(&port->ir_stats_syncp); |
4818 |
++ start = u64_stats_fetch_begin_irq(&port->ir_stats_syncp); |
4819 |
+ |
4820 |
+ stats->tx_errors = port->stats.tx_errors; |
4821 |
+ stats->tx_packets = port->stats.tx_packets; |
4822 |
+@@ -1946,15 +1946,15 @@ static void gmac_get_stats64(struct net_device *netdev, |
4823 |
+ stats->rx_missed_errors = port->stats.rx_missed_errors; |
4824 |
+ stats->rx_fifo_errors = port->stats.rx_fifo_errors; |
4825 |
+ |
4826 |
+- } while (u64_stats_fetch_retry(&port->ir_stats_syncp, start)); |
4827 |
++ } while (u64_stats_fetch_retry_irq(&port->ir_stats_syncp, start)); |
4828 |
+ |
4829 |
+ /* Racing with hard_start_xmit */ |
4830 |
+ do { |
4831 |
+- start = u64_stats_fetch_begin(&port->tx_stats_syncp); |
4832 |
++ start = u64_stats_fetch_begin_irq(&port->tx_stats_syncp); |
4833 |
+ |
4834 |
+ stats->tx_dropped = port->stats.tx_dropped; |
4835 |
+ |
4836 |
+- } while (u64_stats_fetch_retry(&port->tx_stats_syncp, start)); |
4837 |
++ } while (u64_stats_fetch_retry_irq(&port->tx_stats_syncp, start)); |
4838 |
+ |
4839 |
+ stats->rx_dropped += stats->rx_missed_errors; |
4840 |
+ } |
4841 |
+@@ -2032,18 +2032,18 @@ static void gmac_get_ethtool_stats(struct net_device *netdev, |
4842 |
+ /* Racing with MIB interrupt */ |
4843 |
+ do { |
4844 |
+ p = values; |
4845 |
+- start = u64_stats_fetch_begin(&port->ir_stats_syncp); |
4846 |
++ start = u64_stats_fetch_begin_irq(&port->ir_stats_syncp); |
4847 |
+ |
4848 |
+ for (i = 0; i < RX_STATS_NUM; i++) |
4849 |
+ *p++ = port->hw_stats[i]; |
4850 |
+ |
4851 |
+- } while (u64_stats_fetch_retry(&port->ir_stats_syncp, start)); |
4852 |
++ } while (u64_stats_fetch_retry_irq(&port->ir_stats_syncp, start)); |
4853 |
+ values = p; |
4854 |
+ |
4855 |
+ /* Racing with RX NAPI */ |
4856 |
+ do { |
4857 |
+ p = values; |
4858 |
+- start = u64_stats_fetch_begin(&port->rx_stats_syncp); |
4859 |
++ start = u64_stats_fetch_begin_irq(&port->rx_stats_syncp); |
4860 |
+ |
4861 |
+ for (i = 0; i < RX_STATUS_NUM; i++) |
4862 |
+ *p++ = port->rx_stats[i]; |
4863 |
+@@ -2051,13 +2051,13 @@ static void gmac_get_ethtool_stats(struct net_device *netdev, |
4864 |
+ *p++ = port->rx_csum_stats[i]; |
4865 |
+ *p++ = port->rx_napi_exits; |
4866 |
+ |
4867 |
+- } while (u64_stats_fetch_retry(&port->rx_stats_syncp, start)); |
4868 |
++ } while (u64_stats_fetch_retry_irq(&port->rx_stats_syncp, start)); |
4869 |
+ values = p; |
4870 |
+ |
4871 |
+ /* Racing with TX start_xmit */ |
4872 |
+ do { |
4873 |
+ p = values; |
4874 |
+- start = u64_stats_fetch_begin(&port->tx_stats_syncp); |
4875 |
++ start = u64_stats_fetch_begin_irq(&port->tx_stats_syncp); |
4876 |
+ |
4877 |
+ for (i = 0; i < TX_MAX_FRAGS; i++) { |
4878 |
+ *values++ = port->tx_frag_stats[i]; |
4879 |
+@@ -2066,7 +2066,7 @@ static void gmac_get_ethtool_stats(struct net_device *netdev, |
4880 |
+ *values++ = port->tx_frags_linearized; |
4881 |
+ *values++ = port->tx_hw_csummed; |
4882 |
+ |
4883 |
+- } while (u64_stats_fetch_retry(&port->tx_stats_syncp, start)); |
4884 |
++ } while (u64_stats_fetch_retry_irq(&port->tx_stats_syncp, start)); |
4885 |
+ } |
4886 |
+ |
4887 |
+ static int gmac_get_ksettings(struct net_device *netdev, |
4888 |
+diff --git a/drivers/net/ethernet/google/gve/gve_ethtool.c b/drivers/net/ethernet/google/gve/gve_ethtool.c |
4889 |
+index 716e6240305d9..878329ddcf8df 100644 |
4890 |
+--- a/drivers/net/ethernet/google/gve/gve_ethtool.c |
4891 |
++++ b/drivers/net/ethernet/google/gve/gve_ethtool.c |
4892 |
+@@ -174,14 +174,14 @@ gve_get_ethtool_stats(struct net_device *netdev, |
4893 |
+ struct gve_rx_ring *rx = &priv->rx[ring]; |
4894 |
+ |
4895 |
+ start = |
4896 |
+- u64_stats_fetch_begin(&priv->rx[ring].statss); |
4897 |
++ u64_stats_fetch_begin_irq(&priv->rx[ring].statss); |
4898 |
+ tmp_rx_pkts = rx->rpackets; |
4899 |
+ tmp_rx_bytes = rx->rbytes; |
4900 |
+ tmp_rx_skb_alloc_fail = rx->rx_skb_alloc_fail; |
4901 |
+ tmp_rx_buf_alloc_fail = rx->rx_buf_alloc_fail; |
4902 |
+ tmp_rx_desc_err_dropped_pkt = |
4903 |
+ rx->rx_desc_err_dropped_pkt; |
4904 |
+- } while (u64_stats_fetch_retry(&priv->rx[ring].statss, |
4905 |
++ } while (u64_stats_fetch_retry_irq(&priv->rx[ring].statss, |
4906 |
+ start)); |
4907 |
+ rx_pkts += tmp_rx_pkts; |
4908 |
+ rx_bytes += tmp_rx_bytes; |
4909 |
+@@ -195,10 +195,10 @@ gve_get_ethtool_stats(struct net_device *netdev, |
4910 |
+ if (priv->tx) { |
4911 |
+ do { |
4912 |
+ start = |
4913 |
+- u64_stats_fetch_begin(&priv->tx[ring].statss); |
4914 |
++ u64_stats_fetch_begin_irq(&priv->tx[ring].statss); |
4915 |
+ tmp_tx_pkts = priv->tx[ring].pkt_done; |
4916 |
+ tmp_tx_bytes = priv->tx[ring].bytes_done; |
4917 |
+- } while (u64_stats_fetch_retry(&priv->tx[ring].statss, |
4918 |
++ } while (u64_stats_fetch_retry_irq(&priv->tx[ring].statss, |
4919 |
+ start)); |
4920 |
+ tx_pkts += tmp_tx_pkts; |
4921 |
+ tx_bytes += tmp_tx_bytes; |
4922 |
+@@ -256,13 +256,13 @@ gve_get_ethtool_stats(struct net_device *netdev, |
4923 |
+ data[i++] = rx->cnt; |
4924 |
+ do { |
4925 |
+ start = |
4926 |
+- u64_stats_fetch_begin(&priv->rx[ring].statss); |
4927 |
++ u64_stats_fetch_begin_irq(&priv->rx[ring].statss); |
4928 |
+ tmp_rx_bytes = rx->rbytes; |
4929 |
+ tmp_rx_skb_alloc_fail = rx->rx_skb_alloc_fail; |
4930 |
+ tmp_rx_buf_alloc_fail = rx->rx_buf_alloc_fail; |
4931 |
+ tmp_rx_desc_err_dropped_pkt = |
4932 |
+ rx->rx_desc_err_dropped_pkt; |
4933 |
+- } while (u64_stats_fetch_retry(&priv->rx[ring].statss, |
4934 |
++ } while (u64_stats_fetch_retry_irq(&priv->rx[ring].statss, |
4935 |
+ start)); |
4936 |
+ data[i++] = tmp_rx_bytes; |
4937 |
+ /* rx dropped packets */ |
4938 |
+@@ -323,9 +323,9 @@ gve_get_ethtool_stats(struct net_device *netdev, |
4939 |
+ } |
4940 |
+ do { |
4941 |
+ start = |
4942 |
+- u64_stats_fetch_begin(&priv->tx[ring].statss); |
4943 |
++ u64_stats_fetch_begin_irq(&priv->tx[ring].statss); |
4944 |
+ tmp_tx_bytes = tx->bytes_done; |
4945 |
+- } while (u64_stats_fetch_retry(&priv->tx[ring].statss, |
4946 |
++ } while (u64_stats_fetch_retry_irq(&priv->tx[ring].statss, |
4947 |
+ start)); |
4948 |
+ data[i++] = tmp_tx_bytes; |
4949 |
+ data[i++] = tx->wake_queue; |
4950 |
+diff --git a/drivers/net/ethernet/google/gve/gve_main.c b/drivers/net/ethernet/google/gve/gve_main.c |
4951 |
+index 68552848d3888..49850cf7cfafd 100644 |
4952 |
+--- a/drivers/net/ethernet/google/gve/gve_main.c |
4953 |
++++ b/drivers/net/ethernet/google/gve/gve_main.c |
4954 |
+@@ -51,10 +51,10 @@ static void gve_get_stats(struct net_device *dev, struct rtnl_link_stats64 *s) |
4955 |
+ for (ring = 0; ring < priv->rx_cfg.num_queues; ring++) { |
4956 |
+ do { |
4957 |
+ start = |
4958 |
+- u64_stats_fetch_begin(&priv->rx[ring].statss); |
4959 |
++ u64_stats_fetch_begin_irq(&priv->rx[ring].statss); |
4960 |
+ packets = priv->rx[ring].rpackets; |
4961 |
+ bytes = priv->rx[ring].rbytes; |
4962 |
+- } while (u64_stats_fetch_retry(&priv->rx[ring].statss, |
4963 |
++ } while (u64_stats_fetch_retry_irq(&priv->rx[ring].statss, |
4964 |
+ start)); |
4965 |
+ s->rx_packets += packets; |
4966 |
+ s->rx_bytes += bytes; |
4967 |
+@@ -64,10 +64,10 @@ static void gve_get_stats(struct net_device *dev, struct rtnl_link_stats64 *s) |
4968 |
+ for (ring = 0; ring < priv->tx_cfg.num_queues; ring++) { |
4969 |
+ do { |
4970 |
+ start = |
4971 |
+- u64_stats_fetch_begin(&priv->tx[ring].statss); |
4972 |
++ u64_stats_fetch_begin_irq(&priv->tx[ring].statss); |
4973 |
+ packets = priv->tx[ring].pkt_done; |
4974 |
+ bytes = priv->tx[ring].bytes_done; |
4975 |
+- } while (u64_stats_fetch_retry(&priv->tx[ring].statss, |
4976 |
++ } while (u64_stats_fetch_retry_irq(&priv->tx[ring].statss, |
4977 |
+ start)); |
4978 |
+ s->tx_packets += packets; |
4979 |
+ s->tx_bytes += bytes; |
4980 |
+@@ -1260,9 +1260,9 @@ void gve_handle_report_stats(struct gve_priv *priv) |
4981 |
+ } |
4982 |
+ |
4983 |
+ do { |
4984 |
+- start = u64_stats_fetch_begin(&priv->tx[idx].statss); |
4985 |
++ start = u64_stats_fetch_begin_irq(&priv->tx[idx].statss); |
4986 |
+ tx_bytes = priv->tx[idx].bytes_done; |
4987 |
+- } while (u64_stats_fetch_retry(&priv->tx[idx].statss, start)); |
4988 |
++ } while (u64_stats_fetch_retry_irq(&priv->tx[idx].statss, start)); |
4989 |
+ stats[stats_idx++] = (struct stats) { |
4990 |
+ .stat_name = cpu_to_be32(TX_WAKE_CNT), |
4991 |
+ .value = cpu_to_be64(priv->tx[idx].wake_queue), |
4992 |
+diff --git a/drivers/net/ethernet/huawei/hinic/hinic_rx.c b/drivers/net/ethernet/huawei/hinic/hinic_rx.c |
4993 |
+index a102d486c4350..d11ec69a2e17d 100644 |
4994 |
+--- a/drivers/net/ethernet/huawei/hinic/hinic_rx.c |
4995 |
++++ b/drivers/net/ethernet/huawei/hinic/hinic_rx.c |
4996 |
+@@ -74,14 +74,14 @@ void hinic_rxq_get_stats(struct hinic_rxq *rxq, struct hinic_rxq_stats *stats) |
4997 |
+ unsigned int start; |
4998 |
+ |
4999 |
+ do { |
5000 |
+- start = u64_stats_fetch_begin(&rxq_stats->syncp); |
5001 |
++ start = u64_stats_fetch_begin_irq(&rxq_stats->syncp); |
5002 |
+ stats->pkts = rxq_stats->pkts; |
5003 |
+ stats->bytes = rxq_stats->bytes; |
5004 |
+ stats->errors = rxq_stats->csum_errors + |
5005 |
+ rxq_stats->other_errors; |
5006 |
+ stats->csum_errors = rxq_stats->csum_errors; |
5007 |
+ stats->other_errors = rxq_stats->other_errors; |
5008 |
+- } while (u64_stats_fetch_retry(&rxq_stats->syncp, start)); |
5009 |
++ } while (u64_stats_fetch_retry_irq(&rxq_stats->syncp, start)); |
5010 |
+ } |
5011 |
+ |
5012 |
+ /** |
5013 |
+diff --git a/drivers/net/ethernet/huawei/hinic/hinic_tx.c b/drivers/net/ethernet/huawei/hinic/hinic_tx.c |
5014 |
+index d1ea358a1fc06..8d3ec6c729cc7 100644 |
5015 |
+--- a/drivers/net/ethernet/huawei/hinic/hinic_tx.c |
5016 |
++++ b/drivers/net/ethernet/huawei/hinic/hinic_tx.c |
5017 |
+@@ -98,14 +98,14 @@ void hinic_txq_get_stats(struct hinic_txq *txq, struct hinic_txq_stats *stats) |
5018 |
+ unsigned int start; |
5019 |
+ |
5020 |
+ do { |
5021 |
+- start = u64_stats_fetch_begin(&txq_stats->syncp); |
5022 |
++ start = u64_stats_fetch_begin_irq(&txq_stats->syncp); |
5023 |
+ stats->pkts = txq_stats->pkts; |
5024 |
+ stats->bytes = txq_stats->bytes; |
5025 |
+ stats->tx_busy = txq_stats->tx_busy; |
5026 |
+ stats->tx_wake = txq_stats->tx_wake; |
5027 |
+ stats->tx_dropped = txq_stats->tx_dropped; |
5028 |
+ stats->big_frags_pkts = txq_stats->big_frags_pkts; |
5029 |
+- } while (u64_stats_fetch_retry(&txq_stats->syncp, start)); |
5030 |
++ } while (u64_stats_fetch_retry_irq(&txq_stats->syncp, start)); |
5031 |
+ } |
5032 |
+ |
5033 |
+ /** |
5034 |
+diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige.h b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige.h |
5035 |
+index e3509e69ed1c6..3e8725b7f0b70 100644 |
5036 |
+--- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige.h |
5037 |
++++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige.h |
5038 |
+@@ -80,6 +80,7 @@ struct mlxbf_gige { |
5039 |
+ struct net_device *netdev; |
5040 |
+ struct platform_device *pdev; |
5041 |
+ void __iomem *mdio_io; |
5042 |
++ void __iomem *clk_io; |
5043 |
+ struct mii_bus *mdiobus; |
5044 |
+ void __iomem *gpio_io; |
5045 |
+ struct irq_domain *irqdomain; |
5046 |
+@@ -149,7 +150,8 @@ enum mlxbf_gige_res { |
5047 |
+ MLXBF_GIGE_RES_MDIO9, |
5048 |
+ MLXBF_GIGE_RES_GPIO0, |
5049 |
+ MLXBF_GIGE_RES_LLU, |
5050 |
+- MLXBF_GIGE_RES_PLU |
5051 |
++ MLXBF_GIGE_RES_PLU, |
5052 |
++ MLXBF_GIGE_RES_CLK |
5053 |
+ }; |
5054 |
+ |
5055 |
+ /* Version of register data returned by mlxbf_gige_get_regs() */ |
5056 |
+diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c |
5057 |
+index 7905179a95753..f979ba7e5effc 100644 |
5058 |
+--- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c |
5059 |
++++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c |
5060 |
+@@ -22,10 +22,23 @@ |
5061 |
+ #include <linux/property.h> |
5062 |
+ |
5063 |
+ #include "mlxbf_gige.h" |
5064 |
++#include "mlxbf_gige_regs.h" |
5065 |
+ |
5066 |
+ #define MLXBF_GIGE_MDIO_GW_OFFSET 0x0 |
5067 |
+ #define MLXBF_GIGE_MDIO_CFG_OFFSET 0x4 |
5068 |
+ |
5069 |
++#define MLXBF_GIGE_MDIO_FREQ_REFERENCE 156250000ULL |
5070 |
++#define MLXBF_GIGE_MDIO_COREPLL_CONST 16384ULL |
5071 |
++#define MLXBF_GIGE_MDC_CLK_NS 400 |
5072 |
++#define MLXBF_GIGE_MDIO_PLL_I1CLK_REG1 0x4 |
5073 |
++#define MLXBF_GIGE_MDIO_PLL_I1CLK_REG2 0x8 |
5074 |
++#define MLXBF_GIGE_MDIO_CORE_F_SHIFT 0 |
5075 |
++#define MLXBF_GIGE_MDIO_CORE_F_MASK GENMASK(25, 0) |
5076 |
++#define MLXBF_GIGE_MDIO_CORE_R_SHIFT 26 |
5077 |
++#define MLXBF_GIGE_MDIO_CORE_R_MASK GENMASK(31, 26) |
5078 |
++#define MLXBF_GIGE_MDIO_CORE_OD_SHIFT 0 |
5079 |
++#define MLXBF_GIGE_MDIO_CORE_OD_MASK GENMASK(3, 0) |
5080 |
++ |
5081 |
+ /* Support clause 22 */ |
5082 |
+ #define MLXBF_GIGE_MDIO_CL22_ST1 0x1 |
5083 |
+ #define MLXBF_GIGE_MDIO_CL22_WRITE 0x1 |
5084 |
+@@ -50,27 +63,76 @@ |
5085 |
+ #define MLXBF_GIGE_MDIO_CFG_MDIO_IN_SAMP_MASK GENMASK(23, 16) |
5086 |
+ #define MLXBF_GIGE_MDIO_CFG_MDIO_OUT_SAMP_MASK GENMASK(31, 24) |
5087 |
+ |
5088 |
++#define MLXBF_GIGE_MDIO_CFG_VAL (FIELD_PREP(MLXBF_GIGE_MDIO_CFG_MDIO_MODE_MASK, 1) | \ |
5089 |
++ FIELD_PREP(MLXBF_GIGE_MDIO_CFG_MDIO3_3_MASK, 1) | \ |
5090 |
++ FIELD_PREP(MLXBF_GIGE_MDIO_CFG_MDIO_FULL_DRIVE_MASK, 1) | \ |
5091 |
++ FIELD_PREP(MLXBF_GIGE_MDIO_CFG_MDIO_IN_SAMP_MASK, 6) | \ |
5092 |
++ FIELD_PREP(MLXBF_GIGE_MDIO_CFG_MDIO_OUT_SAMP_MASK, 13)) |
5093 |
++ |
5094 |
++#define MLXBF_GIGE_BF2_COREPLL_ADDR 0x02800c30 |
5095 |
++#define MLXBF_GIGE_BF2_COREPLL_SIZE 0x0000000c |
5096 |
++ |
5097 |
++static struct resource corepll_params[] = { |
5098 |
++ [MLXBF_GIGE_VERSION_BF2] = { |
5099 |
++ .start = MLXBF_GIGE_BF2_COREPLL_ADDR, |
5100 |
++ .end = MLXBF_GIGE_BF2_COREPLL_ADDR + MLXBF_GIGE_BF2_COREPLL_SIZE - 1, |
5101 |
++ .name = "COREPLL_RES" |
5102 |
++ }, |
5103 |
++}; |
5104 |
++ |
5105 |
++/* Returns core clock i1clk in Hz */ |
5106 |
++static u64 calculate_i1clk(struct mlxbf_gige *priv) |
5107 |
++{ |
5108 |
++ u8 core_od, core_r; |
5109 |
++ u64 freq_output; |
5110 |
++ u32 reg1, reg2; |
5111 |
++ u32 core_f; |
5112 |
++ |
5113 |
++ reg1 = readl(priv->clk_io + MLXBF_GIGE_MDIO_PLL_I1CLK_REG1); |
5114 |
++ reg2 = readl(priv->clk_io + MLXBF_GIGE_MDIO_PLL_I1CLK_REG2); |
5115 |
++ |
5116 |
++ core_f = (reg1 & MLXBF_GIGE_MDIO_CORE_F_MASK) >> |
5117 |
++ MLXBF_GIGE_MDIO_CORE_F_SHIFT; |
5118 |
++ core_r = (reg1 & MLXBF_GIGE_MDIO_CORE_R_MASK) >> |
5119 |
++ MLXBF_GIGE_MDIO_CORE_R_SHIFT; |
5120 |
++ core_od = (reg2 & MLXBF_GIGE_MDIO_CORE_OD_MASK) >> |
5121 |
++ MLXBF_GIGE_MDIO_CORE_OD_SHIFT; |
5122 |
++ |
5123 |
++ /* Compute PLL output frequency as follow: |
5124 |
++ * |
5125 |
++ * CORE_F / 16384 |
5126 |
++ * freq_output = freq_reference * ---------------------------- |
5127 |
++ * (CORE_R + 1) * (CORE_OD + 1) |
5128 |
++ */ |
5129 |
++ freq_output = div_u64((MLXBF_GIGE_MDIO_FREQ_REFERENCE * core_f), |
5130 |
++ MLXBF_GIGE_MDIO_COREPLL_CONST); |
5131 |
++ freq_output = div_u64(freq_output, (core_r + 1) * (core_od + 1)); |
5132 |
++ |
5133 |
++ return freq_output; |
5134 |
++} |
5135 |
++ |
5136 |
+ /* Formula for encoding the MDIO period. The encoded value is |
5137 |
+ * passed to the MDIO config register. |
5138 |
+ * |
5139 |
+- * mdc_clk = 2*(val + 1)*i1clk |
5140 |
++ * mdc_clk = 2*(val + 1)*(core clock in sec) |
5141 |
+ * |
5142 |
+- * 400 ns = 2*(val + 1)*(((1/430)*1000) ns) |
5143 |
++ * i1clk is in Hz: |
5144 |
++ * 400 ns = 2*(val + 1)*(1/i1clk) |
5145 |
+ * |
5146 |
+- * val = (((400 * 430 / 1000) / 2) - 1) |
5147 |
++ * val = (((400/10^9) / (1/i1clk) / 2) - 1) |
5148 |
++ * val = (400/2 * i1clk)/10^9 - 1 |
5149 |
+ */ |
5150 |
+-#define MLXBF_GIGE_I1CLK_MHZ 430 |
5151 |
+-#define MLXBF_GIGE_MDC_CLK_NS 400 |
5152 |
++static u8 mdio_period_map(struct mlxbf_gige *priv) |
5153 |
++{ |
5154 |
++ u8 mdio_period; |
5155 |
++ u64 i1clk; |
5156 |
+ |
5157 |
+-#define MLXBF_GIGE_MDIO_PERIOD (((MLXBF_GIGE_MDC_CLK_NS * MLXBF_GIGE_I1CLK_MHZ / 1000) / 2) - 1) |
5158 |
++ i1clk = calculate_i1clk(priv); |
5159 |
+ |
5160 |
+-#define MLXBF_GIGE_MDIO_CFG_VAL (FIELD_PREP(MLXBF_GIGE_MDIO_CFG_MDIO_MODE_MASK, 1) | \ |
5161 |
+- FIELD_PREP(MLXBF_GIGE_MDIO_CFG_MDIO3_3_MASK, 1) | \ |
5162 |
+- FIELD_PREP(MLXBF_GIGE_MDIO_CFG_MDIO_FULL_DRIVE_MASK, 1) | \ |
5163 |
+- FIELD_PREP(MLXBF_GIGE_MDIO_CFG_MDC_PERIOD_MASK, \ |
5164 |
+- MLXBF_GIGE_MDIO_PERIOD) | \ |
5165 |
+- FIELD_PREP(MLXBF_GIGE_MDIO_CFG_MDIO_IN_SAMP_MASK, 6) | \ |
5166 |
+- FIELD_PREP(MLXBF_GIGE_MDIO_CFG_MDIO_OUT_SAMP_MASK, 13)) |
5167 |
++ mdio_period = div_u64((MLXBF_GIGE_MDC_CLK_NS >> 1) * i1clk, 1000000000) - 1; |
5168 |
++ |
5169 |
++ return mdio_period; |
5170 |
++} |
5171 |
+ |
5172 |
+ static u32 mlxbf_gige_mdio_create_cmd(u16 data, int phy_add, |
5173 |
+ int phy_reg, u32 opcode) |
5174 |
+@@ -123,9 +185,9 @@ static int mlxbf_gige_mdio_write(struct mii_bus *bus, int phy_add, |
5175 |
+ int phy_reg, u16 val) |
5176 |
+ { |
5177 |
+ struct mlxbf_gige *priv = bus->priv; |
5178 |
++ u32 temp; |
5179 |
+ u32 cmd; |
5180 |
+ int ret; |
5181 |
+- u32 temp; |
5182 |
+ |
5183 |
+ if (phy_reg & MII_ADDR_C45) |
5184 |
+ return -EOPNOTSUPP; |
5185 |
+@@ -142,18 +204,44 @@ static int mlxbf_gige_mdio_write(struct mii_bus *bus, int phy_add, |
5186 |
+ return ret; |
5187 |
+ } |
5188 |
+ |
5189 |
++static void mlxbf_gige_mdio_cfg(struct mlxbf_gige *priv) |
5190 |
++{ |
5191 |
++ u8 mdio_period; |
5192 |
++ u32 val; |
5193 |
++ |
5194 |
++ mdio_period = mdio_period_map(priv); |
5195 |
++ |
5196 |
++ val = MLXBF_GIGE_MDIO_CFG_VAL; |
5197 |
++ val |= FIELD_PREP(MLXBF_GIGE_MDIO_CFG_MDC_PERIOD_MASK, mdio_period); |
5198 |
++ writel(val, priv->mdio_io + MLXBF_GIGE_MDIO_CFG_OFFSET); |
5199 |
++} |
5200 |
++ |
5201 |
+ int mlxbf_gige_mdio_probe(struct platform_device *pdev, struct mlxbf_gige *priv) |
5202 |
+ { |
5203 |
+ struct device *dev = &pdev->dev; |
5204 |
++ struct resource *res; |
5205 |
+ int ret; |
5206 |
+ |
5207 |
+ priv->mdio_io = devm_platform_ioremap_resource(pdev, MLXBF_GIGE_RES_MDIO9); |
5208 |
+ if (IS_ERR(priv->mdio_io)) |
5209 |
+ return PTR_ERR(priv->mdio_io); |
5210 |
+ |
5211 |
+- /* Configure mdio parameters */ |
5212 |
+- writel(MLXBF_GIGE_MDIO_CFG_VAL, |
5213 |
+- priv->mdio_io + MLXBF_GIGE_MDIO_CFG_OFFSET); |
5214 |
++ /* clk resource shared with other drivers so cannot use |
5215 |
++ * devm_platform_ioremap_resource |
5216 |
++ */ |
5217 |
++ res = platform_get_resource(pdev, IORESOURCE_MEM, MLXBF_GIGE_RES_CLK); |
5218 |
++ if (!res) { |
5219 |
++ /* For backward compatibility with older ACPI tables, also keep |
5220 |
++ * CLK resource internal to the driver. |
5221 |
++ */ |
5222 |
++ res = &corepll_params[MLXBF_GIGE_VERSION_BF2]; |
5223 |
++ } |
5224 |
++ |
5225 |
++ priv->clk_io = devm_ioremap(dev, res->start, resource_size(res)); |
5226 |
++ if (IS_ERR(priv->clk_io)) |
5227 |
++ return PTR_ERR(priv->clk_io); |
5228 |
++ |
5229 |
++ mlxbf_gige_mdio_cfg(priv); |
5230 |
+ |
5231 |
+ priv->mdiobus = devm_mdiobus_alloc(dev); |
5232 |
+ if (!priv->mdiobus) { |
5233 |
+diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_regs.h b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_regs.h |
5234 |
+index 5fb33c9294bf9..7be3a793984d5 100644 |
5235 |
+--- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_regs.h |
5236 |
++++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_regs.h |
5237 |
+@@ -8,6 +8,8 @@ |
5238 |
+ #ifndef __MLXBF_GIGE_REGS_H__ |
5239 |
+ #define __MLXBF_GIGE_REGS_H__ |
5240 |
+ |
5241 |
++#define MLXBF_GIGE_VERSION 0x0000 |
5242 |
++#define MLXBF_GIGE_VERSION_BF2 0x0 |
5243 |
+ #define MLXBF_GIGE_STATUS 0x0010 |
5244 |
+ #define MLXBF_GIGE_STATUS_READY BIT(0) |
5245 |
+ #define MLXBF_GIGE_INT_STATUS 0x0028 |
5246 |
+diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_packet.c b/drivers/net/ethernet/microchip/sparx5/sparx5_packet.c |
5247 |
+index 148d431fcde42..c460168131c26 100644 |
5248 |
+--- a/drivers/net/ethernet/microchip/sparx5/sparx5_packet.c |
5249 |
++++ b/drivers/net/ethernet/microchip/sparx5/sparx5_packet.c |
5250 |
+@@ -107,6 +107,8 @@ static void sparx5_xtr_grp(struct sparx5 *sparx5, u8 grp, bool byte_swap) |
5251 |
+ /* This assumes STATUS_WORD_POS == 1, Status |
5252 |
+ * just after last data |
5253 |
+ */ |
5254 |
++ if (!byte_swap) |
5255 |
++ val = ntohl((__force __be32)val); |
5256 |
+ byte_cnt -= (4 - XTR_VALID_BYTES(val)); |
5257 |
+ eof_flag = true; |
5258 |
+ break; |
5259 |
+diff --git a/drivers/net/ethernet/netronome/nfp/nfp_net_common.c b/drivers/net/ethernet/netronome/nfp/nfp_net_common.c |
5260 |
+index 850bfdf83d0a4..69ac205bbdbd0 100644 |
5261 |
+--- a/drivers/net/ethernet/netronome/nfp/nfp_net_common.c |
5262 |
++++ b/drivers/net/ethernet/netronome/nfp/nfp_net_common.c |
5263 |
+@@ -3482,21 +3482,21 @@ static void nfp_net_stat64(struct net_device *netdev, |
5264 |
+ unsigned int start; |
5265 |
+ |
5266 |
+ do { |
5267 |
+- start = u64_stats_fetch_begin(&r_vec->rx_sync); |
5268 |
++ start = u64_stats_fetch_begin_irq(&r_vec->rx_sync); |
5269 |
+ data[0] = r_vec->rx_pkts; |
5270 |
+ data[1] = r_vec->rx_bytes; |
5271 |
+ data[2] = r_vec->rx_drops; |
5272 |
+- } while (u64_stats_fetch_retry(&r_vec->rx_sync, start)); |
5273 |
++ } while (u64_stats_fetch_retry_irq(&r_vec->rx_sync, start)); |
5274 |
+ stats->rx_packets += data[0]; |
5275 |
+ stats->rx_bytes += data[1]; |
5276 |
+ stats->rx_dropped += data[2]; |
5277 |
+ |
5278 |
+ do { |
5279 |
+- start = u64_stats_fetch_begin(&r_vec->tx_sync); |
5280 |
++ start = u64_stats_fetch_begin_irq(&r_vec->tx_sync); |
5281 |
+ data[0] = r_vec->tx_pkts; |
5282 |
+ data[1] = r_vec->tx_bytes; |
5283 |
+ data[2] = r_vec->tx_errors; |
5284 |
+- } while (u64_stats_fetch_retry(&r_vec->tx_sync, start)); |
5285 |
++ } while (u64_stats_fetch_retry_irq(&r_vec->tx_sync, start)); |
5286 |
+ stats->tx_packets += data[0]; |
5287 |
+ stats->tx_bytes += data[1]; |
5288 |
+ stats->tx_errors += data[2]; |
5289 |
+diff --git a/drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c b/drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c |
5290 |
+index ae72cde713438..62546d197bfd2 100644 |
5291 |
+--- a/drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c |
5292 |
++++ b/drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c |
5293 |
+@@ -483,7 +483,7 @@ static u64 *nfp_vnic_get_sw_stats(struct net_device *netdev, u64 *data) |
5294 |
+ unsigned int start; |
5295 |
+ |
5296 |
+ do { |
5297 |
+- start = u64_stats_fetch_begin(&nn->r_vecs[i].rx_sync); |
5298 |
++ start = u64_stats_fetch_begin_irq(&nn->r_vecs[i].rx_sync); |
5299 |
+ data[0] = nn->r_vecs[i].rx_pkts; |
5300 |
+ tmp[0] = nn->r_vecs[i].hw_csum_rx_ok; |
5301 |
+ tmp[1] = nn->r_vecs[i].hw_csum_rx_inner_ok; |
5302 |
+@@ -491,10 +491,10 @@ static u64 *nfp_vnic_get_sw_stats(struct net_device *netdev, u64 *data) |
5303 |
+ tmp[3] = nn->r_vecs[i].hw_csum_rx_error; |
5304 |
+ tmp[4] = nn->r_vecs[i].rx_replace_buf_alloc_fail; |
5305 |
+ tmp[5] = nn->r_vecs[i].hw_tls_rx; |
5306 |
+- } while (u64_stats_fetch_retry(&nn->r_vecs[i].rx_sync, start)); |
5307 |
++ } while (u64_stats_fetch_retry_irq(&nn->r_vecs[i].rx_sync, start)); |
5308 |
+ |
5309 |
+ do { |
5310 |
+- start = u64_stats_fetch_begin(&nn->r_vecs[i].tx_sync); |
5311 |
++ start = u64_stats_fetch_begin_irq(&nn->r_vecs[i].tx_sync); |
5312 |
+ data[1] = nn->r_vecs[i].tx_pkts; |
5313 |
+ data[2] = nn->r_vecs[i].tx_busy; |
5314 |
+ tmp[6] = nn->r_vecs[i].hw_csum_tx; |
5315 |
+@@ -504,7 +504,7 @@ static u64 *nfp_vnic_get_sw_stats(struct net_device *netdev, u64 *data) |
5316 |
+ tmp[10] = nn->r_vecs[i].hw_tls_tx; |
5317 |
+ tmp[11] = nn->r_vecs[i].tls_tx_fallback; |
5318 |
+ tmp[12] = nn->r_vecs[i].tls_tx_no_fallback; |
5319 |
+- } while (u64_stats_fetch_retry(&nn->r_vecs[i].tx_sync, start)); |
5320 |
++ } while (u64_stats_fetch_retry_irq(&nn->r_vecs[i].tx_sync, start)); |
5321 |
+ |
5322 |
+ data += NN_RVEC_PER_Q_STATS; |
5323 |
+ |
5324 |
+diff --git a/drivers/net/ethernet/rocker/rocker_ofdpa.c b/drivers/net/ethernet/rocker/rocker_ofdpa.c |
5325 |
+index bc70c6abd6a5b..58cf7cc54f408 100644 |
5326 |
+--- a/drivers/net/ethernet/rocker/rocker_ofdpa.c |
5327 |
++++ b/drivers/net/ethernet/rocker/rocker_ofdpa.c |
5328 |
+@@ -1273,7 +1273,7 @@ static int ofdpa_port_ipv4_neigh(struct ofdpa_port *ofdpa_port, |
5329 |
+ bool removing; |
5330 |
+ int err = 0; |
5331 |
+ |
5332 |
+- entry = kzalloc(sizeof(*entry), GFP_KERNEL); |
5333 |
++ entry = kzalloc(sizeof(*entry), GFP_ATOMIC); |
5334 |
+ if (!entry) |
5335 |
+ return -ENOMEM; |
5336 |
+ |
5337 |
+diff --git a/drivers/net/ethernet/smsc/smsc911x.c b/drivers/net/ethernet/smsc/smsc911x.c |
5338 |
+index 592e191adbf7d..63b99dd8ca51c 100644 |
5339 |
+--- a/drivers/net/ethernet/smsc/smsc911x.c |
5340 |
++++ b/drivers/net/ethernet/smsc/smsc911x.c |
5341 |
+@@ -1037,6 +1037,8 @@ static int smsc911x_mii_probe(struct net_device *dev) |
5342 |
+ return ret; |
5343 |
+ } |
5344 |
+ |
5345 |
++ /* Indicate that the MAC is responsible for managing PHY PM */ |
5346 |
++ phydev->mac_managed_pm = true; |
5347 |
+ phy_attached_info(phydev); |
5348 |
+ |
5349 |
+ phy_set_max_speed(phydev, SPEED_100); |
5350 |
+@@ -2584,6 +2586,8 @@ static int smsc911x_suspend(struct device *dev) |
5351 |
+ if (netif_running(ndev)) { |
5352 |
+ netif_stop_queue(ndev); |
5353 |
+ netif_device_detach(ndev); |
5354 |
++ if (!device_may_wakeup(dev)) |
5355 |
++ phy_stop(ndev->phydev); |
5356 |
+ } |
5357 |
+ |
5358 |
+ /* enable wake on LAN, energy detection and the external PME |
5359 |
+@@ -2625,6 +2629,8 @@ static int smsc911x_resume(struct device *dev) |
5360 |
+ if (netif_running(ndev)) { |
5361 |
+ netif_device_attach(ndev); |
5362 |
+ netif_start_queue(ndev); |
5363 |
++ if (!device_may_wakeup(dev)) |
5364 |
++ phy_start(ndev->phydev); |
5365 |
+ } |
5366 |
+ |
5367 |
+ return 0; |
5368 |
+diff --git a/drivers/net/ieee802154/adf7242.c b/drivers/net/ieee802154/adf7242.c |
5369 |
+index 7db9cbd0f5ded..07adbeec19787 100644 |
5370 |
+--- a/drivers/net/ieee802154/adf7242.c |
5371 |
++++ b/drivers/net/ieee802154/adf7242.c |
5372 |
+@@ -1310,10 +1310,11 @@ static int adf7242_remove(struct spi_device *spi) |
5373 |
+ |
5374 |
+ debugfs_remove_recursive(lp->debugfs_root); |
5375 |
+ |
5376 |
++ ieee802154_unregister_hw(lp->hw); |
5377 |
++ |
5378 |
+ cancel_delayed_work_sync(&lp->work); |
5379 |
+ destroy_workqueue(lp->wqueue); |
5380 |
+ |
5381 |
+- ieee802154_unregister_hw(lp->hw); |
5382 |
+ mutex_destroy(&lp->bmux); |
5383 |
+ ieee802154_free_hw(lp->hw); |
5384 |
+ |
5385 |
+diff --git a/drivers/net/netdevsim/netdev.c b/drivers/net/netdevsim/netdev.c |
5386 |
+index 50572e0f1f529..84741715f6705 100644 |
5387 |
+--- a/drivers/net/netdevsim/netdev.c |
5388 |
++++ b/drivers/net/netdevsim/netdev.c |
5389 |
+@@ -67,10 +67,10 @@ nsim_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats) |
5390 |
+ unsigned int start; |
5391 |
+ |
5392 |
+ do { |
5393 |
+- start = u64_stats_fetch_begin(&ns->syncp); |
5394 |
++ start = u64_stats_fetch_begin_irq(&ns->syncp); |
5395 |
+ stats->tx_bytes = ns->tx_bytes; |
5396 |
+ stats->tx_packets = ns->tx_packets; |
5397 |
+- } while (u64_stats_fetch_retry(&ns->syncp, start)); |
5398 |
++ } while (u64_stats_fetch_retry_irq(&ns->syncp, start)); |
5399 |
+ } |
5400 |
+ |
5401 |
+ static int |
5402 |
+diff --git a/drivers/platform/x86/pmc_atom.c b/drivers/platform/x86/pmc_atom.c |
5403 |
+index a9d2a4b98e570..4b0739f95f8b9 100644 |
5404 |
+--- a/drivers/platform/x86/pmc_atom.c |
5405 |
++++ b/drivers/platform/x86/pmc_atom.c |
5406 |
+@@ -244,7 +244,7 @@ static void pmc_power_off(void) |
5407 |
+ pm1_cnt_port = acpi_base_addr + PM1_CNT; |
5408 |
+ |
5409 |
+ pm1_cnt_value = inl(pm1_cnt_port); |
5410 |
+- pm1_cnt_value &= SLEEP_TYPE_MASK; |
5411 |
++ pm1_cnt_value &= ~SLEEP_TYPE_MASK; |
5412 |
+ pm1_cnt_value |= SLEEP_TYPE_S5; |
5413 |
+ pm1_cnt_value |= SLEEP_ENABLE; |
5414 |
+ |
5415 |
+diff --git a/drivers/soundwire/qcom.c b/drivers/soundwire/qcom.c |
5416 |
+index 2adc0a75c0515..1ce6f948e9a42 100644 |
5417 |
+--- a/drivers/soundwire/qcom.c |
5418 |
++++ b/drivers/soundwire/qcom.c |
5419 |
+@@ -148,7 +148,7 @@ struct qcom_swrm_ctrl { |
5420 |
+ u8 wcmd_id; |
5421 |
+ struct qcom_swrm_port_config pconfig[QCOM_SDW_MAX_PORTS]; |
5422 |
+ struct sdw_stream_runtime *sruntime[SWRM_MAX_DAIS]; |
5423 |
+- enum sdw_slave_status status[SDW_MAX_DEVICES]; |
5424 |
++ enum sdw_slave_status status[SDW_MAX_DEVICES + 1]; |
5425 |
+ int (*reg_read)(struct qcom_swrm_ctrl *ctrl, int reg, u32 *val); |
5426 |
+ int (*reg_write)(struct qcom_swrm_ctrl *ctrl, int reg, int val); |
5427 |
+ u32 slave_status; |
5428 |
+@@ -391,7 +391,7 @@ static int qcom_swrm_get_alert_slave_dev_num(struct qcom_swrm_ctrl *ctrl) |
5429 |
+ |
5430 |
+ ctrl->reg_read(ctrl, SWRM_MCP_SLV_STATUS, &val); |
5431 |
+ |
5432 |
+- for (dev_num = 0; dev_num < SDW_MAX_DEVICES; dev_num++) { |
5433 |
++ for (dev_num = 0; dev_num <= SDW_MAX_DEVICES; dev_num++) { |
5434 |
+ status = (val >> (dev_num * SWRM_MCP_SLV_STATUS_SZ)); |
5435 |
+ |
5436 |
+ if ((status & SWRM_MCP_SLV_STATUS_MASK) == SDW_SLAVE_ALERT) { |
5437 |
+@@ -411,7 +411,7 @@ static void qcom_swrm_get_device_status(struct qcom_swrm_ctrl *ctrl) |
5438 |
+ ctrl->reg_read(ctrl, SWRM_MCP_SLV_STATUS, &val); |
5439 |
+ ctrl->slave_status = val; |
5440 |
+ |
5441 |
+- for (i = 0; i < SDW_MAX_DEVICES; i++) { |
5442 |
++ for (i = 0; i <= SDW_MAX_DEVICES; i++) { |
5443 |
+ u32 s; |
5444 |
+ |
5445 |
+ s = (val >> (i * 2)); |
5446 |
+diff --git a/drivers/staging/r8188eu/os_dep/os_intfs.c b/drivers/staging/r8188eu/os_dep/os_intfs.c |
5447 |
+index 8d0158f4a45d0..30caa1139c8eb 100644 |
5448 |
+--- a/drivers/staging/r8188eu/os_dep/os_intfs.c |
5449 |
++++ b/drivers/staging/r8188eu/os_dep/os_intfs.c |
5450 |
+@@ -17,6 +17,7 @@ MODULE_LICENSE("GPL"); |
5451 |
+ MODULE_DESCRIPTION("Realtek Wireless Lan Driver"); |
5452 |
+ MODULE_AUTHOR("Realtek Semiconductor Corp."); |
5453 |
+ MODULE_VERSION(DRIVERVERSION); |
5454 |
++MODULE_FIRMWARE("rtlwifi/rtl8188eufw.bin"); |
5455 |
+ |
5456 |
+ #define CONFIG_BR_EXT_BRNAME "br0" |
5457 |
+ #define RTW_NOTCH_FILTER 0 /* 0:Disable, 1:Enable, */ |
5458 |
+diff --git a/drivers/staging/rtl8712/rtl8712_cmd.c b/drivers/staging/rtl8712/rtl8712_cmd.c |
5459 |
+index e9294e1ed06eb..eacf5efa34307 100644 |
5460 |
+--- a/drivers/staging/rtl8712/rtl8712_cmd.c |
5461 |
++++ b/drivers/staging/rtl8712/rtl8712_cmd.c |
5462 |
+@@ -117,34 +117,6 @@ static void r871x_internal_cmd_hdl(struct _adapter *padapter, u8 *pbuf) |
5463 |
+ kfree(pdrvcmd->pbuf); |
5464 |
+ } |
5465 |
+ |
5466 |
+-static u8 read_macreg_hdl(struct _adapter *padapter, u8 *pbuf) |
5467 |
+-{ |
5468 |
+- void (*pcmd_callback)(struct _adapter *dev, struct cmd_obj *pcmd); |
5469 |
+- struct cmd_obj *pcmd = (struct cmd_obj *)pbuf; |
5470 |
+- |
5471 |
+- /* invoke cmd->callback function */ |
5472 |
+- pcmd_callback = cmd_callback[pcmd->cmdcode].callback; |
5473 |
+- if (!pcmd_callback) |
5474 |
+- r8712_free_cmd_obj(pcmd); |
5475 |
+- else |
5476 |
+- pcmd_callback(padapter, pcmd); |
5477 |
+- return H2C_SUCCESS; |
5478 |
+-} |
5479 |
+- |
5480 |
+-static u8 write_macreg_hdl(struct _adapter *padapter, u8 *pbuf) |
5481 |
+-{ |
5482 |
+- void (*pcmd_callback)(struct _adapter *dev, struct cmd_obj *pcmd); |
5483 |
+- struct cmd_obj *pcmd = (struct cmd_obj *)pbuf; |
5484 |
+- |
5485 |
+- /* invoke cmd->callback function */ |
5486 |
+- pcmd_callback = cmd_callback[pcmd->cmdcode].callback; |
5487 |
+- if (!pcmd_callback) |
5488 |
+- r8712_free_cmd_obj(pcmd); |
5489 |
+- else |
5490 |
+- pcmd_callback(padapter, pcmd); |
5491 |
+- return H2C_SUCCESS; |
5492 |
+-} |
5493 |
+- |
5494 |
+ static u8 read_bbreg_hdl(struct _adapter *padapter, u8 *pbuf) |
5495 |
+ { |
5496 |
+ struct cmd_obj *pcmd = (struct cmd_obj *)pbuf; |
5497 |
+@@ -213,14 +185,6 @@ static struct cmd_obj *cmd_hdl_filter(struct _adapter *padapter, |
5498 |
+ pcmd_r = NULL; |
5499 |
+ |
5500 |
+ switch (pcmd->cmdcode) { |
5501 |
+- case GEN_CMD_CODE(_Read_MACREG): |
5502 |
+- read_macreg_hdl(padapter, (u8 *)pcmd); |
5503 |
+- pcmd_r = pcmd; |
5504 |
+- break; |
5505 |
+- case GEN_CMD_CODE(_Write_MACREG): |
5506 |
+- write_macreg_hdl(padapter, (u8 *)pcmd); |
5507 |
+- pcmd_r = pcmd; |
5508 |
+- break; |
5509 |
+ case GEN_CMD_CODE(_Read_BBREG): |
5510 |
+ read_bbreg_hdl(padapter, (u8 *)pcmd); |
5511 |
+ break; |
5512 |
+diff --git a/drivers/thunderbolt/ctl.c b/drivers/thunderbolt/ctl.c |
5513 |
+index 0fb5e04191e24..409ee1551a7cf 100644 |
5514 |
+--- a/drivers/thunderbolt/ctl.c |
5515 |
++++ b/drivers/thunderbolt/ctl.c |
5516 |
+@@ -408,7 +408,7 @@ static void tb_ctl_rx_submit(struct ctl_pkg *pkg) |
5517 |
+ |
5518 |
+ static int tb_async_error(const struct ctl_pkg *pkg) |
5519 |
+ { |
5520 |
+- const struct cfg_error_pkg *error = (const struct cfg_error_pkg *)pkg; |
5521 |
++ const struct cfg_error_pkg *error = pkg->buffer; |
5522 |
+ |
5523 |
+ if (pkg->frame.eof != TB_CFG_PKG_ERROR) |
5524 |
+ return false; |
5525 |
+diff --git a/drivers/tty/n_gsm.c b/drivers/tty/n_gsm.c |
5526 |
+index b89655f585f14..154697be11b0a 100644 |
5527 |
+--- a/drivers/tty/n_gsm.c |
5528 |
++++ b/drivers/tty/n_gsm.c |
5529 |
+@@ -2753,7 +2753,8 @@ static void gsmld_receive_buf(struct tty_struct *tty, const unsigned char *cp, |
5530 |
+ flags = *fp++; |
5531 |
+ switch (flags) { |
5532 |
+ case TTY_NORMAL: |
5533 |
+- gsm->receive(gsm, *cp); |
5534 |
++ if (gsm->receive) |
5535 |
++ gsm->receive(gsm, *cp); |
5536 |
+ break; |
5537 |
+ case TTY_OVERRUN: |
5538 |
+ case TTY_BREAK: |
5539 |
+diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c |
5540 |
+index 4155bd10711da..bf11ffafcad53 100644 |
5541 |
+--- a/drivers/tty/serial/fsl_lpuart.c |
5542 |
++++ b/drivers/tty/serial/fsl_lpuart.c |
5543 |
+@@ -1381,9 +1381,9 @@ static int lpuart_config_rs485(struct uart_port *port, |
5544 |
+ * Note: UART is assumed to be active high. |
5545 |
+ */ |
5546 |
+ if (rs485->flags & SER_RS485_RTS_ON_SEND) |
5547 |
+- modem &= ~UARTMODEM_TXRTSPOL; |
5548 |
+- else if (rs485->flags & SER_RS485_RTS_AFTER_SEND) |
5549 |
+ modem |= UARTMODEM_TXRTSPOL; |
5550 |
++ else if (rs485->flags & SER_RS485_RTS_AFTER_SEND) |
5551 |
++ modem &= ~UARTMODEM_TXRTSPOL; |
5552 |
+ } |
5553 |
+ |
5554 |
+ /* Store the new configuration */ |
5555 |
+@@ -2203,6 +2203,7 @@ lpuart32_set_termios(struct uart_port *port, struct ktermios *termios, |
5556 |
+ uart_update_timeout(port, termios->c_cflag, baud); |
5557 |
+ |
5558 |
+ /* wait transmit engin complete */ |
5559 |
++ lpuart32_write(&sport->port, 0, UARTMODIR); |
5560 |
+ lpuart32_wait_bit_set(&sport->port, UARTSTAT, UARTSTAT_TC); |
5561 |
+ |
5562 |
+ /* disable transmit and receive */ |
5563 |
+diff --git a/drivers/tty/vt/vt.c b/drivers/tty/vt/vt.c |
5564 |
+index 6eaf8eb846619..b8f5bc19416d9 100644 |
5565 |
+--- a/drivers/tty/vt/vt.c |
5566 |
++++ b/drivers/tty/vt/vt.c |
5567 |
+@@ -4662,9 +4662,11 @@ static int con_font_set(struct vc_data *vc, struct console_font_op *op) |
5568 |
+ console_lock(); |
5569 |
+ if (vc->vc_mode != KD_TEXT) |
5570 |
+ rc = -EINVAL; |
5571 |
+- else if (vc->vc_sw->con_font_set) |
5572 |
++ else if (vc->vc_sw->con_font_set) { |
5573 |
++ if (vc_is_sel(vc)) |
5574 |
++ clear_selection(); |
5575 |
+ rc = vc->vc_sw->con_font_set(vc, &font, op->flags); |
5576 |
+- else |
5577 |
++ } else |
5578 |
+ rc = -ENOSYS; |
5579 |
+ console_unlock(); |
5580 |
+ kfree(font.data); |
5581 |
+@@ -4691,9 +4693,11 @@ static int con_font_default(struct vc_data *vc, struct console_font_op *op) |
5582 |
+ console_unlock(); |
5583 |
+ return -EINVAL; |
5584 |
+ } |
5585 |
+- if (vc->vc_sw->con_font_default) |
5586 |
++ if (vc->vc_sw->con_font_default) { |
5587 |
++ if (vc_is_sel(vc)) |
5588 |
++ clear_selection(); |
5589 |
+ rc = vc->vc_sw->con_font_default(vc, &font, s); |
5590 |
+- else |
5591 |
++ } else |
5592 |
+ rc = -ENOSYS; |
5593 |
+ console_unlock(); |
5594 |
+ if (!rc) { |
5595 |
+diff --git a/drivers/usb/cdns3/cdns3-gadget.c b/drivers/usb/cdns3/cdns3-gadget.c |
5596 |
+index 3f1ce89110776..1802f6818e632 100644 |
5597 |
+--- a/drivers/usb/cdns3/cdns3-gadget.c |
5598 |
++++ b/drivers/usb/cdns3/cdns3-gadget.c |
5599 |
+@@ -1530,7 +1530,8 @@ static void cdns3_transfer_completed(struct cdns3_device *priv_dev, |
5600 |
+ TRB_LEN(le32_to_cpu(trb->length)); |
5601 |
+ |
5602 |
+ if (priv_req->num_of_trb > 1 && |
5603 |
+- le32_to_cpu(trb->control) & TRB_SMM) |
5604 |
++ le32_to_cpu(trb->control) & TRB_SMM && |
5605 |
++ le32_to_cpu(trb->control) & TRB_CHAIN) |
5606 |
+ transfer_end = true; |
5607 |
+ |
5608 |
+ cdns3_ep_inc_deq(priv_ep); |
5609 |
+@@ -1690,6 +1691,7 @@ static int cdns3_check_ep_interrupt_proceed(struct cdns3_endpoint *priv_ep) |
5610 |
+ ep_cfg &= ~EP_CFG_ENABLE; |
5611 |
+ writel(ep_cfg, &priv_dev->regs->ep_cfg); |
5612 |
+ priv_ep->flags &= ~EP_QUIRK_ISO_OUT_EN; |
5613 |
++ priv_ep->flags |= EP_UPDATE_EP_TRBADDR; |
5614 |
+ } |
5615 |
+ cdns3_transfer_completed(priv_dev, priv_ep); |
5616 |
+ } else if (!(priv_ep->flags & EP_STALLED) && |
5617 |
+diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c |
5618 |
+index 7b2e2420ecaea..adc154b691d05 100644 |
5619 |
+--- a/drivers/usb/class/cdc-acm.c |
5620 |
++++ b/drivers/usb/class/cdc-acm.c |
5621 |
+@@ -1814,6 +1814,9 @@ static const struct usb_device_id acm_ids[] = { |
5622 |
+ { USB_DEVICE(0x09d8, 0x0320), /* Elatec GmbH TWN3 */ |
5623 |
+ .driver_info = NO_UNION_NORMAL, /* has misplaced union descriptor */ |
5624 |
+ }, |
5625 |
++ { USB_DEVICE(0x0c26, 0x0020), /* Icom ICF3400 Serie */ |
5626 |
++ .driver_info = NO_UNION_NORMAL, /* reports zero length descriptor */ |
5627 |
++ }, |
5628 |
+ { USB_DEVICE(0x0ca6, 0xa050), /* Castles VEGA3000 */ |
5629 |
+ .driver_info = NO_UNION_NORMAL, /* reports zero length descriptor */ |
5630 |
+ }, |
5631 |
+diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c |
5632 |
+index ac6c5ccfe1cb7..23896c8e018a3 100644 |
5633 |
+--- a/drivers/usb/core/hub.c |
5634 |
++++ b/drivers/usb/core/hub.c |
5635 |
+@@ -6043,6 +6043,11 @@ re_enumerate_no_bos: |
5636 |
+ * the reset is over (using their post_reset method). |
5637 |
+ * |
5638 |
+ * Return: The same as for usb_reset_and_verify_device(). |
5639 |
++ * However, if a reset is already in progress (for instance, if a |
5640 |
++ * driver doesn't have pre_ or post_reset() callbacks, and while |
5641 |
++ * being unbound or re-bound during the ongoing reset its disconnect() |
5642 |
++ * or probe() routine tries to perform a second, nested reset), the |
5643 |
++ * routine returns -EINPROGRESS. |
5644 |
+ * |
5645 |
+ * Note: |
5646 |
+ * The caller must own the device lock. For example, it's safe to use |
5647 |
+@@ -6076,6 +6081,10 @@ int usb_reset_device(struct usb_device *udev) |
5648 |
+ return -EISDIR; |
5649 |
+ } |
5650 |
+ |
5651 |
++ if (udev->reset_in_progress) |
5652 |
++ return -EINPROGRESS; |
5653 |
++ udev->reset_in_progress = 1; |
5654 |
++ |
5655 |
+ port_dev = hub->ports[udev->portnum - 1]; |
5656 |
+ |
5657 |
+ /* |
5658 |
+@@ -6140,6 +6149,7 @@ int usb_reset_device(struct usb_device *udev) |
5659 |
+ |
5660 |
+ usb_autosuspend_device(udev); |
5661 |
+ memalloc_noio_restore(noio_flag); |
5662 |
++ udev->reset_in_progress = 0; |
5663 |
+ return ret; |
5664 |
+ } |
5665 |
+ EXPORT_SYMBOL_GPL(usb_reset_device); |
5666 |
+diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c |
5667 |
+index c331a5128c2c0..265d437ca0f11 100644 |
5668 |
+--- a/drivers/usb/dwc2/platform.c |
5669 |
++++ b/drivers/usb/dwc2/platform.c |
5670 |
+@@ -154,9 +154,9 @@ static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg) |
5671 |
+ } else if (hsotg->plat && hsotg->plat->phy_init) { |
5672 |
+ ret = hsotg->plat->phy_init(pdev, hsotg->plat->phy_type); |
5673 |
+ } else { |
5674 |
+- ret = phy_power_on(hsotg->phy); |
5675 |
++ ret = phy_init(hsotg->phy); |
5676 |
+ if (ret == 0) |
5677 |
+- ret = phy_init(hsotg->phy); |
5678 |
++ ret = phy_power_on(hsotg->phy); |
5679 |
+ } |
5680 |
+ |
5681 |
+ return ret; |
5682 |
+@@ -188,9 +188,9 @@ static int __dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg) |
5683 |
+ } else if (hsotg->plat && hsotg->plat->phy_exit) { |
5684 |
+ ret = hsotg->plat->phy_exit(pdev, hsotg->plat->phy_type); |
5685 |
+ } else { |
5686 |
+- ret = phy_exit(hsotg->phy); |
5687 |
++ ret = phy_power_off(hsotg->phy); |
5688 |
+ if (ret == 0) |
5689 |
+- ret = phy_power_off(hsotg->phy); |
5690 |
++ ret = phy_exit(hsotg->phy); |
5691 |
+ } |
5692 |
+ if (ret) |
5693 |
+ return ret; |
5694 |
+diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c |
5695 |
+index cfac5503aa662..9c24cf46b9a08 100644 |
5696 |
+--- a/drivers/usb/dwc3/core.c |
5697 |
++++ b/drivers/usb/dwc3/core.c |
5698 |
+@@ -731,15 +731,16 @@ static void dwc3_core_exit(struct dwc3 *dwc) |
5699 |
+ { |
5700 |
+ dwc3_event_buffers_cleanup(dwc); |
5701 |
+ |
5702 |
++ usb_phy_set_suspend(dwc->usb2_phy, 1); |
5703 |
++ usb_phy_set_suspend(dwc->usb3_phy, 1); |
5704 |
++ phy_power_off(dwc->usb2_generic_phy); |
5705 |
++ phy_power_off(dwc->usb3_generic_phy); |
5706 |
++ |
5707 |
+ usb_phy_shutdown(dwc->usb2_phy); |
5708 |
+ usb_phy_shutdown(dwc->usb3_phy); |
5709 |
+ phy_exit(dwc->usb2_generic_phy); |
5710 |
+ phy_exit(dwc->usb3_generic_phy); |
5711 |
+ |
5712 |
+- usb_phy_set_suspend(dwc->usb2_phy, 1); |
5713 |
+- usb_phy_set_suspend(dwc->usb3_phy, 1); |
5714 |
+- phy_power_off(dwc->usb2_generic_phy); |
5715 |
+- phy_power_off(dwc->usb3_generic_phy); |
5716 |
+ clk_bulk_disable_unprepare(dwc->num_clks, dwc->clks); |
5717 |
+ reset_control_assert(dwc->reset); |
5718 |
+ } |
5719 |
+@@ -1662,16 +1663,16 @@ err5: |
5720 |
+ dwc3_debugfs_exit(dwc); |
5721 |
+ dwc3_event_buffers_cleanup(dwc); |
5722 |
+ |
5723 |
+- usb_phy_shutdown(dwc->usb2_phy); |
5724 |
+- usb_phy_shutdown(dwc->usb3_phy); |
5725 |
+- phy_exit(dwc->usb2_generic_phy); |
5726 |
+- phy_exit(dwc->usb3_generic_phy); |
5727 |
+- |
5728 |
+ usb_phy_set_suspend(dwc->usb2_phy, 1); |
5729 |
+ usb_phy_set_suspend(dwc->usb3_phy, 1); |
5730 |
+ phy_power_off(dwc->usb2_generic_phy); |
5731 |
+ phy_power_off(dwc->usb3_generic_phy); |
5732 |
+ |
5733 |
++ usb_phy_shutdown(dwc->usb2_phy); |
5734 |
++ usb_phy_shutdown(dwc->usb3_phy); |
5735 |
++ phy_exit(dwc->usb2_generic_phy); |
5736 |
++ phy_exit(dwc->usb3_generic_phy); |
5737 |
++ |
5738 |
+ dwc3_ulpi_exit(dwc); |
5739 |
+ |
5740 |
+ err4: |
5741 |
+diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c |
5742 |
+index 9c8887615701f..c52f7b5b5ec00 100644 |
5743 |
+--- a/drivers/usb/dwc3/dwc3-pci.c |
5744 |
++++ b/drivers/usb/dwc3/dwc3-pci.c |
5745 |
+@@ -43,6 +43,7 @@ |
5746 |
+ #define PCI_DEVICE_ID_INTEL_ADLP 0x51ee |
5747 |
+ #define PCI_DEVICE_ID_INTEL_ADLM 0x54ee |
5748 |
+ #define PCI_DEVICE_ID_INTEL_ADLS 0x7ae1 |
5749 |
++#define PCI_DEVICE_ID_INTEL_RPL 0x460e |
5750 |
+ #define PCI_DEVICE_ID_INTEL_RPLS 0x7a61 |
5751 |
+ #define PCI_DEVICE_ID_INTEL_MTLP 0x7ec1 |
5752 |
+ #define PCI_DEVICE_ID_INTEL_MTL 0x7e7e |
5753 |
+@@ -420,6 +421,9 @@ static const struct pci_device_id dwc3_pci_id_table[] = { |
5754 |
+ { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ADLS), |
5755 |
+ (kernel_ulong_t) &dwc3_pci_intel_swnode, }, |
5756 |
+ |
5757 |
++ { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_RPL), |
5758 |
++ (kernel_ulong_t) &dwc3_pci_intel_swnode, }, |
5759 |
++ |
5760 |
+ { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_RPLS), |
5761 |
+ (kernel_ulong_t) &dwc3_pci_intel_swnode, }, |
5762 |
+ |
5763 |
+diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c |
5764 |
+index 873bf5041117f..d0352daab0128 100644 |
5765 |
+--- a/drivers/usb/dwc3/dwc3-qcom.c |
5766 |
++++ b/drivers/usb/dwc3/dwc3-qcom.c |
5767 |
+@@ -296,6 +296,14 @@ static void dwc3_qcom_interconnect_exit(struct dwc3_qcom *qcom) |
5768 |
+ icc_put(qcom->icc_path_apps); |
5769 |
+ } |
5770 |
+ |
5771 |
++/* Only usable in contexts where the role can not change. */ |
5772 |
++static bool dwc3_qcom_is_host(struct dwc3_qcom *qcom) |
5773 |
++{ |
5774 |
++ struct dwc3 *dwc = platform_get_drvdata(qcom->dwc3); |
5775 |
++ |
5776 |
++ return dwc->xhci; |
5777 |
++} |
5778 |
++ |
5779 |
+ static void dwc3_qcom_disable_interrupts(struct dwc3_qcom *qcom) |
5780 |
+ { |
5781 |
+ if (qcom->hs_phy_irq) { |
5782 |
+@@ -411,7 +419,11 @@ static irqreturn_t qcom_dwc3_resume_irq(int irq, void *data) |
5783 |
+ if (qcom->pm_suspended) |
5784 |
+ return IRQ_HANDLED; |
5785 |
+ |
5786 |
+- if (dwc->xhci) |
5787 |
++ /* |
5788 |
++ * This is safe as role switching is done from a freezable workqueue |
5789 |
++ * and the wakeup interrupts are disabled as part of resume. |
5790 |
++ */ |
5791 |
++ if (dwc3_qcom_is_host(qcom)) |
5792 |
+ pm_runtime_resume(&dwc->xhci->dev); |
5793 |
+ |
5794 |
+ return IRQ_HANDLED; |
5795 |
+diff --git a/drivers/usb/dwc3/host.c b/drivers/usb/dwc3/host.c |
5796 |
+index f29a264635aa1..85165a972076d 100644 |
5797 |
+--- a/drivers/usb/dwc3/host.c |
5798 |
++++ b/drivers/usb/dwc3/host.c |
5799 |
+@@ -10,8 +10,13 @@ |
5800 |
+ #include <linux/acpi.h> |
5801 |
+ #include <linux/platform_device.h> |
5802 |
+ |
5803 |
++#include "../host/xhci-plat.h" |
5804 |
+ #include "core.h" |
5805 |
+ |
5806 |
++static const struct xhci_plat_priv dwc3_xhci_plat_priv = { |
5807 |
++ .quirks = XHCI_SKIP_PHY_INIT, |
5808 |
++}; |
5809 |
++ |
5810 |
+ static int dwc3_host_get_irq(struct dwc3 *dwc) |
5811 |
+ { |
5812 |
+ struct platform_device *dwc3_pdev = to_platform_device(dwc->dev); |
5813 |
+@@ -87,6 +92,11 @@ int dwc3_host_init(struct dwc3 *dwc) |
5814 |
+ goto err; |
5815 |
+ } |
5816 |
+ |
5817 |
++ ret = platform_device_add_data(xhci, &dwc3_xhci_plat_priv, |
5818 |
++ sizeof(dwc3_xhci_plat_priv)); |
5819 |
++ if (ret) |
5820 |
++ goto err; |
5821 |
++ |
5822 |
+ memset(props, 0, sizeof(struct property_entry) * ARRAY_SIZE(props)); |
5823 |
+ |
5824 |
+ if (dwc->usb3_lpm_capable) |
5825 |
+@@ -130,4 +140,5 @@ err: |
5826 |
+ void dwc3_host_exit(struct dwc3 *dwc) |
5827 |
+ { |
5828 |
+ platform_device_unregister(dwc->xhci); |
5829 |
++ dwc->xhci = NULL; |
5830 |
+ } |
5831 |
+diff --git a/drivers/usb/gadget/function/storage_common.c b/drivers/usb/gadget/function/storage_common.c |
5832 |
+index b859a158a4140..e122050eebaf1 100644 |
5833 |
+--- a/drivers/usb/gadget/function/storage_common.c |
5834 |
++++ b/drivers/usb/gadget/function/storage_common.c |
5835 |
+@@ -294,8 +294,10 @@ EXPORT_SYMBOL_GPL(fsg_lun_fsync_sub); |
5836 |
+ void store_cdrom_address(u8 *dest, int msf, u32 addr) |
5837 |
+ { |
5838 |
+ if (msf) { |
5839 |
+- /* Convert to Minutes-Seconds-Frames */ |
5840 |
+- addr >>= 2; /* Convert to 2048-byte frames */ |
5841 |
++ /* |
5842 |
++ * Convert to Minutes-Seconds-Frames. |
5843 |
++ * Sector size is already set to 2048 bytes. |
5844 |
++ */ |
5845 |
+ addr += 2*75; /* Lead-in occupies 2 seconds */ |
5846 |
+ dest[3] = addr % 75; /* Frames */ |
5847 |
+ addr /= 75; |
5848 |
+diff --git a/drivers/usb/host/xhci-hub.c b/drivers/usb/host/xhci-hub.c |
5849 |
+index fc322a9526c8c..b9754784161d7 100644 |
5850 |
+--- a/drivers/usb/host/xhci-hub.c |
5851 |
++++ b/drivers/usb/host/xhci-hub.c |
5852 |
+@@ -652,7 +652,7 @@ struct xhci_hub *xhci_get_rhub(struct usb_hcd *hcd) |
5853 |
+ * It will release and re-aquire the lock while calling ACPI |
5854 |
+ * method. |
5855 |
+ */ |
5856 |
+-void xhci_set_port_power(struct xhci_hcd *xhci, struct usb_hcd *hcd, |
5857 |
++static void xhci_set_port_power(struct xhci_hcd *xhci, struct usb_hcd *hcd, |
5858 |
+ u16 index, bool on, unsigned long *flags) |
5859 |
+ __must_hold(&xhci->lock) |
5860 |
+ { |
5861 |
+@@ -1647,6 +1647,17 @@ int xhci_hub_status_data(struct usb_hcd *hcd, char *buf) |
5862 |
+ |
5863 |
+ status = bus_state->resuming_ports; |
5864 |
+ |
5865 |
++ /* |
5866 |
++ * SS devices are only visible to roothub after link training completes. |
5867 |
++ * Keep polling roothubs for a grace period after xHC start |
5868 |
++ */ |
5869 |
++ if (xhci->run_graceperiod) { |
5870 |
++ if (time_before(jiffies, xhci->run_graceperiod)) |
5871 |
++ status = 1; |
5872 |
++ else |
5873 |
++ xhci->run_graceperiod = 0; |
5874 |
++ } |
5875 |
++ |
5876 |
+ mask = PORT_CSC | PORT_PEC | PORT_OCC | PORT_PLC | PORT_WRC | PORT_CEC; |
5877 |
+ |
5878 |
+ /* For each port, did anything change? If so, set that bit in buf. */ |
5879 |
+diff --git a/drivers/usb/host/xhci-mtk-sch.c b/drivers/usb/host/xhci-mtk-sch.c |
5880 |
+index f91a304320563..9d8094afcc8bc 100644 |
5881 |
+--- a/drivers/usb/host/xhci-mtk-sch.c |
5882 |
++++ b/drivers/usb/host/xhci-mtk-sch.c |
5883 |
+@@ -476,7 +476,6 @@ static int check_fs_bus_bw(struct mu3h_sch_ep_info *sch_ep, int offset) |
5884 |
+ |
5885 |
+ static int check_sch_tt(struct mu3h_sch_ep_info *sch_ep, u32 offset) |
5886 |
+ { |
5887 |
+- u32 extra_cs_count; |
5888 |
+ u32 start_ss, last_ss; |
5889 |
+ u32 start_cs, last_cs; |
5890 |
+ |
5891 |
+@@ -512,18 +511,12 @@ static int check_sch_tt(struct mu3h_sch_ep_info *sch_ep, u32 offset) |
5892 |
+ if (last_cs > 7) |
5893 |
+ return -ESCH_CS_OVERFLOW; |
5894 |
+ |
5895 |
+- if (sch_ep->ep_type == ISOC_IN_EP) |
5896 |
+- extra_cs_count = (last_cs == 7) ? 1 : 2; |
5897 |
+- else /* ep_type : INTR IN / INTR OUT */ |
5898 |
+- extra_cs_count = 1; |
5899 |
+- |
5900 |
+- cs_count += extra_cs_count; |
5901 |
+ if (cs_count > 7) |
5902 |
+ cs_count = 7; /* HW limit */ |
5903 |
+ |
5904 |
+ sch_ep->cs_count = cs_count; |
5905 |
+- /* one for ss, the other for idle */ |
5906 |
+- sch_ep->num_budget_microframes = cs_count + 2; |
5907 |
++ /* ss, idle are ignored */ |
5908 |
++ sch_ep->num_budget_microframes = cs_count; |
5909 |
+ |
5910 |
+ /* |
5911 |
+ * if interval=1, maxp >752, num_budge_micoframe is larger |
5912 |
+@@ -822,8 +815,8 @@ int xhci_mtk_drop_ep(struct usb_hcd *hcd, struct usb_device *udev, |
5913 |
+ if (ret) |
5914 |
+ return ret; |
5915 |
+ |
5916 |
+- if (ep->hcpriv) |
5917 |
+- drop_ep_quirk(hcd, udev, ep); |
5918 |
++ /* needn't check @ep->hcpriv, xhci_endpoint_disable set it NULL */ |
5919 |
++ drop_ep_quirk(hcd, udev, ep); |
5920 |
+ |
5921 |
+ return 0; |
5922 |
+ } |
5923 |
+diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c |
5924 |
+index d76c10f9ad807..3cac7e40456eb 100644 |
5925 |
+--- a/drivers/usb/host/xhci.c |
5926 |
++++ b/drivers/usb/host/xhci.c |
5927 |
+@@ -148,9 +148,11 @@ int xhci_start(struct xhci_hcd *xhci) |
5928 |
+ xhci_err(xhci, "Host took too long to start, " |
5929 |
+ "waited %u microseconds.\n", |
5930 |
+ XHCI_MAX_HALT_USEC); |
5931 |
+- if (!ret) |
5932 |
++ if (!ret) { |
5933 |
+ /* clear state flags. Including dying, halted or removing */ |
5934 |
+ xhci->xhc_state = 0; |
5935 |
++ xhci->run_graceperiod = jiffies + msecs_to_jiffies(500); |
5936 |
++ } |
5937 |
+ |
5938 |
+ return ret; |
5939 |
+ } |
5940 |
+@@ -776,8 +778,6 @@ static void xhci_stop(struct usb_hcd *hcd) |
5941 |
+ void xhci_shutdown(struct usb_hcd *hcd) |
5942 |
+ { |
5943 |
+ struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
5944 |
+- unsigned long flags; |
5945 |
+- int i; |
5946 |
+ |
5947 |
+ if (xhci->quirks & XHCI_SPURIOUS_REBOOT) |
5948 |
+ usb_disable_xhci_ports(to_pci_dev(hcd->self.sysdev)); |
5949 |
+@@ -793,21 +793,12 @@ void xhci_shutdown(struct usb_hcd *hcd) |
5950 |
+ del_timer_sync(&xhci->shared_hcd->rh_timer); |
5951 |
+ } |
5952 |
+ |
5953 |
+- spin_lock_irqsave(&xhci->lock, flags); |
5954 |
++ spin_lock_irq(&xhci->lock); |
5955 |
+ xhci_halt(xhci); |
5956 |
+- |
5957 |
+- /* Power off USB2 ports*/ |
5958 |
+- for (i = 0; i < xhci->usb2_rhub.num_ports; i++) |
5959 |
+- xhci_set_port_power(xhci, xhci->main_hcd, i, false, &flags); |
5960 |
+- |
5961 |
+- /* Power off USB3 ports*/ |
5962 |
+- for (i = 0; i < xhci->usb3_rhub.num_ports; i++) |
5963 |
+- xhci_set_port_power(xhci, xhci->shared_hcd, i, false, &flags); |
5964 |
+- |
5965 |
+ /* Workaround for spurious wakeups at shutdown with HSW */ |
5966 |
+ if (xhci->quirks & XHCI_SPURIOUS_WAKEUP) |
5967 |
+ xhci_reset(xhci, XHCI_RESET_SHORT_USEC); |
5968 |
+- spin_unlock_irqrestore(&xhci->lock, flags); |
5969 |
++ spin_unlock_irq(&xhci->lock); |
5970 |
+ |
5971 |
+ xhci_cleanup_msix(xhci); |
5972 |
+ |
5973 |
+diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h |
5974 |
+index 101f1956a96ca..10a4230d95c37 100644 |
5975 |
+--- a/drivers/usb/host/xhci.h |
5976 |
++++ b/drivers/usb/host/xhci.h |
5977 |
+@@ -1830,7 +1830,7 @@ struct xhci_hcd { |
5978 |
+ |
5979 |
+ /* Host controller watchdog timer structures */ |
5980 |
+ unsigned int xhc_state; |
5981 |
+- |
5982 |
++ unsigned long run_graceperiod; |
5983 |
+ u32 command; |
5984 |
+ struct s3_save s3; |
5985 |
+ /* Host controller is dying - not responding to commands. "I'm not dead yet!" |
5986 |
+@@ -2174,8 +2174,6 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, u16 wIndex, |
5987 |
+ int xhci_hub_status_data(struct usb_hcd *hcd, char *buf); |
5988 |
+ int xhci_find_raw_port_number(struct usb_hcd *hcd, int port1); |
5989 |
+ struct xhci_hub *xhci_get_rhub(struct usb_hcd *hcd); |
5990 |
+-void xhci_set_port_power(struct xhci_hcd *xhci, struct usb_hcd *hcd, u16 index, |
5991 |
+- bool on, unsigned long *flags); |
5992 |
+ |
5993 |
+ void xhci_hc_died(struct xhci_hcd *xhci); |
5994 |
+ |
5995 |
+diff --git a/drivers/usb/musb/Kconfig b/drivers/usb/musb/Kconfig |
5996 |
+index 4d61df6a9b5c8..70693cae83efb 100644 |
5997 |
+--- a/drivers/usb/musb/Kconfig |
5998 |
++++ b/drivers/usb/musb/Kconfig |
5999 |
+@@ -86,7 +86,7 @@ config USB_MUSB_TUSB6010 |
6000 |
+ tristate "TUSB6010" |
6001 |
+ depends on HAS_IOMEM |
6002 |
+ depends on ARCH_OMAP2PLUS || COMPILE_TEST |
6003 |
+- depends on NOP_USB_XCEIV = USB_MUSB_HDRC # both built-in or both modules |
6004 |
++ depends on NOP_USB_XCEIV!=m || USB_MUSB_HDRC=m |
6005 |
+ |
6006 |
+ config USB_MUSB_OMAP2PLUS |
6007 |
+ tristate "OMAP2430 and onwards" |
6008 |
+diff --git a/drivers/usb/serial/ch341.c b/drivers/usb/serial/ch341.c |
6009 |
+index b5a1864e9cfdc..752daa952abd6 100644 |
6010 |
+--- a/drivers/usb/serial/ch341.c |
6011 |
++++ b/drivers/usb/serial/ch341.c |
6012 |
+@@ -97,7 +97,10 @@ struct ch341_private { |
6013 |
+ u8 mcr; |
6014 |
+ u8 msr; |
6015 |
+ u8 lcr; |
6016 |
++ |
6017 |
+ unsigned long quirks; |
6018 |
++ u8 version; |
6019 |
++ |
6020 |
+ unsigned long break_end; |
6021 |
+ }; |
6022 |
+ |
6023 |
+@@ -256,8 +259,12 @@ static int ch341_set_baudrate_lcr(struct usb_device *dev, |
6024 |
+ /* |
6025 |
+ * CH341A buffers data until a full endpoint-size packet (32 bytes) |
6026 |
+ * has been received unless bit 7 is set. |
6027 |
++ * |
6028 |
++ * At least one device with version 0x27 appears to have this bit |
6029 |
++ * inverted. |
6030 |
+ */ |
6031 |
+- val |= BIT(7); |
6032 |
++ if (priv->version > 0x27) |
6033 |
++ val |= BIT(7); |
6034 |
+ |
6035 |
+ r = ch341_control_out(dev, CH341_REQ_WRITE_REG, |
6036 |
+ CH341_REG_DIVISOR << 8 | CH341_REG_PRESCALER, |
6037 |
+@@ -271,6 +278,9 @@ static int ch341_set_baudrate_lcr(struct usb_device *dev, |
6038 |
+ * (stop bits, parity and word length). Version 0x30 and above use |
6039 |
+ * CH341_REG_LCR only and CH341_REG_LCR2 is always set to zero. |
6040 |
+ */ |
6041 |
++ if (priv->version < 0x30) |
6042 |
++ return 0; |
6043 |
++ |
6044 |
+ r = ch341_control_out(dev, CH341_REQ_WRITE_REG, |
6045 |
+ CH341_REG_LCR2 << 8 | CH341_REG_LCR, lcr); |
6046 |
+ if (r) |
6047 |
+@@ -323,7 +333,9 @@ static int ch341_configure(struct usb_device *dev, struct ch341_private *priv) |
6048 |
+ r = ch341_control_in(dev, CH341_REQ_READ_VERSION, 0, 0, buffer, size); |
6049 |
+ if (r < 0) |
6050 |
+ goto out; |
6051 |
+- dev_dbg(&dev->dev, "Chip version: 0x%02x\n", buffer[0]); |
6052 |
++ |
6053 |
++ priv->version = buffer[0]; |
6054 |
++ dev_dbg(&dev->dev, "Chip version: 0x%02x\n", priv->version); |
6055 |
+ |
6056 |
+ r = ch341_control_out(dev, CH341_REQ_SERIAL_INIT, 0, 0); |
6057 |
+ if (r < 0) |
6058 |
+diff --git a/drivers/usb/serial/cp210x.c b/drivers/usb/serial/cp210x.c |
6059 |
+index bd006e1712ccb..a2126b07e854a 100644 |
6060 |
+--- a/drivers/usb/serial/cp210x.c |
6061 |
++++ b/drivers/usb/serial/cp210x.c |
6062 |
+@@ -130,6 +130,7 @@ static const struct usb_device_id id_table[] = { |
6063 |
+ { USB_DEVICE(0x10C4, 0x83AA) }, /* Mark-10 Digital Force Gauge */ |
6064 |
+ { USB_DEVICE(0x10C4, 0x83D8) }, /* DekTec DTA Plus VHF/UHF Booster/Attenuator */ |
6065 |
+ { USB_DEVICE(0x10C4, 0x8411) }, /* Kyocera GPS Module */ |
6066 |
++ { USB_DEVICE(0x10C4, 0x8414) }, /* Decagon USB Cable Adapter */ |
6067 |
+ { USB_DEVICE(0x10C4, 0x8418) }, /* IRZ Automation Teleport SG-10 GSM/GPRS Modem */ |
6068 |
+ { USB_DEVICE(0x10C4, 0x846E) }, /* BEI USB Sensor Interface (VCP) */ |
6069 |
+ { USB_DEVICE(0x10C4, 0x8470) }, /* Juniper Networks BX Series System Console */ |
6070 |
+diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c |
6071 |
+index e2a8c33f0cae9..a2ecb3b5d13e6 100644 |
6072 |
+--- a/drivers/usb/serial/ftdi_sio.c |
6073 |
++++ b/drivers/usb/serial/ftdi_sio.c |
6074 |
+@@ -1045,6 +1045,8 @@ static const struct usb_device_id id_table_combined[] = { |
6075 |
+ /* IDS GmbH devices */ |
6076 |
+ { USB_DEVICE(IDS_VID, IDS_SI31A_PID) }, |
6077 |
+ { USB_DEVICE(IDS_VID, IDS_CM31A_PID) }, |
6078 |
++ /* Omron devices */ |
6079 |
++ { USB_DEVICE(OMRON_VID, OMRON_CS1W_CIF31_PID) }, |
6080 |
+ /* U-Blox devices */ |
6081 |
+ { USB_DEVICE(UBLOX_VID, UBLOX_C099F9P_ZED_PID) }, |
6082 |
+ { USB_DEVICE(UBLOX_VID, UBLOX_C099F9P_ODIN_PID) }, |
6083 |
+diff --git a/drivers/usb/serial/ftdi_sio_ids.h b/drivers/usb/serial/ftdi_sio_ids.h |
6084 |
+index 4e92c165c86bf..31c8ccabbbb78 100644 |
6085 |
+--- a/drivers/usb/serial/ftdi_sio_ids.h |
6086 |
++++ b/drivers/usb/serial/ftdi_sio_ids.h |
6087 |
+@@ -661,6 +661,12 @@ |
6088 |
+ #define INFINEON_TRIBOARD_TC1798_PID 0x0028 /* DAS JTAG TriBoard TC1798 V1.0 */ |
6089 |
+ #define INFINEON_TRIBOARD_TC2X7_PID 0x0043 /* DAS JTAG TriBoard TC2X7 V1.0 */ |
6090 |
+ |
6091 |
++/* |
6092 |
++ * Omron corporation (https://www.omron.com) |
6093 |
++ */ |
6094 |
++ #define OMRON_VID 0x0590 |
6095 |
++ #define OMRON_CS1W_CIF31_PID 0x00b2 |
6096 |
++ |
6097 |
+ /* |
6098 |
+ * Acton Research Corp. |
6099 |
+ */ |
6100 |
+diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c |
6101 |
+index de59fa919540a..a5e8374a8d710 100644 |
6102 |
+--- a/drivers/usb/serial/option.c |
6103 |
++++ b/drivers/usb/serial/option.c |
6104 |
+@@ -253,6 +253,7 @@ static void option_instat_callback(struct urb *urb); |
6105 |
+ #define QUECTEL_PRODUCT_BG96 0x0296 |
6106 |
+ #define QUECTEL_PRODUCT_EP06 0x0306 |
6107 |
+ #define QUECTEL_PRODUCT_EM05G 0x030a |
6108 |
++#define QUECTEL_PRODUCT_EM060K 0x030b |
6109 |
+ #define QUECTEL_PRODUCT_EM12 0x0512 |
6110 |
+ #define QUECTEL_PRODUCT_RM500Q 0x0800 |
6111 |
+ #define QUECTEL_PRODUCT_EC200S_CN 0x6002 |
6112 |
+@@ -438,6 +439,8 @@ static void option_instat_callback(struct urb *urb); |
6113 |
+ #define CINTERION_PRODUCT_MV31_2_RMNET 0x00b9 |
6114 |
+ #define CINTERION_PRODUCT_MV32_WA 0x00f1 |
6115 |
+ #define CINTERION_PRODUCT_MV32_WB 0x00f2 |
6116 |
++#define CINTERION_PRODUCT_MV32_WA_RMNET 0x00f3 |
6117 |
++#define CINTERION_PRODUCT_MV32_WB_RMNET 0x00f4 |
6118 |
+ |
6119 |
+ /* Olivetti products */ |
6120 |
+ #define OLIVETTI_VENDOR_ID 0x0b3c |
6121 |
+@@ -573,6 +576,10 @@ static void option_instat_callback(struct urb *urb); |
6122 |
+ #define WETELECOM_PRODUCT_6802 0x6802 |
6123 |
+ #define WETELECOM_PRODUCT_WMD300 0x6803 |
6124 |
+ |
6125 |
++/* OPPO products */ |
6126 |
++#define OPPO_VENDOR_ID 0x22d9 |
6127 |
++#define OPPO_PRODUCT_R11 0x276c |
6128 |
++ |
6129 |
+ |
6130 |
+ /* Device flags */ |
6131 |
+ |
6132 |
+@@ -1138,6 +1145,9 @@ static const struct usb_device_id option_ids[] = { |
6133 |
+ { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EP06, 0xff, 0, 0) }, |
6134 |
+ { USB_DEVICE_INTERFACE_CLASS(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EM05G, 0xff), |
6135 |
+ .driver_info = RSVD(6) | ZLP }, |
6136 |
++ { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EM060K, 0xff, 0x00, 0x40) }, |
6137 |
++ { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EM060K, 0xff, 0xff, 0x30) }, |
6138 |
++ { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EM060K, 0xff, 0xff, 0x40) }, |
6139 |
+ { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EM12, 0xff, 0xff, 0xff), |
6140 |
+ .driver_info = RSVD(1) | RSVD(2) | RSVD(3) | RSVD(4) | NUMEP2 }, |
6141 |
+ { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EM12, 0xff, 0, 0) }, |
6142 |
+@@ -1993,8 +2003,12 @@ static const struct usb_device_id option_ids[] = { |
6143 |
+ .driver_info = RSVD(0)}, |
6144 |
+ { USB_DEVICE_INTERFACE_CLASS(CINTERION_VENDOR_ID, CINTERION_PRODUCT_MV32_WA, 0xff), |
6145 |
+ .driver_info = RSVD(3)}, |
6146 |
++ { USB_DEVICE_INTERFACE_CLASS(CINTERION_VENDOR_ID, CINTERION_PRODUCT_MV32_WA_RMNET, 0xff), |
6147 |
++ .driver_info = RSVD(0) }, |
6148 |
+ { USB_DEVICE_INTERFACE_CLASS(CINTERION_VENDOR_ID, CINTERION_PRODUCT_MV32_WB, 0xff), |
6149 |
+ .driver_info = RSVD(3)}, |
6150 |
++ { USB_DEVICE_INTERFACE_CLASS(CINTERION_VENDOR_ID, CINTERION_PRODUCT_MV32_WB_RMNET, 0xff), |
6151 |
++ .driver_info = RSVD(0) }, |
6152 |
+ { USB_DEVICE(OLIVETTI_VENDOR_ID, OLIVETTI_PRODUCT_OLICARD100), |
6153 |
+ .driver_info = RSVD(4) }, |
6154 |
+ { USB_DEVICE(OLIVETTI_VENDOR_ID, OLIVETTI_PRODUCT_OLICARD120), |
6155 |
+@@ -2155,6 +2169,7 @@ static const struct usb_device_id option_ids[] = { |
6156 |
+ { USB_DEVICE_INTERFACE_CLASS(0x305a, 0x1404, 0xff) }, /* GosunCn GM500 RNDIS */ |
6157 |
+ { USB_DEVICE_INTERFACE_CLASS(0x305a, 0x1405, 0xff) }, /* GosunCn GM500 MBIM */ |
6158 |
+ { USB_DEVICE_INTERFACE_CLASS(0x305a, 0x1406, 0xff) }, /* GosunCn GM500 ECM/NCM */ |
6159 |
++ { USB_DEVICE_AND_INTERFACE_INFO(OPPO_VENDOR_ID, OPPO_PRODUCT_R11, 0xff, 0xff, 0x30) }, |
6160 |
+ { } /* Terminating entry */ |
6161 |
+ }; |
6162 |
+ MODULE_DEVICE_TABLE(usb, option_ids); |
6163 |
+diff --git a/drivers/usb/storage/unusual_devs.h b/drivers/usb/storage/unusual_devs.h |
6164 |
+index 1a05e3dcfec8a..4993227ab2930 100644 |
6165 |
+--- a/drivers/usb/storage/unusual_devs.h |
6166 |
++++ b/drivers/usb/storage/unusual_devs.h |
6167 |
+@@ -2294,6 +2294,13 @@ UNUSUAL_DEV( 0x1e74, 0x4621, 0x0000, 0x0000, |
6168 |
+ USB_SC_DEVICE, USB_PR_DEVICE, NULL, |
6169 |
+ US_FL_BULK_IGNORE_TAG | US_FL_MAX_SECTORS_64 ), |
6170 |
+ |
6171 |
++/* Reported by Witold Lipieta <witold.lipieta@×××××××××.com> */ |
6172 |
++UNUSUAL_DEV( 0x1fc9, 0x0117, 0x0100, 0x0100, |
6173 |
++ "NXP Semiconductors", |
6174 |
++ "PN7462AU", |
6175 |
++ USB_SC_DEVICE, USB_PR_DEVICE, NULL, |
6176 |
++ US_FL_IGNORE_RESIDUE ), |
6177 |
++ |
6178 |
+ /* Supplied with some Castlewood ORB removable drives */ |
6179 |
+ UNUSUAL_DEV( 0x2027, 0xa001, 0x0000, 0x9999, |
6180 |
+ "Double-H Technology", |
6181 |
+diff --git a/drivers/usb/typec/altmodes/displayport.c b/drivers/usb/typec/altmodes/displayport.c |
6182 |
+index b7f094435b00a..998c1e3e318e1 100644 |
6183 |
+--- a/drivers/usb/typec/altmodes/displayport.c |
6184 |
++++ b/drivers/usb/typec/altmodes/displayport.c |
6185 |
+@@ -88,8 +88,8 @@ static int dp_altmode_configure(struct dp_altmode *dp, u8 con) |
6186 |
+ case DP_STATUS_CON_UFP_D: |
6187 |
+ case DP_STATUS_CON_BOTH: /* NOTE: First acting as DP source */ |
6188 |
+ conf |= DP_CONF_UFP_U_AS_UFP_D; |
6189 |
+- pin_assign = DP_CAP_DFP_D_PIN_ASSIGN(dp->alt->vdo) & |
6190 |
+- DP_CAP_UFP_D_PIN_ASSIGN(dp->port->vdo); |
6191 |
++ pin_assign = DP_CAP_PIN_ASSIGN_UFP_D(dp->alt->vdo) & |
6192 |
++ DP_CAP_PIN_ASSIGN_DFP_D(dp->port->vdo); |
6193 |
+ break; |
6194 |
+ default: |
6195 |
+ break; |
6196 |
+diff --git a/drivers/usb/typec/mux/intel_pmc_mux.c b/drivers/usb/typec/mux/intel_pmc_mux.c |
6197 |
+index 2cdd22130834e..5daec9d79e94f 100644 |
6198 |
+--- a/drivers/usb/typec/mux/intel_pmc_mux.c |
6199 |
++++ b/drivers/usb/typec/mux/intel_pmc_mux.c |
6200 |
+@@ -554,9 +554,11 @@ err_unregister_switch: |
6201 |
+ |
6202 |
+ static int is_memory(struct acpi_resource *res, void *data) |
6203 |
+ { |
6204 |
+- struct resource r; |
6205 |
++ struct resource_win win = {}; |
6206 |
++ struct resource *r = &win.res; |
6207 |
+ |
6208 |
+- return !acpi_dev_resource_memory(res, &r); |
6209 |
++ return !(acpi_dev_resource_memory(res, r) || |
6210 |
++ acpi_dev_resource_address_space(res, &win)); |
6211 |
+ } |
6212 |
+ |
6213 |
+ /* IOM ACPI IDs and IOM_PORT_STATUS_OFFSET */ |
6214 |
+@@ -566,6 +568,9 @@ static const struct acpi_device_id iom_acpi_ids[] = { |
6215 |
+ |
6216 |
+ /* AlderLake */ |
6217 |
+ { "INTC1079", 0x160, }, |
6218 |
++ |
6219 |
++ /* Meteor Lake */ |
6220 |
++ { "INTC107A", 0x160, }, |
6221 |
+ {} |
6222 |
+ }; |
6223 |
+ |
6224 |
+diff --git a/drivers/usb/typec/tcpm/tcpm.c b/drivers/usb/typec/tcpm/tcpm.c |
6225 |
+index 5fce795b69c7f..33aadc0a29ea8 100644 |
6226 |
+--- a/drivers/usb/typec/tcpm/tcpm.c |
6227 |
++++ b/drivers/usb/typec/tcpm/tcpm.c |
6228 |
+@@ -6213,6 +6213,13 @@ static int tcpm_psy_set_prop(struct power_supply *psy, |
6229 |
+ struct tcpm_port *port = power_supply_get_drvdata(psy); |
6230 |
+ int ret; |
6231 |
+ |
6232 |
++ /* |
6233 |
++ * All the properties below are related to USB PD. The check needs to be |
6234 |
++ * property specific when a non-pd related property is added. |
6235 |
++ */ |
6236 |
++ if (!port->pd_supported) |
6237 |
++ return -EOPNOTSUPP; |
6238 |
++ |
6239 |
+ switch (psp) { |
6240 |
+ case POWER_SUPPLY_PROP_ONLINE: |
6241 |
+ ret = tcpm_psy_set_online(port, val); |
6242 |
+diff --git a/drivers/xen/grant-table.c b/drivers/xen/grant-table.c |
6243 |
+index 5c83d41766c85..0a2d24d6ac6f7 100644 |
6244 |
+--- a/drivers/xen/grant-table.c |
6245 |
++++ b/drivers/xen/grant-table.c |
6246 |
+@@ -981,6 +981,9 @@ int gnttab_dma_alloc_pages(struct gnttab_dma_alloc_args *args) |
6247 |
+ size_t size; |
6248 |
+ int i, ret; |
6249 |
+ |
6250 |
++ if (args->nr_pages < 0 || args->nr_pages > (INT_MAX >> PAGE_SHIFT)) |
6251 |
++ return -ENOMEM; |
6252 |
++ |
6253 |
+ size = args->nr_pages << PAGE_SHIFT; |
6254 |
+ if (args->coherent) |
6255 |
+ args->vaddr = dma_alloc_coherent(args->dev, size, |
6256 |
+diff --git a/fs/cifs/smb2pdu.c b/fs/cifs/smb2pdu.c |
6257 |
+index 49ba3617db593..a423d14035391 100644 |
6258 |
+--- a/fs/cifs/smb2pdu.c |
6259 |
++++ b/fs/cifs/smb2pdu.c |
6260 |
+@@ -933,16 +933,17 @@ SMB2_negotiate(const unsigned int xid, struct cifs_ses *ses) |
6261 |
+ } else if (rc != 0) |
6262 |
+ goto neg_exit; |
6263 |
+ |
6264 |
++ rc = -EIO; |
6265 |
+ if (strcmp(server->vals->version_string, |
6266 |
+ SMB3ANY_VERSION_STRING) == 0) { |
6267 |
+ if (rsp->DialectRevision == cpu_to_le16(SMB20_PROT_ID)) { |
6268 |
+ cifs_server_dbg(VFS, |
6269 |
+ "SMB2 dialect returned but not requested\n"); |
6270 |
+- return -EIO; |
6271 |
++ goto neg_exit; |
6272 |
+ } else if (rsp->DialectRevision == cpu_to_le16(SMB21_PROT_ID)) { |
6273 |
+ cifs_server_dbg(VFS, |
6274 |
+ "SMB2.1 dialect returned but not requested\n"); |
6275 |
+- return -EIO; |
6276 |
++ goto neg_exit; |
6277 |
+ } else if (rsp->DialectRevision == cpu_to_le16(SMB311_PROT_ID)) { |
6278 |
+ /* ops set to 3.0 by default for default so update */ |
6279 |
+ server->ops = &smb311_operations; |
6280 |
+@@ -953,7 +954,7 @@ SMB2_negotiate(const unsigned int xid, struct cifs_ses *ses) |
6281 |
+ if (rsp->DialectRevision == cpu_to_le16(SMB20_PROT_ID)) { |
6282 |
+ cifs_server_dbg(VFS, |
6283 |
+ "SMB2 dialect returned but not requested\n"); |
6284 |
+- return -EIO; |
6285 |
++ goto neg_exit; |
6286 |
+ } else if (rsp->DialectRevision == cpu_to_le16(SMB21_PROT_ID)) { |
6287 |
+ /* ops set to 3.0 by default for default so update */ |
6288 |
+ server->ops = &smb21_operations; |
6289 |
+@@ -967,7 +968,7 @@ SMB2_negotiate(const unsigned int xid, struct cifs_ses *ses) |
6290 |
+ /* if requested single dialect ensure returned dialect matched */ |
6291 |
+ cifs_server_dbg(VFS, "Invalid 0x%x dialect returned: not requested\n", |
6292 |
+ le16_to_cpu(rsp->DialectRevision)); |
6293 |
+- return -EIO; |
6294 |
++ goto neg_exit; |
6295 |
+ } |
6296 |
+ |
6297 |
+ cifs_dbg(FYI, "mode 0x%x\n", rsp->SecurityMode); |
6298 |
+@@ -985,9 +986,10 @@ SMB2_negotiate(const unsigned int xid, struct cifs_ses *ses) |
6299 |
+ else { |
6300 |
+ cifs_server_dbg(VFS, "Invalid dialect returned by server 0x%x\n", |
6301 |
+ le16_to_cpu(rsp->DialectRevision)); |
6302 |
+- rc = -EIO; |
6303 |
+ goto neg_exit; |
6304 |
+ } |
6305 |
++ |
6306 |
++ rc = 0; |
6307 |
+ server->dialect = le16_to_cpu(rsp->DialectRevision); |
6308 |
+ |
6309 |
+ /* |
6310 |
+diff --git a/include/linux/platform_data/x86/pmc_atom.h b/include/linux/platform_data/x86/pmc_atom.h |
6311 |
+index 022bcea9edec5..99a9b09dc839d 100644 |
6312 |
+--- a/include/linux/platform_data/x86/pmc_atom.h |
6313 |
++++ b/include/linux/platform_data/x86/pmc_atom.h |
6314 |
+@@ -7,6 +7,8 @@ |
6315 |
+ #ifndef PMC_ATOM_H |
6316 |
+ #define PMC_ATOM_H |
6317 |
+ |
6318 |
++#include <linux/bits.h> |
6319 |
++ |
6320 |
+ /* ValleyView Power Control Unit PCI Device ID */ |
6321 |
+ #define PCI_DEVICE_ID_VLV_PMC 0x0F1C |
6322 |
+ /* CherryTrail Power Control Unit PCI Device ID */ |
6323 |
+@@ -139,9 +141,9 @@ |
6324 |
+ #define ACPI_MMIO_REG_LEN 0x100 |
6325 |
+ |
6326 |
+ #define PM1_CNT 0x4 |
6327 |
+-#define SLEEP_TYPE_MASK 0xFFFFECFF |
6328 |
++#define SLEEP_TYPE_MASK GENMASK(12, 10) |
6329 |
+ #define SLEEP_TYPE_S5 0x1C00 |
6330 |
+-#define SLEEP_ENABLE 0x2000 |
6331 |
++#define SLEEP_ENABLE BIT(13) |
6332 |
+ |
6333 |
+ extern int pmc_atom_read(int offset, u32 *value); |
6334 |
+ extern int pmc_atom_write(int offset, u32 value); |
6335 |
+diff --git a/include/linux/usb.h b/include/linux/usb.h |
6336 |
+index 7ccaa76a9a968..da1329b85329b 100644 |
6337 |
+--- a/include/linux/usb.h |
6338 |
++++ b/include/linux/usb.h |
6339 |
+@@ -575,6 +575,7 @@ struct usb3_lpm_parameters { |
6340 |
+ * @devaddr: device address, XHCI: assigned by HW, others: same as devnum |
6341 |
+ * @can_submit: URBs may be submitted |
6342 |
+ * @persist_enabled: USB_PERSIST enabled for this device |
6343 |
++ * @reset_in_progress: the device is being reset |
6344 |
+ * @have_langid: whether string_langid is valid |
6345 |
+ * @authorized: policy has said we can use it; |
6346 |
+ * (user space) policy determines if we authorize this device to be |
6347 |
+@@ -661,6 +662,7 @@ struct usb_device { |
6348 |
+ |
6349 |
+ unsigned can_submit:1; |
6350 |
+ unsigned persist_enabled:1; |
6351 |
++ unsigned reset_in_progress:1; |
6352 |
+ unsigned have_langid:1; |
6353 |
+ unsigned authorized:1; |
6354 |
+ unsigned authenticated:1; |
6355 |
+diff --git a/include/linux/usb/typec_dp.h b/include/linux/usb/typec_dp.h |
6356 |
+index cfb916cccd316..8d09c2f0a9b80 100644 |
6357 |
+--- a/include/linux/usb/typec_dp.h |
6358 |
++++ b/include/linux/usb/typec_dp.h |
6359 |
+@@ -73,6 +73,11 @@ enum { |
6360 |
+ #define DP_CAP_USB BIT(7) |
6361 |
+ #define DP_CAP_DFP_D_PIN_ASSIGN(_cap_) (((_cap_) & GENMASK(15, 8)) >> 8) |
6362 |
+ #define DP_CAP_UFP_D_PIN_ASSIGN(_cap_) (((_cap_) & GENMASK(23, 16)) >> 16) |
6363 |
++/* Get pin assignment taking plug & receptacle into consideration */ |
6364 |
++#define DP_CAP_PIN_ASSIGN_UFP_D(_cap_) ((_cap_ & DP_CAP_RECEPTACLE) ? \ |
6365 |
++ DP_CAP_UFP_D_PIN_ASSIGN(_cap_) : DP_CAP_DFP_D_PIN_ASSIGN(_cap_)) |
6366 |
++#define DP_CAP_PIN_ASSIGN_DFP_D(_cap_) ((_cap_ & DP_CAP_RECEPTACLE) ? \ |
6367 |
++ DP_CAP_DFP_D_PIN_ASSIGN(_cap_) : DP_CAP_UFP_D_PIN_ASSIGN(_cap_)) |
6368 |
+ |
6369 |
+ /* DisplayPort Status Update VDO bits */ |
6370 |
+ #define DP_STATUS_CONNECTION(_status_) ((_status_) & 3) |
6371 |
+diff --git a/kernel/bpf/cgroup.c b/kernel/bpf/cgroup.c |
6372 |
+index 565e4c59db660..eb3e787a3a977 100644 |
6373 |
+--- a/kernel/bpf/cgroup.c |
6374 |
++++ b/kernel/bpf/cgroup.c |
6375 |
+@@ -709,8 +709,10 @@ static void purge_effective_progs(struct cgroup *cgrp, struct bpf_prog *prog, |
6376 |
+ pos++; |
6377 |
+ } |
6378 |
+ } |
6379 |
++ |
6380 |
++ /* no link or prog match, skip the cgroup of this layer */ |
6381 |
++ continue; |
6382 |
+ found: |
6383 |
+- BUG_ON(!cg); |
6384 |
+ progs = rcu_dereference_protected( |
6385 |
+ desc->bpf.effective[atype], |
6386 |
+ lockdep_is_held(&cgroup_mutex)); |
6387 |
+diff --git a/kernel/bpf/syscall.c b/kernel/bpf/syscall.c |
6388 |
+index 48e02a725563f..99ce46f518893 100644 |
6389 |
+--- a/kernel/bpf/syscall.c |
6390 |
++++ b/kernel/bpf/syscall.c |
6391 |
+@@ -4785,7 +4785,7 @@ syscall_prog_func_proto(enum bpf_func_id func_id, const struct bpf_prog *prog) |
6392 |
+ { |
6393 |
+ switch (func_id) { |
6394 |
+ case BPF_FUNC_sys_bpf: |
6395 |
+- return &bpf_sys_bpf_proto; |
6396 |
++ return !perfmon_capable() ? NULL : &bpf_sys_bpf_proto; |
6397 |
+ case BPF_FUNC_btf_find_by_name_kind: |
6398 |
+ return &bpf_btf_find_by_name_kind_proto; |
6399 |
+ case BPF_FUNC_sys_close: |
6400 |
+diff --git a/mm/pagewalk.c b/mm/pagewalk.c |
6401 |
+index 9b3db11a4d1db..fa7a3d21a7518 100644 |
6402 |
+--- a/mm/pagewalk.c |
6403 |
++++ b/mm/pagewalk.c |
6404 |
+@@ -110,7 +110,7 @@ static int walk_pmd_range(pud_t *pud, unsigned long addr, unsigned long end, |
6405 |
+ do { |
6406 |
+ again: |
6407 |
+ next = pmd_addr_end(addr, end); |
6408 |
+- if (pmd_none(*pmd) || (!walk->vma && !walk->no_vma)) { |
6409 |
++ if (pmd_none(*pmd)) { |
6410 |
+ if (ops->pte_hole) |
6411 |
+ err = ops->pte_hole(addr, next, depth, walk); |
6412 |
+ if (err) |
6413 |
+@@ -171,7 +171,7 @@ static int walk_pud_range(p4d_t *p4d, unsigned long addr, unsigned long end, |
6414 |
+ do { |
6415 |
+ again: |
6416 |
+ next = pud_addr_end(addr, end); |
6417 |
+- if (pud_none(*pud) || (!walk->vma && !walk->no_vma)) { |
6418 |
++ if (pud_none(*pud)) { |
6419 |
+ if (ops->pte_hole) |
6420 |
+ err = ops->pte_hole(addr, next, depth, walk); |
6421 |
+ if (err) |
6422 |
+@@ -366,19 +366,19 @@ static int __walk_page_range(unsigned long start, unsigned long end, |
6423 |
+ struct vm_area_struct *vma = walk->vma; |
6424 |
+ const struct mm_walk_ops *ops = walk->ops; |
6425 |
+ |
6426 |
+- if (vma && ops->pre_vma) { |
6427 |
++ if (ops->pre_vma) { |
6428 |
+ err = ops->pre_vma(start, end, walk); |
6429 |
+ if (err) |
6430 |
+ return err; |
6431 |
+ } |
6432 |
+ |
6433 |
+- if (vma && is_vm_hugetlb_page(vma)) { |
6434 |
++ if (is_vm_hugetlb_page(vma)) { |
6435 |
+ if (ops->hugetlb_entry) |
6436 |
+ err = walk_hugetlb_range(start, end, walk); |
6437 |
+ } else |
6438 |
+ err = walk_pgd_range(start, end, walk); |
6439 |
+ |
6440 |
+- if (vma && ops->post_vma) |
6441 |
++ if (ops->post_vma) |
6442 |
+ ops->post_vma(walk); |
6443 |
+ |
6444 |
+ return err; |
6445 |
+@@ -450,9 +450,13 @@ int walk_page_range(struct mm_struct *mm, unsigned long start, |
6446 |
+ if (!vma) { /* after the last vma */ |
6447 |
+ walk.vma = NULL; |
6448 |
+ next = end; |
6449 |
++ if (ops->pte_hole) |
6450 |
++ err = ops->pte_hole(start, next, -1, &walk); |
6451 |
+ } else if (start < vma->vm_start) { /* outside vma */ |
6452 |
+ walk.vma = NULL; |
6453 |
+ next = min(end, vma->vm_start); |
6454 |
++ if (ops->pte_hole) |
6455 |
++ err = ops->pte_hole(start, next, -1, &walk); |
6456 |
+ } else { /* inside vma */ |
6457 |
+ walk.vma = vma; |
6458 |
+ next = min(end, vma->vm_end); |
6459 |
+@@ -470,9 +474,8 @@ int walk_page_range(struct mm_struct *mm, unsigned long start, |
6460 |
+ } |
6461 |
+ if (err < 0) |
6462 |
+ break; |
6463 |
+- } |
6464 |
+- if (walk.vma || walk.ops->pte_hole) |
6465 |
+ err = __walk_page_range(start, next, &walk); |
6466 |
++ } |
6467 |
+ if (err) |
6468 |
+ break; |
6469 |
+ } while (start = next, start < end); |
6470 |
+@@ -501,9 +504,9 @@ int walk_page_range_novma(struct mm_struct *mm, unsigned long start, |
6471 |
+ if (start >= end || !walk.mm) |
6472 |
+ return -EINVAL; |
6473 |
+ |
6474 |
+- mmap_assert_locked(walk.mm); |
6475 |
++ mmap_assert_write_locked(walk.mm); |
6476 |
+ |
6477 |
+- return __walk_page_range(start, end, &walk); |
6478 |
++ return walk_pgd_range(start, end, &walk); |
6479 |
+ } |
6480 |
+ |
6481 |
+ int walk_page_vma(struct vm_area_struct *vma, const struct mm_walk_ops *ops, |
6482 |
+diff --git a/mm/ptdump.c b/mm/ptdump.c |
6483 |
+index da751448d0e4e..f84ea700662fc 100644 |
6484 |
+--- a/mm/ptdump.c |
6485 |
++++ b/mm/ptdump.c |
6486 |
+@@ -144,13 +144,13 @@ void ptdump_walk_pgd(struct ptdump_state *st, struct mm_struct *mm, pgd_t *pgd) |
6487 |
+ { |
6488 |
+ const struct ptdump_range *range = st->range; |
6489 |
+ |
6490 |
+- mmap_read_lock(mm); |
6491 |
++ mmap_write_lock(mm); |
6492 |
+ while (range->start != range->end) { |
6493 |
+ walk_page_range_novma(mm, range->start, range->end, |
6494 |
+ &ptdump_ops, pgd, st); |
6495 |
+ range++; |
6496 |
+ } |
6497 |
+- mmap_read_unlock(mm); |
6498 |
++ mmap_write_unlock(mm); |
6499 |
+ |
6500 |
+ /* Flush out the last page */ |
6501 |
+ st->note_page(st, 0, -1, 0); |
6502 |
+diff --git a/net/core/skmsg.c b/net/core/skmsg.c |
6503 |
+index 4ddcfac344984..054073c7cbb95 100644 |
6504 |
+--- a/net/core/skmsg.c |
6505 |
++++ b/net/core/skmsg.c |
6506 |
+@@ -462,7 +462,7 @@ int sk_msg_recvmsg(struct sock *sk, struct sk_psock *psock, struct msghdr *msg, |
6507 |
+ |
6508 |
+ if (copied == len) |
6509 |
+ break; |
6510 |
+- } while (!sg_is_last(sge)); |
6511 |
++ } while ((i != msg_rx->sg.end) && !sg_is_last(sge)); |
6512 |
+ |
6513 |
+ if (unlikely(peek)) { |
6514 |
+ msg_rx = sk_psock_next_msg(psock, msg_rx); |
6515 |
+@@ -472,7 +472,7 @@ int sk_msg_recvmsg(struct sock *sk, struct sk_psock *psock, struct msghdr *msg, |
6516 |
+ } |
6517 |
+ |
6518 |
+ msg_rx->sg.start = i; |
6519 |
+- if (!sge->length && sg_is_last(sge)) { |
6520 |
++ if (!sge->length && (i == msg_rx->sg.end || sg_is_last(sge))) { |
6521 |
+ msg_rx = sk_psock_dequeue_msg(psock); |
6522 |
+ kfree_sk_msg(msg_rx); |
6523 |
+ } |
6524 |
+diff --git a/net/ipv4/fib_frontend.c b/net/ipv4/fib_frontend.c |
6525 |
+index 1eb7795edb9dc..1452bb72b7d9c 100644 |
6526 |
+--- a/net/ipv4/fib_frontend.c |
6527 |
++++ b/net/ipv4/fib_frontend.c |
6528 |
+@@ -389,7 +389,7 @@ static int __fib_validate_source(struct sk_buff *skb, __be32 src, __be32 dst, |
6529 |
+ dev_match = dev_match || (res.type == RTN_LOCAL && |
6530 |
+ dev == net->loopback_dev); |
6531 |
+ if (dev_match) { |
6532 |
+- ret = FIB_RES_NHC(res)->nhc_scope >= RT_SCOPE_HOST; |
6533 |
++ ret = FIB_RES_NHC(res)->nhc_scope >= RT_SCOPE_LINK; |
6534 |
+ return ret; |
6535 |
+ } |
6536 |
+ if (no_addr) |
6537 |
+@@ -401,7 +401,7 @@ static int __fib_validate_source(struct sk_buff *skb, __be32 src, __be32 dst, |
6538 |
+ ret = 0; |
6539 |
+ if (fib_lookup(net, &fl4, &res, FIB_LOOKUP_IGNORE_LINKSTATE) == 0) { |
6540 |
+ if (res.type == RTN_UNICAST) |
6541 |
+- ret = FIB_RES_NHC(res)->nhc_scope >= RT_SCOPE_HOST; |
6542 |
++ ret = FIB_RES_NHC(res)->nhc_scope >= RT_SCOPE_LINK; |
6543 |
+ } |
6544 |
+ return ret; |
6545 |
+ |
6546 |
+diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c |
6547 |
+index a33e6aa42a4c5..7fd7e7cba0c92 100644 |
6548 |
+--- a/net/ipv4/tcp_input.c |
6549 |
++++ b/net/ipv4/tcp_input.c |
6550 |
+@@ -3623,11 +3623,11 @@ static void tcp_send_challenge_ack(struct sock *sk, const struct sk_buff *skb) |
6551 |
+ |
6552 |
+ /* Then check host-wide RFC 5961 rate limit. */ |
6553 |
+ now = jiffies / HZ; |
6554 |
+- if (now != challenge_timestamp) { |
6555 |
++ if (now != READ_ONCE(challenge_timestamp)) { |
6556 |
+ u32 ack_limit = READ_ONCE(net->ipv4.sysctl_tcp_challenge_ack_limit); |
6557 |
+ u32 half = (ack_limit + 1) >> 1; |
6558 |
+ |
6559 |
+- challenge_timestamp = now; |
6560 |
++ WRITE_ONCE(challenge_timestamp, now); |
6561 |
+ WRITE_ONCE(challenge_count, half + prandom_u32_max(ack_limit)); |
6562 |
+ } |
6563 |
+ count = READ_ONCE(challenge_count); |
6564 |
+diff --git a/net/kcm/kcmsock.c b/net/kcm/kcmsock.c |
6565 |
+index 11a715d76a4f1..f780fbe82e7dc 100644 |
6566 |
+--- a/net/kcm/kcmsock.c |
6567 |
++++ b/net/kcm/kcmsock.c |
6568 |
+@@ -1411,12 +1411,6 @@ static int kcm_attach(struct socket *sock, struct socket *csock, |
6569 |
+ psock->sk = csk; |
6570 |
+ psock->bpf_prog = prog; |
6571 |
+ |
6572 |
+- err = strp_init(&psock->strp, csk, &cb); |
6573 |
+- if (err) { |
6574 |
+- kmem_cache_free(kcm_psockp, psock); |
6575 |
+- goto out; |
6576 |
+- } |
6577 |
+- |
6578 |
+ write_lock_bh(&csk->sk_callback_lock); |
6579 |
+ |
6580 |
+ /* Check if sk_user_data is already by KCM or someone else. |
6581 |
+@@ -1424,13 +1418,18 @@ static int kcm_attach(struct socket *sock, struct socket *csock, |
6582 |
+ */ |
6583 |
+ if (csk->sk_user_data) { |
6584 |
+ write_unlock_bh(&csk->sk_callback_lock); |
6585 |
+- strp_stop(&psock->strp); |
6586 |
+- strp_done(&psock->strp); |
6587 |
+ kmem_cache_free(kcm_psockp, psock); |
6588 |
+ err = -EALREADY; |
6589 |
+ goto out; |
6590 |
+ } |
6591 |
+ |
6592 |
++ err = strp_init(&psock->strp, csk, &cb); |
6593 |
++ if (err) { |
6594 |
++ write_unlock_bh(&csk->sk_callback_lock); |
6595 |
++ kmem_cache_free(kcm_psockp, psock); |
6596 |
++ goto out; |
6597 |
++ } |
6598 |
++ |
6599 |
+ psock->save_data_ready = csk->sk_data_ready; |
6600 |
+ psock->save_write_space = csk->sk_write_space; |
6601 |
+ psock->save_state_change = csk->sk_state_change; |
6602 |
+diff --git a/net/mac80211/ibss.c b/net/mac80211/ibss.c |
6603 |
+index 5d6ca4c3e6981..1e133ca58e789 100644 |
6604 |
+--- a/net/mac80211/ibss.c |
6605 |
++++ b/net/mac80211/ibss.c |
6606 |
+@@ -534,6 +534,10 @@ int ieee80211_ibss_finish_csa(struct ieee80211_sub_if_data *sdata) |
6607 |
+ |
6608 |
+ sdata_assert_lock(sdata); |
6609 |
+ |
6610 |
++ /* When not connected/joined, sending CSA doesn't make sense. */ |
6611 |
++ if (ifibss->state != IEEE80211_IBSS_MLME_JOINED) |
6612 |
++ return -ENOLINK; |
6613 |
++ |
6614 |
+ /* update cfg80211 bss information with the new channel */ |
6615 |
+ if (!is_zero_ether_addr(ifibss->bssid)) { |
6616 |
+ cbss = cfg80211_get_bss(sdata->local->hw.wiphy, |
6617 |
+diff --git a/net/mac80211/scan.c b/net/mac80211/scan.c |
6618 |
+index 887f945bb12d4..d6afaacaf7ef8 100644 |
6619 |
+--- a/net/mac80211/scan.c |
6620 |
++++ b/net/mac80211/scan.c |
6621 |
+@@ -461,16 +461,19 @@ static void __ieee80211_scan_completed(struct ieee80211_hw *hw, bool aborted) |
6622 |
+ scan_req = rcu_dereference_protected(local->scan_req, |
6623 |
+ lockdep_is_held(&local->mtx)); |
6624 |
+ |
6625 |
+- if (scan_req != local->int_scan_req) { |
6626 |
+- local->scan_info.aborted = aborted; |
6627 |
+- cfg80211_scan_done(scan_req, &local->scan_info); |
6628 |
+- } |
6629 |
+ RCU_INIT_POINTER(local->scan_req, NULL); |
6630 |
+ RCU_INIT_POINTER(local->scan_sdata, NULL); |
6631 |
+ |
6632 |
+ local->scanning = 0; |
6633 |
+ local->scan_chandef.chan = NULL; |
6634 |
+ |
6635 |
++ synchronize_rcu(); |
6636 |
++ |
6637 |
++ if (scan_req != local->int_scan_req) { |
6638 |
++ local->scan_info.aborted = aborted; |
6639 |
++ cfg80211_scan_done(scan_req, &local->scan_info); |
6640 |
++ } |
6641 |
++ |
6642 |
+ /* Set power back to normal operating levels. */ |
6643 |
+ ieee80211_hw_config(local, 0); |
6644 |
+ |
6645 |
+diff --git a/net/mac80211/sta_info.c b/net/mac80211/sta_info.c |
6646 |
+index 6eeef7a61927b..f1e263b2c2957 100644 |
6647 |
+--- a/net/mac80211/sta_info.c |
6648 |
++++ b/net/mac80211/sta_info.c |
6649 |
+@@ -2206,9 +2206,9 @@ static inline u64 sta_get_tidstats_msdu(struct ieee80211_sta_rx_stats *rxstats, |
6650 |
+ u64 value; |
6651 |
+ |
6652 |
+ do { |
6653 |
+- start = u64_stats_fetch_begin(&rxstats->syncp); |
6654 |
++ start = u64_stats_fetch_begin_irq(&rxstats->syncp); |
6655 |
+ value = rxstats->msdu[tid]; |
6656 |
+- } while (u64_stats_fetch_retry(&rxstats->syncp, start)); |
6657 |
++ } while (u64_stats_fetch_retry_irq(&rxstats->syncp, start)); |
6658 |
+ |
6659 |
+ return value; |
6660 |
+ } |
6661 |
+@@ -2272,9 +2272,9 @@ static inline u64 sta_get_stats_bytes(struct ieee80211_sta_rx_stats *rxstats) |
6662 |
+ u64 value; |
6663 |
+ |
6664 |
+ do { |
6665 |
+- start = u64_stats_fetch_begin(&rxstats->syncp); |
6666 |
++ start = u64_stats_fetch_begin_irq(&rxstats->syncp); |
6667 |
+ value = rxstats->bytes; |
6668 |
+- } while (u64_stats_fetch_retry(&rxstats->syncp, start)); |
6669 |
++ } while (u64_stats_fetch_retry_irq(&rxstats->syncp, start)); |
6670 |
+ |
6671 |
+ return value; |
6672 |
+ } |
6673 |
+diff --git a/net/mac802154/rx.c b/net/mac802154/rx.c |
6674 |
+index b8ce84618a55b..c439125ef2b91 100644 |
6675 |
+--- a/net/mac802154/rx.c |
6676 |
++++ b/net/mac802154/rx.c |
6677 |
+@@ -44,7 +44,7 @@ ieee802154_subif_frame(struct ieee802154_sub_if_data *sdata, |
6678 |
+ |
6679 |
+ switch (mac_cb(skb)->dest.mode) { |
6680 |
+ case IEEE802154_ADDR_NONE: |
6681 |
+- if (mac_cb(skb)->dest.mode != IEEE802154_ADDR_NONE) |
6682 |
++ if (hdr->source.mode != IEEE802154_ADDR_NONE) |
6683 |
+ /* FIXME: check if we are PAN coordinator */ |
6684 |
+ skb->pkt_type = PACKET_OTHERHOST; |
6685 |
+ else |
6686 |
+diff --git a/net/mpls/af_mpls.c b/net/mpls/af_mpls.c |
6687 |
+index 6e587feb705c4..58a7075084d17 100644 |
6688 |
+--- a/net/mpls/af_mpls.c |
6689 |
++++ b/net/mpls/af_mpls.c |
6690 |
+@@ -1079,9 +1079,9 @@ static void mpls_get_stats(struct mpls_dev *mdev, |
6691 |
+ |
6692 |
+ p = per_cpu_ptr(mdev->stats, i); |
6693 |
+ do { |
6694 |
+- start = u64_stats_fetch_begin(&p->syncp); |
6695 |
++ start = u64_stats_fetch_begin_irq(&p->syncp); |
6696 |
+ local = p->stats; |
6697 |
+- } while (u64_stats_fetch_retry(&p->syncp, start)); |
6698 |
++ } while (u64_stats_fetch_retry_irq(&p->syncp, start)); |
6699 |
+ |
6700 |
+ stats->rx_packets += local.rx_packets; |
6701 |
+ stats->rx_bytes += local.rx_bytes; |
6702 |
+diff --git a/net/openvswitch/datapath.c b/net/openvswitch/datapath.c |
6703 |
+index 67ad08320886b..5e2c83cb7b129 100644 |
6704 |
+--- a/net/openvswitch/datapath.c |
6705 |
++++ b/net/openvswitch/datapath.c |
6706 |
+@@ -1801,7 +1801,7 @@ static int ovs_dp_cmd_new(struct sk_buff *skb, struct genl_info *info) |
6707 |
+ ovs_dp_reset_user_features(skb, info); |
6708 |
+ } |
6709 |
+ |
6710 |
+- goto err_unlock_and_destroy_meters; |
6711 |
++ goto err_destroy_portids; |
6712 |
+ } |
6713 |
+ |
6714 |
+ err = ovs_dp_cmd_fill_info(dp, reply, info->snd_portid, |
6715 |
+@@ -1816,6 +1816,8 @@ static int ovs_dp_cmd_new(struct sk_buff *skb, struct genl_info *info) |
6716 |
+ ovs_notify(&dp_datapath_genl_family, reply, info); |
6717 |
+ return 0; |
6718 |
+ |
6719 |
++err_destroy_portids: |
6720 |
++ kfree(rcu_dereference_raw(dp->upcall_portids)); |
6721 |
+ err_unlock_and_destroy_meters: |
6722 |
+ ovs_unlock(); |
6723 |
+ ovs_meters_exit(dp); |
6724 |
+diff --git a/net/sched/sch_generic.c b/net/sched/sch_generic.c |
6725 |
+index 250d87d993cb7..02299785209c1 100644 |
6726 |
+--- a/net/sched/sch_generic.c |
6727 |
++++ b/net/sched/sch_generic.c |
6728 |
+@@ -1083,6 +1083,21 @@ struct Qdisc *dev_graft_qdisc(struct netdev_queue *dev_queue, |
6729 |
+ } |
6730 |
+ EXPORT_SYMBOL(dev_graft_qdisc); |
6731 |
+ |
6732 |
++static void shutdown_scheduler_queue(struct net_device *dev, |
6733 |
++ struct netdev_queue *dev_queue, |
6734 |
++ void *_qdisc_default) |
6735 |
++{ |
6736 |
++ struct Qdisc *qdisc = dev_queue->qdisc_sleeping; |
6737 |
++ struct Qdisc *qdisc_default = _qdisc_default; |
6738 |
++ |
6739 |
++ if (qdisc) { |
6740 |
++ rcu_assign_pointer(dev_queue->qdisc, qdisc_default); |
6741 |
++ dev_queue->qdisc_sleeping = qdisc_default; |
6742 |
++ |
6743 |
++ qdisc_put(qdisc); |
6744 |
++ } |
6745 |
++} |
6746 |
++ |
6747 |
+ static void attach_one_default_qdisc(struct net_device *dev, |
6748 |
+ struct netdev_queue *dev_queue, |
6749 |
+ void *_unused) |
6750 |
+@@ -1130,6 +1145,7 @@ static void attach_default_qdiscs(struct net_device *dev) |
6751 |
+ if (qdisc == &noop_qdisc) { |
6752 |
+ netdev_warn(dev, "default qdisc (%s) fail, fallback to %s\n", |
6753 |
+ default_qdisc_ops->id, noqueue_qdisc_ops.id); |
6754 |
++ netdev_for_each_tx_queue(dev, shutdown_scheduler_queue, &noop_qdisc); |
6755 |
+ dev->priv_flags |= IFF_NO_QUEUE; |
6756 |
+ netdev_for_each_tx_queue(dev, attach_one_default_qdisc, NULL); |
6757 |
+ qdisc = txq->qdisc_sleeping; |
6758 |
+@@ -1384,21 +1400,6 @@ void dev_init_scheduler(struct net_device *dev) |
6759 |
+ timer_setup(&dev->watchdog_timer, dev_watchdog, 0); |
6760 |
+ } |
6761 |
+ |
6762 |
+-static void shutdown_scheduler_queue(struct net_device *dev, |
6763 |
+- struct netdev_queue *dev_queue, |
6764 |
+- void *_qdisc_default) |
6765 |
+-{ |
6766 |
+- struct Qdisc *qdisc = dev_queue->qdisc_sleeping; |
6767 |
+- struct Qdisc *qdisc_default = _qdisc_default; |
6768 |
+- |
6769 |
+- if (qdisc) { |
6770 |
+- rcu_assign_pointer(dev_queue->qdisc, qdisc_default); |
6771 |
+- dev_queue->qdisc_sleeping = qdisc_default; |
6772 |
+- |
6773 |
+- qdisc_put(qdisc); |
6774 |
+- } |
6775 |
+-} |
6776 |
+- |
6777 |
+ void dev_shutdown(struct net_device *dev) |
6778 |
+ { |
6779 |
+ netdev_for_each_tx_queue(dev, shutdown_scheduler_queue, &noop_qdisc); |
6780 |
+diff --git a/net/sched/sch_tbf.c b/net/sched/sch_tbf.c |
6781 |
+index 78e79029dc631..6eb17004a9e44 100644 |
6782 |
+--- a/net/sched/sch_tbf.c |
6783 |
++++ b/net/sched/sch_tbf.c |
6784 |
+@@ -342,6 +342,7 @@ static int tbf_change(struct Qdisc *sch, struct nlattr *opt, |
6785 |
+ struct nlattr *tb[TCA_TBF_MAX + 1]; |
6786 |
+ struct tc_tbf_qopt *qopt; |
6787 |
+ struct Qdisc *child = NULL; |
6788 |
++ struct Qdisc *old = NULL; |
6789 |
+ struct psched_ratecfg rate; |
6790 |
+ struct psched_ratecfg peak; |
6791 |
+ u64 max_size; |
6792 |
+@@ -433,7 +434,7 @@ static int tbf_change(struct Qdisc *sch, struct nlattr *opt, |
6793 |
+ sch_tree_lock(sch); |
6794 |
+ if (child) { |
6795 |
+ qdisc_tree_flush_backlog(q->qdisc); |
6796 |
+- qdisc_put(q->qdisc); |
6797 |
++ old = q->qdisc; |
6798 |
+ q->qdisc = child; |
6799 |
+ } |
6800 |
+ q->limit = qopt->limit; |
6801 |
+@@ -453,6 +454,7 @@ static int tbf_change(struct Qdisc *sch, struct nlattr *opt, |
6802 |
+ memcpy(&q->peak, &peak, sizeof(struct psched_ratecfg)); |
6803 |
+ |
6804 |
+ sch_tree_unlock(sch); |
6805 |
++ qdisc_put(old); |
6806 |
+ err = 0; |
6807 |
+ |
6808 |
+ tbf_offload_change(sch); |
6809 |
+diff --git a/net/smc/af_smc.c b/net/smc/af_smc.c |
6810 |
+index 2ddd7b34b4ce5..26f81e2e1dfba 100644 |
6811 |
+--- a/net/smc/af_smc.c |
6812 |
++++ b/net/smc/af_smc.c |
6813 |
+@@ -1490,7 +1490,6 @@ static void smc_listen_out_connected(struct smc_sock *new_smc) |
6814 |
+ { |
6815 |
+ struct sock *newsmcsk = &new_smc->sk; |
6816 |
+ |
6817 |
+- sk_refcnt_debug_inc(newsmcsk); |
6818 |
+ if (newsmcsk->sk_state == SMC_INIT) |
6819 |
+ newsmcsk->sk_state = SMC_ACTIVE; |
6820 |
+ |
6821 |
+diff --git a/net/wireless/debugfs.c b/net/wireless/debugfs.c |
6822 |
+index aab43469a2f04..0878b162890af 100644 |
6823 |
+--- a/net/wireless/debugfs.c |
6824 |
++++ b/net/wireless/debugfs.c |
6825 |
+@@ -65,9 +65,10 @@ static ssize_t ht40allow_map_read(struct file *file, |
6826 |
+ { |
6827 |
+ struct wiphy *wiphy = file->private_data; |
6828 |
+ char *buf; |
6829 |
+- unsigned int offset = 0, buf_size = PAGE_SIZE, i, r; |
6830 |
++ unsigned int offset = 0, buf_size = PAGE_SIZE, i; |
6831 |
+ enum nl80211_band band; |
6832 |
+ struct ieee80211_supported_band *sband; |
6833 |
++ ssize_t r; |
6834 |
+ |
6835 |
+ buf = kzalloc(buf_size, GFP_KERNEL); |
6836 |
+ if (!buf) |
6837 |
+diff --git a/scripts/Makefile.modfinal b/scripts/Makefile.modfinal |
6838 |
+index ff805777431ce..ce9661d968a3d 100644 |
6839 |
+--- a/scripts/Makefile.modfinal |
6840 |
++++ b/scripts/Makefile.modfinal |
6841 |
+@@ -40,7 +40,7 @@ quiet_cmd_ld_ko_o = LD [M] $@ |
6842 |
+ quiet_cmd_btf_ko = BTF [M] $@ |
6843 |
+ cmd_btf_ko = \ |
6844 |
+ if [ -f vmlinux ]; then \ |
6845 |
+- LLVM_OBJCOPY="$(OBJCOPY)" $(PAHOLE) -J --btf_base vmlinux $@; \ |
6846 |
++ LLVM_OBJCOPY="$(OBJCOPY)" $(PAHOLE) -J $(PAHOLE_FLAGS) --btf_base vmlinux $@; \ |
6847 |
+ else \ |
6848 |
+ printf "Skipping BTF generation for %s due to unavailability of vmlinux\n" $@ 1>&2; \ |
6849 |
+ fi; |
6850 |
+diff --git a/scripts/link-vmlinux.sh b/scripts/link-vmlinux.sh |
6851 |
+index 3819a461465d8..57ef6accbb40f 100755 |
6852 |
+--- a/scripts/link-vmlinux.sh |
6853 |
++++ b/scripts/link-vmlinux.sh |
6854 |
+@@ -211,7 +211,6 @@ vmlinux_link() |
6855 |
+ gen_btf() |
6856 |
+ { |
6857 |
+ local pahole_ver |
6858 |
+- local extra_paholeopt= |
6859 |
+ |
6860 |
+ if ! [ -x "$(command -v ${PAHOLE})" ]; then |
6861 |
+ echo >&2 "BTF: ${1}: pahole (${PAHOLE}) is not available" |
6862 |
+@@ -226,16 +225,8 @@ gen_btf() |
6863 |
+ |
6864 |
+ vmlinux_link ${1} |
6865 |
+ |
6866 |
+- if [ "${pahole_ver}" -ge "118" ] && [ "${pahole_ver}" -le "121" ]; then |
6867 |
+- # pahole 1.18 through 1.21 can't handle zero-sized per-CPU vars |
6868 |
+- extra_paholeopt="${extra_paholeopt} --skip_encoding_btf_vars" |
6869 |
+- fi |
6870 |
+- if [ "${pahole_ver}" -ge "121" ]; then |
6871 |
+- extra_paholeopt="${extra_paholeopt} --btf_gen_floats" |
6872 |
+- fi |
6873 |
+- |
6874 |
+ info "BTF" ${2} |
6875 |
+- LLVM_OBJCOPY="${OBJCOPY}" ${PAHOLE} -J ${extra_paholeopt} ${1} |
6876 |
++ LLVM_OBJCOPY="${OBJCOPY}" ${PAHOLE} -J ${PAHOLE_FLAGS} ${1} |
6877 |
+ |
6878 |
+ # Create ${2} which contains just .BTF section but no symbols. Add |
6879 |
+ # SHF_ALLOC because .BTF will be part of the vmlinux image. --strip-all |
6880 |
+diff --git a/scripts/pahole-flags.sh b/scripts/pahole-flags.sh |
6881 |
+new file mode 100644 |
6882 |
+index 0000000000000..7acee326aa6c9 |
6883 |
+--- /dev/null |
6884 |
++++ b/scripts/pahole-flags.sh |
6885 |
+@@ -0,0 +1,24 @@ |
6886 |
++#!/bin/sh |
6887 |
++# SPDX-License-Identifier: GPL-2.0 |
6888 |
++ |
6889 |
++extra_paholeopt= |
6890 |
++ |
6891 |
++if ! [ -x "$(command -v ${PAHOLE})" ]; then |
6892 |
++ exit 0 |
6893 |
++fi |
6894 |
++ |
6895 |
++pahole_ver=$(${PAHOLE} --version | sed -E 's/v([0-9]+)\.([0-9]+)/\1\2/') |
6896 |
++ |
6897 |
++if [ "${pahole_ver}" -ge "118" ] && [ "${pahole_ver}" -le "121" ]; then |
6898 |
++ # pahole 1.18 through 1.21 can't handle zero-sized per-CPU vars |
6899 |
++ extra_paholeopt="${extra_paholeopt} --skip_encoding_btf_vars" |
6900 |
++fi |
6901 |
++if [ "${pahole_ver}" -ge "121" ]; then |
6902 |
++ extra_paholeopt="${extra_paholeopt} --btf_gen_floats" |
6903 |
++fi |
6904 |
++ |
6905 |
++if [ "${pahole_ver}" -ge "124" ]; then |
6906 |
++ extra_paholeopt="${extra_paholeopt} --skip_encoding_btf_enum64" |
6907 |
++fi |
6908 |
++ |
6909 |
++echo ${extra_paholeopt} |
6910 |
+diff --git a/sound/core/seq/oss/seq_oss_midi.c b/sound/core/seq/oss/seq_oss_midi.c |
6911 |
+index 1e3bf086f8671..07efb38f58ac1 100644 |
6912 |
+--- a/sound/core/seq/oss/seq_oss_midi.c |
6913 |
++++ b/sound/core/seq/oss/seq_oss_midi.c |
6914 |
+@@ -270,7 +270,9 @@ snd_seq_oss_midi_clear_all(void) |
6915 |
+ void |
6916 |
+ snd_seq_oss_midi_setup(struct seq_oss_devinfo *dp) |
6917 |
+ { |
6918 |
++ spin_lock_irq(®ister_lock); |
6919 |
+ dp->max_mididev = max_midi_devs; |
6920 |
++ spin_unlock_irq(®ister_lock); |
6921 |
+ } |
6922 |
+ |
6923 |
+ /* |
6924 |
+diff --git a/sound/core/seq/seq_clientmgr.c b/sound/core/seq/seq_clientmgr.c |
6925 |
+index 2e9d695d336c9..2d707afa1ef1c 100644 |
6926 |
+--- a/sound/core/seq/seq_clientmgr.c |
6927 |
++++ b/sound/core/seq/seq_clientmgr.c |
6928 |
+@@ -121,13 +121,13 @@ struct snd_seq_client *snd_seq_client_use_ptr(int clientid) |
6929 |
+ spin_unlock_irqrestore(&clients_lock, flags); |
6930 |
+ #ifdef CONFIG_MODULES |
6931 |
+ if (!in_interrupt()) { |
6932 |
+- static char client_requested[SNDRV_SEQ_GLOBAL_CLIENTS]; |
6933 |
+- static char card_requested[SNDRV_CARDS]; |
6934 |
++ static DECLARE_BITMAP(client_requested, SNDRV_SEQ_GLOBAL_CLIENTS); |
6935 |
++ static DECLARE_BITMAP(card_requested, SNDRV_CARDS); |
6936 |
++ |
6937 |
+ if (clientid < SNDRV_SEQ_GLOBAL_CLIENTS) { |
6938 |
+ int idx; |
6939 |
+ |
6940 |
+- if (!client_requested[clientid]) { |
6941 |
+- client_requested[clientid] = 1; |
6942 |
++ if (!test_and_set_bit(clientid, client_requested)) { |
6943 |
+ for (idx = 0; idx < 15; idx++) { |
6944 |
+ if (seq_client_load[idx] < 0) |
6945 |
+ break; |
6946 |
+@@ -142,10 +142,8 @@ struct snd_seq_client *snd_seq_client_use_ptr(int clientid) |
6947 |
+ int card = (clientid - SNDRV_SEQ_GLOBAL_CLIENTS) / |
6948 |
+ SNDRV_SEQ_CLIENTS_PER_CARD; |
6949 |
+ if (card < snd_ecards_limit) { |
6950 |
+- if (! card_requested[card]) { |
6951 |
+- card_requested[card] = 1; |
6952 |
++ if (!test_and_set_bit(card, card_requested)) |
6953 |
+ snd_request_card(card); |
6954 |
+- } |
6955 |
+ snd_seq_device_load_drivers(); |
6956 |
+ } |
6957 |
+ } |
6958 |
+diff --git a/sound/hda/intel-nhlt.c b/sound/hda/intel-nhlt.c |
6959 |
+index e2237239d922a..8714891f50b0a 100644 |
6960 |
+--- a/sound/hda/intel-nhlt.c |
6961 |
++++ b/sound/hda/intel-nhlt.c |
6962 |
+@@ -55,20 +55,26 @@ int intel_nhlt_get_dmic_geo(struct device *dev, struct nhlt_acpi_table *nhlt) |
6963 |
+ |
6964 |
+ /* find max number of channels based on format_configuration */ |
6965 |
+ if (fmt_configs->fmt_count) { |
6966 |
+- dev_dbg(dev, "%s: found %d format definitions\n", |
6967 |
+- __func__, fmt_configs->fmt_count); |
6968 |
++ struct nhlt_fmt_cfg *fmt_cfg = fmt_configs->fmt_config; |
6969 |
++ |
6970 |
++ dev_dbg(dev, "found %d format definitions\n", |
6971 |
++ fmt_configs->fmt_count); |
6972 |
+ |
6973 |
+ for (i = 0; i < fmt_configs->fmt_count; i++) { |
6974 |
+ struct wav_fmt_ext *fmt_ext; |
6975 |
+ |
6976 |
+- fmt_ext = &fmt_configs->fmt_config[i].fmt_ext; |
6977 |
++ fmt_ext = &fmt_cfg->fmt_ext; |
6978 |
+ |
6979 |
+ if (fmt_ext->fmt.channels > max_ch) |
6980 |
+ max_ch = fmt_ext->fmt.channels; |
6981 |
++ |
6982 |
++ /* Move to the next nhlt_fmt_cfg */ |
6983 |
++ fmt_cfg = (struct nhlt_fmt_cfg *)(fmt_cfg->config.caps + |
6984 |
++ fmt_cfg->config.size); |
6985 |
+ } |
6986 |
+- dev_dbg(dev, "%s: max channels found %d\n", __func__, max_ch); |
6987 |
++ dev_dbg(dev, "max channels found %d\n", max_ch); |
6988 |
+ } else { |
6989 |
+- dev_dbg(dev, "%s: No format information found\n", __func__); |
6990 |
++ dev_dbg(dev, "No format information found\n"); |
6991 |
+ } |
6992 |
+ |
6993 |
+ if (cfg->device_config.config_type != NHLT_CONFIG_TYPE_MIC_ARRAY) { |
6994 |
+@@ -95,17 +101,16 @@ int intel_nhlt_get_dmic_geo(struct device *dev, struct nhlt_acpi_table *nhlt) |
6995 |
+ } |
6996 |
+ |
6997 |
+ if (dmic_geo > 0) { |
6998 |
+- dev_dbg(dev, "%s: Array with %d dmics\n", __func__, dmic_geo); |
6999 |
++ dev_dbg(dev, "Array with %d dmics\n", dmic_geo); |
7000 |
+ } |
7001 |
+ if (max_ch > dmic_geo) { |
7002 |
+- dev_dbg(dev, "%s: max channels %d exceed dmic number %d\n", |
7003 |
+- __func__, max_ch, dmic_geo); |
7004 |
++ dev_dbg(dev, "max channels %d exceed dmic number %d\n", |
7005 |
++ max_ch, dmic_geo); |
7006 |
+ } |
7007 |
+ } |
7008 |
+ } |
7009 |
+ |
7010 |
+- dev_dbg(dev, "%s: dmic number %d max_ch %d\n", |
7011 |
+- __func__, dmic_geo, max_ch); |
7012 |
++ dev_dbg(dev, "dmic number %d max_ch %d\n", dmic_geo, max_ch); |
7013 |
+ |
7014 |
+ return dmic_geo; |
7015 |
+ } |
7016 |
+diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c |
7017 |
+index 600ba91f77031..45b8ebda284d9 100644 |
7018 |
+--- a/sound/pci/hda/patch_realtek.c |
7019 |
++++ b/sound/pci/hda/patch_realtek.c |
7020 |
+@@ -4684,6 +4684,48 @@ static void alc236_fixup_hp_mute_led_micmute_vref(struct hda_codec *codec, |
7021 |
+ alc236_fixup_hp_micmute_led_vref(codec, fix, action); |
7022 |
+ } |
7023 |
+ |
7024 |
++static inline void alc298_samsung_write_coef_pack(struct hda_codec *codec, |
7025 |
++ const unsigned short coefs[2]) |
7026 |
++{ |
7027 |
++ alc_write_coef_idx(codec, 0x23, coefs[0]); |
7028 |
++ alc_write_coef_idx(codec, 0x25, coefs[1]); |
7029 |
++ alc_write_coef_idx(codec, 0x26, 0xb011); |
7030 |
++} |
7031 |
++ |
7032 |
++struct alc298_samsung_amp_desc { |
7033 |
++ unsigned char nid; |
7034 |
++ unsigned short init_seq[2][2]; |
7035 |
++}; |
7036 |
++ |
7037 |
++static void alc298_fixup_samsung_amp(struct hda_codec *codec, |
7038 |
++ const struct hda_fixup *fix, int action) |
7039 |
++{ |
7040 |
++ int i, j; |
7041 |
++ static const unsigned short init_seq[][2] = { |
7042 |
++ { 0x19, 0x00 }, { 0x20, 0xc0 }, { 0x22, 0x44 }, { 0x23, 0x08 }, |
7043 |
++ { 0x24, 0x85 }, { 0x25, 0x41 }, { 0x35, 0x40 }, { 0x36, 0x01 }, |
7044 |
++ { 0x38, 0x81 }, { 0x3a, 0x03 }, { 0x3b, 0x81 }, { 0x40, 0x3e }, |
7045 |
++ { 0x41, 0x07 }, { 0x400, 0x1 } |
7046 |
++ }; |
7047 |
++ static const struct alc298_samsung_amp_desc amps[] = { |
7048 |
++ { 0x3a, { { 0x18, 0x1 }, { 0x26, 0x0 } } }, |
7049 |
++ { 0x39, { { 0x18, 0x2 }, { 0x26, 0x1 } } } |
7050 |
++ }; |
7051 |
++ |
7052 |
++ if (action != HDA_FIXUP_ACT_INIT) |
7053 |
++ return; |
7054 |
++ |
7055 |
++ for (i = 0; i < ARRAY_SIZE(amps); i++) { |
7056 |
++ alc_write_coef_idx(codec, 0x22, amps[i].nid); |
7057 |
++ |
7058 |
++ for (j = 0; j < ARRAY_SIZE(amps[i].init_seq); j++) |
7059 |
++ alc298_samsung_write_coef_pack(codec, amps[i].init_seq[j]); |
7060 |
++ |
7061 |
++ for (j = 0; j < ARRAY_SIZE(init_seq); j++) |
7062 |
++ alc298_samsung_write_coef_pack(codec, init_seq[j]); |
7063 |
++ } |
7064 |
++} |
7065 |
++ |
7066 |
+ #if IS_REACHABLE(CONFIG_INPUT) |
7067 |
+ static void gpio2_mic_hotkey_event(struct hda_codec *codec, |
7068 |
+ struct hda_jack_callback *event) |
7069 |
+@@ -6842,6 +6884,7 @@ enum { |
7070 |
+ ALC236_FIXUP_HP_GPIO_LED, |
7071 |
+ ALC236_FIXUP_HP_MUTE_LED, |
7072 |
+ ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF, |
7073 |
++ ALC298_FIXUP_SAMSUNG_AMP, |
7074 |
+ ALC298_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET, |
7075 |
+ ALC256_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET, |
7076 |
+ ALC295_FIXUP_ASUS_MIC_NO_PRESENCE, |
7077 |
+@@ -8196,6 +8239,12 @@ static const struct hda_fixup alc269_fixups[] = { |
7078 |
+ .type = HDA_FIXUP_FUNC, |
7079 |
+ .v.func = alc236_fixup_hp_mute_led_micmute_vref, |
7080 |
+ }, |
7081 |
++ [ALC298_FIXUP_SAMSUNG_AMP] = { |
7082 |
++ .type = HDA_FIXUP_FUNC, |
7083 |
++ .v.func = alc298_fixup_samsung_amp, |
7084 |
++ .chained = true, |
7085 |
++ .chain_id = ALC298_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET |
7086 |
++ }, |
7087 |
+ [ALC298_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET] = { |
7088 |
+ .type = HDA_FIXUP_VERBS, |
7089 |
+ .v.verbs = (const struct hda_verb[]) { |
7090 |
+@@ -8985,13 +9034,13 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { |
7091 |
+ SND_PCI_QUIRK(0x10ec, 0x1254, "Intel Reference board", ALC295_FIXUP_CHROME_BOOK), |
7092 |
+ SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-SZ6", ALC269_FIXUP_HEADSET_MODE), |
7093 |
+ SND_PCI_QUIRK(0x144d, 0xc109, "Samsung Ativ book 9 (NP900X3G)", ALC269_FIXUP_INV_DMIC), |
7094 |
+- SND_PCI_QUIRK(0x144d, 0xc169, "Samsung Notebook 9 Pen (NP930SBE-K01US)", ALC298_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET), |
7095 |
+- SND_PCI_QUIRK(0x144d, 0xc176, "Samsung Notebook 9 Pro (NP930MBE-K04US)", ALC298_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET), |
7096 |
+- SND_PCI_QUIRK(0x144d, 0xc189, "Samsung Galaxy Flex Book (NT950QCG-X716)", ALC298_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET), |
7097 |
+- SND_PCI_QUIRK(0x144d, 0xc18a, "Samsung Galaxy Book Ion (NP930XCJ-K01US)", ALC298_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET), |
7098 |
++ SND_PCI_QUIRK(0x144d, 0xc169, "Samsung Notebook 9 Pen (NP930SBE-K01US)", ALC298_FIXUP_SAMSUNG_AMP), |
7099 |
++ SND_PCI_QUIRK(0x144d, 0xc176, "Samsung Notebook 9 Pro (NP930MBE-K04US)", ALC298_FIXUP_SAMSUNG_AMP), |
7100 |
++ SND_PCI_QUIRK(0x144d, 0xc189, "Samsung Galaxy Flex Book (NT950QCG-X716)", ALC298_FIXUP_SAMSUNG_AMP), |
7101 |
++ SND_PCI_QUIRK(0x144d, 0xc18a, "Samsung Galaxy Book Ion (NP930XCJ-K01US)", ALC298_FIXUP_SAMSUNG_AMP), |
7102 |
+ SND_PCI_QUIRK(0x144d, 0xc740, "Samsung Ativ book 8 (NP870Z5G)", ALC269_FIXUP_ATIV_BOOK_8), |
7103 |
+- SND_PCI_QUIRK(0x144d, 0xc812, "Samsung Notebook Pen S (NT950SBE-X58)", ALC298_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET), |
7104 |
+- SND_PCI_QUIRK(0x144d, 0xc830, "Samsung Galaxy Book Ion (NT950XCJ-X716A)", ALC298_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET), |
7105 |
++ SND_PCI_QUIRK(0x144d, 0xc812, "Samsung Notebook Pen S (NT950SBE-X58)", ALC298_FIXUP_SAMSUNG_AMP), |
7106 |
++ SND_PCI_QUIRK(0x144d, 0xc830, "Samsung Galaxy Book Ion (NT950XCJ-X716A)", ALC298_FIXUP_SAMSUNG_AMP), |
7107 |
+ SND_PCI_QUIRK(0x144d, 0xc832, "Samsung Galaxy Book Flex Alpha (NP730QCJ)", ALC256_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET), |
7108 |
+ SND_PCI_QUIRK(0x1458, 0xfa53, "Gigabyte BXBT-2807", ALC283_FIXUP_HEADSET_MIC), |
7109 |
+ SND_PCI_QUIRK(0x1462, 0xb120, "MSI Cubi MS-B120", ALC283_FIXUP_HEADSET_MIC), |
7110 |
+@@ -9351,7 +9400,7 @@ static const struct hda_model_fixup alc269_fixup_models[] = { |
7111 |
+ {.id = ALC299_FIXUP_PREDATOR_SPK, .name = "predator-spk"}, |
7112 |
+ {.id = ALC298_FIXUP_HUAWEI_MBX_STEREO, .name = "huawei-mbx-stereo"}, |
7113 |
+ {.id = ALC256_FIXUP_MEDION_HEADSET_NO_PRESENCE, .name = "alc256-medion-headset"}, |
7114 |
+- {.id = ALC298_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET, .name = "alc298-samsung-headphone"}, |
7115 |
++ {.id = ALC298_FIXUP_SAMSUNG_AMP, .name = "alc298-samsung-amp"}, |
7116 |
+ {.id = ALC256_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET, .name = "alc256-samsung-headphone"}, |
7117 |
+ {.id = ALC255_FIXUP_XIAOMI_HEADSET_MIC, .name = "alc255-xiaomi-headset"}, |
7118 |
+ {.id = ALC274_FIXUP_HP_MIC, .name = "alc274-hp-mic-detect"}, |