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commit: 7caea846fb4b5925a39740c3246848a7ba77e423 |
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Author: Mike Pagano <mpagano <AT> gentoo <DOT> org> |
3 |
AuthorDate: Sun Sep 26 14:13:00 2021 +0000 |
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Commit: Mike Pagano <mpagano <AT> gentoo <DOT> org> |
5 |
CommitDate: Sun Sep 26 14:13:00 2021 +0000 |
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URL: https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=7caea846 |
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|
8 |
Linux patch 5.4.149 |
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|
10 |
Signed-off-by: Mike Pagano <mpagano <AT> gentoo.org> |
11 |
|
12 |
0000_README | 4 + |
13 |
1148_linux-5.4.149.patch | 1792 ++++++++++++++++++++++++++++++++++++++++++++++ |
14 |
2 files changed, 1796 insertions(+) |
15 |
|
16 |
diff --git a/0000_README b/0000_README |
17 |
index b620b8f..734dc7b 100644 |
18 |
--- a/0000_README |
19 |
+++ b/0000_README |
20 |
@@ -635,6 +635,10 @@ Patch: 1147_linux-5.4.148.patch |
21 |
From: http://www.kernel.org |
22 |
Desc: Linux 5.4.148 |
23 |
|
24 |
+Patch: 1148_linux-5.4.149.patch |
25 |
+From: http://www.kernel.org |
26 |
+Desc: Linux 5.4.149 |
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+ |
28 |
Patch: 1500_XATTR_USER_PREFIX.patch |
29 |
From: https://bugs.gentoo.org/show_bug.cgi?id=470644 |
30 |
Desc: Support for namespace user.pax.* on tmpfs. |
31 |
|
32 |
diff --git a/1148_linux-5.4.149.patch b/1148_linux-5.4.149.patch |
33 |
new file mode 100644 |
34 |
index 0000000..50a8c8e |
35 |
--- /dev/null |
36 |
+++ b/1148_linux-5.4.149.patch |
37 |
@@ -0,0 +1,1792 @@ |
38 |
+diff --git a/Makefile b/Makefile |
39 |
+index b84706c6d6248..1834f47fbaf61 100644 |
40 |
+--- a/Makefile |
41 |
++++ b/Makefile |
42 |
+@@ -1,7 +1,7 @@ |
43 |
+ # SPDX-License-Identifier: GPL-2.0 |
44 |
+ VERSION = 5 |
45 |
+ PATCHLEVEL = 4 |
46 |
+-SUBLEVEL = 148 |
47 |
++SUBLEVEL = 149 |
48 |
+ EXTRAVERSION = |
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+ NAME = Kleptomaniac Octopus |
50 |
+ |
51 |
+diff --git a/arch/arm/include/asm/ftrace.h b/arch/arm/include/asm/ftrace.h |
52 |
+index 18b0197f23848..15bd9af13497f 100644 |
53 |
+--- a/arch/arm/include/asm/ftrace.h |
54 |
++++ b/arch/arm/include/asm/ftrace.h |
55 |
+@@ -16,6 +16,9 @@ extern void __gnu_mcount_nc(void); |
56 |
+ |
57 |
+ #ifdef CONFIG_DYNAMIC_FTRACE |
58 |
+ struct dyn_arch_ftrace { |
59 |
++#ifdef CONFIG_ARM_MODULE_PLTS |
60 |
++ struct module *mod; |
61 |
++#endif |
62 |
+ }; |
63 |
+ |
64 |
+ static inline unsigned long ftrace_call_adjust(unsigned long addr) |
65 |
+diff --git a/arch/arm/include/asm/insn.h b/arch/arm/include/asm/insn.h |
66 |
+index f20e08ac85aeb..5475cbf9fb6b4 100644 |
67 |
+--- a/arch/arm/include/asm/insn.h |
68 |
++++ b/arch/arm/include/asm/insn.h |
69 |
+@@ -13,18 +13,18 @@ arm_gen_nop(void) |
70 |
+ } |
71 |
+ |
72 |
+ unsigned long |
73 |
+-__arm_gen_branch(unsigned long pc, unsigned long addr, bool link); |
74 |
++__arm_gen_branch(unsigned long pc, unsigned long addr, bool link, bool warn); |
75 |
+ |
76 |
+ static inline unsigned long |
77 |
+ arm_gen_branch(unsigned long pc, unsigned long addr) |
78 |
+ { |
79 |
+- return __arm_gen_branch(pc, addr, false); |
80 |
++ return __arm_gen_branch(pc, addr, false, true); |
81 |
+ } |
82 |
+ |
83 |
+ static inline unsigned long |
84 |
+-arm_gen_branch_link(unsigned long pc, unsigned long addr) |
85 |
++arm_gen_branch_link(unsigned long pc, unsigned long addr, bool warn) |
86 |
+ { |
87 |
+- return __arm_gen_branch(pc, addr, true); |
88 |
++ return __arm_gen_branch(pc, addr, true, warn); |
89 |
+ } |
90 |
+ |
91 |
+ #endif |
92 |
+diff --git a/arch/arm/include/asm/module.h b/arch/arm/include/asm/module.h |
93 |
+index 182163b55546c..961fedbd810ec 100644 |
94 |
+--- a/arch/arm/include/asm/module.h |
95 |
++++ b/arch/arm/include/asm/module.h |
96 |
+@@ -19,8 +19,18 @@ enum { |
97 |
+ }; |
98 |
+ #endif |
99 |
+ |
100 |
++#define PLT_ENT_STRIDE L1_CACHE_BYTES |
101 |
++#define PLT_ENT_COUNT (PLT_ENT_STRIDE / sizeof(u32)) |
102 |
++#define PLT_ENT_SIZE (sizeof(struct plt_entries) / PLT_ENT_COUNT) |
103 |
++ |
104 |
++struct plt_entries { |
105 |
++ u32 ldr[PLT_ENT_COUNT]; |
106 |
++ u32 lit[PLT_ENT_COUNT]; |
107 |
++}; |
108 |
++ |
109 |
+ struct mod_plt_sec { |
110 |
+ struct elf32_shdr *plt; |
111 |
++ struct plt_entries *plt_ent; |
112 |
+ int plt_count; |
113 |
+ }; |
114 |
+ |
115 |
+diff --git a/arch/arm/kernel/ftrace.c b/arch/arm/kernel/ftrace.c |
116 |
+index bda949fd84e8b..12b6da56f88dd 100644 |
117 |
+--- a/arch/arm/kernel/ftrace.c |
118 |
++++ b/arch/arm/kernel/ftrace.c |
119 |
+@@ -71,9 +71,10 @@ int ftrace_arch_code_modify_post_process(void) |
120 |
+ return 0; |
121 |
+ } |
122 |
+ |
123 |
+-static unsigned long ftrace_call_replace(unsigned long pc, unsigned long addr) |
124 |
++static unsigned long ftrace_call_replace(unsigned long pc, unsigned long addr, |
125 |
++ bool warn) |
126 |
+ { |
127 |
+- return arm_gen_branch_link(pc, addr); |
128 |
++ return arm_gen_branch_link(pc, addr, warn); |
129 |
+ } |
130 |
+ |
131 |
+ static int ftrace_modify_code(unsigned long pc, unsigned long old, |
132 |
+@@ -112,14 +113,14 @@ int ftrace_update_ftrace_func(ftrace_func_t func) |
133 |
+ int ret; |
134 |
+ |
135 |
+ pc = (unsigned long)&ftrace_call; |
136 |
+- new = ftrace_call_replace(pc, (unsigned long)func); |
137 |
++ new = ftrace_call_replace(pc, (unsigned long)func, true); |
138 |
+ |
139 |
+ ret = ftrace_modify_code(pc, 0, new, false); |
140 |
+ |
141 |
+ #ifdef CONFIG_DYNAMIC_FTRACE_WITH_REGS |
142 |
+ if (!ret) { |
143 |
+ pc = (unsigned long)&ftrace_regs_call; |
144 |
+- new = ftrace_call_replace(pc, (unsigned long)func); |
145 |
++ new = ftrace_call_replace(pc, (unsigned long)func, true); |
146 |
+ |
147 |
+ ret = ftrace_modify_code(pc, 0, new, false); |
148 |
+ } |
149 |
+@@ -132,10 +133,22 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) |
150 |
+ { |
151 |
+ unsigned long new, old; |
152 |
+ unsigned long ip = rec->ip; |
153 |
++ unsigned long aaddr = adjust_address(rec, addr); |
154 |
++ struct module *mod = NULL; |
155 |
++ |
156 |
++#ifdef CONFIG_ARM_MODULE_PLTS |
157 |
++ mod = rec->arch.mod; |
158 |
++#endif |
159 |
+ |
160 |
+ old = ftrace_nop_replace(rec); |
161 |
+ |
162 |
+- new = ftrace_call_replace(ip, adjust_address(rec, addr)); |
163 |
++ new = ftrace_call_replace(ip, aaddr, !mod); |
164 |
++#ifdef CONFIG_ARM_MODULE_PLTS |
165 |
++ if (!new && mod) { |
166 |
++ aaddr = get_module_plt(mod, ip, aaddr); |
167 |
++ new = ftrace_call_replace(ip, aaddr, true); |
168 |
++ } |
169 |
++#endif |
170 |
+ |
171 |
+ return ftrace_modify_code(rec->ip, old, new, true); |
172 |
+ } |
173 |
+@@ -148,9 +161,9 @@ int ftrace_modify_call(struct dyn_ftrace *rec, unsigned long old_addr, |
174 |
+ unsigned long new, old; |
175 |
+ unsigned long ip = rec->ip; |
176 |
+ |
177 |
+- old = ftrace_call_replace(ip, adjust_address(rec, old_addr)); |
178 |
++ old = ftrace_call_replace(ip, adjust_address(rec, old_addr), true); |
179 |
+ |
180 |
+- new = ftrace_call_replace(ip, adjust_address(rec, addr)); |
181 |
++ new = ftrace_call_replace(ip, adjust_address(rec, addr), true); |
182 |
+ |
183 |
+ return ftrace_modify_code(rec->ip, old, new, true); |
184 |
+ } |
185 |
+@@ -160,12 +173,29 @@ int ftrace_modify_call(struct dyn_ftrace *rec, unsigned long old_addr, |
186 |
+ int ftrace_make_nop(struct module *mod, |
187 |
+ struct dyn_ftrace *rec, unsigned long addr) |
188 |
+ { |
189 |
++ unsigned long aaddr = adjust_address(rec, addr); |
190 |
+ unsigned long ip = rec->ip; |
191 |
+ unsigned long old; |
192 |
+ unsigned long new; |
193 |
+ int ret; |
194 |
+ |
195 |
+- old = ftrace_call_replace(ip, adjust_address(rec, addr)); |
196 |
++#ifdef CONFIG_ARM_MODULE_PLTS |
197 |
++ /* mod is only supplied during module loading */ |
198 |
++ if (!mod) |
199 |
++ mod = rec->arch.mod; |
200 |
++ else |
201 |
++ rec->arch.mod = mod; |
202 |
++#endif |
203 |
++ |
204 |
++ old = ftrace_call_replace(ip, aaddr, |
205 |
++ !IS_ENABLED(CONFIG_ARM_MODULE_PLTS) || !mod); |
206 |
++#ifdef CONFIG_ARM_MODULE_PLTS |
207 |
++ if (!old && mod) { |
208 |
++ aaddr = get_module_plt(mod, ip, aaddr); |
209 |
++ old = ftrace_call_replace(ip, aaddr, true); |
210 |
++ } |
211 |
++#endif |
212 |
++ |
213 |
+ new = ftrace_nop_replace(rec); |
214 |
+ ret = ftrace_modify_code(ip, old, new, true); |
215 |
+ |
216 |
+diff --git a/arch/arm/kernel/insn.c b/arch/arm/kernel/insn.c |
217 |
+index 2e844b70386b3..db0acbb7d7a02 100644 |
218 |
+--- a/arch/arm/kernel/insn.c |
219 |
++++ b/arch/arm/kernel/insn.c |
220 |
+@@ -3,8 +3,9 @@ |
221 |
+ #include <linux/kernel.h> |
222 |
+ #include <asm/opcodes.h> |
223 |
+ |
224 |
+-static unsigned long |
225 |
+-__arm_gen_branch_thumb2(unsigned long pc, unsigned long addr, bool link) |
226 |
++static unsigned long __arm_gen_branch_thumb2(unsigned long pc, |
227 |
++ unsigned long addr, bool link, |
228 |
++ bool warn) |
229 |
+ { |
230 |
+ unsigned long s, j1, j2, i1, i2, imm10, imm11; |
231 |
+ unsigned long first, second; |
232 |
+@@ -12,7 +13,7 @@ __arm_gen_branch_thumb2(unsigned long pc, unsigned long addr, bool link) |
233 |
+ |
234 |
+ offset = (long)addr - (long)(pc + 4); |
235 |
+ if (offset < -16777216 || offset > 16777214) { |
236 |
+- WARN_ON_ONCE(1); |
237 |
++ WARN_ON_ONCE(warn); |
238 |
+ return 0; |
239 |
+ } |
240 |
+ |
241 |
+@@ -33,8 +34,8 @@ __arm_gen_branch_thumb2(unsigned long pc, unsigned long addr, bool link) |
242 |
+ return __opcode_thumb32_compose(first, second); |
243 |
+ } |
244 |
+ |
245 |
+-static unsigned long |
246 |
+-__arm_gen_branch_arm(unsigned long pc, unsigned long addr, bool link) |
247 |
++static unsigned long __arm_gen_branch_arm(unsigned long pc, unsigned long addr, |
248 |
++ bool link, bool warn) |
249 |
+ { |
250 |
+ unsigned long opcode = 0xea000000; |
251 |
+ long offset; |
252 |
+@@ -44,7 +45,7 @@ __arm_gen_branch_arm(unsigned long pc, unsigned long addr, bool link) |
253 |
+ |
254 |
+ offset = (long)addr - (long)(pc + 8); |
255 |
+ if (unlikely(offset < -33554432 || offset > 33554428)) { |
256 |
+- WARN_ON_ONCE(1); |
257 |
++ WARN_ON_ONCE(warn); |
258 |
+ return 0; |
259 |
+ } |
260 |
+ |
261 |
+@@ -54,10 +55,10 @@ __arm_gen_branch_arm(unsigned long pc, unsigned long addr, bool link) |
262 |
+ } |
263 |
+ |
264 |
+ unsigned long |
265 |
+-__arm_gen_branch(unsigned long pc, unsigned long addr, bool link) |
266 |
++__arm_gen_branch(unsigned long pc, unsigned long addr, bool link, bool warn) |
267 |
+ { |
268 |
+ if (IS_ENABLED(CONFIG_THUMB2_KERNEL)) |
269 |
+- return __arm_gen_branch_thumb2(pc, addr, link); |
270 |
++ return __arm_gen_branch_thumb2(pc, addr, link, warn); |
271 |
+ else |
272 |
+- return __arm_gen_branch_arm(pc, addr, link); |
273 |
++ return __arm_gen_branch_arm(pc, addr, link, warn); |
274 |
+ } |
275 |
+diff --git a/arch/arm/kernel/module-plts.c b/arch/arm/kernel/module-plts.c |
276 |
+index b647741c0ab06..d1c2d3bd55b64 100644 |
277 |
+--- a/arch/arm/kernel/module-plts.c |
278 |
++++ b/arch/arm/kernel/module-plts.c |
279 |
+@@ -4,6 +4,7 @@ |
280 |
+ */ |
281 |
+ |
282 |
+ #include <linux/elf.h> |
283 |
++#include <linux/ftrace.h> |
284 |
+ #include <linux/kernel.h> |
285 |
+ #include <linux/module.h> |
286 |
+ #include <linux/sort.h> |
287 |
+@@ -11,10 +12,6 @@ |
288 |
+ #include <asm/cache.h> |
289 |
+ #include <asm/opcodes.h> |
290 |
+ |
291 |
+-#define PLT_ENT_STRIDE L1_CACHE_BYTES |
292 |
+-#define PLT_ENT_COUNT (PLT_ENT_STRIDE / sizeof(u32)) |
293 |
+-#define PLT_ENT_SIZE (sizeof(struct plt_entries) / PLT_ENT_COUNT) |
294 |
+- |
295 |
+ #ifdef CONFIG_THUMB2_KERNEL |
296 |
+ #define PLT_ENT_LDR __opcode_to_mem_thumb32(0xf8dff000 | \ |
297 |
+ (PLT_ENT_STRIDE - 4)) |
298 |
+@@ -23,9 +20,11 @@ |
299 |
+ (PLT_ENT_STRIDE - 8)) |
300 |
+ #endif |
301 |
+ |
302 |
+-struct plt_entries { |
303 |
+- u32 ldr[PLT_ENT_COUNT]; |
304 |
+- u32 lit[PLT_ENT_COUNT]; |
305 |
++static const u32 fixed_plts[] = { |
306 |
++#ifdef CONFIG_DYNAMIC_FTRACE |
307 |
++ FTRACE_ADDR, |
308 |
++ MCOUNT_ADDR, |
309 |
++#endif |
310 |
+ }; |
311 |
+ |
312 |
+ static bool in_init(const struct module *mod, unsigned long loc) |
313 |
+@@ -33,14 +32,40 @@ static bool in_init(const struct module *mod, unsigned long loc) |
314 |
+ return loc - (u32)mod->init_layout.base < mod->init_layout.size; |
315 |
+ } |
316 |
+ |
317 |
++static void prealloc_fixed(struct mod_plt_sec *pltsec, struct plt_entries *plt) |
318 |
++{ |
319 |
++ int i; |
320 |
++ |
321 |
++ if (!ARRAY_SIZE(fixed_plts) || pltsec->plt_count) |
322 |
++ return; |
323 |
++ pltsec->plt_count = ARRAY_SIZE(fixed_plts); |
324 |
++ |
325 |
++ for (i = 0; i < ARRAY_SIZE(plt->ldr); ++i) |
326 |
++ plt->ldr[i] = PLT_ENT_LDR; |
327 |
++ |
328 |
++ BUILD_BUG_ON(sizeof(fixed_plts) > sizeof(plt->lit)); |
329 |
++ memcpy(plt->lit, fixed_plts, sizeof(fixed_plts)); |
330 |
++} |
331 |
++ |
332 |
+ u32 get_module_plt(struct module *mod, unsigned long loc, Elf32_Addr val) |
333 |
+ { |
334 |
+ struct mod_plt_sec *pltsec = !in_init(mod, loc) ? &mod->arch.core : |
335 |
+ &mod->arch.init; |
336 |
++ struct plt_entries *plt; |
337 |
++ int idx; |
338 |
++ |
339 |
++ /* cache the address, ELF header is available only during module load */ |
340 |
++ if (!pltsec->plt_ent) |
341 |
++ pltsec->plt_ent = (struct plt_entries *)pltsec->plt->sh_addr; |
342 |
++ plt = pltsec->plt_ent; |
343 |
+ |
344 |
+- struct plt_entries *plt = (struct plt_entries *)pltsec->plt->sh_addr; |
345 |
+- int idx = 0; |
346 |
++ prealloc_fixed(pltsec, plt); |
347 |
++ |
348 |
++ for (idx = 0; idx < ARRAY_SIZE(fixed_plts); ++idx) |
349 |
++ if (plt->lit[idx] == val) |
350 |
++ return (u32)&plt->ldr[idx]; |
351 |
+ |
352 |
++ idx = 0; |
353 |
+ /* |
354 |
+ * Look for an existing entry pointing to 'val'. Given that the |
355 |
+ * relocations are sorted, this will be the last entry we allocated. |
356 |
+@@ -188,8 +213,8 @@ static unsigned int count_plts(const Elf32_Sym *syms, Elf32_Addr base, |
357 |
+ int module_frob_arch_sections(Elf_Ehdr *ehdr, Elf_Shdr *sechdrs, |
358 |
+ char *secstrings, struct module *mod) |
359 |
+ { |
360 |
+- unsigned long core_plts = 0; |
361 |
+- unsigned long init_plts = 0; |
362 |
++ unsigned long core_plts = ARRAY_SIZE(fixed_plts); |
363 |
++ unsigned long init_plts = ARRAY_SIZE(fixed_plts); |
364 |
+ Elf32_Shdr *s, *sechdrs_end = sechdrs + ehdr->e_shnum; |
365 |
+ Elf32_Sym *syms = NULL; |
366 |
+ |
367 |
+@@ -244,6 +269,7 @@ int module_frob_arch_sections(Elf_Ehdr *ehdr, Elf_Shdr *sechdrs, |
368 |
+ mod->arch.core.plt->sh_size = round_up(core_plts * PLT_ENT_SIZE, |
369 |
+ sizeof(struct plt_entries)); |
370 |
+ mod->arch.core.plt_count = 0; |
371 |
++ mod->arch.core.plt_ent = NULL; |
372 |
+ |
373 |
+ mod->arch.init.plt->sh_type = SHT_NOBITS; |
374 |
+ mod->arch.init.plt->sh_flags = SHF_EXECINSTR | SHF_ALLOC; |
375 |
+@@ -251,6 +277,7 @@ int module_frob_arch_sections(Elf_Ehdr *ehdr, Elf_Shdr *sechdrs, |
376 |
+ mod->arch.init.plt->sh_size = round_up(init_plts * PLT_ENT_SIZE, |
377 |
+ sizeof(struct plt_entries)); |
378 |
+ mod->arch.init.plt_count = 0; |
379 |
++ mod->arch.init.plt_ent = NULL; |
380 |
+ |
381 |
+ pr_debug("%s: plt=%x, init.plt=%x\n", __func__, |
382 |
+ mod->arch.core.plt->sh_size, mod->arch.init.plt->sh_size); |
383 |
+diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c |
384 |
+index 0804a6af4a3b7..5a3641b5ec2cd 100644 |
385 |
+--- a/arch/arm/mm/init.c |
386 |
++++ b/arch/arm/mm/init.c |
387 |
+@@ -469,7 +469,11 @@ static void __init free_highpages(void) |
388 |
+ void __init mem_init(void) |
389 |
+ { |
390 |
+ #ifdef CONFIG_ARM_LPAE |
391 |
+- swiotlb_init(1); |
392 |
++ if (swiotlb_force == SWIOTLB_FORCE || |
393 |
++ max_pfn > arm_dma_pfn_limit) |
394 |
++ swiotlb_init(1); |
395 |
++ else |
396 |
++ swiotlb_force = SWIOTLB_NO_FORCE; |
397 |
+ #endif |
398 |
+ |
399 |
+ set_max_mapnr(pfn_to_page(max_pfn) - mem_map); |
400 |
+diff --git a/arch/arm64/kernel/cacheinfo.c b/arch/arm64/kernel/cacheinfo.c |
401 |
+index 7fa6828bb488a..587543c6c51cb 100644 |
402 |
+--- a/arch/arm64/kernel/cacheinfo.c |
403 |
++++ b/arch/arm64/kernel/cacheinfo.c |
404 |
+@@ -43,7 +43,7 @@ static void ci_leaf_init(struct cacheinfo *this_leaf, |
405 |
+ this_leaf->type = type; |
406 |
+ } |
407 |
+ |
408 |
+-static int __init_cache_level(unsigned int cpu) |
409 |
++int init_cache_level(unsigned int cpu) |
410 |
+ { |
411 |
+ unsigned int ctype, level, leaves, fw_level; |
412 |
+ struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); |
413 |
+@@ -78,7 +78,7 @@ static int __init_cache_level(unsigned int cpu) |
414 |
+ return 0; |
415 |
+ } |
416 |
+ |
417 |
+-static int __populate_cache_leaves(unsigned int cpu) |
418 |
++int populate_cache_leaves(unsigned int cpu) |
419 |
+ { |
420 |
+ unsigned int level, idx; |
421 |
+ enum cache_type type; |
422 |
+@@ -97,6 +97,3 @@ static int __populate_cache_leaves(unsigned int cpu) |
423 |
+ } |
424 |
+ return 0; |
425 |
+ } |
426 |
+- |
427 |
+-DEFINE_SMP_CALL_CACHE_FUNCTION(init_cache_level) |
428 |
+-DEFINE_SMP_CALL_CACHE_FUNCTION(populate_cache_leaves) |
429 |
+diff --git a/arch/mips/kernel/cacheinfo.c b/arch/mips/kernel/cacheinfo.c |
430 |
+index 47312c5294102..529dab855aac9 100644 |
431 |
+--- a/arch/mips/kernel/cacheinfo.c |
432 |
++++ b/arch/mips/kernel/cacheinfo.c |
433 |
+@@ -17,7 +17,7 @@ do { \ |
434 |
+ leaf++; \ |
435 |
+ } while (0) |
436 |
+ |
437 |
+-static int __init_cache_level(unsigned int cpu) |
438 |
++int init_cache_level(unsigned int cpu) |
439 |
+ { |
440 |
+ struct cpuinfo_mips *c = ¤t_cpu_data; |
441 |
+ struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); |
442 |
+@@ -69,7 +69,7 @@ static void fill_cpumask_cluster(int cpu, cpumask_t *cpu_map) |
443 |
+ cpumask_set_cpu(cpu1, cpu_map); |
444 |
+ } |
445 |
+ |
446 |
+-static int __populate_cache_leaves(unsigned int cpu) |
447 |
++int populate_cache_leaves(unsigned int cpu) |
448 |
+ { |
449 |
+ struct cpuinfo_mips *c = ¤t_cpu_data; |
450 |
+ struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); |
451 |
+@@ -98,6 +98,3 @@ static int __populate_cache_leaves(unsigned int cpu) |
452 |
+ |
453 |
+ return 0; |
454 |
+ } |
455 |
+- |
456 |
+-DEFINE_SMP_CALL_CACHE_FUNCTION(init_cache_level) |
457 |
+-DEFINE_SMP_CALL_CACHE_FUNCTION(populate_cache_leaves) |
458 |
+diff --git a/arch/riscv/kernel/cacheinfo.c b/arch/riscv/kernel/cacheinfo.c |
459 |
+index 4c90c07d8c39d..d930bd073b7b2 100644 |
460 |
+--- a/arch/riscv/kernel/cacheinfo.c |
461 |
++++ b/arch/riscv/kernel/cacheinfo.c |
462 |
+@@ -16,7 +16,7 @@ static void ci_leaf_init(struct cacheinfo *this_leaf, |
463 |
+ this_leaf->type = type; |
464 |
+ } |
465 |
+ |
466 |
+-static int __init_cache_level(unsigned int cpu) |
467 |
++int init_cache_level(unsigned int cpu) |
468 |
+ { |
469 |
+ struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); |
470 |
+ struct device_node *np = of_cpu_device_node_get(cpu); |
471 |
+@@ -58,7 +58,7 @@ static int __init_cache_level(unsigned int cpu) |
472 |
+ return 0; |
473 |
+ } |
474 |
+ |
475 |
+-static int __populate_cache_leaves(unsigned int cpu) |
476 |
++int populate_cache_leaves(unsigned int cpu) |
477 |
+ { |
478 |
+ struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); |
479 |
+ struct cacheinfo *this_leaf = this_cpu_ci->info_list; |
480 |
+@@ -95,6 +95,3 @@ static int __populate_cache_leaves(unsigned int cpu) |
481 |
+ |
482 |
+ return 0; |
483 |
+ } |
484 |
+- |
485 |
+-DEFINE_SMP_CALL_CACHE_FUNCTION(init_cache_level) |
486 |
+-DEFINE_SMP_CALL_CACHE_FUNCTION(populate_cache_leaves) |
487 |
+diff --git a/arch/s390/pci/pci_mmio.c b/arch/s390/pci/pci_mmio.c |
488 |
+index 020a2c514d961..921f0fc12f1fa 100644 |
489 |
+--- a/arch/s390/pci/pci_mmio.c |
490 |
++++ b/arch/s390/pci/pci_mmio.c |
491 |
+@@ -128,7 +128,7 @@ static long get_pfn(unsigned long user_addr, unsigned long access, |
492 |
+ down_read(¤t->mm->mmap_sem); |
493 |
+ ret = -EINVAL; |
494 |
+ vma = find_vma(current->mm, user_addr); |
495 |
+- if (!vma) |
496 |
++ if (!vma || user_addr < vma->vm_start) |
497 |
+ goto out; |
498 |
+ ret = -EACCES; |
499 |
+ if (!(vma->vm_flags & access)) |
500 |
+diff --git a/arch/um/drivers/virtio_uml.c b/arch/um/drivers/virtio_uml.c |
501 |
+index 18618af3835f9..936e17eab3360 100644 |
502 |
+--- a/arch/um/drivers/virtio_uml.c |
503 |
++++ b/arch/um/drivers/virtio_uml.c |
504 |
+@@ -994,7 +994,7 @@ static int virtio_uml_probe(struct platform_device *pdev) |
505 |
+ rc = os_connect_socket(pdata->socket_path); |
506 |
+ } while (rc == -EINTR); |
507 |
+ if (rc < 0) |
508 |
+- return rc; |
509 |
++ goto error_free; |
510 |
+ vu_dev->sock = rc; |
511 |
+ |
512 |
+ rc = vhost_user_init(vu_dev); |
513 |
+@@ -1010,6 +1010,8 @@ static int virtio_uml_probe(struct platform_device *pdev) |
514 |
+ |
515 |
+ error_init: |
516 |
+ os_close_file(vu_dev->sock); |
517 |
++error_free: |
518 |
++ kfree(vu_dev); |
519 |
+ return rc; |
520 |
+ } |
521 |
+ |
522 |
+diff --git a/arch/x86/kernel/cpu/cacheinfo.c b/arch/x86/kernel/cpu/cacheinfo.c |
523 |
+index 30f33b75209a1..cae566567e15e 100644 |
524 |
+--- a/arch/x86/kernel/cpu/cacheinfo.c |
525 |
++++ b/arch/x86/kernel/cpu/cacheinfo.c |
526 |
+@@ -985,7 +985,7 @@ static void ci_leaf_init(struct cacheinfo *this_leaf, |
527 |
+ this_leaf->priv = base->nb; |
528 |
+ } |
529 |
+ |
530 |
+-static int __init_cache_level(unsigned int cpu) |
531 |
++int init_cache_level(unsigned int cpu) |
532 |
+ { |
533 |
+ struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); |
534 |
+ |
535 |
+@@ -1014,7 +1014,7 @@ static void get_cache_id(int cpu, struct _cpuid4_info_regs *id4_regs) |
536 |
+ id4_regs->id = c->apicid >> index_msb; |
537 |
+ } |
538 |
+ |
539 |
+-static int __populate_cache_leaves(unsigned int cpu) |
540 |
++int populate_cache_leaves(unsigned int cpu) |
541 |
+ { |
542 |
+ unsigned int idx, ret; |
543 |
+ struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); |
544 |
+@@ -1033,6 +1033,3 @@ static int __populate_cache_leaves(unsigned int cpu) |
545 |
+ |
546 |
+ return 0; |
547 |
+ } |
548 |
+- |
549 |
+-DEFINE_SMP_CALL_CACHE_FUNCTION(init_cache_level) |
550 |
+-DEFINE_SMP_CALL_CACHE_FUNCTION(populate_cache_leaves) |
551 |
+diff --git a/block/blk-throttle.c b/block/blk-throttle.c |
552 |
+index 18f773e52dfb1..bd870f9ae4586 100644 |
553 |
+--- a/block/blk-throttle.c |
554 |
++++ b/block/blk-throttle.c |
555 |
+@@ -2414,6 +2414,7 @@ int blk_throtl_init(struct request_queue *q) |
556 |
+ void blk_throtl_exit(struct request_queue *q) |
557 |
+ { |
558 |
+ BUG_ON(!q->td); |
559 |
++ del_timer_sync(&q->td->service_queue.pending_timer); |
560 |
+ throtl_shutdown_wq(q); |
561 |
+ blkcg_deactivate_policy(q, &blkcg_policy_throtl); |
562 |
+ free_percpu(q->td->latency_buckets[READ]); |
563 |
+diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c |
564 |
+index 6b347d9920cc2..47e43c9498257 100644 |
565 |
+--- a/drivers/acpi/pci_mcfg.c |
566 |
++++ b/drivers/acpi/pci_mcfg.c |
567 |
+@@ -142,6 +142,26 @@ static struct mcfg_fixup mcfg_quirks[] = { |
568 |
+ XGENE_V2_ECAM_MCFG(4, 0), |
569 |
+ XGENE_V2_ECAM_MCFG(4, 1), |
570 |
+ XGENE_V2_ECAM_MCFG(4, 2), |
571 |
++ |
572 |
++#define ALTRA_ECAM_QUIRK(rev, seg) \ |
573 |
++ { "Ampere", "Altra ", rev, seg, MCFG_BUS_ANY, &pci_32b_read_ops } |
574 |
++ |
575 |
++ ALTRA_ECAM_QUIRK(1, 0), |
576 |
++ ALTRA_ECAM_QUIRK(1, 1), |
577 |
++ ALTRA_ECAM_QUIRK(1, 2), |
578 |
++ ALTRA_ECAM_QUIRK(1, 3), |
579 |
++ ALTRA_ECAM_QUIRK(1, 4), |
580 |
++ ALTRA_ECAM_QUIRK(1, 5), |
581 |
++ ALTRA_ECAM_QUIRK(1, 6), |
582 |
++ ALTRA_ECAM_QUIRK(1, 7), |
583 |
++ ALTRA_ECAM_QUIRK(1, 8), |
584 |
++ ALTRA_ECAM_QUIRK(1, 9), |
585 |
++ ALTRA_ECAM_QUIRK(1, 10), |
586 |
++ ALTRA_ECAM_QUIRK(1, 11), |
587 |
++ ALTRA_ECAM_QUIRK(1, 12), |
588 |
++ ALTRA_ECAM_QUIRK(1, 13), |
589 |
++ ALTRA_ECAM_QUIRK(1, 14), |
590 |
++ ALTRA_ECAM_QUIRK(1, 15), |
591 |
+ }; |
592 |
+ |
593 |
+ static char mcfg_oem_id[ACPI_OEM_ID_SIZE]; |
594 |
+diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig |
595 |
+index a32d0d7152475..1322461f1f3c5 100644 |
596 |
+--- a/drivers/dma/Kconfig |
597 |
++++ b/drivers/dma/Kconfig |
598 |
+@@ -276,7 +276,7 @@ config INTEL_IDMA64 |
599 |
+ |
600 |
+ config INTEL_IOATDMA |
601 |
+ tristate "Intel I/OAT DMA support" |
602 |
+- depends on PCI && X86_64 |
603 |
++ depends on PCI && X86_64 && !UML |
604 |
+ select DMA_ENGINE |
605 |
+ select DMA_ENGINE_RAID |
606 |
+ select DCA |
607 |
+diff --git a/drivers/dma/acpi-dma.c b/drivers/dma/acpi-dma.c |
608 |
+index dcbcb712de6e8..731f453ecb51f 100644 |
609 |
+--- a/drivers/dma/acpi-dma.c |
610 |
++++ b/drivers/dma/acpi-dma.c |
611 |
+@@ -70,10 +70,14 @@ static int acpi_dma_parse_resource_group(const struct acpi_csrt_group *grp, |
612 |
+ |
613 |
+ si = (const struct acpi_csrt_shared_info *)&grp[1]; |
614 |
+ |
615 |
+- /* Match device by MMIO and IRQ */ |
616 |
++ /* Match device by MMIO */ |
617 |
+ if (si->mmio_base_low != lower_32_bits(mem) || |
618 |
+- si->mmio_base_high != upper_32_bits(mem) || |
619 |
+- si->gsi_interrupt != irq) |
620 |
++ si->mmio_base_high != upper_32_bits(mem)) |
621 |
++ return 0; |
622 |
++ |
623 |
++ /* Match device by Linux vIRQ */ |
624 |
++ ret = acpi_register_gsi(NULL, si->gsi_interrupt, si->interrupt_mode, si->interrupt_polarity); |
625 |
++ if (ret != irq) |
626 |
+ return 0; |
627 |
+ |
628 |
+ dev_dbg(&adev->dev, "matches with %.4s%04X (rev %u)\n", |
629 |
+diff --git a/drivers/dma/sprd-dma.c b/drivers/dma/sprd-dma.c |
630 |
+index 8546ad0347208..b966115bfad1d 100644 |
631 |
+--- a/drivers/dma/sprd-dma.c |
632 |
++++ b/drivers/dma/sprd-dma.c |
633 |
+@@ -1230,6 +1230,7 @@ static const struct of_device_id sprd_dma_match[] = { |
634 |
+ { .compatible = "sprd,sc9860-dma", }, |
635 |
+ {}, |
636 |
+ }; |
637 |
++MODULE_DEVICE_TABLE(of, sprd_dma_match); |
638 |
+ |
639 |
+ static int __maybe_unused sprd_dma_runtime_suspend(struct device *dev) |
640 |
+ { |
641 |
+diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c |
642 |
+index ce18bca45ff27..7729b8d22553e 100644 |
643 |
+--- a/drivers/dma/xilinx/xilinx_dma.c |
644 |
++++ b/drivers/dma/xilinx/xilinx_dma.c |
645 |
+@@ -2703,7 +2703,7 @@ static int xilinx_dma_probe(struct platform_device *pdev) |
646 |
+ xdev->ext_addr = false; |
647 |
+ |
648 |
+ /* Set the dma mask bits */ |
649 |
+- dma_set_mask(xdev->dev, DMA_BIT_MASK(addr_width)); |
650 |
++ dma_set_mask_and_coherent(xdev->dev, DMA_BIT_MASK(addr_width)); |
651 |
+ |
652 |
+ /* Initialize the DMA engine */ |
653 |
+ xdev->common.dev = &pdev->dev; |
654 |
+diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c |
655 |
+index b0ece71aefdee..ce774579c89d1 100644 |
656 |
+--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c |
657 |
++++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c |
658 |
+@@ -57,7 +57,7 @@ nvkm_control_mthd_pstate_info(struct nvkm_control *ctrl, void *data, u32 size) |
659 |
+ args->v0.count = 0; |
660 |
+ args->v0.ustate_ac = NVIF_CONTROL_PSTATE_INFO_V0_USTATE_DISABLE; |
661 |
+ args->v0.ustate_dc = NVIF_CONTROL_PSTATE_INFO_V0_USTATE_DISABLE; |
662 |
+- args->v0.pwrsrc = -ENOSYS; |
663 |
++ args->v0.pwrsrc = -ENODEV; |
664 |
+ args->v0.pstate = NVIF_CONTROL_PSTATE_INFO_V0_PSTATE_UNKNOWN; |
665 |
+ } |
666 |
+ |
667 |
+diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c |
668 |
+index 10d28be73f456..4e7cfd3bfcd2e 100644 |
669 |
+--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c |
670 |
++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c |
671 |
+@@ -1987,6 +1987,8 @@ static void stmmac_tx_err(struct stmmac_priv *priv, u32 chan) |
672 |
+ tx_q->cur_tx = 0; |
673 |
+ tx_q->mss = 0; |
674 |
+ netdev_tx_reset_queue(netdev_get_tx_queue(priv->dev, chan)); |
675 |
++ stmmac_init_tx_chan(priv, priv->ioaddr, priv->plat->dma_cfg, |
676 |
++ tx_q->dma_tx_phy, chan); |
677 |
+ stmmac_start_tx_dma(priv, chan); |
678 |
+ |
679 |
+ priv->dev->stats.tx_errors++; |
680 |
+diff --git a/drivers/net/phy/phy-c45.c b/drivers/net/phy/phy-c45.c |
681 |
+index a1caeee122361..bceb0dcdecbd6 100644 |
682 |
+--- a/drivers/net/phy/phy-c45.c |
683 |
++++ b/drivers/net/phy/phy-c45.c |
684 |
+@@ -239,9 +239,10 @@ int genphy_c45_read_link(struct phy_device *phydev) |
685 |
+ |
686 |
+ /* The link state is latched low so that momentary link |
687 |
+ * drops can be detected. Do not double-read the status |
688 |
+- * in polling mode to detect such short link drops. |
689 |
++ * in polling mode to detect such short link drops except |
690 |
++ * the link was already down. |
691 |
+ */ |
692 |
+- if (!phy_polling_mode(phydev)) { |
693 |
++ if (!phy_polling_mode(phydev) || !phydev->link) { |
694 |
+ val = phy_read_mmd(phydev, devad, MDIO_STAT1); |
695 |
+ if (val < 0) |
696 |
+ return val; |
697 |
+diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c |
698 |
+index 9d0a306f05623..35ade5d21de51 100644 |
699 |
+--- a/drivers/net/phy/phy_device.c |
700 |
++++ b/drivers/net/phy/phy_device.c |
701 |
+@@ -1766,9 +1766,10 @@ int genphy_update_link(struct phy_device *phydev) |
702 |
+ |
703 |
+ /* The link state is latched low so that momentary link |
704 |
+ * drops can be detected. Do not double-read the status |
705 |
+- * in polling mode to detect such short link drops. |
706 |
++ * in polling mode to detect such short link drops except |
707 |
++ * the link was already down. |
708 |
+ */ |
709 |
+- if (!phy_polling_mode(phydev)) { |
710 |
++ if (!phy_polling_mode(phydev) || !phydev->link) { |
711 |
+ status = phy_read(phydev, MII_BMSR); |
712 |
+ if (status < 0) |
713 |
+ return status; |
714 |
+diff --git a/drivers/parisc/dino.c b/drivers/parisc/dino.c |
715 |
+index 2f1cac89ddf5c..544287e9f449b 100644 |
716 |
+--- a/drivers/parisc/dino.c |
717 |
++++ b/drivers/parisc/dino.c |
718 |
+@@ -156,15 +156,6 @@ static inline struct dino_device *DINO_DEV(struct pci_hba_data *hba) |
719 |
+ return container_of(hba, struct dino_device, hba); |
720 |
+ } |
721 |
+ |
722 |
+-/* Check if PCI device is behind a Card-mode Dino. */ |
723 |
+-static int pci_dev_is_behind_card_dino(struct pci_dev *dev) |
724 |
+-{ |
725 |
+- struct dino_device *dino_dev; |
726 |
+- |
727 |
+- dino_dev = DINO_DEV(parisc_walk_tree(dev->bus->bridge)); |
728 |
+- return is_card_dino(&dino_dev->hba.dev->id); |
729 |
+-} |
730 |
+- |
731 |
+ /* |
732 |
+ * Dino Configuration Space Accessor Functions |
733 |
+ */ |
734 |
+@@ -447,6 +438,15 @@ static void quirk_cirrus_cardbus(struct pci_dev *dev) |
735 |
+ DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_6832, quirk_cirrus_cardbus ); |
736 |
+ |
737 |
+ #ifdef CONFIG_TULIP |
738 |
++/* Check if PCI device is behind a Card-mode Dino. */ |
739 |
++static int pci_dev_is_behind_card_dino(struct pci_dev *dev) |
740 |
++{ |
741 |
++ struct dino_device *dino_dev; |
742 |
++ |
743 |
++ dino_dev = DINO_DEV(parisc_walk_tree(dev->bus->bridge)); |
744 |
++ return is_card_dino(&dino_dev->hba.dev->id); |
745 |
++} |
746 |
++ |
747 |
+ static void pci_fixup_tulip(struct pci_dev *dev) |
748 |
+ { |
749 |
+ if (!pci_dev_is_behind_card_dino(dev)) |
750 |
+diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c |
751 |
+index 0538348ed843f..18753fd218a31 100644 |
752 |
+--- a/drivers/pci/controller/pci-aardvark.c |
753 |
++++ b/drivers/pci/controller/pci-aardvark.c |
754 |
+@@ -188,6 +188,8 @@ |
755 |
+ |
756 |
+ #define MSI_IRQ_NUM 32 |
757 |
+ |
758 |
++#define CFG_RD_CRS_VAL 0xffff0001 |
759 |
++ |
760 |
+ struct advk_pcie { |
761 |
+ struct platform_device *pdev; |
762 |
+ void __iomem *base; |
763 |
+@@ -365,7 +367,7 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie) |
764 |
+ advk_writel(pcie, reg, PCIE_CORE_CMD_STATUS_REG); |
765 |
+ } |
766 |
+ |
767 |
+-static int advk_pcie_check_pio_status(struct advk_pcie *pcie, u32 *val) |
768 |
++static int advk_pcie_check_pio_status(struct advk_pcie *pcie, bool allow_crs, u32 *val) |
769 |
+ { |
770 |
+ struct device *dev = &pcie->pdev->dev; |
771 |
+ u32 reg; |
772 |
+@@ -407,9 +409,30 @@ static int advk_pcie_check_pio_status(struct advk_pcie *pcie, u32 *val) |
773 |
+ strcomp_status = "UR"; |
774 |
+ break; |
775 |
+ case PIO_COMPLETION_STATUS_CRS: |
776 |
++ if (allow_crs && val) { |
777 |
++ /* PCIe r4.0, sec 2.3.2, says: |
778 |
++ * If CRS Software Visibility is enabled: |
779 |
++ * For a Configuration Read Request that includes both |
780 |
++ * bytes of the Vendor ID field of a device Function's |
781 |
++ * Configuration Space Header, the Root Complex must |
782 |
++ * complete the Request to the host by returning a |
783 |
++ * read-data value of 0001h for the Vendor ID field and |
784 |
++ * all '1's for any additional bytes included in the |
785 |
++ * request. |
786 |
++ * |
787 |
++ * So CRS in this case is not an error status. |
788 |
++ */ |
789 |
++ *val = CFG_RD_CRS_VAL; |
790 |
++ strcomp_status = NULL; |
791 |
++ break; |
792 |
++ } |
793 |
+ /* PCIe r4.0, sec 2.3.2, says: |
794 |
+ * If CRS Software Visibility is not enabled, the Root Complex |
795 |
+ * must re-issue the Configuration Request as a new Request. |
796 |
++ * If CRS Software Visibility is enabled: For a Configuration |
797 |
++ * Write Request or for any other Configuration Read Request, |
798 |
++ * the Root Complex must re-issue the Configuration Request as |
799 |
++ * a new Request. |
800 |
+ * A Root Complex implementation may choose to limit the number |
801 |
+ * of Configuration Request/CRS Completion Status loops before |
802 |
+ * determining that something is wrong with the target of the |
803 |
+@@ -478,6 +501,7 @@ advk_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge, |
804 |
+ case PCI_EXP_RTCTL: { |
805 |
+ u32 val = advk_readl(pcie, PCIE_ISR0_MASK_REG); |
806 |
+ *value = (val & PCIE_MSG_PM_PME_MASK) ? 0 : PCI_EXP_RTCTL_PMEIE; |
807 |
++ *value |= PCI_EXP_RTCAP_CRSVIS << 16; |
808 |
+ return PCI_BRIDGE_EMUL_HANDLED; |
809 |
+ } |
810 |
+ |
811 |
+@@ -559,6 +583,7 @@ static struct pci_bridge_emul_ops advk_pci_bridge_emul_ops = { |
812 |
+ static int advk_sw_pci_bridge_init(struct advk_pcie *pcie) |
813 |
+ { |
814 |
+ struct pci_bridge_emul *bridge = &pcie->bridge; |
815 |
++ int ret; |
816 |
+ |
817 |
+ bridge->conf.vendor = advk_readl(pcie, PCIE_CORE_DEV_ID_REG) & 0xffff; |
818 |
+ bridge->conf.device = advk_readl(pcie, PCIE_CORE_DEV_ID_REG) >> 16; |
819 |
+@@ -580,7 +605,15 @@ static int advk_sw_pci_bridge_init(struct advk_pcie *pcie) |
820 |
+ bridge->data = pcie; |
821 |
+ bridge->ops = &advk_pci_bridge_emul_ops; |
822 |
+ |
823 |
+- return pci_bridge_emul_init(bridge, 0); |
824 |
++ /* PCIe config space can be initialized after pci_bridge_emul_init() */ |
825 |
++ ret = pci_bridge_emul_init(bridge, 0); |
826 |
++ if (ret < 0) |
827 |
++ return ret; |
828 |
++ |
829 |
++ /* Indicates supports for Completion Retry Status */ |
830 |
++ bridge->pcie_conf.rootcap = cpu_to_le16(PCI_EXP_RTCAP_CRSVIS); |
831 |
++ |
832 |
++ return 0; |
833 |
+ } |
834 |
+ |
835 |
+ static bool advk_pcie_valid_device(struct advk_pcie *pcie, struct pci_bus *bus, |
836 |
+@@ -625,6 +658,7 @@ static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn, |
837 |
+ int where, int size, u32 *val) |
838 |
+ { |
839 |
+ struct advk_pcie *pcie = bus->sysdata; |
840 |
++ bool allow_crs; |
841 |
+ u32 reg; |
842 |
+ int ret; |
843 |
+ |
844 |
+@@ -637,7 +671,24 @@ static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn, |
845 |
+ return pci_bridge_emul_conf_read(&pcie->bridge, where, |
846 |
+ size, val); |
847 |
+ |
848 |
++ /* |
849 |
++ * Completion Retry Status is possible to return only when reading all |
850 |
++ * 4 bytes from PCI_VENDOR_ID and PCI_DEVICE_ID registers at once and |
851 |
++ * CRSSVE flag on Root Bridge is enabled. |
852 |
++ */ |
853 |
++ allow_crs = (where == PCI_VENDOR_ID) && (size == 4) && |
854 |
++ (le16_to_cpu(pcie->bridge.pcie_conf.rootctl) & |
855 |
++ PCI_EXP_RTCTL_CRSSVE); |
856 |
++ |
857 |
+ if (advk_pcie_pio_is_running(pcie)) { |
858 |
++ /* |
859 |
++ * If it is possible return Completion Retry Status so caller |
860 |
++ * tries to issue the request again instead of failing. |
861 |
++ */ |
862 |
++ if (allow_crs) { |
863 |
++ *val = CFG_RD_CRS_VAL; |
864 |
++ return PCIBIOS_SUCCESSFUL; |
865 |
++ } |
866 |
+ *val = 0xffffffff; |
867 |
+ return PCIBIOS_SET_FAILED; |
868 |
+ } |
869 |
+@@ -664,11 +715,21 @@ static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn, |
870 |
+ advk_writel(pcie, 1, PIO_START); |
871 |
+ |
872 |
+ ret = advk_pcie_wait_pio(pcie); |
873 |
+- if (ret < 0) |
874 |
++ if (ret < 0) { |
875 |
++ /* |
876 |
++ * If it is possible return Completion Retry Status so caller |
877 |
++ * tries to issue the request again instead of failing. |
878 |
++ */ |
879 |
++ if (allow_crs) { |
880 |
++ *val = CFG_RD_CRS_VAL; |
881 |
++ return PCIBIOS_SUCCESSFUL; |
882 |
++ } |
883 |
++ *val = 0xffffffff; |
884 |
+ return PCIBIOS_SET_FAILED; |
885 |
++ } |
886 |
+ |
887 |
+ /* Check PIO status and get the read result */ |
888 |
+- ret = advk_pcie_check_pio_status(pcie, val); |
889 |
++ ret = advk_pcie_check_pio_status(pcie, allow_crs, val); |
890 |
+ if (ret < 0) { |
891 |
+ *val = 0xffffffff; |
892 |
+ return PCIBIOS_SET_FAILED; |
893 |
+@@ -737,7 +798,7 @@ static int advk_pcie_wr_conf(struct pci_bus *bus, u32 devfn, |
894 |
+ if (ret < 0) |
895 |
+ return PCIBIOS_SET_FAILED; |
896 |
+ |
897 |
+- ret = advk_pcie_check_pio_status(pcie, NULL); |
898 |
++ ret = advk_pcie_check_pio_status(pcie, false, NULL); |
899 |
+ if (ret < 0) |
900 |
+ return PCIBIOS_SET_FAILED; |
901 |
+ |
902 |
+diff --git a/drivers/pci/ecam.c b/drivers/pci/ecam.c |
903 |
+index 1a81af0ba961a..9765d2eb79d21 100644 |
904 |
+--- a/drivers/pci/ecam.c |
905 |
++++ b/drivers/pci/ecam.c |
906 |
+@@ -164,4 +164,14 @@ struct pci_ecam_ops pci_32b_ops = { |
907 |
+ .write = pci_generic_config_write32, |
908 |
+ } |
909 |
+ }; |
910 |
++ |
911 |
++/* ECAM ops for 32-bit read only (non-compliant) */ |
912 |
++struct pci_ecam_ops pci_32b_read_ops = { |
913 |
++ .bus_shift = 20, |
914 |
++ .pci_ops = { |
915 |
++ .map_bus = pci_ecam_map_bus, |
916 |
++ .read = pci_generic_config_read32, |
917 |
++ .write = pci_generic_config_write, |
918 |
++ } |
919 |
++}; |
920 |
+ #endif |
921 |
+diff --git a/drivers/pci/pci-bridge-emul.c b/drivers/pci/pci-bridge-emul.c |
922 |
+index d3b6b9a056185..06c800595e036 100644 |
923 |
+--- a/drivers/pci/pci-bridge-emul.c |
924 |
++++ b/drivers/pci/pci-bridge-emul.c |
925 |
+@@ -270,10 +270,10 @@ static const struct pci_bridge_reg_behavior pcie_cap_regs_behavior[] = { |
926 |
+ int pci_bridge_emul_init(struct pci_bridge_emul *bridge, |
927 |
+ unsigned int flags) |
928 |
+ { |
929 |
+- bridge->conf.class_revision |= PCI_CLASS_BRIDGE_PCI << 16; |
930 |
++ bridge->conf.class_revision |= cpu_to_le32(PCI_CLASS_BRIDGE_PCI << 16); |
931 |
+ bridge->conf.header_type = PCI_HEADER_TYPE_BRIDGE; |
932 |
+ bridge->conf.cache_line_size = 0x10; |
933 |
+- bridge->conf.status = PCI_STATUS_CAP_LIST; |
934 |
++ bridge->conf.status = cpu_to_le16(PCI_STATUS_CAP_LIST); |
935 |
+ bridge->pci_regs_behavior = kmemdup(pci_regs_behavior, |
936 |
+ sizeof(pci_regs_behavior), |
937 |
+ GFP_KERNEL); |
938 |
+@@ -284,8 +284,9 @@ int pci_bridge_emul_init(struct pci_bridge_emul *bridge, |
939 |
+ bridge->conf.capabilities_pointer = PCI_CAP_PCIE_START; |
940 |
+ bridge->pcie_conf.cap_id = PCI_CAP_ID_EXP; |
941 |
+ /* Set PCIe v2, root port, slot support */ |
942 |
+- bridge->pcie_conf.cap = PCI_EXP_TYPE_ROOT_PORT << 4 | 2 | |
943 |
+- PCI_EXP_FLAGS_SLOT; |
944 |
++ bridge->pcie_conf.cap = |
945 |
++ cpu_to_le16(PCI_EXP_TYPE_ROOT_PORT << 4 | 2 | |
946 |
++ PCI_EXP_FLAGS_SLOT); |
947 |
+ bridge->pcie_cap_regs_behavior = |
948 |
+ kmemdup(pcie_cap_regs_behavior, |
949 |
+ sizeof(pcie_cap_regs_behavior), |
950 |
+@@ -327,7 +328,7 @@ int pci_bridge_emul_conf_read(struct pci_bridge_emul *bridge, int where, |
951 |
+ int reg = where & ~3; |
952 |
+ pci_bridge_emul_read_status_t (*read_op)(struct pci_bridge_emul *bridge, |
953 |
+ int reg, u32 *value); |
954 |
+- u32 *cfgspace; |
955 |
++ __le32 *cfgspace; |
956 |
+ const struct pci_bridge_reg_behavior *behavior; |
957 |
+ |
958 |
+ if (bridge->has_pcie && reg >= PCI_CAP_PCIE_END) { |
959 |
+@@ -343,11 +344,11 @@ int pci_bridge_emul_conf_read(struct pci_bridge_emul *bridge, int where, |
960 |
+ if (bridge->has_pcie && reg >= PCI_CAP_PCIE_START) { |
961 |
+ reg -= PCI_CAP_PCIE_START; |
962 |
+ read_op = bridge->ops->read_pcie; |
963 |
+- cfgspace = (u32 *) &bridge->pcie_conf; |
964 |
++ cfgspace = (__le32 *) &bridge->pcie_conf; |
965 |
+ behavior = bridge->pcie_cap_regs_behavior; |
966 |
+ } else { |
967 |
+ read_op = bridge->ops->read_base; |
968 |
+- cfgspace = (u32 *) &bridge->conf; |
969 |
++ cfgspace = (__le32 *) &bridge->conf; |
970 |
+ behavior = bridge->pci_regs_behavior; |
971 |
+ } |
972 |
+ |
973 |
+@@ -357,7 +358,7 @@ int pci_bridge_emul_conf_read(struct pci_bridge_emul *bridge, int where, |
974 |
+ ret = PCI_BRIDGE_EMUL_NOT_HANDLED; |
975 |
+ |
976 |
+ if (ret == PCI_BRIDGE_EMUL_NOT_HANDLED) |
977 |
+- *value = cfgspace[reg / 4]; |
978 |
++ *value = le32_to_cpu(cfgspace[reg / 4]); |
979 |
+ |
980 |
+ /* |
981 |
+ * Make sure we never return any reserved bit with a value |
982 |
+@@ -387,7 +388,7 @@ int pci_bridge_emul_conf_write(struct pci_bridge_emul *bridge, int where, |
983 |
+ int mask, ret, old, new, shift; |
984 |
+ void (*write_op)(struct pci_bridge_emul *bridge, int reg, |
985 |
+ u32 old, u32 new, u32 mask); |
986 |
+- u32 *cfgspace; |
987 |
++ __le32 *cfgspace; |
988 |
+ const struct pci_bridge_reg_behavior *behavior; |
989 |
+ |
990 |
+ if (bridge->has_pcie && reg >= PCI_CAP_PCIE_END) |
991 |
+@@ -414,11 +415,11 @@ int pci_bridge_emul_conf_write(struct pci_bridge_emul *bridge, int where, |
992 |
+ if (bridge->has_pcie && reg >= PCI_CAP_PCIE_START) { |
993 |
+ reg -= PCI_CAP_PCIE_START; |
994 |
+ write_op = bridge->ops->write_pcie; |
995 |
+- cfgspace = (u32 *) &bridge->pcie_conf; |
996 |
++ cfgspace = (__le32 *) &bridge->pcie_conf; |
997 |
+ behavior = bridge->pcie_cap_regs_behavior; |
998 |
+ } else { |
999 |
+ write_op = bridge->ops->write_base; |
1000 |
+- cfgspace = (u32 *) &bridge->conf; |
1001 |
++ cfgspace = (__le32 *) &bridge->conf; |
1002 |
+ behavior = bridge->pci_regs_behavior; |
1003 |
+ } |
1004 |
+ |
1005 |
+@@ -431,7 +432,7 @@ int pci_bridge_emul_conf_write(struct pci_bridge_emul *bridge, int where, |
1006 |
+ /* Clear the W1C bits */ |
1007 |
+ new &= ~((value << shift) & (behavior[reg / 4].w1c & mask)); |
1008 |
+ |
1009 |
+- cfgspace[reg / 4] = new; |
1010 |
++ cfgspace[reg / 4] = cpu_to_le32(new); |
1011 |
+ |
1012 |
+ if (write_op) |
1013 |
+ write_op(bridge, reg, old, new, mask); |
1014 |
+diff --git a/drivers/pci/pci-bridge-emul.h b/drivers/pci/pci-bridge-emul.h |
1015 |
+index e65b1b79899d0..49bbd37ee318a 100644 |
1016 |
+--- a/drivers/pci/pci-bridge-emul.h |
1017 |
++++ b/drivers/pci/pci-bridge-emul.h |
1018 |
+@@ -6,65 +6,65 @@ |
1019 |
+ |
1020 |
+ /* PCI configuration space of a PCI-to-PCI bridge. */ |
1021 |
+ struct pci_bridge_emul_conf { |
1022 |
+- u16 vendor; |
1023 |
+- u16 device; |
1024 |
+- u16 command; |
1025 |
+- u16 status; |
1026 |
+- u32 class_revision; |
1027 |
++ __le16 vendor; |
1028 |
++ __le16 device; |
1029 |
++ __le16 command; |
1030 |
++ __le16 status; |
1031 |
++ __le32 class_revision; |
1032 |
+ u8 cache_line_size; |
1033 |
+ u8 latency_timer; |
1034 |
+ u8 header_type; |
1035 |
+ u8 bist; |
1036 |
+- u32 bar[2]; |
1037 |
++ __le32 bar[2]; |
1038 |
+ u8 primary_bus; |
1039 |
+ u8 secondary_bus; |
1040 |
+ u8 subordinate_bus; |
1041 |
+ u8 secondary_latency_timer; |
1042 |
+ u8 iobase; |
1043 |
+ u8 iolimit; |
1044 |
+- u16 secondary_status; |
1045 |
+- u16 membase; |
1046 |
+- u16 memlimit; |
1047 |
+- u16 pref_mem_base; |
1048 |
+- u16 pref_mem_limit; |
1049 |
+- u32 prefbaseupper; |
1050 |
+- u32 preflimitupper; |
1051 |
+- u16 iobaseupper; |
1052 |
+- u16 iolimitupper; |
1053 |
++ __le16 secondary_status; |
1054 |
++ __le16 membase; |
1055 |
++ __le16 memlimit; |
1056 |
++ __le16 pref_mem_base; |
1057 |
++ __le16 pref_mem_limit; |
1058 |
++ __le32 prefbaseupper; |
1059 |
++ __le32 preflimitupper; |
1060 |
++ __le16 iobaseupper; |
1061 |
++ __le16 iolimitupper; |
1062 |
+ u8 capabilities_pointer; |
1063 |
+ u8 reserve[3]; |
1064 |
+- u32 romaddr; |
1065 |
++ __le32 romaddr; |
1066 |
+ u8 intline; |
1067 |
+ u8 intpin; |
1068 |
+- u16 bridgectrl; |
1069 |
++ __le16 bridgectrl; |
1070 |
+ }; |
1071 |
+ |
1072 |
+ /* PCI configuration space of the PCIe capabilities */ |
1073 |
+ struct pci_bridge_emul_pcie_conf { |
1074 |
+ u8 cap_id; |
1075 |
+ u8 next; |
1076 |
+- u16 cap; |
1077 |
+- u32 devcap; |
1078 |
+- u16 devctl; |
1079 |
+- u16 devsta; |
1080 |
+- u32 lnkcap; |
1081 |
+- u16 lnkctl; |
1082 |
+- u16 lnksta; |
1083 |
+- u32 slotcap; |
1084 |
+- u16 slotctl; |
1085 |
+- u16 slotsta; |
1086 |
+- u16 rootctl; |
1087 |
+- u16 rsvd; |
1088 |
+- u32 rootsta; |
1089 |
+- u32 devcap2; |
1090 |
+- u16 devctl2; |
1091 |
+- u16 devsta2; |
1092 |
+- u32 lnkcap2; |
1093 |
+- u16 lnkctl2; |
1094 |
+- u16 lnksta2; |
1095 |
+- u32 slotcap2; |
1096 |
+- u16 slotctl2; |
1097 |
+- u16 slotsta2; |
1098 |
++ __le16 cap; |
1099 |
++ __le32 devcap; |
1100 |
++ __le16 devctl; |
1101 |
++ __le16 devsta; |
1102 |
++ __le32 lnkcap; |
1103 |
++ __le16 lnkctl; |
1104 |
++ __le16 lnksta; |
1105 |
++ __le32 slotcap; |
1106 |
++ __le16 slotctl; |
1107 |
++ __le16 slotsta; |
1108 |
++ __le16 rootctl; |
1109 |
++ __le16 rootcap; |
1110 |
++ __le32 rootsta; |
1111 |
++ __le32 devcap2; |
1112 |
++ __le16 devctl2; |
1113 |
++ __le16 devsta2; |
1114 |
++ __le32 lnkcap2; |
1115 |
++ __le16 lnkctl2; |
1116 |
++ __le16 lnksta2; |
1117 |
++ __le32 slotcap2; |
1118 |
++ __le16 slotctl2; |
1119 |
++ __le16 slotsta2; |
1120 |
+ }; |
1121 |
+ |
1122 |
+ struct pci_bridge_emul; |
1123 |
+diff --git a/drivers/pwm/pwm-img.c b/drivers/pwm/pwm-img.c |
1124 |
+index 22c002e685b34..37f9b688661d4 100644 |
1125 |
+--- a/drivers/pwm/pwm-img.c |
1126 |
++++ b/drivers/pwm/pwm-img.c |
1127 |
+@@ -329,23 +329,7 @@ err_pm_disable: |
1128 |
+ static int img_pwm_remove(struct platform_device *pdev) |
1129 |
+ { |
1130 |
+ struct img_pwm_chip *pwm_chip = platform_get_drvdata(pdev); |
1131 |
+- u32 val; |
1132 |
+- unsigned int i; |
1133 |
+- int ret; |
1134 |
+- |
1135 |
+- ret = pm_runtime_get_sync(&pdev->dev); |
1136 |
+- if (ret < 0) { |
1137 |
+- pm_runtime_put(&pdev->dev); |
1138 |
+- return ret; |
1139 |
+- } |
1140 |
+- |
1141 |
+- for (i = 0; i < pwm_chip->chip.npwm; i++) { |
1142 |
+- val = img_pwm_readl(pwm_chip, PWM_CTRL_CFG); |
1143 |
+- val &= ~BIT(i); |
1144 |
+- img_pwm_writel(pwm_chip, PWM_CTRL_CFG, val); |
1145 |
+- } |
1146 |
+ |
1147 |
+- pm_runtime_put(&pdev->dev); |
1148 |
+ pm_runtime_disable(&pdev->dev); |
1149 |
+ if (!pm_runtime_status_suspended(&pdev->dev)) |
1150 |
+ img_pwm_runtime_suspend(&pdev->dev); |
1151 |
+diff --git a/drivers/pwm/pwm-lpc32xx.c b/drivers/pwm/pwm-lpc32xx.c |
1152 |
+index 710d9a207d2b0..522f862eca526 100644 |
1153 |
+--- a/drivers/pwm/pwm-lpc32xx.c |
1154 |
++++ b/drivers/pwm/pwm-lpc32xx.c |
1155 |
+@@ -120,17 +120,17 @@ static int lpc32xx_pwm_probe(struct platform_device *pdev) |
1156 |
+ lpc32xx->chip.npwm = 1; |
1157 |
+ lpc32xx->chip.base = -1; |
1158 |
+ |
1159 |
++ /* If PWM is disabled, configure the output to the default value */ |
1160 |
++ val = readl(lpc32xx->base + (lpc32xx->chip.pwms[0].hwpwm << 2)); |
1161 |
++ val &= ~PWM_PIN_LEVEL; |
1162 |
++ writel(val, lpc32xx->base + (lpc32xx->chip.pwms[0].hwpwm << 2)); |
1163 |
++ |
1164 |
+ ret = pwmchip_add(&lpc32xx->chip); |
1165 |
+ if (ret < 0) { |
1166 |
+ dev_err(&pdev->dev, "failed to add PWM chip, error %d\n", ret); |
1167 |
+ return ret; |
1168 |
+ } |
1169 |
+ |
1170 |
+- /* When PWM is disable, configure the output to the default value */ |
1171 |
+- val = readl(lpc32xx->base + (lpc32xx->chip.pwms[0].hwpwm << 2)); |
1172 |
+- val &= ~PWM_PIN_LEVEL; |
1173 |
+- writel(val, lpc32xx->base + (lpc32xx->chip.pwms[0].hwpwm << 2)); |
1174 |
+- |
1175 |
+ platform_set_drvdata(pdev, lpc32xx); |
1176 |
+ |
1177 |
+ return 0; |
1178 |
+diff --git a/drivers/pwm/pwm-rockchip.c b/drivers/pwm/pwm-rockchip.c |
1179 |
+index 6ad6aad215cf1..8c0af705c5ae9 100644 |
1180 |
+--- a/drivers/pwm/pwm-rockchip.c |
1181 |
++++ b/drivers/pwm/pwm-rockchip.c |
1182 |
+@@ -383,20 +383,6 @@ static int rockchip_pwm_remove(struct platform_device *pdev) |
1183 |
+ { |
1184 |
+ struct rockchip_pwm_chip *pc = platform_get_drvdata(pdev); |
1185 |
+ |
1186 |
+- /* |
1187 |
+- * Disable the PWM clk before unpreparing it if the PWM device is still |
1188 |
+- * running. This should only happen when the last PWM user left it |
1189 |
+- * enabled, or when nobody requested a PWM that was previously enabled |
1190 |
+- * by the bootloader. |
1191 |
+- * |
1192 |
+- * FIXME: Maybe the core should disable all PWM devices in |
1193 |
+- * pwmchip_remove(). In this case we'd only have to call |
1194 |
+- * clk_unprepare() after pwmchip_remove(). |
1195 |
+- * |
1196 |
+- */ |
1197 |
+- if (pwm_is_enabled(pc->chip.pwms)) |
1198 |
+- clk_disable(pc->clk); |
1199 |
+- |
1200 |
+ clk_unprepare(pc->pclk); |
1201 |
+ clk_unprepare(pc->clk); |
1202 |
+ |
1203 |
+diff --git a/drivers/pwm/pwm-stm32-lp.c b/drivers/pwm/pwm-stm32-lp.c |
1204 |
+index 67fca62524dc2..05bb1f95a7739 100644 |
1205 |
+--- a/drivers/pwm/pwm-stm32-lp.c |
1206 |
++++ b/drivers/pwm/pwm-stm32-lp.c |
1207 |
+@@ -225,8 +225,6 @@ static int stm32_pwm_lp_remove(struct platform_device *pdev) |
1208 |
+ { |
1209 |
+ struct stm32_pwm_lp *priv = platform_get_drvdata(pdev); |
1210 |
+ |
1211 |
+- pwm_disable(&priv->chip.pwms[0]); |
1212 |
+- |
1213 |
+ return pwmchip_remove(&priv->chip); |
1214 |
+ } |
1215 |
+ |
1216 |
+diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig |
1217 |
+index 9ae7ce3f50696..0ad8d84aeb339 100644 |
1218 |
+--- a/drivers/rtc/Kconfig |
1219 |
++++ b/drivers/rtc/Kconfig |
1220 |
+@@ -625,6 +625,7 @@ config RTC_DRV_FM3130 |
1221 |
+ |
1222 |
+ config RTC_DRV_RX8010 |
1223 |
+ tristate "Epson RX8010SJ" |
1224 |
++ select REGMAP_I2C |
1225 |
+ help |
1226 |
+ If you say yes here you get support for the Epson RX8010SJ RTC |
1227 |
+ chip. |
1228 |
+diff --git a/drivers/staging/rtl8192u/r8192U_core.c b/drivers/staging/rtl8192u/r8192U_core.c |
1229 |
+index 66cd43f963c9a..e739d1979c877 100644 |
1230 |
+--- a/drivers/staging/rtl8192u/r8192U_core.c |
1231 |
++++ b/drivers/staging/rtl8192u/r8192U_core.c |
1232 |
+@@ -4338,7 +4338,7 @@ static void TranslateRxSignalStuff819xUsb(struct sk_buff *skb, |
1233 |
+ bpacket_match_bssid = (type != IEEE80211_FTYPE_CTL) && |
1234 |
+ (ether_addr_equal(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS) ? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS) ? hdr->addr2 : hdr->addr3)) |
1235 |
+ && (!pstats->bHwError) && (!pstats->bCRC) && (!pstats->bICV); |
1236 |
+- bpacket_toself = bpacket_match_bssid & |
1237 |
++ bpacket_toself = bpacket_match_bssid && |
1238 |
+ (ether_addr_equal(praddr, priv->ieee80211->dev->dev_addr)); |
1239 |
+ |
1240 |
+ if (WLAN_FC_GET_FRAMETYPE(fc) == IEEE80211_STYPE_BEACON) |
1241 |
+diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c |
1242 |
+index fb2c55123a99e..059e3d1610c98 100644 |
1243 |
+--- a/drivers/thermal/samsung/exynos_tmu.c |
1244 |
++++ b/drivers/thermal/samsung/exynos_tmu.c |
1245 |
+@@ -1070,6 +1070,7 @@ static int exynos_tmu_probe(struct platform_device *pdev) |
1246 |
+ data->sclk = devm_clk_get(&pdev->dev, "tmu_sclk"); |
1247 |
+ if (IS_ERR(data->sclk)) { |
1248 |
+ dev_err(&pdev->dev, "Failed to get sclk\n"); |
1249 |
++ ret = PTR_ERR(data->sclk); |
1250 |
+ goto err_clk; |
1251 |
+ } else { |
1252 |
+ ret = clk_prepare_enable(data->sclk); |
1253 |
+diff --git a/drivers/tty/vt/vt.c b/drivers/tty/vt/vt.c |
1254 |
+index 6f013d7f5bd0f..404b80dc06b87 100644 |
1255 |
+--- a/drivers/tty/vt/vt.c |
1256 |
++++ b/drivers/tty/vt/vt.c |
1257 |
+@@ -2070,7 +2070,7 @@ static void restore_cur(struct vc_data *vc) |
1258 |
+ |
1259 |
+ enum { ESnormal, ESesc, ESsquare, ESgetpars, ESfunckey, |
1260 |
+ EShash, ESsetG0, ESsetG1, ESpercent, EScsiignore, ESnonstd, |
1261 |
+- ESpalette, ESosc }; |
1262 |
++ ESpalette, ESosc, ESapc, ESpm, ESdcs }; |
1263 |
+ |
1264 |
+ /* console_lock is held (except via vc_init()) */ |
1265 |
+ static void reset_terminal(struct vc_data *vc, int do_clear) |
1266 |
+@@ -2124,20 +2124,28 @@ static void reset_terminal(struct vc_data *vc, int do_clear) |
1267 |
+ csi_J(vc, 2); |
1268 |
+ } |
1269 |
+ |
1270 |
++/* is this state an ANSI control string? */ |
1271 |
++static bool ansi_control_string(unsigned int state) |
1272 |
++{ |
1273 |
++ if (state == ESosc || state == ESapc || state == ESpm || state == ESdcs) |
1274 |
++ return true; |
1275 |
++ return false; |
1276 |
++} |
1277 |
++ |
1278 |
+ /* console_lock is held */ |
1279 |
+ static void do_con_trol(struct tty_struct *tty, struct vc_data *vc, int c) |
1280 |
+ { |
1281 |
+ /* |
1282 |
+ * Control characters can be used in the _middle_ |
1283 |
+- * of an escape sequence. |
1284 |
++ * of an escape sequence, aside from ANSI control strings. |
1285 |
+ */ |
1286 |
+- if (vc->vc_state == ESosc && c>=8 && c<=13) /* ... except for OSC */ |
1287 |
++ if (ansi_control_string(vc->vc_state) && c >= 8 && c <= 13) |
1288 |
+ return; |
1289 |
+ switch (c) { |
1290 |
+ case 0: |
1291 |
+ return; |
1292 |
+ case 7: |
1293 |
+- if (vc->vc_state == ESosc) |
1294 |
++ if (ansi_control_string(vc->vc_state)) |
1295 |
+ vc->vc_state = ESnormal; |
1296 |
+ else if (vc->vc_bell_duration) |
1297 |
+ kd_mksound(vc->vc_bell_pitch, vc->vc_bell_duration); |
1298 |
+@@ -2196,6 +2204,12 @@ static void do_con_trol(struct tty_struct *tty, struct vc_data *vc, int c) |
1299 |
+ case ']': |
1300 |
+ vc->vc_state = ESnonstd; |
1301 |
+ return; |
1302 |
++ case '_': |
1303 |
++ vc->vc_state = ESapc; |
1304 |
++ return; |
1305 |
++ case '^': |
1306 |
++ vc->vc_state = ESpm; |
1307 |
++ return; |
1308 |
+ case '%': |
1309 |
+ vc->vc_state = ESpercent; |
1310 |
+ return; |
1311 |
+@@ -2212,6 +2226,9 @@ static void do_con_trol(struct tty_struct *tty, struct vc_data *vc, int c) |
1312 |
+ case 'H': |
1313 |
+ vc->vc_tab_stop[7 & (vc->vc_x >> 5)] |= (1 << (vc->vc_x & 31)); |
1314 |
+ return; |
1315 |
++ case 'P': |
1316 |
++ vc->vc_state = ESdcs; |
1317 |
++ return; |
1318 |
+ case 'Z': |
1319 |
+ respond_ID(tty); |
1320 |
+ return; |
1321 |
+@@ -2531,8 +2548,14 @@ static void do_con_trol(struct tty_struct *tty, struct vc_data *vc, int c) |
1322 |
+ vc->vc_translate = set_translate(vc->vc_G1_charset, vc); |
1323 |
+ vc->vc_state = ESnormal; |
1324 |
+ return; |
1325 |
++ case ESapc: |
1326 |
++ return; |
1327 |
+ case ESosc: |
1328 |
+ return; |
1329 |
++ case ESpm: |
1330 |
++ return; |
1331 |
++ case ESdcs: |
1332 |
++ return; |
1333 |
+ default: |
1334 |
+ vc->vc_state = ESnormal; |
1335 |
+ } |
1336 |
+diff --git a/fs/btrfs/volumes.c b/fs/btrfs/volumes.c |
1337 |
+index 8deee49a6b3fa..f302bbb93f32c 100644 |
1338 |
+--- a/fs/btrfs/volumes.c |
1339 |
++++ b/fs/btrfs/volumes.c |
1340 |
+@@ -742,6 +742,8 @@ static int btrfs_free_stale_devices(const char *path, |
1341 |
+ struct btrfs_device *device, *tmp_device; |
1342 |
+ int ret = 0; |
1343 |
+ |
1344 |
++ lockdep_assert_held(&uuid_mutex); |
1345 |
++ |
1346 |
+ if (path) |
1347 |
+ ret = -ENOENT; |
1348 |
+ |
1349 |
+@@ -1181,11 +1183,12 @@ static struct btrfs_fs_devices *clone_fs_devices(struct btrfs_fs_devices *orig) |
1350 |
+ struct btrfs_device *orig_dev; |
1351 |
+ int ret = 0; |
1352 |
+ |
1353 |
++ lockdep_assert_held(&uuid_mutex); |
1354 |
++ |
1355 |
+ fs_devices = alloc_fs_devices(orig->fsid, NULL); |
1356 |
+ if (IS_ERR(fs_devices)) |
1357 |
+ return fs_devices; |
1358 |
+ |
1359 |
+- mutex_lock(&orig->device_list_mutex); |
1360 |
+ fs_devices->total_devices = orig->total_devices; |
1361 |
+ |
1362 |
+ list_for_each_entry(orig_dev, &orig->devices, dev_list) { |
1363 |
+@@ -1217,10 +1220,8 @@ static struct btrfs_fs_devices *clone_fs_devices(struct btrfs_fs_devices *orig) |
1364 |
+ device->fs_devices = fs_devices; |
1365 |
+ fs_devices->num_devices++; |
1366 |
+ } |
1367 |
+- mutex_unlock(&orig->device_list_mutex); |
1368 |
+ return fs_devices; |
1369 |
+ error: |
1370 |
+- mutex_unlock(&orig->device_list_mutex); |
1371 |
+ free_fs_devices(fs_devices); |
1372 |
+ return ERR_PTR(ret); |
1373 |
+ } |
1374 |
+diff --git a/fs/ceph/caps.c b/fs/ceph/caps.c |
1375 |
+index a49bf1fbaea82..0fad044a5752b 100644 |
1376 |
+--- a/fs/ceph/caps.c |
1377 |
++++ b/fs/ceph/caps.c |
1378 |
+@@ -1775,6 +1775,8 @@ static u64 __mark_caps_flushing(struct inode *inode, |
1379 |
+ * try to invalidate mapping pages without blocking. |
1380 |
+ */ |
1381 |
+ static int try_nonblocking_invalidate(struct inode *inode) |
1382 |
++ __releases(ci->i_ceph_lock) |
1383 |
++ __acquires(ci->i_ceph_lock) |
1384 |
+ { |
1385 |
+ struct ceph_inode_info *ci = ceph_inode(inode); |
1386 |
+ u32 invalidating_gen = ci->i_rdcache_gen; |
1387 |
+diff --git a/fs/ceph/file.c b/fs/ceph/file.c |
1388 |
+index a10711a6337af..34785a203461d 100644 |
1389 |
+--- a/fs/ceph/file.c |
1390 |
++++ b/fs/ceph/file.c |
1391 |
+@@ -1469,32 +1469,26 @@ retry_snap: |
1392 |
+ goto out; |
1393 |
+ } |
1394 |
+ |
1395 |
+- err = file_remove_privs(file); |
1396 |
+- if (err) |
1397 |
++ down_read(&osdc->lock); |
1398 |
++ map_flags = osdc->osdmap->flags; |
1399 |
++ pool_flags = ceph_pg_pool_flags(osdc->osdmap, ci->i_layout.pool_id); |
1400 |
++ up_read(&osdc->lock); |
1401 |
++ if ((map_flags & CEPH_OSDMAP_FULL) || |
1402 |
++ (pool_flags & CEPH_POOL_FLAG_FULL)) { |
1403 |
++ err = -ENOSPC; |
1404 |
+ goto out; |
1405 |
++ } |
1406 |
+ |
1407 |
+- err = file_update_time(file); |
1408 |
++ err = file_remove_privs(file); |
1409 |
+ if (err) |
1410 |
+ goto out; |
1411 |
+ |
1412 |
+- inode_inc_iversion_raw(inode); |
1413 |
+- |
1414 |
+ if (ci->i_inline_version != CEPH_INLINE_NONE) { |
1415 |
+ err = ceph_uninline_data(file, NULL); |
1416 |
+ if (err < 0) |
1417 |
+ goto out; |
1418 |
+ } |
1419 |
+ |
1420 |
+- down_read(&osdc->lock); |
1421 |
+- map_flags = osdc->osdmap->flags; |
1422 |
+- pool_flags = ceph_pg_pool_flags(osdc->osdmap, ci->i_layout.pool_id); |
1423 |
+- up_read(&osdc->lock); |
1424 |
+- if ((map_flags & CEPH_OSDMAP_FULL) || |
1425 |
+- (pool_flags & CEPH_POOL_FLAG_FULL)) { |
1426 |
+- err = -ENOSPC; |
1427 |
+- goto out; |
1428 |
+- } |
1429 |
+- |
1430 |
+ dout("aio_write %p %llx.%llx %llu~%zd getting caps. i_size %llu\n", |
1431 |
+ inode, ceph_vinop(inode), pos, count, i_size_read(inode)); |
1432 |
+ if (fi->fmode & CEPH_FILE_MODE_LAZY) |
1433 |
+@@ -1507,6 +1501,12 @@ retry_snap: |
1434 |
+ if (err < 0) |
1435 |
+ goto out; |
1436 |
+ |
1437 |
++ err = file_update_time(file); |
1438 |
++ if (err) |
1439 |
++ goto out_caps; |
1440 |
++ |
1441 |
++ inode_inc_iversion_raw(inode); |
1442 |
++ |
1443 |
+ dout("aio_write %p %llx.%llx %llu~%zd got cap refs on %s\n", |
1444 |
+ inode, ceph_vinop(inode), pos, count, ceph_cap_string(got)); |
1445 |
+ |
1446 |
+@@ -1590,6 +1590,8 @@ retry_snap: |
1447 |
+ } |
1448 |
+ |
1449 |
+ goto out_unlocked; |
1450 |
++out_caps: |
1451 |
++ ceph_put_cap_refs(ci, got); |
1452 |
+ out: |
1453 |
+ if (direct_lock) |
1454 |
+ ceph_end_io_direct(inode); |
1455 |
+diff --git a/fs/nilfs2/sysfs.c b/fs/nilfs2/sysfs.c |
1456 |
+index c6c8a33c81d5e..28a2db3b1787f 100644 |
1457 |
+--- a/fs/nilfs2/sysfs.c |
1458 |
++++ b/fs/nilfs2/sysfs.c |
1459 |
+@@ -64,11 +64,9 @@ static const struct sysfs_ops nilfs_##name##_attr_ops = { \ |
1460 |
+ #define NILFS_DEV_INT_GROUP_TYPE(name, parent_name) \ |
1461 |
+ static void nilfs_##name##_attr_release(struct kobject *kobj) \ |
1462 |
+ { \ |
1463 |
+- struct nilfs_sysfs_##parent_name##_subgroups *subgroups; \ |
1464 |
+- struct the_nilfs *nilfs = container_of(kobj->parent, \ |
1465 |
+- struct the_nilfs, \ |
1466 |
+- ns_##parent_name##_kobj); \ |
1467 |
+- subgroups = nilfs->ns_##parent_name##_subgroups; \ |
1468 |
++ struct nilfs_sysfs_##parent_name##_subgroups *subgroups = container_of(kobj, \ |
1469 |
++ struct nilfs_sysfs_##parent_name##_subgroups, \ |
1470 |
++ sg_##name##_kobj); \ |
1471 |
+ complete(&subgroups->sg_##name##_kobj_unregister); \ |
1472 |
+ } \ |
1473 |
+ static struct kobj_type nilfs_##name##_ktype = { \ |
1474 |
+@@ -94,12 +92,12 @@ static int nilfs_sysfs_create_##name##_group(struct the_nilfs *nilfs) \ |
1475 |
+ err = kobject_init_and_add(kobj, &nilfs_##name##_ktype, parent, \ |
1476 |
+ #name); \ |
1477 |
+ if (err) \ |
1478 |
+- return err; \ |
1479 |
+- return 0; \ |
1480 |
++ kobject_put(kobj); \ |
1481 |
++ return err; \ |
1482 |
+ } \ |
1483 |
+ static void nilfs_sysfs_delete_##name##_group(struct the_nilfs *nilfs) \ |
1484 |
+ { \ |
1485 |
+- kobject_del(&nilfs->ns_##parent_name##_subgroups->sg_##name##_kobj); \ |
1486 |
++ kobject_put(&nilfs->ns_##parent_name##_subgroups->sg_##name##_kobj); \ |
1487 |
+ } |
1488 |
+ |
1489 |
+ /************************************************************************ |
1490 |
+@@ -210,14 +208,14 @@ int nilfs_sysfs_create_snapshot_group(struct nilfs_root *root) |
1491 |
+ } |
1492 |
+ |
1493 |
+ if (err) |
1494 |
+- return err; |
1495 |
++ kobject_put(&root->snapshot_kobj); |
1496 |
+ |
1497 |
+- return 0; |
1498 |
++ return err; |
1499 |
+ } |
1500 |
+ |
1501 |
+ void nilfs_sysfs_delete_snapshot_group(struct nilfs_root *root) |
1502 |
+ { |
1503 |
+- kobject_del(&root->snapshot_kobj); |
1504 |
++ kobject_put(&root->snapshot_kobj); |
1505 |
+ } |
1506 |
+ |
1507 |
+ /************************************************************************ |
1508 |
+@@ -1000,7 +998,7 @@ int nilfs_sysfs_create_device_group(struct super_block *sb) |
1509 |
+ err = kobject_init_and_add(&nilfs->ns_dev_kobj, &nilfs_dev_ktype, NULL, |
1510 |
+ "%s", sb->s_id); |
1511 |
+ if (err) |
1512 |
+- goto free_dev_subgroups; |
1513 |
++ goto cleanup_dev_kobject; |
1514 |
+ |
1515 |
+ err = nilfs_sysfs_create_mounted_snapshots_group(nilfs); |
1516 |
+ if (err) |
1517 |
+@@ -1037,9 +1035,7 @@ delete_mounted_snapshots_group: |
1518 |
+ nilfs_sysfs_delete_mounted_snapshots_group(nilfs); |
1519 |
+ |
1520 |
+ cleanup_dev_kobject: |
1521 |
+- kobject_del(&nilfs->ns_dev_kobj); |
1522 |
+- |
1523 |
+-free_dev_subgroups: |
1524 |
++ kobject_put(&nilfs->ns_dev_kobj); |
1525 |
+ kfree(nilfs->ns_dev_subgroups); |
1526 |
+ |
1527 |
+ failed_create_device_group: |
1528 |
+diff --git a/fs/nilfs2/the_nilfs.c b/fs/nilfs2/the_nilfs.c |
1529 |
+index 484785cdf96e2..931870768556c 100644 |
1530 |
+--- a/fs/nilfs2/the_nilfs.c |
1531 |
++++ b/fs/nilfs2/the_nilfs.c |
1532 |
+@@ -797,14 +797,13 @@ nilfs_find_or_create_root(struct the_nilfs *nilfs, __u64 cno) |
1533 |
+ |
1534 |
+ void nilfs_put_root(struct nilfs_root *root) |
1535 |
+ { |
1536 |
+- if (refcount_dec_and_test(&root->count)) { |
1537 |
+- struct the_nilfs *nilfs = root->nilfs; |
1538 |
++ struct the_nilfs *nilfs = root->nilfs; |
1539 |
+ |
1540 |
+- nilfs_sysfs_delete_snapshot_group(root); |
1541 |
+- |
1542 |
+- spin_lock(&nilfs->ns_cptree_lock); |
1543 |
++ if (refcount_dec_and_lock(&root->count, &nilfs->ns_cptree_lock)) { |
1544 |
+ rb_erase(&root->rb_node, &nilfs->ns_cptree); |
1545 |
+ spin_unlock(&nilfs->ns_cptree_lock); |
1546 |
++ |
1547 |
++ nilfs_sysfs_delete_snapshot_group(root); |
1548 |
+ iput(root->ifile); |
1549 |
+ |
1550 |
+ kfree(root); |
1551 |
+diff --git a/include/linux/cacheinfo.h b/include/linux/cacheinfo.h |
1552 |
+index 46b92cd61d0c8..c8c71eea237d6 100644 |
1553 |
+--- a/include/linux/cacheinfo.h |
1554 |
++++ b/include/linux/cacheinfo.h |
1555 |
+@@ -78,24 +78,6 @@ struct cpu_cacheinfo { |
1556 |
+ bool cpu_map_populated; |
1557 |
+ }; |
1558 |
+ |
1559 |
+-/* |
1560 |
+- * Helpers to make sure "func" is executed on the cpu whose cache |
1561 |
+- * attributes are being detected |
1562 |
+- */ |
1563 |
+-#define DEFINE_SMP_CALL_CACHE_FUNCTION(func) \ |
1564 |
+-static inline void _##func(void *ret) \ |
1565 |
+-{ \ |
1566 |
+- int cpu = smp_processor_id(); \ |
1567 |
+- *(int *)ret = __##func(cpu); \ |
1568 |
+-} \ |
1569 |
+- \ |
1570 |
+-int func(unsigned int cpu) \ |
1571 |
+-{ \ |
1572 |
+- int ret; \ |
1573 |
+- smp_call_function_single(cpu, _##func, &ret, true); \ |
1574 |
+- return ret; \ |
1575 |
+-} |
1576 |
+- |
1577 |
+ struct cpu_cacheinfo *get_cpu_cacheinfo(unsigned int cpu); |
1578 |
+ int init_cache_level(unsigned int cpu); |
1579 |
+ int populate_cache_leaves(unsigned int cpu); |
1580 |
+diff --git a/include/linux/kvm_host.h b/include/linux/kvm_host.h |
1581 |
+index a1ff6b76aa8cd..19e8344c51a8c 100644 |
1582 |
+--- a/include/linux/kvm_host.h |
1583 |
++++ b/include/linux/kvm_host.h |
1584 |
+@@ -266,7 +266,8 @@ struct kvm_vcpu { |
1585 |
+ struct preempt_notifier preempt_notifier; |
1586 |
+ #endif |
1587 |
+ int cpu; |
1588 |
+- int vcpu_id; |
1589 |
++ int vcpu_id; /* id given by userspace at creation */ |
1590 |
++ int vcpu_idx; /* index in kvm->vcpus array */ |
1591 |
+ int srcu_idx; |
1592 |
+ int mode; |
1593 |
+ u64 requests; |
1594 |
+@@ -571,13 +572,7 @@ static inline struct kvm_vcpu *kvm_get_vcpu_by_id(struct kvm *kvm, int id) |
1595 |
+ |
1596 |
+ static inline int kvm_vcpu_get_idx(struct kvm_vcpu *vcpu) |
1597 |
+ { |
1598 |
+- struct kvm_vcpu *tmp; |
1599 |
+- int idx; |
1600 |
+- |
1601 |
+- kvm_for_each_vcpu(idx, tmp, vcpu->kvm) |
1602 |
+- if (tmp == vcpu) |
1603 |
+- return idx; |
1604 |
+- BUG(); |
1605 |
++ return vcpu->vcpu_idx; |
1606 |
+ } |
1607 |
+ |
1608 |
+ #define kvm_for_each_memslot(memslot, slots) \ |
1609 |
+diff --git a/include/linux/pci-ecam.h b/include/linux/pci-ecam.h |
1610 |
+index a73164c85e78b..75456a66024a9 100644 |
1611 |
+--- a/include/linux/pci-ecam.h |
1612 |
++++ b/include/linux/pci-ecam.h |
1613 |
+@@ -51,6 +51,7 @@ extern struct pci_ecam_ops pci_generic_ecam_ops; |
1614 |
+ |
1615 |
+ #if defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS) |
1616 |
+ extern struct pci_ecam_ops pci_32b_ops; /* 32-bit accesses only */ |
1617 |
++extern struct pci_ecam_ops pci_32b_read_ops; /* 32-bit read only */ |
1618 |
+ extern struct pci_ecam_ops hisi_pcie_ops; /* HiSilicon */ |
1619 |
+ extern struct pci_ecam_ops thunder_pem_ecam_ops; /* Cavium ThunderX 1.x & 2.x */ |
1620 |
+ extern struct pci_ecam_ops pci_thunder_ecam_ops; /* Cavium ThunderX 1.x */ |
1621 |
+diff --git a/include/linux/thermal.h b/include/linux/thermal.h |
1622 |
+index e45659c759209..a41378bdf27c7 100644 |
1623 |
+--- a/include/linux/thermal.h |
1624 |
++++ b/include/linux/thermal.h |
1625 |
+@@ -501,12 +501,13 @@ static inline void thermal_zone_device_update(struct thermal_zone_device *tz, |
1626 |
+ static inline void thermal_zone_set_trips(struct thermal_zone_device *tz) |
1627 |
+ { } |
1628 |
+ static inline struct thermal_cooling_device * |
1629 |
+-thermal_cooling_device_register(char *type, void *devdata, |
1630 |
++thermal_cooling_device_register(const char *type, void *devdata, |
1631 |
+ const struct thermal_cooling_device_ops *ops) |
1632 |
+ { return ERR_PTR(-ENODEV); } |
1633 |
+ static inline struct thermal_cooling_device * |
1634 |
+ thermal_of_cooling_device_register(struct device_node *np, |
1635 |
+- char *type, void *devdata, const struct thermal_cooling_device_ops *ops) |
1636 |
++ const char *type, void *devdata, |
1637 |
++ const struct thermal_cooling_device_ops *ops) |
1638 |
+ { return ERR_PTR(-ENODEV); } |
1639 |
+ static inline struct thermal_cooling_device * |
1640 |
+ devm_thermal_of_cooling_device_register(struct device *dev, |
1641 |
+diff --git a/kernel/profile.c b/kernel/profile.c |
1642 |
+index af7c94bf5fa1d..e97e42aaf2023 100644 |
1643 |
+--- a/kernel/profile.c |
1644 |
++++ b/kernel/profile.c |
1645 |
+@@ -41,7 +41,8 @@ struct profile_hit { |
1646 |
+ #define NR_PROFILE_GRP (NR_PROFILE_HIT/PROFILE_GRPSZ) |
1647 |
+ |
1648 |
+ static atomic_t *prof_buffer; |
1649 |
+-static unsigned long prof_len, prof_shift; |
1650 |
++static unsigned long prof_len; |
1651 |
++static unsigned short int prof_shift; |
1652 |
+ |
1653 |
+ int prof_on __read_mostly; |
1654 |
+ EXPORT_SYMBOL_GPL(prof_on); |
1655 |
+@@ -67,8 +68,8 @@ int profile_setup(char *str) |
1656 |
+ if (str[strlen(sleepstr)] == ',') |
1657 |
+ str += strlen(sleepstr) + 1; |
1658 |
+ if (get_option(&str, &par)) |
1659 |
+- prof_shift = par; |
1660 |
+- pr_info("kernel sleep profiling enabled (shift: %ld)\n", |
1661 |
++ prof_shift = clamp(par, 0, BITS_PER_LONG - 1); |
1662 |
++ pr_info("kernel sleep profiling enabled (shift: %u)\n", |
1663 |
+ prof_shift); |
1664 |
+ #else |
1665 |
+ pr_warn("kernel sleep profiling requires CONFIG_SCHEDSTATS\n"); |
1666 |
+@@ -78,21 +79,21 @@ int profile_setup(char *str) |
1667 |
+ if (str[strlen(schedstr)] == ',') |
1668 |
+ str += strlen(schedstr) + 1; |
1669 |
+ if (get_option(&str, &par)) |
1670 |
+- prof_shift = par; |
1671 |
+- pr_info("kernel schedule profiling enabled (shift: %ld)\n", |
1672 |
++ prof_shift = clamp(par, 0, BITS_PER_LONG - 1); |
1673 |
++ pr_info("kernel schedule profiling enabled (shift: %u)\n", |
1674 |
+ prof_shift); |
1675 |
+ } else if (!strncmp(str, kvmstr, strlen(kvmstr))) { |
1676 |
+ prof_on = KVM_PROFILING; |
1677 |
+ if (str[strlen(kvmstr)] == ',') |
1678 |
+ str += strlen(kvmstr) + 1; |
1679 |
+ if (get_option(&str, &par)) |
1680 |
+- prof_shift = par; |
1681 |
+- pr_info("kernel KVM profiling enabled (shift: %ld)\n", |
1682 |
++ prof_shift = clamp(par, 0, BITS_PER_LONG - 1); |
1683 |
++ pr_info("kernel KVM profiling enabled (shift: %u)\n", |
1684 |
+ prof_shift); |
1685 |
+ } else if (get_option(&str, &par)) { |
1686 |
+- prof_shift = par; |
1687 |
++ prof_shift = clamp(par, 0, BITS_PER_LONG - 1); |
1688 |
+ prof_on = CPU_PROFILING; |
1689 |
+- pr_info("kernel profiling enabled (shift: %ld)\n", |
1690 |
++ pr_info("kernel profiling enabled (shift: %u)\n", |
1691 |
+ prof_shift); |
1692 |
+ } |
1693 |
+ return 1; |
1694 |
+@@ -468,7 +469,7 @@ read_profile(struct file *file, char __user *buf, size_t count, loff_t *ppos) |
1695 |
+ unsigned long p = *ppos; |
1696 |
+ ssize_t read; |
1697 |
+ char *pnt; |
1698 |
+- unsigned int sample_step = 1 << prof_shift; |
1699 |
++ unsigned long sample_step = 1UL << prof_shift; |
1700 |
+ |
1701 |
+ profile_flip_buffers(); |
1702 |
+ if (p >= (prof_len+1)*sizeof(unsigned int)) |
1703 |
+diff --git a/kernel/sys.c b/kernel/sys.c |
1704 |
+index 3459a5ce0da01..b075fe84eb5a5 100644 |
1705 |
+--- a/kernel/sys.c |
1706 |
++++ b/kernel/sys.c |
1707 |
+@@ -1927,13 +1927,6 @@ static int validate_prctl_map_addr(struct prctl_mm_map *prctl_map) |
1708 |
+ |
1709 |
+ error = -EINVAL; |
1710 |
+ |
1711 |
+- /* |
1712 |
+- * @brk should be after @end_data in traditional maps. |
1713 |
+- */ |
1714 |
+- if (prctl_map->start_brk <= prctl_map->end_data || |
1715 |
+- prctl_map->brk <= prctl_map->end_data) |
1716 |
+- goto out; |
1717 |
+- |
1718 |
+ /* |
1719 |
+ * Neither we should allow to override limits if they set. |
1720 |
+ */ |
1721 |
+diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug |
1722 |
+index ee00c6c8a373e..a846f03901dbd 100644 |
1723 |
+--- a/lib/Kconfig.debug |
1724 |
++++ b/lib/Kconfig.debug |
1725 |
+@@ -868,7 +868,6 @@ config HARDLOCKUP_DETECTOR |
1726 |
+ depends on HAVE_HARDLOCKUP_DETECTOR_PERF || HAVE_HARDLOCKUP_DETECTOR_ARCH |
1727 |
+ select LOCKUP_DETECTOR |
1728 |
+ select HARDLOCKUP_DETECTOR_PERF if HAVE_HARDLOCKUP_DETECTOR_PERF |
1729 |
+- select HARDLOCKUP_DETECTOR_ARCH if HAVE_HARDLOCKUP_DETECTOR_ARCH |
1730 |
+ help |
1731 |
+ Say Y here to enable the kernel to act as a watchdog to detect |
1732 |
+ hard lockups. |
1733 |
+diff --git a/net/9p/trans_virtio.c b/net/9p/trans_virtio.c |
1734 |
+index a3cd90a74012b..f582351d84ecb 100644 |
1735 |
+--- a/net/9p/trans_virtio.c |
1736 |
++++ b/net/9p/trans_virtio.c |
1737 |
+@@ -605,7 +605,7 @@ static int p9_virtio_probe(struct virtio_device *vdev) |
1738 |
+ chan->vc_wq = kmalloc(sizeof(wait_queue_head_t), GFP_KERNEL); |
1739 |
+ if (!chan->vc_wq) { |
1740 |
+ err = -ENOMEM; |
1741 |
+- goto out_free_tag; |
1742 |
++ goto out_remove_file; |
1743 |
+ } |
1744 |
+ init_waitqueue_head(chan->vc_wq); |
1745 |
+ chan->ring_bufs_avail = 1; |
1746 |
+@@ -623,6 +623,8 @@ static int p9_virtio_probe(struct virtio_device *vdev) |
1747 |
+ |
1748 |
+ return 0; |
1749 |
+ |
1750 |
++out_remove_file: |
1751 |
++ sysfs_remove_file(&vdev->dev.kobj, &dev_attr_mount_tag.attr); |
1752 |
+ out_free_tag: |
1753 |
+ kfree(tag); |
1754 |
+ out_free_vq: |
1755 |
+diff --git a/net/sctp/input.c b/net/sctp/input.c |
1756 |
+index db4f917aafd90..2aca37717ed1e 100644 |
1757 |
+--- a/net/sctp/input.c |
1758 |
++++ b/net/sctp/input.c |
1759 |
+@@ -1168,6 +1168,9 @@ static struct sctp_association *__sctp_rcv_asconf_lookup( |
1760 |
+ union sctp_addr_param *param; |
1761 |
+ union sctp_addr paddr; |
1762 |
+ |
1763 |
++ if (ntohs(ch->length) < sizeof(*asconf) + sizeof(struct sctp_paramhdr)) |
1764 |
++ return NULL; |
1765 |
++ |
1766 |
+ /* Skip over the ADDIP header and find the Address parameter */ |
1767 |
+ param = (union sctp_addr_param *)(asconf + 1); |
1768 |
+ |
1769 |
+diff --git a/net/sctp/sm_make_chunk.c b/net/sctp/sm_make_chunk.c |
1770 |
+index 38ca7ce8a44ed..000aa62281f46 100644 |
1771 |
+--- a/net/sctp/sm_make_chunk.c |
1772 |
++++ b/net/sctp/sm_make_chunk.c |
1773 |
+@@ -2157,9 +2157,16 @@ static enum sctp_ierror sctp_verify_param(struct net *net, |
1774 |
+ break; |
1775 |
+ |
1776 |
+ case SCTP_PARAM_SET_PRIMARY: |
1777 |
+- if (ep->asconf_enable) |
1778 |
+- break; |
1779 |
+- goto unhandled; |
1780 |
++ if (!ep->asconf_enable) |
1781 |
++ goto unhandled; |
1782 |
++ |
1783 |
++ if (ntohs(param.p->length) < sizeof(struct sctp_addip_param) + |
1784 |
++ sizeof(struct sctp_paramhdr)) { |
1785 |
++ sctp_process_inv_paramlength(asoc, param.p, |
1786 |
++ chunk, err_chunk); |
1787 |
++ retval = SCTP_IERROR_ABORT; |
1788 |
++ } |
1789 |
++ break; |
1790 |
+ |
1791 |
+ case SCTP_PARAM_HOST_NAME_ADDRESS: |
1792 |
+ /* Tell the peer, we won't support this param. */ |
1793 |
+diff --git a/security/apparmor/apparmorfs.c b/security/apparmor/apparmorfs.c |
1794 |
+index 47e4f2d91df75..7a8813677950f 100644 |
1795 |
+--- a/security/apparmor/apparmorfs.c |
1796 |
++++ b/security/apparmor/apparmorfs.c |
1797 |
+@@ -1960,9 +1960,6 @@ fail2: |
1798 |
+ return error; |
1799 |
+ } |
1800 |
+ |
1801 |
+- |
1802 |
+-#define list_entry_is_head(pos, head, member) (&pos->member == (head)) |
1803 |
+- |
1804 |
+ /** |
1805 |
+ * __next_ns - find the next namespace to list |
1806 |
+ * @root: root namespace to stop search at (NOT NULL) |
1807 |
+diff --git a/virt/kvm/kvm_main.c b/virt/kvm/kvm_main.c |
1808 |
+index fc48298649c6c..77f84cbca7406 100644 |
1809 |
+--- a/virt/kvm/kvm_main.c |
1810 |
++++ b/virt/kvm/kvm_main.c |
1811 |
+@@ -2864,7 +2864,8 @@ static int kvm_vm_ioctl_create_vcpu(struct kvm *kvm, u32 id) |
1812 |
+ goto unlock_vcpu_destroy; |
1813 |
+ } |
1814 |
+ |
1815 |
+- BUG_ON(kvm->vcpus[atomic_read(&kvm->online_vcpus)]); |
1816 |
++ vcpu->vcpu_idx = atomic_read(&kvm->online_vcpus); |
1817 |
++ BUG_ON(kvm->vcpus[vcpu->vcpu_idx]); |
1818 |
+ |
1819 |
+ /* Now it's all set up, let userspace reach it */ |
1820 |
+ kvm_get_kvm(kvm); |
1821 |
+@@ -2874,7 +2875,7 @@ static int kvm_vm_ioctl_create_vcpu(struct kvm *kvm, u32 id) |
1822 |
+ goto unlock_vcpu_destroy; |
1823 |
+ } |
1824 |
+ |
1825 |
+- kvm->vcpus[atomic_read(&kvm->online_vcpus)] = vcpu; |
1826 |
++ kvm->vcpus[vcpu->vcpu_idx] = vcpu; |
1827 |
+ |
1828 |
+ /* |
1829 |
+ * Pairs with smp_rmb() in kvm_get_vcpu. Write kvm->vcpus |