Gentoo Archives: gentoo-commits

From: "Mike Frysinger (vapier)" <vapier@g.o>
To: gentoo-commits@l.g.o
Subject: [gentoo-commits] gentoo commit in src/patchsets/glibc/2.12.2: 6610_all_glibc-r10k-workarounds.patch README.history
Date: Tue, 05 Jul 2011 06:00:14
Message-Id: 20110705060004.B200720051@flycatcher.gentoo.org
1 vapier 11/07/05 06:00:04
2
3 Modified: README.history
4 Added: 6610_all_glibc-r10k-workarounds.patch
5 Log:
6 re-add the mips r10k errata workaround #373361 by Matt Turner
7
8 Revision Changes Path
9 1.7 src/patchsets/glibc/2.12.2/README.history
10
11 file : http://sources.gentoo.org/viewvc.cgi/gentoo/src/patchsets/glibc/2.12.2/README.history?rev=1.7&view=markup
12 plain: http://sources.gentoo.org/viewvc.cgi/gentoo/src/patchsets/glibc/2.12.2/README.history?rev=1.7&content-type=text/plain
13 diff : http://sources.gentoo.org/viewvc.cgi/gentoo/src/patchsets/glibc/2.12.2/README.history?r1=1.6&r2=1.7
14
15 Index: README.history
16 ===================================================================
17 RCS file: /var/cvsroot/gentoo/src/patchsets/glibc/2.12.2/README.history,v
18 retrieving revision 1.6
19 retrieving revision 1.7
20 diff -u -r1.6 -r1.7
21 --- README.history 28 May 2011 18:44:57 -0000 1.6
22 +++ README.history 5 Jul 2011 06:00:04 -0000 1.7
23 @@ -1,5 +1,6 @@
24 4 [pending]
25 + 0043_all_glibc-2.12-broken-tls-init.patch
26 + + 6610_all_glibc-r10k-workarounds.patch
27
28 3 23.05.2011
29 U 1505_hppa_glibc-2.11-hppa-nptl.patch
30
31
32
33 1.1 src/patchsets/glibc/2.12.2/6610_all_glibc-r10k-workarounds.patch
34
35 file : http://sources.gentoo.org/viewvc.cgi/gentoo/src/patchsets/glibc/2.12.2/6610_all_glibc-r10k-workarounds.patch?rev=1.1&view=markup
36 plain: http://sources.gentoo.org/viewvc.cgi/gentoo/src/patchsets/glibc/2.12.2/6610_all_glibc-r10k-workarounds.patch?rev=1.1&content-type=text/plain
37
38 Index: 6610_all_glibc-r10k-workarounds.patch
39 ===================================================================
40 http://bugs.gentoo.org/373361
41
42 From c804165aae6e4055a7a8c42cf66ea0b1a29ef3ed Mon Sep 17 00:00:00 2001
43 From: Matt Turner <mattst88@×××××.com>
44 Date: Tue, 28 Jun 2011 11:30:53 -0400
45 Subject: [PATCH] mips: work-around R10k ll/sc errata
46
47 The R10000 needs an LL/SC Workaround. If not applied all R10k before
48 rev 3.0 misbehave on atomic ops and rev 2.6 and lower (e.g. SGI IP28)
49 die after very few seconds with a deadlock due to even more erratas.
50 ---
51 ChangeLog.mips | 4 ++++
52 sysdeps/mips/bits/atomic.h | 38 ++++++++++++++++++++++++++++++++------
53 2 files changed, 36 insertions(+), 6 deletions(-)
54
55 diff --git a/sysdeps/mips/bits/atomic.h b/sysdeps/mips/bits/atomic.h
56 index 11b3467..2bd723d 100644
57 --- a/ports/sysdeps/mips/bits/atomic.h
58 +++ b/ports/sysdeps/mips/bits/atomic.h
59 @@ -49,6 +49,32 @@ typedef uintmax_t uatomic_max_t;
60 # define MIPS_SYNC sync
61 #endif
62
63 +/* Certain revisions of the R10000 Processor need an LL/SC Workaround
64 + enabled. Revisions before 3.0 misbehave on atomic operations, and
65 + Revs 2.6 and lower deadlock after several seconds due to other errata.
66 +
67 + To quote the R10K Errata:
68 + Workaround: The basic idea is to inhibit the four instructions
69 + from simultaneously becoming active in R10000. Padding all
70 + ll/sc sequences with nops or changing the looping branch in the
71 + routines to a branch likely (which is always predicted taken
72 + by R10000) will work. The nops should go after the loop, and the
73 + number of them should be 28. This number could be decremented for
74 + each additional instruction in the ll/sc loop such as the lock
75 + modifier(s) between the ll and sc, the looping branch and its
76 + delay slot. For typical short routines with one ll/sc loop, any
77 + instructions after the loop could also count as a decrement. The
78 + nop workaround pollutes the cache more but would be a few cycles
79 + faster if all the code is in the cache and the looping branch
80 + is predicted not taken. */
81 +
82 +
83 +#ifdef _MIPS_ARCH_R10000
84 +#define R10K_BEQZ_INSN "beqzl"
85 +#else
86 +#define R10K_BEQZ_INSN "beqz"
87 +#endif
88 +
89 #define MIPS_SYNC_STR_2(X) #X
90 #define MIPS_SYNC_STR_1(X) MIPS_SYNC_STR_2(X)
91 #define MIPS_SYNC_STR MIPS_SYNC_STR_1(MIPS_SYNC)
92 @@ -74,7 +100,7 @@ typedef uintmax_t uatomic_max_t;
93 "bne %0,%3,2f\n\t" \
94 "move %1,%4\n\t" \
95 "sc %1,%2\n\t" \
96 - "beqz %1,1b\n" \
97 + R10K_BEQZ_INSN" %1,1b\n" \
98 acq "\n\t" \
99 ".set pop\n" \
100 "2:\n\t" \
101 @@ -98,7 +124,7 @@ typedef uintmax_t uatomic_max_t;
102 "bne %0,%3,2f\n\t" \
103 "move %1,%4\n\t" \
104 "scd %1,%2\n\t" \
105 - "beqz %1,1b\n" \
106 + R10K_BEQZ_INSN" %1,1b\n" \
107 acq "\n\t" \
108 ".set pop\n" \
109 "2:\n\t" \
110 @@ -192,7 +218,7 @@ typedef uintmax_t uatomic_max_t;
111 "ll %0,%4\n\t" \
112 "move %1,%3\n\t" \
113 "sc %1,%2\n\t" \
114 - "beqz %1,1b\n" \
115 + R10K_BEQZ_INSN" %1,1b\n" \
116 acq "\n\t" \
117 ".set pop\n" \
118 "2:\n\t" \
119 @@ -216,7 +242,7 @@ typedef uintmax_t uatomic_max_t;
120 "lld %0,%4\n\t" \
121 "move %1,%3\n\t" \
122 "scd %1,%2\n\t" \
123 - "beqz %1,1b\n" \
124 + R10K_BEQZ_INSN" %1,1b\n" \
125 acq "\n\t" \
126 ".set pop\n" \
127 "2:\n\t" \
128 @@ -251,7 +277,7 @@ typedef uintmax_t uatomic_max_t;
129 "ll %0,%4\n\t" \
130 "addu %1,%0,%3\n\t" \
131 "sc %1,%2\n\t" \
132 - "beqz %1,1b\n" \
133 + R10K_BEQZ_INSN" %1,1b\n" \
134 acq "\n\t" \
135 ".set pop\n" \
136 "2:\n\t" \
137 @@ -275,7 +301,7 @@ typedef uintmax_t uatomic_max_t;
138 "lld %0,%4\n\t" \
139 "daddu %1,%0,%3\n\t" \
140 "scd %1,%2\n\t" \
141 - "beqz %1,1b\n" \
142 + R10K_BEQZ_INSN" %1,1b\n" \
143 acq "\n\t" \
144 ".set pop\n" \
145 "2:\n\t" \
146 --
147 1.7.3.4