Gentoo Archives: gentoo-commits

From: Mike Pagano <mpagano@g.o>
To: gentoo-commits@l.g.o
Subject: [gentoo-commits] proj/linux-patches:5.5 commit in: /
Date: Wed, 29 Jan 2020 23:03:51
Message-Id: 1580338988.edf16b8e6864aa65b0822db040e0c1a56f8cc907.mpagano@gentoo
1 commit: edf16b8e6864aa65b0822db040e0c1a56f8cc907
2 Author: Mike Pagano <mpagano <AT> gentoo <DOT> org>
3 AuthorDate: Wed Jan 29 23:03:08 2020 +0000
4 Commit: Mike Pagano <mpagano <AT> gentoo <DOT> org>
5 CommitDate: Wed Jan 29 23:03:08 2020 +0000
6 URL: https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=edf16b8e
7
8 Remove incompatible patch for the combo of kernel 5.5.X and gcc 8
9
10 Signed-off-by: Mike Pagano <mpagano <AT> gentoo.org>
11
12 0000_README | 4 -
13 5011_enable-cpu-optimizations-for-gcc8.patch | 569 ---------------------------
14 2 files changed, 573 deletions(-)
15
16 diff --git a/0000_README b/0000_README
17 index 2f0a93e..e1d45be 100644
18 --- a/0000_README
19 +++ b/0000_README
20 @@ -63,10 +63,6 @@ Patch: 4567_distro-Gentoo-Kconfig.patch
21 From: Tom Wijsman <TomWij@g.o>
22 Desc: Add Gentoo Linux support config settings and defaults.
23
24 -Patch: 5011_enable-cpu-optimizations-for-gcc8.patch
25 -From: https://github.com/graysky2/kernel_gcc_patch/
26 -Desc: Kernel patch for >= gccv8 enables kernel >= v4.13 optimizations for additional CPUs.
27 -
28 Patch: 5012_enable-cpu-optimizations-for-gcc91.patch
29 From: https://github.com/graysky2/kernel_gcc_patch/
30 Desc: Kernel patch enables gcc >= v9.1 optimizations for additional CPUs.
31
32 diff --git a/5011_enable-cpu-optimizations-for-gcc8.patch b/5011_enable-cpu-optimizations-for-gcc8.patch
33 deleted file mode 100644
34 index bfd2065..0000000
35 --- a/5011_enable-cpu-optimizations-for-gcc8.patch
36 +++ /dev/null
37 @@ -1,569 +0,0 @@
38 -WARNING
39 -This patch works with gcc versions 8.1+ and with kernel version 4.13+ and should
40 -NOT be applied when compiling on older versions of gcc due to key name changes
41 -of the march flags introduced with the version 4.9 release of gcc.[1]
42 -
43 -Use the older version of this patch hosted on the same github for older
44 -versions of gcc.
45 -
46 -FEATURES
47 -This patch adds additional CPU options to the Linux kernel accessible under:
48 - Processor type and features --->
49 - Processor family --->
50 -
51 -The expanded microarchitectures include:
52 -* AMD Improved K8-family
53 -* AMD K10-family
54 -* AMD Family 10h (Barcelona)
55 -* AMD Family 14h (Bobcat)
56 -* AMD Family 16h (Jaguar)
57 -* AMD Family 15h (Bulldozer)
58 -* AMD Family 15h (Piledriver)
59 -* AMD Family 15h (Steamroller)
60 -* AMD Family 15h (Excavator)
61 -* AMD Family 17h (Zen)
62 -* Intel Silvermont low-power processors
63 -* Intel 1st Gen Core i3/i5/i7 (Nehalem)
64 -* Intel 1.5 Gen Core i3/i5/i7 (Westmere)
65 -* Intel 2nd Gen Core i3/i5/i7 (Sandybridge)
66 -* Intel 3rd Gen Core i3/i5/i7 (Ivybridge)
67 -* Intel 4th Gen Core i3/i5/i7 (Haswell)
68 -* Intel 5th Gen Core i3/i5/i7 (Broadwell)
69 -* Intel 6th Gen Core i3/i5/i7 (Skylake)
70 -* Intel 6th Gen Core i7/i9 (Skylake X)
71 -* Intel 8th Gen Core i3/i5/i7 (Cannon Lake)
72 -* Intel 8th Gen Core i7/i9 (Ice Lake)
73 -
74 -It also offers to compile passing the 'native' option which, "selects the CPU
75 -to generate code for at compilation time by determining the processor type of
76 -the compiling machine. Using -march=native enables all instruction subsets
77 -supported by the local machine and will produce code optimized for the local
78 -machine under the constraints of the selected instruction set."[3]
79 -
80 -MINOR NOTES
81 -This patch also changes 'atom' to 'bonnell' in accordance with the gcc v4.9
82 -changes. Note that upstream is using the deprecated 'match=atom' flags when I
83 -believe it should use the newer 'march=bonnell' flag for atom processors.[2]
84 -
85 -It is not recommended to compile on Atom-CPUs with the 'native' option.[4] The
86 -recommendation is to use the 'atom' option instead.
87 -
88 -BENEFITS
89 -Small but real speed increases are measurable using a make endpoint comparing
90 -a generic kernel to one built with one of the respective microarchs.
91 -
92 -See the following experimental evidence supporting this statement:
93 -https://github.com/graysky2/kernel_gcc_patch
94 -
95 -REQUIREMENTS
96 -linux version >=4.20
97 -gcc version >=8.1
98 -
99 -ACKNOWLEDGMENTS
100 -This patch builds on the seminal work by Jeroen.[5]
101 -
102 -REFERENCES
103 -1. https://gcc.gnu.org/gcc-4.9/changes.html
104 -2. https://bugzilla.kernel.org/show_bug.cgi?id=77461
105 -3. https://gcc.gnu.org/onlinedocs/gcc/x86-Options.html
106 -4. https://github.com/graysky2/kernel_gcc_patch/issues/15
107 -5. http://www.linuxforge.net/docs/linux/linux-gcc.php
108 -
109 ---- a/arch/x86/Makefile_32.cpu 2019-02-22 09:22:03.426937735 -0500
110 -+++ b/arch/x86/Makefile_32.cpu 2019-02-22 09:37:58.680968580 -0500
111 -@@ -23,7 +23,18 @@ cflags-$(CONFIG_MK6) += -march=k6
112 - # Please note, that patches that add -march=athlon-xp and friends are pointless.
113 - # They make zero difference whatsosever to performance at this time.
114 - cflags-$(CONFIG_MK7) += -march=athlon
115 -+cflags-$(CONFIG_MNATIVE) += $(call cc-option,-march=native)
116 - cflags-$(CONFIG_MK8) += $(call cc-option,-march=k8,-march=athlon)
117 -+cflags-$(CONFIG_MK8SSE3) += $(call cc-option,-march=k8-sse3,-march=athlon)
118 -+cflags-$(CONFIG_MK10) += $(call cc-option,-march=amdfam10,-march=athlon)
119 -+cflags-$(CONFIG_MBARCELONA) += $(call cc-option,-march=barcelona,-march=athlon)
120 -+cflags-$(CONFIG_MBOBCAT) += $(call cc-option,-march=btver1,-march=athlon)
121 -+cflags-$(CONFIG_MJAGUAR) += $(call cc-option,-march=btver2,-march=athlon)
122 -+cflags-$(CONFIG_MBULLDOZER) += $(call cc-option,-march=bdver1,-march=athlon)
123 -+cflags-$(CONFIG_MPILEDRIVER) += $(call cc-option,-march=bdver2,-march=athlon)
124 -+cflags-$(CONFIG_MSTEAMROLLER) += $(call cc-option,-march=bdver3,-march=athlon)
125 -+cflags-$(CONFIG_MEXCAVATOR) += $(call cc-option,-march=bdver4,-march=athlon)
126 -+cflags-$(CONFIG_MZEN) += $(call cc-option,-march=znver1,-march=athlon)
127 - cflags-$(CONFIG_MCRUSOE) += -march=i686 -falign-functions=0 -falign-jumps=0 -falign-loops=0
128 - cflags-$(CONFIG_MEFFICEON) += -march=i686 $(call tune,pentium3) -falign-functions=0 -falign-jumps=0 -falign-loops=0
129 - cflags-$(CONFIG_MWINCHIPC6) += $(call cc-option,-march=winchip-c6,-march=i586)
130 -@@ -32,9 +43,20 @@ cflags-$(CONFIG_MCYRIXIII) += $(call cc-
131 - cflags-$(CONFIG_MVIAC3_2) += $(call cc-option,-march=c3-2,-march=i686)
132 - cflags-$(CONFIG_MVIAC7) += -march=i686
133 - cflags-$(CONFIG_MCORE2) += -march=i686 $(call tune,core2)
134 --cflags-$(CONFIG_MATOM) += $(call cc-option,-march=atom,$(call cc-option,-march=core2,-march=i686)) \
135 -- $(call cc-option,-mtune=atom,$(call cc-option,-mtune=generic))
136 --
137 -+cflags-$(CONFIG_MNEHALEM) += -march=i686 $(call tune,nehalem)
138 -+cflags-$(CONFIG_MWESTMERE) += -march=i686 $(call tune,westmere)
139 -+cflags-$(CONFIG_MSILVERMONT) += -march=i686 $(call tune,silvermont)
140 -+cflags-$(CONFIG_MSANDYBRIDGE) += -march=i686 $(call tune,sandybridge)
141 -+cflags-$(CONFIG_MIVYBRIDGE) += -march=i686 $(call tune,ivybridge)
142 -+cflags-$(CONFIG_MHASWELL) += -march=i686 $(call tune,haswell)
143 -+cflags-$(CONFIG_MBROADWELL) += -march=i686 $(call tune,broadwell)
144 -+cflags-$(CONFIG_MSKYLAKE) += -march=i686 $(call tune,skylake)
145 -+cflags-$(CONFIG_MSKYLAKEX) += -march=i686 $(call tune,skylake-avx512)
146 -+cflags-$(CONFIG_MCANNONLAKE) += -march=i686 $(call tune,cannonlake)
147 -+cflags-$(CONFIG_MICELAKE) += -march=i686 $(call tune,icelake)
148 -+cflags-$(CONFIG_MATOM) += $(call cc-option,-march=bonnell,$(call cc-option,-march=core2,-march=i686)) \
149 -+ $(call cc-option,-mtune=bonnell,$(call cc-option,-mtune=generic))
150 -+
151 - # AMD Elan support
152 - cflags-$(CONFIG_MELAN) += -march=i486
153 -
154 ---- a/arch/x86/Kconfig.cpu 2019-02-22 09:22:11.576958595 -0500
155 -+++ b/arch/x86/Kconfig.cpu 2019-02-22 09:34:16.490003911 -0500
156 -@@ -116,6 +116,7 @@ config MPENTIUMM
157 - config MPENTIUM4
158 - bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
159 - depends on X86_32
160 -+ select X86_P6_NOP
161 - ---help---
162 - Select this for Intel Pentium 4 chips. This includes the
163 - Pentium 4, Pentium D, P4-based Celeron and Xeon, and
164 -@@ -150,7 +151,7 @@ config MPENTIUM4
165 -
166 -
167 - config MK6
168 -- bool "K6/K6-II/K6-III"
169 -+ bool "AMD K6/K6-II/K6-III"
170 - depends on X86_32
171 - ---help---
172 - Select this for an AMD K6-family processor. Enables use of
173 -@@ -158,7 +159,7 @@ config MK6
174 - flags to GCC.
175 -
176 - config MK7
177 -- bool "Athlon/Duron/K7"
178 -+ bool "AMD Athlon/Duron/K7"
179 - depends on X86_32
180 - ---help---
181 - Select this for an AMD Athlon K7-family processor. Enables use of
182 -@@ -166,11 +167,81 @@ config MK7
183 - flags to GCC.
184 -
185 - config MK8
186 -- bool "Opteron/Athlon64/Hammer/K8"
187 -+ bool "AMD Opteron/Athlon64/Hammer/K8"
188 - ---help---
189 - Select this for an AMD Opteron or Athlon64 Hammer-family processor.
190 - Enables use of some extended instructions, and passes appropriate
191 - optimization flags to GCC.
192 -+config MK8SSE3
193 -+ bool "AMD Opteron/Athlon64/Hammer/K8 with SSE3"
194 -+ ---help---
195 -+ Select this for improved AMD Opteron or Athlon64 Hammer-family processors.
196 -+ Enables use of some extended instructions, and passes appropriate
197 -+ optimization flags to GCC.
198 -+
199 -+config MK10
200 -+ bool "AMD 61xx/7x50/PhenomX3/X4/II/K10"
201 -+ ---help---
202 -+ Select this for an AMD 61xx Eight-Core Magny-Cours, Athlon X2 7x50,
203 -+ Phenom X3/X4/II, Athlon II X2/X3/X4, or Turion II-family processor.
204 -+ Enables use of some extended instructions, and passes appropriate
205 -+ optimization flags to GCC.
206 -+
207 -+config MBARCELONA
208 -+ bool "AMD Barcelona"
209 -+ ---help---
210 -+ Select this for AMD Family 10h Barcelona processors.
211 -+
212 -+ Enables -march=barcelona
213 -+
214 -+config MBOBCAT
215 -+ bool "AMD Bobcat"
216 -+ ---help---
217 -+ Select this for AMD Family 14h Bobcat processors.
218 -+
219 -+ Enables -march=btver1
220 -+
221 -+config MJAGUAR
222 -+ bool "AMD Jaguar"
223 -+ ---help---
224 -+ Select this for AMD Family 16h Jaguar processors.
225 -+
226 -+ Enables -march=btver2
227 -+
228 -+config MBULLDOZER
229 -+ bool "AMD Bulldozer"
230 -+ ---help---
231 -+ Select this for AMD Family 15h Bulldozer processors.
232 -+
233 -+ Enables -march=bdver1
234 -+
235 -+config MPILEDRIVER
236 -+ bool "AMD Piledriver"
237 -+ ---help---
238 -+ Select this for AMD Family 15h Piledriver processors.
239 -+
240 -+ Enables -march=bdver2
241 -+
242 -+config MSTEAMROLLER
243 -+ bool "AMD Steamroller"
244 -+ ---help---
245 -+ Select this for AMD Family 15h Steamroller processors.
246 -+
247 -+ Enables -march=bdver3
248 -+
249 -+config MEXCAVATOR
250 -+ bool "AMD Excavator"
251 -+ ---help---
252 -+ Select this for AMD Family 15h Excavator processors.
253 -+
254 -+ Enables -march=bdver4
255 -+
256 -+config MZEN
257 -+ bool "AMD Zen"
258 -+ ---help---
259 -+ Select this for AMD Family 17h Zen processors.
260 -+
261 -+ Enables -march=znver1
262 -
263 - config MCRUSOE
264 - bool "Crusoe"
265 -@@ -253,6 +324,7 @@ config MVIAC7
266 -
267 - config MPSC
268 - bool "Intel P4 / older Netburst based Xeon"
269 -+ select X86_P6_NOP
270 - depends on X86_64
271 - ---help---
272 - Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey
273 -@@ -262,23 +334,126 @@ config MPSC
274 - using the cpu family field
275 - in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one.
276 -
277 -+config MATOM
278 -+ bool "Intel Atom"
279 -+ select X86_P6_NOP
280 -+ ---help---
281 -+
282 -+ Select this for the Intel Atom platform. Intel Atom CPUs have an
283 -+ in-order pipelining architecture and thus can benefit from
284 -+ accordingly optimized code. Use a recent GCC with specific Atom
285 -+ support in order to fully benefit from selecting this option.
286 -+
287 - config MCORE2
288 -- bool "Core 2/newer Xeon"
289 -+ bool "Intel Core 2"
290 -+ select X86_P6_NOP
291 -+
292 - ---help---
293 -
294 - Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and
295 - 53xx) CPUs. You can distinguish newer from older Xeons by the CPU
296 - family in /proc/cpuinfo. Newer ones have 6 and older ones 15
297 - (not a typo)
298 -+ Enables -march=core2
299 -
300 --config MATOM
301 -- bool "Intel Atom"
302 -+config MNEHALEM
303 -+ bool "Intel Nehalem"
304 -+ select X86_P6_NOP
305 - ---help---
306 -
307 -- Select this for the Intel Atom platform. Intel Atom CPUs have an
308 -- in-order pipelining architecture and thus can benefit from
309 -- accordingly optimized code. Use a recent GCC with specific Atom
310 -- support in order to fully benefit from selecting this option.
311 -+ Select this for 1st Gen Core processors in the Nehalem family.
312 -+
313 -+ Enables -march=nehalem
314 -+
315 -+config MWESTMERE
316 -+ bool "Intel Westmere"
317 -+ select X86_P6_NOP
318 -+ ---help---
319 -+
320 -+ Select this for the Intel Westmere formerly Nehalem-C family.
321 -+
322 -+ Enables -march=westmere
323 -+
324 -+config MSILVERMONT
325 -+ bool "Intel Silvermont"
326 -+ select X86_P6_NOP
327 -+ ---help---
328 -+
329 -+ Select this for the Intel Silvermont platform.
330 -+
331 -+ Enables -march=silvermont
332 -+
333 -+config MSANDYBRIDGE
334 -+ bool "Intel Sandy Bridge"
335 -+ select X86_P6_NOP
336 -+ ---help---
337 -+
338 -+ Select this for 2nd Gen Core processors in the Sandy Bridge family.
339 -+
340 -+ Enables -march=sandybridge
341 -+
342 -+config MIVYBRIDGE
343 -+ bool "Intel Ivy Bridge"
344 -+ select X86_P6_NOP
345 -+ ---help---
346 -+
347 -+ Select this for 3rd Gen Core processors in the Ivy Bridge family.
348 -+
349 -+ Enables -march=ivybridge
350 -+
351 -+config MHASWELL
352 -+ bool "Intel Haswell"
353 -+ select X86_P6_NOP
354 -+ ---help---
355 -+
356 -+ Select this for 4th Gen Core processors in the Haswell family.
357 -+
358 -+ Enables -march=haswell
359 -+
360 -+config MBROADWELL
361 -+ bool "Intel Broadwell"
362 -+ select X86_P6_NOP
363 -+ ---help---
364 -+
365 -+ Select this for 5th Gen Core processors in the Broadwell family.
366 -+
367 -+ Enables -march=broadwell
368 -+
369 -+config MSKYLAKE
370 -+ bool "Intel Skylake"
371 -+ select X86_P6_NOP
372 -+ ---help---
373 -+
374 -+ Select this for 6th Gen Core processors in the Skylake family.
375 -+
376 -+ Enables -march=skylake
377 -+
378 -+config MSKYLAKEX
379 -+ bool "Intel Skylake X"
380 -+ select X86_P6_NOP
381 -+ ---help---
382 -+
383 -+ Select this for 6th Gen Core processors in the Skylake X family.
384 -+
385 -+ Enables -march=skylake-avx512
386 -+
387 -+config MCANNONLAKE
388 -+ bool "Intel Cannon Lake"
389 -+ select X86_P6_NOP
390 -+ ---help---
391 -+
392 -+ Select this for 8th Gen Core processors
393 -+
394 -+ Enables -march=cannonlake
395 -+
396 -+config MICELAKE
397 -+ bool "Intel Ice Lake"
398 -+ select X86_P6_NOP
399 -+ ---help---
400 -+
401 -+ Select this for 8th Gen Core processors in the Ice Lake family.
402 -+
403 -+ Enables -march=icelake
404 -
405 - config GENERIC_CPU
406 - bool "Generic-x86-64"
407 -@@ -287,6 +462,19 @@ config GENERIC_CPU
408 - Generic x86-64 CPU.
409 - Run equally well on all x86-64 CPUs.
410 -
411 -+config MNATIVE
412 -+ bool "Native optimizations autodetected by GCC"
413 -+ ---help---
414 -+
415 -+ GCC 4.2 and above support -march=native, which automatically detects
416 -+ the optimum settings to use based on your processor. -march=native
417 -+ also detects and applies additional settings beyond -march specific
418 -+ to your CPU, (eg. -msse4). Unless you have a specific reason not to
419 -+ (e.g. distcc cross-compiling), you should probably be using
420 -+ -march=native rather than anything listed below.
421 -+
422 -+ Enables -march=native
423 -+
424 - endchoice
425 -
426 - config X86_GENERIC
427 -@@ -311,7 +499,7 @@ config X86_INTERNODE_CACHE_SHIFT
428 - config X86_L1_CACHE_SHIFT
429 - int
430 - default "7" if MPENTIUM4 || MPSC
431 -- default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
432 -+ default "6" if MK7 || MK8 || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MJAGUAR || MPENTIUMM || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MNATIVE || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
433 - default "4" if MELAN || M486 || MGEODEGX1
434 - default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
435 -
436 -@@ -329,39 +517,40 @@ config X86_ALIGNMENT_16
437 -
438 - config X86_INTEL_USERCOPY
439 - def_bool y
440 -- depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2
441 -+ depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK8SSE3 || MK7 || MEFFICEON || MCORE2 || MK10 || MBARCELONA || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MNATIVE
442 -
443 - config X86_USE_PPRO_CHECKSUM
444 - def_bool y
445 -- depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM
446 -+ depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MK10 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MK8SSE3 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MATOM || MNATIVE
447 -
448 - config X86_USE_3DNOW
449 - def_bool y
450 - depends on (MCYRIXIII || MK7 || MGEODE_LX) && !UML
451 -
452 --#
453 --# P6_NOPs are a relatively minor optimization that require a family >=
454 --# 6 processor, except that it is broken on certain VIA chips.
455 --# Furthermore, AMD chips prefer a totally different sequence of NOPs
456 --# (which work on all CPUs). In addition, it looks like Virtual PC
457 --# does not understand them.
458 --#
459 --# As a result, disallow these if we're not compiling for X86_64 (these
460 --# NOPs do work on all x86-64 capable chips); the list of processors in
461 --# the right-hand clause are the cores that benefit from this optimization.
462 --#
463 - config X86_P6_NOP
464 -- def_bool y
465 -- depends on X86_64
466 -- depends on (MCORE2 || MPENTIUM4 || MPSC)
467 -+ default n
468 -+ bool "Support for P6_NOPs on Intel chips"
469 -+ depends on (MCORE2 || MPENTIUM4 || MPSC || MATOM || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MNATIVE)
470 -+ ---help---
471 -+ P6_NOPs are a relatively minor optimization that require a family >=
472 -+ 6 processor, except that it is broken on certain VIA chips.
473 -+ Furthermore, AMD chips prefer a totally different sequence of NOPs
474 -+ (which work on all CPUs). In addition, it looks like Virtual PC
475 -+ does not understand them.
476 -+
477 -+ As a result, disallow these if we're not compiling for X86_64 (these
478 -+ NOPs do work on all x86-64 capable chips); the list of processors in
479 -+ the right-hand clause are the cores that benefit from this optimization.
480 -
481 -+ Say Y if you have Intel CPU newer than Pentium Pro, N otherwise.
482 -+
483 - config X86_TSC
484 - def_bool y
485 -- depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MATOM) || X86_64
486 -+ depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MK8SSE3 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MNATIVE || MATOM) || X86_64
487 -
488 - config X86_CMPXCHG64
489 - def_bool y
490 -- depends on X86_PAE || X86_64 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586TSC || M586MMX || MATOM || MGEODE_LX || MGEODEGX1 || MK6 || MK7 || MK8
491 -+ depends on (MK8 || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MJAGUAR || MK7 || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MNATIVE || MATOM || MGEODE_LX)
492 -
493 - # this should be set for all -march=.. options where the compiler
494 - # generates cmov.
495 ---- a/arch/x86/Makefile 2019-02-22 09:21:58.196924367 -0500
496 -+++ b/arch/x86/Makefile 2019-02-22 09:36:27.310577832 -0500
497 -@@ -118,13 +118,46 @@ else
498 - KBUILD_CFLAGS += $(call cc-option,-mskip-rax-setup)
499 -
500 - # FIXME - should be integrated in Makefile.cpu (Makefile_32.cpu)
501 -+ cflags-$(CONFIG_MNATIVE) += $(call cc-option,-march=native)
502 - cflags-$(CONFIG_MK8) += $(call cc-option,-march=k8)
503 -+ cflags-$(CONFIG_MK8SSE3) += $(call cc-option,-march=k8-sse3,-mtune=k8)
504 -+ cflags-$(CONFIG_MK10) += $(call cc-option,-march=amdfam10)
505 -+ cflags-$(CONFIG_MBARCELONA) += $(call cc-option,-march=barcelona)
506 -+ cflags-$(CONFIG_MBOBCAT) += $(call cc-option,-march=btver1)
507 -+ cflags-$(CONFIG_MJAGUAR) += $(call cc-option,-march=btver2)
508 -+ cflags-$(CONFIG_MBULLDOZER) += $(call cc-option,-march=bdver1)
509 -+ cflags-$(CONFIG_MPILEDRIVER) += $(call cc-option,-march=bdver2)
510 -+ cflags-$(CONFIG_MSTEAMROLLER) += $(call cc-option,-march=bdver3)
511 -+ cflags-$(CONFIG_MEXCAVATOR) += $(call cc-option,-march=bdver4)
512 -+ cflags-$(CONFIG_MZEN) += $(call cc-option,-march=znver1)
513 - cflags-$(CONFIG_MPSC) += $(call cc-option,-march=nocona)
514 -
515 - cflags-$(CONFIG_MCORE2) += \
516 -- $(call cc-option,-march=core2,$(call cc-option,-mtune=generic))
517 -- cflags-$(CONFIG_MATOM) += $(call cc-option,-march=atom) \
518 -- $(call cc-option,-mtune=atom,$(call cc-option,-mtune=generic))
519 -+ $(call cc-option,-march=core2,$(call cc-option,-mtune=core2))
520 -+ cflags-$(CONFIG_MNEHALEM) += \
521 -+ $(call cc-option,-march=nehalem,$(call cc-option,-mtune=nehalem))
522 -+ cflags-$(CONFIG_MWESTMERE) += \
523 -+ $(call cc-option,-march=westmere,$(call cc-option,-mtune=westmere))
524 -+ cflags-$(CONFIG_MSILVERMONT) += \
525 -+ $(call cc-option,-march=silvermont,$(call cc-option,-mtune=silvermont))
526 -+ cflags-$(CONFIG_MSANDYBRIDGE) += \
527 -+ $(call cc-option,-march=sandybridge,$(call cc-option,-mtune=sandybridge))
528 -+ cflags-$(CONFIG_MIVYBRIDGE) += \
529 -+ $(call cc-option,-march=ivybridge,$(call cc-option,-mtune=ivybridge))
530 -+ cflags-$(CONFIG_MHASWELL) += \
531 -+ $(call cc-option,-march=haswell,$(call cc-option,-mtune=haswell))
532 -+ cflags-$(CONFIG_MBROADWELL) += \
533 -+ $(call cc-option,-march=broadwell,$(call cc-option,-mtune=broadwell))
534 -+ cflags-$(CONFIG_MSKYLAKE) += \
535 -+ $(call cc-option,-march=skylake,$(call cc-option,-mtune=skylake))
536 -+ cflags-$(CONFIG_MSKYLAKEX) += \
537 -+ $(call cc-option,-march=skylake-avx512,$(call cc-option,-mtune=skylake-avx512))
538 -+ cflags-$(CONFIG_MCANNONLAKE) += \
539 -+ $(call cc-option,-march=cannonlake,$(call cc-option,-mtune=cannonlake))
540 -+ cflags-$(CONFIG_MICELAKE) += \
541 -+ $(call cc-option,-march=icelake,$(call cc-option,-mtune=icelake))
542 -+ cflags-$(CONFIG_MATOM) += $(call cc-option,-march=bonnell) \
543 -+ $(call cc-option,-mtune=bonnell,$(call cc-option,-mtune=generic))
544 - cflags-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=generic)
545 - KBUILD_CFLAGS += $(cflags-y)
546 -
547 ---- a/arch/x86/include/asm/module.h 2019-02-22 09:22:26.726997480 -0500
548 -+++ b/arch/x86/include/asm/module.h 2019-02-22 09:40:04.231493392 -0500
549 -@@ -25,6 +25,30 @@ struct mod_arch_specific {
550 - #define MODULE_PROC_FAMILY "586MMX "
551 - #elif defined CONFIG_MCORE2
552 - #define MODULE_PROC_FAMILY "CORE2 "
553 -+#elif defined CONFIG_MNATIVE
554 -+#define MODULE_PROC_FAMILY "NATIVE "
555 -+#elif defined CONFIG_MNEHALEM
556 -+#define MODULE_PROC_FAMILY "NEHALEM "
557 -+#elif defined CONFIG_MWESTMERE
558 -+#define MODULE_PROC_FAMILY "WESTMERE "
559 -+#elif defined CONFIG_MSILVERMONT
560 -+#define MODULE_PROC_FAMILY "SILVERMONT "
561 -+#elif defined CONFIG_MSANDYBRIDGE
562 -+#define MODULE_PROC_FAMILY "SANDYBRIDGE "
563 -+#elif defined CONFIG_MIVYBRIDGE
564 -+#define MODULE_PROC_FAMILY "IVYBRIDGE "
565 -+#elif defined CONFIG_MHASWELL
566 -+#define MODULE_PROC_FAMILY "HASWELL "
567 -+#elif defined CONFIG_MBROADWELL
568 -+#define MODULE_PROC_FAMILY "BROADWELL "
569 -+#elif defined CONFIG_MSKYLAKE
570 -+#define MODULE_PROC_FAMILY "SKYLAKE "
571 -+#elif defined CONFIG_MSKYLAKEX
572 -+#define MODULE_PROC_FAMILY "SKYLAKEX "
573 -+#elif defined CONFIG_MCANNONLAKE
574 -+#define MODULE_PROC_FAMILY "CANNONLAKE "
575 -+#elif defined CONFIG_MICELAKE
576 -+#define MODULE_PROC_FAMILY "ICELAKE "
577 - #elif defined CONFIG_MATOM
578 - #define MODULE_PROC_FAMILY "ATOM "
579 - #elif defined CONFIG_M686
580 -@@ -43,6 +67,26 @@ struct mod_arch_specific {
581 - #define MODULE_PROC_FAMILY "K7 "
582 - #elif defined CONFIG_MK8
583 - #define MODULE_PROC_FAMILY "K8 "
584 -+#elif defined CONFIG_MK8SSE3
585 -+#define MODULE_PROC_FAMILY "K8SSE3 "
586 -+#elif defined CONFIG_MK10
587 -+#define MODULE_PROC_FAMILY "K10 "
588 -+#elif defined CONFIG_MBARCELONA
589 -+#define MODULE_PROC_FAMILY "BARCELONA "
590 -+#elif defined CONFIG_MBOBCAT
591 -+#define MODULE_PROC_FAMILY "BOBCAT "
592 -+#elif defined CONFIG_MBULLDOZER
593 -+#define MODULE_PROC_FAMILY "BULLDOZER "
594 -+#elif defined CONFIG_MPILEDRIVER
595 -+#define MODULE_PROC_FAMILY "PILEDRIVER "
596 -+#elif defined CONFIG_MSTEAMROLLER
597 -+#define MODULE_PROC_FAMILY "STEAMROLLER "
598 -+#elif defined CONFIG_MJAGUAR
599 -+#define MODULE_PROC_FAMILY "JAGUAR "
600 -+#elif defined CONFIG_MEXCAVATOR
601 -+#define MODULE_PROC_FAMILY "EXCAVATOR "
602 -+#elif defined CONFIG_MZEN
603 -+#define MODULE_PROC_FAMILY "ZEN "
604 - #elif defined CONFIG_MELAN
605 - #define MODULE_PROC_FAMILY "ELAN "
606 - #elif defined CONFIG_MCRUSOE