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dirtyepic 11/02/24 04:08:38 |
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|
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Modified: README.history |
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Added: 24_all_4.5.2_pr43653_clang_ICE.patch |
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Log: |
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Add patch for bug #322419. |
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|
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Revision Changes Path |
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1.11 src/patchsets/gcc/4.5.2/gentoo/README.history |
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|
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file : http://sources.gentoo.org/viewvc.cgi/gentoo/src/patchsets/gcc/4.5.2/gentoo/README.history?rev=1.11&view=markup |
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plain: http://sources.gentoo.org/viewvc.cgi/gentoo/src/patchsets/gcc/4.5.2/gentoo/README.history?rev=1.11&content-type=text/plain |
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diff : http://sources.gentoo.org/viewvc.cgi/gentoo/src/patchsets/gcc/4.5.2/gentoo/README.history?r1=1.10&r2=1.11 |
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|
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Index: README.history |
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=================================================================== |
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RCS file: /var/cvsroot/gentoo/src/patchsets/gcc/4.5.2/gentoo/README.history,v |
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retrieving revision 1.10 |
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retrieving revision 1.11 |
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diff -u -r1.10 -r1.11 |
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--- README.history 13 Feb 2011 11:40:15 -0000 1.10 |
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+++ README.history 24 Feb 2011 04:08:38 -0000 1.11 |
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@@ -1,3 +1,6 @@ |
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+1.2 pending |
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+ + 24_all_4.5.2_pr43653_clang_ICE.patch |
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+ |
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1.1 13.02.2011 |
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+ 22_all_4.6_pr45094_arm-dword-move.patch |
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+ 23_all_4.6_pr45886_ARM_PCS_VFP.patch |
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|
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|
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|
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1.1 src/patchsets/gcc/4.5.2/gentoo/24_all_4.5.2_pr43653_clang_ICE.patch |
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|
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file : http://sources.gentoo.org/viewvc.cgi/gentoo/src/patchsets/gcc/4.5.2/gentoo/24_all_4.5.2_pr43653_clang_ICE.patch?rev=1.1&view=markup |
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plain: http://sources.gentoo.org/viewvc.cgi/gentoo/src/patchsets/gcc/4.5.2/gentoo/24_all_4.5.2_pr43653_clang_ICE.patch?rev=1.1&content-type=text/plain |
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|
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Index: 24_all_4.5.2_pr43653_clang_ICE.patch |
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=================================================================== |
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Unrecognizable insn with -O1 -ftree-vectorize |
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|
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http://gcc.gnu.org/PR43653 |
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https://bugs.gentoo.org/322419 |
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|
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--- gcc/config/i386/i386.c |
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+++ gcc/config/i386/i386.c |
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@@ -25137,7 +25137,8 @@ |
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{ |
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/* QImode spills from non-QI registers require |
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intermediate register on 32bit targets. */ |
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- if (!in_p && mode == QImode && !TARGET_64BIT |
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+ if (!TARGET_64BIT |
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+ && !in_p && mode == QImode |
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&& (rclass == GENERAL_REGS |
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|| rclass == LEGACY_REGS |
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|| rclass == INDEX_REGS)) |
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@@ -25157,6 +25158,45 @@ |
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return Q_REGS; |
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} |
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|
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+ /* This condition handles corner case where an expression involving |
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+ pointers gets vectorized. We're trying to use the address of a |
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+ stack slot as a vector initializer. |
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+ |
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+ (set (reg:V2DI 74 [ vect_cst_.2 ]) |
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+ (vec_duplicate:V2DI (reg/f:DI 20 frame))) |
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+ |
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+ Eventually frame gets turned into sp+offset like this: |
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+ |
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+ (set (reg:V2DI 21 xmm0 [orig:74 vect_cst_.2 ] [74]) |
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+ (vec_duplicate:V2DI (plus:DI (reg/f:DI 7 sp) |
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+ (const_int 392 [0x188])))) |
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+ |
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+ That later gets turned into: |
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+ |
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+ (set (reg:V2DI 21 xmm0 [orig:74 vect_cst_.2 ] [74]) |
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+ (vec_duplicate:V2DI (plus:DI (reg/f:DI 7 sp) |
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+ (mem/u/c/i:DI (symbol_ref/u:DI ("*.LC0") [flags 0x2]) [0 S8 A64])))) |
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+ |
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+ We'll have the following reload recorded: |
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+ |
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+ Reload 0: reload_in (DI) = |
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+ (plus:DI (reg/f:DI 7 sp) |
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+ (mem/u/c/i:DI (symbol_ref/u:DI ("*.LC0") [flags 0x2]) [0 S8 A64])) |
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+ reload_out (V2DI) = (reg:V2DI 21 xmm0 [orig:74 vect_cst_.2 ] [74]) |
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+ SSE_REGS, RELOAD_OTHER (opnum = 0), can't combine |
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+ reload_in_reg: (plus:DI (reg/f:DI 7 sp) (const_int 392 [0x188])) |
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+ reload_out_reg: (reg:V2DI 21 xmm0 [orig:74 vect_cst_.2 ] [74]) |
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+ reload_reg_rtx: (reg:V2DI 22 xmm1) |
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+ |
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+ Which isn't going to work since SSE instructions can't handle scalar |
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+ additions. Returning GENERAL_REGS forces the addition into integer |
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+ register and reload can handle subsequent reloads without problems. */ |
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+ |
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+ if (in_p && GET_CODE (x) == PLUS |
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+ && SSE_CLASS_P (rclass) |
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+ && SCALAR_INT_MODE_P (mode)) |
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+ return GENERAL_REGS; |
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+ |
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return NO_REGS; |
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} |
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|
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--- gcc/testsuite/gcc.target/i386/pr43653.c |
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+++ gcc/testsuite/gcc.target/i386/pr43653.c |
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@@ -0,0 +1,14 @@ |
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+/* { dg-do compile } */ |
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+/* { dg-options "-O1 -ftree-vectorize -msse" } */ |
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+ |
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+typedef struct {} S; |
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+ |
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+void *foo() |
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+{ |
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+ S a[64], *p[64]; |
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+ int i; |
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+ |
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+ for (i = 0; i < 64; i++) |
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+ p[i] = &a[i]; |
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+ return p[0]; |
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+} |
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