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commit: aa70ccd2c8168a680487d6693fbd9eb2dbbba839 |
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Author: Huang Rui <vowstar <AT> gmail <DOT> com> |
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AuthorDate: Wed May 13 13:53:28 2020 +0000 |
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Commit: Andrew Ammerlaan <andrewammerlaan <AT> riseup <DOT> net> |
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CommitDate: Wed May 13 13:56:17 2020 +0000 |
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URL: https://gitweb.gentoo.org/repo/proj/guru.git/commit/?id=aa70ccd2 |
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|
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sci-electronics/verilator: fix compile problem |
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|
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After bison upgrade to 3.6.1, caused compile error. |
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bison 3.6.1 generated unexpected nested-comment, |
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but 3.5.4 is no problem. |
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This fix workaround it by remove unexpected nested |
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comment. The test pass. |
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|
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Issue: https://github.com/akimd/bison/issues/38 |
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Issue: https://github.com/verilator/verilator/issues/2320 |
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Package-Manager: Portage-2.3.99, Repoman-2.3.22 |
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Signed-off-by: Huang Rui <vowstar <AT> gmail.com> |
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|
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.../verilator/files/verilator-4.034-fix-bison.patch | 17 +++++++++++++++++ |
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sci-electronics/verilator/verilator-4.034.ebuild | 14 +++++++++++--- |
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2 files changed, 28 insertions(+), 3 deletions(-) |
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|
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diff --git a/sci-electronics/verilator/files/verilator-4.034-fix-bison.patch b/sci-electronics/verilator/files/verilator-4.034-fix-bison.patch |
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new file mode 100644 |
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index 0000000..56d680a |
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--- /dev/null |
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+++ b/sci-electronics/verilator/files/verilator-4.034-fix-bison.patch |
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@@ -0,0 +1,17 @@ |
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+diff --git a/src/Makefile_obj.in b/src/Makefile_obj.in |
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+index 911f97e1..63799569 100644 |
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+--- a/src/Makefile_obj.in |
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++++ b/src/Makefile_obj.in |
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+@@ -323,6 +323,12 @@ V3ParseBison.h: V3ParseBison.c |
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+ V3ParseBison.c: verilog.y $(BISONPRE) |
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+ @echo "If you get errors from verilog.y below, try upgrading bison to version 1.875 or newer." |
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+ $(PERL) $(BISONPRE) --yacc ${YACC} -d -v -o V3ParseBison.c $< |
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++ # Unfortunately bison 3.6.1 have break changes caused compile error. |
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++ # Workaround issue https://github.com/verilator/verilator/issues/2320 |
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++ # This workaround is safe for the old version of bison. |
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++ # TODO: code should removed when bison fixed the problem. |
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++ @sed -ie 's#/\* "/\*.*\*/" \*/##g' V3ParseBison.c |
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++ @sed -ie 's#/\* "/\*.*\*/" \*/##g' V3ParseBison.h |
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+ |
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+ V3Lexer_pregen.yy.cpp: verilog.l V3ParseBison.h $(HEADERS) |
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+ ${LEX} --version |
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|
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diff --git a/sci-electronics/verilator/verilator-4.034.ebuild b/sci-electronics/verilator/verilator-4.034.ebuild |
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index 10df066..bf099b7 100644 |
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--- a/sci-electronics/verilator/verilator-4.034.ebuild |
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+++ b/sci-electronics/verilator/verilator-4.034.ebuild |
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@@ -6,13 +6,16 @@ EAPI="7" |
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inherit autotools |
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|
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DESCRIPTION="The fast free Verilog/SystemVerilog simulator" |
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-HOMEPAGE="https://www.veripool.org/wiki/verilator" |
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+HOMEPAGE=" |
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+ https://verilator.org |
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+ https://github.com/verilator/verilator |
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+" |
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|
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if [[ "${PV}" == "9999" ]] ; then |
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inherit git-r3 |
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- EGIT_REPO_URI="https://git.veripool.org/git/${PN}" |
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+ EGIT_REPO_URI="https://github.com/${PN}/${PN}.git" |
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else |
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- SRC_URI="http://www.veripool.org/ftp/${P}.tgz -> ${P}.tar.gz" |
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+ SRC_URI="https://github.com/${PN}/${PN}/archive/v${PV}.tar.gz -> ${P}.tar.gz" |
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KEYWORDS="~alpha ~amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sparc ~x86" |
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fi |
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|
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@@ -33,6 +36,11 @@ BDEPEND=" |
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sys-devel/flex |
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" |
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|
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+PATCHES=( |
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+ # https://github.com/verilator/verilator/issues/2320 |
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+ "${FILESDIR}"/${PN}-4.034-fix-bison.patch |
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+) |
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+ |
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src_prepare() { |
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default |
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eautoconf --force |