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halcy0n 09/04/26 20:21:22 |
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|
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Modified: README.history |
| 4 |
Added: 79_all_arm_PR37436.patch |
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Log: |
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Add patch to 4.3.3 patchset as well |
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|
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Revision Changes Path |
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1.6 src/patchsets/gcc/4.3.3/gentoo/README.history |
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|
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file : http://sources.gentoo.org/viewcvs.py/gentoo/src/patchsets/gcc/4.3.3/gentoo/README.history?rev=1.6&view=markup |
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plain: http://sources.gentoo.org/viewcvs.py/gentoo/src/patchsets/gcc/4.3.3/gentoo/README.history?rev=1.6&content-type=text/plain |
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diff : http://sources.gentoo.org/viewcvs.py/gentoo/src/patchsets/gcc/4.3.3/gentoo/README.history?r1=1.5&r2=1.6 |
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|
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Index: README.history |
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=================================================================== |
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RCS file: /var/cvsroot/gentoo/src/patchsets/gcc/4.3.3/gentoo/README.history,v |
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retrieving revision 1.5 |
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retrieving revision 1.6 |
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diff -u -r1.5 -r1.6 |
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--- README.history 15 Mar 2009 06:51:35 -0000 1.5 |
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+++ README.history 26 Apr 2009 20:21:22 -0000 1.6 |
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@@ -1,3 +1,5 @@ |
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+1.2 pending |
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+ + 79_all_arm-PR37436.patch |
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1.1 15.03.2009 |
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+ 65_all_gcc43-pr32044.patch |
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+ 67_all_gcc43-pr35964.patch |
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|
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|
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|
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1.1 src/patchsets/gcc/4.3.3/gentoo/79_all_arm_PR37436.patch |
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|
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file : http://sources.gentoo.org/viewcvs.py/gentoo/src/patchsets/gcc/4.3.3/gentoo/79_all_arm_PR37436.patch?rev=1.1&view=markup |
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plain: http://sources.gentoo.org/viewcvs.py/gentoo/src/patchsets/gcc/4.3.3/gentoo/79_all_arm_PR37436.patch?rev=1.1&content-type=text/plain |
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|
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Index: 79_all_arm_PR37436.patch |
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=================================================================== |
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Backport from gcc-4.4 to fix bug #265367 |
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|
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http://gcc.gnu.org/PR37436 |
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|
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Index: gcc/config/arm/arm.c |
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=================================================================== |
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--- gcc/config/arm/arm.c (revision 142777) |
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+++ gcc/config/arm/arm.c (revision 142778) |
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@@ -3844,6 +3844,7 @@ |
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rtx xop1 = XEXP (x, 1); |
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|
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return ((arm_address_register_rtx_p (xop0, strict_p) |
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+ && GET_CODE(xop1) == CONST_INT |
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&& arm_legitimate_index_p (mode, xop1, outer, strict_p)) |
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|| (arm_address_register_rtx_p (xop1, strict_p) |
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&& arm_legitimate_index_p (mode, xop0, outer, strict_p))); |
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Index: gcc/config/arm/predicates.md |
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=================================================================== |
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--- gcc/config/arm/predicates.md (revision 142777) |
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+++ gcc/config/arm/predicates.md (revision 142778) |
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@@ -234,6 +234,10 @@ |
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(match_test "arm_legitimate_address_p (mode, XEXP (op, 0), SIGN_EXTEND, |
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0)"))) |
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|
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+(define_special_predicate "arm_reg_or_extendqisi_mem_op" |
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+ (ior (match_operand 0 "arm_extendqisi_mem_op") |
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+ (match_operand 0 "s_register_operand"))) |
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+ |
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(define_predicate "power_of_two_operand" |
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(match_code "const_int") |
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{ |
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Index: gcc/config/arm/arm.md |
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=================================================================== |
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--- gcc/config/arm/arm.md (revision 142777) |
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+++ gcc/config/arm/arm.md (revision 142778) |
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@@ -4299,7 +4299,7 @@ |
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|
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(define_expand "extendqihi2" |
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[(set (match_dup 2) |
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- (ashift:SI (match_operand:QI 1 "general_operand" "") |
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+ (ashift:SI (match_operand:QI 1 "arm_reg_or_extendqisi_mem_op" "") |
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(const_int 24))) |
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(set (match_operand:HI 0 "s_register_operand" "") |
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(ashiftrt:SI (match_dup 2) |
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@@ -4324,7 +4324,7 @@ |
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|
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(define_insn "*arm_extendqihi_insn" |
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[(set (match_operand:HI 0 "s_register_operand" "=r") |
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- (sign_extend:HI (match_operand:QI 1 "memory_operand" "Uq")))] |
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+ (sign_extend:HI (match_operand:QI 1 "arm_extendqisi_mem_op" "Uq")))] |
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"TARGET_ARM && arm_arch4" |
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"ldr%(sb%)\\t%0, %1" |
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[(set_attr "type" "load_byte") |
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@@ -4335,7 +4335,7 @@ |
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|
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(define_expand "extendqisi2" |
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[(set (match_dup 2) |
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- (ashift:SI (match_operand:QI 1 "general_operand" "") |
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+ (ashift:SI (match_operand:QI 1 "arm_reg_or_extendqisi_mem_op" "") |
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(const_int 24))) |
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(set (match_operand:SI 0 "s_register_operand" "") |
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(ashiftrt:SI (match_dup 2) |
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@@ -4367,7 +4367,7 @@ |
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|
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(define_insn "*arm_extendqisi" |
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[(set (match_operand:SI 0 "s_register_operand" "=r") |
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- (sign_extend:SI (match_operand:QI 1 "memory_operand" "Uq")))] |
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+ (sign_extend:SI (match_operand:QI 1 "arm_extendqisi_mem_op" "Uq")))] |
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"TARGET_ARM && arm_arch4 && !arm_arch6" |
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"ldr%(sb%)\\t%0, %1" |
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[(set_attr "type" "load_byte") |
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@@ -4378,7 +4378,8 @@ |
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|
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(define_insn "*arm_extendqisi_v6" |
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[(set (match_operand:SI 0 "s_register_operand" "=r,r") |
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- (sign_extend:SI (match_operand:QI 1 "nonimmediate_operand" "r,Uq")))] |
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+ (sign_extend:SI |
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+ (match_operand:QI 1 "arm_reg_or_extendqisi_mem_op" "r,Uq")))] |
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"TARGET_ARM && arm_arch6" |
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"@ |
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sxtb%?\\t%0, %1 |
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