Gentoo Archives: gentoo-commits

From: Mike Pagano <mpagano@g.o>
To: gentoo-commits@l.g.o
Subject: [gentoo-commits] proj/linux-patches:4.14 commit in: /
Date: Wed, 28 Apr 2021 18:22:14
Message-Id: 1619634044.b165b059dc1f75f7acab4080bb122a900bdf6e86.mpagano@gentoo
1 commit: b165b059dc1f75f7acab4080bb122a900bdf6e86
2 Author: Mike Pagano <mpagano <AT> gentoo <DOT> org>
3 AuthorDate: Wed Apr 28 18:20:44 2021 +0000
4 Commit: Mike Pagano <mpagano <AT> gentoo <DOT> org>
5 CommitDate: Wed Apr 28 18:20:44 2021 +0000
6 URL: https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=b165b059
7
8 Remove CPU OPT patch for gcc=4.9, long out of the tree
9
10 Signed-off-by: Mike Pagano <mpagano <AT> gentoo.org>
11
12 0000_README | 4 -
13 ...-additional-cpu-optimizations-for-gcc-4.9.patch | 545 ---------------------
14 2 files changed, 549 deletions(-)
15
16 diff --git a/0000_README b/0000_README
17 index 1317cfd..114ee14 100644
18 --- a/0000_README
19 +++ b/0000_README
20 @@ -1015,10 +1015,6 @@ Patch: 4567_distro-Gentoo-Kconfig.patch
21 From: Tom Wijsman <TomWij@g.o>
22 Desc: Add Gentoo Linux support config settings and defaults.
23
24 -Patch: 5010_enable-additional-cpu-optimizations-for-gcc-4.9.patch
25 -From: https://github.com/graysky2/kernel_gcc_patch/
26 -Desc: Kernel patch enables gcc >= v4.13 optimizations for additional CPUs.
27 -
28 Patch: 5012_enable-cpu-optimizations-for-gcc91.patch
29 From: https://github.com/graysky2/kernel_gcc_patch/
30 Desc: Kernel patch enables gcc >= v9.1 optimizations for additional CPUs.
31
32 diff --git a/5010_enable-additional-cpu-optimizations-for-gcc-4.9.patch b/5010_enable-additional-cpu-optimizations-for-gcc-4.9.patch
33 deleted file mode 100644
34 index a8aa759..0000000
35 --- a/5010_enable-additional-cpu-optimizations-for-gcc-4.9.patch
36 +++ /dev/null
37 @@ -1,545 +0,0 @@
38 -WARNING
39 -This patch works with gcc versions 4.9+ and with kernel version 4.13+ and should
40 -NOT be applied when compiling on older versions of gcc due to key name changes
41 -of the march flags introduced with the version 4.9 release of gcc.[1]
42 -
43 -Use the older version of this patch hosted on the same github for older
44 -versions of gcc.
45 -
46 -FEATURES
47 -This patch adds additional CPU options to the Linux kernel accessible under:
48 - Processor type and features --->
49 - Processor family --->
50 -
51 -The expanded microarchitectures include:
52 -* AMD Improved K8-family
53 -* AMD K10-family
54 -* AMD Family 10h (Barcelona)
55 -* AMD Family 14h (Bobcat)
56 -* AMD Family 16h (Jaguar)
57 -* AMD Family 15h (Bulldozer)
58 -* AMD Family 15h (Piledriver)
59 -* AMD Family 15h (Steamroller)
60 -* AMD Family 15h (Excavator)
61 -* AMD Family 17h (Zen)
62 -* Intel Silvermont low-power processors
63 -* Intel 1st Gen Core i3/i5/i7 (Nehalem)
64 -* Intel 1.5 Gen Core i3/i5/i7 (Westmere)
65 -* Intel 2nd Gen Core i3/i5/i7 (Sandybridge)
66 -* Intel 3rd Gen Core i3/i5/i7 (Ivybridge)
67 -* Intel 4th Gen Core i3/i5/i7 (Haswell)
68 -* Intel 5th Gen Core i3/i5/i7 (Broadwell)
69 -* Intel 6th Gen Core i3/i5/i7 (Skylake)
70 -* Intel 6th Gen Core i7/i9 (Skylake X)
71 -
72 -It also offers to compile passing the 'native' option which, "selects the CPU
73 -to generate code for at compilation time by determining the processor type of
74 -the compiling machine. Using -march=native enables all instruction subsets
75 -supported by the local machine and will produce code optimized for the local
76 -machine under the constraints of the selected instruction set."[3]
77 -
78 -MINOR NOTES
79 -This patch also changes 'atom' to 'bonnell' in accordance with the gcc v4.9
80 -changes. Note that upstream is using the deprecated 'match=atom' flags when I
81 -believe it should use the newer 'march=bonnell' flag for atom processors.[2]
82 -
83 -It is not recommended to compile on Atom-CPUs with the 'native' option.[4] The
84 -recommendation is to use the 'atom' option instead.
85 -
86 -BENEFITS
87 -Small but real speed increases are measurable using a make endpoint comparing
88 -a generic kernel to one built with one of the respective microarchs.
89 -
90 -See the following experimental evidence supporting this statement:
91 -https://github.com/graysky2/kernel_gcc_patch
92 -
93 -REQUIREMENTS
94 -linux version >=4.13
95 -gcc version >=4.9
96 -
97 -ACKNOWLEDGMENTS
98 -This patch builds on the seminal work by Jeroen.[5]
99 -
100 -REFERENCES
101 -1. https://gcc.gnu.org/gcc-4.9/changes.html
102 -2. https://bugzilla.kernel.org/show_bug.cgi?id=77461
103 -3. https://gcc.gnu.org/onlinedocs/gcc/x86-Options.html
104 -4. https://github.com/graysky2/kernel_gcc_patch/issues/15
105 -5. http://www.linuxforge.net/docs/linux/linux-gcc.php
106 -
107 ---- a/arch/x86/include/asm/module.h 2018-01-28 16:20:33.000000000 -0500
108 -+++ b/arch/x86/include/asm/module.h 2018-03-10 06:42:38.688317317 -0500
109 -@@ -25,6 +25,26 @@ struct mod_arch_specific {
110 - #define MODULE_PROC_FAMILY "586MMX "
111 - #elif defined CONFIG_MCORE2
112 - #define MODULE_PROC_FAMILY "CORE2 "
113 -+#elif defined CONFIG_MNATIVE
114 -+#define MODULE_PROC_FAMILY "NATIVE "
115 -+#elif defined CONFIG_MNEHALEM
116 -+#define MODULE_PROC_FAMILY "NEHALEM "
117 -+#elif defined CONFIG_MWESTMERE
118 -+#define MODULE_PROC_FAMILY "WESTMERE "
119 -+#elif defined CONFIG_MSILVERMONT
120 -+#define MODULE_PROC_FAMILY "SILVERMONT "
121 -+#elif defined CONFIG_MSANDYBRIDGE
122 -+#define MODULE_PROC_FAMILY "SANDYBRIDGE "
123 -+#elif defined CONFIG_MIVYBRIDGE
124 -+#define MODULE_PROC_FAMILY "IVYBRIDGE "
125 -+#elif defined CONFIG_MHASWELL
126 -+#define MODULE_PROC_FAMILY "HASWELL "
127 -+#elif defined CONFIG_MBROADWELL
128 -+#define MODULE_PROC_FAMILY "BROADWELL "
129 -+#elif defined CONFIG_MSKYLAKE
130 -+#define MODULE_PROC_FAMILY "SKYLAKE "
131 -+#elif defined CONFIG_MSKYLAKEX
132 -+#define MODULE_PROC_FAMILY "SKYLAKEX "
133 - #elif defined CONFIG_MATOM
134 - #define MODULE_PROC_FAMILY "ATOM "
135 - #elif defined CONFIG_M686
136 -@@ -43,6 +63,26 @@ struct mod_arch_specific {
137 - #define MODULE_PROC_FAMILY "K7 "
138 - #elif defined CONFIG_MK8
139 - #define MODULE_PROC_FAMILY "K8 "
140 -+#elif defined CONFIG_MK8SSE3
141 -+#define MODULE_PROC_FAMILY "K8SSE3 "
142 -+#elif defined CONFIG_MK10
143 -+#define MODULE_PROC_FAMILY "K10 "
144 -+#elif defined CONFIG_MBARCELONA
145 -+#define MODULE_PROC_FAMILY "BARCELONA "
146 -+#elif defined CONFIG_MBOBCAT
147 -+#define MODULE_PROC_FAMILY "BOBCAT "
148 -+#elif defined CONFIG_MBULLDOZER
149 -+#define MODULE_PROC_FAMILY "BULLDOZER "
150 -+#elif defined CONFIG_MPILEDRIVER
151 -+#define MODULE_PROC_FAMILY "PILEDRIVER "
152 -+#elif defined CONFIG_MSTEAMROLLER
153 -+#define MODULE_PROC_FAMILY "STEAMROLLER "
154 -+#elif defined CONFIG_MJAGUAR
155 -+#define MODULE_PROC_FAMILY "JAGUAR "
156 -+#elif defined CONFIG_MEXCAVATOR
157 -+#define MODULE_PROC_FAMILY "EXCAVATOR "
158 -+#elif defined CONFIG_MZEN
159 -+#define MODULE_PROC_FAMILY "ZEN "
160 - #elif defined CONFIG_MELAN
161 - #define MODULE_PROC_FAMILY "ELAN "
162 - #elif defined CONFIG_MCRUSOE
163 ---- a/arch/x86/Kconfig.cpu 2018-01-28 16:20:33.000000000 -0500
164 -+++ b/arch/x86/Kconfig.cpu 2018-03-10 06:45:50.244371799 -0500
165 -@@ -116,6 +116,7 @@ config MPENTIUMM
166 - config MPENTIUM4
167 - bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
168 - depends on X86_32
169 -+ select X86_P6_NOP
170 - ---help---
171 - Select this for Intel Pentium 4 chips. This includes the
172 - Pentium 4, Pentium D, P4-based Celeron and Xeon, and
173 -@@ -148,9 +149,8 @@ config MPENTIUM4
174 - -Paxville
175 - -Dempsey
176 -
177 --
178 - config MK6
179 -- bool "K6/K6-II/K6-III"
180 -+ bool "AMD K6/K6-II/K6-III"
181 - depends on X86_32
182 - ---help---
183 - Select this for an AMD K6-family processor. Enables use of
184 -@@ -158,7 +158,7 @@ config MK6
185 - flags to GCC.
186 -
187 - config MK7
188 -- bool "Athlon/Duron/K7"
189 -+ bool "AMD Athlon/Duron/K7"
190 - depends on X86_32
191 - ---help---
192 - Select this for an AMD Athlon K7-family processor. Enables use of
193 -@@ -166,12 +166,83 @@ config MK7
194 - flags to GCC.
195 -
196 - config MK8
197 -- bool "Opteron/Athlon64/Hammer/K8"
198 -+ bool "AMD Opteron/Athlon64/Hammer/K8"
199 - ---help---
200 - Select this for an AMD Opteron or Athlon64 Hammer-family processor.
201 - Enables use of some extended instructions, and passes appropriate
202 - optimization flags to GCC.
203 -
204 -+config MK8SSE3
205 -+ bool "AMD Opteron/Athlon64/Hammer/K8 with SSE3"
206 -+ ---help---
207 -+ Select this for improved AMD Opteron or Athlon64 Hammer-family processors.
208 -+ Enables use of some extended instructions, and passes appropriate
209 -+ optimization flags to GCC.
210 -+
211 -+config MK10
212 -+ bool "AMD 61xx/7x50/PhenomX3/X4/II/K10"
213 -+ ---help---
214 -+ Select this for an AMD 61xx Eight-Core Magny-Cours, Athlon X2 7x50,
215 -+ Phenom X3/X4/II, Athlon II X2/X3/X4, or Turion II-family processor.
216 -+ Enables use of some extended instructions, and passes appropriate
217 -+ optimization flags to GCC.
218 -+
219 -+config MBARCELONA
220 -+ bool "AMD Barcelona"
221 -+ ---help---
222 -+ Select this for AMD Family 10h Barcelona processors.
223 -+
224 -+ Enables -march=barcelona
225 -+
226 -+config MBOBCAT
227 -+ bool "AMD Bobcat"
228 -+ ---help---
229 -+ Select this for AMD Family 14h Bobcat processors.
230 -+
231 -+ Enables -march=btver1
232 -+
233 -+config MJAGUAR
234 -+ bool "AMD Jaguar"
235 -+ ---help---
236 -+ Select this for AMD Family 16h Jaguar processors.
237 -+
238 -+ Enables -march=btver2
239 -+
240 -+config MBULLDOZER
241 -+ bool "AMD Bulldozer"
242 -+ ---help---
243 -+ Select this for AMD Family 15h Bulldozer processors.
244 -+
245 -+ Enables -march=bdver1
246 -+
247 -+config MPILEDRIVER
248 -+ bool "AMD Piledriver"
249 -+ ---help---
250 -+ Select this for AMD Family 15h Piledriver processors.
251 -+
252 -+ Enables -march=bdver2
253 -+
254 -+config MSTEAMROLLER
255 -+ bool "AMD Steamroller"
256 -+ ---help---
257 -+ Select this for AMD Family 15h Steamroller processors.
258 -+
259 -+ Enables -march=bdver3
260 -+
261 -+config MEXCAVATOR
262 -+ bool "AMD Excavator"
263 -+ ---help---
264 -+ Select this for AMD Family 15h Excavator processors.
265 -+
266 -+ Enables -march=bdver4
267 -+
268 -+config MZEN
269 -+ bool "AMD Zen"
270 -+ ---help---
271 -+ Select this for AMD Family 17h Zen processors.
272 -+
273 -+ Enables -march=znver1
274 -+
275 - config MCRUSOE
276 - bool "Crusoe"
277 - depends on X86_32
278 -@@ -253,6 +324,7 @@ config MVIAC7
279 -
280 - config MPSC
281 - bool "Intel P4 / older Netburst based Xeon"
282 -+ select X86_P6_NOP
283 - depends on X86_64
284 - ---help---
285 - Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey
286 -@@ -262,8 +334,19 @@ config MPSC
287 - using the cpu family field
288 - in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one.
289 -
290 -+config MATOM
291 -+ bool "Intel Atom"
292 -+ select X86_P6_NOP
293 -+ ---help---
294 -+
295 -+ Select this for the Intel Atom platform. Intel Atom CPUs have an
296 -+ in-order pipelining architecture and thus can benefit from
297 -+ accordingly optimized code. Use a recent GCC with specific Atom
298 -+ support in order to fully benefit from selecting this option.
299 -+
300 - config MCORE2
301 -- bool "Core 2/newer Xeon"
302 -+ bool "Intel Core 2"
303 -+ select X86_P6_NOP
304 - ---help---
305 -
306 - Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and
307 -@@ -271,14 +354,88 @@ config MCORE2
308 - family in /proc/cpuinfo. Newer ones have 6 and older ones 15
309 - (not a typo)
310 -
311 --config MATOM
312 -- bool "Intel Atom"
313 -+ Enables -march=core2
314 -+
315 -+config MNEHALEM
316 -+ bool "Intel Nehalem"
317 -+ select X86_P6_NOP
318 - ---help---
319 -
320 -- Select this for the Intel Atom platform. Intel Atom CPUs have an
321 -- in-order pipelining architecture and thus can benefit from
322 -- accordingly optimized code. Use a recent GCC with specific Atom
323 -- support in order to fully benefit from selecting this option.
324 -+ Select this for 1st Gen Core processors in the Nehalem family.
325 -+
326 -+ Enables -march=nehalem
327 -+
328 -+config MWESTMERE
329 -+ bool "Intel Westmere"
330 -+ select X86_P6_NOP
331 -+ ---help---
332 -+
333 -+ Select this for the Intel Westmere formerly Nehalem-C family.
334 -+
335 -+ Enables -march=westmere
336 -+
337 -+config MSILVERMONT
338 -+ bool "Intel Silvermont"
339 -+ select X86_P6_NOP
340 -+ ---help---
341 -+
342 -+ Select this for the Intel Silvermont platform.
343 -+
344 -+ Enables -march=silvermont
345 -+
346 -+config MSANDYBRIDGE
347 -+ bool "Intel Sandy Bridge"
348 -+ select X86_P6_NOP
349 -+ ---help---
350 -+
351 -+ Select this for 2nd Gen Core processors in the Sandy Bridge family.
352 -+
353 -+ Enables -march=sandybridge
354 -+
355 -+config MIVYBRIDGE
356 -+ bool "Intel Ivy Bridge"
357 -+ select X86_P6_NOP
358 -+ ---help---
359 -+
360 -+ Select this for 3rd Gen Core processors in the Ivy Bridge family.
361 -+
362 -+ Enables -march=ivybridge
363 -+
364 -+config MHASWELL
365 -+ bool "Intel Haswell"
366 -+ select X86_P6_NOP
367 -+ ---help---
368 -+
369 -+ Select this for 4th Gen Core processors in the Haswell family.
370 -+
371 -+ Enables -march=haswell
372 -+
373 -+config MBROADWELL
374 -+ bool "Intel Broadwell"
375 -+ select X86_P6_NOP
376 -+ ---help---
377 -+
378 -+ Select this for 5th Gen Core processors in the Broadwell family.
379 -+
380 -+ Enables -march=broadwell
381 -+
382 -+config MSKYLAKE
383 -+ bool "Intel Skylake"
384 -+ select X86_P6_NOP
385 -+ ---help---
386 -+
387 -+ Select this for 6th Gen Core processors in the Skylake family.
388 -+
389 -+ Enables -march=skylake
390 -+
391 -+config MSKYLAKEX
392 -+ bool "Intel Skylake X"
393 -+ select X86_P6_NOP
394 -+ ---help---
395 -+
396 -+ Select this for 6th Gen Core processors in the Skylake X family.
397 -+
398 -+ Enables -march=skylake-avx512
399 -
400 - config GENERIC_CPU
401 - bool "Generic-x86-64"
402 -@@ -287,6 +444,19 @@ config GENERIC_CPU
403 - Generic x86-64 CPU.
404 - Run equally well on all x86-64 CPUs.
405 -
406 -+config MNATIVE
407 -+ bool "Native optimizations autodetected by GCC"
408 -+ ---help---
409 -+
410 -+ GCC 4.2 and above support -march=native, which automatically detects
411 -+ the optimum settings to use based on your processor. -march=native
412 -+ also detects and applies additional settings beyond -march specific
413 -+ to your CPU, (eg. -msse4). Unless you have a specific reason not to
414 -+ (e.g. distcc cross-compiling), you should probably be using
415 -+ -march=native rather than anything listed below.
416 -+
417 -+ Enables -march=native
418 -+
419 - endchoice
420 -
421 - config X86_GENERIC
422 -@@ -311,7 +481,7 @@ config X86_INTERNODE_CACHE_SHIFT
423 - config X86_L1_CACHE_SHIFT
424 - int
425 - default "7" if MPENTIUM4 || MPSC
426 -- default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
427 -+ default "6" if MK7 || MK8 || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MJAGUAR || MPENTIUMM || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MNATIVE || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
428 - default "4" if MELAN || M486 || MGEODEGX1
429 - default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
430 -
431 -@@ -342,35 +512,36 @@ config X86_ALIGNMENT_16
432 -
433 - config X86_INTEL_USERCOPY
434 - def_bool y
435 -- depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2
436 -+ depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK8SSE3 || MK7 || MEFFICEON || MCORE2 || MK10 || MBARCELONA || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MNATIVE
437 -
438 - config X86_USE_PPRO_CHECKSUM
439 - def_bool y
440 -- depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM
441 -+ depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MK10 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MK8SSE3 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MATOM || MNATIVE
442 -
443 - config X86_USE_3DNOW
444 - def_bool y
445 - depends on (MCYRIXIII || MK7 || MGEODE_LX) && !UML
446 -
447 --#
448 --# P6_NOPs are a relatively minor optimization that require a family >=
449 --# 6 processor, except that it is broken on certain VIA chips.
450 --# Furthermore, AMD chips prefer a totally different sequence of NOPs
451 --# (which work on all CPUs). In addition, it looks like Virtual PC
452 --# does not understand them.
453 --#
454 --# As a result, disallow these if we're not compiling for X86_64 (these
455 --# NOPs do work on all x86-64 capable chips); the list of processors in
456 --# the right-hand clause are the cores that benefit from this optimization.
457 --#
458 - config X86_P6_NOP
459 -- def_bool y
460 -- depends on X86_64
461 -- depends on (MCORE2 || MPENTIUM4 || MPSC)
462 -+ default n
463 -+ bool "Support for P6_NOPs on Intel chips"
464 -+ depends on (MCORE2 || MPENTIUM4 || MPSC || MATOM || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MNATIVE)
465 -+ ---help---
466 -+ P6_NOPs are a relatively minor optimization that require a family >=
467 -+ 6 processor, except that it is broken on certain VIA chips.
468 -+ Furthermore, AMD chips prefer a totally different sequence of NOPs
469 -+ (which work on all CPUs). In addition, it looks like Virtual PC
470 -+ does not understand them.
471 -+
472 -+ As a result, disallow these if we're not compiling for X86_64 (these
473 -+ NOPs do work on all x86-64 capable chips); the list of processors in
474 -+ the right-hand clause are the cores that benefit from this optimization.
475 -+
476 -+ Say Y if you have Intel CPU newer than Pentium Pro, N otherwise.
477 -
478 - config X86_TSC
479 - def_bool y
480 -- depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MATOM) || X86_64
481 -+ depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MK8SSE3 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MNATIVE || MATOM) || X86_64
482 -
483 - config X86_CMPXCHG64
484 - def_bool y
485 -@@ -380,7 +551,7 @@ config X86_CMPXCHG64
486 - # generates cmov.
487 - config X86_CMOV
488 - def_bool y
489 -- depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM || MGEODE_LX)
490 -+ depends on (MK8 || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MJAGUAR || MK7 || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MNATIVE || MATOM || MGEODE_LX)
491 -
492 - config X86_MINIMUM_CPU_FAMILY
493 - int
494 ---- a/arch/x86/Makefile 2018-01-28 16:20:33.000000000 -0500
495 -+++ b/arch/x86/Makefile 2018-03-10 06:47:00.284240139 -0500
496 -@@ -124,13 +124,42 @@ else
497 - KBUILD_CFLAGS += $(call cc-option,-mskip-rax-setup)
498 -
499 - # FIXME - should be integrated in Makefile.cpu (Makefile_32.cpu)
500 -+ cflags-$(CONFIG_MNATIVE) += $(call cc-option,-march=native)
501 - cflags-$(CONFIG_MK8) += $(call cc-option,-march=k8)
502 -+ cflags-$(CONFIG_MK8SSE3) += $(call cc-option,-march=k8-sse3,-mtune=k8)
503 -+ cflags-$(CONFIG_MK10) += $(call cc-option,-march=amdfam10)
504 -+ cflags-$(CONFIG_MBARCELONA) += $(call cc-option,-march=barcelona)
505 -+ cflags-$(CONFIG_MBOBCAT) += $(call cc-option,-march=btver1)
506 -+ cflags-$(CONFIG_MJAGUAR) += $(call cc-option,-march=btver2)
507 -+ cflags-$(CONFIG_MBULLDOZER) += $(call cc-option,-march=bdver1)
508 -+ cflags-$(CONFIG_MPILEDRIVER) += $(call cc-option,-march=bdver2)
509 -+ cflags-$(CONFIG_MSTEAMROLLER) += $(call cc-option,-march=bdver3)
510 -+ cflags-$(CONFIG_MEXCAVATOR) += $(call cc-option,-march=bdver4)
511 -+ cflags-$(CONFIG_MZEN) += $(call cc-option,-march=znver1)
512 - cflags-$(CONFIG_MPSC) += $(call cc-option,-march=nocona)
513 -
514 - cflags-$(CONFIG_MCORE2) += \
515 -- $(call cc-option,-march=core2,$(call cc-option,-mtune=generic))
516 -- cflags-$(CONFIG_MATOM) += $(call cc-option,-march=atom) \
517 -- $(call cc-option,-mtune=atom,$(call cc-option,-mtune=generic))
518 -+ $(call cc-option,-march=core2,$(call cc-option,-mtune=core2))
519 -+ cflags-$(CONFIG_MNEHALEM) += \
520 -+ $(call cc-option,-march=nehalem,$(call cc-option,-mtune=nehalem))
521 -+ cflags-$(CONFIG_MWESTMERE) += \
522 -+ $(call cc-option,-march=westmere,$(call cc-option,-mtune=westmere))
523 -+ cflags-$(CONFIG_MSILVERMONT) += \
524 -+ $(call cc-option,-march=silvermont,$(call cc-option,-mtune=silvermont))
525 -+ cflags-$(CONFIG_MSANDYBRIDGE) += \
526 -+ $(call cc-option,-march=sandybridge,$(call cc-option,-mtune=sandybridge))
527 -+ cflags-$(CONFIG_MIVYBRIDGE) += \
528 -+ $(call cc-option,-march=ivybridge,$(call cc-option,-mtune=ivybridge))
529 -+ cflags-$(CONFIG_MHASWELL) += \
530 -+ $(call cc-option,-march=haswell,$(call cc-option,-mtune=haswell))
531 -+ cflags-$(CONFIG_MBROADWELL) += \
532 -+ $(call cc-option,-march=broadwell,$(call cc-option,-mtune=broadwell))
533 -+ cflags-$(CONFIG_MSKYLAKE) += \
534 -+ $(call cc-option,-march=skylake,$(call cc-option,-mtune=skylake))
535 -+ cflags-$(CONFIG_MSKYLAKEX) += \
536 -+ $(call cc-option,-march=skylake-avx512,$(call cc-option,-mtune=skylake-avx512))
537 -+ cflags-$(CONFIG_MATOM) += $(call cc-option,-march=bonnell) \
538 -+ $(call cc-option,-mtune=bonnell,$(call cc-option,-mtune=generic))
539 - cflags-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=generic)
540 - KBUILD_CFLAGS += $(cflags-y)
541 -
542 ---- a/arch/x86/Makefile_32.cpu 2018-01-28 16:20:33.000000000 -0500
543 -+++ b/arch/x86/Makefile_32.cpu 2018-03-10 06:47:46.025992644 -0500
544 -@@ -23,7 +23,18 @@ cflags-$(CONFIG_MK6) += -march=k6
545 - # Please note, that patches that add -march=athlon-xp and friends are pointless.
546 - # They make zero difference whatsosever to performance at this time.
547 - cflags-$(CONFIG_MK7) += -march=athlon
548 -+cflags-$(CONFIG_MNATIVE) += $(call cc-option,-march=native)
549 - cflags-$(CONFIG_MK8) += $(call cc-option,-march=k8,-march=athlon)
550 -+cflags-$(CONFIG_MK8SSE3) += $(call cc-option,-march=k8-sse3,-march=athlon)
551 -+cflags-$(CONFIG_MK10) += $(call cc-option,-march=amdfam10,-march=athlon)
552 -+cflags-$(CONFIG_MBARCELONA) += $(call cc-option,-march=barcelona,-march=athlon)
553 -+cflags-$(CONFIG_MBOBCAT) += $(call cc-option,-march=btver1,-march=athlon)
554 -+cflags-$(CONFIG_MJAGUAR) += $(call cc-option,-march=btver2,-march=athlon)
555 -+cflags-$(CONFIG_MBULLDOZER) += $(call cc-option,-march=bdver1,-march=athlon)
556 -+cflags-$(CONFIG_MPILEDRIVER) += $(call cc-option,-march=bdver2,-march=athlon)
557 -+cflags-$(CONFIG_MSTEAMROLLER) += $(call cc-option,-march=bdver3,-march=athlon)
558 -+cflags-$(CONFIG_MEXCAVATOR) += $(call cc-option,-march=bdver4,-march=athlon)
559 -+cflags-$(CONFIG_MZEN) += $(call cc-option,-march=znver1,-march=athlon)
560 - cflags-$(CONFIG_MCRUSOE) += -march=i686 -falign-functions=0 -falign-jumps=0 -falign-loops=0
561 - cflags-$(CONFIG_MEFFICEON) += -march=i686 $(call tune,pentium3) -falign-functions=0 -falign-jumps=0 -falign-loops=0
562 - cflags-$(CONFIG_MWINCHIPC6) += $(call cc-option,-march=winchip-c6,-march=i586)
563 -@@ -32,8 +43,17 @@ cflags-$(CONFIG_MCYRIXIII) += $(call cc-
564 - cflags-$(CONFIG_MVIAC3_2) += $(call cc-option,-march=c3-2,-march=i686)
565 - cflags-$(CONFIG_MVIAC7) += -march=i686
566 - cflags-$(CONFIG_MCORE2) += -march=i686 $(call tune,core2)
567 --cflags-$(CONFIG_MATOM) += $(call cc-option,-march=atom,$(call cc-option,-march=core2,-march=i686)) \
568 -- $(call cc-option,-mtune=atom,$(call cc-option,-mtune=generic))
569 -+cflags-$(CONFIG_MNEHALEM) += -march=i686 $(call tune,nehalem)
570 -+cflags-$(CONFIG_MWESTMERE) += -march=i686 $(call tune,westmere)
571 -+cflags-$(CONFIG_MSILVERMONT) += -march=i686 $(call tune,silvermont)
572 -+cflags-$(CONFIG_MSANDYBRIDGE) += -march=i686 $(call tune,sandybridge)
573 -+cflags-$(CONFIG_MIVYBRIDGE) += -march=i686 $(call tune,ivybridge)
574 -+cflags-$(CONFIG_MHASWELL) += -march=i686 $(call tune,haswell)
575 -+cflags-$(CONFIG_MBROADWELL) += -march=i686 $(call tune,broadwell)
576 -+cflags-$(CONFIG_MSKYLAKE) += -march=i686 $(call tune,skylake)
577 -+cflags-$(CONFIG_MSKYLAKEX) += -march=i686 $(call tune,skylake-avx512)
578 -+cflags-$(CONFIG_MATOM) += $(call cc-option,-march=bonnell,$(call cc-option,-march=core2,-march=i686)) \
579 -+ $(call cc-option,-mtune=bonnell,$(call cc-option,-mtune=generic))
580 -
581 - # AMD Elan support
582 - cflags-$(CONFIG_MELAN) += -march=i486