1 |
vapier 13/09/03 02:34:54 |
2 |
|
3 |
Added: 05_all_readline-headers.patch |
4 |
10_all_gdb-7.6-cpuid.patch README.history |
5 |
Log: |
6 |
initial 7.6.1 patchset based on last 7.6 patchset |
7 |
|
8 |
Revision Changes Path |
9 |
1.1 src/patchsets/gdb/7.6.1/05_all_readline-headers.patch |
10 |
|
11 |
file : http://sources.gentoo.org/viewvc.cgi/gentoo/src/patchsets/gdb/7.6.1/05_all_readline-headers.patch?rev=1.1&view=markup |
12 |
plain: http://sources.gentoo.org/viewvc.cgi/gentoo/src/patchsets/gdb/7.6.1/05_all_readline-headers.patch?rev=1.1&content-type=text/plain |
13 |
|
14 |
Index: 05_all_readline-headers.patch |
15 |
=================================================================== |
16 |
--- a/readline/complete.c |
17 |
+++ b/readline/complete.c |
18 |
@@ -25,6 +25,11 @@ |
19 |
# include <config.h> |
20 |
#endif |
21 |
|
22 |
+#ifdef HAVE_WCHAR_H /* wcwidth() */ |
23 |
+# define _GNU_SOURCE |
24 |
+# include <wchar.h> |
25 |
+#endif |
26 |
+ |
27 |
#include <sys/types.h> |
28 |
#include <fcntl.h> |
29 |
#if defined (HAVE_SYS_FILE_H) |
30 |
--- a/readline/display.c |
31 |
+++ b/readline/display.c |
32 |
@@ -25,6 +25,11 @@ |
33 |
# include <config.h> |
34 |
#endif |
35 |
|
36 |
+#ifdef HAVE_WCHAR_H /* wcwidth() */ |
37 |
+# define _GNU_SOURCE |
38 |
+# include <wchar.h> |
39 |
+#endif |
40 |
+ |
41 |
#include <sys/types.h> |
42 |
|
43 |
#if defined (HAVE_UNISTD_H) |
44 |
--- a/readline/mbutil.c |
45 |
+++ b/readline/mbutil.c |
46 |
@@ -25,6 +25,11 @@ |
47 |
# include <config.h> |
48 |
#endif |
49 |
|
50 |
+#ifdef HAVE_WCHAR_H /* wcwidth() */ |
51 |
+# define _GNU_SOURCE |
52 |
+# include <wchar.h> |
53 |
+#endif |
54 |
+ |
55 |
#include <sys/types.h> |
56 |
#include <fcntl.h> |
57 |
#include "posixjmp.h" |
58 |
|
59 |
|
60 |
|
61 |
1.1 src/patchsets/gdb/7.6.1/10_all_gdb-7.6-cpuid.patch |
62 |
|
63 |
file : http://sources.gentoo.org/viewvc.cgi/gentoo/src/patchsets/gdb/7.6.1/10_all_gdb-7.6-cpuid.patch?rev=1.1&view=markup |
64 |
plain: http://sources.gentoo.org/viewvc.cgi/gentoo/src/patchsets/gdb/7.6.1/10_all_gdb-7.6-cpuid.patch?rev=1.1&content-type=text/plain |
65 |
|
66 |
Index: 10_all_gdb-7.6-cpuid.patch |
67 |
=================================================================== |
68 |
From 315a19370d66e46d8a7a16bd71aa331c3622341e Mon Sep 17 00:00:00 2001 |
69 |
From: Mike Frysinger <vapier@g.o> |
70 |
Date: Wed, 19 Jun 2013 22:29:36 +0000 |
71 |
Subject: [PATCH] gdb: clean up x86 cpuid implementations |
72 |
|
73 |
We've currently got 3 files doing open coded implementations of cpuid. |
74 |
Each has its own set of workarounds and varying levels of how well |
75 |
they're written and are generally hardcoded to specific cpuid functions. |
76 |
If you try to build the latest gdb as a PIE on an i386 system, the build |
77 |
will fail because one of them lacks PIC workarounds (wrt ebx). |
78 |
|
79 |
Specifically, we have: |
80 |
common/linux-btrace.c: |
81 |
two copies of cpuid asm w/specific args, one has no workarounds |
82 |
while the other implicitly does to avoid memcpy |
83 |
go32-nat.c: |
84 |
two copies of cpuid asm w/specific args, one has workarounds to |
85 |
avoid memcpy |
86 |
gdb/testsuite/gdb.arch/i386-cpuid.h: |
87 |
one general cpuid asm w/many workarounds copied from older gcc |
88 |
|
89 |
Fortunately, that last header there is pretty damn good -- it handles |
90 |
lots of edge cases, the code is nice & tight (uses gcc asm operands |
91 |
rather than manual movs), and is already almost a general library type |
92 |
header. It's also the basis of what is now the public cpuid.h that is |
93 |
shipped with gcc-4.3+. |
94 |
|
95 |
So what I've done is pull that test header out and into gdb/common/ |
96 |
(not sure if there's a better place), synced to the version found in |
97 |
gcc-4.8.0, put a wrapper API around it, and then cut over all the |
98 |
existing call points to this new header. |
99 |
|
100 |
Since the func already has support for "is cpuid supported on this proc", |
101 |
it makes it trivial to push the i386/x86_64 ifdefs down into this wrapper |
102 |
API too. Now it can be safely used for all targets and gcc will elide |
103 |
the unused code for us. |
104 |
|
105 |
I've verified the gdb.arch testsuite still passes, and this code compiles |
106 |
for an armv7a host as well as x86_64. The go32-nat code has been left |
107 |
ifdef-ed out until someone can test & verify the new stuff works (and if |
108 |
it doesn't, figure out how to make the new code work). |
109 |
|
110 |
URL: https://bugs.gentoo.org/467806 |
111 |
Signed-off-by: Mike Frysinger <vapier@g.o> |
112 |
--- |
113 |
gdb/ChangeLog | 14 +++ |
114 |
gdb/Makefile.in | 2 +- |
115 |
gdb/common/i386-cpuid.h | 63 ++++++++++ |
116 |
.../i386-cpuid.h => common/i386-gcc-cpuid.h} | 140 ++++++++++++++++----- |
117 |
gdb/common/linux-btrace.c | 41 ++---- |
118 |
gdb/go32-nat.c | 22 ++++ |
119 |
gdb/testsuite/ChangeLog | 8 ++ |
120 |
gdb/testsuite/gdb.arch/i386-avx.c | 2 +- |
121 |
gdb/testsuite/gdb.arch/i386-avx.exp | 2 +- |
122 |
gdb/testsuite/gdb.arch/i386-sse.c | 5 +- |
123 |
gdb/testsuite/gdb.arch/i386-sse.exp | 2 +- |
124 |
11 files changed, 231 insertions(+), 70 deletions(-) |
125 |
create mode 100644 gdb/common/i386-cpuid.h |
126 |
rename gdb/{testsuite/gdb.arch/i386-cpuid.h => common/i386-gcc-cpuid.h} (59%) |
127 |
|
128 |
2013-06-19 Mike Frysinger <vapier@g.o> |
129 |
|
130 |
* Makefile.in (HFILES_NO_SRCDIR): Add common/i386-cpuid.h and |
131 |
common/i386-gcc-cpuid.h. |
132 |
* common/i386-cpuid.h: New wrapper header around i386-gcc-cpuid.h. |
133 |
* common/i386-gcc-cpuid.h: Rename from testsuite/gdb.arch/i386-cpuid.h. |
134 |
Copy the latest version from upstream gcc. |
135 |
* common/linux-btrace.c: Include i386-cpuid.h. |
136 |
(intel_supports_btrace): Delete x86 ifdefs and replace inline asm with |
137 |
call to i386_cpuid. |
138 |
(cpu_supports_btrace): Likewise. |
139 |
* go32-nat.c: Include i386-cpuid.h. |
140 |
(go32_sysinfo): Add (disabled) calls to i386_cpuid with comments. |
141 |
|
142 |
diff --git a/gdb/Makefile.in b/gdb/Makefile.in |
143 |
index a6336a2..71058e5 100644 |
144 |
--- a/gdb/Makefile.in |
145 |
+++ b/gdb/Makefile.in |
146 |
@@ -850,7 +850,8 @@ common/common-utils.h common/xml-utils.h common/buffer.h common/ptid.h \ |
147 |
common/common-utils.h common/xml-utils.h common/buffer.h common/ptid.h \ |
148 |
common/format.h common/host-defs.h utils.h common/queue.h common/gdb_string.h \ |
149 |
common/linux-osdata.h gdb-dlfcn.h auto-load.h probe.h stap-probe.h \ |
150 |
-gdb_bfd.h sparc-ravenscar-thread.h ppc-ravenscar-thread.h common/linux-btrace.h |
151 |
+gdb_bfd.h sparc-ravenscar-thread.h ppc-ravenscar-thread.h common/linux-btrace.h \ |
152 |
+common/i386-cpuid.h common/i386-gcc-cpuid.h |
153 |
|
154 |
# Header files that already have srcdir in them, or which are in objdir. |
155 |
|
156 |
diff --git a/gdb/common/i386-cpuid.h b/gdb/common/i386-cpuid.h |
157 |
new file mode 100644 |
158 |
index 0000000..8bb28c5 |
159 |
--- /dev/null |
160 |
+++ b/gdb/common/i386-cpuid.h |
161 |
@@ -0,0 +1,63 @@ |
162 |
+/* C API for x86 cpuid insn. |
163 |
+ Copyright (C) 2007-2013 Free Software Foundation, Inc. |
164 |
+ |
165 |
+ This file is part of GDB. |
166 |
+ |
167 |
+ This file is free software; you can redistribute it and/or modify it |
168 |
+ under the terms of the GNU General Public License as published by the |
169 |
+ Free Software Foundation; either version 3, or (at your option) any |
170 |
+ later version. |
171 |
+ |
172 |
+ This program is distributed in the hope that it will be useful, |
173 |
+ but WITHOUT ANY WARRANTY; without even the implied warranty of |
174 |
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
175 |
+ GNU General Public License for more details. |
176 |
+ |
177 |
+ You should have received a copy of the GNU General Public License |
178 |
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
179 |
+ |
180 |
+#ifndef I386_CPUID_COMMON_H |
181 |
+#define I386_CPUID_COMMON_H |
182 |
+ |
183 |
+/* Always include the header for the cpu bit defines. */ |
184 |
+#include "i386-gcc-cpuid.h" |
185 |
+ |
186 |
+#if defined(__i386__) || defined(__x86_64__) |
187 |
+ |
188 |
+/* Return cpuid data for requested cpuid level, as found in returned |
189 |
+ eax, ebx, ecx and edx registers. The function checks if cpuid is |
190 |
+ supported and returns 1 for valid cpuid information or 0 for |
191 |
+ unsupported cpuid level. Pointers may be non-null. */ |
192 |
+ |
193 |
+static __inline int |
194 |
+i386_cpuid (unsigned int __level, |
195 |
+ unsigned int *__eax, unsigned int *__ebx, |
196 |
+ unsigned int *__ecx, unsigned int *__edx) |
197 |
+{ |
198 |
+ unsigned int __scratch; |
199 |
+ |
200 |
+ if (!__eax) |
201 |
+ __eax = &__scratch; |
202 |
+ if (!__ebx) |
203 |
+ __ebx = &__scratch; |
204 |
+ if (!__ecx) |
205 |
+ __ecx = &__scratch; |
206 |
+ if (!__edx) |
207 |
+ __edx = &__scratch; |
208 |
+ |
209 |
+ return __get_cpuid (__level, __eax, __ebx, __ecx, __edx); |
210 |
+} |
211 |
+ |
212 |
+#else |
213 |
+ |
214 |
+static __inline int |
215 |
+i386_cpuid (unsigned int __level, |
216 |
+ unsigned int *__eax, unsigned int *__ebx, |
217 |
+ unsigned int *__ecx, unsigned int *__edx) |
218 |
+{ |
219 |
+ return 0; |
220 |
+} |
221 |
+ |
222 |
+#endif /* i386 && x86_64 */ |
223 |
+ |
224 |
+#endif /* I386_CPUID_COMMON_H */ |
225 |
diff --git a/gdb/common/i386-gcc-cpuid.h b/gdb/common/i386-gcc-cpuid.h |
226 |
new file mode 100644 |
227 |
index 0000000..e045ba8 |
228 |
--- /dev/null |
229 |
+++ b/gdb/common/i386-gcc-cpuid.h |
230 |
@@ -0,0 +1,272 @@ |
231 |
+/* |
232 |
+ * Helper cpuid.h file copied from gcc-4.8.0. Code in gdb should not |
233 |
+ * include this directly, but pull in i386-cpuid.h and use that func. |
234 |
+ */ |
235 |
+/* |
236 |
+ * Copyright (C) 2007-2013 Free Software Foundation, Inc. |
237 |
+ * |
238 |
+ * This file is free software; you can redistribute it and/or modify it |
239 |
+ * under the terms of the GNU General Public License as published by the |
240 |
+ * Free Software Foundation; either version 3, or (at your option) any |
241 |
+ * later version. |
242 |
+ * |
243 |
+ * This file is distributed in the hope that it will be useful, but |
244 |
+ * WITHOUT ANY WARRANTY; without even the implied warranty of |
245 |
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
246 |
+ * General Public License for more details. |
247 |
+ * |
248 |
+ * Under Section 7 of GPL version 3, you are granted additional |
249 |
+ * permissions described in the GCC Runtime Library Exception, version |
250 |
+ * 3.1, as published by the Free Software Foundation. |
251 |
+ * |
252 |
+ * You should have received a copy of the GNU General Public License and |
253 |
+ * a copy of the GCC Runtime Library Exception along with this program; |
254 |
+ * see the files COPYING3 and COPYING.RUNTIME respectively. If not, see |
255 |
+ * <http://www.gnu.org/licenses/>. |
256 |
+ */ |
257 |
+ |
258 |
+/* %ecx */ |
259 |
+#define bit_SSE3 (1 << 0) |
260 |
+#define bit_PCLMUL (1 << 1) |
261 |
+#define bit_LZCNT (1 << 5) |
262 |
+#define bit_SSSE3 (1 << 9) |
263 |
+#define bit_FMA (1 << 12) |
264 |
+#define bit_CMPXCHG16B (1 << 13) |
265 |
+#define bit_SSE4_1 (1 << 19) |
266 |
+#define bit_SSE4_2 (1 << 20) |
267 |
+#define bit_MOVBE (1 << 22) |
268 |
+#define bit_POPCNT (1 << 23) |
269 |
+#define bit_AES (1 << 25) |
270 |
+#define bit_XSAVE (1 << 26) |
271 |
+#define bit_OSXSAVE (1 << 27) |
272 |
+#define bit_AVX (1 << 28) |
273 |
+#define bit_F16C (1 << 29) |
274 |
+#define bit_RDRND (1 << 30) |
275 |
+ |
276 |
+/* %edx */ |
277 |
+#define bit_CMPXCHG8B (1 << 8) |
278 |
+#define bit_CMOV (1 << 15) |
279 |
+#define bit_MMX (1 << 23) |
280 |
+#define bit_FXSAVE (1 << 24) |
281 |
+#define bit_SSE (1 << 25) |
282 |
+#define bit_SSE2 (1 << 26) |
283 |
+ |
284 |
+/* Extended Features */ |
285 |
+/* %ecx */ |
286 |
+#define bit_LAHF_LM (1 << 0) |
287 |
+#define bit_ABM (1 << 5) |
288 |
+#define bit_SSE4a (1 << 6) |
289 |
+#define bit_PRFCHW (1 << 8) |
290 |
+#define bit_XOP (1 << 11) |
291 |
+#define bit_LWP (1 << 15) |
292 |
+#define bit_FMA4 (1 << 16) |
293 |
+#define bit_TBM (1 << 21) |
294 |
+ |
295 |
+/* %edx */ |
296 |
+#define bit_MMXEXT (1 << 22) |
297 |
+#define bit_LM (1 << 29) |
298 |
+#define bit_3DNOWP (1 << 30) |
299 |
+#define bit_3DNOW (1 << 31) |
300 |
+ |
301 |
+/* Extended Features (%eax == 7) */ |
302 |
+#define bit_FSGSBASE (1 << 0) |
303 |
+#define bit_BMI (1 << 3) |
304 |
+#define bit_HLE (1 << 4) |
305 |
+#define bit_AVX2 (1 << 5) |
306 |
+#define bit_BMI2 (1 << 8) |
307 |
+#define bit_RTM (1 << 11) |
308 |
+#define bit_RDSEED (1 << 18) |
309 |
+#define bit_ADX (1 << 19) |
310 |
+ |
311 |
+/* Extended State Enumeration Sub-leaf (%eax == 13, %ecx == 1) */ |
312 |
+#define bit_XSAVEOPT (1 << 0) |
313 |
+ |
314 |
+/* Signatures for different CPU implementations as returned in uses |
315 |
+ of cpuid with level 0. */ |
316 |
+#define signature_AMD_ebx 0x68747541 |
317 |
+#define signature_AMD_ecx 0x444d4163 |
318 |
+#define signature_AMD_edx 0x69746e65 |
319 |
+ |
320 |
+#define signature_CENTAUR_ebx 0x746e6543 |
321 |
+#define signature_CENTAUR_ecx 0x736c7561 |
322 |
+#define signature_CENTAUR_edx 0x48727561 |
323 |
+ |
324 |
+#define signature_CYRIX_ebx 0x69727943 |
325 |
+#define signature_CYRIX_ecx 0x64616574 |
326 |
+#define signature_CYRIX_edx 0x736e4978 |
327 |
+ |
328 |
+#define signature_INTEL_ebx 0x756e6547 |
329 |
+#define signature_INTEL_ecx 0x6c65746e |
330 |
+#define signature_INTEL_edx 0x49656e69 |
331 |
+ |
332 |
+#define signature_TM1_ebx 0x6e617254 |
333 |
+#define signature_TM1_ecx 0x55504361 |
334 |
+#define signature_TM1_edx 0x74656d73 |
335 |
+ |
336 |
+#define signature_TM2_ebx 0x756e6547 |
337 |
+#define signature_TM2_ecx 0x3638784d |
338 |
+#define signature_TM2_edx 0x54656e69 |
339 |
+ |
340 |
+#define signature_NSC_ebx 0x646f6547 |
341 |
+#define signature_NSC_ecx 0x43534e20 |
342 |
+#define signature_NSC_edx 0x79622065 |
343 |
+ |
344 |
+#define signature_NEXGEN_ebx 0x4778654e |
345 |
+#define signature_NEXGEN_ecx 0x6e657669 |
346 |
+#define signature_NEXGEN_edx 0x72446e65 |
347 |
+ |
348 |
+#define signature_RISE_ebx 0x65736952 |
349 |
+#define signature_RISE_ecx 0x65736952 |
350 |
+#define signature_RISE_edx 0x65736952 |
351 |
+ |
352 |
+#define signature_SIS_ebx 0x20536953 |
353 |
+#define signature_SIS_ecx 0x20536953 |
354 |
+#define signature_SIS_edx 0x20536953 |
355 |
+ |
356 |
+#define signature_UMC_ebx 0x20434d55 |
357 |
+#define signature_UMC_ecx 0x20434d55 |
358 |
+#define signature_UMC_edx 0x20434d55 |
359 |
+ |
360 |
+#define signature_VIA_ebx 0x20414956 |
361 |
+#define signature_VIA_ecx 0x20414956 |
362 |
+#define signature_VIA_edx 0x20414956 |
363 |
+ |
364 |
+#define signature_VORTEX_ebx 0x74726f56 |
365 |
+#define signature_VORTEX_ecx 0x436f5320 |
366 |
+#define signature_VORTEX_edx 0x36387865 |
367 |
+ |
368 |
+#if defined(__i386__) && defined(__PIC__) |
369 |
+/* %ebx may be the PIC register. */ |
370 |
+#if __GNUC__ >= 3 |
371 |
+#define __cpuid(level, a, b, c, d) \ |
372 |
+ __asm__ ("xchg{l}\t{%%}ebx, %k1\n\t" \ |
373 |
+ "cpuid\n\t" \ |
374 |
+ "xchg{l}\t{%%}ebx, %k1\n\t" \ |
375 |
+ : "=a" (a), "=&r" (b), "=c" (c), "=d" (d) \ |
376 |
+ : "0" (level)) |
377 |
+ |
378 |
+#define __cpuid_count(level, count, a, b, c, d) \ |
379 |
+ __asm__ ("xchg{l}\t{%%}ebx, %k1\n\t" \ |
380 |
+ "cpuid\n\t" \ |
381 |
+ "xchg{l}\t{%%}ebx, %k1\n\t" \ |
382 |
+ : "=a" (a), "=&r" (b), "=c" (c), "=d" (d) \ |
383 |
+ : "0" (level), "2" (count)) |
384 |
+#else |
385 |
+/* Host GCCs older than 3.0 weren't supporting Intel asm syntax |
386 |
+ nor alternatives in i386 code. */ |
387 |
+#define __cpuid(level, a, b, c, d) \ |
388 |
+ __asm__ ("xchgl\t%%ebx, %k1\n\t" \ |
389 |
+ "cpuid\n\t" \ |
390 |
+ "xchgl\t%%ebx, %k1\n\t" \ |
391 |
+ : "=a" (a), "=&r" (b), "=c" (c), "=d" (d) \ |
392 |
+ : "0" (level)) |
393 |
+ |
394 |
+#define __cpuid_count(level, count, a, b, c, d) \ |
395 |
+ __asm__ ("xchgl\t%%ebx, %k1\n\t" \ |
396 |
+ "cpuid\n\t" \ |
397 |
+ "xchgl\t%%ebx, %k1\n\t" \ |
398 |
+ : "=a" (a), "=&r" (b), "=c" (c), "=d" (d) \ |
399 |
+ : "0" (level), "2" (count)) |
400 |
+#endif |
401 |
+#elif defined(__x86_64__) && (defined(__code_model_medium__) || defined(__code_model_large__)) && defined(__PIC__) |
402 |
+/* %rbx may be the PIC register. */ |
403 |
+#define __cpuid(level, a, b, c, d) \ |
404 |
+ __asm__ ("xchg{q}\t{%%}rbx, %q1\n\t" \ |
405 |
+ "cpuid\n\t" \ |
406 |
+ "xchg{q}\t{%%}rbx, %q1\n\t" \ |
407 |
+ : "=a" (a), "=&r" (b), "=c" (c), "=d" (d) \ |
408 |
+ : "0" (level)) |
409 |
+ |
410 |
+#define __cpuid_count(level, count, a, b, c, d) \ |
411 |
+ __asm__ ("xchg{q}\t{%%}rbx, %q1\n\t" \ |
412 |
+ "cpuid\n\t" \ |
413 |
+ "xchg{q}\t{%%}rbx, %q1\n\t" \ |
414 |
+ : "=a" (a), "=&r" (b), "=c" (c), "=d" (d) \ |
415 |
+ : "0" (level), "2" (count)) |
416 |
+#else |
417 |
+#define __cpuid(level, a, b, c, d) \ |
418 |
+ __asm__ ("cpuid\n\t" \ |
419 |
+ : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \ |
420 |
+ : "0" (level)) |
421 |
+ |
422 |
+#define __cpuid_count(level, count, a, b, c, d) \ |
423 |
+ __asm__ ("cpuid\n\t" \ |
424 |
+ : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \ |
425 |
+ : "0" (level), "2" (count)) |
426 |
+#endif |
427 |
+ |
428 |
+/* Return highest supported input value for cpuid instruction. ext can |
429 |
+ be either 0x0 or 0x8000000 to return highest supported value for |
430 |
+ basic or extended cpuid information. Function returns 0 if cpuid |
431 |
+ is not supported or whatever cpuid returns in eax register. If sig |
432 |
+ pointer is non-null, then first four bytes of the signature |
433 |
+ (as found in ebx register) are returned in location pointed by sig. */ |
434 |
+ |
435 |
+static __inline unsigned int |
436 |
+__get_cpuid_max (unsigned int __ext, unsigned int *__sig) |
437 |
+{ |
438 |
+ unsigned int __eax, __ebx, __ecx, __edx; |
439 |
+ |
440 |
+#ifdef __i386__ |
441 |
+ /* See if we can use cpuid. On AMD64 we always can. */ |
442 |
+#if __GNUC__ >= 3 |
443 |
+ __asm__ ("pushf{l|d}\n\t" |
444 |
+ "pushf{l|d}\n\t" |
445 |
+ "pop{l}\t%0\n\t" |
446 |
+ "mov{l}\t{%0, %1|%1, %0}\n\t" |
447 |
+ "xor{l}\t{%2, %0|%0, %2}\n\t" |
448 |
+ "push{l}\t%0\n\t" |
449 |
+ "popf{l|d}\n\t" |
450 |
+ "pushf{l|d}\n\t" |
451 |
+ "pop{l}\t%0\n\t" |
452 |
+ "popf{l|d}\n\t" |
453 |
+ : "=&r" (__eax), "=&r" (__ebx) |
454 |
+ : "i" (0x00200000)); |
455 |
+#else |
456 |
+/* Host GCCs older than 3.0 weren't supporting Intel asm syntax |
457 |
+ nor alternatives in i386 code. */ |
458 |
+ __asm__ ("pushfl\n\t" |
459 |
+ "pushfl\n\t" |
460 |
+ "popl\t%0\n\t" |
461 |
+ "movl\t%0, %1\n\t" |
462 |
+ "xorl\t%2, %0\n\t" |
463 |
+ "pushl\t%0\n\t" |
464 |
+ "popfl\n\t" |
465 |
+ "pushfl\n\t" |
466 |
+ "popl\t%0\n\t" |
467 |
+ "popfl\n\t" |
468 |
+ : "=&r" (__eax), "=&r" (__ebx) |
469 |
+ : "i" (0x00200000)); |
470 |
+#endif |
471 |
+ |
472 |
+ if (!((__eax ^ __ebx) & 0x00200000)) |
473 |
+ return 0; |
474 |
+#endif |
475 |
+ |
476 |
+ /* Host supports cpuid. Return highest supported cpuid input value. */ |
477 |
+ __cpuid (__ext, __eax, __ebx, __ecx, __edx); |
478 |
+ |
479 |
+ if (__sig) |
480 |
+ *__sig = __ebx; |
481 |
+ |
482 |
+ return __eax; |
483 |
+} |
484 |
+ |
485 |
+/* Return cpuid data for requested cpuid level, as found in returned |
486 |
+ eax, ebx, ecx and edx registers. The function checks if cpuid is |
487 |
+ supported and returns 1 for valid cpuid information or 0 for |
488 |
+ unsupported cpuid level. All pointers are required to be non-null. */ |
489 |
+ |
490 |
+static __inline int |
491 |
+__get_cpuid (unsigned int __level, |
492 |
+ unsigned int *__eax, unsigned int *__ebx, |
493 |
+ unsigned int *__ecx, unsigned int *__edx) |
494 |
+{ |
495 |
+ unsigned int __ext = __level & 0x80000000; |
496 |
+ |
497 |
+ if (__get_cpuid_max (__ext, 0) < __level) |
498 |
+ return 0; |
499 |
+ |
500 |
+ __cpuid (__level, *__eax, *__ebx, *__ecx, *__edx); |
501 |
+ return 1; |
502 |
+} |
503 |
diff --git a/gdb/common/linux-btrace.c b/gdb/common/linux-btrace.c |
504 |
index 1f9a001..0ec13bb 100644 |
505 |
--- a/gdb/common/linux-btrace.c |
506 |
+++ b/gdb/common/linux-btrace.c |
507 |
@@ -31,6 +31,7 @@ |
508 |
#include "gdb_assert.h" |
509 |
#include "regcache.h" |
510 |
#include "gdbthread.h" |
511 |
+#include "i386-cpuid.h" |
512 |
|
513 |
#if HAVE_LINUX_PERF_EVENT_H |
514 |
|
515 |
@@ -339,13 +340,10 @@ kernel_supports_btrace (void) |
516 |
static int |
517 |
intel_supports_btrace (void) |
518 |
{ |
519 |
-#if defined __i386__ || defined __x86_64__ |
520 |
unsigned int cpuid, model, family; |
521 |
|
522 |
- __asm__ __volatile__ ("movl $1, %%eax;" |
523 |
- "cpuid;" |
524 |
- : "=a" (cpuid) |
525 |
- :: "%ebx", "%ecx", "%edx"); |
526 |
+ if (!i386_cpuid (1, &cpuid, NULL, NULL, NULL)) |
527 |
+ return 0; |
528 |
|
529 |
family = (cpuid >> 8) & 0xf; |
530 |
model = (cpuid >> 4) & 0xf; |
531 |
@@ -376,12 +374,6 @@ intel_supports_btrace (void) |
532 |
} |
533 |
|
534 |
return 1; |
535 |
- |
536 |
-#else /* !defined __i386__ && !defined __x86_64__ */ |
537 |
- |
538 |
- return 0; |
539 |
- |
540 |
-#endif /* !defined __i386__ && !defined __x86_64__ */ |
541 |
} |
542 |
|
543 |
/* Check whether the cpu supports branch tracing. */ |
544 |
@@ -389,22 +381,15 @@ intel_supports_btrace (void) |
545 |
static int |
546 |
cpu_supports_btrace (void) |
547 |
{ |
548 |
-#if defined __i386__ || defined __x86_64__ |
549 |
+ unsigned int ebx, ecx, edx; |
550 |
char vendor[13]; |
551 |
|
552 |
- __asm__ __volatile__ ("xorl %%ebx, %%ebx;" |
553 |
- "xorl %%ecx, %%ecx;" |
554 |
- "xorl %%edx, %%edx;" |
555 |
- "movl $0, %%eax;" |
556 |
- "cpuid;" |
557 |
- "movl %%ebx, %0;" |
558 |
- "movl %%edx, %1;" |
559 |
- "movl %%ecx, %2;" |
560 |
- : "=m" (vendor[0]), |
561 |
- "=m" (vendor[4]), |
562 |
- "=m" (vendor[8]) |
563 |
- : |
564 |
- : "%eax", "%ebx", "%ecx", "%edx"); |
565 |
+ if (!i386_cpuid (0, NULL, &ebx, &ecx, &edx)) |
566 |
+ return 0; |
567 |
+ |
568 |
+ memcpy (&vendor[0], &ebx, 4); |
569 |
+ memcpy (&vendor[4], &edx, 4); |
570 |
+ memcpy (&vendor[8], &ecx, 4); |
571 |
vendor[12] = '\0'; |
572 |
|
573 |
if (strcmp (vendor, "GenuineIntel") == 0) |
574 |
@@ -412,12 +397,6 @@ cpu_supports_btrace (void) |
575 |
|
576 |
/* Don't know about others. Let's assume they do. */ |
577 |
return 1; |
578 |
- |
579 |
-#else /* !defined __i386__ && !defined __x86_64__ */ |
580 |
- |
581 |
- return 0; |
582 |
- |
583 |
-#endif /* !defined __i386__ && !defined __x86_64__ */ |
584 |
} |
585 |
|
586 |
/* See linux-btrace.h. */ |
587 |
|
588 |
2013-06-19 Mike Frysinger <vapier@g.o> |
589 |
|
590 |
* gdb.arch/i386-avx.c (have_avx): Change __get_cpuid call to i386_cpuid. |
591 |
* gdb.arch/i386-avx.exp (additional_flags): Add -I${srcdir}/../common. |
592 |
* gdb.arch/i386-cpuid.h: Moved to ../common/i386-gcc-cpuid.h. |
593 |
* gdb.arch/i386-sse.c: Call new i386_cpuid function. |
594 |
* gdb.arch/i386-see.exp (additional_flags): Add -I${srcdir}/../common. |
595 |
|
596 |
diff --git a/gdb/testsuite/gdb.arch/i386-avx.c b/gdb/testsuite/gdb.arch/i386-avx.c |
597 |
index bcfa18f..7fd1217 100644 |
598 |
--- a/gdb/testsuite/gdb.arch/i386-avx.c |
599 |
+++ b/gdb/testsuite/gdb.arch/i386-avx.c |
600 |
@@ -53,7 +53,7 @@ have_avx (void) |
601 |
{ |
602 |
unsigned int eax, ebx, ecx, edx; |
603 |
|
604 |
- if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx)) |
605 |
+ if (!i386_cpuid (1, &eax, &ebx, &ecx, &edx)) |
606 |
return 0; |
607 |
|
608 |
if ((ecx & (bit_AVX | bit_OSXSAVE)) == (bit_AVX | bit_OSXSAVE)) |
609 |
diff --git a/gdb/testsuite/gdb.arch/i386-avx.exp b/gdb/testsuite/gdb.arch/i386-avx.exp |
610 |
index 964806c..bbbc6f4 100644 |
611 |
--- a/gdb/testsuite/gdb.arch/i386-avx.exp |
612 |
+++ b/gdb/testsuite/gdb.arch/i386-avx.exp |
613 |
@@ -34,7 +34,7 @@ if [get_compiler_info] { |
614 |
|
615 |
set additional_flags "" |
616 |
if [test_compiler_info gcc*] { |
617 |
- set additional_flags "additional_flags=-mavx" |
618 |
+ set additional_flags "additional_flags=-mavx -I${srcdir}/../common" |
619 |
} |
620 |
|
621 |
if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${binfile}" executable [list debug $additional_flags]] != "" } { |
622 |
diff --git a/gdb/testsuite/gdb.arch/i386-cpuid.h b/gdb/testsuite/gdb.arch/i386-cpuid.h |
623 |
deleted file mode 100644 |
624 |
index 084a083..0000000 |
625 |
--- a/gdb/testsuite/gdb.arch/i386-cpuid.h |
626 |
+++ /dev/null |
627 |
@@ -1,200 +0,0 @@ |
628 |
-/* Helper file for i386 platform. Runtime check for MMX/SSE/SSE2/AVX |
629 |
- * support. Copied from gcc 4.4. |
630 |
- * |
631 |
- * Copyright (C) 2007-2013 Free Software Foundation, Inc. |
632 |
- * |
633 |
- * This file is free software; you can redistribute it and/or modify it |
634 |
- * under the terms of the GNU General Public License as published by the |
635 |
- * Free Software Foundation; either version 3, or (at your option) any |
636 |
- * later version. |
637 |
- * |
638 |
- * This file is distributed in the hope that it will be useful, but |
639 |
- * WITHOUT ANY WARRANTY; without even the implied warranty of |
640 |
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
641 |
- * General Public License for more details. |
642 |
- * |
643 |
- * Under Section 7 of GPL version 3, you are granted additional |
644 |
- * permissions described in the GCC Runtime Library Exception, version |
645 |
- * 3.1, as published by the Free Software Foundation. |
646 |
- * |
647 |
- * You should have received a copy of the GNU General Public License and |
648 |
- * a copy of the GCC Runtime Library Exception along with this program; |
649 |
- * see the files COPYING3 and COPYING.RUNTIME respectively. If not, see |
650 |
- * <http://www.gnu.org/licenses/>. |
651 |
- */ |
652 |
- |
653 |
-/* %ecx */ |
654 |
-#define bit_SSE3 (1 << 0) |
655 |
-#define bit_PCLMUL (1 << 1) |
656 |
-#define bit_SSSE3 (1 << 9) |
657 |
-#define bit_FMA (1 << 12) |
658 |
-#define bit_CMPXCHG16B (1 << 13) |
659 |
-#define bit_SSE4_1 (1 << 19) |
660 |
-#define bit_SSE4_2 (1 << 20) |
661 |
-#define bit_MOVBE (1 << 22) |
662 |
-#define bit_POPCNT (1 << 23) |
663 |
-#define bit_AES (1 << 25) |
664 |
-#define bit_XSAVE (1 << 26) |
665 |
-#define bit_OSXSAVE (1 << 27) |
666 |
-#define bit_AVX (1 << 28) |
667 |
- |
668 |
-/* %edx */ |
669 |
-#define bit_CMPXCHG8B (1 << 8) |
670 |
-#define bit_CMOV (1 << 15) |
671 |
-#define bit_MMX (1 << 23) |
672 |
-#define bit_FXSAVE (1 << 24) |
673 |
-#define bit_SSE (1 << 25) |
674 |
-#define bit_SSE2 (1 << 26) |
675 |
- |
676 |
-/* Extended Features */ |
677 |
-/* %ecx */ |
678 |
-#define bit_LAHF_LM (1 << 0) |
679 |
-#define bit_ABM (1 << 5) |
680 |
-#define bit_SSE4a (1 << 6) |
681 |
-#define bit_XOP (1 << 11) |
682 |
-#define bit_LWP (1 << 15) |
683 |
-#define bit_FMA4 (1 << 16) |
684 |
- |
685 |
-/* %edx */ |
686 |
-#define bit_LM (1 << 29) |
687 |
-#define bit_3DNOWP (1 << 30) |
688 |
-#define bit_3DNOW (1 << 31) |
689 |
- |
690 |
- |
691 |
-#if defined(__i386__) && defined(__PIC__) |
692 |
-/* %ebx may be the PIC register. */ |
693 |
-#if __GNUC__ >= 3 |
694 |
-#define __cpuid(level, a, b, c, d) \ |
695 |
- __asm__ ("xchg{l}\t{%%}ebx, %1\n\t" \ |
696 |
- "cpuid\n\t" \ |
697 |
- "xchg{l}\t{%%}ebx, %1\n\t" \ |
698 |
- : "=a" (a), "=r" (b), "=c" (c), "=d" (d) \ |
699 |
- : "0" (level)) |
700 |
- |
701 |
-#define __cpuid_count(level, count, a, b, c, d) \ |
702 |
- __asm__ ("xchg{l}\t{%%}ebx, %1\n\t" \ |
703 |
- "cpuid\n\t" \ |
704 |
- "xchg{l}\t{%%}ebx, %1\n\t" \ |
705 |
- : "=a" (a), "=r" (b), "=c" (c), "=d" (d) \ |
706 |
- : "0" (level), "2" (count)) |
707 |
-#else |
708 |
-/* Host GCCs older than 3.0 weren't supporting Intel asm syntax |
709 |
- nor alternatives in i386 code. */ |
710 |
-#define __cpuid(level, a, b, c, d) \ |
711 |
- __asm__ ("xchgl\t%%ebx, %1\n\t" \ |
712 |
- "cpuid\n\t" \ |
713 |
- "xchgl\t%%ebx, %1\n\t" \ |
714 |
- : "=a" (a), "=r" (b), "=c" (c), "=d" (d) \ |
715 |
- : "0" (level)) |
716 |
- |
717 |
-#define __cpuid_count(level, count, a, b, c, d) \ |
718 |
- __asm__ ("xchgl\t%%ebx, %1\n\t" \ |
719 |
- "cpuid\n\t" \ |
720 |
- "xchgl\t%%ebx, %1\n\t" \ |
721 |
- : "=a" (a), "=r" (b), "=c" (c), "=d" (d) \ |
722 |
- : "0" (level), "2" (count)) |
723 |
-#endif |
724 |
-#else |
725 |
-#define __cpuid(level, a, b, c, d) \ |
726 |
- __asm__ ("cpuid\n\t" \ |
727 |
- : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \ |
728 |
- : "0" (level)) |
729 |
- |
730 |
-#define __cpuid_count(level, count, a, b, c, d) \ |
731 |
- __asm__ ("cpuid\n\t" \ |
732 |
- : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \ |
733 |
- : "0" (level), "2" (count)) |
734 |
-#endif |
735 |
- |
736 |
-/* Return highest supported input value for cpuid instruction. ext can |
737 |
- be either 0x0 or 0x8000000 to return highest supported value for |
738 |
- basic or extended cpuid information. Function returns 0 if cpuid |
739 |
- is not supported or whatever cpuid returns in eax register. If sig |
740 |
- pointer is non-null, then first four bytes of the signature |
741 |
- (as found in ebx register) are returned in location pointed by sig. */ |
742 |
- |
743 |
-static __inline unsigned int |
744 |
-__get_cpuid_max (unsigned int __ext, unsigned int *__sig) |
745 |
-{ |
746 |
- unsigned int __eax, __ebx, __ecx, __edx; |
747 |
- |
748 |
-#ifndef __x86_64__ |
749 |
-#if __GNUC__ >= 3 |
750 |
- /* See if we can use cpuid. On AMD64 we always can. */ |
751 |
- __asm__ ("pushf{l|d}\n\t" |
752 |
- "pushf{l|d}\n\t" |
753 |
- "pop{l}\t%0\n\t" |
754 |
- "mov{l}\t{%0, %1|%1, %0}\n\t" |
755 |
- "xor{l}\t{%2, %0|%0, %2}\n\t" |
756 |
- "push{l}\t%0\n\t" |
757 |
- "popf{l|d}\n\t" |
758 |
- "pushf{l|d}\n\t" |
759 |
- "pop{l}\t%0\n\t" |
760 |
- "popf{l|d}\n\t" |
761 |
- : "=&r" (__eax), "=&r" (__ebx) |
762 |
- : "i" (0x00200000)); |
763 |
-#else |
764 |
-/* Host GCCs older than 3.0 weren't supporting Intel asm syntax |
765 |
- nor alternatives in i386 code. */ |
766 |
- __asm__ ("pushfl\n\t" |
767 |
- "pushfl\n\t" |
768 |
- "popl\t%0\n\t" |
769 |
- "movl\t%0, %1\n\t" |
770 |
- "xorl\t%2, %0\n\t" |
771 |
- "pushl\t%0\n\t" |
772 |
- "popfl\n\t" |
773 |
- "pushfl\n\t" |
774 |
- "popl\t%0\n\t" |
775 |
- "popfl\n\t" |
776 |
- : "=&r" (__eax), "=&r" (__ebx) |
777 |
- : "i" (0x00200000)); |
778 |
-#endif |
779 |
- |
780 |
- if (!((__eax ^ __ebx) & 0x00200000)) |
781 |
- return 0; |
782 |
-#endif |
783 |
- |
784 |
- /* Host supports cpuid. Return highest supported cpuid input value. */ |
785 |
- __cpuid (__ext, __eax, __ebx, __ecx, __edx); |
786 |
- |
787 |
- if (__sig) |
788 |
- *__sig = __ebx; |
789 |
- |
790 |
- return __eax; |
791 |
-} |
792 |
- |
793 |
-/* Return cpuid data for requested cpuid level, as found in returned |
794 |
- eax, ebx, ecx and edx registers. The function checks if cpuid is |
795 |
- supported and returns 1 for valid cpuid information or 0 for |
796 |
- unsupported cpuid level. All pointers are required to be non-null. */ |
797 |
- |
798 |
-static __inline int |
799 |
-__get_cpuid (unsigned int __level, |
800 |
- unsigned int *__eax, unsigned int *__ebx, |
801 |
- unsigned int *__ecx, unsigned int *__edx) |
802 |
-{ |
803 |
- unsigned int __ext = __level & 0x80000000; |
804 |
- |
805 |
- if (__get_cpuid_max (__ext, 0) < __level) |
806 |
- return 0; |
807 |
- |
808 |
- __cpuid (__level, *__eax, *__ebx, *__ecx, *__edx); |
809 |
- return 1; |
810 |
-} |
811 |
- |
812 |
-#ifndef NOINLINE |
813 |
-#define NOINLINE __attribute__ ((noinline)) |
814 |
-#endif |
815 |
- |
816 |
-unsigned int i386_cpuid (void) NOINLINE; |
817 |
- |
818 |
-unsigned int NOINLINE |
819 |
-i386_cpuid (void) |
820 |
-{ |
821 |
- unsigned int eax, ebx, ecx, edx; |
822 |
- |
823 |
- if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx)) |
824 |
- return 0; |
825 |
- |
826 |
- return edx; |
827 |
-} |
828 |
diff --git a/gdb/testsuite/gdb.arch/i386-sse.c b/gdb/testsuite/gdb.arch/i386-sse.c |
829 |
index d431527..8617c8a 100644 |
830 |
--- a/gdb/testsuite/gdb.arch/i386-sse.c |
831 |
+++ b/gdb/testsuite/gdb.arch/i386-sse.c |
832 |
@@ -51,7 +51,10 @@ v4sf_t data[] = |
833 |
int |
834 |
have_sse (void) |
835 |
{ |
836 |
- int edx = i386_cpuid (); |
837 |
+ int edx; |
838 |
+ |
839 |
+ if (!i386_cpuid (1, NULL, NULL, NULL, &edx)) |
840 |
+ return 0; |
841 |
|
842 |
if (edx & bit_SSE) |
843 |
return 1; |
844 |
diff --git a/gdb/testsuite/gdb.arch/i386-sse.exp b/gdb/testsuite/gdb.arch/i386-sse.exp |
845 |
index 5923eca..c62a3a0 100644 |
846 |
--- a/gdb/testsuite/gdb.arch/i386-sse.exp |
847 |
+++ b/gdb/testsuite/gdb.arch/i386-sse.exp |
848 |
@@ -34,7 +34,7 @@ if [get_compiler_info] { |
849 |
|
850 |
set additional_flags "" |
851 |
if [test_compiler_info gcc*] { |
852 |
- set additional_flags "additional_flags=-msse" |
853 |
+ set additional_flags "additional_flags=-msse -I${srcdir}/../common" |
854 |
} |
855 |
|
856 |
if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${binfile}" executable [list debug $additional_flags]] != "" } { |
857 |
-- |
858 |
1.8.2.1 |
859 |
|
860 |
|
861 |
|
862 |
1.1 src/patchsets/gdb/7.6.1/README.history |
863 |
|
864 |
file : http://sources.gentoo.org/viewvc.cgi/gentoo/src/patchsets/gdb/7.6.1/README.history?rev=1.1&view=markup |
865 |
plain: http://sources.gentoo.org/viewvc.cgi/gentoo/src/patchsets/gdb/7.6.1/README.history?rev=1.1&content-type=text/plain |
866 |
|
867 |
Index: README.history |
868 |
=================================================================== |
869 |
1 02 Sep 2013 |
870 |
+ 05_all_readline-headers.patch |
871 |
+ 10_all_gdb-7.6-cpuid.patch |