1 |
commit: dc93dbc1a0e8814da2e5ae4a6f6d9e7bc83aabcc |
2 |
Author: Mike Pagano <mpagano <AT> gentoo <DOT> org> |
3 |
AuthorDate: Wed Apr 12 18:02:09 2017 +0000 |
4 |
Commit: Mike Pagano <mpagano <AT> gentoo <DOT> org> |
5 |
CommitDate: Wed Apr 12 18:02:09 2017 +0000 |
6 |
URL: https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=dc93dbc1 |
7 |
|
8 |
Linux patch 4.10.10 |
9 |
|
10 |
0000_README | 4 + |
11 |
1009_linux-4.10.10.patch | 4168 ++++++++++++++++++++++++++++++++++++++++++++++ |
12 |
2 files changed, 4172 insertions(+) |
13 |
|
14 |
diff --git a/0000_README b/0000_README |
15 |
index 5f8d5b0..abc6f43 100644 |
16 |
--- a/0000_README |
17 |
+++ b/0000_README |
18 |
@@ -79,6 +79,10 @@ Patch: 1008_linux-4.10.9.patch |
19 |
From: http://www.kernel.org |
20 |
Desc: Linux 4.10.9 |
21 |
|
22 |
+Patch: 1009_linux-4.10.10.patch |
23 |
+From: http://www.kernel.org |
24 |
+Desc: Linux 4.10.10 |
25 |
+ |
26 |
Patch: 1500_XATTR_USER_PREFIX.patch |
27 |
From: https://bugs.gentoo.org/show_bug.cgi?id=470644 |
28 |
Desc: Support for namespace user.pax.* on tmpfs. |
29 |
|
30 |
diff --git a/1009_linux-4.10.10.patch b/1009_linux-4.10.10.patch |
31 |
new file mode 100644 |
32 |
index 0000000..8380fc6 |
33 |
--- /dev/null |
34 |
+++ b/1009_linux-4.10.10.patch |
35 |
@@ -0,0 +1,4168 @@ |
36 |
+diff --git a/Documentation/devicetree/bindings/usb/usb-xhci.txt b/Documentation/devicetree/bindings/usb/usb-xhci.txt |
37 |
+index 0b7d8576001c..2d80b60eeabe 100644 |
38 |
+--- a/Documentation/devicetree/bindings/usb/usb-xhci.txt |
39 |
++++ b/Documentation/devicetree/bindings/usb/usb-xhci.txt |
40 |
+@@ -27,6 +27,7 @@ Required properties: |
41 |
+ Optional properties: |
42 |
+ - clocks: reference to a clock |
43 |
+ - usb3-lpm-capable: determines if platform is USB3 LPM capable |
44 |
++ - quirk-broken-port-ped: set if the controller has broken port disable mechanism |
45 |
+ |
46 |
+ Example: |
47 |
+ usb@f0931000 { |
48 |
+diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt |
49 |
+index 8f3d96af81d7..1f6e101e299a 100644 |
50 |
+--- a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt |
51 |
++++ b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt |
52 |
+@@ -6,10 +6,11 @@ occurred. |
53 |
+ |
54 |
+ Required properties: |
55 |
+ - compatible : should be one among the following |
56 |
+- (a) "samsung,s3c2410-wdt" for Exynos4 and previous SoCs |
57 |
+- (b) "samsung,exynos5250-wdt" for Exynos5250 |
58 |
+- (c) "samsung,exynos5420-wdt" for Exynos5420 |
59 |
+- (c) "samsung,exynos7-wdt" for Exynos7 |
60 |
++ - "samsung,s3c2410-wdt" for S3C2410 |
61 |
++ - "samsung,s3c6410-wdt" for S3C6410, S5PV210 and Exynos4 |
62 |
++ - "samsung,exynos5250-wdt" for Exynos5250 |
63 |
++ - "samsung,exynos5420-wdt" for Exynos5420 |
64 |
++ - "samsung,exynos7-wdt" for Exynos7 |
65 |
+ |
66 |
+ - reg : base physical address of the controller and length of memory mapped |
67 |
+ region. |
68 |
+diff --git a/Documentation/process/stable-kernel-rules.rst b/Documentation/process/stable-kernel-rules.rst |
69 |
+index 11ec2d93a5e0..61e9c78bd6d1 100644 |
70 |
+--- a/Documentation/process/stable-kernel-rules.rst |
71 |
++++ b/Documentation/process/stable-kernel-rules.rst |
72 |
+@@ -124,7 +124,7 @@ specified in the following format in the sign-off area: |
73 |
+ |
74 |
+ .. code-block:: none |
75 |
+ |
76 |
+- Cc: <stable@×××××××××××.org> # 3.3.x- |
77 |
++ Cc: <stable@×××××××××××.org> # 3.3.x |
78 |
+ |
79 |
+ The tag has the meaning of: |
80 |
+ |
81 |
+diff --git a/Makefile b/Makefile |
82 |
+index 4ebd511dee58..52858726495b 100644 |
83 |
+--- a/Makefile |
84 |
++++ b/Makefile |
85 |
+@@ -1,6 +1,6 @@ |
86 |
+ VERSION = 4 |
87 |
+ PATCHLEVEL = 10 |
88 |
+-SUBLEVEL = 9 |
89 |
++SUBLEVEL = 10 |
90 |
+ EXTRAVERSION = |
91 |
+ NAME = Fearless Coyote |
92 |
+ |
93 |
+@@ -370,7 +370,7 @@ LDFLAGS_MODULE = |
94 |
+ CFLAGS_KERNEL = |
95 |
+ AFLAGS_KERNEL = |
96 |
+ LDFLAGS_vmlinux = |
97 |
+-CFLAGS_GCOV = -fprofile-arcs -ftest-coverage -fno-tree-loop-im -Wno-maybe-uninitialized |
98 |
++CFLAGS_GCOV := -fprofile-arcs -ftest-coverage -fno-tree-loop-im $(call cc-disable-warning,maybe-uninitialized,) |
99 |
+ CFLAGS_KCOV := $(call cc-option,-fsanitize-coverage=trace-pc,) |
100 |
+ |
101 |
+ |
102 |
+@@ -651,6 +651,12 @@ KBUILD_CFLAGS += $(call cc-ifversion, -lt, 0409, \ |
103 |
+ # Tell gcc to never replace conditional load with a non-conditional one |
104 |
+ KBUILD_CFLAGS += $(call cc-option,--param=allow-store-data-races=0) |
105 |
+ |
106 |
++# check for 'asm goto' |
107 |
++ifeq ($(shell $(CONFIG_SHELL) $(srctree)/scripts/gcc-goto.sh $(CC) $(KBUILD_CFLAGS)), y) |
108 |
++ KBUILD_CFLAGS += -DCC_HAVE_ASM_GOTO |
109 |
++ KBUILD_AFLAGS += -DCC_HAVE_ASM_GOTO |
110 |
++endif |
111 |
++ |
112 |
+ include scripts/Makefile.gcc-plugins |
113 |
+ |
114 |
+ ifdef CONFIG_READABLE_ASM |
115 |
+@@ -796,12 +802,6 @@ KBUILD_CFLAGS += $(call cc-option,-Werror=incompatible-pointer-types) |
116 |
+ # use the deterministic mode of AR if available |
117 |
+ KBUILD_ARFLAGS := $(call ar-option,D) |
118 |
+ |
119 |
+-# check for 'asm goto' |
120 |
+-ifeq ($(shell $(CONFIG_SHELL) $(srctree)/scripts/gcc-goto.sh $(CC) $(KBUILD_CFLAGS)), y) |
121 |
+- KBUILD_CFLAGS += -DCC_HAVE_ASM_GOTO |
122 |
+- KBUILD_AFLAGS += -DCC_HAVE_ASM_GOTO |
123 |
+-endif |
124 |
+- |
125 |
+ include scripts/Makefile.kasan |
126 |
+ include scripts/Makefile.extrawarn |
127 |
+ include scripts/Makefile.ubsan |
128 |
+diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c |
129 |
+index 7e45f69a0ddc..8e8d20cdbce7 100644 |
130 |
+--- a/arch/arm/kernel/armksyms.c |
131 |
++++ b/arch/arm/kernel/armksyms.c |
132 |
+@@ -178,6 +178,6 @@ EXPORT_SYMBOL(__pv_offset); |
133 |
+ #endif |
134 |
+ |
135 |
+ #ifdef CONFIG_HAVE_ARM_SMCCC |
136 |
+-EXPORT_SYMBOL(arm_smccc_smc); |
137 |
+-EXPORT_SYMBOL(arm_smccc_hvc); |
138 |
++EXPORT_SYMBOL(__arm_smccc_smc); |
139 |
++EXPORT_SYMBOL(__arm_smccc_hvc); |
140 |
+ #endif |
141 |
+diff --git a/arch/arm/kernel/smccc-call.S b/arch/arm/kernel/smccc-call.S |
142 |
+index 2e48b674aab1..e5d43066b889 100644 |
143 |
+--- a/arch/arm/kernel/smccc-call.S |
144 |
++++ b/arch/arm/kernel/smccc-call.S |
145 |
+@@ -46,17 +46,19 @@ UNWIND( .fnend) |
146 |
+ /* |
147 |
+ * void smccc_smc(unsigned long a0, unsigned long a1, unsigned long a2, |
148 |
+ * unsigned long a3, unsigned long a4, unsigned long a5, |
149 |
+- * unsigned long a6, unsigned long a7, struct arm_smccc_res *res) |
150 |
++ * unsigned long a6, unsigned long a7, struct arm_smccc_res *res, |
151 |
++ * struct arm_smccc_quirk *quirk) |
152 |
+ */ |
153 |
+-ENTRY(arm_smccc_smc) |
154 |
++ENTRY(__arm_smccc_smc) |
155 |
+ SMCCC SMCCC_SMC |
156 |
+-ENDPROC(arm_smccc_smc) |
157 |
++ENDPROC(__arm_smccc_smc) |
158 |
+ |
159 |
+ /* |
160 |
+ * void smccc_hvc(unsigned long a0, unsigned long a1, unsigned long a2, |
161 |
+ * unsigned long a3, unsigned long a4, unsigned long a5, |
162 |
+- * unsigned long a6, unsigned long a7, struct arm_smccc_res *res) |
163 |
++ * unsigned long a6, unsigned long a7, struct arm_smccc_res *res, |
164 |
++ * struct arm_smccc_quirk *quirk) |
165 |
+ */ |
166 |
+-ENTRY(arm_smccc_hvc) |
167 |
++ENTRY(__arm_smccc_hvc) |
168 |
+ SMCCC SMCCC_HVC |
169 |
+-ENDPROC(arm_smccc_hvc) |
170 |
++ENDPROC(__arm_smccc_hvc) |
171 |
+diff --git a/arch/arm/kvm/mmu.c b/arch/arm/kvm/mmu.c |
172 |
+index a5265edbeeab..2fd5c135e8a4 100644 |
173 |
+--- a/arch/arm/kvm/mmu.c |
174 |
++++ b/arch/arm/kvm/mmu.c |
175 |
+@@ -292,11 +292,18 @@ static void unmap_stage2_range(struct kvm *kvm, phys_addr_t start, u64 size) |
176 |
+ phys_addr_t addr = start, end = start + size; |
177 |
+ phys_addr_t next; |
178 |
+ |
179 |
++ assert_spin_locked(&kvm->mmu_lock); |
180 |
+ pgd = kvm->arch.pgd + stage2_pgd_index(addr); |
181 |
+ do { |
182 |
+ next = stage2_pgd_addr_end(addr, end); |
183 |
+ if (!stage2_pgd_none(*pgd)) |
184 |
+ unmap_stage2_puds(kvm, pgd, addr, next); |
185 |
++ /* |
186 |
++ * If the range is too large, release the kvm->mmu_lock |
187 |
++ * to prevent starvation and lockup detector warnings. |
188 |
++ */ |
189 |
++ if (next != end) |
190 |
++ cond_resched_lock(&kvm->mmu_lock); |
191 |
+ } while (pgd++, addr = next, addr != end); |
192 |
+ } |
193 |
+ |
194 |
+@@ -803,6 +810,7 @@ void stage2_unmap_vm(struct kvm *kvm) |
195 |
+ int idx; |
196 |
+ |
197 |
+ idx = srcu_read_lock(&kvm->srcu); |
198 |
++ down_read(¤t->mm->mmap_sem); |
199 |
+ spin_lock(&kvm->mmu_lock); |
200 |
+ |
201 |
+ slots = kvm_memslots(kvm); |
202 |
+@@ -810,6 +818,7 @@ void stage2_unmap_vm(struct kvm *kvm) |
203 |
+ stage2_unmap_memslot(kvm, memslot); |
204 |
+ |
205 |
+ spin_unlock(&kvm->mmu_lock); |
206 |
++ up_read(¤t->mm->mmap_sem); |
207 |
+ srcu_read_unlock(&kvm->srcu, idx); |
208 |
+ } |
209 |
+ |
210 |
+@@ -829,7 +838,10 @@ void kvm_free_stage2_pgd(struct kvm *kvm) |
211 |
+ if (kvm->arch.pgd == NULL) |
212 |
+ return; |
213 |
+ |
214 |
++ spin_lock(&kvm->mmu_lock); |
215 |
+ unmap_stage2_range(kvm, 0, KVM_PHYS_SIZE); |
216 |
++ spin_unlock(&kvm->mmu_lock); |
217 |
++ |
218 |
+ /* Free the HW pgd, one page at a time */ |
219 |
+ free_pages_exact(kvm->arch.pgd, S2_PGD_SIZE); |
220 |
+ kvm->arch.pgd = NULL; |
221 |
+@@ -1804,6 +1816,7 @@ int kvm_arch_prepare_memory_region(struct kvm *kvm, |
222 |
+ (KVM_PHYS_SIZE >> PAGE_SHIFT)) |
223 |
+ return -EFAULT; |
224 |
+ |
225 |
++ down_read(¤t->mm->mmap_sem); |
226 |
+ /* |
227 |
+ * A memory region could potentially cover multiple VMAs, and any holes |
228 |
+ * between them, so iterate over all of them to find out if we can map |
229 |
+@@ -1847,8 +1860,10 @@ int kvm_arch_prepare_memory_region(struct kvm *kvm, |
230 |
+ pa += vm_start - vma->vm_start; |
231 |
+ |
232 |
+ /* IO region dirty page logging not allowed */ |
233 |
+- if (memslot->flags & KVM_MEM_LOG_DIRTY_PAGES) |
234 |
+- return -EINVAL; |
235 |
++ if (memslot->flags & KVM_MEM_LOG_DIRTY_PAGES) { |
236 |
++ ret = -EINVAL; |
237 |
++ goto out; |
238 |
++ } |
239 |
+ |
240 |
+ ret = kvm_phys_addr_ioremap(kvm, gpa, pa, |
241 |
+ vm_end - vm_start, |
242 |
+@@ -1860,7 +1875,7 @@ int kvm_arch_prepare_memory_region(struct kvm *kvm, |
243 |
+ } while (hva < reg_end); |
244 |
+ |
245 |
+ if (change == KVM_MR_FLAGS_ONLY) |
246 |
+- return ret; |
247 |
++ goto out; |
248 |
+ |
249 |
+ spin_lock(&kvm->mmu_lock); |
250 |
+ if (ret) |
251 |
+@@ -1868,6 +1883,8 @@ int kvm_arch_prepare_memory_region(struct kvm *kvm, |
252 |
+ else |
253 |
+ stage2_flush_memslot(kvm, memslot); |
254 |
+ spin_unlock(&kvm->mmu_lock); |
255 |
++out: |
256 |
++ up_read(¤t->mm->mmap_sem); |
257 |
+ return ret; |
258 |
+ } |
259 |
+ |
260 |
+diff --git a/arch/arm64/kernel/arm64ksyms.c b/arch/arm64/kernel/arm64ksyms.c |
261 |
+index 78f368039c79..e9c4dc9e0ada 100644 |
262 |
+--- a/arch/arm64/kernel/arm64ksyms.c |
263 |
++++ b/arch/arm64/kernel/arm64ksyms.c |
264 |
+@@ -73,5 +73,5 @@ NOKPROBE_SYMBOL(_mcount); |
265 |
+ #endif |
266 |
+ |
267 |
+ /* arm-smccc */ |
268 |
+-EXPORT_SYMBOL(arm_smccc_smc); |
269 |
+-EXPORT_SYMBOL(arm_smccc_hvc); |
270 |
++EXPORT_SYMBOL(__arm_smccc_smc); |
271 |
++EXPORT_SYMBOL(__arm_smccc_hvc); |
272 |
+diff --git a/arch/arm64/kernel/asm-offsets.c b/arch/arm64/kernel/asm-offsets.c |
273 |
+index bc049afc73a7..b3bb7ef97bc8 100644 |
274 |
+--- a/arch/arm64/kernel/asm-offsets.c |
275 |
++++ b/arch/arm64/kernel/asm-offsets.c |
276 |
+@@ -143,8 +143,11 @@ int main(void) |
277 |
+ DEFINE(SLEEP_STACK_DATA_SYSTEM_REGS, offsetof(struct sleep_stack_data, system_regs)); |
278 |
+ DEFINE(SLEEP_STACK_DATA_CALLEE_REGS, offsetof(struct sleep_stack_data, callee_saved_regs)); |
279 |
+ #endif |
280 |
+- DEFINE(ARM_SMCCC_RES_X0_OFFS, offsetof(struct arm_smccc_res, a0)); |
281 |
+- DEFINE(ARM_SMCCC_RES_X2_OFFS, offsetof(struct arm_smccc_res, a2)); |
282 |
++ DEFINE(ARM_SMCCC_RES_X0_OFFS, offsetof(struct arm_smccc_res, a0)); |
283 |
++ DEFINE(ARM_SMCCC_RES_X2_OFFS, offsetof(struct arm_smccc_res, a2)); |
284 |
++ DEFINE(ARM_SMCCC_QUIRK_ID_OFFS, offsetof(struct arm_smccc_quirk, id)); |
285 |
++ DEFINE(ARM_SMCCC_QUIRK_STATE_OFFS, offsetof(struct arm_smccc_quirk, state)); |
286 |
++ |
287 |
+ BLANK(); |
288 |
+ DEFINE(HIBERN_PBE_ORIG, offsetof(struct pbe, orig_address)); |
289 |
+ DEFINE(HIBERN_PBE_ADDR, offsetof(struct pbe, address)); |
290 |
+diff --git a/arch/arm64/kernel/smccc-call.S b/arch/arm64/kernel/smccc-call.S |
291 |
+index ae0496fa4235..62522342e1e4 100644 |
292 |
+--- a/arch/arm64/kernel/smccc-call.S |
293 |
++++ b/arch/arm64/kernel/smccc-call.S |
294 |
+@@ -12,6 +12,7 @@ |
295 |
+ * |
296 |
+ */ |
297 |
+ #include <linux/linkage.h> |
298 |
++#include <linux/arm-smccc.h> |
299 |
+ #include <asm/asm-offsets.h> |
300 |
+ |
301 |
+ .macro SMCCC instr |
302 |
+@@ -20,24 +21,32 @@ |
303 |
+ ldr x4, [sp] |
304 |
+ stp x0, x1, [x4, #ARM_SMCCC_RES_X0_OFFS] |
305 |
+ stp x2, x3, [x4, #ARM_SMCCC_RES_X2_OFFS] |
306 |
+- ret |
307 |
++ ldr x4, [sp, #8] |
308 |
++ cbz x4, 1f /* no quirk structure */ |
309 |
++ ldr x9, [x4, #ARM_SMCCC_QUIRK_ID_OFFS] |
310 |
++ cmp x9, #ARM_SMCCC_QUIRK_QCOM_A6 |
311 |
++ b.ne 1f |
312 |
++ str x6, [x4, ARM_SMCCC_QUIRK_STATE_OFFS] |
313 |
++1: ret |
314 |
+ .cfi_endproc |
315 |
+ .endm |
316 |
+ |
317 |
+ /* |
318 |
+ * void arm_smccc_smc(unsigned long a0, unsigned long a1, unsigned long a2, |
319 |
+ * unsigned long a3, unsigned long a4, unsigned long a5, |
320 |
+- * unsigned long a6, unsigned long a7, struct arm_smccc_res *res) |
321 |
++ * unsigned long a6, unsigned long a7, struct arm_smccc_res *res, |
322 |
++ * struct arm_smccc_quirk *quirk) |
323 |
+ */ |
324 |
+-ENTRY(arm_smccc_smc) |
325 |
++ENTRY(__arm_smccc_smc) |
326 |
+ SMCCC smc |
327 |
+-ENDPROC(arm_smccc_smc) |
328 |
++ENDPROC(__arm_smccc_smc) |
329 |
+ |
330 |
+ /* |
331 |
+ * void arm_smccc_hvc(unsigned long a0, unsigned long a1, unsigned long a2, |
332 |
+ * unsigned long a3, unsigned long a4, unsigned long a5, |
333 |
+- * unsigned long a6, unsigned long a7, struct arm_smccc_res *res) |
334 |
++ * unsigned long a6, unsigned long a7, struct arm_smccc_res *res, |
335 |
++ * struct arm_smccc_quirk *quirk) |
336 |
+ */ |
337 |
+-ENTRY(arm_smccc_hvc) |
338 |
++ENTRY(__arm_smccc_hvc) |
339 |
+ SMCCC hvc |
340 |
+-ENDPROC(arm_smccc_hvc) |
341 |
++ENDPROC(__arm_smccc_hvc) |
342 |
+diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c |
343 |
+index 156169c6981b..ed0f50b565c3 100644 |
344 |
+--- a/arch/arm64/mm/fault.c |
345 |
++++ b/arch/arm64/mm/fault.c |
346 |
+@@ -41,7 +41,20 @@ |
347 |
+ #include <asm/pgtable.h> |
348 |
+ #include <asm/tlbflush.h> |
349 |
+ |
350 |
+-static const char *fault_name(unsigned int esr); |
351 |
++struct fault_info { |
352 |
++ int (*fn)(unsigned long addr, unsigned int esr, |
353 |
++ struct pt_regs *regs); |
354 |
++ int sig; |
355 |
++ int code; |
356 |
++ const char *name; |
357 |
++}; |
358 |
++ |
359 |
++static const struct fault_info fault_info[]; |
360 |
++ |
361 |
++static inline const struct fault_info *esr_to_fault_info(unsigned int esr) |
362 |
++{ |
363 |
++ return fault_info + (esr & 63); |
364 |
++} |
365 |
+ |
366 |
+ #ifdef CONFIG_KPROBES |
367 |
+ static inline int notify_page_fault(struct pt_regs *regs, unsigned int esr) |
368 |
+@@ -196,10 +209,12 @@ static void __do_user_fault(struct task_struct *tsk, unsigned long addr, |
369 |
+ struct pt_regs *regs) |
370 |
+ { |
371 |
+ struct siginfo si; |
372 |
++ const struct fault_info *inf; |
373 |
+ |
374 |
+ if (unhandled_signal(tsk, sig) && show_unhandled_signals_ratelimited()) { |
375 |
++ inf = esr_to_fault_info(esr); |
376 |
+ pr_info("%s[%d]: unhandled %s (%d) at 0x%08lx, esr 0x%03x\n", |
377 |
+- tsk->comm, task_pid_nr(tsk), fault_name(esr), sig, |
378 |
++ tsk->comm, task_pid_nr(tsk), inf->name, sig, |
379 |
+ addr, esr); |
380 |
+ show_pte(tsk->mm, addr); |
381 |
+ show_regs(regs); |
382 |
+@@ -218,14 +233,16 @@ static void do_bad_area(unsigned long addr, unsigned int esr, struct pt_regs *re |
383 |
+ { |
384 |
+ struct task_struct *tsk = current; |
385 |
+ struct mm_struct *mm = tsk->active_mm; |
386 |
++ const struct fault_info *inf; |
387 |
+ |
388 |
+ /* |
389 |
+ * If we are in kernel mode at this point, we have no context to |
390 |
+ * handle this fault with. |
391 |
+ */ |
392 |
+- if (user_mode(regs)) |
393 |
+- __do_user_fault(tsk, addr, esr, SIGSEGV, SEGV_MAPERR, regs); |
394 |
+- else |
395 |
++ if (user_mode(regs)) { |
396 |
++ inf = esr_to_fault_info(esr); |
397 |
++ __do_user_fault(tsk, addr, esr, inf->sig, inf->code, regs); |
398 |
++ } else |
399 |
+ __do_kernel_fault(mm, addr, esr, regs); |
400 |
+ } |
401 |
+ |
402 |
+@@ -487,12 +504,7 @@ static int do_bad(unsigned long addr, unsigned int esr, struct pt_regs *regs) |
403 |
+ return 1; |
404 |
+ } |
405 |
+ |
406 |
+-static const struct fault_info { |
407 |
+- int (*fn)(unsigned long addr, unsigned int esr, struct pt_regs *regs); |
408 |
+- int sig; |
409 |
+- int code; |
410 |
+- const char *name; |
411 |
+-} fault_info[] = { |
412 |
++static const struct fault_info fault_info[] = { |
413 |
+ { do_bad, SIGBUS, 0, "ttbr address size fault" }, |
414 |
+ { do_bad, SIGBUS, 0, "level 1 address size fault" }, |
415 |
+ { do_bad, SIGBUS, 0, "level 2 address size fault" }, |
416 |
+@@ -559,19 +571,13 @@ static const struct fault_info { |
417 |
+ { do_bad, SIGBUS, 0, "unknown 63" }, |
418 |
+ }; |
419 |
+ |
420 |
+-static const char *fault_name(unsigned int esr) |
421 |
+-{ |
422 |
+- const struct fault_info *inf = fault_info + (esr & 63); |
423 |
+- return inf->name; |
424 |
+-} |
425 |
+- |
426 |
+ /* |
427 |
+ * Dispatch a data abort to the relevant handler. |
428 |
+ */ |
429 |
+ asmlinkage void __exception do_mem_abort(unsigned long addr, unsigned int esr, |
430 |
+ struct pt_regs *regs) |
431 |
+ { |
432 |
+- const struct fault_info *inf = fault_info + (esr & 63); |
433 |
++ const struct fault_info *inf = esr_to_fault_info(esr); |
434 |
+ struct siginfo info; |
435 |
+ |
436 |
+ if (!inf->fn(addr, esr, regs)) |
437 |
+diff --git a/arch/metag/include/asm/uaccess.h b/arch/metag/include/asm/uaccess.h |
438 |
+index 273e61225c27..07238b39638c 100644 |
439 |
+--- a/arch/metag/include/asm/uaccess.h |
440 |
++++ b/arch/metag/include/asm/uaccess.h |
441 |
+@@ -197,20 +197,21 @@ extern long __must_check strnlen_user(const char __user *src, long count); |
442 |
+ |
443 |
+ #define strlen_user(str) strnlen_user(str, 32767) |
444 |
+ |
445 |
+-extern unsigned long __must_check __copy_user_zeroing(void *to, |
446 |
+- const void __user *from, |
447 |
+- unsigned long n); |
448 |
++extern unsigned long raw_copy_from_user(void *to, const void __user *from, |
449 |
++ unsigned long n); |
450 |
+ |
451 |
+ static inline unsigned long |
452 |
+ copy_from_user(void *to, const void __user *from, unsigned long n) |
453 |
+ { |
454 |
++ unsigned long res = n; |
455 |
+ if (likely(access_ok(VERIFY_READ, from, n))) |
456 |
+- return __copy_user_zeroing(to, from, n); |
457 |
+- memset(to, 0, n); |
458 |
+- return n; |
459 |
++ res = raw_copy_from_user(to, from, n); |
460 |
++ if (unlikely(res)) |
461 |
++ memset(to + (n - res), 0, res); |
462 |
++ return res; |
463 |
+ } |
464 |
+ |
465 |
+-#define __copy_from_user(to, from, n) __copy_user_zeroing(to, from, n) |
466 |
++#define __copy_from_user(to, from, n) raw_copy_from_user(to, from, n) |
467 |
+ #define __copy_from_user_inatomic __copy_from_user |
468 |
+ |
469 |
+ extern unsigned long __must_check __copy_user(void __user *to, |
470 |
+diff --git a/arch/metag/lib/usercopy.c b/arch/metag/lib/usercopy.c |
471 |
+index b3ebfe9c8e88..2792fc621088 100644 |
472 |
+--- a/arch/metag/lib/usercopy.c |
473 |
++++ b/arch/metag/lib/usercopy.c |
474 |
+@@ -29,7 +29,6 @@ |
475 |
+ COPY \ |
476 |
+ "1:\n" \ |
477 |
+ " .section .fixup,\"ax\"\n" \ |
478 |
+- " MOV D1Ar1,#0\n" \ |
479 |
+ FIXUP \ |
480 |
+ " MOVT D1Ar1,#HI(1b)\n" \ |
481 |
+ " JUMP D1Ar1,#LO(1b)\n" \ |
482 |
+@@ -260,27 +259,31 @@ |
483 |
+ "MGETL D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \ |
484 |
+ "22:\n" \ |
485 |
+ "MSETL [%0++], D0FrT, D0.5, D0.6, D0.7\n" \ |
486 |
+- "SUB %3, %3, #32\n" \ |
487 |
+ "23:\n" \ |
488 |
+- "MGETL D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \ |
489 |
++ "SUB %3, %3, #32\n" \ |
490 |
+ "24:\n" \ |
491 |
++ "MGETL D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \ |
492 |
++ "25:\n" \ |
493 |
+ "MSETL [%0++], D0FrT, D0.5, D0.6, D0.7\n" \ |
494 |
++ "26:\n" \ |
495 |
+ "SUB %3, %3, #32\n" \ |
496 |
+ "DCACHE [%1+#-64], D0Ar6\n" \ |
497 |
+ "BR $Lloop"id"\n" \ |
498 |
+ \ |
499 |
+ "MOV RAPF, %1\n" \ |
500 |
+- "25:\n" \ |
501 |
++ "27:\n" \ |
502 |
+ "MGETL D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \ |
503 |
+- "26:\n" \ |
504 |
++ "28:\n" \ |
505 |
+ "MSETL [%0++], D0FrT, D0.5, D0.6, D0.7\n" \ |
506 |
++ "29:\n" \ |
507 |
+ "SUB %3, %3, #32\n" \ |
508 |
+- "27:\n" \ |
509 |
++ "30:\n" \ |
510 |
+ "MGETL D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \ |
511 |
+- "28:\n" \ |
512 |
++ "31:\n" \ |
513 |
+ "MSETL [%0++], D0FrT, D0.5, D0.6, D0.7\n" \ |
514 |
++ "32:\n" \ |
515 |
+ "SUB %0, %0, #8\n" \ |
516 |
+- "29:\n" \ |
517 |
++ "33:\n" \ |
518 |
+ "SETL [%0++], D0.7, D1.7\n" \ |
519 |
+ "SUB %3, %3, #32\n" \ |
520 |
+ "1:" \ |
521 |
+@@ -312,11 +315,15 @@ |
522 |
+ " .long 26b,3b\n" \ |
523 |
+ " .long 27b,3b\n" \ |
524 |
+ " .long 28b,3b\n" \ |
525 |
+- " .long 29b,4b\n" \ |
526 |
++ " .long 29b,3b\n" \ |
527 |
++ " .long 30b,3b\n" \ |
528 |
++ " .long 31b,3b\n" \ |
529 |
++ " .long 32b,3b\n" \ |
530 |
++ " .long 33b,4b\n" \ |
531 |
+ " .previous\n" \ |
532 |
+ : "=r" (to), "=r" (from), "=r" (ret), "=d" (n) \ |
533 |
+ : "0" (to), "1" (from), "2" (ret), "3" (n) \ |
534 |
+- : "D1Ar1", "D0Ar2", "memory") |
535 |
++ : "D1Ar1", "D0Ar2", "cc", "memory") |
536 |
+ |
537 |
+ /* rewind 'to' and 'from' pointers when a fault occurs |
538 |
+ * |
539 |
+@@ -342,7 +349,7 @@ |
540 |
+ #define __asm_copy_to_user_64bit_rapf_loop(to, from, ret, n, id)\ |
541 |
+ __asm_copy_user_64bit_rapf_loop(to, from, ret, n, id, \ |
542 |
+ "LSR D0Ar2, D0Ar2, #8\n" \ |
543 |
+- "AND D0Ar2, D0Ar2, #0x7\n" \ |
544 |
++ "ANDS D0Ar2, D0Ar2, #0x7\n" \ |
545 |
+ "ADDZ D0Ar2, D0Ar2, #4\n" \ |
546 |
+ "SUB D0Ar2, D0Ar2, #1\n" \ |
547 |
+ "MOV D1Ar1, #4\n" \ |
548 |
+@@ -403,47 +410,55 @@ |
549 |
+ "MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \ |
550 |
+ "22:\n" \ |
551 |
+ "MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \ |
552 |
+- "SUB %3, %3, #16\n" \ |
553 |
+ "23:\n" \ |
554 |
+- "MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \ |
555 |
+- "24:\n" \ |
556 |
+- "MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \ |
557 |
+ "SUB %3, %3, #16\n" \ |
558 |
+- "25:\n" \ |
559 |
++ "24:\n" \ |
560 |
+ "MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \ |
561 |
+- "26:\n" \ |
562 |
++ "25:\n" \ |
563 |
+ "MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \ |
564 |
++ "26:\n" \ |
565 |
+ "SUB %3, %3, #16\n" \ |
566 |
+ "27:\n" \ |
567 |
+ "MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \ |
568 |
+ "28:\n" \ |
569 |
+ "MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \ |
570 |
++ "29:\n" \ |
571 |
++ "SUB %3, %3, #16\n" \ |
572 |
++ "30:\n" \ |
573 |
++ "MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \ |
574 |
++ "31:\n" \ |
575 |
++ "MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \ |
576 |
++ "32:\n" \ |
577 |
+ "SUB %3, %3, #16\n" \ |
578 |
+ "DCACHE [%1+#-64], D0Ar6\n" \ |
579 |
+ "BR $Lloop"id"\n" \ |
580 |
+ \ |
581 |
+ "MOV RAPF, %1\n" \ |
582 |
+- "29:\n" \ |
583 |
++ "33:\n" \ |
584 |
+ "MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \ |
585 |
+- "30:\n" \ |
586 |
++ "34:\n" \ |
587 |
+ "MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \ |
588 |
++ "35:\n" \ |
589 |
+ "SUB %3, %3, #16\n" \ |
590 |
+- "31:\n" \ |
591 |
++ "36:\n" \ |
592 |
+ "MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \ |
593 |
+- "32:\n" \ |
594 |
++ "37:\n" \ |
595 |
+ "MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \ |
596 |
++ "38:\n" \ |
597 |
+ "SUB %3, %3, #16\n" \ |
598 |
+- "33:\n" \ |
599 |
++ "39:\n" \ |
600 |
+ "MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \ |
601 |
+- "34:\n" \ |
602 |
++ "40:\n" \ |
603 |
+ "MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \ |
604 |
++ "41:\n" \ |
605 |
+ "SUB %3, %3, #16\n" \ |
606 |
+- "35:\n" \ |
607 |
++ "42:\n" \ |
608 |
+ "MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \ |
609 |
+- "36:\n" \ |
610 |
++ "43:\n" \ |
611 |
+ "MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \ |
612 |
++ "44:\n" \ |
613 |
+ "SUB %0, %0, #4\n" \ |
614 |
+- "37:\n" \ |
615 |
++ "45:\n" \ |
616 |
+ "SETD [%0++], D0.7\n" \ |
617 |
+ "SUB %3, %3, #16\n" \ |
618 |
+ "1:" \ |
619 |
+@@ -483,11 +498,19 @@ |
620 |
+ " .long 34b,3b\n" \ |
621 |
+ " .long 35b,3b\n" \ |
622 |
+ " .long 36b,3b\n" \ |
623 |
+- " .long 37b,4b\n" \ |
624 |
++ " .long 37b,3b\n" \ |
625 |
++ " .long 38b,3b\n" \ |
626 |
++ " .long 39b,3b\n" \ |
627 |
++ " .long 40b,3b\n" \ |
628 |
++ " .long 41b,3b\n" \ |
629 |
++ " .long 42b,3b\n" \ |
630 |
++ " .long 43b,3b\n" \ |
631 |
++ " .long 44b,3b\n" \ |
632 |
++ " .long 45b,4b\n" \ |
633 |
+ " .previous\n" \ |
634 |
+ : "=r" (to), "=r" (from), "=r" (ret), "=d" (n) \ |
635 |
+ : "0" (to), "1" (from), "2" (ret), "3" (n) \ |
636 |
+- : "D1Ar1", "D0Ar2", "memory") |
637 |
++ : "D1Ar1", "D0Ar2", "cc", "memory") |
638 |
+ |
639 |
+ /* rewind 'to' and 'from' pointers when a fault occurs |
640 |
+ * |
641 |
+@@ -513,7 +536,7 @@ |
642 |
+ #define __asm_copy_to_user_32bit_rapf_loop(to, from, ret, n, id)\ |
643 |
+ __asm_copy_user_32bit_rapf_loop(to, from, ret, n, id, \ |
644 |
+ "LSR D0Ar2, D0Ar2, #8\n" \ |
645 |
+- "AND D0Ar2, D0Ar2, #0x7\n" \ |
646 |
++ "ANDS D0Ar2, D0Ar2, #0x7\n" \ |
647 |
+ "ADDZ D0Ar2, D0Ar2, #4\n" \ |
648 |
+ "SUB D0Ar2, D0Ar2, #1\n" \ |
649 |
+ "MOV D1Ar1, #4\n" \ |
650 |
+@@ -538,23 +561,31 @@ unsigned long __copy_user(void __user *pdst, const void *psrc, |
651 |
+ if ((unsigned long) src & 1) { |
652 |
+ __asm_copy_to_user_1(dst, src, retn); |
653 |
+ n--; |
654 |
++ if (retn) |
655 |
++ return retn + n; |
656 |
+ } |
657 |
+ if ((unsigned long) dst & 1) { |
658 |
+ /* Worst case - byte copy */ |
659 |
+ while (n > 0) { |
660 |
+ __asm_copy_to_user_1(dst, src, retn); |
661 |
+ n--; |
662 |
++ if (retn) |
663 |
++ return retn + n; |
664 |
+ } |
665 |
+ } |
666 |
+ if (((unsigned long) src & 2) && n >= 2) { |
667 |
+ __asm_copy_to_user_2(dst, src, retn); |
668 |
+ n -= 2; |
669 |
++ if (retn) |
670 |
++ return retn + n; |
671 |
+ } |
672 |
+ if ((unsigned long) dst & 2) { |
673 |
+ /* Second worst case - word copy */ |
674 |
+ while (n >= 2) { |
675 |
+ __asm_copy_to_user_2(dst, src, retn); |
676 |
+ n -= 2; |
677 |
++ if (retn) |
678 |
++ return retn + n; |
679 |
+ } |
680 |
+ } |
681 |
+ |
682 |
+@@ -569,6 +600,8 @@ unsigned long __copy_user(void __user *pdst, const void *psrc, |
683 |
+ while (n >= 8) { |
684 |
+ __asm_copy_to_user_8x64(dst, src, retn); |
685 |
+ n -= 8; |
686 |
++ if (retn) |
687 |
++ return retn + n; |
688 |
+ } |
689 |
+ } |
690 |
+ if (n >= RAPF_MIN_BUF_SIZE) { |
691 |
+@@ -581,6 +614,8 @@ unsigned long __copy_user(void __user *pdst, const void *psrc, |
692 |
+ while (n >= 8) { |
693 |
+ __asm_copy_to_user_8x64(dst, src, retn); |
694 |
+ n -= 8; |
695 |
++ if (retn) |
696 |
++ return retn + n; |
697 |
+ } |
698 |
+ } |
699 |
+ #endif |
700 |
+@@ -588,11 +623,15 @@ unsigned long __copy_user(void __user *pdst, const void *psrc, |
701 |
+ while (n >= 16) { |
702 |
+ __asm_copy_to_user_16(dst, src, retn); |
703 |
+ n -= 16; |
704 |
++ if (retn) |
705 |
++ return retn + n; |
706 |
+ } |
707 |
+ |
708 |
+ while (n >= 4) { |
709 |
+ __asm_copy_to_user_4(dst, src, retn); |
710 |
+ n -= 4; |
711 |
++ if (retn) |
712 |
++ return retn + n; |
713 |
+ } |
714 |
+ |
715 |
+ switch (n) { |
716 |
+@@ -609,6 +648,10 @@ unsigned long __copy_user(void __user *pdst, const void *psrc, |
717 |
+ break; |
718 |
+ } |
719 |
+ |
720 |
++ /* |
721 |
++ * If we get here, retn correctly reflects the number of failing |
722 |
++ * bytes. |
723 |
++ */ |
724 |
+ return retn; |
725 |
+ } |
726 |
+ EXPORT_SYMBOL(__copy_user); |
727 |
+@@ -617,16 +660,14 @@ EXPORT_SYMBOL(__copy_user); |
728 |
+ __asm_copy_user_cont(to, from, ret, \ |
729 |
+ " GETB D1Ar1,[%1++]\n" \ |
730 |
+ "2: SETB [%0++],D1Ar1\n", \ |
731 |
+- "3: ADD %2,%2,#1\n" \ |
732 |
+- " SETB [%0++],D1Ar1\n", \ |
733 |
++ "3: ADD %2,%2,#1\n", \ |
734 |
+ " .long 2b,3b\n") |
735 |
+ |
736 |
+ #define __asm_copy_from_user_2x_cont(to, from, ret, COPY, FIXUP, TENTRY) \ |
737 |
+ __asm_copy_user_cont(to, from, ret, \ |
738 |
+ " GETW D1Ar1,[%1++]\n" \ |
739 |
+ "2: SETW [%0++],D1Ar1\n" COPY, \ |
740 |
+- "3: ADD %2,%2,#2\n" \ |
741 |
+- " SETW [%0++],D1Ar1\n" FIXUP, \ |
742 |
++ "3: ADD %2,%2,#2\n" FIXUP, \ |
743 |
+ " .long 2b,3b\n" TENTRY) |
744 |
+ |
745 |
+ #define __asm_copy_from_user_2(to, from, ret) \ |
746 |
+@@ -636,145 +677,26 @@ EXPORT_SYMBOL(__copy_user); |
747 |
+ __asm_copy_from_user_2x_cont(to, from, ret, \ |
748 |
+ " GETB D1Ar1,[%1++]\n" \ |
749 |
+ "4: SETB [%0++],D1Ar1\n", \ |
750 |
+- "5: ADD %2,%2,#1\n" \ |
751 |
+- " SETB [%0++],D1Ar1\n", \ |
752 |
++ "5: ADD %2,%2,#1\n", \ |
753 |
+ " .long 4b,5b\n") |
754 |
+ |
755 |
+ #define __asm_copy_from_user_4x_cont(to, from, ret, COPY, FIXUP, TENTRY) \ |
756 |
+ __asm_copy_user_cont(to, from, ret, \ |
757 |
+ " GETD D1Ar1,[%1++]\n" \ |
758 |
+ "2: SETD [%0++],D1Ar1\n" COPY, \ |
759 |
+- "3: ADD %2,%2,#4\n" \ |
760 |
+- " SETD [%0++],D1Ar1\n" FIXUP, \ |
761 |
++ "3: ADD %2,%2,#4\n" FIXUP, \ |
762 |
+ " .long 2b,3b\n" TENTRY) |
763 |
+ |
764 |
+ #define __asm_copy_from_user_4(to, from, ret) \ |
765 |
+ __asm_copy_from_user_4x_cont(to, from, ret, "", "", "") |
766 |
+ |
767 |
+-#define __asm_copy_from_user_5(to, from, ret) \ |
768 |
+- __asm_copy_from_user_4x_cont(to, from, ret, \ |
769 |
+- " GETB D1Ar1,[%1++]\n" \ |
770 |
+- "4: SETB [%0++],D1Ar1\n", \ |
771 |
+- "5: ADD %2,%2,#1\n" \ |
772 |
+- " SETB [%0++],D1Ar1\n", \ |
773 |
+- " .long 4b,5b\n") |
774 |
+- |
775 |
+-#define __asm_copy_from_user_6x_cont(to, from, ret, COPY, FIXUP, TENTRY) \ |
776 |
+- __asm_copy_from_user_4x_cont(to, from, ret, \ |
777 |
+- " GETW D1Ar1,[%1++]\n" \ |
778 |
+- "4: SETW [%0++],D1Ar1\n" COPY, \ |
779 |
+- "5: ADD %2,%2,#2\n" \ |
780 |
+- " SETW [%0++],D1Ar1\n" FIXUP, \ |
781 |
+- " .long 4b,5b\n" TENTRY) |
782 |
+- |
783 |
+-#define __asm_copy_from_user_6(to, from, ret) \ |
784 |
+- __asm_copy_from_user_6x_cont(to, from, ret, "", "", "") |
785 |
+- |
786 |
+-#define __asm_copy_from_user_7(to, from, ret) \ |
787 |
+- __asm_copy_from_user_6x_cont(to, from, ret, \ |
788 |
+- " GETB D1Ar1,[%1++]\n" \ |
789 |
+- "6: SETB [%0++],D1Ar1\n", \ |
790 |
+- "7: ADD %2,%2,#1\n" \ |
791 |
+- " SETB [%0++],D1Ar1\n", \ |
792 |
+- " .long 6b,7b\n") |
793 |
+- |
794 |
+-#define __asm_copy_from_user_8x_cont(to, from, ret, COPY, FIXUP, TENTRY) \ |
795 |
+- __asm_copy_from_user_4x_cont(to, from, ret, \ |
796 |
+- " GETD D1Ar1,[%1++]\n" \ |
797 |
+- "4: SETD [%0++],D1Ar1\n" COPY, \ |
798 |
+- "5: ADD %2,%2,#4\n" \ |
799 |
+- " SETD [%0++],D1Ar1\n" FIXUP, \ |
800 |
+- " .long 4b,5b\n" TENTRY) |
801 |
+- |
802 |
+-#define __asm_copy_from_user_8(to, from, ret) \ |
803 |
+- __asm_copy_from_user_8x_cont(to, from, ret, "", "", "") |
804 |
+- |
805 |
+-#define __asm_copy_from_user_9(to, from, ret) \ |
806 |
+- __asm_copy_from_user_8x_cont(to, from, ret, \ |
807 |
+- " GETB D1Ar1,[%1++]\n" \ |
808 |
+- "6: SETB [%0++],D1Ar1\n", \ |
809 |
+- "7: ADD %2,%2,#1\n" \ |
810 |
+- " SETB [%0++],D1Ar1\n", \ |
811 |
+- " .long 6b,7b\n") |
812 |
+- |
813 |
+-#define __asm_copy_from_user_10x_cont(to, from, ret, COPY, FIXUP, TENTRY) \ |
814 |
+- __asm_copy_from_user_8x_cont(to, from, ret, \ |
815 |
+- " GETW D1Ar1,[%1++]\n" \ |
816 |
+- "6: SETW [%0++],D1Ar1\n" COPY, \ |
817 |
+- "7: ADD %2,%2,#2\n" \ |
818 |
+- " SETW [%0++],D1Ar1\n" FIXUP, \ |
819 |
+- " .long 6b,7b\n" TENTRY) |
820 |
+- |
821 |
+-#define __asm_copy_from_user_10(to, from, ret) \ |
822 |
+- __asm_copy_from_user_10x_cont(to, from, ret, "", "", "") |
823 |
+- |
824 |
+-#define __asm_copy_from_user_11(to, from, ret) \ |
825 |
+- __asm_copy_from_user_10x_cont(to, from, ret, \ |
826 |
+- " GETB D1Ar1,[%1++]\n" \ |
827 |
+- "8: SETB [%0++],D1Ar1\n", \ |
828 |
+- "9: ADD %2,%2,#1\n" \ |
829 |
+- " SETB [%0++],D1Ar1\n", \ |
830 |
+- " .long 8b,9b\n") |
831 |
+- |
832 |
+-#define __asm_copy_from_user_12x_cont(to, from, ret, COPY, FIXUP, TENTRY) \ |
833 |
+- __asm_copy_from_user_8x_cont(to, from, ret, \ |
834 |
+- " GETD D1Ar1,[%1++]\n" \ |
835 |
+- "6: SETD [%0++],D1Ar1\n" COPY, \ |
836 |
+- "7: ADD %2,%2,#4\n" \ |
837 |
+- " SETD [%0++],D1Ar1\n" FIXUP, \ |
838 |
+- " .long 6b,7b\n" TENTRY) |
839 |
+- |
840 |
+-#define __asm_copy_from_user_12(to, from, ret) \ |
841 |
+- __asm_copy_from_user_12x_cont(to, from, ret, "", "", "") |
842 |
+- |
843 |
+-#define __asm_copy_from_user_13(to, from, ret) \ |
844 |
+- __asm_copy_from_user_12x_cont(to, from, ret, \ |
845 |
+- " GETB D1Ar1,[%1++]\n" \ |
846 |
+- "8: SETB [%0++],D1Ar1\n", \ |
847 |
+- "9: ADD %2,%2,#1\n" \ |
848 |
+- " SETB [%0++],D1Ar1\n", \ |
849 |
+- " .long 8b,9b\n") |
850 |
+- |
851 |
+-#define __asm_copy_from_user_14x_cont(to, from, ret, COPY, FIXUP, TENTRY) \ |
852 |
+- __asm_copy_from_user_12x_cont(to, from, ret, \ |
853 |
+- " GETW D1Ar1,[%1++]\n" \ |
854 |
+- "8: SETW [%0++],D1Ar1\n" COPY, \ |
855 |
+- "9: ADD %2,%2,#2\n" \ |
856 |
+- " SETW [%0++],D1Ar1\n" FIXUP, \ |
857 |
+- " .long 8b,9b\n" TENTRY) |
858 |
+- |
859 |
+-#define __asm_copy_from_user_14(to, from, ret) \ |
860 |
+- __asm_copy_from_user_14x_cont(to, from, ret, "", "", "") |
861 |
+- |
862 |
+-#define __asm_copy_from_user_15(to, from, ret) \ |
863 |
+- __asm_copy_from_user_14x_cont(to, from, ret, \ |
864 |
+- " GETB D1Ar1,[%1++]\n" \ |
865 |
+- "10: SETB [%0++],D1Ar1\n", \ |
866 |
+- "11: ADD %2,%2,#1\n" \ |
867 |
+- " SETB [%0++],D1Ar1\n", \ |
868 |
+- " .long 10b,11b\n") |
869 |
+- |
870 |
+-#define __asm_copy_from_user_16x_cont(to, from, ret, COPY, FIXUP, TENTRY) \ |
871 |
+- __asm_copy_from_user_12x_cont(to, from, ret, \ |
872 |
+- " GETD D1Ar1,[%1++]\n" \ |
873 |
+- "8: SETD [%0++],D1Ar1\n" COPY, \ |
874 |
+- "9: ADD %2,%2,#4\n" \ |
875 |
+- " SETD [%0++],D1Ar1\n" FIXUP, \ |
876 |
+- " .long 8b,9b\n" TENTRY) |
877 |
+- |
878 |
+-#define __asm_copy_from_user_16(to, from, ret) \ |
879 |
+- __asm_copy_from_user_16x_cont(to, from, ret, "", "", "") |
880 |
+- |
881 |
+ #define __asm_copy_from_user_8x64(to, from, ret) \ |
882 |
+ asm volatile ( \ |
883 |
+ " GETL D0Ar2,D1Ar1,[%1++]\n" \ |
884 |
+ "2: SETL [%0++],D0Ar2,D1Ar1\n" \ |
885 |
+ "1:\n" \ |
886 |
+ " .section .fixup,\"ax\"\n" \ |
887 |
+- " MOV D1Ar1,#0\n" \ |
888 |
+- " MOV D0Ar2,#0\n" \ |
889 |
+ "3: ADD %2,%2,#8\n" \ |
890 |
+- " SETL [%0++],D0Ar2,D1Ar1\n" \ |
891 |
+ " MOVT D0Ar2,#HI(1b)\n" \ |
892 |
+ " JUMP D0Ar2,#LO(1b)\n" \ |
893 |
+ " .previous\n" \ |
894 |
+@@ -789,36 +711,57 @@ EXPORT_SYMBOL(__copy_user); |
895 |
+ * |
896 |
+ * Rationale: |
897 |
+ * A fault occurs while reading from user buffer, which is the |
898 |
+- * source. Since the fault is at a single address, we only |
899 |
+- * need to rewind by 8 bytes. |
900 |
++ * source. |
901 |
+ * Since we don't write to kernel buffer until we read first, |
902 |
+ * the kernel buffer is at the right state and needn't be |
903 |
+- * corrected. |
904 |
++ * corrected, but the source must be rewound to the beginning of |
905 |
++ * the block, which is LSM_STEP*8 bytes. |
906 |
++ * LSM_STEP is bits 10:8 in TXSTATUS which is already read |
907 |
++ * and stored in D0Ar2 |
908 |
++ * |
909 |
++ * NOTE: If a fault occurs at the last operation in M{G,S}ETL |
910 |
++ * LSM_STEP will be 0. ie: we do 4 writes in our case, if |
911 |
++ * a fault happens at the 4th write, LSM_STEP will be 0 |
912 |
++ * instead of 4. The code copes with that. |
913 |
+ */ |
914 |
+ #define __asm_copy_from_user_64bit_rapf_loop(to, from, ret, n, id) \ |
915 |
+ __asm_copy_user_64bit_rapf_loop(to, from, ret, n, id, \ |
916 |
+- "SUB %1, %1, #8\n") |
917 |
++ "LSR D0Ar2, D0Ar2, #5\n" \ |
918 |
++ "ANDS D0Ar2, D0Ar2, #0x38\n" \ |
919 |
++ "ADDZ D0Ar2, D0Ar2, #32\n" \ |
920 |
++ "SUB %1, %1, D0Ar2\n") |
921 |
+ |
922 |
+ /* rewind 'from' pointer when a fault occurs |
923 |
+ * |
924 |
+ * Rationale: |
925 |
+ * A fault occurs while reading from user buffer, which is the |
926 |
+- * source. Since the fault is at a single address, we only |
927 |
+- * need to rewind by 4 bytes. |
928 |
++ * source. |
929 |
+ * Since we don't write to kernel buffer until we read first, |
930 |
+ * the kernel buffer is at the right state and needn't be |
931 |
+- * corrected. |
932 |
++ * corrected, but the source must be rewound to the beginning of |
933 |
++ * the block, which is LSM_STEP*4 bytes. |
934 |
++ * LSM_STEP is bits 10:8 in TXSTATUS which is already read |
935 |
++ * and stored in D0Ar2 |
936 |
++ * |
937 |
++ * NOTE: If a fault occurs at the last operation in M{G,S}ETL |
938 |
++ * LSM_STEP will be 0. ie: we do 4 writes in our case, if |
939 |
++ * a fault happens at the 4th write, LSM_STEP will be 0 |
940 |
++ * instead of 4. The code copes with that. |
941 |
+ */ |
942 |
+ #define __asm_copy_from_user_32bit_rapf_loop(to, from, ret, n, id) \ |
943 |
+ __asm_copy_user_32bit_rapf_loop(to, from, ret, n, id, \ |
944 |
+- "SUB %1, %1, #4\n") |
945 |
++ "LSR D0Ar2, D0Ar2, #6\n" \ |
946 |
++ "ANDS D0Ar2, D0Ar2, #0x1c\n" \ |
947 |
++ "ADDZ D0Ar2, D0Ar2, #16\n" \ |
948 |
++ "SUB %1, %1, D0Ar2\n") |
949 |
+ |
950 |
+ |
951 |
+-/* Copy from user to kernel, zeroing the bytes that were inaccessible in |
952 |
+- userland. The return-value is the number of bytes that were |
953 |
+- inaccessible. */ |
954 |
+-unsigned long __copy_user_zeroing(void *pdst, const void __user *psrc, |
955 |
+- unsigned long n) |
956 |
++/* |
957 |
++ * Copy from user to kernel. The return-value is the number of bytes that were |
958 |
++ * inaccessible. |
959 |
++ */ |
960 |
++unsigned long raw_copy_from_user(void *pdst, const void __user *psrc, |
961 |
++ unsigned long n) |
962 |
+ { |
963 |
+ register char *dst asm ("A0.2") = pdst; |
964 |
+ register const char __user *src asm ("A1.2") = psrc; |
965 |
+@@ -830,6 +773,8 @@ unsigned long __copy_user_zeroing(void *pdst, const void __user *psrc, |
966 |
+ if ((unsigned long) src & 1) { |
967 |
+ __asm_copy_from_user_1(dst, src, retn); |
968 |
+ n--; |
969 |
++ if (retn) |
970 |
++ return retn + n; |
971 |
+ } |
972 |
+ if ((unsigned long) dst & 1) { |
973 |
+ /* Worst case - byte copy */ |
974 |
+@@ -837,12 +782,14 @@ unsigned long __copy_user_zeroing(void *pdst, const void __user *psrc, |
975 |
+ __asm_copy_from_user_1(dst, src, retn); |
976 |
+ n--; |
977 |
+ if (retn) |
978 |
+- goto copy_exception_bytes; |
979 |
++ return retn + n; |
980 |
+ } |
981 |
+ } |
982 |
+ if (((unsigned long) src & 2) && n >= 2) { |
983 |
+ __asm_copy_from_user_2(dst, src, retn); |
984 |
+ n -= 2; |
985 |
++ if (retn) |
986 |
++ return retn + n; |
987 |
+ } |
988 |
+ if ((unsigned long) dst & 2) { |
989 |
+ /* Second worst case - word copy */ |
990 |
+@@ -850,16 +797,10 @@ unsigned long __copy_user_zeroing(void *pdst, const void __user *psrc, |
991 |
+ __asm_copy_from_user_2(dst, src, retn); |
992 |
+ n -= 2; |
993 |
+ if (retn) |
994 |
+- goto copy_exception_bytes; |
995 |
++ return retn + n; |
996 |
+ } |
997 |
+ } |
998 |
+ |
999 |
+- /* We only need one check after the unalignment-adjustments, |
1000 |
+- because if both adjustments were done, either both or |
1001 |
+- neither reference had an exception. */ |
1002 |
+- if (retn != 0) |
1003 |
+- goto copy_exception_bytes; |
1004 |
+- |
1005 |
+ #ifdef USE_RAPF |
1006 |
+ /* 64 bit copy loop */ |
1007 |
+ if (!(((unsigned long) src | (unsigned long) dst) & 7)) { |
1008 |
+@@ -872,7 +813,7 @@ unsigned long __copy_user_zeroing(void *pdst, const void __user *psrc, |
1009 |
+ __asm_copy_from_user_8x64(dst, src, retn); |
1010 |
+ n -= 8; |
1011 |
+ if (retn) |
1012 |
+- goto copy_exception_bytes; |
1013 |
++ return retn + n; |
1014 |
+ } |
1015 |
+ } |
1016 |
+ |
1017 |
+@@ -888,7 +829,7 @@ unsigned long __copy_user_zeroing(void *pdst, const void __user *psrc, |
1018 |
+ __asm_copy_from_user_8x64(dst, src, retn); |
1019 |
+ n -= 8; |
1020 |
+ if (retn) |
1021 |
+- goto copy_exception_bytes; |
1022 |
++ return retn + n; |
1023 |
+ } |
1024 |
+ } |
1025 |
+ #endif |
1026 |
+@@ -898,7 +839,7 @@ unsigned long __copy_user_zeroing(void *pdst, const void __user *psrc, |
1027 |
+ n -= 4; |
1028 |
+ |
1029 |
+ if (retn) |
1030 |
+- goto copy_exception_bytes; |
1031 |
++ return retn + n; |
1032 |
+ } |
1033 |
+ |
1034 |
+ /* If we get here, there were no memory read faults. */ |
1035 |
+@@ -924,21 +865,8 @@ unsigned long __copy_user_zeroing(void *pdst, const void __user *psrc, |
1036 |
+ /* If we get here, retn correctly reflects the number of failing |
1037 |
+ bytes. */ |
1038 |
+ return retn; |
1039 |
+- |
1040 |
+- copy_exception_bytes: |
1041 |
+- /* We already have "retn" bytes cleared, and need to clear the |
1042 |
+- remaining "n" bytes. A non-optimized simple byte-for-byte in-line |
1043 |
+- memset is preferred here, since this isn't speed-critical code and |
1044 |
+- we'd rather have this a leaf-function than calling memset. */ |
1045 |
+- { |
1046 |
+- char *endp; |
1047 |
+- for (endp = dst + n; dst < endp; dst++) |
1048 |
+- *dst = 0; |
1049 |
+- } |
1050 |
+- |
1051 |
+- return retn + n; |
1052 |
+ } |
1053 |
+-EXPORT_SYMBOL(__copy_user_zeroing); |
1054 |
++EXPORT_SYMBOL(raw_copy_from_user); |
1055 |
+ |
1056 |
+ #define __asm_clear_8x64(to, ret) \ |
1057 |
+ asm volatile ( \ |
1058 |
+diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig |
1059 |
+index b3c5bde43d34..9a6e11b6f457 100644 |
1060 |
+--- a/arch/mips/Kconfig |
1061 |
++++ b/arch/mips/Kconfig |
1062 |
+@@ -1526,7 +1526,7 @@ config CPU_MIPS64_R6 |
1063 |
+ select CPU_SUPPORTS_HIGHMEM |
1064 |
+ select CPU_SUPPORTS_MSA |
1065 |
+ select GENERIC_CSUM |
1066 |
+- select MIPS_O32_FP64_SUPPORT if MIPS32_O32 |
1067 |
++ select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32 |
1068 |
+ select HAVE_KVM |
1069 |
+ help |
1070 |
+ Choose this option to build a kernel for release 6 or later of the |
1071 |
+diff --git a/arch/mips/include/asm/spinlock.h b/arch/mips/include/asm/spinlock.h |
1072 |
+index f485afe51514..a8df44d60607 100644 |
1073 |
+--- a/arch/mips/include/asm/spinlock.h |
1074 |
++++ b/arch/mips/include/asm/spinlock.h |
1075 |
+@@ -127,7 +127,7 @@ static inline void arch_spin_lock(arch_spinlock_t *lock) |
1076 |
+ " andi %[ticket], %[ticket], 0xffff \n" |
1077 |
+ " bne %[ticket], %[my_ticket], 4f \n" |
1078 |
+ " subu %[ticket], %[my_ticket], %[ticket] \n" |
1079 |
+- "2: \n" |
1080 |
++ "2: .insn \n" |
1081 |
+ " .subsection 2 \n" |
1082 |
+ "4: andi %[ticket], %[ticket], 0xffff \n" |
1083 |
+ " sll %[ticket], 5 \n" |
1084 |
+@@ -202,7 +202,7 @@ static inline unsigned int arch_spin_trylock(arch_spinlock_t *lock) |
1085 |
+ " sc %[ticket], %[ticket_ptr] \n" |
1086 |
+ " beqz %[ticket], 1b \n" |
1087 |
+ " li %[ticket], 1 \n" |
1088 |
+- "2: \n" |
1089 |
++ "2: .insn \n" |
1090 |
+ " .subsection 2 \n" |
1091 |
+ "3: b 2b \n" |
1092 |
+ " li %[ticket], 0 \n" |
1093 |
+@@ -382,7 +382,7 @@ static inline int arch_read_trylock(arch_rwlock_t *rw) |
1094 |
+ " .set reorder \n" |
1095 |
+ __WEAK_LLSC_MB |
1096 |
+ " li %2, 1 \n" |
1097 |
+- "2: \n" |
1098 |
++ "2: .insn \n" |
1099 |
+ : "=" GCC_OFF_SMALL_ASM() (rw->lock), "=&r" (tmp), "=&r" (ret) |
1100 |
+ : GCC_OFF_SMALL_ASM() (rw->lock) |
1101 |
+ : "memory"); |
1102 |
+@@ -422,7 +422,7 @@ static inline int arch_write_trylock(arch_rwlock_t *rw) |
1103 |
+ " lui %1, 0x8000 \n" |
1104 |
+ " sc %1, %0 \n" |
1105 |
+ " li %2, 1 \n" |
1106 |
+- "2: \n" |
1107 |
++ "2: .insn \n" |
1108 |
+ : "=" GCC_OFF_SMALL_ASM() (rw->lock), "=&r" (tmp), |
1109 |
+ "=&r" (ret) |
1110 |
+ : GCC_OFF_SMALL_ASM() (rw->lock) |
1111 |
+diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c |
1112 |
+index 07718bb5fc9d..12422fd4af23 100644 |
1113 |
+--- a/arch/mips/kernel/cpu-probe.c |
1114 |
++++ b/arch/mips/kernel/cpu-probe.c |
1115 |
+@@ -1824,7 +1824,7 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu) |
1116 |
+ } |
1117 |
+ |
1118 |
+ decode_configs(c); |
1119 |
+- c->options |= MIPS_CPU_TLBINV | MIPS_CPU_LDPTE; |
1120 |
++ c->options |= MIPS_CPU_FTLB | MIPS_CPU_TLBINV | MIPS_CPU_LDPTE; |
1121 |
+ c->writecombine = _CACHE_UNCACHED_ACCELERATED; |
1122 |
+ break; |
1123 |
+ default: |
1124 |
+diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S |
1125 |
+index dc0b29612891..52a4fdfc8513 100644 |
1126 |
+--- a/arch/mips/kernel/genex.S |
1127 |
++++ b/arch/mips/kernel/genex.S |
1128 |
+@@ -448,7 +448,7 @@ NESTED(nmi_handler, PT_SIZE, sp) |
1129 |
+ BUILD_HANDLER reserved reserved sti verbose /* others */ |
1130 |
+ |
1131 |
+ .align 5 |
1132 |
+- LEAF(handle_ri_rdhwr_vivt) |
1133 |
++ LEAF(handle_ri_rdhwr_tlbp) |
1134 |
+ .set push |
1135 |
+ .set noat |
1136 |
+ .set noreorder |
1137 |
+@@ -467,7 +467,7 @@ NESTED(nmi_handler, PT_SIZE, sp) |
1138 |
+ .set pop |
1139 |
+ bltz k1, handle_ri /* slow path */ |
1140 |
+ /* fall thru */ |
1141 |
+- END(handle_ri_rdhwr_vivt) |
1142 |
++ END(handle_ri_rdhwr_tlbp) |
1143 |
+ |
1144 |
+ LEAF(handle_ri_rdhwr) |
1145 |
+ .set push |
1146 |
+diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c |
1147 |
+index 6c7f9d7e92b3..6e2487d59fee 100644 |
1148 |
+--- a/arch/mips/kernel/traps.c |
1149 |
++++ b/arch/mips/kernel/traps.c |
1150 |
+@@ -81,7 +81,7 @@ extern asmlinkage void handle_dbe(void); |
1151 |
+ extern asmlinkage void handle_sys(void); |
1152 |
+ extern asmlinkage void handle_bp(void); |
1153 |
+ extern asmlinkage void handle_ri(void); |
1154 |
+-extern asmlinkage void handle_ri_rdhwr_vivt(void); |
1155 |
++extern asmlinkage void handle_ri_rdhwr_tlbp(void); |
1156 |
+ extern asmlinkage void handle_ri_rdhwr(void); |
1157 |
+ extern asmlinkage void handle_cpu(void); |
1158 |
+ extern asmlinkage void handle_ov(void); |
1159 |
+@@ -2352,9 +2352,18 @@ void __init trap_init(void) |
1160 |
+ |
1161 |
+ set_except_vector(EXCCODE_SYS, handle_sys); |
1162 |
+ set_except_vector(EXCCODE_BP, handle_bp); |
1163 |
+- set_except_vector(EXCCODE_RI, rdhwr_noopt ? handle_ri : |
1164 |
+- (cpu_has_vtag_icache ? |
1165 |
+- handle_ri_rdhwr_vivt : handle_ri_rdhwr)); |
1166 |
++ |
1167 |
++ if (rdhwr_noopt) |
1168 |
++ set_except_vector(EXCCODE_RI, handle_ri); |
1169 |
++ else { |
1170 |
++ if (cpu_has_vtag_icache) |
1171 |
++ set_except_vector(EXCCODE_RI, handle_ri_rdhwr_tlbp); |
1172 |
++ else if (current_cpu_type() == CPU_LOONGSON3) |
1173 |
++ set_except_vector(EXCCODE_RI, handle_ri_rdhwr_tlbp); |
1174 |
++ else |
1175 |
++ set_except_vector(EXCCODE_RI, handle_ri_rdhwr); |
1176 |
++ } |
1177 |
++ |
1178 |
+ set_except_vector(EXCCODE_CPU, handle_cpu); |
1179 |
+ set_except_vector(EXCCODE_OV, handle_ov); |
1180 |
+ set_except_vector(EXCCODE_TR, handle_tr); |
1181 |
+diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c |
1182 |
+index 9a61671c00a7..90565477dfbd 100644 |
1183 |
+--- a/arch/mips/lantiq/xway/sysctrl.c |
1184 |
++++ b/arch/mips/lantiq/xway/sysctrl.c |
1185 |
+@@ -467,7 +467,7 @@ void __init ltq_soc_init(void) |
1186 |
+ |
1187 |
+ if (!np_xbar) |
1188 |
+ panic("Failed to load xbar nodes from devicetree"); |
1189 |
+- if (of_address_to_resource(np_pmu, 0, &res_xbar)) |
1190 |
++ if (of_address_to_resource(np_xbar, 0, &res_xbar)) |
1191 |
+ panic("Failed to get xbar resources"); |
1192 |
+ if (request_mem_region(res_xbar.start, resource_size(&res_xbar), |
1193 |
+ res_xbar.name) < 0) |
1194 |
+diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c |
1195 |
+index 88cfaf81c958..9d0107fbb169 100644 |
1196 |
+--- a/arch/mips/mm/c-r4k.c |
1197 |
++++ b/arch/mips/mm/c-r4k.c |
1198 |
+@@ -1558,6 +1558,7 @@ static void probe_vcache(void) |
1199 |
+ vcache_size = c->vcache.sets * c->vcache.ways * c->vcache.linesz; |
1200 |
+ |
1201 |
+ c->vcache.waybit = 0; |
1202 |
++ c->vcache.waysize = vcache_size / c->vcache.ways; |
1203 |
+ |
1204 |
+ pr_info("Unified victim cache %ldkB %s, linesize %d bytes.\n", |
1205 |
+ vcache_size >> 10, way_string[c->vcache.ways], c->vcache.linesz); |
1206 |
+@@ -1660,6 +1661,7 @@ static void __init loongson3_sc_init(void) |
1207 |
+ /* Loongson-3 has 4 cores, 1MB scache for each. scaches are shared */ |
1208 |
+ scache_size *= 4; |
1209 |
+ c->scache.waybit = 0; |
1210 |
++ c->scache.waysize = scache_size / c->scache.ways; |
1211 |
+ pr_info("Unified secondary cache %ldkB %s, linesize %d bytes.\n", |
1212 |
+ scache_size >> 10, way_string[c->scache.ways], c->scache.linesz); |
1213 |
+ if (scache_size) |
1214 |
+diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c |
1215 |
+index 55ce39606cb8..2da5649fc545 100644 |
1216 |
+--- a/arch/mips/mm/tlbex.c |
1217 |
++++ b/arch/mips/mm/tlbex.c |
1218 |
+@@ -762,7 +762,8 @@ static void build_huge_update_entries(u32 **p, unsigned int pte, |
1219 |
+ static void build_huge_handler_tail(u32 **p, struct uasm_reloc **r, |
1220 |
+ struct uasm_label **l, |
1221 |
+ unsigned int pte, |
1222 |
+- unsigned int ptr) |
1223 |
++ unsigned int ptr, |
1224 |
++ unsigned int flush) |
1225 |
+ { |
1226 |
+ #ifdef CONFIG_SMP |
1227 |
+ UASM_i_SC(p, pte, 0, ptr); |
1228 |
+@@ -771,6 +772,22 @@ static void build_huge_handler_tail(u32 **p, struct uasm_reloc **r, |
1229 |
+ #else |
1230 |
+ UASM_i_SW(p, pte, 0, ptr); |
1231 |
+ #endif |
1232 |
++ if (cpu_has_ftlb && flush) { |
1233 |
++ BUG_ON(!cpu_has_tlbinv); |
1234 |
++ |
1235 |
++ UASM_i_MFC0(p, ptr, C0_ENTRYHI); |
1236 |
++ uasm_i_ori(p, ptr, ptr, MIPS_ENTRYHI_EHINV); |
1237 |
++ UASM_i_MTC0(p, ptr, C0_ENTRYHI); |
1238 |
++ build_tlb_write_entry(p, l, r, tlb_indexed); |
1239 |
++ |
1240 |
++ uasm_i_xori(p, ptr, ptr, MIPS_ENTRYHI_EHINV); |
1241 |
++ UASM_i_MTC0(p, ptr, C0_ENTRYHI); |
1242 |
++ build_huge_update_entries(p, pte, ptr); |
1243 |
++ build_huge_tlb_write_entry(p, l, r, pte, tlb_random, 0); |
1244 |
++ |
1245 |
++ return; |
1246 |
++ } |
1247 |
++ |
1248 |
+ build_huge_update_entries(p, pte, ptr); |
1249 |
+ build_huge_tlb_write_entry(p, l, r, pte, tlb_indexed, 0); |
1250 |
+ } |
1251 |
+@@ -2197,7 +2214,7 @@ static void build_r4000_tlb_load_handler(void) |
1252 |
+ uasm_l_tlbl_goaround2(&l, p); |
1253 |
+ } |
1254 |
+ uasm_i_ori(&p, wr.r1, wr.r1, (_PAGE_ACCESSED | _PAGE_VALID)); |
1255 |
+- build_huge_handler_tail(&p, &r, &l, wr.r1, wr.r2); |
1256 |
++ build_huge_handler_tail(&p, &r, &l, wr.r1, wr.r2, 1); |
1257 |
+ #endif |
1258 |
+ |
1259 |
+ uasm_l_nopage_tlbl(&l, p); |
1260 |
+@@ -2252,7 +2269,7 @@ static void build_r4000_tlb_store_handler(void) |
1261 |
+ build_tlb_probe_entry(&p); |
1262 |
+ uasm_i_ori(&p, wr.r1, wr.r1, |
1263 |
+ _PAGE_ACCESSED | _PAGE_MODIFIED | _PAGE_VALID | _PAGE_DIRTY); |
1264 |
+- build_huge_handler_tail(&p, &r, &l, wr.r1, wr.r2); |
1265 |
++ build_huge_handler_tail(&p, &r, &l, wr.r1, wr.r2, 1); |
1266 |
+ #endif |
1267 |
+ |
1268 |
+ uasm_l_nopage_tlbs(&l, p); |
1269 |
+@@ -2308,7 +2325,7 @@ static void build_r4000_tlb_modify_handler(void) |
1270 |
+ build_tlb_probe_entry(&p); |
1271 |
+ uasm_i_ori(&p, wr.r1, wr.r1, |
1272 |
+ _PAGE_ACCESSED | _PAGE_MODIFIED | _PAGE_VALID | _PAGE_DIRTY); |
1273 |
+- build_huge_handler_tail(&p, &r, &l, wr.r1, wr.r2); |
1274 |
++ build_huge_handler_tail(&p, &r, &l, wr.r1, wr.r2, 0); |
1275 |
+ #endif |
1276 |
+ |
1277 |
+ uasm_l_nopage_tlbm(&l, p); |
1278 |
+diff --git a/arch/mips/ralink/rt3883.c b/arch/mips/ralink/rt3883.c |
1279 |
+index 3e0aa09c6b55..9e4631acfcb5 100644 |
1280 |
+--- a/arch/mips/ralink/rt3883.c |
1281 |
++++ b/arch/mips/ralink/rt3883.c |
1282 |
+@@ -36,7 +36,7 @@ static struct rt2880_pmx_func uartlite_func[] = { FUNC("uartlite", 0, 15, 2) }; |
1283 |
+ static struct rt2880_pmx_func jtag_func[] = { FUNC("jtag", 0, 17, 5) }; |
1284 |
+ static struct rt2880_pmx_func mdio_func[] = { FUNC("mdio", 0, 22, 2) }; |
1285 |
+ static struct rt2880_pmx_func lna_a_func[] = { FUNC("lna a", 0, 32, 3) }; |
1286 |
+-static struct rt2880_pmx_func lna_g_func[] = { FUNC("lna a", 0, 35, 3) }; |
1287 |
++static struct rt2880_pmx_func lna_g_func[] = { FUNC("lna g", 0, 35, 3) }; |
1288 |
+ static struct rt2880_pmx_func pci_func[] = { |
1289 |
+ FUNC("pci-dev", 0, 40, 32), |
1290 |
+ FUNC("pci-host2", 1, 40, 32), |
1291 |
+@@ -44,7 +44,7 @@ static struct rt2880_pmx_func pci_func[] = { |
1292 |
+ FUNC("pci-fnc", 3, 40, 32) |
1293 |
+ }; |
1294 |
+ static struct rt2880_pmx_func ge1_func[] = { FUNC("ge1", 0, 72, 12) }; |
1295 |
+-static struct rt2880_pmx_func ge2_func[] = { FUNC("ge1", 0, 84, 12) }; |
1296 |
++static struct rt2880_pmx_func ge2_func[] = { FUNC("ge2", 0, 84, 12) }; |
1297 |
+ |
1298 |
+ static struct rt2880_pmx_group rt3883_pinmux_data[] = { |
1299 |
+ GRP("i2c", i2c_func, 1, RT3883_GPIO_MODE_I2C), |
1300 |
+diff --git a/arch/nios2/kernel/prom.c b/arch/nios2/kernel/prom.c |
1301 |
+index 367c5426157b..3901b80d4420 100644 |
1302 |
+--- a/arch/nios2/kernel/prom.c |
1303 |
++++ b/arch/nios2/kernel/prom.c |
1304 |
+@@ -48,6 +48,13 @@ void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align) |
1305 |
+ return alloc_bootmem_align(size, align); |
1306 |
+ } |
1307 |
+ |
1308 |
++int __init early_init_dt_reserve_memory_arch(phys_addr_t base, phys_addr_t size, |
1309 |
++ bool nomap) |
1310 |
++{ |
1311 |
++ reserve_bootmem(base, size, BOOTMEM_DEFAULT); |
1312 |
++ return 0; |
1313 |
++} |
1314 |
++ |
1315 |
+ void __init early_init_devtree(void *params) |
1316 |
+ { |
1317 |
+ __be32 *dtb = (u32 *)__dtb_start; |
1318 |
+diff --git a/arch/nios2/kernel/setup.c b/arch/nios2/kernel/setup.c |
1319 |
+index a3fa80d1aacc..72ef4077bf2b 100644 |
1320 |
+--- a/arch/nios2/kernel/setup.c |
1321 |
++++ b/arch/nios2/kernel/setup.c |
1322 |
+@@ -200,6 +200,9 @@ void __init setup_arch(char **cmdline_p) |
1323 |
+ } |
1324 |
+ #endif /* CONFIG_BLK_DEV_INITRD */ |
1325 |
+ |
1326 |
++ early_init_fdt_reserve_self(); |
1327 |
++ early_init_fdt_scan_reserved_mem(); |
1328 |
++ |
1329 |
+ unflatten_and_copy_device_tree(); |
1330 |
+ |
1331 |
+ setup_cpuinfo(); |
1332 |
+diff --git a/arch/powerpc/crypto/crc32c-vpmsum_glue.c b/arch/powerpc/crypto/crc32c-vpmsum_glue.c |
1333 |
+index 411994551afc..f058e0c3e4d4 100644 |
1334 |
+--- a/arch/powerpc/crypto/crc32c-vpmsum_glue.c |
1335 |
++++ b/arch/powerpc/crypto/crc32c-vpmsum_glue.c |
1336 |
+@@ -33,10 +33,13 @@ static u32 crc32c_vpmsum(u32 crc, unsigned char const *p, size_t len) |
1337 |
+ } |
1338 |
+ |
1339 |
+ if (len & ~VMX_ALIGN_MASK) { |
1340 |
++ preempt_disable(); |
1341 |
+ pagefault_disable(); |
1342 |
+ enable_kernel_altivec(); |
1343 |
+ crc = __crc32c_vpmsum(crc, p, len & ~VMX_ALIGN_MASK); |
1344 |
++ disable_kernel_altivec(); |
1345 |
+ pagefault_enable(); |
1346 |
++ preempt_enable(); |
1347 |
+ } |
1348 |
+ |
1349 |
+ tail = len & VMX_ALIGN_MASK; |
1350 |
+diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c |
1351 |
+index 8d58c61908f7..df88d2067348 100644 |
1352 |
+--- a/arch/powerpc/kernel/align.c |
1353 |
++++ b/arch/powerpc/kernel/align.c |
1354 |
+@@ -807,14 +807,25 @@ int fix_alignment(struct pt_regs *regs) |
1355 |
+ nb = aligninfo[instr].len; |
1356 |
+ flags = aligninfo[instr].flags; |
1357 |
+ |
1358 |
+- /* ldbrx/stdbrx overlap lfs/stfs in the DSISR unfortunately */ |
1359 |
+- if (IS_XFORM(instruction) && ((instruction >> 1) & 0x3ff) == 532) { |
1360 |
+- nb = 8; |
1361 |
+- flags = LD+SW; |
1362 |
+- } else if (IS_XFORM(instruction) && |
1363 |
+- ((instruction >> 1) & 0x3ff) == 660) { |
1364 |
+- nb = 8; |
1365 |
+- flags = ST+SW; |
1366 |
++ /* |
1367 |
++ * Handle some cases which give overlaps in the DSISR values. |
1368 |
++ */ |
1369 |
++ if (IS_XFORM(instruction)) { |
1370 |
++ switch (get_xop(instruction)) { |
1371 |
++ case 532: /* ldbrx */ |
1372 |
++ nb = 8; |
1373 |
++ flags = LD+SW; |
1374 |
++ break; |
1375 |
++ case 660: /* stdbrx */ |
1376 |
++ nb = 8; |
1377 |
++ flags = ST+SW; |
1378 |
++ break; |
1379 |
++ case 20: /* lwarx */ |
1380 |
++ case 84: /* ldarx */ |
1381 |
++ case 116: /* lharx */ |
1382 |
++ case 276: /* lqarx */ |
1383 |
++ return 0; /* not emulated ever */ |
1384 |
++ } |
1385 |
+ } |
1386 |
+ |
1387 |
+ /* Byteswap little endian loads and stores */ |
1388 |
+diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S |
1389 |
+index 32be2a844947..d5f2431daa5e 100644 |
1390 |
+--- a/arch/powerpc/kernel/misc_64.S |
1391 |
++++ b/arch/powerpc/kernel/misc_64.S |
1392 |
+@@ -67,7 +67,7 @@ PPC64_CACHES: |
1393 |
+ * flush all bytes from start through stop-1 inclusive |
1394 |
+ */ |
1395 |
+ |
1396 |
+-_GLOBAL(flush_icache_range) |
1397 |
++_GLOBAL_TOC(flush_icache_range) |
1398 |
+ BEGIN_FTR_SECTION |
1399 |
+ PURGE_PREFETCHED_INS |
1400 |
+ blr |
1401 |
+@@ -120,7 +120,7 @@ EXPORT_SYMBOL(flush_icache_range) |
1402 |
+ * |
1403 |
+ * flush all bytes from start to stop-1 inclusive |
1404 |
+ */ |
1405 |
+-_GLOBAL(flush_dcache_range) |
1406 |
++_GLOBAL_TOC(flush_dcache_range) |
1407 |
+ |
1408 |
+ /* |
1409 |
+ * Flush the data cache to memory |
1410 |
+diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c |
1411 |
+index 6824157e4d2e..18a0946837d4 100644 |
1412 |
+--- a/arch/powerpc/kernel/setup_64.c |
1413 |
++++ b/arch/powerpc/kernel/setup_64.c |
1414 |
+@@ -245,6 +245,15 @@ static void cpu_ready_for_interrupts(void) |
1415 |
+ mtspr(SPRN_LPCR, lpcr | LPCR_AIL_3); |
1416 |
+ } |
1417 |
+ |
1418 |
++ /* |
1419 |
++ * Fixup HFSCR:TM based on CPU features. The bit is set by our |
1420 |
++ * early asm init because at that point we haven't updated our |
1421 |
++ * CPU features from firmware and device-tree. Here we have, |
1422 |
++ * so let's do it. |
1423 |
++ */ |
1424 |
++ if (cpu_has_feature(CPU_FTR_HVMODE) && !cpu_has_feature(CPU_FTR_TM_COMP)) |
1425 |
++ mtspr(SPRN_HFSCR, mfspr(SPRN_HFSCR) & ~HFSCR_TM); |
1426 |
++ |
1427 |
+ /* Set IR and DR in PACA MSR */ |
1428 |
+ get_paca()->kernel_msr = MSR_KERNEL; |
1429 |
+ } |
1430 |
+diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c |
1431 |
+index cc332608e656..65bb8f33b399 100644 |
1432 |
+--- a/arch/powerpc/mm/hash_native_64.c |
1433 |
++++ b/arch/powerpc/mm/hash_native_64.c |
1434 |
+@@ -638,6 +638,10 @@ static void native_flush_hash_range(unsigned long number, int local) |
1435 |
+ unsigned long psize = batch->psize; |
1436 |
+ int ssize = batch->ssize; |
1437 |
+ int i; |
1438 |
++ unsigned int use_local; |
1439 |
++ |
1440 |
++ use_local = local && mmu_has_feature(MMU_FTR_TLBIEL) && |
1441 |
++ mmu_psize_defs[psize].tlbiel && !cxl_ctx_in_use(); |
1442 |
+ |
1443 |
+ local_irq_save(flags); |
1444 |
+ |
1445 |
+@@ -667,8 +671,7 @@ static void native_flush_hash_range(unsigned long number, int local) |
1446 |
+ } pte_iterate_hashed_end(); |
1447 |
+ } |
1448 |
+ |
1449 |
+- if (mmu_has_feature(MMU_FTR_TLBIEL) && |
1450 |
+- mmu_psize_defs[psize].tlbiel && local) { |
1451 |
++ if (use_local) { |
1452 |
+ asm volatile("ptesync":::"memory"); |
1453 |
+ for (i = 0; i < number; i++) { |
1454 |
+ vpn = batch->vpn[i]; |
1455 |
+diff --git a/arch/s390/boot/compressed/misc.c b/arch/s390/boot/compressed/misc.c |
1456 |
+index 8515dd5a5663..bd90448347eb 100644 |
1457 |
+--- a/arch/s390/boot/compressed/misc.c |
1458 |
++++ b/arch/s390/boot/compressed/misc.c |
1459 |
+@@ -141,31 +141,34 @@ static void check_ipl_parmblock(void *start, unsigned long size) |
1460 |
+ |
1461 |
+ unsigned long decompress_kernel(void) |
1462 |
+ { |
1463 |
+- unsigned long output_addr; |
1464 |
+- unsigned char *output; |
1465 |
++ void *output, *kernel_end; |
1466 |
+ |
1467 |
+- output_addr = ((unsigned long) &_end + HEAP_SIZE + 4095UL) & -4096UL; |
1468 |
+- check_ipl_parmblock((void *) 0, output_addr + SZ__bss_start); |
1469 |
+- memset(&_bss, 0, &_ebss - &_bss); |
1470 |
+- free_mem_ptr = (unsigned long)&_end; |
1471 |
+- free_mem_end_ptr = free_mem_ptr + HEAP_SIZE; |
1472 |
+- output = (unsigned char *) output_addr; |
1473 |
++ output = (void *) ALIGN((unsigned long) &_end + HEAP_SIZE, PAGE_SIZE); |
1474 |
++ kernel_end = output + SZ__bss_start; |
1475 |
++ check_ipl_parmblock((void *) 0, (unsigned long) kernel_end); |
1476 |
+ |
1477 |
+ #ifdef CONFIG_BLK_DEV_INITRD |
1478 |
+ /* |
1479 |
+ * Move the initrd right behind the end of the decompressed |
1480 |
+- * kernel image. |
1481 |
++ * kernel image. This also prevents initrd corruption caused by |
1482 |
++ * bss clearing since kernel_end will always be located behind the |
1483 |
++ * current bss section.. |
1484 |
+ */ |
1485 |
+- if (INITRD_START && INITRD_SIZE && |
1486 |
+- INITRD_START < (unsigned long) output + SZ__bss_start) { |
1487 |
+- check_ipl_parmblock(output + SZ__bss_start, |
1488 |
+- INITRD_START + INITRD_SIZE); |
1489 |
+- memmove(output + SZ__bss_start, |
1490 |
+- (void *) INITRD_START, INITRD_SIZE); |
1491 |
+- INITRD_START = (unsigned long) output + SZ__bss_start; |
1492 |
++ if (INITRD_START && INITRD_SIZE && kernel_end > (void *) INITRD_START) { |
1493 |
++ check_ipl_parmblock(kernel_end, INITRD_SIZE); |
1494 |
++ memmove(kernel_end, (void *) INITRD_START, INITRD_SIZE); |
1495 |
++ INITRD_START = (unsigned long) kernel_end; |
1496 |
+ } |
1497 |
+ #endif |
1498 |
+ |
1499 |
++ /* |
1500 |
++ * Clear bss section. free_mem_ptr and free_mem_end_ptr need to be |
1501 |
++ * initialized afterwards since they reside in bss. |
1502 |
++ */ |
1503 |
++ memset(&_bss, 0, &_ebss - &_bss); |
1504 |
++ free_mem_ptr = (unsigned long) &_end; |
1505 |
++ free_mem_end_ptr = free_mem_ptr + HEAP_SIZE; |
1506 |
++ |
1507 |
+ puts("Uncompressing Linux... "); |
1508 |
+ __decompress(input_data, input_len, NULL, NULL, output, 0, NULL, error); |
1509 |
+ puts("Ok, booting the kernel.\n"); |
1510 |
+diff --git a/arch/s390/include/asm/uaccess.h b/arch/s390/include/asm/uaccess.h |
1511 |
+index f82b04e85a21..7e99fb34ff23 100644 |
1512 |
+--- a/arch/s390/include/asm/uaccess.h |
1513 |
++++ b/arch/s390/include/asm/uaccess.h |
1514 |
+@@ -144,7 +144,7 @@ unsigned long __must_check __copy_to_user(void __user *to, const void *from, |
1515 |
+ " jg 2b\n" \ |
1516 |
+ ".popsection\n" \ |
1517 |
+ EX_TABLE(0b,3b) EX_TABLE(1b,3b) \ |
1518 |
+- : "=d" (__rc), "=Q" (*(to)) \ |
1519 |
++ : "=d" (__rc), "+Q" (*(to)) \ |
1520 |
+ : "d" (size), "Q" (*(from)), \ |
1521 |
+ "d" (__reg0), "K" (-EFAULT) \ |
1522 |
+ : "cc"); \ |
1523 |
+diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c |
1524 |
+index 537c6647d84c..036fc03aefbd 100644 |
1525 |
+--- a/arch/x86/kernel/cpu/mcheck/mce.c |
1526 |
++++ b/arch/x86/kernel/cpu/mcheck/mce.c |
1527 |
+@@ -54,6 +54,8 @@ |
1528 |
+ |
1529 |
+ static DEFINE_MUTEX(mce_chrdev_read_mutex); |
1530 |
+ |
1531 |
++static int mce_chrdev_open_count; /* #times opened */ |
1532 |
++ |
1533 |
+ #define mce_log_get_idx_check(p) \ |
1534 |
+ ({ \ |
1535 |
+ RCU_LOCKDEP_WARN(!rcu_read_lock_sched_held() && \ |
1536 |
+@@ -601,6 +603,10 @@ static int mce_default_notifier(struct notifier_block *nb, unsigned long val, |
1537 |
+ if (atomic_read(&num_notifiers) > 2) |
1538 |
+ return NOTIFY_DONE; |
1539 |
+ |
1540 |
++ /* Don't print when mcelog is running */ |
1541 |
++ if (mce_chrdev_open_count > 0) |
1542 |
++ return NOTIFY_DONE; |
1543 |
++ |
1544 |
+ __print_mce(m); |
1545 |
+ |
1546 |
+ return NOTIFY_DONE; |
1547 |
+@@ -1871,7 +1877,6 @@ void mcheck_cpu_clear(struct cpuinfo_x86 *c) |
1548 |
+ */ |
1549 |
+ |
1550 |
+ static DEFINE_SPINLOCK(mce_chrdev_state_lock); |
1551 |
+-static int mce_chrdev_open_count; /* #times opened */ |
1552 |
+ static int mce_chrdev_open_exclu; /* already open exclusive? */ |
1553 |
+ |
1554 |
+ static int mce_chrdev_open(struct inode *inode, struct file *file) |
1555 |
+diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c |
1556 |
+index e244c19a2451..067f9813fd2c 100644 |
1557 |
+--- a/arch/x86/kernel/reboot.c |
1558 |
++++ b/arch/x86/kernel/reboot.c |
1559 |
+@@ -223,6 +223,22 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = { |
1560 |
+ DMI_MATCH(DMI_BOARD_NAME, "P4S800"), |
1561 |
+ }, |
1562 |
+ }, |
1563 |
++ { /* Handle problems with rebooting on ASUS EeeBook X205TA */ |
1564 |
++ .callback = set_acpi_reboot, |
1565 |
++ .ident = "ASUS EeeBook X205TA", |
1566 |
++ .matches = { |
1567 |
++ DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), |
1568 |
++ DMI_MATCH(DMI_PRODUCT_NAME, "X205TA"), |
1569 |
++ }, |
1570 |
++ }, |
1571 |
++ { /* Handle problems with rebooting on ASUS EeeBook X205TAW */ |
1572 |
++ .callback = set_acpi_reboot, |
1573 |
++ .ident = "ASUS EeeBook X205TAW", |
1574 |
++ .matches = { |
1575 |
++ DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), |
1576 |
++ DMI_MATCH(DMI_PRODUCT_NAME, "X205TAW"), |
1577 |
++ }, |
1578 |
++ }, |
1579 |
+ |
1580 |
+ /* Certec */ |
1581 |
+ { /* Handle problems with rebooting on Certec BPC600 */ |
1582 |
+diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c |
1583 |
+index 9764463ce833..cce7d2e3be15 100644 |
1584 |
+--- a/arch/x86/kvm/vmx.c |
1585 |
++++ b/arch/x86/kvm/vmx.c |
1586 |
+@@ -7086,13 +7086,18 @@ static int nested_vmx_check_vmptr(struct kvm_vcpu *vcpu, int exit_reason, |
1587 |
+ } |
1588 |
+ |
1589 |
+ page = nested_get_page(vcpu, vmptr); |
1590 |
+- if (page == NULL || |
1591 |
+- *(u32 *)kmap(page) != VMCS12_REVISION) { |
1592 |
++ if (page == NULL) { |
1593 |
+ nested_vmx_failInvalid(vcpu); |
1594 |
++ return kvm_skip_emulated_instruction(vcpu); |
1595 |
++ } |
1596 |
++ if (*(u32 *)kmap(page) != VMCS12_REVISION) { |
1597 |
+ kunmap(page); |
1598 |
++ nested_release_page_clean(page); |
1599 |
++ nested_vmx_failInvalid(vcpu); |
1600 |
+ return kvm_skip_emulated_instruction(vcpu); |
1601 |
+ } |
1602 |
+ kunmap(page); |
1603 |
++ nested_release_page_clean(page); |
1604 |
+ vmx->nested.vmxon_ptr = vmptr; |
1605 |
+ break; |
1606 |
+ case EXIT_REASON_VMCLEAR: |
1607 |
+diff --git a/arch/xtensa/include/asm/page.h b/arch/xtensa/include/asm/page.h |
1608 |
+index 976b1d70edbc..4ddbfd57a7c8 100644 |
1609 |
+--- a/arch/xtensa/include/asm/page.h |
1610 |
++++ b/arch/xtensa/include/asm/page.h |
1611 |
+@@ -164,8 +164,21 @@ void copy_user_highpage(struct page *to, struct page *from, |
1612 |
+ |
1613 |
+ #define ARCH_PFN_OFFSET (PHYS_OFFSET >> PAGE_SHIFT) |
1614 |
+ |
1615 |
++#ifdef CONFIG_MMU |
1616 |
++static inline unsigned long ___pa(unsigned long va) |
1617 |
++{ |
1618 |
++ unsigned long off = va - PAGE_OFFSET; |
1619 |
++ |
1620 |
++ if (off >= XCHAL_KSEG_SIZE) |
1621 |
++ off -= XCHAL_KSEG_SIZE; |
1622 |
++ |
1623 |
++ return off + PHYS_OFFSET; |
1624 |
++} |
1625 |
++#define __pa(x) ___pa((unsigned long)(x)) |
1626 |
++#else |
1627 |
+ #define __pa(x) \ |
1628 |
+ ((unsigned long) (x) - PAGE_OFFSET + PHYS_OFFSET) |
1629 |
++#endif |
1630 |
+ #define __va(x) \ |
1631 |
+ ((void *)((unsigned long) (x) - PHYS_OFFSET + PAGE_OFFSET)) |
1632 |
+ #define pfn_valid(pfn) \ |
1633 |
+diff --git a/drivers/acpi/button.c b/drivers/acpi/button.c |
1634 |
+index e19f530f1083..6d5a8c1d3132 100644 |
1635 |
+--- a/drivers/acpi/button.c |
1636 |
++++ b/drivers/acpi/button.c |
1637 |
+@@ -113,7 +113,7 @@ struct acpi_button { |
1638 |
+ |
1639 |
+ static BLOCKING_NOTIFIER_HEAD(acpi_lid_notifier); |
1640 |
+ static struct acpi_device *lid_device; |
1641 |
+-static u8 lid_init_state = ACPI_BUTTON_LID_INIT_METHOD; |
1642 |
++static u8 lid_init_state = ACPI_BUTTON_LID_INIT_OPEN; |
1643 |
+ |
1644 |
+ static unsigned long lid_report_interval __read_mostly = 500; |
1645 |
+ module_param(lid_report_interval, ulong, 0644); |
1646 |
+diff --git a/drivers/acpi/glue.c b/drivers/acpi/glue.c |
1647 |
+index fb19e1cdb641..edc8663b5db3 100644 |
1648 |
+--- a/drivers/acpi/glue.c |
1649 |
++++ b/drivers/acpi/glue.c |
1650 |
+@@ -99,13 +99,13 @@ static int find_child_checks(struct acpi_device *adev, bool check_children) |
1651 |
+ return -ENODEV; |
1652 |
+ |
1653 |
+ /* |
1654 |
+- * If the device has a _HID (or _CID) returning a valid ACPI/PNP |
1655 |
+- * device ID, it is better to make it look less attractive here, so that |
1656 |
+- * the other device with the same _ADR value (that may not have a valid |
1657 |
+- * device ID) can be matched going forward. [This means a second spec |
1658 |
+- * violation in a row, so whatever we do here is best effort anyway.] |
1659 |
++ * If the device has a _HID returning a valid ACPI/PNP device ID, it is |
1660 |
++ * better to make it look less attractive here, so that the other device |
1661 |
++ * with the same _ADR value (that may not have a valid device ID) can be |
1662 |
++ * matched going forward. [This means a second spec violation in a row, |
1663 |
++ * so whatever we do here is best effort anyway.] |
1664 |
+ */ |
1665 |
+- return sta_present && list_empty(&adev->pnp.ids) ? |
1666 |
++ return sta_present && !adev->pnp.type.platform_id ? |
1667 |
+ FIND_CHILD_MAX_SCORE : FIND_CHILD_MIN_SCORE; |
1668 |
+ } |
1669 |
+ |
1670 |
+diff --git a/drivers/acpi/sleep.c b/drivers/acpi/sleep.c |
1671 |
+index 54abb26b7366..a4327af676fe 100644 |
1672 |
+--- a/drivers/acpi/sleep.c |
1673 |
++++ b/drivers/acpi/sleep.c |
1674 |
+@@ -130,6 +130,12 @@ void __init acpi_nvs_nosave_s3(void) |
1675 |
+ nvs_nosave_s3 = true; |
1676 |
+ } |
1677 |
+ |
1678 |
++static int __init init_nvs_save_s3(const struct dmi_system_id *d) |
1679 |
++{ |
1680 |
++ nvs_nosave_s3 = false; |
1681 |
++ return 0; |
1682 |
++} |
1683 |
++ |
1684 |
+ /* |
1685 |
+ * ACPI 1.0 wants us to execute _PTS before suspending devices, so we allow the |
1686 |
+ * user to request that behavior by using the 'acpi_old_suspend_ordering' |
1687 |
+@@ -324,6 +330,19 @@ static struct dmi_system_id acpisleep_dmi_table[] __initdata = { |
1688 |
+ DMI_MATCH(DMI_PRODUCT_NAME, "K54HR"), |
1689 |
+ }, |
1690 |
+ }, |
1691 |
++ /* |
1692 |
++ * https://bugzilla.kernel.org/show_bug.cgi?id=189431 |
1693 |
++ * Lenovo G50-45 is a platform later than 2012, but needs nvs memory |
1694 |
++ * saving during S3. |
1695 |
++ */ |
1696 |
++ { |
1697 |
++ .callback = init_nvs_save_s3, |
1698 |
++ .ident = "Lenovo G50-45", |
1699 |
++ .matches = { |
1700 |
++ DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), |
1701 |
++ DMI_MATCH(DMI_PRODUCT_NAME, "80E3"), |
1702 |
++ }, |
1703 |
++ }, |
1704 |
+ {}, |
1705 |
+ }; |
1706 |
+ |
1707 |
+diff --git a/drivers/ata/ahci_da850.c b/drivers/ata/ahci_da850.c |
1708 |
+index 267a3d3e79f4..52f2674d5e89 100644 |
1709 |
+--- a/drivers/ata/ahci_da850.c |
1710 |
++++ b/drivers/ata/ahci_da850.c |
1711 |
+@@ -54,11 +54,42 @@ static void da850_sata_init(struct device *dev, void __iomem *pwrdn_reg, |
1712 |
+ writel(val, ahci_base + SATA_P0PHYCR_REG); |
1713 |
+ } |
1714 |
+ |
1715 |
++static int ahci_da850_softreset(struct ata_link *link, |
1716 |
++ unsigned int *class, unsigned long deadline) |
1717 |
++{ |
1718 |
++ int pmp, ret; |
1719 |
++ |
1720 |
++ pmp = sata_srst_pmp(link); |
1721 |
++ |
1722 |
++ /* |
1723 |
++ * There's an issue with the SATA controller on da850 SoCs: if we |
1724 |
++ * enable Port Multiplier support, but the drive is connected directly |
1725 |
++ * to the board, it can't be detected. As a workaround: if PMP is |
1726 |
++ * enabled, we first call ahci_do_softreset() and pass it the result of |
1727 |
++ * sata_srst_pmp(). If this call fails, we retry with pmp = 0. |
1728 |
++ */ |
1729 |
++ ret = ahci_do_softreset(link, class, pmp, deadline, ahci_check_ready); |
1730 |
++ if (pmp && ret == -EBUSY) |
1731 |
++ return ahci_do_softreset(link, class, 0, |
1732 |
++ deadline, ahci_check_ready); |
1733 |
++ |
1734 |
++ return ret; |
1735 |
++} |
1736 |
++ |
1737 |
++static struct ata_port_operations ahci_da850_port_ops = { |
1738 |
++ .inherits = &ahci_platform_ops, |
1739 |
++ .softreset = ahci_da850_softreset, |
1740 |
++ /* |
1741 |
++ * No need to override .pmp_softreset - it's only used for actual |
1742 |
++ * PMP-enabled ports. |
1743 |
++ */ |
1744 |
++}; |
1745 |
++ |
1746 |
+ static const struct ata_port_info ahci_da850_port_info = { |
1747 |
+ .flags = AHCI_FLAG_COMMON, |
1748 |
+ .pio_mask = ATA_PIO4, |
1749 |
+ .udma_mask = ATA_UDMA6, |
1750 |
+- .port_ops = &ahci_platform_ops, |
1751 |
++ .port_ops = &ahci_da850_port_ops, |
1752 |
+ }; |
1753 |
+ |
1754 |
+ static struct scsi_host_template ahci_platform_sht = { |
1755 |
+diff --git a/drivers/char/random.c b/drivers/char/random.c |
1756 |
+index 1ef26403bcc8..433facfd6cb8 100644 |
1757 |
+--- a/drivers/char/random.c |
1758 |
++++ b/drivers/char/random.c |
1759 |
+@@ -2042,63 +2042,65 @@ struct ctl_table random_table[] = { |
1760 |
+ }; |
1761 |
+ #endif /* CONFIG_SYSCTL */ |
1762 |
+ |
1763 |
+-static u32 random_int_secret[MD5_MESSAGE_BYTES / 4] ____cacheline_aligned; |
1764 |
+- |
1765 |
+-int random_int_secret_init(void) |
1766 |
+-{ |
1767 |
+- get_random_bytes(random_int_secret, sizeof(random_int_secret)); |
1768 |
+- return 0; |
1769 |
+-} |
1770 |
+- |
1771 |
+-static DEFINE_PER_CPU(__u32 [MD5_DIGEST_WORDS], get_random_int_hash) |
1772 |
+- __aligned(sizeof(unsigned long)); |
1773 |
++struct batched_entropy { |
1774 |
++ union { |
1775 |
++ unsigned long entropy_long[CHACHA20_BLOCK_SIZE / sizeof(unsigned long)]; |
1776 |
++ unsigned int entropy_int[CHACHA20_BLOCK_SIZE / sizeof(unsigned int)]; |
1777 |
++ }; |
1778 |
++ unsigned int position; |
1779 |
++}; |
1780 |
+ |
1781 |
+ /* |
1782 |
+- * Get a random word for internal kernel use only. Similar to urandom but |
1783 |
+- * with the goal of minimal entropy pool depletion. As a result, the random |
1784 |
+- * value is not cryptographically secure but for several uses the cost of |
1785 |
+- * depleting entropy is too high |
1786 |
++ * Get a random word for internal kernel use only. The quality of the random |
1787 |
++ * number is either as good as RDRAND or as good as /dev/urandom, with the |
1788 |
++ * goal of being quite fast and not depleting entropy. |
1789 |
+ */ |
1790 |
+-unsigned int get_random_int(void) |
1791 |
++static DEFINE_PER_CPU(struct batched_entropy, batched_entropy_long); |
1792 |
++unsigned long get_random_long(void) |
1793 |
+ { |
1794 |
+- __u32 *hash; |
1795 |
+- unsigned int ret; |
1796 |
++ unsigned long ret; |
1797 |
++ struct batched_entropy *batch; |
1798 |
+ |
1799 |
+- if (arch_get_random_int(&ret)) |
1800 |
++ if (arch_get_random_long(&ret)) |
1801 |
+ return ret; |
1802 |
+ |
1803 |
+- hash = get_cpu_var(get_random_int_hash); |
1804 |
+- |
1805 |
+- hash[0] += current->pid + jiffies + random_get_entropy(); |
1806 |
+- md5_transform(hash, random_int_secret); |
1807 |
+- ret = hash[0]; |
1808 |
+- put_cpu_var(get_random_int_hash); |
1809 |
+- |
1810 |
++ batch = &get_cpu_var(batched_entropy_long); |
1811 |
++ if (batch->position % ARRAY_SIZE(batch->entropy_long) == 0) { |
1812 |
++ extract_crng((u8 *)batch->entropy_long); |
1813 |
++ batch->position = 0; |
1814 |
++ } |
1815 |
++ ret = batch->entropy_long[batch->position++]; |
1816 |
++ put_cpu_var(batched_entropy_long); |
1817 |
+ return ret; |
1818 |
+ } |
1819 |
+-EXPORT_SYMBOL(get_random_int); |
1820 |
++EXPORT_SYMBOL(get_random_long); |
1821 |
+ |
1822 |
+-/* |
1823 |
+- * Same as get_random_int(), but returns unsigned long. |
1824 |
+- */ |
1825 |
+-unsigned long get_random_long(void) |
1826 |
++#if BITS_PER_LONG == 32 |
1827 |
++unsigned int get_random_int(void) |
1828 |
+ { |
1829 |
+- __u32 *hash; |
1830 |
+- unsigned long ret; |
1831 |
++ return get_random_long(); |
1832 |
++} |
1833 |
++#else |
1834 |
++static DEFINE_PER_CPU(struct batched_entropy, batched_entropy_int); |
1835 |
++unsigned int get_random_int(void) |
1836 |
++{ |
1837 |
++ unsigned int ret; |
1838 |
++ struct batched_entropy *batch; |
1839 |
+ |
1840 |
+- if (arch_get_random_long(&ret)) |
1841 |
++ if (arch_get_random_int(&ret)) |
1842 |
+ return ret; |
1843 |
+ |
1844 |
+- hash = get_cpu_var(get_random_int_hash); |
1845 |
+- |
1846 |
+- hash[0] += current->pid + jiffies + random_get_entropy(); |
1847 |
+- md5_transform(hash, random_int_secret); |
1848 |
+- ret = *(unsigned long *)hash; |
1849 |
+- put_cpu_var(get_random_int_hash); |
1850 |
+- |
1851 |
++ batch = &get_cpu_var(batched_entropy_int); |
1852 |
++ if (batch->position % ARRAY_SIZE(batch->entropy_int) == 0) { |
1853 |
++ extract_crng((u8 *)batch->entropy_int); |
1854 |
++ batch->position = 0; |
1855 |
++ } |
1856 |
++ ret = batch->entropy_int[batch->position++]; |
1857 |
++ put_cpu_var(batched_entropy_int); |
1858 |
+ return ret; |
1859 |
+ } |
1860 |
+-EXPORT_SYMBOL(get_random_long); |
1861 |
++#endif |
1862 |
++EXPORT_SYMBOL(get_random_int); |
1863 |
+ |
1864 |
+ /** |
1865 |
+ * randomize_page - Generate a random, page aligned address |
1866 |
+diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c |
1867 |
+index 4a0f5ead4fb5..1e2e5198db53 100644 |
1868 |
+--- a/drivers/firmware/qcom_scm-64.c |
1869 |
++++ b/drivers/firmware/qcom_scm-64.c |
1870 |
+@@ -91,6 +91,7 @@ static int qcom_scm_call(struct device *dev, u32 svc_id, u32 cmd_id, |
1871 |
+ dma_addr_t args_phys = 0; |
1872 |
+ void *args_virt = NULL; |
1873 |
+ size_t alloc_len; |
1874 |
++ struct arm_smccc_quirk quirk = {.id = ARM_SMCCC_QUIRK_QCOM_A6}; |
1875 |
+ |
1876 |
+ if (unlikely(arglen > N_REGISTER_ARGS)) { |
1877 |
+ alloc_len = N_EXT_QCOM_SCM_ARGS * sizeof(u64); |
1878 |
+@@ -131,10 +132,16 @@ static int qcom_scm_call(struct device *dev, u32 svc_id, u32 cmd_id, |
1879 |
+ qcom_smccc_convention, |
1880 |
+ ARM_SMCCC_OWNER_SIP, fn_id); |
1881 |
+ |
1882 |
++ quirk.state.a6 = 0; |
1883 |
++ |
1884 |
+ do { |
1885 |
+- arm_smccc_smc(cmd, desc->arginfo, desc->args[0], |
1886 |
+- desc->args[1], desc->args[2], x5, 0, 0, |
1887 |
+- res); |
1888 |
++ arm_smccc_smc_quirk(cmd, desc->arginfo, desc->args[0], |
1889 |
++ desc->args[1], desc->args[2], x5, |
1890 |
++ quirk.state.a6, 0, res, &quirk); |
1891 |
++ |
1892 |
++ if (res->a0 == QCOM_SCM_INTERRUPTED) |
1893 |
++ cmd = res->a0; |
1894 |
++ |
1895 |
+ } while (res->a0 == QCOM_SCM_INTERRUPTED); |
1896 |
+ |
1897 |
+ mutex_unlock(&qcom_scm_lock); |
1898 |
+diff --git a/drivers/gpio/gpiolib-acpi.c b/drivers/gpio/gpiolib-acpi.c |
1899 |
+index a3faefa44f68..d3f9f028a37b 100644 |
1900 |
+--- a/drivers/gpio/gpiolib-acpi.c |
1901 |
++++ b/drivers/gpio/gpiolib-acpi.c |
1902 |
+@@ -572,8 +572,10 @@ struct gpio_desc *acpi_find_gpio(struct device *dev, |
1903 |
+ } |
1904 |
+ |
1905 |
+ desc = acpi_get_gpiod_by_index(adev, propname, idx, &info); |
1906 |
+- if (!IS_ERR(desc) || (PTR_ERR(desc) == -EPROBE_DEFER)) |
1907 |
++ if (!IS_ERR(desc)) |
1908 |
+ break; |
1909 |
++ if (PTR_ERR(desc) == -EPROBE_DEFER) |
1910 |
++ return ERR_CAST(desc); |
1911 |
+ } |
1912 |
+ |
1913 |
+ /* Then from plain _CRS GPIOs */ |
1914 |
+diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c |
1915 |
+index ec6474b01dbc..7cce86933000 100644 |
1916 |
+--- a/drivers/gpu/drm/drm_edid.c |
1917 |
++++ b/drivers/gpu/drm/drm_edid.c |
1918 |
+@@ -90,7 +90,7 @@ struct detailed_mode_closure { |
1919 |
+ #define LEVEL_GTF2 2 |
1920 |
+ #define LEVEL_CVT 3 |
1921 |
+ |
1922 |
+-static struct edid_quirk { |
1923 |
++static const struct edid_quirk { |
1924 |
+ char vendor[4]; |
1925 |
+ int product_id; |
1926 |
+ u32 quirks; |
1927 |
+@@ -1480,7 +1480,7 @@ EXPORT_SYMBOL(drm_edid_duplicate); |
1928 |
+ * |
1929 |
+ * Returns true if @vendor is in @edid, false otherwise |
1930 |
+ */ |
1931 |
+-static bool edid_vendor(struct edid *edid, char *vendor) |
1932 |
++static bool edid_vendor(struct edid *edid, const char *vendor) |
1933 |
+ { |
1934 |
+ char edid_vendor[3]; |
1935 |
+ |
1936 |
+@@ -1500,7 +1500,7 @@ static bool edid_vendor(struct edid *edid, char *vendor) |
1937 |
+ */ |
1938 |
+ static u32 edid_get_quirks(struct edid *edid) |
1939 |
+ { |
1940 |
+- struct edid_quirk *quirk; |
1941 |
++ const struct edid_quirk *quirk; |
1942 |
+ int i; |
1943 |
+ |
1944 |
+ for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) { |
1945 |
+diff --git a/drivers/gpu/drm/i915/gvt/kvmgt.c b/drivers/gpu/drm/i915/gvt/kvmgt.c |
1946 |
+index 325cb9b55989..5f30a0716531 100644 |
1947 |
+--- a/drivers/gpu/drm/i915/gvt/kvmgt.c |
1948 |
++++ b/drivers/gpu/drm/i915/gvt/kvmgt.c |
1949 |
+@@ -1422,7 +1422,7 @@ static int kvmgt_rw_gpa(unsigned long handle, unsigned long gpa, |
1950 |
+ { |
1951 |
+ struct kvmgt_guest_info *info; |
1952 |
+ struct kvm *kvm; |
1953 |
+- int ret; |
1954 |
++ int idx, ret; |
1955 |
+ bool kthread = current->mm == NULL; |
1956 |
+ |
1957 |
+ if (!handle_valid(handle)) |
1958 |
+@@ -1434,8 +1434,10 @@ static int kvmgt_rw_gpa(unsigned long handle, unsigned long gpa, |
1959 |
+ if (kthread) |
1960 |
+ use_mm(kvm->mm); |
1961 |
+ |
1962 |
++ idx = srcu_read_lock(&kvm->srcu); |
1963 |
+ ret = write ? kvm_write_guest(kvm, gpa, buf, len) : |
1964 |
+ kvm_read_guest(kvm, gpa, buf, len); |
1965 |
++ srcu_read_unlock(&kvm->srcu, idx); |
1966 |
+ |
1967 |
+ if (kthread) |
1968 |
+ unuse_mm(kvm->mm); |
1969 |
+diff --git a/drivers/gpu/drm/i915/gvt/sched_policy.c b/drivers/gpu/drm/i915/gvt/sched_policy.c |
1970 |
+index 678b0be85376..3635dbe328ef 100644 |
1971 |
+--- a/drivers/gpu/drm/i915/gvt/sched_policy.c |
1972 |
++++ b/drivers/gpu/drm/i915/gvt/sched_policy.c |
1973 |
+@@ -101,7 +101,7 @@ struct tbs_sched_data { |
1974 |
+ struct list_head runq_head; |
1975 |
+ }; |
1976 |
+ |
1977 |
+-#define GVT_DEFAULT_TIME_SLICE (1 * HZ / 1000) |
1978 |
++#define GVT_DEFAULT_TIME_SLICE (msecs_to_jiffies(1)) |
1979 |
+ |
1980 |
+ static void tbs_sched_func(struct work_struct *work) |
1981 |
+ { |
1982 |
+@@ -224,7 +224,7 @@ static void tbs_sched_start_schedule(struct intel_vgpu *vgpu) |
1983 |
+ return; |
1984 |
+ |
1985 |
+ list_add_tail(&vgpu_data->list, &sched_data->runq_head); |
1986 |
+- schedule_delayed_work(&sched_data->work, sched_data->period); |
1987 |
++ schedule_delayed_work(&sched_data->work, 0); |
1988 |
+ } |
1989 |
+ |
1990 |
+ static void tbs_sched_stop_schedule(struct intel_vgpu *vgpu) |
1991 |
+diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c |
1992 |
+index fce8e198bc76..08e274e16165 100644 |
1993 |
+--- a/drivers/gpu/drm/i915/i915_pci.c |
1994 |
++++ b/drivers/gpu/drm/i915/i915_pci.c |
1995 |
+@@ -421,6 +421,7 @@ static const struct pci_device_id pciidlist[] = { |
1996 |
+ INTEL_VLV_IDS(&intel_valleyview_info), |
1997 |
+ INTEL_BDW_GT12_IDS(&intel_broadwell_info), |
1998 |
+ INTEL_BDW_GT3_IDS(&intel_broadwell_gt3_info), |
1999 |
++ INTEL_BDW_RSVD_IDS(&intel_broadwell_info), |
2000 |
+ INTEL_CHV_IDS(&intel_cherryview_info), |
2001 |
+ INTEL_SKL_GT1_IDS(&intel_skylake_info), |
2002 |
+ INTEL_SKL_GT2_IDS(&intel_skylake_info), |
2003 |
+diff --git a/drivers/gpu/drm/mga/mga_dma.c b/drivers/gpu/drm/mga/mga_dma.c |
2004 |
+index 1f2f9ca25901..4556e2b13ac5 100644 |
2005 |
+--- a/drivers/gpu/drm/mga/mga_dma.c |
2006 |
++++ b/drivers/gpu/drm/mga/mga_dma.c |
2007 |
+@@ -392,6 +392,24 @@ int mga_driver_load(struct drm_device *dev, unsigned long flags) |
2008 |
+ drm_mga_private_t *dev_priv; |
2009 |
+ int ret; |
2010 |
+ |
2011 |
++ /* There are PCI versions of the G450. These cards have the |
2012 |
++ * same PCI ID as the AGP G450, but have an additional PCI-to-PCI |
2013 |
++ * bridge chip. We detect these cards, which are not currently |
2014 |
++ * supported by this driver, by looking at the device ID of the |
2015 |
++ * bus the "card" is on. If vendor is 0x3388 (Hint Corp) and the |
2016 |
++ * device is 0x0021 (HB6 Universal PCI-PCI bridge), we reject the |
2017 |
++ * device. |
2018 |
++ */ |
2019 |
++ if ((dev->pdev->device == 0x0525) && dev->pdev->bus->self |
2020 |
++ && (dev->pdev->bus->self->vendor == 0x3388) |
2021 |
++ && (dev->pdev->bus->self->device == 0x0021) |
2022 |
++ && dev->agp) { |
2023 |
++ /* FIXME: This should be quirked in the pci core, but oh well |
2024 |
++ * the hw probably stopped existing. */ |
2025 |
++ arch_phys_wc_del(dev->agp->agp_mtrr); |
2026 |
++ kfree(dev->agp); |
2027 |
++ dev->agp = NULL; |
2028 |
++ } |
2029 |
+ dev_priv = kzalloc(sizeof(drm_mga_private_t), GFP_KERNEL); |
2030 |
+ if (!dev_priv) |
2031 |
+ return -ENOMEM; |
2032 |
+@@ -698,7 +716,7 @@ static int mga_do_pci_dma_bootstrap(struct drm_device *dev, |
2033 |
+ static int mga_do_dma_bootstrap(struct drm_device *dev, |
2034 |
+ drm_mga_dma_bootstrap_t *dma_bs) |
2035 |
+ { |
2036 |
+- const int is_agp = (dma_bs->agp_mode != 0) && drm_pci_device_is_agp(dev); |
2037 |
++ const int is_agp = (dma_bs->agp_mode != 0) && dev->agp; |
2038 |
+ int err; |
2039 |
+ drm_mga_private_t *const dev_priv = |
2040 |
+ (drm_mga_private_t *) dev->dev_private; |
2041 |
+diff --git a/drivers/gpu/drm/mga/mga_drv.c b/drivers/gpu/drm/mga/mga_drv.c |
2042 |
+index 25b2a1a424e6..63ba0699d107 100644 |
2043 |
+--- a/drivers/gpu/drm/mga/mga_drv.c |
2044 |
++++ b/drivers/gpu/drm/mga/mga_drv.c |
2045 |
+@@ -37,8 +37,6 @@ |
2046 |
+ |
2047 |
+ #include <drm/drm_pciids.h> |
2048 |
+ |
2049 |
+-static int mga_driver_device_is_agp(struct drm_device *dev); |
2050 |
+- |
2051 |
+ static struct pci_device_id pciidlist[] = { |
2052 |
+ mga_PCI_IDS |
2053 |
+ }; |
2054 |
+@@ -66,7 +64,6 @@ static struct drm_driver driver = { |
2055 |
+ .lastclose = mga_driver_lastclose, |
2056 |
+ .set_busid = drm_pci_set_busid, |
2057 |
+ .dma_quiescent = mga_driver_dma_quiescent, |
2058 |
+- .device_is_agp = mga_driver_device_is_agp, |
2059 |
+ .get_vblank_counter = mga_get_vblank_counter, |
2060 |
+ .enable_vblank = mga_enable_vblank, |
2061 |
+ .disable_vblank = mga_disable_vblank, |
2062 |
+@@ -107,37 +104,3 @@ module_exit(mga_exit); |
2063 |
+ MODULE_AUTHOR(DRIVER_AUTHOR); |
2064 |
+ MODULE_DESCRIPTION(DRIVER_DESC); |
2065 |
+ MODULE_LICENSE("GPL and additional rights"); |
2066 |
+- |
2067 |
+-/** |
2068 |
+- * Determine if the device really is AGP or not. |
2069 |
+- * |
2070 |
+- * In addition to the usual tests performed by \c drm_device_is_agp, this |
2071 |
+- * function detects PCI G450 cards that appear to the system exactly like |
2072 |
+- * AGP G450 cards. |
2073 |
+- * |
2074 |
+- * \param dev The device to be tested. |
2075 |
+- * |
2076 |
+- * \returns |
2077 |
+- * If the device is a PCI G450, zero is returned. Otherwise 2 is returned. |
2078 |
+- */ |
2079 |
+-static int mga_driver_device_is_agp(struct drm_device *dev) |
2080 |
+-{ |
2081 |
+- const struct pci_dev *const pdev = dev->pdev; |
2082 |
+- |
2083 |
+- /* There are PCI versions of the G450. These cards have the |
2084 |
+- * same PCI ID as the AGP G450, but have an additional PCI-to-PCI |
2085 |
+- * bridge chip. We detect these cards, which are not currently |
2086 |
+- * supported by this driver, by looking at the device ID of the |
2087 |
+- * bus the "card" is on. If vendor is 0x3388 (Hint Corp) and the |
2088 |
+- * device is 0x0021 (HB6 Universal PCI-PCI bridge), we reject the |
2089 |
+- * device. |
2090 |
+- */ |
2091 |
+- |
2092 |
+- if ((pdev->device == 0x0525) && pdev->bus->self |
2093 |
+- && (pdev->bus->self->vendor == 0x3388) |
2094 |
+- && (pdev->bus->self->device == 0x0021)) { |
2095 |
+- return 0; |
2096 |
+- } |
2097 |
+- |
2098 |
+- return 2; |
2099 |
+-} |
2100 |
+diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c |
2101 |
+index b8647198c11c..657874077400 100644 |
2102 |
+--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c |
2103 |
++++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c |
2104 |
+@@ -846,7 +846,9 @@ static const struct adreno_gpu_funcs funcs = { |
2105 |
+ .idle = a5xx_idle, |
2106 |
+ .irq = a5xx_irq, |
2107 |
+ .destroy = a5xx_destroy, |
2108 |
++#ifdef CONFIG_DEBUG_FS |
2109 |
+ .show = a5xx_show, |
2110 |
++#endif |
2111 |
+ }, |
2112 |
+ .get_timestamp = a5xx_get_timestamp, |
2113 |
+ }; |
2114 |
+diff --git a/drivers/gpu/drm/ttm/ttm_object.c b/drivers/gpu/drm/ttm/ttm_object.c |
2115 |
+index 4f5fa8d65fe9..144367c0c28f 100644 |
2116 |
+--- a/drivers/gpu/drm/ttm/ttm_object.c |
2117 |
++++ b/drivers/gpu/drm/ttm/ttm_object.c |
2118 |
+@@ -179,7 +179,7 @@ int ttm_base_object_init(struct ttm_object_file *tfile, |
2119 |
+ if (unlikely(ret != 0)) |
2120 |
+ goto out_err0; |
2121 |
+ |
2122 |
+- ret = ttm_ref_object_add(tfile, base, TTM_REF_USAGE, NULL); |
2123 |
++ ret = ttm_ref_object_add(tfile, base, TTM_REF_USAGE, NULL, false); |
2124 |
+ if (unlikely(ret != 0)) |
2125 |
+ goto out_err1; |
2126 |
+ |
2127 |
+@@ -318,7 +318,8 @@ EXPORT_SYMBOL(ttm_ref_object_exists); |
2128 |
+ |
2129 |
+ int ttm_ref_object_add(struct ttm_object_file *tfile, |
2130 |
+ struct ttm_base_object *base, |
2131 |
+- enum ttm_ref_type ref_type, bool *existed) |
2132 |
++ enum ttm_ref_type ref_type, bool *existed, |
2133 |
++ bool require_existed) |
2134 |
+ { |
2135 |
+ struct drm_open_hash *ht = &tfile->ref_hash[ref_type]; |
2136 |
+ struct ttm_ref_object *ref; |
2137 |
+@@ -345,6 +346,9 @@ int ttm_ref_object_add(struct ttm_object_file *tfile, |
2138 |
+ } |
2139 |
+ |
2140 |
+ rcu_read_unlock(); |
2141 |
++ if (require_existed) |
2142 |
++ return -EPERM; |
2143 |
++ |
2144 |
+ ret = ttm_mem_global_alloc(mem_glob, sizeof(*ref), |
2145 |
+ false, false); |
2146 |
+ if (unlikely(ret != 0)) |
2147 |
+@@ -635,7 +639,7 @@ int ttm_prime_fd_to_handle(struct ttm_object_file *tfile, |
2148 |
+ prime = (struct ttm_prime_object *) dma_buf->priv; |
2149 |
+ base = &prime->base; |
2150 |
+ *handle = base->hash.key; |
2151 |
+- ret = ttm_ref_object_add(tfile, base, TTM_REF_USAGE, NULL); |
2152 |
++ ret = ttm_ref_object_add(tfile, base, TTM_REF_USAGE, NULL, false); |
2153 |
+ |
2154 |
+ dma_buf_put(dma_buf); |
2155 |
+ |
2156 |
+diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c b/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c |
2157 |
+index 6541dd8b82dc..6b2708b4eafe 100644 |
2158 |
+--- a/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c |
2159 |
++++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c |
2160 |
+@@ -538,7 +538,7 @@ int vmw_fence_create(struct vmw_fence_manager *fman, |
2161 |
+ struct vmw_fence_obj **p_fence) |
2162 |
+ { |
2163 |
+ struct vmw_fence_obj *fence; |
2164 |
+- int ret; |
2165 |
++ int ret; |
2166 |
+ |
2167 |
+ fence = kzalloc(sizeof(*fence), GFP_KERNEL); |
2168 |
+ if (unlikely(fence == NULL)) |
2169 |
+@@ -701,6 +701,41 @@ void vmw_fence_fifo_up(struct vmw_fence_manager *fman) |
2170 |
+ } |
2171 |
+ |
2172 |
+ |
2173 |
++/** |
2174 |
++ * vmw_fence_obj_lookup - Look up a user-space fence object |
2175 |
++ * |
2176 |
++ * @tfile: A struct ttm_object_file identifying the caller. |
2177 |
++ * @handle: A handle identifying the fence object. |
2178 |
++ * @return: A struct vmw_user_fence base ttm object on success or |
2179 |
++ * an error pointer on failure. |
2180 |
++ * |
2181 |
++ * The fence object is looked up and type-checked. The caller needs |
2182 |
++ * to have opened the fence object first, but since that happens on |
2183 |
++ * creation and fence objects aren't shareable, that's not an |
2184 |
++ * issue currently. |
2185 |
++ */ |
2186 |
++static struct ttm_base_object * |
2187 |
++vmw_fence_obj_lookup(struct ttm_object_file *tfile, u32 handle) |
2188 |
++{ |
2189 |
++ struct ttm_base_object *base = ttm_base_object_lookup(tfile, handle); |
2190 |
++ |
2191 |
++ if (!base) { |
2192 |
++ pr_err("Invalid fence object handle 0x%08lx.\n", |
2193 |
++ (unsigned long)handle); |
2194 |
++ return ERR_PTR(-EINVAL); |
2195 |
++ } |
2196 |
++ |
2197 |
++ if (base->refcount_release != vmw_user_fence_base_release) { |
2198 |
++ pr_err("Invalid fence object handle 0x%08lx.\n", |
2199 |
++ (unsigned long)handle); |
2200 |
++ ttm_base_object_unref(&base); |
2201 |
++ return ERR_PTR(-EINVAL); |
2202 |
++ } |
2203 |
++ |
2204 |
++ return base; |
2205 |
++} |
2206 |
++ |
2207 |
++ |
2208 |
+ int vmw_fence_obj_wait_ioctl(struct drm_device *dev, void *data, |
2209 |
+ struct drm_file *file_priv) |
2210 |
+ { |
2211 |
+@@ -726,13 +761,9 @@ int vmw_fence_obj_wait_ioctl(struct drm_device *dev, void *data, |
2212 |
+ arg->kernel_cookie = jiffies + wait_timeout; |
2213 |
+ } |
2214 |
+ |
2215 |
+- base = ttm_base_object_lookup(tfile, arg->handle); |
2216 |
+- if (unlikely(base == NULL)) { |
2217 |
+- printk(KERN_ERR "Wait invalid fence object handle " |
2218 |
+- "0x%08lx.\n", |
2219 |
+- (unsigned long)arg->handle); |
2220 |
+- return -EINVAL; |
2221 |
+- } |
2222 |
++ base = vmw_fence_obj_lookup(tfile, arg->handle); |
2223 |
++ if (IS_ERR(base)) |
2224 |
++ return PTR_ERR(base); |
2225 |
+ |
2226 |
+ fence = &(container_of(base, struct vmw_user_fence, base)->fence); |
2227 |
+ |
2228 |
+@@ -771,13 +802,9 @@ int vmw_fence_obj_signaled_ioctl(struct drm_device *dev, void *data, |
2229 |
+ struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile; |
2230 |
+ struct vmw_private *dev_priv = vmw_priv(dev); |
2231 |
+ |
2232 |
+- base = ttm_base_object_lookup(tfile, arg->handle); |
2233 |
+- if (unlikely(base == NULL)) { |
2234 |
+- printk(KERN_ERR "Fence signaled invalid fence object handle " |
2235 |
+- "0x%08lx.\n", |
2236 |
+- (unsigned long)arg->handle); |
2237 |
+- return -EINVAL; |
2238 |
+- } |
2239 |
++ base = vmw_fence_obj_lookup(tfile, arg->handle); |
2240 |
++ if (IS_ERR(base)) |
2241 |
++ return PTR_ERR(base); |
2242 |
+ |
2243 |
+ fence = &(container_of(base, struct vmw_user_fence, base)->fence); |
2244 |
+ fman = fman_from_fence(fence); |
2245 |
+@@ -1024,6 +1051,7 @@ int vmw_fence_event_ioctl(struct drm_device *dev, void *data, |
2246 |
+ (struct drm_vmw_fence_event_arg *) data; |
2247 |
+ struct vmw_fence_obj *fence = NULL; |
2248 |
+ struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv); |
2249 |
++ struct ttm_object_file *tfile = vmw_fp->tfile; |
2250 |
+ struct drm_vmw_fence_rep __user *user_fence_rep = |
2251 |
+ (struct drm_vmw_fence_rep __user *)(unsigned long) |
2252 |
+ arg->fence_rep; |
2253 |
+@@ -1037,24 +1065,18 @@ int vmw_fence_event_ioctl(struct drm_device *dev, void *data, |
2254 |
+ */ |
2255 |
+ if (arg->handle) { |
2256 |
+ struct ttm_base_object *base = |
2257 |
+- ttm_base_object_lookup_for_ref(dev_priv->tdev, |
2258 |
+- arg->handle); |
2259 |
+- |
2260 |
+- if (unlikely(base == NULL)) { |
2261 |
+- DRM_ERROR("Fence event invalid fence object handle " |
2262 |
+- "0x%08lx.\n", |
2263 |
+- (unsigned long)arg->handle); |
2264 |
+- return -EINVAL; |
2265 |
+- } |
2266 |
++ vmw_fence_obj_lookup(tfile, arg->handle); |
2267 |
++ |
2268 |
++ if (IS_ERR(base)) |
2269 |
++ return PTR_ERR(base); |
2270 |
++ |
2271 |
+ fence = &(container_of(base, struct vmw_user_fence, |
2272 |
+ base)->fence); |
2273 |
+ (void) vmw_fence_obj_reference(fence); |
2274 |
+ |
2275 |
+ if (user_fence_rep != NULL) { |
2276 |
+- bool existed; |
2277 |
+- |
2278 |
+ ret = ttm_ref_object_add(vmw_fp->tfile, base, |
2279 |
+- TTM_REF_USAGE, &existed); |
2280 |
++ TTM_REF_USAGE, NULL, false); |
2281 |
+ if (unlikely(ret != 0)) { |
2282 |
+ DRM_ERROR("Failed to reference a fence " |
2283 |
+ "object.\n"); |
2284 |
+@@ -1097,8 +1119,7 @@ int vmw_fence_event_ioctl(struct drm_device *dev, void *data, |
2285 |
+ return 0; |
2286 |
+ out_no_create: |
2287 |
+ if (user_fence_rep != NULL) |
2288 |
+- ttm_ref_object_base_unref(vmw_fpriv(file_priv)->tfile, |
2289 |
+- handle, TTM_REF_USAGE); |
2290 |
++ ttm_ref_object_base_unref(tfile, handle, TTM_REF_USAGE); |
2291 |
+ out_no_ref_obj: |
2292 |
+ vmw_fence_obj_unreference(&fence); |
2293 |
+ return ret; |
2294 |
+diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c |
2295 |
+index b8c6a03c8c54..5ec24fd801cd 100644 |
2296 |
+--- a/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c |
2297 |
++++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c |
2298 |
+@@ -114,8 +114,6 @@ int vmw_getparam_ioctl(struct drm_device *dev, void *data, |
2299 |
+ param->value = dev_priv->has_dx; |
2300 |
+ break; |
2301 |
+ default: |
2302 |
+- DRM_ERROR("Illegal vmwgfx get param request: %d\n", |
2303 |
+- param->param); |
2304 |
+ return -EINVAL; |
2305 |
+ } |
2306 |
+ |
2307 |
+@@ -186,7 +184,7 @@ int vmw_get_cap_3d_ioctl(struct drm_device *dev, void *data, |
2308 |
+ bool gb_objects = !!(dev_priv->capabilities & SVGA_CAP_GBOBJECTS); |
2309 |
+ struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv); |
2310 |
+ |
2311 |
+- if (unlikely(arg->pad64 != 0)) { |
2312 |
++ if (unlikely(arg->pad64 != 0 || arg->max_size == 0)) { |
2313 |
+ DRM_ERROR("Illegal GET_3D_CAP argument.\n"); |
2314 |
+ return -EINVAL; |
2315 |
+ } |
2316 |
+diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c |
2317 |
+index 8e86d6d4141b..53fa9f1c1d10 100644 |
2318 |
+--- a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c |
2319 |
++++ b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c |
2320 |
+@@ -589,7 +589,7 @@ static int vmw_user_dmabuf_synccpu_grab(struct vmw_user_dma_buffer *user_bo, |
2321 |
+ return ret; |
2322 |
+ |
2323 |
+ ret = ttm_ref_object_add(tfile, &user_bo->prime.base, |
2324 |
+- TTM_REF_SYNCCPU_WRITE, &existed); |
2325 |
++ TTM_REF_SYNCCPU_WRITE, &existed, false); |
2326 |
+ if (ret != 0 || existed) |
2327 |
+ ttm_bo_synccpu_write_release(&user_bo->dma.base); |
2328 |
+ |
2329 |
+@@ -773,7 +773,7 @@ int vmw_user_dmabuf_reference(struct ttm_object_file *tfile, |
2330 |
+ |
2331 |
+ *handle = user_bo->prime.base.hash.key; |
2332 |
+ return ttm_ref_object_add(tfile, &user_bo->prime.base, |
2333 |
+- TTM_REF_USAGE, NULL); |
2334 |
++ TTM_REF_USAGE, NULL, false); |
2335 |
+ } |
2336 |
+ |
2337 |
+ /* |
2338 |
+diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c |
2339 |
+index b445ce9b9757..05fa092c942b 100644 |
2340 |
+--- a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c |
2341 |
++++ b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c |
2342 |
+@@ -713,11 +713,14 @@ int vmw_surface_define_ioctl(struct drm_device *dev, void *data, |
2343 |
+ 128; |
2344 |
+ |
2345 |
+ num_sizes = 0; |
2346 |
+- for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i) |
2347 |
++ for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i) { |
2348 |
++ if (req->mip_levels[i] > DRM_VMW_MAX_MIP_LEVELS) |
2349 |
++ return -EINVAL; |
2350 |
+ num_sizes += req->mip_levels[i]; |
2351 |
++ } |
2352 |
+ |
2353 |
+- if (num_sizes > DRM_VMW_MAX_SURFACE_FACES * |
2354 |
+- DRM_VMW_MAX_MIP_LEVELS) |
2355 |
++ if (num_sizes > DRM_VMW_MAX_SURFACE_FACES * DRM_VMW_MAX_MIP_LEVELS || |
2356 |
++ num_sizes == 0) |
2357 |
+ return -EINVAL; |
2358 |
+ |
2359 |
+ size = vmw_user_surface_size + 128 + |
2360 |
+@@ -891,17 +894,16 @@ vmw_surface_handle_reference(struct vmw_private *dev_priv, |
2361 |
+ uint32_t handle; |
2362 |
+ struct ttm_base_object *base; |
2363 |
+ int ret; |
2364 |
++ bool require_exist = false; |
2365 |
+ |
2366 |
+ if (handle_type == DRM_VMW_HANDLE_PRIME) { |
2367 |
+ ret = ttm_prime_fd_to_handle(tfile, u_handle, &handle); |
2368 |
+ if (unlikely(ret != 0)) |
2369 |
+ return ret; |
2370 |
+ } else { |
2371 |
+- if (unlikely(drm_is_render_client(file_priv))) { |
2372 |
+- DRM_ERROR("Render client refused legacy " |
2373 |
+- "surface reference.\n"); |
2374 |
+- return -EACCES; |
2375 |
+- } |
2376 |
++ if (unlikely(drm_is_render_client(file_priv))) |
2377 |
++ require_exist = true; |
2378 |
++ |
2379 |
+ if (ACCESS_ONCE(vmw_fpriv(file_priv)->locked_master)) { |
2380 |
+ DRM_ERROR("Locked master refused legacy " |
2381 |
+ "surface reference.\n"); |
2382 |
+@@ -929,17 +931,14 @@ vmw_surface_handle_reference(struct vmw_private *dev_priv, |
2383 |
+ |
2384 |
+ /* |
2385 |
+ * Make sure the surface creator has the same |
2386 |
+- * authenticating master. |
2387 |
++ * authenticating master, or is already registered with us. |
2388 |
+ */ |
2389 |
+ if (drm_is_primary_client(file_priv) && |
2390 |
+- user_srf->master != file_priv->master) { |
2391 |
+- DRM_ERROR("Trying to reference surface outside of" |
2392 |
+- " master domain.\n"); |
2393 |
+- ret = -EACCES; |
2394 |
+- goto out_bad_resource; |
2395 |
+- } |
2396 |
++ user_srf->master != file_priv->master) |
2397 |
++ require_exist = true; |
2398 |
+ |
2399 |
+- ret = ttm_ref_object_add(tfile, base, TTM_REF_USAGE, NULL); |
2400 |
++ ret = ttm_ref_object_add(tfile, base, TTM_REF_USAGE, NULL, |
2401 |
++ require_exist); |
2402 |
+ if (unlikely(ret != 0)) { |
2403 |
+ DRM_ERROR("Could not add a reference to a surface.\n"); |
2404 |
+ goto out_bad_resource; |
2405 |
+diff --git a/drivers/hid/wacom_wac.c b/drivers/hid/wacom_wac.c |
2406 |
+index 672145b0d8f5..6ef4f2fcfe43 100644 |
2407 |
+--- a/drivers/hid/wacom_wac.c |
2408 |
++++ b/drivers/hid/wacom_wac.c |
2409 |
+@@ -3290,6 +3290,9 @@ int wacom_setup_pad_input_capabilities(struct input_dev *input_dev, |
2410 |
+ { |
2411 |
+ struct wacom_features *features = &wacom_wac->features; |
2412 |
+ |
2413 |
++ if ((features->type == HID_GENERIC) && features->numbered_buttons > 0) |
2414 |
++ features->device_type |= WACOM_DEVICETYPE_PAD; |
2415 |
++ |
2416 |
+ if (!(features->device_type & WACOM_DEVICETYPE_PAD)) |
2417 |
+ return -ENODEV; |
2418 |
+ |
2419 |
+diff --git a/drivers/iio/gyro/bmg160_core.c b/drivers/iio/gyro/bmg160_core.c |
2420 |
+index f7fcfa886f72..821919dd245b 100644 |
2421 |
+--- a/drivers/iio/gyro/bmg160_core.c |
2422 |
++++ b/drivers/iio/gyro/bmg160_core.c |
2423 |
+@@ -27,6 +27,7 @@ |
2424 |
+ #include <linux/iio/trigger_consumer.h> |
2425 |
+ #include <linux/iio/triggered_buffer.h> |
2426 |
+ #include <linux/regmap.h> |
2427 |
++#include <linux/delay.h> |
2428 |
+ #include "bmg160.h" |
2429 |
+ |
2430 |
+ #define BMG160_IRQ_NAME "bmg160_event" |
2431 |
+@@ -52,6 +53,9 @@ |
2432 |
+ #define BMG160_DEF_BW 100 |
2433 |
+ #define BMG160_REG_PMU_BW_RES BIT(7) |
2434 |
+ |
2435 |
++#define BMG160_GYRO_REG_RESET 0x14 |
2436 |
++#define BMG160_GYRO_RESET_VAL 0xb6 |
2437 |
++ |
2438 |
+ #define BMG160_REG_INT_MAP_0 0x17 |
2439 |
+ #define BMG160_INT_MAP_0_BIT_ANY BIT(1) |
2440 |
+ |
2441 |
+@@ -236,6 +240,14 @@ static int bmg160_chip_init(struct bmg160_data *data) |
2442 |
+ int ret; |
2443 |
+ unsigned int val; |
2444 |
+ |
2445 |
++ /* |
2446 |
++ * Reset chip to get it in a known good state. A delay of 30ms after |
2447 |
++ * reset is required according to the datasheet. |
2448 |
++ */ |
2449 |
++ regmap_write(data->regmap, BMG160_GYRO_REG_RESET, |
2450 |
++ BMG160_GYRO_RESET_VAL); |
2451 |
++ usleep_range(30000, 30700); |
2452 |
++ |
2453 |
+ ret = regmap_read(data->regmap, BMG160_REG_CHIP_ID, &val); |
2454 |
+ if (ret < 0) { |
2455 |
+ dev_err(dev, "Error reading reg_chip_id\n"); |
2456 |
+diff --git a/drivers/iio/industrialio-core.c b/drivers/iio/industrialio-core.c |
2457 |
+index aaca42862389..d9c15e411e10 100644 |
2458 |
+--- a/drivers/iio/industrialio-core.c |
2459 |
++++ b/drivers/iio/industrialio-core.c |
2460 |
+@@ -608,10 +608,9 @@ static ssize_t __iio_format_value(char *buf, size_t len, unsigned int type, |
2461 |
+ tmp0 = (int)div_s64_rem(tmp, 1000000000, &tmp1); |
2462 |
+ return snprintf(buf, len, "%d.%09u", tmp0, abs(tmp1)); |
2463 |
+ case IIO_VAL_FRACTIONAL_LOG2: |
2464 |
+- tmp = (s64)vals[0] * 1000000000LL >> vals[1]; |
2465 |
+- tmp1 = do_div(tmp, 1000000000LL); |
2466 |
+- tmp0 = tmp; |
2467 |
+- return snprintf(buf, len, "%d.%09u", tmp0, tmp1); |
2468 |
++ tmp = shift_right((s64)vals[0] * 1000000000LL, vals[1]); |
2469 |
++ tmp0 = (int)div_s64_rem(tmp, 1000000000LL, &tmp1); |
2470 |
++ return snprintf(buf, len, "%d.%09u", tmp0, abs(tmp1)); |
2471 |
+ case IIO_VAL_INT_MULTIPLE: |
2472 |
+ { |
2473 |
+ int i; |
2474 |
+diff --git a/drivers/iio/pressure/st_pressure_core.c b/drivers/iio/pressure/st_pressure_core.c |
2475 |
+index e19e0787864c..f82560a4f772 100644 |
2476 |
+--- a/drivers/iio/pressure/st_pressure_core.c |
2477 |
++++ b/drivers/iio/pressure/st_pressure_core.c |
2478 |
+@@ -455,6 +455,7 @@ static const struct st_sensor_settings st_press_sensors_settings[] = { |
2479 |
+ .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR, |
2480 |
+ }, |
2481 |
+ .multi_read_bit = true, |
2482 |
++ .bootime = 2, |
2483 |
+ }, |
2484 |
+ }; |
2485 |
+ |
2486 |
+diff --git a/drivers/md/dm-raid.c b/drivers/md/dm-raid.c |
2487 |
+index 4a157b0f4155..fd4f3ace200b 100644 |
2488 |
+--- a/drivers/md/dm-raid.c |
2489 |
++++ b/drivers/md/dm-raid.c |
2490 |
+@@ -3594,7 +3594,7 @@ static int raid_preresume(struct dm_target *ti) |
2491 |
+ return r; |
2492 |
+ |
2493 |
+ /* Resize bitmap to adjust to changed region size (aka MD bitmap chunksize) */ |
2494 |
+- if (test_bit(RT_FLAG_RS_BITMAP_LOADED, &rs->runtime_flags) && |
2495 |
++ if (test_bit(RT_FLAG_RS_BITMAP_LOADED, &rs->runtime_flags) && mddev->bitmap && |
2496 |
+ mddev->bitmap_info.chunksize != to_bytes(rs->requested_bitmap_chunk_sectors)) { |
2497 |
+ r = bitmap_resize(mddev->bitmap, mddev->dev_sectors, |
2498 |
+ to_bytes(rs->requested_bitmap_chunk_sectors), 0); |
2499 |
+diff --git a/drivers/md/dm-verity-fec.c b/drivers/md/dm-verity-fec.c |
2500 |
+index 0f0eb8a3d922..78f36012eaca 100644 |
2501 |
+--- a/drivers/md/dm-verity-fec.c |
2502 |
++++ b/drivers/md/dm-verity-fec.c |
2503 |
+@@ -146,8 +146,6 @@ static int fec_decode_bufs(struct dm_verity *v, struct dm_verity_fec_io *fio, |
2504 |
+ block = fec_buffer_rs_block(v, fio, n, i); |
2505 |
+ res = fec_decode_rs8(v, fio, block, &par[offset], neras); |
2506 |
+ if (res < 0) { |
2507 |
+- dm_bufio_release(buf); |
2508 |
+- |
2509 |
+ r = res; |
2510 |
+ goto error; |
2511 |
+ } |
2512 |
+@@ -172,6 +170,8 @@ static int fec_decode_bufs(struct dm_verity *v, struct dm_verity_fec_io *fio, |
2513 |
+ done: |
2514 |
+ r = corrected; |
2515 |
+ error: |
2516 |
++ dm_bufio_release(buf); |
2517 |
++ |
2518 |
+ if (r < 0 && neras) |
2519 |
+ DMERR_LIMIT("%s: FEC %llu: failed to correct: %d", |
2520 |
+ v->data_dev->name, (unsigned long long)rsb, r); |
2521 |
+@@ -269,7 +269,7 @@ static int fec_read_bufs(struct dm_verity *v, struct dm_verity_io *io, |
2522 |
+ &is_zero) == 0) { |
2523 |
+ /* skip known zero blocks entirely */ |
2524 |
+ if (is_zero) |
2525 |
+- continue; |
2526 |
++ goto done; |
2527 |
+ |
2528 |
+ /* |
2529 |
+ * skip if we have already found the theoretical |
2530 |
+@@ -439,6 +439,13 @@ int verity_fec_decode(struct dm_verity *v, struct dm_verity_io *io, |
2531 |
+ if (!verity_fec_is_enabled(v)) |
2532 |
+ return -EOPNOTSUPP; |
2533 |
+ |
2534 |
++ if (fio->level >= DM_VERITY_FEC_MAX_RECURSION) { |
2535 |
++ DMWARN_LIMIT("%s: FEC: recursion too deep", v->data_dev->name); |
2536 |
++ return -EIO; |
2537 |
++ } |
2538 |
++ |
2539 |
++ fio->level++; |
2540 |
++ |
2541 |
+ if (type == DM_VERITY_BLOCK_TYPE_METADATA) |
2542 |
+ block += v->data_blocks; |
2543 |
+ |
2544 |
+@@ -470,7 +477,7 @@ int verity_fec_decode(struct dm_verity *v, struct dm_verity_io *io, |
2545 |
+ if (r < 0) { |
2546 |
+ r = fec_decode_rsb(v, io, fio, rsb, offset, true); |
2547 |
+ if (r < 0) |
2548 |
+- return r; |
2549 |
++ goto done; |
2550 |
+ } |
2551 |
+ |
2552 |
+ if (dest) |
2553 |
+@@ -480,6 +487,8 @@ int verity_fec_decode(struct dm_verity *v, struct dm_verity_io *io, |
2554 |
+ r = verity_for_bv_block(v, io, iter, fec_bv_copy); |
2555 |
+ } |
2556 |
+ |
2557 |
++done: |
2558 |
++ fio->level--; |
2559 |
+ return r; |
2560 |
+ } |
2561 |
+ |
2562 |
+@@ -520,6 +529,7 @@ void verity_fec_init_io(struct dm_verity_io *io) |
2563 |
+ memset(fio->bufs, 0, sizeof(fio->bufs)); |
2564 |
+ fio->nbufs = 0; |
2565 |
+ fio->output = NULL; |
2566 |
++ fio->level = 0; |
2567 |
+ } |
2568 |
+ |
2569 |
+ /* |
2570 |
+diff --git a/drivers/md/dm-verity-fec.h b/drivers/md/dm-verity-fec.h |
2571 |
+index 7fa0298b995e..bb31ce87a933 100644 |
2572 |
+--- a/drivers/md/dm-verity-fec.h |
2573 |
++++ b/drivers/md/dm-verity-fec.h |
2574 |
+@@ -27,6 +27,9 @@ |
2575 |
+ #define DM_VERITY_FEC_BUF_MAX \ |
2576 |
+ (1 << (PAGE_SHIFT - DM_VERITY_FEC_BUF_RS_BITS)) |
2577 |
+ |
2578 |
++/* maximum recursion level for verity_fec_decode */ |
2579 |
++#define DM_VERITY_FEC_MAX_RECURSION 4 |
2580 |
++ |
2581 |
+ #define DM_VERITY_OPT_FEC_DEV "use_fec_from_device" |
2582 |
+ #define DM_VERITY_OPT_FEC_BLOCKS "fec_blocks" |
2583 |
+ #define DM_VERITY_OPT_FEC_START "fec_start" |
2584 |
+@@ -58,6 +61,7 @@ struct dm_verity_fec_io { |
2585 |
+ unsigned nbufs; /* number of buffers allocated */ |
2586 |
+ u8 *output; /* buffer for corrected output */ |
2587 |
+ size_t output_pos; |
2588 |
++ unsigned level; /* recursion level */ |
2589 |
+ }; |
2590 |
+ |
2591 |
+ #ifdef CONFIG_DM_VERITY_FEC |
2592 |
+diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c |
2593 |
+index 9a6eb4492172..364f6b87a728 100644 |
2594 |
+--- a/drivers/mmc/host/sdhci-of-esdhc.c |
2595 |
++++ b/drivers/mmc/host/sdhci-of-esdhc.c |
2596 |
+@@ -569,16 +569,19 @@ static const struct sdhci_ops sdhci_esdhc_le_ops = { |
2597 |
+ }; |
2598 |
+ |
2599 |
+ static const struct sdhci_pltfm_data sdhci_esdhc_be_pdata = { |
2600 |
+- .quirks = ESDHC_DEFAULT_QUIRKS | SDHCI_QUIRK_BROKEN_CARD_DETECTION |
2601 |
+- | SDHCI_QUIRK_NO_CARD_NO_RESET |
2602 |
+- | SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, |
2603 |
++ .quirks = ESDHC_DEFAULT_QUIRKS | |
2604 |
++#ifdef CONFIG_PPC |
2605 |
++ SDHCI_QUIRK_BROKEN_CARD_DETECTION | |
2606 |
++#endif |
2607 |
++ SDHCI_QUIRK_NO_CARD_NO_RESET | |
2608 |
++ SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, |
2609 |
+ .ops = &sdhci_esdhc_be_ops, |
2610 |
+ }; |
2611 |
+ |
2612 |
+ static const struct sdhci_pltfm_data sdhci_esdhc_le_pdata = { |
2613 |
+- .quirks = ESDHC_DEFAULT_QUIRKS | SDHCI_QUIRK_BROKEN_CARD_DETECTION |
2614 |
+- | SDHCI_QUIRK_NO_CARD_NO_RESET |
2615 |
+- | SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, |
2616 |
++ .quirks = ESDHC_DEFAULT_QUIRKS | |
2617 |
++ SDHCI_QUIRK_NO_CARD_NO_RESET | |
2618 |
++ SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, |
2619 |
+ .ops = &sdhci_esdhc_le_ops, |
2620 |
+ }; |
2621 |
+ |
2622 |
+@@ -643,8 +646,7 @@ static int sdhci_esdhc_probe(struct platform_device *pdev) |
2623 |
+ of_device_is_compatible(np, "fsl,p5020-esdhc") || |
2624 |
+ of_device_is_compatible(np, "fsl,p4080-esdhc") || |
2625 |
+ of_device_is_compatible(np, "fsl,p1020-esdhc") || |
2626 |
+- of_device_is_compatible(np, "fsl,t1040-esdhc") || |
2627 |
+- of_device_is_compatible(np, "fsl,ls1021a-esdhc")) |
2628 |
++ of_device_is_compatible(np, "fsl,t1040-esdhc")) |
2629 |
+ host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION; |
2630 |
+ |
2631 |
+ if (of_device_is_compatible(np, "fsl,ls1021a-esdhc")) |
2632 |
+diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.c |
2633 |
+index de19c7c92bc6..85d949e03f79 100644 |
2634 |
+--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.c |
2635 |
++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.c |
2636 |
+@@ -2238,14 +2238,16 @@ int brcmf_p2p_del_vif(struct wiphy *wiphy, struct wireless_dev *wdev) |
2637 |
+ struct brcmf_cfg80211_info *cfg = wiphy_priv(wiphy); |
2638 |
+ struct brcmf_p2p_info *p2p = &cfg->p2p; |
2639 |
+ struct brcmf_cfg80211_vif *vif; |
2640 |
++ enum nl80211_iftype iftype; |
2641 |
+ bool wait_for_disable = false; |
2642 |
+ int err; |
2643 |
+ |
2644 |
+ brcmf_dbg(TRACE, "delete P2P vif\n"); |
2645 |
+ vif = container_of(wdev, struct brcmf_cfg80211_vif, wdev); |
2646 |
+ |
2647 |
++ iftype = vif->wdev.iftype; |
2648 |
+ brcmf_cfg80211_arm_vif_event(cfg, vif); |
2649 |
+- switch (vif->wdev.iftype) { |
2650 |
++ switch (iftype) { |
2651 |
+ case NL80211_IFTYPE_P2P_CLIENT: |
2652 |
+ if (test_bit(BRCMF_VIF_STATUS_DISCONNECTING, &vif->sme_state)) |
2653 |
+ wait_for_disable = true; |
2654 |
+@@ -2275,7 +2277,7 @@ int brcmf_p2p_del_vif(struct wiphy *wiphy, struct wireless_dev *wdev) |
2655 |
+ BRCMF_P2P_DISABLE_TIMEOUT); |
2656 |
+ |
2657 |
+ err = 0; |
2658 |
+- if (vif->wdev.iftype != NL80211_IFTYPE_P2P_DEVICE) { |
2659 |
++ if (iftype != NL80211_IFTYPE_P2P_DEVICE) { |
2660 |
+ brcmf_vif_clear_mgmt_ies(vif); |
2661 |
+ err = brcmf_p2p_release_p2p_if(vif); |
2662 |
+ } |
2663 |
+@@ -2291,7 +2293,7 @@ int brcmf_p2p_del_vif(struct wiphy *wiphy, struct wireless_dev *wdev) |
2664 |
+ brcmf_remove_interface(vif->ifp, true); |
2665 |
+ |
2666 |
+ brcmf_cfg80211_arm_vif_event(cfg, NULL); |
2667 |
+- if (vif->wdev.iftype != NL80211_IFTYPE_P2P_DEVICE) |
2668 |
++ if (iftype != NL80211_IFTYPE_P2P_DEVICE) |
2669 |
+ p2p->bss_idx[P2PAPI_BSSCFG_CONNECTION].vif = NULL; |
2670 |
+ |
2671 |
+ return err; |
2672 |
+diff --git a/drivers/pci/host/pci-thunder-pem.c b/drivers/pci/host/pci-thunder-pem.c |
2673 |
+index e354010fb006..cea581414e10 100644 |
2674 |
+--- a/drivers/pci/host/pci-thunder-pem.c |
2675 |
++++ b/drivers/pci/host/pci-thunder-pem.c |
2676 |
+@@ -14,6 +14,7 @@ |
2677 |
+ * Copyright (C) 2015 - 2016 Cavium, Inc. |
2678 |
+ */ |
2679 |
+ |
2680 |
++#include <linux/bitfield.h> |
2681 |
+ #include <linux/kernel.h> |
2682 |
+ #include <linux/init.h> |
2683 |
+ #include <linux/of_address.h> |
2684 |
+@@ -319,6 +320,49 @@ static int thunder_pem_init(struct device *dev, struct pci_config_window *cfg, |
2685 |
+ |
2686 |
+ #if defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS) |
2687 |
+ |
2688 |
++#define PEM_RES_BASE 0x87e0c0000000UL |
2689 |
++#define PEM_NODE_MASK GENMASK(45, 44) |
2690 |
++#define PEM_INDX_MASK GENMASK(26, 24) |
2691 |
++#define PEM_MIN_DOM_IN_NODE 4 |
2692 |
++#define PEM_MAX_DOM_IN_NODE 10 |
2693 |
++ |
2694 |
++static void thunder_pem_reserve_range(struct device *dev, int seg, |
2695 |
++ struct resource *r) |
2696 |
++{ |
2697 |
++ resource_size_t start = r->start, end = r->end; |
2698 |
++ struct resource *res; |
2699 |
++ const char *regionid; |
2700 |
++ |
2701 |
++ regionid = kasprintf(GFP_KERNEL, "PEM RC:%d", seg); |
2702 |
++ if (!regionid) |
2703 |
++ return; |
2704 |
++ |
2705 |
++ res = request_mem_region(start, end - start + 1, regionid); |
2706 |
++ if (res) |
2707 |
++ res->flags &= ~IORESOURCE_BUSY; |
2708 |
++ else |
2709 |
++ kfree(regionid); |
2710 |
++ |
2711 |
++ dev_info(dev, "%pR %s reserved\n", r, |
2712 |
++ res ? "has been" : "could not be"); |
2713 |
++} |
2714 |
++ |
2715 |
++static void thunder_pem_legacy_fw(struct acpi_pci_root *root, |
2716 |
++ struct resource *res_pem) |
2717 |
++{ |
2718 |
++ int node = acpi_get_node(root->device->handle); |
2719 |
++ int index; |
2720 |
++ |
2721 |
++ if (node == NUMA_NO_NODE) |
2722 |
++ node = 0; |
2723 |
++ |
2724 |
++ index = root->segment - PEM_MIN_DOM_IN_NODE; |
2725 |
++ index -= node * PEM_MAX_DOM_IN_NODE; |
2726 |
++ res_pem->start = PEM_RES_BASE | FIELD_PREP(PEM_NODE_MASK, node) | |
2727 |
++ FIELD_PREP(PEM_INDX_MASK, index); |
2728 |
++ res_pem->flags = IORESOURCE_MEM; |
2729 |
++} |
2730 |
++ |
2731 |
+ static int thunder_pem_acpi_init(struct pci_config_window *cfg) |
2732 |
+ { |
2733 |
+ struct device *dev = cfg->parent; |
2734 |
+@@ -332,9 +376,23 @@ static int thunder_pem_acpi_init(struct pci_config_window *cfg) |
2735 |
+ return -ENOMEM; |
2736 |
+ |
2737 |
+ ret = acpi_get_rc_resources(dev, "CAVA02B", root->segment, res_pem); |
2738 |
++ |
2739 |
++ /* |
2740 |
++ * If we fail to gather resources it means that we run with old |
2741 |
++ * FW where we need to calculate PEM-specific resources manually. |
2742 |
++ */ |
2743 |
+ if (ret) { |
2744 |
+- dev_err(dev, "can't get rc base address\n"); |
2745 |
+- return ret; |
2746 |
++ thunder_pem_legacy_fw(root, res_pem); |
2747 |
++ /* |
2748 |
++ * Reserve 64K size PEM specific resources. The full 16M range |
2749 |
++ * size is required for thunder_pem_init() call. |
2750 |
++ */ |
2751 |
++ res_pem->end = res_pem->start + SZ_64K - 1; |
2752 |
++ thunder_pem_reserve_range(dev, root->segment, res_pem); |
2753 |
++ res_pem->end = res_pem->start + SZ_16M - 1; |
2754 |
++ |
2755 |
++ /* Reserve PCI configuration space as well. */ |
2756 |
++ thunder_pem_reserve_range(dev, root->segment, &cfg->res); |
2757 |
+ } |
2758 |
+ |
2759 |
+ return thunder_pem_init(dev, cfg, res_pem); |
2760 |
+diff --git a/drivers/pci/host/pci-xgene.c b/drivers/pci/host/pci-xgene.c |
2761 |
+index 7c3b54b9eb17..142a1669dd82 100644 |
2762 |
+--- a/drivers/pci/host/pci-xgene.c |
2763 |
++++ b/drivers/pci/host/pci-xgene.c |
2764 |
+@@ -246,14 +246,11 @@ static int xgene_pcie_ecam_init(struct pci_config_window *cfg, u32 ipversion) |
2765 |
+ ret = xgene_get_csr_resource(adev, &csr); |
2766 |
+ if (ret) { |
2767 |
+ dev_err(dev, "can't get CSR resource\n"); |
2768 |
+- kfree(port); |
2769 |
+ return ret; |
2770 |
+ } |
2771 |
+ port->csr_base = devm_ioremap_resource(dev, &csr); |
2772 |
+- if (IS_ERR(port->csr_base)) { |
2773 |
+- kfree(port); |
2774 |
+- return -ENOMEM; |
2775 |
+- } |
2776 |
++ if (IS_ERR(port->csr_base)) |
2777 |
++ return PTR_ERR(port->csr_base); |
2778 |
+ |
2779 |
+ port->cfg_base = cfg->win; |
2780 |
+ port->version = ipversion; |
2781 |
+diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c |
2782 |
+index 024def5bb3fa..a171762048e7 100644 |
2783 |
+--- a/drivers/pci/quirks.c |
2784 |
++++ b/drivers/pci/quirks.c |
2785 |
+@@ -1634,6 +1634,7 @@ static void quirk_pcie_mch(struct pci_dev *pdev) |
2786 |
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7520_MCH, quirk_pcie_mch); |
2787 |
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7320_MCH, quirk_pcie_mch); |
2788 |
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7525_MCH, quirk_pcie_mch); |
2789 |
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0x1610, quirk_pcie_mch); |
2790 |
+ |
2791 |
+ |
2792 |
+ /* |
2793 |
+@@ -2240,6 +2241,27 @@ DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_BROADCOM, |
2794 |
+ PCI_DEVICE_ID_TIGON3_5719, |
2795 |
+ quirk_brcm_5719_limit_mrrs); |
2796 |
+ |
2797 |
++#ifdef CONFIG_PCIE_IPROC_PLATFORM |
2798 |
++static void quirk_paxc_bridge(struct pci_dev *pdev) |
2799 |
++{ |
2800 |
++ /* The PCI config space is shared with the PAXC root port and the first |
2801 |
++ * Ethernet device. So, we need to workaround this by telling the PCI |
2802 |
++ * code that the bridge is not an Ethernet device. |
2803 |
++ */ |
2804 |
++ if (pdev->hdr_type == PCI_HEADER_TYPE_BRIDGE) |
2805 |
++ pdev->class = PCI_CLASS_BRIDGE_PCI << 8; |
2806 |
++ |
2807 |
++ /* MPSS is not being set properly (as it is currently 0). This is |
2808 |
++ * because that area of the PCI config space is hard coded to zero, and |
2809 |
++ * is not modifiable by firmware. Set this to 2 (e.g., 512 byte MPS) |
2810 |
++ * so that the MPS can be set to the real max value. |
2811 |
++ */ |
2812 |
++ pdev->pcie_mpss = 2; |
2813 |
++} |
2814 |
++DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_BROADCOM, 0x16cd, quirk_paxc_bridge); |
2815 |
++DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_BROADCOM, 0x16f0, quirk_paxc_bridge); |
2816 |
++#endif |
2817 |
++ |
2818 |
+ /* Originally in EDAC sources for i82875P: |
2819 |
+ * Intel tells BIOS developers to hide device 6 which |
2820 |
+ * configures the overflow device access containing |
2821 |
+@@ -3114,30 +3136,32 @@ static void quirk_remove_d3_delay(struct pci_dev *dev) |
2822 |
+ { |
2823 |
+ dev->d3_delay = 0; |
2824 |
+ } |
2825 |
+-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0c00, quirk_remove_d3_delay); |
2826 |
++/* C600 Series devices do not need 10ms d3_delay */ |
2827 |
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0412, quirk_remove_d3_delay); |
2828 |
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0c00, quirk_remove_d3_delay); |
2829 |
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0c0c, quirk_remove_d3_delay); |
2830 |
+-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c31, quirk_remove_d3_delay); |
2831 |
+-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c3a, quirk_remove_d3_delay); |
2832 |
+-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c3d, quirk_remove_d3_delay); |
2833 |
+-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c2d, quirk_remove_d3_delay); |
2834 |
+-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c20, quirk_remove_d3_delay); |
2835 |
++/* Lynxpoint-H PCH devices do not need 10ms d3_delay */ |
2836 |
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c02, quirk_remove_d3_delay); |
2837 |
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c18, quirk_remove_d3_delay); |
2838 |
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c1c, quirk_remove_d3_delay); |
2839 |
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c20, quirk_remove_d3_delay); |
2840 |
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c22, quirk_remove_d3_delay); |
2841 |
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c26, quirk_remove_d3_delay); |
2842 |
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c2d, quirk_remove_d3_delay); |
2843 |
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c31, quirk_remove_d3_delay); |
2844 |
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c3a, quirk_remove_d3_delay); |
2845 |
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c3d, quirk_remove_d3_delay); |
2846 |
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c4e, quirk_remove_d3_delay); |
2847 |
+-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c02, quirk_remove_d3_delay); |
2848 |
+-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c22, quirk_remove_d3_delay); |
2849 |
+ /* Intel Cherrytrail devices do not need 10ms d3_delay */ |
2850 |
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x2280, quirk_remove_d3_delay); |
2851 |
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x2298, quirk_remove_d3_delay); |
2852 |
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x229c, quirk_remove_d3_delay); |
2853 |
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x22b0, quirk_remove_d3_delay); |
2854 |
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x22b5, quirk_remove_d3_delay); |
2855 |
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x22b7, quirk_remove_d3_delay); |
2856 |
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x22b8, quirk_remove_d3_delay); |
2857 |
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x22d8, quirk_remove_d3_delay); |
2858 |
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x22dc, quirk_remove_d3_delay); |
2859 |
+-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x22b5, quirk_remove_d3_delay); |
2860 |
+-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x22b7, quirk_remove_d3_delay); |
2861 |
+-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x2298, quirk_remove_d3_delay); |
2862 |
+-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x229c, quirk_remove_d3_delay); |
2863 |
+ |
2864 |
+ /* |
2865 |
+ * Some devices may pass our check in pci_intx_mask_supported() if |
2866 |
+@@ -4137,6 +4161,26 @@ static int pci_quirk_intel_pch_acs(struct pci_dev *dev, u16 acs_flags) |
2867 |
+ } |
2868 |
+ |
2869 |
+ /* |
2870 |
++ * These QCOM root ports do provide ACS-like features to disable peer |
2871 |
++ * transactions and validate bus numbers in requests, but do not provide an |
2872 |
++ * actual PCIe ACS capability. Hardware supports source validation but it |
2873 |
++ * will report the issue as Completer Abort instead of ACS Violation. |
2874 |
++ * Hardware doesn't support peer-to-peer and each root port is a root |
2875 |
++ * complex with unique segment numbers. It is not possible for one root |
2876 |
++ * port to pass traffic to another root port. All PCIe transactions are |
2877 |
++ * terminated inside the root port. |
2878 |
++ */ |
2879 |
++static int pci_quirk_qcom_rp_acs(struct pci_dev *dev, u16 acs_flags) |
2880 |
++{ |
2881 |
++ u16 flags = (PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF | PCI_ACS_SV); |
2882 |
++ int ret = acs_flags & ~flags ? 0 : 1; |
2883 |
++ |
2884 |
++ dev_info(&dev->dev, "Using QCOM ACS Quirk (%d)\n", ret); |
2885 |
++ |
2886 |
++ return ret; |
2887 |
++} |
2888 |
++ |
2889 |
++/* |
2890 |
+ * Sunrise Point PCH root ports implement ACS, but unfortunately as shown in |
2891 |
+ * the datasheet (Intel 100 Series Chipset Family PCH Datasheet, Vol. 2, |
2892 |
+ * 12.1.46, 12.1.47)[1] this chipset uses dwords for the ACS capability and |
2893 |
+@@ -4151,15 +4195,35 @@ static int pci_quirk_intel_pch_acs(struct pci_dev *dev, u16 acs_flags) |
2894 |
+ * |
2895 |
+ * N.B. This doesn't fix what lspci shows. |
2896 |
+ * |
2897 |
++ * The 100 series chipset specification update includes this as errata #23[3]. |
2898 |
++ * |
2899 |
++ * The 200 series chipset (Union Point) has the same bug according to the |
2900 |
++ * specification update (Intel 200 Series Chipset Family Platform Controller |
2901 |
++ * Hub, Specification Update, January 2017, Revision 001, Document# 335194-001, |
2902 |
++ * Errata 22)[4]. Per the datasheet[5], root port PCI Device IDs for this |
2903 |
++ * chipset include: |
2904 |
++ * |
2905 |
++ * 0xa290-0xa29f PCI Express Root port #{0-16} |
2906 |
++ * 0xa2e7-0xa2ee PCI Express Root port #{17-24} |
2907 |
++ * |
2908 |
+ * [1] http://www.intel.com/content/www/us/en/chipsets/100-series-chipset-datasheet-vol-2.html |
2909 |
+ * [2] http://www.intel.com/content/www/us/en/chipsets/100-series-chipset-datasheet-vol-1.html |
2910 |
++ * [3] http://www.intel.com/content/www/us/en/chipsets/100-series-chipset-spec-update.html |
2911 |
++ * [4] http://www.intel.com/content/www/us/en/chipsets/200-series-chipset-pch-spec-update.html |
2912 |
++ * [5] http://www.intel.com/content/www/us/en/chipsets/200-series-chipset-pch-datasheet-vol-1.html |
2913 |
+ */ |
2914 |
+ static bool pci_quirk_intel_spt_pch_acs_match(struct pci_dev *dev) |
2915 |
+ { |
2916 |
+- return pci_is_pcie(dev) && |
2917 |
+- pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT && |
2918 |
+- ((dev->device & ~0xf) == 0xa110 || |
2919 |
+- (dev->device >= 0xa167 && dev->device <= 0xa16a)); |
2920 |
++ if (!pci_is_pcie(dev) || pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) |
2921 |
++ return false; |
2922 |
++ |
2923 |
++ switch (dev->device) { |
2924 |
++ case 0xa110 ... 0xa11f: case 0xa167 ... 0xa16a: /* Sunrise Point */ |
2925 |
++ case 0xa290 ... 0xa29f: case 0xa2e7 ... 0xa2ee: /* Union Point */ |
2926 |
++ return true; |
2927 |
++ } |
2928 |
++ |
2929 |
++ return false; |
2930 |
+ } |
2931 |
+ |
2932 |
+ #define INTEL_SPT_ACS_CTRL (PCI_ACS_CAP + 4) |
2933 |
+@@ -4272,6 +4336,9 @@ static const struct pci_dev_acs_enabled { |
2934 |
+ /* I219 */ |
2935 |
+ { PCI_VENDOR_ID_INTEL, 0x15b7, pci_quirk_mf_endpoint_acs }, |
2936 |
+ { PCI_VENDOR_ID_INTEL, 0x15b8, pci_quirk_mf_endpoint_acs }, |
2937 |
++ /* QCOM QDF2xxx root ports */ |
2938 |
++ { 0x17cb, 0x400, pci_quirk_qcom_rp_acs }, |
2939 |
++ { 0x17cb, 0x401, pci_quirk_qcom_rp_acs }, |
2940 |
+ /* Intel PCH root ports */ |
2941 |
+ { PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_quirk_intel_pch_acs }, |
2942 |
+ { PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_quirk_intel_spt_pch_acs }, |
2943 |
+diff --git a/drivers/platform/x86/asus-wmi.c b/drivers/platform/x86/asus-wmi.c |
2944 |
+index 43cb680adbb4..8499d3ae4257 100644 |
2945 |
+--- a/drivers/platform/x86/asus-wmi.c |
2946 |
++++ b/drivers/platform/x86/asus-wmi.c |
2947 |
+@@ -159,6 +159,8 @@ MODULE_LICENSE("GPL"); |
2948 |
+ #define USB_INTEL_XUSB2PR 0xD0 |
2949 |
+ #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI 0x9c31 |
2950 |
+ |
2951 |
++static const char * const ashs_ids[] = { "ATK4001", "ATK4002", NULL }; |
2952 |
++ |
2953 |
+ struct bios_args { |
2954 |
+ u32 arg0; |
2955 |
+ u32 arg1; |
2956 |
+@@ -2051,6 +2053,16 @@ static int asus_wmi_fan_init(struct asus_wmi *asus) |
2957 |
+ return 0; |
2958 |
+ } |
2959 |
+ |
2960 |
++static bool ashs_present(void) |
2961 |
++{ |
2962 |
++ int i = 0; |
2963 |
++ while (ashs_ids[i]) { |
2964 |
++ if (acpi_dev_found(ashs_ids[i++])) |
2965 |
++ return true; |
2966 |
++ } |
2967 |
++ return false; |
2968 |
++} |
2969 |
++ |
2970 |
+ /* |
2971 |
+ * WMI Driver |
2972 |
+ */ |
2973 |
+@@ -2095,6 +2107,13 @@ static int asus_wmi_add(struct platform_device *pdev) |
2974 |
+ if (err) |
2975 |
+ goto fail_leds; |
2976 |
+ |
2977 |
++ asus_wmi_get_devstate(asus, ASUS_WMI_DEVID_WLAN, &result); |
2978 |
++ if (result & (ASUS_WMI_DSTS_PRESENCE_BIT | ASUS_WMI_DSTS_USER_BIT)) |
2979 |
++ asus->driver->wlan_ctrl_by_user = 1; |
2980 |
++ |
2981 |
++ if (asus->driver->wlan_ctrl_by_user && ashs_present()) |
2982 |
++ asus->driver->quirks->no_rfkill = 1; |
2983 |
++ |
2984 |
+ if (!asus->driver->quirks->no_rfkill) { |
2985 |
+ err = asus_wmi_rfkill_init(asus); |
2986 |
+ if (err) |
2987 |
+@@ -2134,10 +2153,6 @@ static int asus_wmi_add(struct platform_device *pdev) |
2988 |
+ if (err) |
2989 |
+ goto fail_debugfs; |
2990 |
+ |
2991 |
+- asus_wmi_get_devstate(asus, ASUS_WMI_DEVID_WLAN, &result); |
2992 |
+- if (result & (ASUS_WMI_DSTS_PRESENCE_BIT | ASUS_WMI_DSTS_USER_BIT)) |
2993 |
+- asus->driver->wlan_ctrl_by_user = 1; |
2994 |
+- |
2995 |
+ return 0; |
2996 |
+ |
2997 |
+ fail_debugfs: |
2998 |
+diff --git a/drivers/staging/android/ashmem.c b/drivers/staging/android/ashmem.c |
2999 |
+index 7cbad0d45b9c..6ba270e0494d 100644 |
3000 |
+--- a/drivers/staging/android/ashmem.c |
3001 |
++++ b/drivers/staging/android/ashmem.c |
3002 |
+@@ -409,6 +409,7 @@ static int ashmem_mmap(struct file *file, struct vm_area_struct *vma) |
3003 |
+ ret = PTR_ERR(vmfile); |
3004 |
+ goto out; |
3005 |
+ } |
3006 |
++ vmfile->f_mode |= FMODE_LSEEK; |
3007 |
+ asma->file = vmfile; |
3008 |
+ } |
3009 |
+ get_file(asma->file); |
3010 |
+diff --git a/drivers/tty/serial/8250/8250_omap.c b/drivers/tty/serial/8250/8250_omap.c |
3011 |
+index 61ad6c3b20a0..f4eb807a2616 100644 |
3012 |
+--- a/drivers/tty/serial/8250/8250_omap.c |
3013 |
++++ b/drivers/tty/serial/8250/8250_omap.c |
3014 |
+@@ -1075,15 +1075,15 @@ static int omap8250_no_handle_irq(struct uart_port *port) |
3015 |
+ } |
3016 |
+ |
3017 |
+ static const u8 am3352_habit = OMAP_DMA_TX_KICK | UART_ERRATA_CLOCK_DISABLE; |
3018 |
+-static const u8 am4372_habit = UART_ERRATA_CLOCK_DISABLE; |
3019 |
++static const u8 dra742_habit = UART_ERRATA_CLOCK_DISABLE; |
3020 |
+ |
3021 |
+ static const struct of_device_id omap8250_dt_ids[] = { |
3022 |
+ { .compatible = "ti,omap2-uart" }, |
3023 |
+ { .compatible = "ti,omap3-uart" }, |
3024 |
+ { .compatible = "ti,omap4-uart" }, |
3025 |
+ { .compatible = "ti,am3352-uart", .data = &am3352_habit, }, |
3026 |
+- { .compatible = "ti,am4372-uart", .data = &am4372_habit, }, |
3027 |
+- { .compatible = "ti,dra742-uart", .data = &am4372_habit, }, |
3028 |
++ { .compatible = "ti,am4372-uart", .data = &am3352_habit, }, |
3029 |
++ { .compatible = "ti,dra742-uart", .data = &dra742_habit, }, |
3030 |
+ {}, |
3031 |
+ }; |
3032 |
+ MODULE_DEVICE_TABLE(of, omap8250_dt_ids); |
3033 |
+@@ -1218,9 +1218,6 @@ static int omap8250_probe(struct platform_device *pdev) |
3034 |
+ priv->omap8250_dma.rx_size = RX_TRIGGER; |
3035 |
+ priv->omap8250_dma.rxconf.src_maxburst = RX_TRIGGER; |
3036 |
+ priv->omap8250_dma.txconf.dst_maxburst = TX_TRIGGER; |
3037 |
+- |
3038 |
+- if (of_machine_is_compatible("ti,am33xx")) |
3039 |
+- priv->habit |= OMAP_DMA_TX_KICK; |
3040 |
+ /* |
3041 |
+ * pause is currently not supported atleast on omap-sdma |
3042 |
+ * and edma on most earlier kernels. |
3043 |
+diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c b/drivers/usb/chipidea/ci_hdrc_msm.c |
3044 |
+index 3889809fd0c4..37591a4b1346 100644 |
3045 |
+--- a/drivers/usb/chipidea/ci_hdrc_msm.c |
3046 |
++++ b/drivers/usb/chipidea/ci_hdrc_msm.c |
3047 |
+@@ -24,7 +24,6 @@ static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event) |
3048 |
+ switch (event) { |
3049 |
+ case CI_HDRC_CONTROLLER_RESET_EVENT: |
3050 |
+ dev_dbg(dev, "CI_HDRC_CONTROLLER_RESET_EVENT received\n"); |
3051 |
+- writel(0, USB_AHBBURST); |
3052 |
+ /* use AHB transactor, allow posted data writes */ |
3053 |
+ writel(0x8, USB_AHBMODE); |
3054 |
+ usb_phy_init(ci->usb_phy); |
3055 |
+@@ -47,7 +46,8 @@ static struct ci_hdrc_platform_data ci_hdrc_msm_platdata = { |
3056 |
+ .name = "ci_hdrc_msm", |
3057 |
+ .capoffset = DEF_CAPOFFSET, |
3058 |
+ .flags = CI_HDRC_REGS_SHARED | |
3059 |
+- CI_HDRC_DISABLE_STREAMING, |
3060 |
++ CI_HDRC_DISABLE_STREAMING | |
3061 |
++ CI_HDRC_OVERRIDE_AHB_BURST, |
3062 |
+ |
3063 |
+ .notify_event = ci_hdrc_msm_notify_event, |
3064 |
+ }; |
3065 |
+diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c |
3066 |
+index a8a4fe4ffa30..16768abf7f7c 100644 |
3067 |
+--- a/drivers/usb/dwc3/gadget.c |
3068 |
++++ b/drivers/usb/dwc3/gadget.c |
3069 |
+@@ -171,6 +171,7 @@ void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req, |
3070 |
+ int status) |
3071 |
+ { |
3072 |
+ struct dwc3 *dwc = dep->dwc; |
3073 |
++ unsigned int unmap_after_complete = false; |
3074 |
+ |
3075 |
+ req->started = false; |
3076 |
+ list_del(&req->list); |
3077 |
+@@ -180,11 +181,19 @@ void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req, |
3078 |
+ if (req->request.status == -EINPROGRESS) |
3079 |
+ req->request.status = status; |
3080 |
+ |
3081 |
+- if (dwc->ep0_bounced && dep->number <= 1) |
3082 |
++ /* |
3083 |
++ * NOTICE we don't want to unmap before calling ->complete() if we're |
3084 |
++ * dealing with a bounced ep0 request. If we unmap it here, we would end |
3085 |
++ * up overwritting the contents of req->buf and this could confuse the |
3086 |
++ * gadget driver. |
3087 |
++ */ |
3088 |
++ if (dwc->ep0_bounced && dep->number <= 1) { |
3089 |
+ dwc->ep0_bounced = false; |
3090 |
+- |
3091 |
+- usb_gadget_unmap_request_by_dev(dwc->sysdev, |
3092 |
+- &req->request, req->direction); |
3093 |
++ unmap_after_complete = true; |
3094 |
++ } else { |
3095 |
++ usb_gadget_unmap_request_by_dev(dwc->sysdev, |
3096 |
++ &req->request, req->direction); |
3097 |
++ } |
3098 |
+ |
3099 |
+ trace_dwc3_gadget_giveback(req); |
3100 |
+ |
3101 |
+@@ -192,6 +201,10 @@ void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req, |
3102 |
+ usb_gadget_giveback_request(&dep->endpoint, &req->request); |
3103 |
+ spin_lock(&dwc->lock); |
3104 |
+ |
3105 |
++ if (unmap_after_complete) |
3106 |
++ usb_gadget_unmap_request_by_dev(dwc->sysdev, |
3107 |
++ &req->request, req->direction); |
3108 |
++ |
3109 |
+ if (dep->number > 1) |
3110 |
+ pm_runtime_put(dwc->dev); |
3111 |
+ } |
3112 |
+diff --git a/drivers/usb/dwc3/host.c b/drivers/usb/dwc3/host.c |
3113 |
+index 487f0ff6ae25..76f0b0df37c1 100644 |
3114 |
+--- a/drivers/usb/dwc3/host.c |
3115 |
++++ b/drivers/usb/dwc3/host.c |
3116 |
+@@ -54,11 +54,12 @@ static int dwc3_host_get_irq(struct dwc3 *dwc) |
3117 |
+ |
3118 |
+ int dwc3_host_init(struct dwc3 *dwc) |
3119 |
+ { |
3120 |
+- struct property_entry props[2]; |
3121 |
++ struct property_entry props[3]; |
3122 |
+ struct platform_device *xhci; |
3123 |
+ int ret, irq; |
3124 |
+ struct resource *res; |
3125 |
+ struct platform_device *dwc3_pdev = to_platform_device(dwc->dev); |
3126 |
++ int prop_idx = 0; |
3127 |
+ |
3128 |
+ irq = dwc3_host_get_irq(dwc); |
3129 |
+ if (irq < 0) |
3130 |
+@@ -97,8 +98,22 @@ int dwc3_host_init(struct dwc3 *dwc) |
3131 |
+ |
3132 |
+ memset(props, 0, sizeof(struct property_entry) * ARRAY_SIZE(props)); |
3133 |
+ |
3134 |
+- if (dwc->usb3_lpm_capable) { |
3135 |
+- props[0].name = "usb3-lpm-capable"; |
3136 |
++ if (dwc->usb3_lpm_capable) |
3137 |
++ props[prop_idx++].name = "usb3-lpm-capable"; |
3138 |
++ |
3139 |
++ /** |
3140 |
++ * WORKAROUND: dwc3 revisions <=3.00a have a limitation |
3141 |
++ * where Port Disable command doesn't work. |
3142 |
++ * |
3143 |
++ * The suggested workaround is that we avoid Port Disable |
3144 |
++ * completely. |
3145 |
++ * |
3146 |
++ * This following flag tells XHCI to do just that. |
3147 |
++ */ |
3148 |
++ if (dwc->revision <= DWC3_REVISION_300A) |
3149 |
++ props[prop_idx++].name = "quirk-broken-port-ped"; |
3150 |
++ |
3151 |
++ if (prop_idx) { |
3152 |
+ ret = platform_device_add_properties(xhci, props); |
3153 |
+ if (ret) { |
3154 |
+ dev_err(dwc->dev, "failed to add properties to xHCI\n"); |
3155 |
+diff --git a/drivers/usb/host/xhci-hub.c b/drivers/usb/host/xhci-hub.c |
3156 |
+index 0ef16900efed..1d41637a53e5 100644 |
3157 |
+--- a/drivers/usb/host/xhci-hub.c |
3158 |
++++ b/drivers/usb/host/xhci-hub.c |
3159 |
+@@ -458,6 +458,12 @@ static void xhci_disable_port(struct usb_hcd *hcd, struct xhci_hcd *xhci, |
3160 |
+ return; |
3161 |
+ } |
3162 |
+ |
3163 |
++ if (xhci->quirks & XHCI_BROKEN_PORT_PED) { |
3164 |
++ xhci_dbg(xhci, |
3165 |
++ "Broken Port Enabled/Disabled, ignoring port disable request.\n"); |
3166 |
++ return; |
3167 |
++ } |
3168 |
++ |
3169 |
+ /* Write 1 to disable the port */ |
3170 |
+ writel(port_status | PORT_PE, addr); |
3171 |
+ port_status = readl(addr); |
3172 |
+diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c |
3173 |
+index 9715200eb36e..bd02a6cd8e2c 100644 |
3174 |
+--- a/drivers/usb/host/xhci-plat.c |
3175 |
++++ b/drivers/usb/host/xhci-plat.c |
3176 |
+@@ -232,6 +232,9 @@ static int xhci_plat_probe(struct platform_device *pdev) |
3177 |
+ if (device_property_read_bool(&pdev->dev, "usb3-lpm-capable")) |
3178 |
+ xhci->quirks |= XHCI_LPM_SUPPORT; |
3179 |
+ |
3180 |
++ if (device_property_read_bool(&pdev->dev, "quirk-broken-port-ped")) |
3181 |
++ xhci->quirks |= XHCI_BROKEN_PORT_PED; |
3182 |
++ |
3183 |
+ hcd->usb_phy = devm_usb_get_phy_by_phandle(&pdev->dev, "usb-phy", 0); |
3184 |
+ if (IS_ERR(hcd->usb_phy)) { |
3185 |
+ ret = PTR_ERR(hcd->usb_phy); |
3186 |
+diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h |
3187 |
+index 2d7b6374b58d..ea18bf49c2eb 100644 |
3188 |
+--- a/drivers/usb/host/xhci.h |
3189 |
++++ b/drivers/usb/host/xhci.h |
3190 |
+@@ -1650,6 +1650,9 @@ struct xhci_hcd { |
3191 |
+ #define XHCI_SSIC_PORT_UNUSED (1 << 22) |
3192 |
+ #define XHCI_NO_64BIT_SUPPORT (1 << 23) |
3193 |
+ #define XHCI_MISSING_CAS (1 << 24) |
3194 |
++/* For controller with a broken Port Disable implementation */ |
3195 |
++#define XHCI_BROKEN_PORT_PED (1 << 25) |
3196 |
++ |
3197 |
+ unsigned int num_active_eps; |
3198 |
+ unsigned int limit_active_eps; |
3199 |
+ /* There are two roothubs to keep track of bus suspend info for */ |
3200 |
+diff --git a/drivers/usb/storage/unusual_devs.h b/drivers/usb/storage/unusual_devs.h |
3201 |
+index 16cc18369111..9129f6cb8230 100644 |
3202 |
+--- a/drivers/usb/storage/unusual_devs.h |
3203 |
++++ b/drivers/usb/storage/unusual_devs.h |
3204 |
+@@ -2071,6 +2071,20 @@ UNUSUAL_DEV( 0x1370, 0x6828, 0x0110, 0x0110, |
3205 |
+ USB_SC_DEVICE, USB_PR_DEVICE, NULL, |
3206 |
+ US_FL_IGNORE_RESIDUE ), |
3207 |
+ |
3208 |
++/* |
3209 |
++ * Reported by Tobias Jakobi <tjakobi@××××××××××××××××××.de> |
3210 |
++ * The INIC-3619 bridge is used in the StarTech SLSODDU33B |
3211 |
++ * SATA-USB enclosure for slimline optical drives. |
3212 |
++ * |
3213 |
++ * The quirk enables MakeMKV to properly exchange keys with |
3214 |
++ * an installed BD drive. |
3215 |
++ */ |
3216 |
++UNUSUAL_DEV( 0x13fd, 0x3609, 0x0209, 0x0209, |
3217 |
++ "Initio Corporation", |
3218 |
++ "INIC-3619", |
3219 |
++ USB_SC_DEVICE, USB_PR_DEVICE, NULL, |
3220 |
++ US_FL_IGNORE_RESIDUE ), |
3221 |
++ |
3222 |
+ /* Reported by Qinglin Ye <yestyle@×××××.com> */ |
3223 |
+ UNUSUAL_DEV( 0x13fe, 0x3600, 0x0100, 0x0100, |
3224 |
+ "Kingston", |
3225 |
+diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c |
3226 |
+index 59e95762a6de..c5a567a73f59 100644 |
3227 |
+--- a/drivers/watchdog/s3c2410_wdt.c |
3228 |
++++ b/drivers/watchdog/s3c2410_wdt.c |
3229 |
+@@ -46,6 +46,7 @@ |
3230 |
+ #define S3C2410_WTCON 0x00 |
3231 |
+ #define S3C2410_WTDAT 0x04 |
3232 |
+ #define S3C2410_WTCNT 0x08 |
3233 |
++#define S3C2410_WTCLRINT 0x0c |
3234 |
+ |
3235 |
+ #define S3C2410_WTCNT_MAXCNT 0xffff |
3236 |
+ |
3237 |
+@@ -72,6 +73,7 @@ |
3238 |
+ #define EXYNOS5_WDT_MASK_RESET_REG_OFFSET 0x040c |
3239 |
+ #define QUIRK_HAS_PMU_CONFIG (1 << 0) |
3240 |
+ #define QUIRK_HAS_RST_STAT (1 << 1) |
3241 |
++#define QUIRK_HAS_WTCLRINT_REG (1 << 2) |
3242 |
+ |
3243 |
+ /* These quirks require that we have a PMU register map */ |
3244 |
+ #define QUIRKS_HAVE_PMUREG (QUIRK_HAS_PMU_CONFIG | \ |
3245 |
+@@ -143,13 +145,18 @@ static const struct s3c2410_wdt_variant drv_data_s3c2410 = { |
3246 |
+ }; |
3247 |
+ |
3248 |
+ #ifdef CONFIG_OF |
3249 |
++static const struct s3c2410_wdt_variant drv_data_s3c6410 = { |
3250 |
++ .quirks = QUIRK_HAS_WTCLRINT_REG, |
3251 |
++}; |
3252 |
++ |
3253 |
+ static const struct s3c2410_wdt_variant drv_data_exynos5250 = { |
3254 |
+ .disable_reg = EXYNOS5_WDT_DISABLE_REG_OFFSET, |
3255 |
+ .mask_reset_reg = EXYNOS5_WDT_MASK_RESET_REG_OFFSET, |
3256 |
+ .mask_bit = 20, |
3257 |
+ .rst_stat_reg = EXYNOS5_RST_STAT_REG_OFFSET, |
3258 |
+ .rst_stat_bit = 20, |
3259 |
+- .quirks = QUIRK_HAS_PMU_CONFIG | QUIRK_HAS_RST_STAT, |
3260 |
++ .quirks = QUIRK_HAS_PMU_CONFIG | QUIRK_HAS_RST_STAT \ |
3261 |
++ | QUIRK_HAS_WTCLRINT_REG, |
3262 |
+ }; |
3263 |
+ |
3264 |
+ static const struct s3c2410_wdt_variant drv_data_exynos5420 = { |
3265 |
+@@ -158,7 +165,8 @@ static const struct s3c2410_wdt_variant drv_data_exynos5420 = { |
3266 |
+ .mask_bit = 0, |
3267 |
+ .rst_stat_reg = EXYNOS5_RST_STAT_REG_OFFSET, |
3268 |
+ .rst_stat_bit = 9, |
3269 |
+- .quirks = QUIRK_HAS_PMU_CONFIG | QUIRK_HAS_RST_STAT, |
3270 |
++ .quirks = QUIRK_HAS_PMU_CONFIG | QUIRK_HAS_RST_STAT \ |
3271 |
++ | QUIRK_HAS_WTCLRINT_REG, |
3272 |
+ }; |
3273 |
+ |
3274 |
+ static const struct s3c2410_wdt_variant drv_data_exynos7 = { |
3275 |
+@@ -167,12 +175,15 @@ static const struct s3c2410_wdt_variant drv_data_exynos7 = { |
3276 |
+ .mask_bit = 23, |
3277 |
+ .rst_stat_reg = EXYNOS5_RST_STAT_REG_OFFSET, |
3278 |
+ .rst_stat_bit = 23, /* A57 WDTRESET */ |
3279 |
+- .quirks = QUIRK_HAS_PMU_CONFIG | QUIRK_HAS_RST_STAT, |
3280 |
++ .quirks = QUIRK_HAS_PMU_CONFIG | QUIRK_HAS_RST_STAT \ |
3281 |
++ | QUIRK_HAS_WTCLRINT_REG, |
3282 |
+ }; |
3283 |
+ |
3284 |
+ static const struct of_device_id s3c2410_wdt_match[] = { |
3285 |
+ { .compatible = "samsung,s3c2410-wdt", |
3286 |
+ .data = &drv_data_s3c2410 }, |
3287 |
++ { .compatible = "samsung,s3c6410-wdt", |
3288 |
++ .data = &drv_data_s3c6410 }, |
3289 |
+ { .compatible = "samsung,exynos5250-wdt", |
3290 |
+ .data = &drv_data_exynos5250 }, |
3291 |
+ { .compatible = "samsung,exynos5420-wdt", |
3292 |
+@@ -418,6 +429,10 @@ static irqreturn_t s3c2410wdt_irq(int irqno, void *param) |
3293 |
+ dev_info(wdt->dev, "watchdog timer expired (irq)\n"); |
3294 |
+ |
3295 |
+ s3c2410wdt_keepalive(&wdt->wdt_device); |
3296 |
++ |
3297 |
++ if (wdt->drv_data->quirks & QUIRK_HAS_WTCLRINT_REG) |
3298 |
++ writel(0x1, wdt->reg_base + S3C2410_WTCLRINT); |
3299 |
++ |
3300 |
+ return IRQ_HANDLED; |
3301 |
+ } |
3302 |
+ |
3303 |
+diff --git a/fs/cifs/smb2pdu.c b/fs/cifs/smb2pdu.c |
3304 |
+index 87457227812c..bdd32925a15e 100644 |
3305 |
+--- a/fs/cifs/smb2pdu.c |
3306 |
++++ b/fs/cifs/smb2pdu.c |
3307 |
+@@ -1104,6 +1104,10 @@ SMB2_tcon(const unsigned int xid, struct cifs_ses *ses, const char *tree, |
3308 |
+ return -EINVAL; |
3309 |
+ } |
3310 |
+ |
3311 |
++ /* SMB2 TREE_CONNECT request must be called with TreeId == 0 */ |
3312 |
++ if (tcon) |
3313 |
++ tcon->tid = 0; |
3314 |
++ |
3315 |
+ rc = small_smb2_init(SMB2_TREE_CONNECT, tcon, (void **) &req); |
3316 |
+ if (rc) { |
3317 |
+ kfree(unc_path); |
3318 |
+diff --git a/fs/dax.c b/fs/dax.c |
3319 |
+index c45598b912e1..a39b404b646a 100644 |
3320 |
+--- a/fs/dax.c |
3321 |
++++ b/fs/dax.c |
3322 |
+@@ -369,6 +369,22 @@ static void *grab_mapping_entry(struct address_space *mapping, pgoff_t index, |
3323 |
+ } |
3324 |
+ spin_lock_irq(&mapping->tree_lock); |
3325 |
+ |
3326 |
++ if (!entry) { |
3327 |
++ /* |
3328 |
++ * We needed to drop the page_tree lock while calling |
3329 |
++ * radix_tree_preload() and we didn't have an entry to |
3330 |
++ * lock. See if another thread inserted an entry at |
3331 |
++ * our index during this time. |
3332 |
++ */ |
3333 |
++ entry = __radix_tree_lookup(&mapping->page_tree, index, |
3334 |
++ NULL, &slot); |
3335 |
++ if (entry) { |
3336 |
++ radix_tree_preload_end(); |
3337 |
++ spin_unlock_irq(&mapping->tree_lock); |
3338 |
++ goto restart; |
3339 |
++ } |
3340 |
++ } |
3341 |
++ |
3342 |
+ if (pmd_downgrade) { |
3343 |
+ radix_tree_delete(&mapping->page_tree, index); |
3344 |
+ mapping->nrexceptional--; |
3345 |
+@@ -384,19 +400,12 @@ static void *grab_mapping_entry(struct address_space *mapping, pgoff_t index, |
3346 |
+ if (err) { |
3347 |
+ spin_unlock_irq(&mapping->tree_lock); |
3348 |
+ /* |
3349 |
+- * Someone already created the entry? This is a |
3350 |
+- * normal failure when inserting PMDs in a range |
3351 |
+- * that already contains PTEs. In that case we want |
3352 |
+- * to return -EEXIST immediately. |
3353 |
+- */ |
3354 |
+- if (err == -EEXIST && !(size_flag & RADIX_DAX_PMD)) |
3355 |
+- goto restart; |
3356 |
+- /* |
3357 |
+- * Our insertion of a DAX PMD entry failed, most |
3358 |
+- * likely because it collided with a PTE sized entry |
3359 |
+- * at a different index in the PMD range. We haven't |
3360 |
+- * inserted anything into the radix tree and have no |
3361 |
+- * waiters to wake. |
3362 |
++ * Our insertion of a DAX entry failed, most likely |
3363 |
++ * because we were inserting a PMD entry and it |
3364 |
++ * collided with a PTE sized entry at a different |
3365 |
++ * index in the PMD range. We haven't inserted |
3366 |
++ * anything into the radix tree and have no waiters to |
3367 |
++ * wake. |
3368 |
+ */ |
3369 |
+ return ERR_PTR(err); |
3370 |
+ } |
3371 |
+diff --git a/fs/orangefs/super.c b/fs/orangefs/super.c |
3372 |
+index 67c24351a67f..cd261c8de53a 100644 |
3373 |
+--- a/fs/orangefs/super.c |
3374 |
++++ b/fs/orangefs/super.c |
3375 |
+@@ -263,8 +263,13 @@ int orangefs_remount(struct orangefs_sb_info_s *orangefs_sb) |
3376 |
+ if (!new_op) |
3377 |
+ return -ENOMEM; |
3378 |
+ new_op->upcall.req.features.features = 0; |
3379 |
+- ret = service_operation(new_op, "orangefs_features", 0); |
3380 |
+- orangefs_features = new_op->downcall.resp.features.features; |
3381 |
++ ret = service_operation(new_op, "orangefs_features", |
3382 |
++ ORANGEFS_OP_PRIORITY | ORANGEFS_OP_NO_MUTEX); |
3383 |
++ if (!ret) |
3384 |
++ orangefs_features = |
3385 |
++ new_op->downcall.resp.features.features; |
3386 |
++ else |
3387 |
++ orangefs_features = 0; |
3388 |
+ op_release(new_op); |
3389 |
+ } else { |
3390 |
+ orangefs_features = 0; |
3391 |
+diff --git a/fs/sysfs/file.c b/fs/sysfs/file.c |
3392 |
+index b803213d1307..39c75a86c67f 100644 |
3393 |
+--- a/fs/sysfs/file.c |
3394 |
++++ b/fs/sysfs/file.c |
3395 |
+@@ -108,7 +108,7 @@ static ssize_t sysfs_kf_read(struct kernfs_open_file *of, char *buf, |
3396 |
+ { |
3397 |
+ const struct sysfs_ops *ops = sysfs_file_ops(of->kn); |
3398 |
+ struct kobject *kobj = of->kn->parent->priv; |
3399 |
+- size_t len; |
3400 |
++ ssize_t len; |
3401 |
+ |
3402 |
+ /* |
3403 |
+ * If buf != of->prealloc_buf, we don't know how |
3404 |
+@@ -117,13 +117,15 @@ static ssize_t sysfs_kf_read(struct kernfs_open_file *of, char *buf, |
3405 |
+ if (WARN_ON_ONCE(buf != of->prealloc_buf)) |
3406 |
+ return 0; |
3407 |
+ len = ops->show(kobj, of->kn->priv, buf); |
3408 |
++ if (len < 0) |
3409 |
++ return len; |
3410 |
+ if (pos) { |
3411 |
+ if (len <= pos) |
3412 |
+ return 0; |
3413 |
+ len -= pos; |
3414 |
+ memmove(buf, buf + pos, len); |
3415 |
+ } |
3416 |
+- return min(count, len); |
3417 |
++ return min_t(ssize_t, count, len); |
3418 |
+ } |
3419 |
+ |
3420 |
+ /* kernfs write callback for regular sysfs files */ |
3421 |
+diff --git a/fs/xfs/xfs_bmap_util.c b/fs/xfs/xfs_bmap_util.c |
3422 |
+index c516d7158a21..205ab55d595d 100644 |
3423 |
+--- a/fs/xfs/xfs_bmap_util.c |
3424 |
++++ b/fs/xfs/xfs_bmap_util.c |
3425 |
+@@ -1318,8 +1318,16 @@ xfs_free_file_space( |
3426 |
+ /* |
3427 |
+ * Now that we've unmap all full blocks we'll have to zero out any |
3428 |
+ * partial block at the beginning and/or end. xfs_zero_range is |
3429 |
+- * smart enough to skip any holes, including those we just created. |
3430 |
++ * smart enough to skip any holes, including those we just created, |
3431 |
++ * but we must take care not to zero beyond EOF and enlarge i_size. |
3432 |
+ */ |
3433 |
++ |
3434 |
++ if (offset >= XFS_ISIZE(ip)) |
3435 |
++ return 0; |
3436 |
++ |
3437 |
++ if (offset + len > XFS_ISIZE(ip)) |
3438 |
++ len = XFS_ISIZE(ip) - offset; |
3439 |
++ |
3440 |
+ return xfs_zero_range(ip, offset, len, NULL); |
3441 |
+ } |
3442 |
+ |
3443 |
+diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h |
3444 |
+index 0d5f4268d75f..61766a420f6b 100644 |
3445 |
+--- a/include/drm/i915_pciids.h |
3446 |
++++ b/include/drm/i915_pciids.h |
3447 |
+@@ -226,23 +226,18 @@ |
3448 |
+ INTEL_VGA_DEVICE(0x162A, info), /* Server */ \ |
3449 |
+ INTEL_VGA_DEVICE(0x162D, info) /* Workstation */ |
3450 |
+ |
3451 |
+-#define INTEL_BDW_RSVDM_IDS(info) \ |
3452 |
++#define INTEL_BDW_RSVD_IDS(info) \ |
3453 |
+ INTEL_VGA_DEVICE(0x1632, info), /* ULT */ \ |
3454 |
+ INTEL_VGA_DEVICE(0x1636, info), /* ULT */ \ |
3455 |
+ INTEL_VGA_DEVICE(0x163B, info), /* Iris */ \ |
3456 |
+- INTEL_VGA_DEVICE(0x163E, info) /* ULX */ |
3457 |
+- |
3458 |
+-#define INTEL_BDW_RSVDD_IDS(info) \ |
3459 |
++ INTEL_VGA_DEVICE(0x163E, info), /* ULX */ \ |
3460 |
+ INTEL_VGA_DEVICE(0x163A, info), /* Server */ \ |
3461 |
+ INTEL_VGA_DEVICE(0x163D, info) /* Workstation */ |
3462 |
+ |
3463 |
+ #define INTEL_BDW_IDS(info) \ |
3464 |
+ INTEL_BDW_GT12_IDS(info), \ |
3465 |
+ INTEL_BDW_GT3_IDS(info), \ |
3466 |
+- INTEL_BDW_RSVDM_IDS(info), \ |
3467 |
+- INTEL_BDW_GT12_IDS(info), \ |
3468 |
+- INTEL_BDW_GT3_IDS(info), \ |
3469 |
+- INTEL_BDW_RSVDD_IDS(info) |
3470 |
++ INTEL_BDW_RSVD_IDS(info) |
3471 |
+ |
3472 |
+ #define INTEL_CHV_IDS(info) \ |
3473 |
+ INTEL_VGA_DEVICE(0x22b0, info), \ |
3474 |
+diff --git a/include/drm/ttm/ttm_object.h b/include/drm/ttm/ttm_object.h |
3475 |
+index ed953f98f0e1..1487011fe057 100644 |
3476 |
+--- a/include/drm/ttm/ttm_object.h |
3477 |
++++ b/include/drm/ttm/ttm_object.h |
3478 |
+@@ -229,6 +229,8 @@ extern void ttm_base_object_unref(struct ttm_base_object **p_base); |
3479 |
+ * @ref_type: The type of reference. |
3480 |
+ * @existed: Upon completion, indicates that an identical reference object |
3481 |
+ * already existed, and the refcount was upped on that object instead. |
3482 |
++ * @require_existed: Fail with -EPERM if an identical ref object didn't |
3483 |
++ * already exist. |
3484 |
+ * |
3485 |
+ * Checks that the base object is shareable and adds a ref object to it. |
3486 |
+ * |
3487 |
+@@ -243,7 +245,8 @@ extern void ttm_base_object_unref(struct ttm_base_object **p_base); |
3488 |
+ */ |
3489 |
+ extern int ttm_ref_object_add(struct ttm_object_file *tfile, |
3490 |
+ struct ttm_base_object *base, |
3491 |
+- enum ttm_ref_type ref_type, bool *existed); |
3492 |
++ enum ttm_ref_type ref_type, bool *existed, |
3493 |
++ bool require_existed); |
3494 |
+ |
3495 |
+ extern bool ttm_ref_object_exists(struct ttm_object_file *tfile, |
3496 |
+ struct ttm_base_object *base); |
3497 |
+diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h |
3498 |
+index b5abfda80465..4c5bca38c653 100644 |
3499 |
+--- a/include/linux/arm-smccc.h |
3500 |
++++ b/include/linux/arm-smccc.h |
3501 |
+@@ -14,9 +14,6 @@ |
3502 |
+ #ifndef __LINUX_ARM_SMCCC_H |
3503 |
+ #define __LINUX_ARM_SMCCC_H |
3504 |
+ |
3505 |
+-#include <linux/linkage.h> |
3506 |
+-#include <linux/types.h> |
3507 |
+- |
3508 |
+ /* |
3509 |
+ * This file provides common defines for ARM SMC Calling Convention as |
3510 |
+ * specified in |
3511 |
+@@ -60,6 +57,13 @@ |
3512 |
+ #define ARM_SMCCC_OWNER_TRUSTED_OS 50 |
3513 |
+ #define ARM_SMCCC_OWNER_TRUSTED_OS_END 63 |
3514 |
+ |
3515 |
++#define ARM_SMCCC_QUIRK_NONE 0 |
3516 |
++#define ARM_SMCCC_QUIRK_QCOM_A6 1 /* Save/restore register a6 */ |
3517 |
++ |
3518 |
++#ifndef __ASSEMBLY__ |
3519 |
++ |
3520 |
++#include <linux/linkage.h> |
3521 |
++#include <linux/types.h> |
3522 |
+ /** |
3523 |
+ * struct arm_smccc_res - Result from SMC/HVC call |
3524 |
+ * @a0-a3 result values from registers 0 to 3 |
3525 |
+@@ -72,33 +76,59 @@ struct arm_smccc_res { |
3526 |
+ }; |
3527 |
+ |
3528 |
+ /** |
3529 |
+- * arm_smccc_smc() - make SMC calls |
3530 |
++ * struct arm_smccc_quirk - Contains quirk information |
3531 |
++ * @id: quirk identification |
3532 |
++ * @state: quirk specific information |
3533 |
++ * @a6: Qualcomm quirk entry for returning post-smc call contents of a6 |
3534 |
++ */ |
3535 |
++struct arm_smccc_quirk { |
3536 |
++ int id; |
3537 |
++ union { |
3538 |
++ unsigned long a6; |
3539 |
++ } state; |
3540 |
++}; |
3541 |
++ |
3542 |
++/** |
3543 |
++ * __arm_smccc_smc() - make SMC calls |
3544 |
+ * @a0-a7: arguments passed in registers 0 to 7 |
3545 |
+ * @res: result values from registers 0 to 3 |
3546 |
++ * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required. |
3547 |
+ * |
3548 |
+ * This function is used to make SMC calls following SMC Calling Convention. |
3549 |
+ * The content of the supplied param are copied to registers 0 to 7 prior |
3550 |
+ * to the SMC instruction. The return values are updated with the content |
3551 |
+- * from register 0 to 3 on return from the SMC instruction. |
3552 |
++ * from register 0 to 3 on return from the SMC instruction. An optional |
3553 |
++ * quirk structure provides vendor specific behavior. |
3554 |
+ */ |
3555 |
+-asmlinkage void arm_smccc_smc(unsigned long a0, unsigned long a1, |
3556 |
++asmlinkage void __arm_smccc_smc(unsigned long a0, unsigned long a1, |
3557 |
+ unsigned long a2, unsigned long a3, unsigned long a4, |
3558 |
+ unsigned long a5, unsigned long a6, unsigned long a7, |
3559 |
+- struct arm_smccc_res *res); |
3560 |
++ struct arm_smccc_res *res, struct arm_smccc_quirk *quirk); |
3561 |
+ |
3562 |
+ /** |
3563 |
+- * arm_smccc_hvc() - make HVC calls |
3564 |
++ * __arm_smccc_hvc() - make HVC calls |
3565 |
+ * @a0-a7: arguments passed in registers 0 to 7 |
3566 |
+ * @res: result values from registers 0 to 3 |
3567 |
++ * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required. |
3568 |
+ * |
3569 |
+ * This function is used to make HVC calls following SMC Calling |
3570 |
+ * Convention. The content of the supplied param are copied to registers 0 |
3571 |
+ * to 7 prior to the HVC instruction. The return values are updated with |
3572 |
+- * the content from register 0 to 3 on return from the HVC instruction. |
3573 |
++ * the content from register 0 to 3 on return from the HVC instruction. An |
3574 |
++ * optional quirk structure provides vendor specific behavior. |
3575 |
+ */ |
3576 |
+-asmlinkage void arm_smccc_hvc(unsigned long a0, unsigned long a1, |
3577 |
++asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1, |
3578 |
+ unsigned long a2, unsigned long a3, unsigned long a4, |
3579 |
+ unsigned long a5, unsigned long a6, unsigned long a7, |
3580 |
+- struct arm_smccc_res *res); |
3581 |
++ struct arm_smccc_res *res, struct arm_smccc_quirk *quirk); |
3582 |
++ |
3583 |
++#define arm_smccc_smc(...) __arm_smccc_smc(__VA_ARGS__, NULL) |
3584 |
++ |
3585 |
++#define arm_smccc_smc_quirk(...) __arm_smccc_smc(__VA_ARGS__) |
3586 |
++ |
3587 |
++#define arm_smccc_hvc(...) __arm_smccc_hvc(__VA_ARGS__, NULL) |
3588 |
++ |
3589 |
++#define arm_smccc_hvc_quirk(...) __arm_smccc_hvc(__VA_ARGS__) |
3590 |
+ |
3591 |
++#endif /*__ASSEMBLY__*/ |
3592 |
+ #endif /*__LINUX_ARM_SMCCC_H*/ |
3593 |
+diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h |
3594 |
+index 73dda0edcb97..a4f77feecbb0 100644 |
3595 |
+--- a/include/linux/pci_ids.h |
3596 |
++++ b/include/linux/pci_ids.h |
3597 |
+@@ -2516,6 +2516,8 @@ |
3598 |
+ #define PCI_DEVICE_ID_KORENIX_JETCARDF2 0x1700 |
3599 |
+ #define PCI_DEVICE_ID_KORENIX_JETCARDF3 0x17ff |
3600 |
+ |
3601 |
++#define PCI_VENDOR_ID_HUAWEI 0x19e5 |
3602 |
++ |
3603 |
+ #define PCI_VENDOR_ID_NETRONOME 0x19ee |
3604 |
+ #define PCI_DEVICE_ID_NETRONOME_NFP3200 0x3200 |
3605 |
+ #define PCI_DEVICE_ID_NETRONOME_NFP3240 0x3240 |
3606 |
+diff --git a/include/linux/random.h b/include/linux/random.h |
3607 |
+index 7bd2403e4fef..16ab429735a7 100644 |
3608 |
+--- a/include/linux/random.h |
3609 |
++++ b/include/linux/random.h |
3610 |
+@@ -37,7 +37,6 @@ extern void get_random_bytes(void *buf, int nbytes); |
3611 |
+ extern int add_random_ready_callback(struct random_ready_callback *rdy); |
3612 |
+ extern void del_random_ready_callback(struct random_ready_callback *rdy); |
3613 |
+ extern void get_random_bytes_arch(void *buf, int nbytes); |
3614 |
+-extern int random_int_secret_init(void); |
3615 |
+ |
3616 |
+ #ifndef MODULE |
3617 |
+ extern const struct file_operations random_fops, urandom_fops; |
3618 |
+diff --git a/init/main.c b/init/main.c |
3619 |
+index b0c9d6facef9..09beb7fc6e8c 100644 |
3620 |
+--- a/init/main.c |
3621 |
++++ b/init/main.c |
3622 |
+@@ -879,7 +879,6 @@ static void __init do_basic_setup(void) |
3623 |
+ do_ctors(); |
3624 |
+ usermodehelper_enable(); |
3625 |
+ do_initcalls(); |
3626 |
+- random_int_secret_init(); |
3627 |
+ } |
3628 |
+ |
3629 |
+ static void __init do_pre_smp_initcalls(void) |
3630 |
+diff --git a/kernel/ptrace.c b/kernel/ptrace.c |
3631 |
+index 49ba7c1ade9d..a5caecef88be 100644 |
3632 |
+--- a/kernel/ptrace.c |
3633 |
++++ b/kernel/ptrace.c |
3634 |
+@@ -181,11 +181,17 @@ static void ptrace_unfreeze_traced(struct task_struct *task) |
3635 |
+ |
3636 |
+ WARN_ON(!task->ptrace || task->parent != current); |
3637 |
+ |
3638 |
++ /* |
3639 |
++ * PTRACE_LISTEN can allow ptrace_trap_notify to wake us up remotely. |
3640 |
++ * Recheck state under the lock to close this race. |
3641 |
++ */ |
3642 |
+ spin_lock_irq(&task->sighand->siglock); |
3643 |
+- if (__fatal_signal_pending(task)) |
3644 |
+- wake_up_state(task, __TASK_TRACED); |
3645 |
+- else |
3646 |
+- task->state = TASK_TRACED; |
3647 |
++ if (task->state == __TASK_TRACED) { |
3648 |
++ if (__fatal_signal_pending(task)) |
3649 |
++ wake_up_state(task, __TASK_TRACED); |
3650 |
++ else |
3651 |
++ task->state = TASK_TRACED; |
3652 |
++ } |
3653 |
+ spin_unlock_irq(&task->sighand->siglock); |
3654 |
+ } |
3655 |
+ |
3656 |
+diff --git a/kernel/trace/ring_buffer.c b/kernel/trace/ring_buffer.c |
3657 |
+index a85739efcc30..8df48ccb8af6 100644 |
3658 |
+--- a/kernel/trace/ring_buffer.c |
3659 |
++++ b/kernel/trace/ring_buffer.c |
3660 |
+@@ -4825,9 +4825,9 @@ static __init int test_ringbuffer(void) |
3661 |
+ rb_data[cpu].cnt = cpu; |
3662 |
+ rb_threads[cpu] = kthread_create(rb_test, &rb_data[cpu], |
3663 |
+ "rbtester/%d", cpu); |
3664 |
+- if (WARN_ON(!rb_threads[cpu])) { |
3665 |
++ if (WARN_ON(IS_ERR(rb_threads[cpu]))) { |
3666 |
+ pr_cont("FAILED\n"); |
3667 |
+- ret = -1; |
3668 |
++ ret = PTR_ERR(rb_threads[cpu]); |
3669 |
+ goto out_free; |
3670 |
+ } |
3671 |
+ |
3672 |
+@@ -4837,9 +4837,9 @@ static __init int test_ringbuffer(void) |
3673 |
+ |
3674 |
+ /* Now create the rb hammer! */ |
3675 |
+ rb_hammer = kthread_run(rb_hammer_test, NULL, "rbhammer"); |
3676 |
+- if (WARN_ON(!rb_hammer)) { |
3677 |
++ if (WARN_ON(IS_ERR(rb_hammer))) { |
3678 |
+ pr_cont("FAILED\n"); |
3679 |
+- ret = -1; |
3680 |
++ ret = PTR_ERR(rb_hammer); |
3681 |
+ goto out_free; |
3682 |
+ } |
3683 |
+ |
3684 |
+diff --git a/mm/mempolicy.c b/mm/mempolicy.c |
3685 |
+index 1e7873e40c9a..dc8a2672c407 100644 |
3686 |
+--- a/mm/mempolicy.c |
3687 |
++++ b/mm/mempolicy.c |
3688 |
+@@ -1526,7 +1526,6 @@ COMPAT_SYSCALL_DEFINE5(get_mempolicy, int __user *, policy, |
3689 |
+ COMPAT_SYSCALL_DEFINE3(set_mempolicy, int, mode, compat_ulong_t __user *, nmask, |
3690 |
+ compat_ulong_t, maxnode) |
3691 |
+ { |
3692 |
+- long err = 0; |
3693 |
+ unsigned long __user *nm = NULL; |
3694 |
+ unsigned long nr_bits, alloc_size; |
3695 |
+ DECLARE_BITMAP(bm, MAX_NUMNODES); |
3696 |
+@@ -1535,14 +1534,13 @@ COMPAT_SYSCALL_DEFINE3(set_mempolicy, int, mode, compat_ulong_t __user *, nmask, |
3697 |
+ alloc_size = ALIGN(nr_bits, BITS_PER_LONG) / 8; |
3698 |
+ |
3699 |
+ if (nmask) { |
3700 |
+- err = compat_get_bitmap(bm, nmask, nr_bits); |
3701 |
++ if (compat_get_bitmap(bm, nmask, nr_bits)) |
3702 |
++ return -EFAULT; |
3703 |
+ nm = compat_alloc_user_space(alloc_size); |
3704 |
+- err |= copy_to_user(nm, bm, alloc_size); |
3705 |
++ if (copy_to_user(nm, bm, alloc_size)) |
3706 |
++ return -EFAULT; |
3707 |
+ } |
3708 |
+ |
3709 |
+- if (err) |
3710 |
+- return -EFAULT; |
3711 |
+- |
3712 |
+ return sys_set_mempolicy(mode, nm, nr_bits+1); |
3713 |
+ } |
3714 |
+ |
3715 |
+@@ -1550,7 +1548,6 @@ COMPAT_SYSCALL_DEFINE6(mbind, compat_ulong_t, start, compat_ulong_t, len, |
3716 |
+ compat_ulong_t, mode, compat_ulong_t __user *, nmask, |
3717 |
+ compat_ulong_t, maxnode, compat_ulong_t, flags) |
3718 |
+ { |
3719 |
+- long err = 0; |
3720 |
+ unsigned long __user *nm = NULL; |
3721 |
+ unsigned long nr_bits, alloc_size; |
3722 |
+ nodemask_t bm; |
3723 |
+@@ -1559,14 +1556,13 @@ COMPAT_SYSCALL_DEFINE6(mbind, compat_ulong_t, start, compat_ulong_t, len, |
3724 |
+ alloc_size = ALIGN(nr_bits, BITS_PER_LONG) / 8; |
3725 |
+ |
3726 |
+ if (nmask) { |
3727 |
+- err = compat_get_bitmap(nodes_addr(bm), nmask, nr_bits); |
3728 |
++ if (compat_get_bitmap(nodes_addr(bm), nmask, nr_bits)) |
3729 |
++ return -EFAULT; |
3730 |
+ nm = compat_alloc_user_space(alloc_size); |
3731 |
+- err |= copy_to_user(nm, nodes_addr(bm), alloc_size); |
3732 |
++ if (copy_to_user(nm, nodes_addr(bm), alloc_size)) |
3733 |
++ return -EFAULT; |
3734 |
+ } |
3735 |
+ |
3736 |
+- if (err) |
3737 |
+- return -EFAULT; |
3738 |
+- |
3739 |
+ return sys_mbind(start, len, mode, nm, nr_bits+1, flags); |
3740 |
+ } |
3741 |
+ |
3742 |
+diff --git a/mm/page_alloc.c b/mm/page_alloc.c |
3743 |
+index 1a5f6655958e..1aec370bf9e9 100644 |
3744 |
+--- a/mm/page_alloc.c |
3745 |
++++ b/mm/page_alloc.c |
3746 |
+@@ -4381,13 +4381,13 @@ void show_free_areas(unsigned int filter) |
3747 |
+ K(node_page_state(pgdat, NR_FILE_MAPPED)), |
3748 |
+ K(node_page_state(pgdat, NR_FILE_DIRTY)), |
3749 |
+ K(node_page_state(pgdat, NR_WRITEBACK)), |
3750 |
++ K(node_page_state(pgdat, NR_SHMEM)), |
3751 |
+ #ifdef CONFIG_TRANSPARENT_HUGEPAGE |
3752 |
+ K(node_page_state(pgdat, NR_SHMEM_THPS) * HPAGE_PMD_NR), |
3753 |
+ K(node_page_state(pgdat, NR_SHMEM_PMDMAPPED) |
3754 |
+ * HPAGE_PMD_NR), |
3755 |
+ K(node_page_state(pgdat, NR_ANON_THPS) * HPAGE_PMD_NR), |
3756 |
+ #endif |
3757 |
+- K(node_page_state(pgdat, NR_SHMEM)), |
3758 |
+ K(node_page_state(pgdat, NR_WRITEBACK_TEMP)), |
3759 |
+ K(node_page_state(pgdat, NR_UNSTABLE_NFS)), |
3760 |
+ node_page_state(pgdat, NR_PAGES_SCANNED), |
3761 |
+diff --git a/net/mac80211/iface.c b/net/mac80211/iface.c |
3762 |
+index d37ae7dc114b..56d491950390 100644 |
3763 |
+--- a/net/mac80211/iface.c |
3764 |
++++ b/net/mac80211/iface.c |
3765 |
+@@ -718,7 +718,8 @@ int ieee80211_do_open(struct wireless_dev *wdev, bool coming_up) |
3766 |
+ ieee80211_recalc_ps(local); |
3767 |
+ |
3768 |
+ if (sdata->vif.type == NL80211_IFTYPE_MONITOR || |
3769 |
+- sdata->vif.type == NL80211_IFTYPE_AP_VLAN) { |
3770 |
++ sdata->vif.type == NL80211_IFTYPE_AP_VLAN || |
3771 |
++ local->ops->wake_tx_queue) { |
3772 |
+ /* XXX: for AP_VLAN, actually track AP queues */ |
3773 |
+ netif_tx_start_all_queues(dev); |
3774 |
+ } else if (dev) { |
3775 |
+diff --git a/net/wireless/sysfs.c b/net/wireless/sysfs.c |
3776 |
+index 14b3f007826d..2927d06faa6e 100644 |
3777 |
+--- a/net/wireless/sysfs.c |
3778 |
++++ b/net/wireless/sysfs.c |
3779 |
+@@ -130,12 +130,10 @@ static int wiphy_resume(struct device *dev) |
3780 |
+ /* Age scan results with time spent in suspend */ |
3781 |
+ cfg80211_bss_age(rdev, get_seconds() - rdev->suspend_at); |
3782 |
+ |
3783 |
+- if (rdev->ops->resume) { |
3784 |
+- rtnl_lock(); |
3785 |
+- if (rdev->wiphy.registered) |
3786 |
+- ret = rdev_resume(rdev); |
3787 |
+- rtnl_unlock(); |
3788 |
+- } |
3789 |
++ rtnl_lock(); |
3790 |
++ if (rdev->wiphy.registered && rdev->ops->resume) |
3791 |
++ ret = rdev_resume(rdev); |
3792 |
++ rtnl_unlock(); |
3793 |
+ |
3794 |
+ return ret; |
3795 |
+ } |
3796 |
+diff --git a/sound/soc/codecs/rt5670.c b/sound/soc/codecs/rt5670.c |
3797 |
+index 97bafac3bc15..17d20b99f041 100644 |
3798 |
+--- a/sound/soc/codecs/rt5670.c |
3799 |
++++ b/sound/soc/codecs/rt5670.c |
3800 |
+@@ -2814,6 +2814,7 @@ MODULE_DEVICE_TABLE(i2c, rt5670_i2c_id); |
3801 |
+ static const struct acpi_device_id rt5670_acpi_match[] = { |
3802 |
+ { "10EC5670", 0}, |
3803 |
+ { "10EC5672", 0}, |
3804 |
++ { "10EC5640", 0}, /* quirk */ |
3805 |
+ { }, |
3806 |
+ }; |
3807 |
+ MODULE_DEVICE_TABLE(acpi, rt5670_acpi_match); |
3808 |
+diff --git a/sound/soc/intel/atom/sst/sst_acpi.c b/sound/soc/intel/atom/sst/sst_acpi.c |
3809 |
+index f4d92bbc5373..63820080dd16 100644 |
3810 |
+--- a/sound/soc/intel/atom/sst/sst_acpi.c |
3811 |
++++ b/sound/soc/intel/atom/sst/sst_acpi.c |
3812 |
+@@ -400,6 +400,7 @@ static int sst_acpi_remove(struct platform_device *pdev) |
3813 |
+ static unsigned long cht_machine_id; |
3814 |
+ |
3815 |
+ #define CHT_SURFACE_MACH 1 |
3816 |
++#define BYT_THINKPAD_10 2 |
3817 |
+ |
3818 |
+ static int cht_surface_quirk_cb(const struct dmi_system_id *id) |
3819 |
+ { |
3820 |
+@@ -407,6 +408,23 @@ static int cht_surface_quirk_cb(const struct dmi_system_id *id) |
3821 |
+ return 1; |
3822 |
+ } |
3823 |
+ |
3824 |
++static int byt_thinkpad10_quirk_cb(const struct dmi_system_id *id) |
3825 |
++{ |
3826 |
++ cht_machine_id = BYT_THINKPAD_10; |
3827 |
++ return 1; |
3828 |
++} |
3829 |
++ |
3830 |
++ |
3831 |
++static const struct dmi_system_id byt_table[] = { |
3832 |
++ { |
3833 |
++ .callback = byt_thinkpad10_quirk_cb, |
3834 |
++ .matches = { |
3835 |
++ DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), |
3836 |
++ DMI_MATCH(DMI_PRODUCT_NAME, "20C3001VHH"), |
3837 |
++ }, |
3838 |
++ }, |
3839 |
++ { } |
3840 |
++}; |
3841 |
+ |
3842 |
+ static const struct dmi_system_id cht_table[] = { |
3843 |
+ { |
3844 |
+@@ -424,6 +442,10 @@ static struct sst_acpi_mach cht_surface_mach = { |
3845 |
+ "10EC5640", "cht-bsw-rt5645", "intel/fw_sst_22a8.bin", "cht-bsw", NULL, |
3846 |
+ &chv_platform_data }; |
3847 |
+ |
3848 |
++static struct sst_acpi_mach byt_thinkpad_10 = { |
3849 |
++ "10EC5640", "cht-bsw-rt5672", "intel/fw_sst_0f28.bin", "cht-bsw", NULL, |
3850 |
++ &byt_rvp_platform_data }; |
3851 |
++ |
3852 |
+ static struct sst_acpi_mach *cht_quirk(void *arg) |
3853 |
+ { |
3854 |
+ struct sst_acpi_mach *mach = arg; |
3855 |
+@@ -436,8 +458,21 @@ static struct sst_acpi_mach *cht_quirk(void *arg) |
3856 |
+ return mach; |
3857 |
+ } |
3858 |
+ |
3859 |
++static struct sst_acpi_mach *byt_quirk(void *arg) |
3860 |
++{ |
3861 |
++ struct sst_acpi_mach *mach = arg; |
3862 |
++ |
3863 |
++ dmi_check_system(byt_table); |
3864 |
++ |
3865 |
++ if (cht_machine_id == BYT_THINKPAD_10) |
3866 |
++ return &byt_thinkpad_10; |
3867 |
++ else |
3868 |
++ return mach; |
3869 |
++} |
3870 |
++ |
3871 |
++ |
3872 |
+ static struct sst_acpi_mach sst_acpi_bytcr[] = { |
3873 |
+- {"10EC5640", "bytcr_rt5640", "intel/fw_sst_0f28.bin", "bytcr_rt5640", NULL, |
3874 |
++ {"10EC5640", "bytcr_rt5640", "intel/fw_sst_0f28.bin", "bytcr_rt5640", byt_quirk, |
3875 |
+ &byt_rvp_platform_data }, |
3876 |
+ {"10EC5642", "bytcr_rt5640", "intel/fw_sst_0f28.bin", "bytcr_rt5640", NULL, |
3877 |
+ &byt_rvp_platform_data }, |
3878 |
+diff --git a/sound/soc/intel/boards/bytcr_rt5640.c b/sound/soc/intel/boards/bytcr_rt5640.c |
3879 |
+index 8d2fb2d6f532..1bd985f01c73 100644 |
3880 |
+--- a/sound/soc/intel/boards/bytcr_rt5640.c |
3881 |
++++ b/sound/soc/intel/boards/bytcr_rt5640.c |
3882 |
+@@ -387,6 +387,16 @@ static const struct dmi_system_id byt_rt5640_quirk_table[] = { |
3883 |
+ BYT_RT5640_SSP0_AIF1), |
3884 |
+ |
3885 |
+ }, |
3886 |
++ { |
3887 |
++ .callback = byt_rt5640_quirk_cb, |
3888 |
++ .matches = { |
3889 |
++ DMI_MATCH(DMI_SYS_VENDOR, "Insyde"), |
3890 |
++ }, |
3891 |
++ .driver_data = (unsigned long *)(BYT_RT5640_IN3_MAP | |
3892 |
++ BYT_RT5640_MCLK_EN | |
3893 |
++ BYT_RT5640_SSP0_AIF1), |
3894 |
++ |
3895 |
++ }, |
3896 |
+ {} |
3897 |
+ }; |
3898 |
+ |
3899 |
+diff --git a/sound/soc/intel/boards/cht_bsw_rt5645.c b/sound/soc/intel/boards/cht_bsw_rt5645.c |
3900 |
+index f504a0e18f91..753938371965 100644 |
3901 |
+--- a/sound/soc/intel/boards/cht_bsw_rt5645.c |
3902 |
++++ b/sound/soc/intel/boards/cht_bsw_rt5645.c |
3903 |
+@@ -24,6 +24,9 @@ |
3904 |
+ #include <linux/acpi.h> |
3905 |
+ #include <linux/platform_device.h> |
3906 |
+ #include <linux/slab.h> |
3907 |
++#include <asm/cpu_device_id.h> |
3908 |
++#include <asm/platform_sst_audio.h> |
3909 |
++#include <linux/clk.h> |
3910 |
+ #include <sound/pcm.h> |
3911 |
+ #include <sound/pcm_params.h> |
3912 |
+ #include <sound/soc.h> |
3913 |
+@@ -45,6 +48,7 @@ struct cht_mc_private { |
3914 |
+ struct snd_soc_jack jack; |
3915 |
+ struct cht_acpi_card *acpi_card; |
3916 |
+ char codec_name[16]; |
3917 |
++ struct clk *mclk; |
3918 |
+ }; |
3919 |
+ |
3920 |
+ static inline struct snd_soc_dai *cht_get_codec_dai(struct snd_soc_card *card) |
3921 |
+@@ -65,6 +69,7 @@ static int platform_clock_control(struct snd_soc_dapm_widget *w, |
3922 |
+ struct snd_soc_dapm_context *dapm = w->dapm; |
3923 |
+ struct snd_soc_card *card = dapm->card; |
3924 |
+ struct snd_soc_dai *codec_dai; |
3925 |
++ struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card); |
3926 |
+ int ret; |
3927 |
+ |
3928 |
+ codec_dai = cht_get_codec_dai(card); |
3929 |
+@@ -73,19 +78,30 @@ static int platform_clock_control(struct snd_soc_dapm_widget *w, |
3930 |
+ return -EIO; |
3931 |
+ } |
3932 |
+ |
3933 |
+- if (!SND_SOC_DAPM_EVENT_OFF(event)) |
3934 |
+- return 0; |
3935 |
++ if (SND_SOC_DAPM_EVENT_ON(event)) { |
3936 |
++ if (ctx->mclk) { |
3937 |
++ ret = clk_prepare_enable(ctx->mclk); |
3938 |
++ if (ret < 0) { |
3939 |
++ dev_err(card->dev, |
3940 |
++ "could not configure MCLK state"); |
3941 |
++ return ret; |
3942 |
++ } |
3943 |
++ } |
3944 |
++ } else { |
3945 |
++ /* Set codec sysclk source to its internal clock because codec PLL will |
3946 |
++ * be off when idle and MCLK will also be off when codec is |
3947 |
++ * runtime suspended. Codec needs clock for jack detection and button |
3948 |
++ * press. MCLK is turned off with clock framework or ACPI. |
3949 |
++ */ |
3950 |
++ ret = snd_soc_dai_set_sysclk(codec_dai, RT5645_SCLK_S_RCCLK, |
3951 |
++ 48000 * 512, SND_SOC_CLOCK_IN); |
3952 |
++ if (ret < 0) { |
3953 |
++ dev_err(card->dev, "can't set codec sysclk: %d\n", ret); |
3954 |
++ return ret; |
3955 |
++ } |
3956 |
+ |
3957 |
+- /* Set codec sysclk source to its internal clock because codec PLL will |
3958 |
+- * be off when idle and MCLK will also be off by ACPI when codec is |
3959 |
+- * runtime suspended. Codec needs clock for jack detection and button |
3960 |
+- * press. |
3961 |
+- */ |
3962 |
+- ret = snd_soc_dai_set_sysclk(codec_dai, RT5645_SCLK_S_RCCLK, |
3963 |
+- 0, SND_SOC_CLOCK_IN); |
3964 |
+- if (ret < 0) { |
3965 |
+- dev_err(card->dev, "can't set codec sysclk: %d\n", ret); |
3966 |
+- return ret; |
3967 |
++ if (ctx->mclk) |
3968 |
++ clk_disable_unprepare(ctx->mclk); |
3969 |
+ } |
3970 |
+ |
3971 |
+ return 0; |
3972 |
+@@ -97,7 +113,7 @@ static const struct snd_soc_dapm_widget cht_dapm_widgets[] = { |
3973 |
+ SND_SOC_DAPM_MIC("Int Mic", NULL), |
3974 |
+ SND_SOC_DAPM_SPK("Ext Spk", NULL), |
3975 |
+ SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0, |
3976 |
+- platform_clock_control, SND_SOC_DAPM_POST_PMD), |
3977 |
++ platform_clock_control, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), |
3978 |
+ }; |
3979 |
+ |
3980 |
+ static const struct snd_soc_dapm_route cht_rt5645_audio_map[] = { |
3981 |
+@@ -225,6 +241,26 @@ static int cht_codec_init(struct snd_soc_pcm_runtime *runtime) |
3982 |
+ |
3983 |
+ rt5645_set_jack_detect(codec, &ctx->jack, &ctx->jack, &ctx->jack); |
3984 |
+ |
3985 |
++ if (ctx->mclk) { |
3986 |
++ /* |
3987 |
++ * The firmware might enable the clock at |
3988 |
++ * boot (this information may or may not |
3989 |
++ * be reflected in the enable clock register). |
3990 |
++ * To change the rate we must disable the clock |
3991 |
++ * first to cover these cases. Due to common |
3992 |
++ * clock framework restrictions that do not allow |
3993 |
++ * to disable a clock that has not been enabled, |
3994 |
++ * we need to enable the clock first. |
3995 |
++ */ |
3996 |
++ ret = clk_prepare_enable(ctx->mclk); |
3997 |
++ if (!ret) |
3998 |
++ clk_disable_unprepare(ctx->mclk); |
3999 |
++ |
4000 |
++ ret = clk_set_rate(ctx->mclk, CHT_PLAT_CLK_3_HZ); |
4001 |
++ |
4002 |
++ if (ret) |
4003 |
++ dev_err(runtime->dev, "unable to set MCLK rate\n"); |
4004 |
++ } |
4005 |
+ return ret; |
4006 |
+ } |
4007 |
+ |
4008 |
+@@ -349,6 +385,18 @@ static struct cht_acpi_card snd_soc_cards[] = { |
4009 |
+ |
4010 |
+ static char cht_rt5640_codec_name[16]; /* i2c-<HID>:00 with HID being 8 chars */ |
4011 |
+ |
4012 |
++static bool is_valleyview(void) |
4013 |
++{ |
4014 |
++ static const struct x86_cpu_id cpu_ids[] = { |
4015 |
++ { X86_VENDOR_INTEL, 6, 55 }, /* Valleyview, Bay Trail */ |
4016 |
++ {} |
4017 |
++ }; |
4018 |
++ |
4019 |
++ if (!x86_match_cpu(cpu_ids)) |
4020 |
++ return false; |
4021 |
++ return true; |
4022 |
++} |
4023 |
++ |
4024 |
+ static int snd_cht_mc_probe(struct platform_device *pdev) |
4025 |
+ { |
4026 |
+ int ret_val = 0; |
4027 |
+@@ -358,22 +406,32 @@ static int snd_cht_mc_probe(struct platform_device *pdev) |
4028 |
+ struct sst_acpi_mach *mach; |
4029 |
+ const char *i2c_name = NULL; |
4030 |
+ int dai_index = 0; |
4031 |
++ bool found = false; |
4032 |
+ |
4033 |
+ drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_ATOMIC); |
4034 |
+ if (!drv) |
4035 |
+ return -ENOMEM; |
4036 |
+ |
4037 |
++ mach = (&pdev->dev)->platform_data; |
4038 |
++ |
4039 |
+ for (i = 0; i < ARRAY_SIZE(snd_soc_cards); i++) { |
4040 |
+- if (acpi_dev_found(snd_soc_cards[i].codec_id)) { |
4041 |
++ if (acpi_dev_found(snd_soc_cards[i].codec_id) && |
4042 |
++ (!strncmp(snd_soc_cards[i].codec_id, mach->id, 8))) { |
4043 |
+ dev_dbg(&pdev->dev, |
4044 |
+ "found codec %s\n", snd_soc_cards[i].codec_id); |
4045 |
+ card = snd_soc_cards[i].soc_card; |
4046 |
+ drv->acpi_card = &snd_soc_cards[i]; |
4047 |
++ found = true; |
4048 |
+ break; |
4049 |
+ } |
4050 |
+ } |
4051 |
++ |
4052 |
++ if (!found) { |
4053 |
++ dev_err(&pdev->dev, "No matching HID found in supported list\n"); |
4054 |
++ return -ENODEV; |
4055 |
++ } |
4056 |
++ |
4057 |
+ card->dev = &pdev->dev; |
4058 |
+- mach = card->dev->platform_data; |
4059 |
+ sprintf(drv->codec_name, "i2c-%s:00", drv->acpi_card->codec_id); |
4060 |
+ |
4061 |
+ /* set correct codec name */ |
4062 |
+@@ -391,6 +449,16 @@ static int snd_cht_mc_probe(struct platform_device *pdev) |
4063 |
+ cht_dailink[dai_index].codec_name = cht_rt5640_codec_name; |
4064 |
+ } |
4065 |
+ |
4066 |
++ if (is_valleyview()) { |
4067 |
++ drv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3"); |
4068 |
++ if (IS_ERR(drv->mclk)) { |
4069 |
++ dev_err(&pdev->dev, |
4070 |
++ "Failed to get MCLK from pmc_plt_clk_3: %ld\n", |
4071 |
++ PTR_ERR(drv->mclk)); |
4072 |
++ return PTR_ERR(drv->mclk); |
4073 |
++ } |
4074 |
++ } |
4075 |
++ |
4076 |
+ snd_soc_card_set_drvdata(card, drv); |
4077 |
+ ret_val = devm_snd_soc_register_card(&pdev->dev, card); |
4078 |
+ if (ret_val) { |
4079 |
+diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c |
4080 |
+index f24d19526603..268f2bf691b3 100644 |
4081 |
+--- a/sound/soc/sunxi/sun4i-i2s.c |
4082 |
++++ b/sound/soc/sunxi/sun4i-i2s.c |
4083 |
+@@ -14,9 +14,11 @@ |
4084 |
+ #include <linux/clk.h> |
4085 |
+ #include <linux/dmaengine.h> |
4086 |
+ #include <linux/module.h> |
4087 |
++#include <linux/of_device.h> |
4088 |
+ #include <linux/platform_device.h> |
4089 |
+ #include <linux/pm_runtime.h> |
4090 |
+ #include <linux/regmap.h> |
4091 |
++#include <linux/reset.h> |
4092 |
+ |
4093 |
+ #include <sound/dmaengine_pcm.h> |
4094 |
+ #include <sound/pcm_params.h> |
4095 |
+@@ -92,6 +94,7 @@ struct sun4i_i2s { |
4096 |
+ struct clk *bus_clk; |
4097 |
+ struct clk *mod_clk; |
4098 |
+ struct regmap *regmap; |
4099 |
++ struct reset_control *rst; |
4100 |
+ |
4101 |
+ unsigned int mclk_freq; |
4102 |
+ |
4103 |
+@@ -651,9 +654,22 @@ static int sun4i_i2s_runtime_suspend(struct device *dev) |
4104 |
+ return 0; |
4105 |
+ } |
4106 |
+ |
4107 |
++struct sun4i_i2s_quirks { |
4108 |
++ bool has_reset; |
4109 |
++}; |
4110 |
++ |
4111 |
++static const struct sun4i_i2s_quirks sun4i_a10_i2s_quirks = { |
4112 |
++ .has_reset = false, |
4113 |
++}; |
4114 |
++ |
4115 |
++static const struct sun4i_i2s_quirks sun6i_a31_i2s_quirks = { |
4116 |
++ .has_reset = true, |
4117 |
++}; |
4118 |
++ |
4119 |
+ static int sun4i_i2s_probe(struct platform_device *pdev) |
4120 |
+ { |
4121 |
+ struct sun4i_i2s *i2s; |
4122 |
++ const struct sun4i_i2s_quirks *quirks; |
4123 |
+ struct resource *res; |
4124 |
+ void __iomem *regs; |
4125 |
+ int irq, ret; |
4126 |
+@@ -674,6 +690,12 @@ static int sun4i_i2s_probe(struct platform_device *pdev) |
4127 |
+ return irq; |
4128 |
+ } |
4129 |
+ |
4130 |
++ quirks = of_device_get_match_data(&pdev->dev); |
4131 |
++ if (!quirks) { |
4132 |
++ dev_err(&pdev->dev, "Failed to determine the quirks to use\n"); |
4133 |
++ return -ENODEV; |
4134 |
++ } |
4135 |
++ |
4136 |
+ i2s->bus_clk = devm_clk_get(&pdev->dev, "apb"); |
4137 |
+ if (IS_ERR(i2s->bus_clk)) { |
4138 |
+ dev_err(&pdev->dev, "Can't get our bus clock\n"); |
4139 |
+@@ -692,7 +714,24 @@ static int sun4i_i2s_probe(struct platform_device *pdev) |
4140 |
+ dev_err(&pdev->dev, "Can't get our mod clock\n"); |
4141 |
+ return PTR_ERR(i2s->mod_clk); |
4142 |
+ } |
4143 |
+- |
4144 |
++ |
4145 |
++ if (quirks->has_reset) { |
4146 |
++ i2s->rst = devm_reset_control_get(&pdev->dev, NULL); |
4147 |
++ if (IS_ERR(i2s->rst)) { |
4148 |
++ dev_err(&pdev->dev, "Failed to get reset control\n"); |
4149 |
++ return PTR_ERR(i2s->rst); |
4150 |
++ } |
4151 |
++ } |
4152 |
++ |
4153 |
++ if (!IS_ERR(i2s->rst)) { |
4154 |
++ ret = reset_control_deassert(i2s->rst); |
4155 |
++ if (ret) { |
4156 |
++ dev_err(&pdev->dev, |
4157 |
++ "Failed to deassert the reset control\n"); |
4158 |
++ return -EINVAL; |
4159 |
++ } |
4160 |
++ } |
4161 |
++ |
4162 |
+ i2s->playback_dma_data.addr = res->start + SUN4I_I2S_FIFO_TX_REG; |
4163 |
+ i2s->playback_dma_data.maxburst = 4; |
4164 |
+ |
4165 |
+@@ -727,23 +766,37 @@ static int sun4i_i2s_probe(struct platform_device *pdev) |
4166 |
+ sun4i_i2s_runtime_suspend(&pdev->dev); |
4167 |
+ err_pm_disable: |
4168 |
+ pm_runtime_disable(&pdev->dev); |
4169 |
++ if (!IS_ERR(i2s->rst)) |
4170 |
++ reset_control_assert(i2s->rst); |
4171 |
+ |
4172 |
+ return ret; |
4173 |
+ } |
4174 |
+ |
4175 |
+ static int sun4i_i2s_remove(struct platform_device *pdev) |
4176 |
+ { |
4177 |
++ struct sun4i_i2s *i2s = dev_get_drvdata(&pdev->dev); |
4178 |
++ |
4179 |
+ snd_dmaengine_pcm_unregister(&pdev->dev); |
4180 |
+ |
4181 |
+ pm_runtime_disable(&pdev->dev); |
4182 |
+ if (!pm_runtime_status_suspended(&pdev->dev)) |
4183 |
+ sun4i_i2s_runtime_suspend(&pdev->dev); |
4184 |
+ |
4185 |
++ if (!IS_ERR(i2s->rst)) |
4186 |
++ reset_control_assert(i2s->rst); |
4187 |
++ |
4188 |
+ return 0; |
4189 |
+ } |
4190 |
+ |
4191 |
+ static const struct of_device_id sun4i_i2s_match[] = { |
4192 |
+- { .compatible = "allwinner,sun4i-a10-i2s", }, |
4193 |
++ { |
4194 |
++ .compatible = "allwinner,sun4i-a10-i2s", |
4195 |
++ .data = &sun4i_a10_i2s_quirks, |
4196 |
++ }, |
4197 |
++ { |
4198 |
++ .compatible = "allwinner,sun6i-a31-i2s", |
4199 |
++ .data = &sun6i_a31_i2s_quirks, |
4200 |
++ }, |
4201 |
+ {} |
4202 |
+ }; |
4203 |
+ MODULE_DEVICE_TABLE(of, sun4i_i2s_match); |