1 |
commit: 857fef960f822e5b9d2105502ed3707d4f52df93 |
2 |
Author: Mike Pagano <mpagano <AT> gentoo <DOT> org> |
3 |
AuthorDate: Mon Sep 21 22:19:23 2015 +0000 |
4 |
Commit: Mike Pagano <mpagano <AT> gentoo <DOT> org> |
5 |
CommitDate: Mon Sep 21 22:19:23 2015 +0000 |
6 |
URL: https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=857fef96 |
7 |
|
8 |
Linux patch 4.2.1 |
9 |
|
10 |
0000_README | 4 + |
11 |
1000_linux-4.2.1.patch | 4522 ++++++++++++++++++++++++++++++++++++++++++++++++ |
12 |
2 files changed, 4526 insertions(+) |
13 |
|
14 |
diff --git a/0000_README b/0000_README |
15 |
index 0f4cdca..0c6168a 100644 |
16 |
--- a/0000_README |
17 |
+++ b/0000_README |
18 |
@@ -43,6 +43,10 @@ EXPERIMENTAL |
19 |
Individual Patch Descriptions: |
20 |
-------------------------------------------------------------------------- |
21 |
|
22 |
+Patch: 1000_linux-4.2.1.patch |
23 |
+From: http://www.kernel.org |
24 |
+Desc: Linux 4.2.1 |
25 |
+ |
26 |
Patch: 1500_XATTR_USER_PREFIX.patch |
27 |
From: https://bugs.gentoo.org/show_bug.cgi?id=470644 |
28 |
Desc: Support for namespace user.pax.* on tmpfs. |
29 |
|
30 |
diff --git a/1000_linux-4.2.1.patch b/1000_linux-4.2.1.patch |
31 |
new file mode 100644 |
32 |
index 0000000..2be0056 |
33 |
--- /dev/null |
34 |
+++ b/1000_linux-4.2.1.patch |
35 |
@@ -0,0 +1,4522 @@ |
36 |
+diff --git a/Documentation/ABI/testing/configfs-usb-gadget-loopback b/Documentation/ABI/testing/configfs-usb-gadget-loopback |
37 |
+index 9aae5bfb9908..06beefbcf061 100644 |
38 |
+--- a/Documentation/ABI/testing/configfs-usb-gadget-loopback |
39 |
++++ b/Documentation/ABI/testing/configfs-usb-gadget-loopback |
40 |
+@@ -5,4 +5,4 @@ Description: |
41 |
+ The attributes: |
42 |
+ |
43 |
+ qlen - depth of loopback queue |
44 |
+- bulk_buflen - buffer length |
45 |
++ buflen - buffer length |
46 |
+diff --git a/Documentation/ABI/testing/configfs-usb-gadget-sourcesink b/Documentation/ABI/testing/configfs-usb-gadget-sourcesink |
47 |
+index 29477c319f61..bc7ff731aa0c 100644 |
48 |
+--- a/Documentation/ABI/testing/configfs-usb-gadget-sourcesink |
49 |
++++ b/Documentation/ABI/testing/configfs-usb-gadget-sourcesink |
50 |
+@@ -9,4 +9,4 @@ Description: |
51 |
+ isoc_maxpacket - 0 - 1023 (fs), 0 - 1024 (hs/ss) |
52 |
+ isoc_mult - 0..2 (hs/ss only) |
53 |
+ isoc_maxburst - 0..15 (ss only) |
54 |
+- qlen - buffer length |
55 |
++ buflen - buffer length |
56 |
+diff --git a/Documentation/device-mapper/statistics.txt b/Documentation/device-mapper/statistics.txt |
57 |
+index 4919b2dfd1b3..6f5ef944ca4c 100644 |
58 |
+--- a/Documentation/device-mapper/statistics.txt |
59 |
++++ b/Documentation/device-mapper/statistics.txt |
60 |
+@@ -121,6 +121,10 @@ Messages |
61 |
+ |
62 |
+ Output format: |
63 |
+ <region_id>: <start_sector>+<length> <step> <program_id> <aux_data> |
64 |
++ precise_timestamps histogram:n1,n2,n3,... |
65 |
++ |
66 |
++ The strings "precise_timestamps" and "histogram" are printed only |
67 |
++ if they were specified when creating the region. |
68 |
+ |
69 |
+ @stats_print <region_id> [<starting_line> <number_of_lines>] |
70 |
+ |
71 |
+diff --git a/Documentation/usb/gadget-testing.txt b/Documentation/usb/gadget-testing.txt |
72 |
+index 592678009c15..b24d3ef89166 100644 |
73 |
+--- a/Documentation/usb/gadget-testing.txt |
74 |
++++ b/Documentation/usb/gadget-testing.txt |
75 |
+@@ -237,9 +237,7 @@ Testing the LOOPBACK function |
76 |
+ ----------------------------- |
77 |
+ |
78 |
+ device: run the gadget |
79 |
+-host: test-usb |
80 |
+- |
81 |
+-http://www.linux-usb.org/usbtest/testusb.c |
82 |
++host: test-usb (tools/usb/testusb.c) |
83 |
+ |
84 |
+ 8. MASS STORAGE function |
85 |
+ ======================== |
86 |
+@@ -586,9 +584,8 @@ Testing the SOURCESINK function |
87 |
+ ------------------------------- |
88 |
+ |
89 |
+ device: run the gadget |
90 |
+-host: test-usb |
91 |
++host: test-usb (tools/usb/testusb.c) |
92 |
+ |
93 |
+-http://www.linux-usb.org/usbtest/testusb.c |
94 |
+ |
95 |
+ 16. UAC1 function |
96 |
+ ================= |
97 |
+diff --git a/Makefile b/Makefile |
98 |
+index c3615937df38..a03efc18aa48 100644 |
99 |
+--- a/Makefile |
100 |
++++ b/Makefile |
101 |
+@@ -1,6 +1,6 @@ |
102 |
+ VERSION = 4 |
103 |
+ PATCHLEVEL = 2 |
104 |
+-SUBLEVEL = 0 |
105 |
++SUBLEVEL = 1 |
106 |
+ EXTRAVERSION = |
107 |
+ NAME = Hurr durr I'ma sheep |
108 |
+ |
109 |
+diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig |
110 |
+index 1c5021002fe4..ede2526ecf1f 100644 |
111 |
+--- a/arch/arm/Kconfig |
112 |
++++ b/arch/arm/Kconfig |
113 |
+@@ -536,6 +536,7 @@ config ARCH_ORION5X |
114 |
+ select MVEBU_MBUS |
115 |
+ select PCI |
116 |
+ select PLAT_ORION_LEGACY |
117 |
++ select MULTI_IRQ_HANDLER |
118 |
+ help |
119 |
+ Support for the following Marvell Orion 5x series SoCs: |
120 |
+ Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182), |
121 |
+diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts b/arch/arm/boot/dts/exynos3250-rinato.dts |
122 |
+index 031853b75528..baa9b2f52009 100644 |
123 |
+--- a/arch/arm/boot/dts/exynos3250-rinato.dts |
124 |
++++ b/arch/arm/boot/dts/exynos3250-rinato.dts |
125 |
+@@ -182,7 +182,7 @@ |
126 |
+ |
127 |
+ display-timings { |
128 |
+ timing-0 { |
129 |
+- clock-frequency = <0>; |
130 |
++ clock-frequency = <4600000>; |
131 |
+ hactive = <320>; |
132 |
+ vactive = <320>; |
133 |
+ hfront-porch = <1>; |
134 |
+diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi |
135 |
+index 22316d00493e..858efd0c861d 100644 |
136 |
+--- a/arch/arm/boot/dts/rk3288.dtsi |
137 |
++++ b/arch/arm/boot/dts/rk3288.dtsi |
138 |
+@@ -626,7 +626,7 @@ |
139 |
+ compatible = "rockchip,rk3288-wdt", "snps,dw-wdt"; |
140 |
+ reg = <0xff800000 0x100>; |
141 |
+ clocks = <&cru PCLK_WDT>; |
142 |
+- interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; |
143 |
++ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; |
144 |
+ status = "disabled"; |
145 |
+ }; |
146 |
+ |
147 |
+diff --git a/arch/arm/mach-bcm/bcm63xx_smp.c b/arch/arm/mach-bcm/bcm63xx_smp.c |
148 |
+index 3f014f18cea5..b8e18cc8f237 100644 |
149 |
+--- a/arch/arm/mach-bcm/bcm63xx_smp.c |
150 |
++++ b/arch/arm/mach-bcm/bcm63xx_smp.c |
151 |
+@@ -127,7 +127,7 @@ static int bcm63138_smp_boot_secondary(unsigned int cpu, |
152 |
+ } |
153 |
+ |
154 |
+ /* Locate the secondary CPU node */ |
155 |
+- dn = of_get_cpu_node(cpu_logical_map(cpu), NULL); |
156 |
++ dn = of_get_cpu_node(cpu, NULL); |
157 |
+ if (!dn) { |
158 |
+ pr_err("SMP: failed to locate secondary CPU%d node\n", cpu); |
159 |
+ ret = -ENODEV; |
160 |
+diff --git a/arch/arm/mach-omap2/clockdomains7xx_data.c b/arch/arm/mach-omap2/clockdomains7xx_data.c |
161 |
+index 57d5df0c1fbd..7581e036bda6 100644 |
162 |
+--- a/arch/arm/mach-omap2/clockdomains7xx_data.c |
163 |
++++ b/arch/arm/mach-omap2/clockdomains7xx_data.c |
164 |
+@@ -331,7 +331,7 @@ static struct clockdomain l4per2_7xx_clkdm = { |
165 |
+ .dep_bit = DRA7XX_L4PER2_STATDEP_SHIFT, |
166 |
+ .wkdep_srcs = l4per2_wkup_sleep_deps, |
167 |
+ .sleepdep_srcs = l4per2_wkup_sleep_deps, |
168 |
+- .flags = CLKDM_CAN_HWSUP_SWSUP, |
169 |
++ .flags = CLKDM_CAN_SWSUP, |
170 |
+ }; |
171 |
+ |
172 |
+ static struct clockdomain mpu0_7xx_clkdm = { |
173 |
+diff --git a/arch/arm/mach-orion5x/include/mach/irqs.h b/arch/arm/mach-orion5x/include/mach/irqs.h |
174 |
+index a6fa9d8f12d8..2431d9923427 100644 |
175 |
+--- a/arch/arm/mach-orion5x/include/mach/irqs.h |
176 |
++++ b/arch/arm/mach-orion5x/include/mach/irqs.h |
177 |
+@@ -16,42 +16,42 @@ |
178 |
+ /* |
179 |
+ * Orion Main Interrupt Controller |
180 |
+ */ |
181 |
+-#define IRQ_ORION5X_BRIDGE 0 |
182 |
+-#define IRQ_ORION5X_DOORBELL_H2C 1 |
183 |
+-#define IRQ_ORION5X_DOORBELL_C2H 2 |
184 |
+-#define IRQ_ORION5X_UART0 3 |
185 |
+-#define IRQ_ORION5X_UART1 4 |
186 |
+-#define IRQ_ORION5X_I2C 5 |
187 |
+-#define IRQ_ORION5X_GPIO_0_7 6 |
188 |
+-#define IRQ_ORION5X_GPIO_8_15 7 |
189 |
+-#define IRQ_ORION5X_GPIO_16_23 8 |
190 |
+-#define IRQ_ORION5X_GPIO_24_31 9 |
191 |
+-#define IRQ_ORION5X_PCIE0_ERR 10 |
192 |
+-#define IRQ_ORION5X_PCIE0_INT 11 |
193 |
+-#define IRQ_ORION5X_USB1_CTRL 12 |
194 |
+-#define IRQ_ORION5X_DEV_BUS_ERR 14 |
195 |
+-#define IRQ_ORION5X_PCI_ERR 15 |
196 |
+-#define IRQ_ORION5X_USB_BR_ERR 16 |
197 |
+-#define IRQ_ORION5X_USB0_CTRL 17 |
198 |
+-#define IRQ_ORION5X_ETH_RX 18 |
199 |
+-#define IRQ_ORION5X_ETH_TX 19 |
200 |
+-#define IRQ_ORION5X_ETH_MISC 20 |
201 |
+-#define IRQ_ORION5X_ETH_SUM 21 |
202 |
+-#define IRQ_ORION5X_ETH_ERR 22 |
203 |
+-#define IRQ_ORION5X_IDMA_ERR 23 |
204 |
+-#define IRQ_ORION5X_IDMA_0 24 |
205 |
+-#define IRQ_ORION5X_IDMA_1 25 |
206 |
+-#define IRQ_ORION5X_IDMA_2 26 |
207 |
+-#define IRQ_ORION5X_IDMA_3 27 |
208 |
+-#define IRQ_ORION5X_CESA 28 |
209 |
+-#define IRQ_ORION5X_SATA 29 |
210 |
+-#define IRQ_ORION5X_XOR0 30 |
211 |
+-#define IRQ_ORION5X_XOR1 31 |
212 |
++#define IRQ_ORION5X_BRIDGE (1 + 0) |
213 |
++#define IRQ_ORION5X_DOORBELL_H2C (1 + 1) |
214 |
++#define IRQ_ORION5X_DOORBELL_C2H (1 + 2) |
215 |
++#define IRQ_ORION5X_UART0 (1 + 3) |
216 |
++#define IRQ_ORION5X_UART1 (1 + 4) |
217 |
++#define IRQ_ORION5X_I2C (1 + 5) |
218 |
++#define IRQ_ORION5X_GPIO_0_7 (1 + 6) |
219 |
++#define IRQ_ORION5X_GPIO_8_15 (1 + 7) |
220 |
++#define IRQ_ORION5X_GPIO_16_23 (1 + 8) |
221 |
++#define IRQ_ORION5X_GPIO_24_31 (1 + 9) |
222 |
++#define IRQ_ORION5X_PCIE0_ERR (1 + 10) |
223 |
++#define IRQ_ORION5X_PCIE0_INT (1 + 11) |
224 |
++#define IRQ_ORION5X_USB1_CTRL (1 + 12) |
225 |
++#define IRQ_ORION5X_DEV_BUS_ERR (1 + 14) |
226 |
++#define IRQ_ORION5X_PCI_ERR (1 + 15) |
227 |
++#define IRQ_ORION5X_USB_BR_ERR (1 + 16) |
228 |
++#define IRQ_ORION5X_USB0_CTRL (1 + 17) |
229 |
++#define IRQ_ORION5X_ETH_RX (1 + 18) |
230 |
++#define IRQ_ORION5X_ETH_TX (1 + 19) |
231 |
++#define IRQ_ORION5X_ETH_MISC (1 + 20) |
232 |
++#define IRQ_ORION5X_ETH_SUM (1 + 21) |
233 |
++#define IRQ_ORION5X_ETH_ERR (1 + 22) |
234 |
++#define IRQ_ORION5X_IDMA_ERR (1 + 23) |
235 |
++#define IRQ_ORION5X_IDMA_0 (1 + 24) |
236 |
++#define IRQ_ORION5X_IDMA_1 (1 + 25) |
237 |
++#define IRQ_ORION5X_IDMA_2 (1 + 26) |
238 |
++#define IRQ_ORION5X_IDMA_3 (1 + 27) |
239 |
++#define IRQ_ORION5X_CESA (1 + 28) |
240 |
++#define IRQ_ORION5X_SATA (1 + 29) |
241 |
++#define IRQ_ORION5X_XOR0 (1 + 30) |
242 |
++#define IRQ_ORION5X_XOR1 (1 + 31) |
243 |
+ |
244 |
+ /* |
245 |
+ * Orion General Purpose Pins |
246 |
+ */ |
247 |
+-#define IRQ_ORION5X_GPIO_START 32 |
248 |
++#define IRQ_ORION5X_GPIO_START 33 |
249 |
+ #define NR_GPIO_IRQS 32 |
250 |
+ |
251 |
+ #define NR_IRQS (IRQ_ORION5X_GPIO_START + NR_GPIO_IRQS) |
252 |
+diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c |
253 |
+index cd4bac4d7e43..086ecb87d885 100644 |
254 |
+--- a/arch/arm/mach-orion5x/irq.c |
255 |
++++ b/arch/arm/mach-orion5x/irq.c |
256 |
+@@ -42,7 +42,7 @@ __exception_irq_entry orion5x_legacy_handle_irq(struct pt_regs *regs) |
257 |
+ stat = readl_relaxed(MAIN_IRQ_CAUSE); |
258 |
+ stat &= readl_relaxed(MAIN_IRQ_MASK); |
259 |
+ if (stat) { |
260 |
+- unsigned int hwirq = __fls(stat); |
261 |
++ unsigned int hwirq = 1 + __fls(stat); |
262 |
+ handle_IRQ(hwirq, regs); |
263 |
+ return; |
264 |
+ } |
265 |
+@@ -51,7 +51,7 @@ __exception_irq_entry orion5x_legacy_handle_irq(struct pt_regs *regs) |
266 |
+ |
267 |
+ void __init orion5x_init_irq(void) |
268 |
+ { |
269 |
+- orion_irq_init(0, MAIN_IRQ_MASK); |
270 |
++ orion_irq_init(1, MAIN_IRQ_MASK); |
271 |
+ |
272 |
+ #ifdef CONFIG_MULTI_IRQ_HANDLER |
273 |
+ set_handle_irq(orion5x_legacy_handle_irq); |
274 |
+diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c |
275 |
+index 8fcec1cc101e..01b3e3683ede 100644 |
276 |
+--- a/arch/arm/mach-rockchip/platsmp.c |
277 |
++++ b/arch/arm/mach-rockchip/platsmp.c |
278 |
+@@ -72,29 +72,22 @@ static struct reset_control *rockchip_get_core_reset(int cpu) |
279 |
+ static int pmu_set_power_domain(int pd, bool on) |
280 |
+ { |
281 |
+ u32 val = (on) ? 0 : BIT(pd); |
282 |
++ struct reset_control *rstc = rockchip_get_core_reset(pd); |
283 |
+ int ret; |
284 |
+ |
285 |
++ if (IS_ERR(rstc) && read_cpuid_part() != ARM_CPU_PART_CORTEX_A9) { |
286 |
++ pr_err("%s: could not get reset control for core %d\n", |
287 |
++ __func__, pd); |
288 |
++ return PTR_ERR(rstc); |
289 |
++ } |
290 |
++ |
291 |
+ /* |
292 |
+ * We need to soft reset the cpu when we turn off the cpu power domain, |
293 |
+ * or else the active processors might be stalled when the individual |
294 |
+ * processor is powered down. |
295 |
+ */ |
296 |
+- if (read_cpuid_part() != ARM_CPU_PART_CORTEX_A9) { |
297 |
+- struct reset_control *rstc = rockchip_get_core_reset(pd); |
298 |
+- |
299 |
+- if (IS_ERR(rstc)) { |
300 |
+- pr_err("%s: could not get reset control for core %d\n", |
301 |
+- __func__, pd); |
302 |
+- return PTR_ERR(rstc); |
303 |
+- } |
304 |
+- |
305 |
+- if (on) |
306 |
+- reset_control_deassert(rstc); |
307 |
+- else |
308 |
+- reset_control_assert(rstc); |
309 |
+- |
310 |
+- reset_control_put(rstc); |
311 |
+- } |
312 |
++ if (!IS_ERR(rstc) && !on) |
313 |
++ reset_control_assert(rstc); |
314 |
+ |
315 |
+ ret = regmap_update_bits(pmu, PMU_PWRDN_CON, BIT(pd), val); |
316 |
+ if (ret < 0) { |
317 |
+@@ -112,6 +105,12 @@ static int pmu_set_power_domain(int pd, bool on) |
318 |
+ } |
319 |
+ } |
320 |
+ |
321 |
++ if (!IS_ERR(rstc)) { |
322 |
++ if (on) |
323 |
++ reset_control_deassert(rstc); |
324 |
++ reset_control_put(rstc); |
325 |
++ } |
326 |
++ |
327 |
+ return 0; |
328 |
+ } |
329 |
+ |
330 |
+@@ -146,8 +145,12 @@ static int rockchip_boot_secondary(unsigned int cpu, struct task_struct *idle) |
331 |
+ * the mailbox: |
332 |
+ * sram_base_addr + 4: 0xdeadbeaf |
333 |
+ * sram_base_addr + 8: start address for pc |
334 |
++ * The cpu0 need to wait the other cpus other than cpu0 entering |
335 |
++ * the wfe state.The wait time is affected by many aspects. |
336 |
++ * (e.g: cpu frequency, bootrom frequency, sram frequency, ...) |
337 |
+ * */ |
338 |
+- udelay(10); |
339 |
++ mdelay(1); /* ensure the cpus other than cpu0 to startup */ |
340 |
++ |
341 |
+ writel(virt_to_phys(secondary_startup), sram_base_addr + 8); |
342 |
+ writel(0xDEADBEAF, sram_base_addr + 4); |
343 |
+ dsb_sev(); |
344 |
+diff --git a/arch/powerpc/kvm/book3s_hv_rm_mmu.c b/arch/powerpc/kvm/book3s_hv_rm_mmu.c |
345 |
+index b027a89737b6..c6d601cc9764 100644 |
346 |
+--- a/arch/powerpc/kvm/book3s_hv_rm_mmu.c |
347 |
++++ b/arch/powerpc/kvm/book3s_hv_rm_mmu.c |
348 |
+@@ -421,14 +421,20 @@ long kvmppc_do_h_remove(struct kvm *kvm, unsigned long flags, |
349 |
+ rev = real_vmalloc_addr(&kvm->arch.revmap[pte_index]); |
350 |
+ v = pte & ~HPTE_V_HVLOCK; |
351 |
+ if (v & HPTE_V_VALID) { |
352 |
+- u64 pte1; |
353 |
+- |
354 |
+- pte1 = be64_to_cpu(hpte[1]); |
355 |
+ hpte[0] &= ~cpu_to_be64(HPTE_V_VALID); |
356 |
+- rb = compute_tlbie_rb(v, pte1, pte_index); |
357 |
++ rb = compute_tlbie_rb(v, be64_to_cpu(hpte[1]), pte_index); |
358 |
+ do_tlbies(kvm, &rb, 1, global_invalidates(kvm, flags), true); |
359 |
+- /* Read PTE low word after tlbie to get final R/C values */ |
360 |
+- remove_revmap_chain(kvm, pte_index, rev, v, pte1); |
361 |
++ /* |
362 |
++ * The reference (R) and change (C) bits in a HPT |
363 |
++ * entry can be set by hardware at any time up until |
364 |
++ * the HPTE is invalidated and the TLB invalidation |
365 |
++ * sequence has completed. This means that when |
366 |
++ * removing a HPTE, we need to re-read the HPTE after |
367 |
++ * the invalidation sequence has completed in order to |
368 |
++ * obtain reliable values of R and C. |
369 |
++ */ |
370 |
++ remove_revmap_chain(kvm, pte_index, rev, v, |
371 |
++ be64_to_cpu(hpte[1])); |
372 |
+ } |
373 |
+ r = rev->guest_rpte & ~HPTE_GR_RESERVED; |
374 |
+ note_hpte_modification(kvm, rev); |
375 |
+diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S |
376 |
+index faa86e9c0551..76408cf0ad04 100644 |
377 |
+--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S |
378 |
++++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S |
379 |
+@@ -1127,6 +1127,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR) |
380 |
+ cmpwi r12, BOOK3S_INTERRUPT_H_DOORBELL |
381 |
+ bne 3f |
382 |
+ lbz r0, HSTATE_HOST_IPI(r13) |
383 |
++ cmpwi r0, 0 |
384 |
+ beq 4f |
385 |
+ b guest_exit_cont |
386 |
+ 3: |
387 |
+diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c |
388 |
+index ca070d260af2..b80512b9ef59 100644 |
389 |
+--- a/arch/s390/kernel/setup.c |
390 |
++++ b/arch/s390/kernel/setup.c |
391 |
+@@ -688,7 +688,7 @@ static void __init setup_memory(void) |
392 |
+ /* |
393 |
+ * Setup hardware capabilities. |
394 |
+ */ |
395 |
+-static void __init setup_hwcaps(void) |
396 |
++static int __init setup_hwcaps(void) |
397 |
+ { |
398 |
+ static const int stfl_bits[6] = { 0, 2, 7, 17, 19, 21 }; |
399 |
+ struct cpuid cpu_id; |
400 |
+@@ -754,9 +754,11 @@ static void __init setup_hwcaps(void) |
401 |
+ elf_hwcap |= HWCAP_S390_TE; |
402 |
+ |
403 |
+ /* |
404 |
+- * Vector extension HWCAP_S390_VXRS is bit 11. |
405 |
++ * Vector extension HWCAP_S390_VXRS is bit 11. The Vector extension |
406 |
++ * can be disabled with the "novx" parameter. Use MACHINE_HAS_VX |
407 |
++ * instead of facility bit 129. |
408 |
+ */ |
409 |
+- if (test_facility(129)) |
410 |
++ if (MACHINE_HAS_VX) |
411 |
+ elf_hwcap |= HWCAP_S390_VXRS; |
412 |
+ get_cpu_id(&cpu_id); |
413 |
+ add_device_randomness(&cpu_id, sizeof(cpu_id)); |
414 |
+@@ -793,7 +795,9 @@ static void __init setup_hwcaps(void) |
415 |
+ strcpy(elf_platform, "z13"); |
416 |
+ break; |
417 |
+ } |
418 |
++ return 0; |
419 |
+ } |
420 |
++arch_initcall(setup_hwcaps); |
421 |
+ |
422 |
+ /* |
423 |
+ * Add system information as device randomness |
424 |
+@@ -881,11 +885,6 @@ void __init setup_arch(char **cmdline_p) |
425 |
+ cpu_init(); |
426 |
+ |
427 |
+ /* |
428 |
+- * Setup capabilities (ELF_HWCAP & ELF_PLATFORM). |
429 |
+- */ |
430 |
+- setup_hwcaps(); |
431 |
+- |
432 |
+- /* |
433 |
+ * Create kernel page tables and switch to virtual addressing. |
434 |
+ */ |
435 |
+ paging_init(); |
436 |
+diff --git a/arch/x86/crypto/ghash-clmulni-intel_glue.c b/arch/x86/crypto/ghash-clmulni-intel_glue.c |
437 |
+index 64d7cf1b50e1..440df0c7a2ee 100644 |
438 |
+--- a/arch/x86/crypto/ghash-clmulni-intel_glue.c |
439 |
++++ b/arch/x86/crypto/ghash-clmulni-intel_glue.c |
440 |
+@@ -294,6 +294,7 @@ static struct ahash_alg ghash_async_alg = { |
441 |
+ .cra_name = "ghash", |
442 |
+ .cra_driver_name = "ghash-clmulni", |
443 |
+ .cra_priority = 400, |
444 |
++ .cra_ctxsize = sizeof(struct ghash_async_ctx), |
445 |
+ .cra_flags = CRYPTO_ALG_TYPE_AHASH | CRYPTO_ALG_ASYNC, |
446 |
+ .cra_blocksize = GHASH_BLOCK_SIZE, |
447 |
+ .cra_type = &crypto_ahash_type, |
448 |
+diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c |
449 |
+index e49ee24da85e..9393896717d0 100644 |
450 |
+--- a/arch/x86/kernel/acpi/boot.c |
451 |
++++ b/arch/x86/kernel/acpi/boot.c |
452 |
+@@ -445,6 +445,7 @@ static void __init acpi_sci_ioapic_setup(u8 bus_irq, u16 polarity, u16 trigger, |
453 |
+ polarity = acpi_sci_flags & ACPI_MADT_POLARITY_MASK; |
454 |
+ |
455 |
+ mp_override_legacy_irq(bus_irq, polarity, trigger, gsi); |
456 |
++ acpi_penalize_sci_irq(bus_irq, trigger, polarity); |
457 |
+ |
458 |
+ /* |
459 |
+ * stash over-ride to indicate we've been here |
460 |
+diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel.c b/arch/x86/kernel/cpu/mcheck/mce_intel.c |
461 |
+index 844f56c5616d..c93c27df9919 100644 |
462 |
+--- a/arch/x86/kernel/cpu/mcheck/mce_intel.c |
463 |
++++ b/arch/x86/kernel/cpu/mcheck/mce_intel.c |
464 |
+@@ -146,6 +146,27 @@ void mce_intel_hcpu_update(unsigned long cpu) |
465 |
+ per_cpu(cmci_storm_state, cpu) = CMCI_STORM_NONE; |
466 |
+ } |
467 |
+ |
468 |
++static void cmci_toggle_interrupt_mode(bool on) |
469 |
++{ |
470 |
++ unsigned long flags, *owned; |
471 |
++ int bank; |
472 |
++ u64 val; |
473 |
++ |
474 |
++ raw_spin_lock_irqsave(&cmci_discover_lock, flags); |
475 |
++ owned = this_cpu_ptr(mce_banks_owned); |
476 |
++ for_each_set_bit(bank, owned, MAX_NR_BANKS) { |
477 |
++ rdmsrl(MSR_IA32_MCx_CTL2(bank), val); |
478 |
++ |
479 |
++ if (on) |
480 |
++ val |= MCI_CTL2_CMCI_EN; |
481 |
++ else |
482 |
++ val &= ~MCI_CTL2_CMCI_EN; |
483 |
++ |
484 |
++ wrmsrl(MSR_IA32_MCx_CTL2(bank), val); |
485 |
++ } |
486 |
++ raw_spin_unlock_irqrestore(&cmci_discover_lock, flags); |
487 |
++} |
488 |
++ |
489 |
+ unsigned long cmci_intel_adjust_timer(unsigned long interval) |
490 |
+ { |
491 |
+ if ((this_cpu_read(cmci_backoff_cnt) > 0) && |
492 |
+@@ -175,7 +196,7 @@ unsigned long cmci_intel_adjust_timer(unsigned long interval) |
493 |
+ */ |
494 |
+ if (!atomic_read(&cmci_storm_on_cpus)) { |
495 |
+ __this_cpu_write(cmci_storm_state, CMCI_STORM_NONE); |
496 |
+- cmci_reenable(); |
497 |
++ cmci_toggle_interrupt_mode(true); |
498 |
+ cmci_recheck(); |
499 |
+ } |
500 |
+ return CMCI_POLL_INTERVAL; |
501 |
+@@ -186,22 +207,6 @@ unsigned long cmci_intel_adjust_timer(unsigned long interval) |
502 |
+ } |
503 |
+ } |
504 |
+ |
505 |
+-static void cmci_storm_disable_banks(void) |
506 |
+-{ |
507 |
+- unsigned long flags, *owned; |
508 |
+- int bank; |
509 |
+- u64 val; |
510 |
+- |
511 |
+- raw_spin_lock_irqsave(&cmci_discover_lock, flags); |
512 |
+- owned = this_cpu_ptr(mce_banks_owned); |
513 |
+- for_each_set_bit(bank, owned, MAX_NR_BANKS) { |
514 |
+- rdmsrl(MSR_IA32_MCx_CTL2(bank), val); |
515 |
+- val &= ~MCI_CTL2_CMCI_EN; |
516 |
+- wrmsrl(MSR_IA32_MCx_CTL2(bank), val); |
517 |
+- } |
518 |
+- raw_spin_unlock_irqrestore(&cmci_discover_lock, flags); |
519 |
+-} |
520 |
+- |
521 |
+ static bool cmci_storm_detect(void) |
522 |
+ { |
523 |
+ unsigned int cnt = __this_cpu_read(cmci_storm_cnt); |
524 |
+@@ -223,7 +228,7 @@ static bool cmci_storm_detect(void) |
525 |
+ if (cnt <= CMCI_STORM_THRESHOLD) |
526 |
+ return false; |
527 |
+ |
528 |
+- cmci_storm_disable_banks(); |
529 |
++ cmci_toggle_interrupt_mode(false); |
530 |
+ __this_cpu_write(cmci_storm_state, CMCI_STORM_ACTIVE); |
531 |
+ r = atomic_add_return(1, &cmci_storm_on_cpus); |
532 |
+ mce_timer_kick(CMCI_STORM_INTERVAL); |
533 |
+diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c |
534 |
+index 44171462bd2a..82362ad2f25d 100644 |
535 |
+--- a/arch/x86/kvm/mmu.c |
536 |
++++ b/arch/x86/kvm/mmu.c |
537 |
+@@ -357,12 +357,6 @@ static u64 __get_spte_lockless(u64 *sptep) |
538 |
+ { |
539 |
+ return ACCESS_ONCE(*sptep); |
540 |
+ } |
541 |
+- |
542 |
+-static bool __check_direct_spte_mmio_pf(u64 spte) |
543 |
+-{ |
544 |
+- /* It is valid if the spte is zapped. */ |
545 |
+- return spte == 0ull; |
546 |
+-} |
547 |
+ #else |
548 |
+ union split_spte { |
549 |
+ struct { |
550 |
+@@ -478,23 +472,6 @@ retry: |
551 |
+ |
552 |
+ return spte.spte; |
553 |
+ } |
554 |
+- |
555 |
+-static bool __check_direct_spte_mmio_pf(u64 spte) |
556 |
+-{ |
557 |
+- union split_spte sspte = (union split_spte)spte; |
558 |
+- u32 high_mmio_mask = shadow_mmio_mask >> 32; |
559 |
+- |
560 |
+- /* It is valid if the spte is zapped. */ |
561 |
+- if (spte == 0ull) |
562 |
+- return true; |
563 |
+- |
564 |
+- /* It is valid if the spte is being zapped. */ |
565 |
+- if (sspte.spte_low == 0ull && |
566 |
+- (sspte.spte_high & high_mmio_mask) == high_mmio_mask) |
567 |
+- return true; |
568 |
+- |
569 |
+- return false; |
570 |
+-} |
571 |
+ #endif |
572 |
+ |
573 |
+ static bool spte_is_locklessly_modifiable(u64 spte) |
574 |
+@@ -3299,21 +3276,6 @@ static bool quickly_check_mmio_pf(struct kvm_vcpu *vcpu, u64 addr, bool direct) |
575 |
+ return vcpu_match_mmio_gva(vcpu, addr); |
576 |
+ } |
577 |
+ |
578 |
+- |
579 |
+-/* |
580 |
+- * On direct hosts, the last spte is only allows two states |
581 |
+- * for mmio page fault: |
582 |
+- * - It is the mmio spte |
583 |
+- * - It is zapped or it is being zapped. |
584 |
+- * |
585 |
+- * This function completely checks the spte when the last spte |
586 |
+- * is not the mmio spte. |
587 |
+- */ |
588 |
+-static bool check_direct_spte_mmio_pf(u64 spte) |
589 |
+-{ |
590 |
+- return __check_direct_spte_mmio_pf(spte); |
591 |
+-} |
592 |
+- |
593 |
+ static u64 walk_shadow_page_get_mmio_spte(struct kvm_vcpu *vcpu, u64 addr) |
594 |
+ { |
595 |
+ struct kvm_shadow_walk_iterator iterator; |
596 |
+@@ -3356,13 +3318,6 @@ int handle_mmio_page_fault_common(struct kvm_vcpu *vcpu, u64 addr, bool direct) |
597 |
+ } |
598 |
+ |
599 |
+ /* |
600 |
+- * It's ok if the gva is remapped by other cpus on shadow guest, |
601 |
+- * it's a BUG if the gfn is not a mmio page. |
602 |
+- */ |
603 |
+- if (direct && !check_direct_spte_mmio_pf(spte)) |
604 |
+- return RET_MMIO_PF_BUG; |
605 |
+- |
606 |
+- /* |
607 |
+ * If the page table is zapped by other cpus, let CPU fault again on |
608 |
+ * the address. |
609 |
+ */ |
610 |
+diff --git a/arch/xtensa/include/asm/traps.h b/arch/xtensa/include/asm/traps.h |
611 |
+index 677bfcf4ee5d..28f33a8b7f5f 100644 |
612 |
+--- a/arch/xtensa/include/asm/traps.h |
613 |
++++ b/arch/xtensa/include/asm/traps.h |
614 |
+@@ -25,30 +25,39 @@ static inline void spill_registers(void) |
615 |
+ { |
616 |
+ #if XCHAL_NUM_AREGS > 16 |
617 |
+ __asm__ __volatile__ ( |
618 |
+- " call12 1f\n" |
619 |
++ " call8 1f\n" |
620 |
+ " _j 2f\n" |
621 |
+ " retw\n" |
622 |
+ " .align 4\n" |
623 |
+ "1:\n" |
624 |
++#if XCHAL_NUM_AREGS == 32 |
625 |
++ " _entry a1, 32\n" |
626 |
++ " addi a8, a0, 3\n" |
627 |
++ " _entry a1, 16\n" |
628 |
++ " mov a12, a12\n" |
629 |
++ " retw\n" |
630 |
++#else |
631 |
+ " _entry a1, 48\n" |
632 |
+- " addi a12, a0, 3\n" |
633 |
+-#if XCHAL_NUM_AREGS > 32 |
634 |
+- " .rept (" __stringify(XCHAL_NUM_AREGS) " - 32) / 12\n" |
635 |
++ " call12 1f\n" |
636 |
++ " retw\n" |
637 |
++ " .align 4\n" |
638 |
++ "1:\n" |
639 |
++ " .rept (" __stringify(XCHAL_NUM_AREGS) " - 16) / 12\n" |
640 |
+ " _entry a1, 48\n" |
641 |
+ " mov a12, a0\n" |
642 |
+ " .endr\n" |
643 |
+-#endif |
644 |
+- " _entry a1, 48\n" |
645 |
++ " _entry a1, 16\n" |
646 |
+ #if XCHAL_NUM_AREGS % 12 == 0 |
647 |
+- " mov a8, a8\n" |
648 |
+-#elif XCHAL_NUM_AREGS % 12 == 4 |
649 |
+ " mov a12, a12\n" |
650 |
+-#elif XCHAL_NUM_AREGS % 12 == 8 |
651 |
++#elif XCHAL_NUM_AREGS % 12 == 4 |
652 |
+ " mov a4, a4\n" |
653 |
++#elif XCHAL_NUM_AREGS % 12 == 8 |
654 |
++ " mov a8, a8\n" |
655 |
+ #endif |
656 |
+ " retw\n" |
657 |
++#endif |
658 |
+ "2:\n" |
659 |
+- : : : "a12", "a13", "memory"); |
660 |
++ : : : "a8", "a9", "memory"); |
661 |
+ #else |
662 |
+ __asm__ __volatile__ ( |
663 |
+ " mov a12, a12\n" |
664 |
+diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S |
665 |
+index 82bbfa5a05b3..a2a902140c4e 100644 |
666 |
+--- a/arch/xtensa/kernel/entry.S |
667 |
++++ b/arch/xtensa/kernel/entry.S |
668 |
+@@ -568,12 +568,13 @@ user_exception_exit: |
669 |
+ * (if we have restored WSBITS-1 frames). |
670 |
+ */ |
671 |
+ |
672 |
++2: |
673 |
+ #if XCHAL_HAVE_THREADPTR |
674 |
+ l32i a3, a1, PT_THREADPTR |
675 |
+ wur a3, threadptr |
676 |
+ #endif |
677 |
+ |
678 |
+-2: j common_exception_exit |
679 |
++ j common_exception_exit |
680 |
+ |
681 |
+ /* This is the kernel exception exit. |
682 |
+ * We avoided to do a MOVSP when we entered the exception, but we |
683 |
+@@ -1820,7 +1821,7 @@ ENDPROC(system_call) |
684 |
+ mov a12, a0 |
685 |
+ .endr |
686 |
+ #endif |
687 |
+- _entry a1, 48 |
688 |
++ _entry a1, 16 |
689 |
+ #if XCHAL_NUM_AREGS % 12 == 0 |
690 |
+ mov a8, a8 |
691 |
+ #elif XCHAL_NUM_AREGS % 12 == 4 |
692 |
+@@ -1844,7 +1845,7 @@ ENDPROC(system_call) |
693 |
+ |
694 |
+ ENTRY(_switch_to) |
695 |
+ |
696 |
+- entry a1, 16 |
697 |
++ entry a1, 48 |
698 |
+ |
699 |
+ mov a11, a3 # and 'next' (a3) |
700 |
+ |
701 |
+diff --git a/drivers/acpi/acpi_pnp.c b/drivers/acpi/acpi_pnp.c |
702 |
+index ff6d8adc9cda..fb765524cc3d 100644 |
703 |
+--- a/drivers/acpi/acpi_pnp.c |
704 |
++++ b/drivers/acpi/acpi_pnp.c |
705 |
+@@ -153,6 +153,7 @@ static const struct acpi_device_id acpi_pnp_device_ids[] = { |
706 |
+ {"AEI0250"}, /* PROLiNK 1456VH ISA PnP K56flex Fax Modem */ |
707 |
+ {"AEI1240"}, /* Actiontec ISA PNP 56K X2 Fax Modem */ |
708 |
+ {"AKY1021"}, /* Rockwell 56K ACF II Fax+Data+Voice Modem */ |
709 |
++ {"ALI5123"}, /* ALi Fast Infrared Controller */ |
710 |
+ {"AZT4001"}, /* AZT3005 PnP SOUND DEVICE */ |
711 |
+ {"BDP3336"}, /* Best Data Products Inc. Smart One 336F PnP Modem */ |
712 |
+ {"BRI0A49"}, /* Boca Complete Ofc Communicator 14.4 Data-FAX */ |
713 |
+diff --git a/drivers/acpi/pci_link.c b/drivers/acpi/pci_link.c |
714 |
+index cfd7581cc19f..b09ad554430a 100644 |
715 |
+--- a/drivers/acpi/pci_link.c |
716 |
++++ b/drivers/acpi/pci_link.c |
717 |
+@@ -826,6 +826,22 @@ void acpi_penalize_isa_irq(int irq, int active) |
718 |
+ } |
719 |
+ |
720 |
+ /* |
721 |
++ * Penalize IRQ used by ACPI SCI. If ACPI SCI pin attributes conflict with |
722 |
++ * PCI IRQ attributes, mark ACPI SCI as ISA_ALWAYS so it won't be use for |
723 |
++ * PCI IRQs. |
724 |
++ */ |
725 |
++void acpi_penalize_sci_irq(int irq, int trigger, int polarity) |
726 |
++{ |
727 |
++ if (irq >= 0 && irq < ARRAY_SIZE(acpi_irq_penalty)) { |
728 |
++ if (trigger != ACPI_MADT_TRIGGER_LEVEL || |
729 |
++ polarity != ACPI_MADT_POLARITY_ACTIVE_LOW) |
730 |
++ acpi_irq_penalty[irq] += PIRQ_PENALTY_ISA_ALWAYS; |
731 |
++ else |
732 |
++ acpi_irq_penalty[irq] += PIRQ_PENALTY_PCI_USING; |
733 |
++ } |
734 |
++} |
735 |
++ |
736 |
++/* |
737 |
+ * Over-ride default table to reserve additional IRQs for use by ISA |
738 |
+ * e.g. acpi_irq_isa=5 |
739 |
+ * Useful for telling ACPI how not to interfere with your ISA sound card. |
740 |
+diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c |
741 |
+index 7e62751abfac..a46660204e3a 100644 |
742 |
+--- a/drivers/ata/ahci.c |
743 |
++++ b/drivers/ata/ahci.c |
744 |
+@@ -351,6 +351,7 @@ static const struct pci_device_id ahci_pci_tbl[] = { |
745 |
+ /* JMicron 362B and 362C have an AHCI function with IDE class code */ |
746 |
+ { PCI_VDEVICE(JMICRON, 0x2362), board_ahci_ign_iferr }, |
747 |
+ { PCI_VDEVICE(JMICRON, 0x236f), board_ahci_ign_iferr }, |
748 |
++ /* May need to update quirk_jmicron_async_suspend() for additions */ |
749 |
+ |
750 |
+ /* ATI */ |
751 |
+ { PCI_VDEVICE(ATI, 0x4380), board_ahci_sb600 }, /* ATI SB600 */ |
752 |
+@@ -1451,18 +1452,6 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) |
753 |
+ else if (pdev->vendor == 0x177d && pdev->device == 0xa01c) |
754 |
+ ahci_pci_bar = AHCI_PCI_BAR_CAVIUM; |
755 |
+ |
756 |
+- /* |
757 |
+- * The JMicron chip 361/363 contains one SATA controller and one |
758 |
+- * PATA controller,for powering on these both controllers, we must |
759 |
+- * follow the sequence one by one, otherwise one of them can not be |
760 |
+- * powered on successfully, so here we disable the async suspend |
761 |
+- * method for these chips. |
762 |
+- */ |
763 |
+- if (pdev->vendor == PCI_VENDOR_ID_JMICRON && |
764 |
+- (pdev->device == PCI_DEVICE_ID_JMICRON_JMB363 || |
765 |
+- pdev->device == PCI_DEVICE_ID_JMICRON_JMB361)) |
766 |
+- device_disable_async_suspend(&pdev->dev); |
767 |
+- |
768 |
+ /* acquire resources */ |
769 |
+ rc = pcim_enable_device(pdev); |
770 |
+ if (rc) |
771 |
+diff --git a/drivers/ata/pata_jmicron.c b/drivers/ata/pata_jmicron.c |
772 |
+index 47e418b8c8ba..4d1a5d2c4287 100644 |
773 |
+--- a/drivers/ata/pata_jmicron.c |
774 |
++++ b/drivers/ata/pata_jmicron.c |
775 |
+@@ -143,18 +143,6 @@ static int jmicron_init_one (struct pci_dev *pdev, const struct pci_device_id *i |
776 |
+ }; |
777 |
+ const struct ata_port_info *ppi[] = { &info, NULL }; |
778 |
+ |
779 |
+- /* |
780 |
+- * The JMicron chip 361/363 contains one SATA controller and one |
781 |
+- * PATA controller,for powering on these both controllers, we must |
782 |
+- * follow the sequence one by one, otherwise one of them can not be |
783 |
+- * powered on successfully, so here we disable the async suspend |
784 |
+- * method for these chips. |
785 |
+- */ |
786 |
+- if (pdev->vendor == PCI_VENDOR_ID_JMICRON && |
787 |
+- (pdev->device == PCI_DEVICE_ID_JMICRON_JMB363 || |
788 |
+- pdev->device == PCI_DEVICE_ID_JMICRON_JMB361)) |
789 |
+- device_disable_async_suspend(&pdev->dev); |
790 |
+- |
791 |
+ return ata_pci_bmdma_init_one(pdev, ppi, &jmicron_sht, NULL, 0); |
792 |
+ } |
793 |
+ |
794 |
+diff --git a/drivers/auxdisplay/ks0108.c b/drivers/auxdisplay/ks0108.c |
795 |
+index 5b93852392b8..0d752851a1ee 100644 |
796 |
+--- a/drivers/auxdisplay/ks0108.c |
797 |
++++ b/drivers/auxdisplay/ks0108.c |
798 |
+@@ -139,6 +139,7 @@ static int __init ks0108_init(void) |
799 |
+ |
800 |
+ ks0108_pardevice = parport_register_device(ks0108_parport, KS0108_NAME, |
801 |
+ NULL, NULL, NULL, PARPORT_DEV_EXCL, NULL); |
802 |
++ parport_put_port(ks0108_parport); |
803 |
+ if (ks0108_pardevice == NULL) { |
804 |
+ printk(KERN_ERR KS0108_NAME ": ERROR: " |
805 |
+ "parport didn't register new device\n"); |
806 |
+diff --git a/drivers/base/devres.c b/drivers/base/devres.c |
807 |
+index c8a53d1e019f..875464690117 100644 |
808 |
+--- a/drivers/base/devres.c |
809 |
++++ b/drivers/base/devres.c |
810 |
+@@ -297,10 +297,10 @@ void * devres_get(struct device *dev, void *new_res, |
811 |
+ if (!dr) { |
812 |
+ add_dr(dev, &new_dr->node); |
813 |
+ dr = new_dr; |
814 |
+- new_dr = NULL; |
815 |
++ new_res = NULL; |
816 |
+ } |
817 |
+ spin_unlock_irqrestore(&dev->devres_lock, flags); |
818 |
+- devres_free(new_dr); |
819 |
++ devres_free(new_res); |
820 |
+ |
821 |
+ return dr->data; |
822 |
+ } |
823 |
+diff --git a/drivers/base/platform.c b/drivers/base/platform.c |
824 |
+index 063f0ab15259..f80aaaf9f610 100644 |
825 |
+--- a/drivers/base/platform.c |
826 |
++++ b/drivers/base/platform.c |
827 |
+@@ -375,9 +375,7 @@ int platform_device_add(struct platform_device *pdev) |
828 |
+ |
829 |
+ while (--i >= 0) { |
830 |
+ struct resource *r = &pdev->resource[i]; |
831 |
+- unsigned long type = resource_type(r); |
832 |
+- |
833 |
+- if (type == IORESOURCE_MEM || type == IORESOURCE_IO) |
834 |
++ if (r->parent) |
835 |
+ release_resource(r); |
836 |
+ } |
837 |
+ |
838 |
+@@ -408,9 +406,7 @@ void platform_device_del(struct platform_device *pdev) |
839 |
+ |
840 |
+ for (i = 0; i < pdev->num_resources; i++) { |
841 |
+ struct resource *r = &pdev->resource[i]; |
842 |
+- unsigned long type = resource_type(r); |
843 |
+- |
844 |
+- if (type == IORESOURCE_MEM || type == IORESOURCE_IO) |
845 |
++ if (r->parent) |
846 |
+ release_resource(r); |
847 |
+ } |
848 |
+ } |
849 |
+diff --git a/drivers/base/power/clock_ops.c b/drivers/base/power/clock_ops.c |
850 |
+index acef9f9f759a..652b5a367c1f 100644 |
851 |
+--- a/drivers/base/power/clock_ops.c |
852 |
++++ b/drivers/base/power/clock_ops.c |
853 |
+@@ -38,7 +38,7 @@ struct pm_clock_entry { |
854 |
+ * @dev: The device for the given clock |
855 |
+ * @ce: PM clock entry corresponding to the clock. |
856 |
+ */ |
857 |
+-static inline int __pm_clk_enable(struct device *dev, struct pm_clock_entry *ce) |
858 |
++static inline void __pm_clk_enable(struct device *dev, struct pm_clock_entry *ce) |
859 |
+ { |
860 |
+ int ret; |
861 |
+ |
862 |
+@@ -50,8 +50,6 @@ static inline int __pm_clk_enable(struct device *dev, struct pm_clock_entry *ce) |
863 |
+ dev_err(dev, "%s: failed to enable clk %p, error %d\n", |
864 |
+ __func__, ce->clk, ret); |
865 |
+ } |
866 |
+- |
867 |
+- return ret; |
868 |
+ } |
869 |
+ |
870 |
+ /** |
871 |
+diff --git a/drivers/clk/pistachio/clk-pistachio.c b/drivers/clk/pistachio/clk-pistachio.c |
872 |
+index 8c0fe8828f99..c4ceb5eaf46c 100644 |
873 |
+--- a/drivers/clk/pistachio/clk-pistachio.c |
874 |
++++ b/drivers/clk/pistachio/clk-pistachio.c |
875 |
+@@ -159,9 +159,15 @@ PNAME(mux_debug) = { "mips_pll_mux", "rpu_v_pll_mux", |
876 |
+ "wifi_pll_mux", "bt_pll_mux" }; |
877 |
+ static u32 mux_debug_idx[] = { 0x0, 0x1, 0x2, 0x4, 0x8, 0x10 }; |
878 |
+ |
879 |
+-static unsigned int pistachio_critical_clks[] __initdata = { |
880 |
+- CLK_MIPS, |
881 |
+- CLK_PERIPH_SYS, |
882 |
++static unsigned int pistachio_critical_clks_core[] __initdata = { |
883 |
++ CLK_MIPS |
884 |
++}; |
885 |
++ |
886 |
++static unsigned int pistachio_critical_clks_sys[] __initdata = { |
887 |
++ PERIPH_CLK_SYS, |
888 |
++ PERIPH_CLK_SYS_BUS, |
889 |
++ PERIPH_CLK_DDR, |
890 |
++ PERIPH_CLK_ROM, |
891 |
+ }; |
892 |
+ |
893 |
+ static void __init pistachio_clk_init(struct device_node *np) |
894 |
+@@ -193,8 +199,8 @@ static void __init pistachio_clk_init(struct device_node *np) |
895 |
+ |
896 |
+ pistachio_clk_register_provider(p); |
897 |
+ |
898 |
+- pistachio_clk_force_enable(p, pistachio_critical_clks, |
899 |
+- ARRAY_SIZE(pistachio_critical_clks)); |
900 |
++ pistachio_clk_force_enable(p, pistachio_critical_clks_core, |
901 |
++ ARRAY_SIZE(pistachio_critical_clks_core)); |
902 |
+ } |
903 |
+ CLK_OF_DECLARE(pistachio_clk, "img,pistachio-clk", pistachio_clk_init); |
904 |
+ |
905 |
+@@ -261,6 +267,9 @@ static void __init pistachio_clk_periph_init(struct device_node *np) |
906 |
+ ARRAY_SIZE(pistachio_periph_gates)); |
907 |
+ |
908 |
+ pistachio_clk_register_provider(p); |
909 |
++ |
910 |
++ pistachio_clk_force_enable(p, pistachio_critical_clks_sys, |
911 |
++ ARRAY_SIZE(pistachio_critical_clks_sys)); |
912 |
+ } |
913 |
+ CLK_OF_DECLARE(pistachio_clk_periph, "img,pistachio-clk-periph", |
914 |
+ pistachio_clk_periph_init); |
915 |
+diff --git a/drivers/clk/pistachio/clk-pll.c b/drivers/clk/pistachio/clk-pll.c |
916 |
+index e17dada0dd21..c9b459821084 100644 |
917 |
+--- a/drivers/clk/pistachio/clk-pll.c |
918 |
++++ b/drivers/clk/pistachio/clk-pll.c |
919 |
+@@ -65,6 +65,12 @@ |
920 |
+ #define MIN_OUTPUT_FRAC 12000000UL |
921 |
+ #define MAX_OUTPUT_FRAC 1600000000UL |
922 |
+ |
923 |
++/* Fractional PLL operating modes */ |
924 |
++enum pll_mode { |
925 |
++ PLL_MODE_FRAC, |
926 |
++ PLL_MODE_INT, |
927 |
++}; |
928 |
++ |
929 |
+ struct pistachio_clk_pll { |
930 |
+ struct clk_hw hw; |
931 |
+ void __iomem *base; |
932 |
+@@ -88,12 +94,10 @@ static inline void pll_lock(struct pistachio_clk_pll *pll) |
933 |
+ cpu_relax(); |
934 |
+ } |
935 |
+ |
936 |
+-static inline u32 do_div_round_closest(u64 dividend, u32 divisor) |
937 |
++static inline u64 do_div_round_closest(u64 dividend, u64 divisor) |
938 |
+ { |
939 |
+ dividend += divisor / 2; |
940 |
+- do_div(dividend, divisor); |
941 |
+- |
942 |
+- return dividend; |
943 |
++ return div64_u64(dividend, divisor); |
944 |
+ } |
945 |
+ |
946 |
+ static inline struct pistachio_clk_pll *to_pistachio_pll(struct clk_hw *hw) |
947 |
+@@ -101,6 +105,29 @@ static inline struct pistachio_clk_pll *to_pistachio_pll(struct clk_hw *hw) |
948 |
+ return container_of(hw, struct pistachio_clk_pll, hw); |
949 |
+ } |
950 |
+ |
951 |
++static inline enum pll_mode pll_frac_get_mode(struct clk_hw *hw) |
952 |
++{ |
953 |
++ struct pistachio_clk_pll *pll = to_pistachio_pll(hw); |
954 |
++ u32 val; |
955 |
++ |
956 |
++ val = pll_readl(pll, PLL_CTRL3) & PLL_FRAC_CTRL3_DSMPD; |
957 |
++ return val ? PLL_MODE_INT : PLL_MODE_FRAC; |
958 |
++} |
959 |
++ |
960 |
++static inline void pll_frac_set_mode(struct clk_hw *hw, enum pll_mode mode) |
961 |
++{ |
962 |
++ struct pistachio_clk_pll *pll = to_pistachio_pll(hw); |
963 |
++ u32 val; |
964 |
++ |
965 |
++ val = pll_readl(pll, PLL_CTRL3); |
966 |
++ if (mode == PLL_MODE_INT) |
967 |
++ val |= PLL_FRAC_CTRL3_DSMPD | PLL_FRAC_CTRL3_DACPD; |
968 |
++ else |
969 |
++ val &= ~(PLL_FRAC_CTRL3_DSMPD | PLL_FRAC_CTRL3_DACPD); |
970 |
++ |
971 |
++ pll_writel(pll, val, PLL_CTRL3); |
972 |
++} |
973 |
++ |
974 |
+ static struct pistachio_pll_rate_table * |
975 |
+ pll_get_params(struct pistachio_clk_pll *pll, unsigned long fref, |
976 |
+ unsigned long fout) |
977 |
+@@ -136,8 +163,7 @@ static int pll_gf40lp_frac_enable(struct clk_hw *hw) |
978 |
+ u32 val; |
979 |
+ |
980 |
+ val = pll_readl(pll, PLL_CTRL3); |
981 |
+- val &= ~(PLL_FRAC_CTRL3_PD | PLL_FRAC_CTRL3_DACPD | |
982 |
+- PLL_FRAC_CTRL3_DSMPD | PLL_FRAC_CTRL3_FOUTPOSTDIVPD | |
983 |
++ val &= ~(PLL_FRAC_CTRL3_PD | PLL_FRAC_CTRL3_FOUTPOSTDIVPD | |
984 |
+ PLL_FRAC_CTRL3_FOUT4PHASEPD | PLL_FRAC_CTRL3_FOUTVCOPD); |
985 |
+ pll_writel(pll, val, PLL_CTRL3); |
986 |
+ |
987 |
+@@ -173,7 +199,7 @@ static int pll_gf40lp_frac_set_rate(struct clk_hw *hw, unsigned long rate, |
988 |
+ struct pistachio_clk_pll *pll = to_pistachio_pll(hw); |
989 |
+ struct pistachio_pll_rate_table *params; |
990 |
+ int enabled = pll_gf40lp_frac_is_enabled(hw); |
991 |
+- u32 val, vco, old_postdiv1, old_postdiv2; |
992 |
++ u64 val, vco, old_postdiv1, old_postdiv2; |
993 |
+ const char *name = __clk_get_name(hw->clk); |
994 |
+ |
995 |
+ if (rate < MIN_OUTPUT_FRAC || rate > MAX_OUTPUT_FRAC) |
996 |
+@@ -183,17 +209,21 @@ static int pll_gf40lp_frac_set_rate(struct clk_hw *hw, unsigned long rate, |
997 |
+ if (!params || !params->refdiv) |
998 |
+ return -EINVAL; |
999 |
+ |
1000 |
+- vco = params->fref * params->fbdiv / params->refdiv; |
1001 |
++ /* calculate vco */ |
1002 |
++ vco = params->fref; |
1003 |
++ vco *= (params->fbdiv << 24) + params->frac; |
1004 |
++ vco = div64_u64(vco, params->refdiv << 24); |
1005 |
++ |
1006 |
+ if (vco < MIN_VCO_FRAC_FRAC || vco > MAX_VCO_FRAC_FRAC) |
1007 |
+- pr_warn("%s: VCO %u is out of range %lu..%lu\n", name, vco, |
1008 |
++ pr_warn("%s: VCO %llu is out of range %lu..%lu\n", name, vco, |
1009 |
+ MIN_VCO_FRAC_FRAC, MAX_VCO_FRAC_FRAC); |
1010 |
+ |
1011 |
+- val = params->fref / params->refdiv; |
1012 |
++ val = div64_u64(params->fref, params->refdiv); |
1013 |
+ if (val < MIN_PFD) |
1014 |
+- pr_warn("%s: PFD %u is too low (min %lu)\n", |
1015 |
++ pr_warn("%s: PFD %llu is too low (min %lu)\n", |
1016 |
+ name, val, MIN_PFD); |
1017 |
+ if (val > vco / 16) |
1018 |
+- pr_warn("%s: PFD %u is too high (max %u)\n", |
1019 |
++ pr_warn("%s: PFD %llu is too high (max %llu)\n", |
1020 |
+ name, val, vco / 16); |
1021 |
+ |
1022 |
+ val = pll_readl(pll, PLL_CTRL1); |
1023 |
+@@ -227,6 +257,12 @@ static int pll_gf40lp_frac_set_rate(struct clk_hw *hw, unsigned long rate, |
1024 |
+ (params->postdiv2 << PLL_FRAC_CTRL2_POSTDIV2_SHIFT); |
1025 |
+ pll_writel(pll, val, PLL_CTRL2); |
1026 |
+ |
1027 |
++ /* set operating mode */ |
1028 |
++ if (params->frac) |
1029 |
++ pll_frac_set_mode(hw, PLL_MODE_FRAC); |
1030 |
++ else |
1031 |
++ pll_frac_set_mode(hw, PLL_MODE_INT); |
1032 |
++ |
1033 |
+ if (enabled) |
1034 |
+ pll_lock(pll); |
1035 |
+ |
1036 |
+@@ -237,8 +273,7 @@ static unsigned long pll_gf40lp_frac_recalc_rate(struct clk_hw *hw, |
1037 |
+ unsigned long parent_rate) |
1038 |
+ { |
1039 |
+ struct pistachio_clk_pll *pll = to_pistachio_pll(hw); |
1040 |
+- u32 val, prediv, fbdiv, frac, postdiv1, postdiv2; |
1041 |
+- u64 rate = parent_rate; |
1042 |
++ u64 val, prediv, fbdiv, frac, postdiv1, postdiv2, rate; |
1043 |
+ |
1044 |
+ val = pll_readl(pll, PLL_CTRL1); |
1045 |
+ prediv = (val >> PLL_CTRL1_REFDIV_SHIFT) & PLL_CTRL1_REFDIV_MASK; |
1046 |
+@@ -251,7 +286,13 @@ static unsigned long pll_gf40lp_frac_recalc_rate(struct clk_hw *hw, |
1047 |
+ PLL_FRAC_CTRL2_POSTDIV2_MASK; |
1048 |
+ frac = (val >> PLL_FRAC_CTRL2_FRAC_SHIFT) & PLL_FRAC_CTRL2_FRAC_MASK; |
1049 |
+ |
1050 |
+- rate *= (fbdiv << 24) + frac; |
1051 |
++ /* get operating mode (int/frac) and calculate rate accordingly */ |
1052 |
++ rate = parent_rate; |
1053 |
++ if (pll_frac_get_mode(hw) == PLL_MODE_FRAC) |
1054 |
++ rate *= (fbdiv << 24) + frac; |
1055 |
++ else |
1056 |
++ rate *= (fbdiv << 24); |
1057 |
++ |
1058 |
+ rate = do_div_round_closest(rate, (prediv * postdiv1 * postdiv2) << 24); |
1059 |
+ |
1060 |
+ return rate; |
1061 |
+@@ -279,7 +320,7 @@ static int pll_gf40lp_laint_enable(struct clk_hw *hw) |
1062 |
+ u32 val; |
1063 |
+ |
1064 |
+ val = pll_readl(pll, PLL_CTRL1); |
1065 |
+- val &= ~(PLL_INT_CTRL1_PD | PLL_INT_CTRL1_DSMPD | |
1066 |
++ val &= ~(PLL_INT_CTRL1_PD | |
1067 |
+ PLL_INT_CTRL1_FOUTPOSTDIVPD | PLL_INT_CTRL1_FOUTVCOPD); |
1068 |
+ pll_writel(pll, val, PLL_CTRL1); |
1069 |
+ |
1070 |
+@@ -325,12 +366,12 @@ static int pll_gf40lp_laint_set_rate(struct clk_hw *hw, unsigned long rate, |
1071 |
+ if (!params || !params->refdiv) |
1072 |
+ return -EINVAL; |
1073 |
+ |
1074 |
+- vco = params->fref * params->fbdiv / params->refdiv; |
1075 |
++ vco = div_u64(params->fref * params->fbdiv, params->refdiv); |
1076 |
+ if (vco < MIN_VCO_LA || vco > MAX_VCO_LA) |
1077 |
+ pr_warn("%s: VCO %u is out of range %lu..%lu\n", name, vco, |
1078 |
+ MIN_VCO_LA, MAX_VCO_LA); |
1079 |
+ |
1080 |
+- val = params->fref / params->refdiv; |
1081 |
++ val = div_u64(params->fref, params->refdiv); |
1082 |
+ if (val < MIN_PFD) |
1083 |
+ pr_warn("%s: PFD %u is too low (min %lu)\n", |
1084 |
+ name, val, MIN_PFD); |
1085 |
+diff --git a/drivers/clk/pistachio/clk.h b/drivers/clk/pistachio/clk.h |
1086 |
+index 52fabbc24624..8d45178dbde3 100644 |
1087 |
+--- a/drivers/clk/pistachio/clk.h |
1088 |
++++ b/drivers/clk/pistachio/clk.h |
1089 |
+@@ -95,13 +95,13 @@ struct pistachio_fixed_factor { |
1090 |
+ } |
1091 |
+ |
1092 |
+ struct pistachio_pll_rate_table { |
1093 |
+- unsigned long fref; |
1094 |
+- unsigned long fout; |
1095 |
+- unsigned int refdiv; |
1096 |
+- unsigned int fbdiv; |
1097 |
+- unsigned int postdiv1; |
1098 |
+- unsigned int postdiv2; |
1099 |
+- unsigned int frac; |
1100 |
++ unsigned long long fref; |
1101 |
++ unsigned long long fout; |
1102 |
++ unsigned long long refdiv; |
1103 |
++ unsigned long long fbdiv; |
1104 |
++ unsigned long long postdiv1; |
1105 |
++ unsigned long long postdiv2; |
1106 |
++ unsigned long long frac; |
1107 |
+ }; |
1108 |
+ |
1109 |
+ enum pistachio_pll_type { |
1110 |
+diff --git a/drivers/clk/pxa/clk-pxa25x.c b/drivers/clk/pxa/clk-pxa25x.c |
1111 |
+index 6cd88d963a7f..542e45ef5087 100644 |
1112 |
+--- a/drivers/clk/pxa/clk-pxa25x.c |
1113 |
++++ b/drivers/clk/pxa/clk-pxa25x.c |
1114 |
+@@ -79,7 +79,7 @@ unsigned int pxa25x_get_clk_frequency_khz(int info) |
1115 |
+ clks[3] / 1000000, (clks[3] % 1000000) / 10000); |
1116 |
+ } |
1117 |
+ |
1118 |
+- return (unsigned int)clks[0]; |
1119 |
++ return (unsigned int)clks[0] / KHz; |
1120 |
+ } |
1121 |
+ |
1122 |
+ static unsigned long clk_pxa25x_memory_get_rate(struct clk_hw *hw, |
1123 |
+diff --git a/drivers/clk/pxa/clk-pxa27x.c b/drivers/clk/pxa/clk-pxa27x.c |
1124 |
+index 9a31b77eed23..5b82d30baf9f 100644 |
1125 |
+--- a/drivers/clk/pxa/clk-pxa27x.c |
1126 |
++++ b/drivers/clk/pxa/clk-pxa27x.c |
1127 |
+@@ -80,7 +80,7 @@ unsigned int pxa27x_get_clk_frequency_khz(int info) |
1128 |
+ pr_info("System bus clock: %ld.%02ldMHz\n", |
1129 |
+ clks[4] / 1000000, (clks[4] % 1000000) / 10000); |
1130 |
+ } |
1131 |
+- return (unsigned int)clks[0]; |
1132 |
++ return (unsigned int)clks[0] / KHz; |
1133 |
+ } |
1134 |
+ |
1135 |
+ bool pxa27x_is_ppll_disabled(void) |
1136 |
+diff --git a/drivers/clk/pxa/clk-pxa3xx.c b/drivers/clk/pxa/clk-pxa3xx.c |
1137 |
+index ac03ba49e9d1..4af4eed5f89f 100644 |
1138 |
+--- a/drivers/clk/pxa/clk-pxa3xx.c |
1139 |
++++ b/drivers/clk/pxa/clk-pxa3xx.c |
1140 |
+@@ -78,7 +78,7 @@ unsigned int pxa3xx_get_clk_frequency_khz(int info) |
1141 |
+ pr_info("System bus clock: %ld.%02ldMHz\n", |
1142 |
+ clks[4] / 1000000, (clks[4] % 1000000) / 10000); |
1143 |
+ } |
1144 |
+- return (unsigned int)clks[0]; |
1145 |
++ return (unsigned int)clks[0] / KHz; |
1146 |
+ } |
1147 |
+ |
1148 |
+ static unsigned long clk_pxa3xx_ac97_get_rate(struct clk_hw *hw, |
1149 |
+diff --git a/drivers/clk/qcom/gcc-apq8084.c b/drivers/clk/qcom/gcc-apq8084.c |
1150 |
+index 54a756b90a37..457c540585f9 100644 |
1151 |
+--- a/drivers/clk/qcom/gcc-apq8084.c |
1152 |
++++ b/drivers/clk/qcom/gcc-apq8084.c |
1153 |
+@@ -2105,6 +2105,7 @@ static struct clk_branch gcc_ce1_clk = { |
1154 |
+ "ce1_clk_src", |
1155 |
+ }, |
1156 |
+ .num_parents = 1, |
1157 |
++ .flags = CLK_SET_RATE_PARENT, |
1158 |
+ .ops = &clk_branch2_ops, |
1159 |
+ }, |
1160 |
+ }, |
1161 |
+diff --git a/drivers/clk/qcom/gcc-msm8916.c b/drivers/clk/qcom/gcc-msm8916.c |
1162 |
+index c66f7bc2ae87..5d75bffab141 100644 |
1163 |
+--- a/drivers/clk/qcom/gcc-msm8916.c |
1164 |
++++ b/drivers/clk/qcom/gcc-msm8916.c |
1165 |
+@@ -2278,7 +2278,7 @@ static struct clk_branch gcc_prng_ahb_clk = { |
1166 |
+ .halt_check = BRANCH_HALT_VOTED, |
1167 |
+ .clkr = { |
1168 |
+ .enable_reg = 0x45004, |
1169 |
+- .enable_mask = BIT(0), |
1170 |
++ .enable_mask = BIT(8), |
1171 |
+ .hw.init = &(struct clk_init_data){ |
1172 |
+ .name = "gcc_prng_ahb_clk", |
1173 |
+ .parent_names = (const char *[]){ |
1174 |
+diff --git a/drivers/clk/qcom/gcc-msm8974.c b/drivers/clk/qcom/gcc-msm8974.c |
1175 |
+index c39d09874e74..f06a082e3e87 100644 |
1176 |
+--- a/drivers/clk/qcom/gcc-msm8974.c |
1177 |
++++ b/drivers/clk/qcom/gcc-msm8974.c |
1178 |
+@@ -1783,6 +1783,7 @@ static struct clk_branch gcc_ce1_clk = { |
1179 |
+ "ce1_clk_src", |
1180 |
+ }, |
1181 |
+ .num_parents = 1, |
1182 |
++ .flags = CLK_SET_RATE_PARENT, |
1183 |
+ .ops = &clk_branch2_ops, |
1184 |
+ }, |
1185 |
+ }, |
1186 |
+diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c |
1187 |
+index 4f817ed9e6ee..0211162ee879 100644 |
1188 |
+--- a/drivers/clk/rockchip/clk-rk3288.c |
1189 |
++++ b/drivers/clk/rockchip/clk-rk3288.c |
1190 |
+@@ -578,7 +578,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = { |
1191 |
+ COMPOSITE(0, "mac_pll_src", mux_pll_src_npll_cpll_gpll_p, 0, |
1192 |
+ RK3288_CLKSEL_CON(21), 0, 2, MFLAGS, 8, 5, DFLAGS, |
1193 |
+ RK3288_CLKGATE_CON(2), 5, GFLAGS), |
1194 |
+- MUX(SCLK_MAC, "mac_clk", mux_mac_p, 0, |
1195 |
++ MUX(SCLK_MAC, "mac_clk", mux_mac_p, CLK_SET_RATE_PARENT, |
1196 |
+ RK3288_CLKSEL_CON(21), 4, 1, MFLAGS), |
1197 |
+ GATE(SCLK_MACREF_OUT, "sclk_macref_out", "mac_clk", 0, |
1198 |
+ RK3288_CLKGATE_CON(5), 3, GFLAGS), |
1199 |
+diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c |
1200 |
+index cae2c048488d..d1af2fc53c5f 100644 |
1201 |
+--- a/drivers/clk/samsung/clk-exynos4.c |
1202 |
++++ b/drivers/clk/samsung/clk-exynos4.c |
1203 |
+@@ -86,6 +86,7 @@ |
1204 |
+ #define DIV_PERIL4 0xc560 |
1205 |
+ #define DIV_PERIL5 0xc564 |
1206 |
+ #define E4X12_DIV_CAM1 0xc568 |
1207 |
++#define E4X12_GATE_BUS_FSYS1 0xc744 |
1208 |
+ #define GATE_SCLK_CAM 0xc820 |
1209 |
+ #define GATE_IP_CAM 0xc920 |
1210 |
+ #define GATE_IP_TV 0xc924 |
1211 |
+@@ -1097,6 +1098,7 @@ static struct samsung_gate_clock exynos4x12_gate_clks[] __initdata = { |
1212 |
+ 0), |
1213 |
+ GATE(CLK_PPMUIMAGE, "ppmuimage", "aclk200", E4X12_GATE_IP_IMAGE, 9, 0, |
1214 |
+ 0), |
1215 |
++ GATE(CLK_TSADC, "tsadc", "aclk133", E4X12_GATE_BUS_FSYS1, 16, 0, 0), |
1216 |
+ GATE(CLK_MIPI_HSI, "mipi_hsi", "aclk133", GATE_IP_FSYS, 10, 0, 0), |
1217 |
+ GATE(CLK_CHIPID, "chipid", "aclk100", E4X12_GATE_IP_PERIR, 0, 0, 0), |
1218 |
+ GATE(CLK_SYSREG, "sysreg", "aclk100", E4X12_GATE_IP_PERIR, 1, |
1219 |
+diff --git a/drivers/clk/samsung/clk-s5pv210.c b/drivers/clk/samsung/clk-s5pv210.c |
1220 |
+index cf7e8fa7b624..793cb1d2f7ae 100644 |
1221 |
+--- a/drivers/clk/samsung/clk-s5pv210.c |
1222 |
++++ b/drivers/clk/samsung/clk-s5pv210.c |
1223 |
+@@ -828,6 +828,8 @@ static void __init __s5pv210_clk_init(struct device_node *np, |
1224 |
+ |
1225 |
+ s5pv210_clk_sleep_init(); |
1226 |
+ |
1227 |
++ samsung_clk_of_add_provider(np, ctx); |
1228 |
++ |
1229 |
+ pr_info("%s clocks: mout_apll = %ld, mout_mpll = %ld\n" |
1230 |
+ "\tmout_epll = %ld, mout_vpll = %ld\n", |
1231 |
+ is_s5p6442 ? "S5P6442" : "S5PV210", |
1232 |
+diff --git a/drivers/clk/versatile/clk-sp810.c b/drivers/clk/versatile/clk-sp810.c |
1233 |
+index a96dd8e53fdb..b674ffc4f5ce 100644 |
1234 |
+--- a/drivers/clk/versatile/clk-sp810.c |
1235 |
++++ b/drivers/clk/versatile/clk-sp810.c |
1236 |
+@@ -128,8 +128,8 @@ static struct clk *clk_sp810_timerclken_of_get(struct of_phandle_args *clkspec, |
1237 |
+ { |
1238 |
+ struct clk_sp810 *sp810 = data; |
1239 |
+ |
1240 |
+- if (WARN_ON(clkspec->args_count != 1 || clkspec->args[0] > |
1241 |
+- ARRAY_SIZE(sp810->timerclken))) |
1242 |
++ if (WARN_ON(clkspec->args_count != 1 || |
1243 |
++ clkspec->args[0] >= ARRAY_SIZE(sp810->timerclken))) |
1244 |
+ return NULL; |
1245 |
+ |
1246 |
+ return sp810->timerclken[clkspec->args[0]].clk; |
1247 |
+diff --git a/drivers/crypto/vmx/aes_ctr.c b/drivers/crypto/vmx/aes_ctr.c |
1248 |
+index 7adae42a7b79..ed3838781b4c 100644 |
1249 |
+--- a/drivers/crypto/vmx/aes_ctr.c |
1250 |
++++ b/drivers/crypto/vmx/aes_ctr.c |
1251 |
+@@ -113,6 +113,7 @@ static int p8_aes_ctr_crypt(struct blkcipher_desc *desc, |
1252 |
+ struct scatterlist *src, unsigned int nbytes) |
1253 |
+ { |
1254 |
+ int ret; |
1255 |
++ u64 inc; |
1256 |
+ struct blkcipher_walk walk; |
1257 |
+ struct p8_aes_ctr_ctx *ctx = |
1258 |
+ crypto_tfm_ctx(crypto_blkcipher_tfm(desc->tfm)); |
1259 |
+@@ -140,7 +141,12 @@ static int p8_aes_ctr_crypt(struct blkcipher_desc *desc, |
1260 |
+ walk.iv); |
1261 |
+ pagefault_enable(); |
1262 |
+ |
1263 |
+- crypto_inc(walk.iv, AES_BLOCK_SIZE); |
1264 |
++ /* We need to update IV mostly for last bytes/round */ |
1265 |
++ inc = (nbytes & AES_BLOCK_MASK) / AES_BLOCK_SIZE; |
1266 |
++ if (inc > 0) |
1267 |
++ while (inc--) |
1268 |
++ crypto_inc(walk.iv, AES_BLOCK_SIZE); |
1269 |
++ |
1270 |
+ nbytes &= AES_BLOCK_SIZE - 1; |
1271 |
+ ret = blkcipher_walk_done(desc, &walk, nbytes); |
1272 |
+ } |
1273 |
+diff --git a/drivers/crypto/vmx/aesp8-ppc.pl b/drivers/crypto/vmx/aesp8-ppc.pl |
1274 |
+index 6c5c20c6108e..228053921b3f 100644 |
1275 |
+--- a/drivers/crypto/vmx/aesp8-ppc.pl |
1276 |
++++ b/drivers/crypto/vmx/aesp8-ppc.pl |
1277 |
+@@ -1437,28 +1437,28 @@ Load_ctr32_enc_key: |
1278 |
+ ?vperm v31,v31,$out0,$keyperm |
1279 |
+ lvx v25,$x10,$key_ # pre-load round[2] |
1280 |
+ |
1281 |
+- vadduwm $two,$one,$one |
1282 |
++ vadduqm $two,$one,$one |
1283 |
+ subi $inp,$inp,15 # undo "caller" |
1284 |
+ $SHL $len,$len,4 |
1285 |
+ |
1286 |
+- vadduwm $out1,$ivec,$one # counter values ... |
1287 |
+- vadduwm $out2,$ivec,$two |
1288 |
++ vadduqm $out1,$ivec,$one # counter values ... |
1289 |
++ vadduqm $out2,$ivec,$two |
1290 |
+ vxor $out0,$ivec,$rndkey0 # ... xored with rndkey[0] |
1291 |
+ le?li $idx,8 |
1292 |
+- vadduwm $out3,$out1,$two |
1293 |
++ vadduqm $out3,$out1,$two |
1294 |
+ vxor $out1,$out1,$rndkey0 |
1295 |
+ le?lvsl $inpperm,0,$idx |
1296 |
+- vadduwm $out4,$out2,$two |
1297 |
++ vadduqm $out4,$out2,$two |
1298 |
+ vxor $out2,$out2,$rndkey0 |
1299 |
+ le?vspltisb $tmp,0x0f |
1300 |
+- vadduwm $out5,$out3,$two |
1301 |
++ vadduqm $out5,$out3,$two |
1302 |
+ vxor $out3,$out3,$rndkey0 |
1303 |
+ le?vxor $inpperm,$inpperm,$tmp # transform for lvx_u/stvx_u |
1304 |
+- vadduwm $out6,$out4,$two |
1305 |
++ vadduqm $out6,$out4,$two |
1306 |
+ vxor $out4,$out4,$rndkey0 |
1307 |
+- vadduwm $out7,$out5,$two |
1308 |
++ vadduqm $out7,$out5,$two |
1309 |
+ vxor $out5,$out5,$rndkey0 |
1310 |
+- vadduwm $ivec,$out6,$two # next counter value |
1311 |
++ vadduqm $ivec,$out6,$two # next counter value |
1312 |
+ vxor $out6,$out6,$rndkey0 |
1313 |
+ vxor $out7,$out7,$rndkey0 |
1314 |
+ |
1315 |
+@@ -1594,27 +1594,27 @@ Loop_ctr32_enc8x_middle: |
1316 |
+ |
1317 |
+ vcipherlast $in0,$out0,$in0 |
1318 |
+ vcipherlast $in1,$out1,$in1 |
1319 |
+- vadduwm $out1,$ivec,$one # counter values ... |
1320 |
++ vadduqm $out1,$ivec,$one # counter values ... |
1321 |
+ vcipherlast $in2,$out2,$in2 |
1322 |
+- vadduwm $out2,$ivec,$two |
1323 |
++ vadduqm $out2,$ivec,$two |
1324 |
+ vxor $out0,$ivec,$rndkey0 # ... xored with rndkey[0] |
1325 |
+ vcipherlast $in3,$out3,$in3 |
1326 |
+- vadduwm $out3,$out1,$two |
1327 |
++ vadduqm $out3,$out1,$two |
1328 |
+ vxor $out1,$out1,$rndkey0 |
1329 |
+ vcipherlast $in4,$out4,$in4 |
1330 |
+- vadduwm $out4,$out2,$two |
1331 |
++ vadduqm $out4,$out2,$two |
1332 |
+ vxor $out2,$out2,$rndkey0 |
1333 |
+ vcipherlast $in5,$out5,$in5 |
1334 |
+- vadduwm $out5,$out3,$two |
1335 |
++ vadduqm $out5,$out3,$two |
1336 |
+ vxor $out3,$out3,$rndkey0 |
1337 |
+ vcipherlast $in6,$out6,$in6 |
1338 |
+- vadduwm $out6,$out4,$two |
1339 |
++ vadduqm $out6,$out4,$two |
1340 |
+ vxor $out4,$out4,$rndkey0 |
1341 |
+ vcipherlast $in7,$out7,$in7 |
1342 |
+- vadduwm $out7,$out5,$two |
1343 |
++ vadduqm $out7,$out5,$two |
1344 |
+ vxor $out5,$out5,$rndkey0 |
1345 |
+ le?vperm $in0,$in0,$in0,$inpperm |
1346 |
+- vadduwm $ivec,$out6,$two # next counter value |
1347 |
++ vadduqm $ivec,$out6,$two # next counter value |
1348 |
+ vxor $out6,$out6,$rndkey0 |
1349 |
+ le?vperm $in1,$in1,$in1,$inpperm |
1350 |
+ vxor $out7,$out7,$rndkey0 |
1351 |
+diff --git a/drivers/crypto/vmx/ghashp8-ppc.pl b/drivers/crypto/vmx/ghashp8-ppc.pl |
1352 |
+index 0a6f899839dd..d8429cb71f02 100644 |
1353 |
+--- a/drivers/crypto/vmx/ghashp8-ppc.pl |
1354 |
++++ b/drivers/crypto/vmx/ghashp8-ppc.pl |
1355 |
+@@ -61,6 +61,12 @@ $code=<<___; |
1356 |
+ mtspr 256,r0 |
1357 |
+ li r10,0x30 |
1358 |
+ lvx_u $H,0,r4 # load H |
1359 |
++ le?xor r7,r7,r7 |
1360 |
++ le?addi r7,r7,0x8 # need a vperm start with 08 |
1361 |
++ le?lvsr 5,0,r7 |
1362 |
++ le?vspltisb 6,0x0f |
1363 |
++ le?vxor 5,5,6 # set a b-endian mask |
1364 |
++ le?vperm $H,$H,$H,5 |
1365 |
+ |
1366 |
+ vspltisb $xC2,-16 # 0xf0 |
1367 |
+ vspltisb $t0,1 # one |
1368 |
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c |
1369 |
+index 27df17a0e620..89c3dd62ba21 100644 |
1370 |
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c |
1371 |
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c |
1372 |
+@@ -75,6 +75,11 @@ void amdgpu_connector_hotplug(struct drm_connector *connector) |
1373 |
+ if (!amdgpu_display_hpd_sense(adev, amdgpu_connector->hpd.hpd)) { |
1374 |
+ drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF); |
1375 |
+ } else if (amdgpu_atombios_dp_needs_link_train(amdgpu_connector)) { |
1376 |
++ /* Don't try to start link training before we |
1377 |
++ * have the dpcd */ |
1378 |
++ if (!amdgpu_atombios_dp_get_dpcd(amdgpu_connector)) |
1379 |
++ return; |
1380 |
++ |
1381 |
+ /* set it to OFF so that drm_helper_connector_dpms() |
1382 |
+ * won't return immediately since the current state |
1383 |
+ * is ON at this point. |
1384 |
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c |
1385 |
+index db5422e65ec5..a8207e5a8549 100644 |
1386 |
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c |
1387 |
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c |
1388 |
+@@ -97,18 +97,12 @@ int amdgpu_ih_ring_init(struct amdgpu_device *adev, unsigned ring_size, |
1389 |
+ /* add 8 bytes for the rptr/wptr shadows and |
1390 |
+ * add them to the end of the ring allocation. |
1391 |
+ */ |
1392 |
+- adev->irq.ih.ring = kzalloc(adev->irq.ih.ring_size + 8, GFP_KERNEL); |
1393 |
++ adev->irq.ih.ring = pci_alloc_consistent(adev->pdev, |
1394 |
++ adev->irq.ih.ring_size + 8, |
1395 |
++ &adev->irq.ih.rb_dma_addr); |
1396 |
+ if (adev->irq.ih.ring == NULL) |
1397 |
+ return -ENOMEM; |
1398 |
+- adev->irq.ih.rb_dma_addr = pci_map_single(adev->pdev, |
1399 |
+- (void *)adev->irq.ih.ring, |
1400 |
+- adev->irq.ih.ring_size, |
1401 |
+- PCI_DMA_BIDIRECTIONAL); |
1402 |
+- if (pci_dma_mapping_error(adev->pdev, adev->irq.ih.rb_dma_addr)) { |
1403 |
+- dev_err(&adev->pdev->dev, "Failed to DMA MAP the IH RB page\n"); |
1404 |
+- kfree((void *)adev->irq.ih.ring); |
1405 |
+- return -ENOMEM; |
1406 |
+- } |
1407 |
++ memset((void *)adev->irq.ih.ring, 0, adev->irq.ih.ring_size + 8); |
1408 |
+ adev->irq.ih.wptr_offs = (adev->irq.ih.ring_size / 4) + 0; |
1409 |
+ adev->irq.ih.rptr_offs = (adev->irq.ih.ring_size / 4) + 1; |
1410 |
+ } |
1411 |
+@@ -148,9 +142,9 @@ void amdgpu_ih_ring_fini(struct amdgpu_device *adev) |
1412 |
+ /* add 8 bytes for the rptr/wptr shadows and |
1413 |
+ * add them to the end of the ring allocation. |
1414 |
+ */ |
1415 |
+- pci_unmap_single(adev->pdev, adev->irq.ih.rb_dma_addr, |
1416 |
+- adev->irq.ih.ring_size + 8, PCI_DMA_BIDIRECTIONAL); |
1417 |
+- kfree((void *)adev->irq.ih.ring); |
1418 |
++ pci_free_consistent(adev->pdev, adev->irq.ih.ring_size + 8, |
1419 |
++ (void *)adev->irq.ih.ring, |
1420 |
++ adev->irq.ih.rb_dma_addr); |
1421 |
+ adev->irq.ih.ring = NULL; |
1422 |
+ } |
1423 |
+ } else { |
1424 |
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c |
1425 |
+index f5c22556ec2c..2abc661845b6 100644 |
1426 |
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c |
1427 |
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c |
1428 |
+@@ -374,7 +374,8 @@ static int amdgpu_uvd_cs_msg_decode(uint32_t *msg, unsigned buf_sizes[]) |
1429 |
+ unsigned height_in_mb = ALIGN(height / 16, 2); |
1430 |
+ unsigned fs_in_mb = width_in_mb * height_in_mb; |
1431 |
+ |
1432 |
+- unsigned image_size, tmp, min_dpb_size, num_dpb_buffer, min_ctx_size; |
1433 |
++ unsigned image_size, tmp, min_dpb_size, num_dpb_buffer; |
1434 |
++ unsigned min_ctx_size = 0; |
1435 |
+ |
1436 |
+ image_size = width * height; |
1437 |
+ image_size += image_size / 2; |
1438 |
+diff --git a/drivers/gpu/drm/amd/amdgpu/atombios_dp.c b/drivers/gpu/drm/amd/amdgpu/atombios_dp.c |
1439 |
+index 9ba0a7d5bc8e..92b6acadfc52 100644 |
1440 |
+--- a/drivers/gpu/drm/amd/amdgpu/atombios_dp.c |
1441 |
++++ b/drivers/gpu/drm/amd/amdgpu/atombios_dp.c |
1442 |
+@@ -139,7 +139,8 @@ amdgpu_atombios_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *m |
1443 |
+ |
1444 |
+ tx_buf[0] = msg->address & 0xff; |
1445 |
+ tx_buf[1] = msg->address >> 8; |
1446 |
+- tx_buf[2] = msg->request << 4; |
1447 |
++ tx_buf[2] = (msg->request << 4) | |
1448 |
++ ((msg->address >> 16) & 0xf); |
1449 |
+ tx_buf[3] = msg->size ? (msg->size - 1) : 0; |
1450 |
+ |
1451 |
+ switch (msg->request & ~DP_AUX_I2C_MOT) { |
1452 |
+diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c |
1453 |
+index e70a26f587a0..e774a437dd65 100644 |
1454 |
+--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c |
1455 |
++++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c |
1456 |
+@@ -1331,7 +1331,7 @@ static void dce_v10_0_program_watermarks(struct amdgpu_device *adev, |
1457 |
+ tmp = REG_SET_FIELD(wm_mask, DPG_WATERMARK_MASK_CONTROL, URGENCY_WATERMARK_MASK, 2); |
1458 |
+ WREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset, tmp); |
1459 |
+ tmp = RREG32(mmDPG_PIPE_URGENCY_CONTROL + amdgpu_crtc->crtc_offset); |
1460 |
+- tmp = REG_SET_FIELD(tmp, DPG_PIPE_URGENCY_CONTROL, URGENCY_LOW_WATERMARK, latency_watermark_a); |
1461 |
++ tmp = REG_SET_FIELD(tmp, DPG_PIPE_URGENCY_CONTROL, URGENCY_LOW_WATERMARK, latency_watermark_b); |
1462 |
+ tmp = REG_SET_FIELD(tmp, DPG_PIPE_URGENCY_CONTROL, URGENCY_HIGH_WATERMARK, line_time); |
1463 |
+ WREG32(mmDPG_PIPE_URGENCY_CONTROL + amdgpu_crtc->crtc_offset, tmp); |
1464 |
+ /* restore original selection */ |
1465 |
+diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c |
1466 |
+index dcb402ee048a..c4a21a7afd68 100644 |
1467 |
+--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c |
1468 |
++++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c |
1469 |
+@@ -1329,7 +1329,7 @@ static void dce_v11_0_program_watermarks(struct amdgpu_device *adev, |
1470 |
+ tmp = REG_SET_FIELD(wm_mask, DPG_WATERMARK_MASK_CONTROL, URGENCY_WATERMARK_MASK, 2); |
1471 |
+ WREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset, tmp); |
1472 |
+ tmp = RREG32(mmDPG_PIPE_URGENCY_CONTROL + amdgpu_crtc->crtc_offset); |
1473 |
+- tmp = REG_SET_FIELD(tmp, DPG_PIPE_URGENCY_CONTROL, URGENCY_LOW_WATERMARK, latency_watermark_a); |
1474 |
++ tmp = REG_SET_FIELD(tmp, DPG_PIPE_URGENCY_CONTROL, URGENCY_LOW_WATERMARK, latency_watermark_b); |
1475 |
+ tmp = REG_SET_FIELD(tmp, DPG_PIPE_URGENCY_CONTROL, URGENCY_HIGH_WATERMARK, line_time); |
1476 |
+ WREG32(mmDPG_PIPE_URGENCY_CONTROL + amdgpu_crtc->crtc_offset, tmp); |
1477 |
+ /* restore original selection */ |
1478 |
+diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c |
1479 |
+index 884b4f9b81c4..603146ec9868 100644 |
1480 |
+--- a/drivers/gpu/drm/i915/i915_drv.c |
1481 |
++++ b/drivers/gpu/drm/i915/i915_drv.c |
1482 |
+@@ -683,15 +683,18 @@ static int i915_drm_suspend_late(struct drm_device *drm_dev, bool hibernation) |
1483 |
+ |
1484 |
+ pci_disable_device(drm_dev->pdev); |
1485 |
+ /* |
1486 |
+- * During hibernation on some GEN4 platforms the BIOS may try to access |
1487 |
++ * During hibernation on some platforms the BIOS may try to access |
1488 |
+ * the device even though it's already in D3 and hang the machine. So |
1489 |
+ * leave the device in D0 on those platforms and hope the BIOS will |
1490 |
+- * power down the device properly. Platforms where this was seen: |
1491 |
+- * Lenovo Thinkpad X301, X61s |
1492 |
++ * power down the device properly. The issue was seen on multiple old |
1493 |
++ * GENs with different BIOS vendors, so having an explicit blacklist |
1494 |
++ * is inpractical; apply the workaround on everything pre GEN6. The |
1495 |
++ * platforms where the issue was seen: |
1496 |
++ * Lenovo Thinkpad X301, X61s, X60, T60, X41 |
1497 |
++ * Fujitsu FSC S7110 |
1498 |
++ * Acer Aspire 1830T |
1499 |
+ */ |
1500 |
+- if (!(hibernation && |
1501 |
+- drm_dev->pdev->subsystem_vendor == PCI_VENDOR_ID_LENOVO && |
1502 |
+- INTEL_INFO(dev_priv)->gen == 4)) |
1503 |
++ if (!(hibernation && INTEL_INFO(dev_priv)->gen < 6)) |
1504 |
+ pci_set_power_state(drm_dev->pdev, PCI_D3hot); |
1505 |
+ |
1506 |
+ return 0; |
1507 |
+diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h |
1508 |
+index fd1de451c8c6..e1df8feb05be 100644 |
1509 |
+--- a/drivers/gpu/drm/i915/i915_drv.h |
1510 |
++++ b/drivers/gpu/drm/i915/i915_drv.h |
1511 |
+@@ -3303,13 +3303,13 @@ int intel_freq_opcode(struct drm_i915_private *dev_priv, int val); |
1512 |
+ #define I915_READ64(reg) dev_priv->uncore.funcs.mmio_readq(dev_priv, (reg), true) |
1513 |
+ |
1514 |
+ #define I915_READ64_2x32(lower_reg, upper_reg) ({ \ |
1515 |
+- u32 upper, lower, tmp; \ |
1516 |
+- tmp = I915_READ(upper_reg); \ |
1517 |
++ u32 upper, lower, old_upper, loop = 0; \ |
1518 |
++ upper = I915_READ(upper_reg); \ |
1519 |
+ do { \ |
1520 |
+- upper = tmp; \ |
1521 |
++ old_upper = upper; \ |
1522 |
+ lower = I915_READ(lower_reg); \ |
1523 |
+- tmp = I915_READ(upper_reg); \ |
1524 |
+- } while (upper != tmp); \ |
1525 |
++ upper = I915_READ(upper_reg); \ |
1526 |
++ } while (upper != old_upper && loop++ < 2); \ |
1527 |
+ (u64)upper << 32 | lower; }) |
1528 |
+ |
1529 |
+ #define POSTING_READ(reg) (void)I915_READ_NOTRACE(reg) |
1530 |
+diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c |
1531 |
+index a7fa14516cda..5e6b4a29e503 100644 |
1532 |
+--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c |
1533 |
++++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c |
1534 |
+@@ -1024,6 +1024,7 @@ i915_gem_execbuffer_move_to_active(struct list_head *vmas, |
1535 |
+ u32 old_read = obj->base.read_domains; |
1536 |
+ u32 old_write = obj->base.write_domain; |
1537 |
+ |
1538 |
++ obj->dirty = 1; /* be paranoid */ |
1539 |
+ obj->base.write_domain = obj->base.pending_write_domain; |
1540 |
+ if (obj->base.write_domain == 0) |
1541 |
+ obj->base.pending_read_domains |= obj->base.read_domains; |
1542 |
+@@ -1031,7 +1032,6 @@ i915_gem_execbuffer_move_to_active(struct list_head *vmas, |
1543 |
+ |
1544 |
+ i915_vma_move_to_active(vma, ring); |
1545 |
+ if (obj->base.write_domain) { |
1546 |
+- obj->dirty = 1; |
1547 |
+ i915_gem_request_assign(&obj->last_write_req, req); |
1548 |
+ |
1549 |
+ intel_fb_obj_invalidate(obj, ring, ORIGIN_CS); |
1550 |
+diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c |
1551 |
+index bcb41e61877d..fb842d6e343f 100644 |
1552 |
+--- a/drivers/gpu/drm/i915/intel_csr.c |
1553 |
++++ b/drivers/gpu/drm/i915/intel_csr.c |
1554 |
+@@ -350,7 +350,7 @@ static void finish_csr_load(const struct firmware *fw, void *context) |
1555 |
+ } |
1556 |
+ csr->mmio_count = dmc_header->mmio_count; |
1557 |
+ for (i = 0; i < dmc_header->mmio_count; i++) { |
1558 |
+- if (dmc_header->mmioaddr[i] < CSR_MMIO_START_RANGE && |
1559 |
++ if (dmc_header->mmioaddr[i] < CSR_MMIO_START_RANGE || |
1560 |
+ dmc_header->mmioaddr[i] > CSR_MMIO_END_RANGE) { |
1561 |
+ DRM_ERROR(" Firmware has wrong mmio address 0x%x\n", |
1562 |
+ dmc_header->mmioaddr[i]); |
1563 |
+diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c |
1564 |
+index 87476ff181dd..107c6c0519fd 100644 |
1565 |
+--- a/drivers/gpu/drm/i915/intel_display.c |
1566 |
++++ b/drivers/gpu/drm/i915/intel_display.c |
1567 |
+@@ -14665,6 +14665,24 @@ void intel_modeset_init(struct drm_device *dev) |
1568 |
+ if (INTEL_INFO(dev)->num_pipes == 0) |
1569 |
+ return; |
1570 |
+ |
1571 |
++ /* |
1572 |
++ * There may be no VBT; and if the BIOS enabled SSC we can |
1573 |
++ * just keep using it to avoid unnecessary flicker. Whereas if the |
1574 |
++ * BIOS isn't using it, don't assume it will work even if the VBT |
1575 |
++ * indicates as much. |
1576 |
++ */ |
1577 |
++ if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev)) { |
1578 |
++ bool bios_lvds_use_ssc = !!(I915_READ(PCH_DREF_CONTROL) & |
1579 |
++ DREF_SSC1_ENABLE); |
1580 |
++ |
1581 |
++ if (dev_priv->vbt.lvds_use_ssc != bios_lvds_use_ssc) { |
1582 |
++ DRM_DEBUG_KMS("SSC %sabled by BIOS, overriding VBT which says %sabled\n", |
1583 |
++ bios_lvds_use_ssc ? "en" : "dis", |
1584 |
++ dev_priv->vbt.lvds_use_ssc ? "en" : "dis"); |
1585 |
++ dev_priv->vbt.lvds_use_ssc = bios_lvds_use_ssc; |
1586 |
++ } |
1587 |
++ } |
1588 |
++ |
1589 |
+ intel_init_display(dev); |
1590 |
+ intel_init_audio(dev); |
1591 |
+ |
1592 |
+@@ -15160,7 +15178,6 @@ void intel_modeset_setup_hw_state(struct drm_device *dev, |
1593 |
+ |
1594 |
+ void intel_modeset_gem_init(struct drm_device *dev) |
1595 |
+ { |
1596 |
+- struct drm_i915_private *dev_priv = dev->dev_private; |
1597 |
+ struct drm_crtc *c; |
1598 |
+ struct drm_i915_gem_object *obj; |
1599 |
+ int ret; |
1600 |
+@@ -15169,16 +15186,6 @@ void intel_modeset_gem_init(struct drm_device *dev) |
1601 |
+ intel_init_gt_powersave(dev); |
1602 |
+ mutex_unlock(&dev->struct_mutex); |
1603 |
+ |
1604 |
+- /* |
1605 |
+- * There may be no VBT; and if the BIOS enabled SSC we can |
1606 |
+- * just keep using it to avoid unnecessary flicker. Whereas if the |
1607 |
+- * BIOS isn't using it, don't assume it will work even if the VBT |
1608 |
+- * indicates as much. |
1609 |
+- */ |
1610 |
+- if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev)) |
1611 |
+- dev_priv->vbt.lvds_use_ssc = !!(I915_READ(PCH_DREF_CONTROL) & |
1612 |
+- DREF_SSC1_ENABLE); |
1613 |
+- |
1614 |
+ intel_modeset_init_hw(dev); |
1615 |
+ |
1616 |
+ intel_setup_overlay(dev); |
1617 |
+diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c |
1618 |
+index 1df0e1fe235f..bd8f8863eb0e 100644 |
1619 |
+--- a/drivers/gpu/drm/i915/intel_dp.c |
1620 |
++++ b/drivers/gpu/drm/i915/intel_dp.c |
1621 |
+@@ -4987,9 +4987,12 @@ intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, bool long_hpd) |
1622 |
+ |
1623 |
+ intel_dp_probe_oui(intel_dp); |
1624 |
+ |
1625 |
+- if (!intel_dp_probe_mst(intel_dp)) |
1626 |
++ if (!intel_dp_probe_mst(intel_dp)) { |
1627 |
++ drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); |
1628 |
++ intel_dp_check_link_status(intel_dp); |
1629 |
++ drm_modeset_unlock(&dev->mode_config.connection_mutex); |
1630 |
+ goto mst_fail; |
1631 |
+- |
1632 |
++ } |
1633 |
+ } else { |
1634 |
+ if (intel_dp->is_mst) { |
1635 |
+ if (intel_dp_check_mst_status(intel_dp) == -EINVAL) |
1636 |
+@@ -4997,10 +5000,6 @@ intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, bool long_hpd) |
1637 |
+ } |
1638 |
+ |
1639 |
+ if (!intel_dp->is_mst) { |
1640 |
+- /* |
1641 |
+- * we'll check the link status via the normal hot plug path later - |
1642 |
+- * but for short hpds we should check it now |
1643 |
+- */ |
1644 |
+ drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); |
1645 |
+ intel_dp_check_link_status(intel_dp); |
1646 |
+ drm_modeset_unlock(&dev->mode_config.connection_mutex); |
1647 |
+diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c |
1648 |
+index b5a5558ecd63..68b25dd525f0 100644 |
1649 |
+--- a/drivers/gpu/drm/i915/intel_dsi.c |
1650 |
++++ b/drivers/gpu/drm/i915/intel_dsi.c |
1651 |
+@@ -1036,11 +1036,7 @@ void intel_dsi_init(struct drm_device *dev) |
1652 |
+ intel_connector->unregister = intel_connector_unregister; |
1653 |
+ |
1654 |
+ /* Pipe A maps to MIPI DSI port A, pipe B maps to MIPI DSI port C */ |
1655 |
+- if (dev_priv->vbt.dsi.config->dual_link) { |
1656 |
+- /* XXX: does dual link work on either pipe? */ |
1657 |
+- intel_encoder->crtc_mask = (1 << PIPE_A); |
1658 |
+- intel_dsi->ports = ((1 << PORT_A) | (1 << PORT_C)); |
1659 |
+- } else if (dev_priv->vbt.dsi.port == DVO_PORT_MIPIA) { |
1660 |
++ if (dev_priv->vbt.dsi.port == DVO_PORT_MIPIA) { |
1661 |
+ intel_encoder->crtc_mask = (1 << PIPE_A); |
1662 |
+ intel_dsi->ports = (1 << PORT_A); |
1663 |
+ } else if (dev_priv->vbt.dsi.port == DVO_PORT_MIPIC) { |
1664 |
+@@ -1048,6 +1044,9 @@ void intel_dsi_init(struct drm_device *dev) |
1665 |
+ intel_dsi->ports = (1 << PORT_C); |
1666 |
+ } |
1667 |
+ |
1668 |
++ if (dev_priv->vbt.dsi.config->dual_link) |
1669 |
++ intel_dsi->ports = ((1 << PORT_A) | (1 << PORT_C)); |
1670 |
++ |
1671 |
+ /* Create a DSI host (and a device) for each port. */ |
1672 |
+ for_each_dsi_port(port, intel_dsi->ports) { |
1673 |
+ struct intel_dsi_host *host; |
1674 |
+diff --git a/drivers/gpu/drm/qxl/qxl_display.c b/drivers/gpu/drm/qxl/qxl_display.c |
1675 |
+index a8dbb3ef4e3c..7c6225c84ba6 100644 |
1676 |
+--- a/drivers/gpu/drm/qxl/qxl_display.c |
1677 |
++++ b/drivers/gpu/drm/qxl/qxl_display.c |
1678 |
+@@ -160,9 +160,35 @@ static int qxl_add_monitors_config_modes(struct drm_connector *connector, |
1679 |
+ *pwidth = head->width; |
1680 |
+ *pheight = head->height; |
1681 |
+ drm_mode_probed_add(connector, mode); |
1682 |
++ /* remember the last custom size for mode validation */ |
1683 |
++ qdev->monitors_config_width = mode->hdisplay; |
1684 |
++ qdev->monitors_config_height = mode->vdisplay; |
1685 |
+ return 1; |
1686 |
+ } |
1687 |
+ |
1688 |
++static struct mode_size { |
1689 |
++ int w; |
1690 |
++ int h; |
1691 |
++} common_modes[] = { |
1692 |
++ { 640, 480}, |
1693 |
++ { 720, 480}, |
1694 |
++ { 800, 600}, |
1695 |
++ { 848, 480}, |
1696 |
++ {1024, 768}, |
1697 |
++ {1152, 768}, |
1698 |
++ {1280, 720}, |
1699 |
++ {1280, 800}, |
1700 |
++ {1280, 854}, |
1701 |
++ {1280, 960}, |
1702 |
++ {1280, 1024}, |
1703 |
++ {1440, 900}, |
1704 |
++ {1400, 1050}, |
1705 |
++ {1680, 1050}, |
1706 |
++ {1600, 1200}, |
1707 |
++ {1920, 1080}, |
1708 |
++ {1920, 1200} |
1709 |
++}; |
1710 |
++ |
1711 |
+ static int qxl_add_common_modes(struct drm_connector *connector, |
1712 |
+ unsigned pwidth, |
1713 |
+ unsigned pheight) |
1714 |
+@@ -170,29 +196,6 @@ static int qxl_add_common_modes(struct drm_connector *connector, |
1715 |
+ struct drm_device *dev = connector->dev; |
1716 |
+ struct drm_display_mode *mode = NULL; |
1717 |
+ int i; |
1718 |
+- struct mode_size { |
1719 |
+- int w; |
1720 |
+- int h; |
1721 |
+- } common_modes[] = { |
1722 |
+- { 640, 480}, |
1723 |
+- { 720, 480}, |
1724 |
+- { 800, 600}, |
1725 |
+- { 848, 480}, |
1726 |
+- {1024, 768}, |
1727 |
+- {1152, 768}, |
1728 |
+- {1280, 720}, |
1729 |
+- {1280, 800}, |
1730 |
+- {1280, 854}, |
1731 |
+- {1280, 960}, |
1732 |
+- {1280, 1024}, |
1733 |
+- {1440, 900}, |
1734 |
+- {1400, 1050}, |
1735 |
+- {1680, 1050}, |
1736 |
+- {1600, 1200}, |
1737 |
+- {1920, 1080}, |
1738 |
+- {1920, 1200} |
1739 |
+- }; |
1740 |
+- |
1741 |
+ for (i = 0; i < ARRAY_SIZE(common_modes); i++) { |
1742 |
+ mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, |
1743 |
+ 60, false, false, false); |
1744 |
+@@ -823,11 +826,22 @@ static int qxl_conn_get_modes(struct drm_connector *connector) |
1745 |
+ static int qxl_conn_mode_valid(struct drm_connector *connector, |
1746 |
+ struct drm_display_mode *mode) |
1747 |
+ { |
1748 |
++ struct drm_device *ddev = connector->dev; |
1749 |
++ struct qxl_device *qdev = ddev->dev_private; |
1750 |
++ int i; |
1751 |
++ |
1752 |
+ /* TODO: is this called for user defined modes? (xrandr --add-mode) |
1753 |
+ * TODO: check that the mode fits in the framebuffer */ |
1754 |
+- DRM_DEBUG("%s: %dx%d status=%d\n", mode->name, mode->hdisplay, |
1755 |
+- mode->vdisplay, mode->status); |
1756 |
+- return MODE_OK; |
1757 |
++ |
1758 |
++ if(qdev->monitors_config_width == mode->hdisplay && |
1759 |
++ qdev->monitors_config_height == mode->vdisplay) |
1760 |
++ return MODE_OK; |
1761 |
++ |
1762 |
++ for (i = 0; i < ARRAY_SIZE(common_modes); i++) { |
1763 |
++ if (common_modes[i].w == mode->hdisplay && common_modes[i].h == mode->vdisplay) |
1764 |
++ return MODE_OK; |
1765 |
++ } |
1766 |
++ return MODE_BAD; |
1767 |
+ } |
1768 |
+ |
1769 |
+ static struct drm_encoder *qxl_best_encoder(struct drm_connector *connector) |
1770 |
+diff --git a/drivers/gpu/drm/qxl/qxl_drv.h b/drivers/gpu/drm/qxl/qxl_drv.h |
1771 |
+index d8549690801d..01a86948eb8c 100644 |
1772 |
+--- a/drivers/gpu/drm/qxl/qxl_drv.h |
1773 |
++++ b/drivers/gpu/drm/qxl/qxl_drv.h |
1774 |
+@@ -325,6 +325,8 @@ struct qxl_device { |
1775 |
+ struct work_struct fb_work; |
1776 |
+ |
1777 |
+ struct drm_property *hotplug_mode_update_property; |
1778 |
++ int monitors_config_width; |
1779 |
++ int monitors_config_height; |
1780 |
+ }; |
1781 |
+ |
1782 |
+ /* forward declaration for QXL_INFO_IO */ |
1783 |
+diff --git a/drivers/gpu/drm/radeon/atombios_dp.c b/drivers/gpu/drm/radeon/atombios_dp.c |
1784 |
+index f81e0d7d0232..9cd49c584263 100644 |
1785 |
+--- a/drivers/gpu/drm/radeon/atombios_dp.c |
1786 |
++++ b/drivers/gpu/drm/radeon/atombios_dp.c |
1787 |
+@@ -171,8 +171,9 @@ radeon_dp_aux_transfer_atom(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg) |
1788 |
+ return -E2BIG; |
1789 |
+ |
1790 |
+ tx_buf[0] = msg->address & 0xff; |
1791 |
+- tx_buf[1] = msg->address >> 8; |
1792 |
+- tx_buf[2] = msg->request << 4; |
1793 |
++ tx_buf[1] = (msg->address >> 8) & 0xff; |
1794 |
++ tx_buf[2] = (msg->request << 4) | |
1795 |
++ ((msg->address >> 16) & 0xf); |
1796 |
+ tx_buf[3] = msg->size ? (msg->size - 1) : 0; |
1797 |
+ |
1798 |
+ switch (msg->request & ~DP_AUX_I2C_MOT) { |
1799 |
+diff --git a/drivers/gpu/drm/radeon/radeon_audio.c b/drivers/gpu/drm/radeon/radeon_audio.c |
1800 |
+index fbc8d88d6e5d..2c02e99b5f95 100644 |
1801 |
+--- a/drivers/gpu/drm/radeon/radeon_audio.c |
1802 |
++++ b/drivers/gpu/drm/radeon/radeon_audio.c |
1803 |
+@@ -522,13 +522,15 @@ static int radeon_audio_set_avi_packet(struct drm_encoder *encoder, |
1804 |
+ return err; |
1805 |
+ } |
1806 |
+ |
1807 |
+- if (drm_rgb_quant_range_selectable(radeon_connector_edid(connector))) { |
1808 |
+- if (radeon_encoder->output_csc == RADEON_OUTPUT_CSC_TVRGB) |
1809 |
+- frame.quantization_range = HDMI_QUANTIZATION_RANGE_LIMITED; |
1810 |
+- else |
1811 |
+- frame.quantization_range = HDMI_QUANTIZATION_RANGE_FULL; |
1812 |
+- } else { |
1813 |
+- frame.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT; |
1814 |
++ if (radeon_encoder->output_csc != RADEON_OUTPUT_CSC_BYPASS) { |
1815 |
++ if (drm_rgb_quant_range_selectable(radeon_connector_edid(connector))) { |
1816 |
++ if (radeon_encoder->output_csc == RADEON_OUTPUT_CSC_TVRGB) |
1817 |
++ frame.quantization_range = HDMI_QUANTIZATION_RANGE_LIMITED; |
1818 |
++ else |
1819 |
++ frame.quantization_range = HDMI_QUANTIZATION_RANGE_FULL; |
1820 |
++ } else { |
1821 |
++ frame.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT; |
1822 |
++ } |
1823 |
+ } |
1824 |
+ |
1825 |
+ err = hdmi_avi_infoframe_pack(&frame, buffer, sizeof(buffer)); |
1826 |
+diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c |
1827 |
+index 94b21ae70ef7..5a2cafb4f1bc 100644 |
1828 |
+--- a/drivers/gpu/drm/radeon/radeon_connectors.c |
1829 |
++++ b/drivers/gpu/drm/radeon/radeon_connectors.c |
1830 |
+@@ -95,6 +95,11 @@ void radeon_connector_hotplug(struct drm_connector *connector) |
1831 |
+ if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { |
1832 |
+ drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF); |
1833 |
+ } else if (radeon_dp_needs_link_train(radeon_connector)) { |
1834 |
++ /* Don't try to start link training before we |
1835 |
++ * have the dpcd */ |
1836 |
++ if (!radeon_dp_getdpcd(radeon_connector)) |
1837 |
++ return; |
1838 |
++ |
1839 |
+ /* set it to OFF so that drm_helper_connector_dpms() |
1840 |
+ * won't return immediately since the current state |
1841 |
+ * is ON at this point. |
1842 |
+diff --git a/drivers/gpu/drm/radeon/radeon_dp_auxch.c b/drivers/gpu/drm/radeon/radeon_dp_auxch.c |
1843 |
+index fcbd60bb0349..3b0c229d7dcd 100644 |
1844 |
+--- a/drivers/gpu/drm/radeon/radeon_dp_auxch.c |
1845 |
++++ b/drivers/gpu/drm/radeon/radeon_dp_auxch.c |
1846 |
+@@ -116,8 +116,8 @@ radeon_dp_aux_transfer_native(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg |
1847 |
+ AUX_SW_WR_BYTES(bytes)); |
1848 |
+ |
1849 |
+ /* write the data header into the registers */ |
1850 |
+- /* request, addres, msg size */ |
1851 |
+- byte = (msg->request << 4); |
1852 |
++ /* request, address, msg size */ |
1853 |
++ byte = (msg->request << 4) | ((msg->address >> 16) & 0xf); |
1854 |
+ WREG32(AUX_SW_DATA + aux_offset[instance], |
1855 |
+ AUX_SW_DATA_MASK(byte) | AUX_SW_AUTOINCREMENT_DISABLE); |
1856 |
+ |
1857 |
+diff --git a/drivers/hid/hid-cp2112.c b/drivers/hid/hid-cp2112.c |
1858 |
+index a2dbbbe0d8d7..39bf74793b8b 100644 |
1859 |
+--- a/drivers/hid/hid-cp2112.c |
1860 |
++++ b/drivers/hid/hid-cp2112.c |
1861 |
+@@ -537,7 +537,7 @@ static int cp2112_xfer(struct i2c_adapter *adap, u16 addr, |
1862 |
+ struct cp2112_device *dev = (struct cp2112_device *)adap->algo_data; |
1863 |
+ struct hid_device *hdev = dev->hdev; |
1864 |
+ u8 buf[64]; |
1865 |
+- __be16 word; |
1866 |
++ __le16 word; |
1867 |
+ ssize_t count; |
1868 |
+ size_t read_length = 0; |
1869 |
+ unsigned int retries; |
1870 |
+@@ -554,7 +554,7 @@ static int cp2112_xfer(struct i2c_adapter *adap, u16 addr, |
1871 |
+ if (I2C_SMBUS_READ == read_write) |
1872 |
+ count = cp2112_read_req(buf, addr, read_length); |
1873 |
+ else |
1874 |
+- count = cp2112_write_req(buf, addr, data->byte, NULL, |
1875 |
++ count = cp2112_write_req(buf, addr, command, NULL, |
1876 |
+ 0); |
1877 |
+ break; |
1878 |
+ case I2C_SMBUS_BYTE_DATA: |
1879 |
+@@ -569,7 +569,7 @@ static int cp2112_xfer(struct i2c_adapter *adap, u16 addr, |
1880 |
+ break; |
1881 |
+ case I2C_SMBUS_WORD_DATA: |
1882 |
+ read_length = 2; |
1883 |
+- word = cpu_to_be16(data->word); |
1884 |
++ word = cpu_to_le16(data->word); |
1885 |
+ |
1886 |
+ if (I2C_SMBUS_READ == read_write) |
1887 |
+ count = cp2112_write_read_req(buf, addr, read_length, |
1888 |
+@@ -582,7 +582,7 @@ static int cp2112_xfer(struct i2c_adapter *adap, u16 addr, |
1889 |
+ size = I2C_SMBUS_WORD_DATA; |
1890 |
+ read_write = I2C_SMBUS_READ; |
1891 |
+ read_length = 2; |
1892 |
+- word = cpu_to_be16(data->word); |
1893 |
++ word = cpu_to_le16(data->word); |
1894 |
+ |
1895 |
+ count = cp2112_write_read_req(buf, addr, read_length, command, |
1896 |
+ (u8 *)&word, 2); |
1897 |
+@@ -675,7 +675,7 @@ static int cp2112_xfer(struct i2c_adapter *adap, u16 addr, |
1898 |
+ data->byte = buf[0]; |
1899 |
+ break; |
1900 |
+ case I2C_SMBUS_WORD_DATA: |
1901 |
+- data->word = be16_to_cpup((__be16 *)buf); |
1902 |
++ data->word = le16_to_cpup((__le16 *)buf); |
1903 |
+ break; |
1904 |
+ case I2C_SMBUS_BLOCK_DATA: |
1905 |
+ if (read_length > I2C_SMBUS_BLOCK_MAX) { |
1906 |
+diff --git a/drivers/hid/usbhid/hid-core.c b/drivers/hid/usbhid/hid-core.c |
1907 |
+index bfbe1bedda7f..eab5bd6a2442 100644 |
1908 |
+--- a/drivers/hid/usbhid/hid-core.c |
1909 |
++++ b/drivers/hid/usbhid/hid-core.c |
1910 |
+@@ -164,7 +164,7 @@ static void hid_io_error(struct hid_device *hid) |
1911 |
+ if (time_after(jiffies, usbhid->stop_retry)) { |
1912 |
+ |
1913 |
+ /* Retries failed, so do a port reset unless we lack bandwidth*/ |
1914 |
+- if (test_bit(HID_NO_BANDWIDTH, &usbhid->iofl) |
1915 |
++ if (!test_bit(HID_NO_BANDWIDTH, &usbhid->iofl) |
1916 |
+ && !test_and_set_bit(HID_RESET_PENDING, &usbhid->iofl)) { |
1917 |
+ |
1918 |
+ schedule_work(&usbhid->reset_work); |
1919 |
+diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c |
1920 |
+index 13ea1ea23328..bda69a4355fa 100644 |
1921 |
+--- a/drivers/iio/accel/mma8452.c |
1922 |
++++ b/drivers/iio/accel/mma8452.c |
1923 |
+@@ -229,7 +229,7 @@ static int mma8452_get_hp_filter_index(struct mma8452_data *data, |
1924 |
+ int i = mma8452_get_odr_index(data); |
1925 |
+ |
1926 |
+ return mma8452_get_int_plus_micros_index(mma8452_hp_filter_cutoff[i], |
1927 |
+- ARRAY_SIZE(mma8452_scales[0]), val, val2); |
1928 |
++ ARRAY_SIZE(mma8452_hp_filter_cutoff[0]), val, val2); |
1929 |
+ } |
1930 |
+ |
1931 |
+ static int mma8452_read_hp_filter(struct mma8452_data *data, int *hz, int *uHz) |
1932 |
+diff --git a/drivers/iio/gyro/Kconfig b/drivers/iio/gyro/Kconfig |
1933 |
+index b3d0e94f72eb..8d2439345673 100644 |
1934 |
+--- a/drivers/iio/gyro/Kconfig |
1935 |
++++ b/drivers/iio/gyro/Kconfig |
1936 |
+@@ -53,7 +53,8 @@ config ADXRS450 |
1937 |
+ config BMG160 |
1938 |
+ tristate "BOSCH BMG160 Gyro Sensor" |
1939 |
+ depends on I2C |
1940 |
+- select IIO_TRIGGERED_BUFFER if IIO_BUFFER |
1941 |
++ select IIO_BUFFER |
1942 |
++ select IIO_TRIGGERED_BUFFER |
1943 |
+ help |
1944 |
+ Say yes here to build support for Bosch BMG160 Tri-axis Gyro Sensor |
1945 |
+ driver. This driver also supports BMI055 gyroscope. |
1946 |
+diff --git a/drivers/iio/imu/adis16400_core.c b/drivers/iio/imu/adis16400_core.c |
1947 |
+index 2fd68f2219a7..d42e4fe2c7ed 100644 |
1948 |
+--- a/drivers/iio/imu/adis16400_core.c |
1949 |
++++ b/drivers/iio/imu/adis16400_core.c |
1950 |
+@@ -780,7 +780,7 @@ static struct adis16400_chip_info adis16400_chips[] = { |
1951 |
+ .flags = ADIS16400_HAS_PROD_ID | |
1952 |
+ ADIS16400_HAS_SERIAL_NUMBER | |
1953 |
+ ADIS16400_BURST_DIAG_STAT, |
1954 |
+- .gyro_scale_micro = IIO_DEGREE_TO_RAD(10000), /* 0.01 deg/s */ |
1955 |
++ .gyro_scale_micro = IIO_DEGREE_TO_RAD(40000), /* 0.04 deg/s */ |
1956 |
+ .accel_scale_micro = IIO_G_TO_M_S_2(833), /* 1/1200 g */ |
1957 |
+ .temp_scale_nano = 73860000, /* 0.07386 C */ |
1958 |
+ .temp_offset = 31000000 / 73860, /* 31 C = 0x00 */ |
1959 |
+diff --git a/drivers/iio/imu/adis16480.c b/drivers/iio/imu/adis16480.c |
1960 |
+index 989605dd6f78..b94bfd3f595b 100644 |
1961 |
+--- a/drivers/iio/imu/adis16480.c |
1962 |
++++ b/drivers/iio/imu/adis16480.c |
1963 |
+@@ -110,6 +110,10 @@ |
1964 |
+ struct adis16480_chip_info { |
1965 |
+ unsigned int num_channels; |
1966 |
+ const struct iio_chan_spec *channels; |
1967 |
++ unsigned int gyro_max_val; |
1968 |
++ unsigned int gyro_max_scale; |
1969 |
++ unsigned int accel_max_val; |
1970 |
++ unsigned int accel_max_scale; |
1971 |
+ }; |
1972 |
+ |
1973 |
+ struct adis16480 { |
1974 |
+@@ -497,19 +501,21 @@ static int adis16480_set_filter_freq(struct iio_dev *indio_dev, |
1975 |
+ static int adis16480_read_raw(struct iio_dev *indio_dev, |
1976 |
+ const struct iio_chan_spec *chan, int *val, int *val2, long info) |
1977 |
+ { |
1978 |
++ struct adis16480 *st = iio_priv(indio_dev); |
1979 |
++ |
1980 |
+ switch (info) { |
1981 |
+ case IIO_CHAN_INFO_RAW: |
1982 |
+ return adis_single_conversion(indio_dev, chan, 0, val); |
1983 |
+ case IIO_CHAN_INFO_SCALE: |
1984 |
+ switch (chan->type) { |
1985 |
+ case IIO_ANGL_VEL: |
1986 |
+- *val = 0; |
1987 |
+- *val2 = IIO_DEGREE_TO_RAD(20000); /* 0.02 degree/sec */ |
1988 |
+- return IIO_VAL_INT_PLUS_MICRO; |
1989 |
++ *val = st->chip_info->gyro_max_scale; |
1990 |
++ *val2 = st->chip_info->gyro_max_val; |
1991 |
++ return IIO_VAL_FRACTIONAL; |
1992 |
+ case IIO_ACCEL: |
1993 |
+- *val = 0; |
1994 |
+- *val2 = IIO_G_TO_M_S_2(800); /* 0.8 mg */ |
1995 |
+- return IIO_VAL_INT_PLUS_MICRO; |
1996 |
++ *val = st->chip_info->accel_max_scale; |
1997 |
++ *val2 = st->chip_info->accel_max_val; |
1998 |
++ return IIO_VAL_FRACTIONAL; |
1999 |
+ case IIO_MAGN: |
2000 |
+ *val = 0; |
2001 |
+ *val2 = 100; /* 0.0001 gauss */ |
2002 |
+@@ -674,18 +680,39 @@ static const struct adis16480_chip_info adis16480_chip_info[] = { |
2003 |
+ [ADIS16375] = { |
2004 |
+ .channels = adis16485_channels, |
2005 |
+ .num_channels = ARRAY_SIZE(adis16485_channels), |
2006 |
++ /* |
2007 |
++ * storing the value in rad/degree and the scale in degree |
2008 |
++ * gives us the result in rad and better precession than |
2009 |
++ * storing the scale directly in rad. |
2010 |
++ */ |
2011 |
++ .gyro_max_val = IIO_RAD_TO_DEGREE(22887), |
2012 |
++ .gyro_max_scale = 300, |
2013 |
++ .accel_max_val = IIO_M_S_2_TO_G(21973), |
2014 |
++ .accel_max_scale = 18, |
2015 |
+ }, |
2016 |
+ [ADIS16480] = { |
2017 |
+ .channels = adis16480_channels, |
2018 |
+ .num_channels = ARRAY_SIZE(adis16480_channels), |
2019 |
++ .gyro_max_val = IIO_RAD_TO_DEGREE(22500), |
2020 |
++ .gyro_max_scale = 450, |
2021 |
++ .accel_max_val = IIO_M_S_2_TO_G(12500), |
2022 |
++ .accel_max_scale = 5, |
2023 |
+ }, |
2024 |
+ [ADIS16485] = { |
2025 |
+ .channels = adis16485_channels, |
2026 |
+ .num_channels = ARRAY_SIZE(adis16485_channels), |
2027 |
++ .gyro_max_val = IIO_RAD_TO_DEGREE(22500), |
2028 |
++ .gyro_max_scale = 450, |
2029 |
++ .accel_max_val = IIO_M_S_2_TO_G(20000), |
2030 |
++ .accel_max_scale = 5, |
2031 |
+ }, |
2032 |
+ [ADIS16488] = { |
2033 |
+ .channels = adis16480_channels, |
2034 |
+ .num_channels = ARRAY_SIZE(adis16480_channels), |
2035 |
++ .gyro_max_val = IIO_RAD_TO_DEGREE(22500), |
2036 |
++ .gyro_max_scale = 450, |
2037 |
++ .accel_max_val = IIO_M_S_2_TO_G(22500), |
2038 |
++ .accel_max_scale = 18, |
2039 |
+ }, |
2040 |
+ }; |
2041 |
+ |
2042 |
+diff --git a/drivers/iio/industrialio-buffer.c b/drivers/iio/industrialio-buffer.c |
2043 |
+index 6eee1b044c60..b3fda9ee4174 100644 |
2044 |
+--- a/drivers/iio/industrialio-buffer.c |
2045 |
++++ b/drivers/iio/industrialio-buffer.c |
2046 |
+@@ -151,7 +151,7 @@ unsigned int iio_buffer_poll(struct file *filp, |
2047 |
+ struct iio_buffer *rb = indio_dev->buffer; |
2048 |
+ |
2049 |
+ if (!indio_dev->info) |
2050 |
+- return -ENODEV; |
2051 |
++ return 0; |
2052 |
+ |
2053 |
+ poll_wait(filp, &rb->pollq, wait); |
2054 |
+ if (iio_buffer_ready(indio_dev, rb, rb->watermark, 0)) |
2055 |
+diff --git a/drivers/iio/industrialio-event.c b/drivers/iio/industrialio-event.c |
2056 |
+index 894d8137c4cf..52d4fcb0de1d 100644 |
2057 |
+--- a/drivers/iio/industrialio-event.c |
2058 |
++++ b/drivers/iio/industrialio-event.c |
2059 |
+@@ -84,7 +84,7 @@ static unsigned int iio_event_poll(struct file *filep, |
2060 |
+ unsigned int events = 0; |
2061 |
+ |
2062 |
+ if (!indio_dev->info) |
2063 |
+- return -ENODEV; |
2064 |
++ return events; |
2065 |
+ |
2066 |
+ poll_wait(filep, &ev_int->wait, wait); |
2067 |
+ |
2068 |
+diff --git a/drivers/md/dm-cache-target.c b/drivers/md/dm-cache-target.c |
2069 |
+index 1fe93cfea7d3..9d0672b58c31 100644 |
2070 |
+--- a/drivers/md/dm-cache-target.c |
2071 |
++++ b/drivers/md/dm-cache-target.c |
2072 |
+@@ -1729,6 +1729,8 @@ static void remap_cell_to_origin_clear_discard(struct cache *cache, |
2073 |
+ remap_to_origin(cache, bio); |
2074 |
+ issue(cache, bio); |
2075 |
+ } |
2076 |
++ |
2077 |
++ free_prison_cell(cache, cell); |
2078 |
+ } |
2079 |
+ |
2080 |
+ static void remap_cell_to_cache_dirty(struct cache *cache, struct dm_bio_prison_cell *cell, |
2081 |
+@@ -1763,6 +1765,8 @@ static void remap_cell_to_cache_dirty(struct cache *cache, struct dm_bio_prison_ |
2082 |
+ remap_to_cache(cache, bio, cblock); |
2083 |
+ issue(cache, bio); |
2084 |
+ } |
2085 |
++ |
2086 |
++ free_prison_cell(cache, cell); |
2087 |
+ } |
2088 |
+ |
2089 |
+ /*----------------------------------------------------------------*/ |
2090 |
+diff --git a/drivers/md/dm-stats.c b/drivers/md/dm-stats.c |
2091 |
+index 8a8b48fa901a..8289804ccd99 100644 |
2092 |
+--- a/drivers/md/dm-stats.c |
2093 |
++++ b/drivers/md/dm-stats.c |
2094 |
+@@ -457,12 +457,24 @@ static int dm_stats_list(struct dm_stats *stats, const char *program, |
2095 |
+ list_for_each_entry(s, &stats->list, list_entry) { |
2096 |
+ if (!program || !strcmp(program, s->program_id)) { |
2097 |
+ len = s->end - s->start; |
2098 |
+- DMEMIT("%d: %llu+%llu %llu %s %s\n", s->id, |
2099 |
++ DMEMIT("%d: %llu+%llu %llu %s %s", s->id, |
2100 |
+ (unsigned long long)s->start, |
2101 |
+ (unsigned long long)len, |
2102 |
+ (unsigned long long)s->step, |
2103 |
+ s->program_id, |
2104 |
+ s->aux_data); |
2105 |
++ if (s->stat_flags & STAT_PRECISE_TIMESTAMPS) |
2106 |
++ DMEMIT(" precise_timestamps"); |
2107 |
++ if (s->n_histogram_entries) { |
2108 |
++ unsigned i; |
2109 |
++ DMEMIT(" histogram:"); |
2110 |
++ for (i = 0; i < s->n_histogram_entries; i++) { |
2111 |
++ if (i) |
2112 |
++ DMEMIT(","); |
2113 |
++ DMEMIT("%llu", s->histogram_boundaries[i]); |
2114 |
++ } |
2115 |
++ } |
2116 |
++ DMEMIT("\n"); |
2117 |
+ } |
2118 |
+ } |
2119 |
+ mutex_unlock(&stats->mutex); |
2120 |
+diff --git a/drivers/of/address.c b/drivers/of/address.c |
2121 |
+index 8bfda6ade2c0..384574c3987c 100644 |
2122 |
+--- a/drivers/of/address.c |
2123 |
++++ b/drivers/of/address.c |
2124 |
+@@ -845,10 +845,10 @@ struct device_node *of_find_matching_node_by_address(struct device_node *from, |
2125 |
+ struct resource res; |
2126 |
+ |
2127 |
+ while (dn) { |
2128 |
+- if (of_address_to_resource(dn, 0, &res)) |
2129 |
+- continue; |
2130 |
+- if (res.start == base_address) |
2131 |
++ if (!of_address_to_resource(dn, 0, &res) && |
2132 |
++ res.start == base_address) |
2133 |
+ return dn; |
2134 |
++ |
2135 |
+ dn = of_find_matching_node(dn, matches); |
2136 |
+ } |
2137 |
+ |
2138 |
+diff --git a/drivers/pci/access.c b/drivers/pci/access.c |
2139 |
+index d9b64a175990..b965c12168b7 100644 |
2140 |
+--- a/drivers/pci/access.c |
2141 |
++++ b/drivers/pci/access.c |
2142 |
+@@ -439,6 +439,56 @@ static const struct pci_vpd_ops pci_vpd_pci22_ops = { |
2143 |
+ .release = pci_vpd_pci22_release, |
2144 |
+ }; |
2145 |
+ |
2146 |
++static ssize_t pci_vpd_f0_read(struct pci_dev *dev, loff_t pos, size_t count, |
2147 |
++ void *arg) |
2148 |
++{ |
2149 |
++ struct pci_dev *tdev = pci_get_slot(dev->bus, PCI_SLOT(dev->devfn)); |
2150 |
++ ssize_t ret; |
2151 |
++ |
2152 |
++ if (!tdev) |
2153 |
++ return -ENODEV; |
2154 |
++ |
2155 |
++ ret = pci_read_vpd(tdev, pos, count, arg); |
2156 |
++ pci_dev_put(tdev); |
2157 |
++ return ret; |
2158 |
++} |
2159 |
++ |
2160 |
++static ssize_t pci_vpd_f0_write(struct pci_dev *dev, loff_t pos, size_t count, |
2161 |
++ const void *arg) |
2162 |
++{ |
2163 |
++ struct pci_dev *tdev = pci_get_slot(dev->bus, PCI_SLOT(dev->devfn)); |
2164 |
++ ssize_t ret; |
2165 |
++ |
2166 |
++ if (!tdev) |
2167 |
++ return -ENODEV; |
2168 |
++ |
2169 |
++ ret = pci_write_vpd(tdev, pos, count, arg); |
2170 |
++ pci_dev_put(tdev); |
2171 |
++ return ret; |
2172 |
++} |
2173 |
++ |
2174 |
++static const struct pci_vpd_ops pci_vpd_f0_ops = { |
2175 |
++ .read = pci_vpd_f0_read, |
2176 |
++ .write = pci_vpd_f0_write, |
2177 |
++ .release = pci_vpd_pci22_release, |
2178 |
++}; |
2179 |
++ |
2180 |
++static int pci_vpd_f0_dev_check(struct pci_dev *dev) |
2181 |
++{ |
2182 |
++ struct pci_dev *tdev = pci_get_slot(dev->bus, PCI_SLOT(dev->devfn)); |
2183 |
++ int ret = 0; |
2184 |
++ |
2185 |
++ if (!tdev) |
2186 |
++ return -ENODEV; |
2187 |
++ if (!tdev->vpd || !tdev->multifunction || |
2188 |
++ dev->class != tdev->class || dev->vendor != tdev->vendor || |
2189 |
++ dev->device != tdev->device) |
2190 |
++ ret = -ENODEV; |
2191 |
++ |
2192 |
++ pci_dev_put(tdev); |
2193 |
++ return ret; |
2194 |
++} |
2195 |
++ |
2196 |
+ int pci_vpd_pci22_init(struct pci_dev *dev) |
2197 |
+ { |
2198 |
+ struct pci_vpd_pci22 *vpd; |
2199 |
+@@ -447,12 +497,21 @@ int pci_vpd_pci22_init(struct pci_dev *dev) |
2200 |
+ cap = pci_find_capability(dev, PCI_CAP_ID_VPD); |
2201 |
+ if (!cap) |
2202 |
+ return -ENODEV; |
2203 |
++ if (dev->dev_flags & PCI_DEV_FLAGS_VPD_REF_F0) { |
2204 |
++ int ret = pci_vpd_f0_dev_check(dev); |
2205 |
++ |
2206 |
++ if (ret) |
2207 |
++ return ret; |
2208 |
++ } |
2209 |
+ vpd = kzalloc(sizeof(*vpd), GFP_ATOMIC); |
2210 |
+ if (!vpd) |
2211 |
+ return -ENOMEM; |
2212 |
+ |
2213 |
+ vpd->base.len = PCI_VPD_PCI22_SIZE; |
2214 |
+- vpd->base.ops = &pci_vpd_pci22_ops; |
2215 |
++ if (dev->dev_flags & PCI_DEV_FLAGS_VPD_REF_F0) |
2216 |
++ vpd->base.ops = &pci_vpd_f0_ops; |
2217 |
++ else |
2218 |
++ vpd->base.ops = &pci_vpd_pci22_ops; |
2219 |
+ mutex_init(&vpd->lock); |
2220 |
+ vpd->cap = cap; |
2221 |
+ vpd->busy = false; |
2222 |
+diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c |
2223 |
+index e9fd0e90fa3b..dbd13854f21e 100644 |
2224 |
+--- a/drivers/pci/quirks.c |
2225 |
++++ b/drivers/pci/quirks.c |
2226 |
+@@ -1569,6 +1569,18 @@ DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB3 |
2227 |
+ |
2228 |
+ #endif |
2229 |
+ |
2230 |
++static void quirk_jmicron_async_suspend(struct pci_dev *dev) |
2231 |
++{ |
2232 |
++ if (dev->multifunction) { |
2233 |
++ device_disable_async_suspend(&dev->dev); |
2234 |
++ dev_info(&dev->dev, "async suspend disabled to avoid multi-function power-on ordering issue\n"); |
2235 |
++ } |
2236 |
++} |
2237 |
++DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE, 8, quirk_jmicron_async_suspend); |
2238 |
++DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_CLASS_STORAGE_SATA_AHCI, 0, quirk_jmicron_async_suspend); |
2239 |
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_JMICRON, 0x2362, quirk_jmicron_async_suspend); |
2240 |
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_JMICRON, 0x236f, quirk_jmicron_async_suspend); |
2241 |
++ |
2242 |
+ #ifdef CONFIG_X86_IO_APIC |
2243 |
+ static void quirk_alder_ioapic(struct pci_dev *pdev) |
2244 |
+ { |
2245 |
+@@ -1894,6 +1906,15 @@ static void quirk_netmos(struct pci_dev *dev) |
2246 |
+ DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_NETMOS, PCI_ANY_ID, |
2247 |
+ PCI_CLASS_COMMUNICATION_SERIAL, 8, quirk_netmos); |
2248 |
+ |
2249 |
++static void quirk_f0_vpd_link(struct pci_dev *dev) |
2250 |
++{ |
2251 |
++ if (!dev->multifunction || !PCI_FUNC(dev->devfn)) |
2252 |
++ return; |
2253 |
++ dev->dev_flags |= PCI_DEV_FLAGS_VPD_REF_F0; |
2254 |
++} |
2255 |
++DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, |
2256 |
++ PCI_CLASS_NETWORK_ETHERNET, 8, quirk_f0_vpd_link); |
2257 |
++ |
2258 |
+ static void quirk_e100_interrupt(struct pci_dev *dev) |
2259 |
+ { |
2260 |
+ u16 command, pmcsr; |
2261 |
+@@ -2829,12 +2850,15 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x3c28, vtd_mask_spec_errors); |
2262 |
+ |
2263 |
+ static void fixup_ti816x_class(struct pci_dev *dev) |
2264 |
+ { |
2265 |
++ u32 class = dev->class; |
2266 |
++ |
2267 |
+ /* TI 816x devices do not have class code set when in PCIe boot mode */ |
2268 |
+- dev_info(&dev->dev, "Setting PCI class for 816x PCIe device\n"); |
2269 |
+- dev->class = PCI_CLASS_MULTIMEDIA_VIDEO; |
2270 |
++ dev->class = PCI_CLASS_MULTIMEDIA_VIDEO << 8; |
2271 |
++ dev_info(&dev->dev, "PCI class overridden (%#08x -> %#08x)\n", |
2272 |
++ class, dev->class); |
2273 |
+ } |
2274 |
+ DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_TI, 0xb800, |
2275 |
+- PCI_CLASS_NOT_DEFINED, 0, fixup_ti816x_class); |
2276 |
++ PCI_CLASS_NOT_DEFINED, 0, fixup_ti816x_class); |
2277 |
+ |
2278 |
+ /* Some PCIe devices do not work reliably with the claimed maximum |
2279 |
+ * payload size supported. |
2280 |
+diff --git a/drivers/regulator/pbias-regulator.c b/drivers/regulator/pbias-regulator.c |
2281 |
+index bd2b75c0d1d1..4fa7bcaf454e 100644 |
2282 |
+--- a/drivers/regulator/pbias-regulator.c |
2283 |
++++ b/drivers/regulator/pbias-regulator.c |
2284 |
+@@ -30,6 +30,7 @@ |
2285 |
+ struct pbias_reg_info { |
2286 |
+ u32 enable; |
2287 |
+ u32 enable_mask; |
2288 |
++ u32 disable_val; |
2289 |
+ u32 vmode; |
2290 |
+ unsigned int enable_time; |
2291 |
+ char *name; |
2292 |
+@@ -62,6 +63,7 @@ static const struct pbias_reg_info pbias_mmc_omap2430 = { |
2293 |
+ .enable = BIT(1), |
2294 |
+ .enable_mask = BIT(1), |
2295 |
+ .vmode = BIT(0), |
2296 |
++ .disable_val = 0, |
2297 |
+ .enable_time = 100, |
2298 |
+ .name = "pbias_mmc_omap2430" |
2299 |
+ }; |
2300 |
+@@ -77,6 +79,7 @@ static const struct pbias_reg_info pbias_sim_omap3 = { |
2301 |
+ static const struct pbias_reg_info pbias_mmc_omap4 = { |
2302 |
+ .enable = BIT(26) | BIT(22), |
2303 |
+ .enable_mask = BIT(26) | BIT(25) | BIT(22), |
2304 |
++ .disable_val = BIT(25), |
2305 |
+ .vmode = BIT(21), |
2306 |
+ .enable_time = 100, |
2307 |
+ .name = "pbias_mmc_omap4" |
2308 |
+@@ -85,6 +88,7 @@ static const struct pbias_reg_info pbias_mmc_omap4 = { |
2309 |
+ static const struct pbias_reg_info pbias_mmc_omap5 = { |
2310 |
+ .enable = BIT(27) | BIT(26), |
2311 |
+ .enable_mask = BIT(27) | BIT(25) | BIT(26), |
2312 |
++ .disable_val = BIT(25), |
2313 |
+ .vmode = BIT(21), |
2314 |
+ .enable_time = 100, |
2315 |
+ .name = "pbias_mmc_omap5" |
2316 |
+@@ -159,6 +163,7 @@ static int pbias_regulator_probe(struct platform_device *pdev) |
2317 |
+ drvdata[data_idx].desc.enable_reg = res->start; |
2318 |
+ drvdata[data_idx].desc.enable_mask = info->enable_mask; |
2319 |
+ drvdata[data_idx].desc.enable_val = info->enable; |
2320 |
++ drvdata[data_idx].desc.disable_val = info->disable_val; |
2321 |
+ |
2322 |
+ cfg.init_data = pbias_matches[idx].init_data; |
2323 |
+ cfg.driver_data = &drvdata[data_idx]; |
2324 |
+diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c |
2325 |
+index 75d0457a77b7..fa7036c4daf9 100644 |
2326 |
+--- a/drivers/soc/tegra/pmc.c |
2327 |
++++ b/drivers/soc/tegra/pmc.c |
2328 |
+@@ -736,12 +736,12 @@ void tegra_pmc_init_tsense_reset(struct tegra_pmc *pmc) |
2329 |
+ u32 value, checksum; |
2330 |
+ |
2331 |
+ if (!pmc->soc->has_tsense_reset) |
2332 |
+- goto out; |
2333 |
++ return; |
2334 |
+ |
2335 |
+ np = of_find_node_by_name(pmc->dev->of_node, "i2c-thermtrip"); |
2336 |
+ if (!np) { |
2337 |
+ dev_warn(dev, "i2c-thermtrip node not found, %s.\n", disabled); |
2338 |
+- goto out; |
2339 |
++ return; |
2340 |
+ } |
2341 |
+ |
2342 |
+ if (of_property_read_u32(np, "nvidia,i2c-controller-id", &ctrl_id)) { |
2343 |
+diff --git a/drivers/spi/spi-bcm2835.c b/drivers/spi/spi-bcm2835.c |
2344 |
+index 59705ab23577..c9357bb393d3 100644 |
2345 |
+--- a/drivers/spi/spi-bcm2835.c |
2346 |
++++ b/drivers/spi/spi-bcm2835.c |
2347 |
+@@ -553,13 +553,11 @@ static int bcm2835_spi_transfer_one(struct spi_master *master, |
2348 |
+ spi_used_hz = cdiv ? (clk_hz / cdiv) : (clk_hz / 65536); |
2349 |
+ bcm2835_wr(bs, BCM2835_SPI_CLK, cdiv); |
2350 |
+ |
2351 |
+- /* handle all the modes */ |
2352 |
++ /* handle all the 3-wire mode */ |
2353 |
+ if ((spi->mode & SPI_3WIRE) && (tfr->rx_buf)) |
2354 |
+ cs |= BCM2835_SPI_CS_REN; |
2355 |
+- if (spi->mode & SPI_CPOL) |
2356 |
+- cs |= BCM2835_SPI_CS_CPOL; |
2357 |
+- if (spi->mode & SPI_CPHA) |
2358 |
+- cs |= BCM2835_SPI_CS_CPHA; |
2359 |
++ else |
2360 |
++ cs &= ~BCM2835_SPI_CS_REN; |
2361 |
+ |
2362 |
+ /* for gpio_cs set dummy CS so that no HW-CS get changed |
2363 |
+ * we can not run this in bcm2835_spi_set_cs, as it does |
2364 |
+@@ -592,6 +590,25 @@ static int bcm2835_spi_transfer_one(struct spi_master *master, |
2365 |
+ return bcm2835_spi_transfer_one_irq(master, spi, tfr, cs); |
2366 |
+ } |
2367 |
+ |
2368 |
++static int bcm2835_spi_prepare_message(struct spi_master *master, |
2369 |
++ struct spi_message *msg) |
2370 |
++{ |
2371 |
++ struct spi_device *spi = msg->spi; |
2372 |
++ struct bcm2835_spi *bs = spi_master_get_devdata(master); |
2373 |
++ u32 cs = bcm2835_rd(bs, BCM2835_SPI_CS); |
2374 |
++ |
2375 |
++ cs &= ~(BCM2835_SPI_CS_CPOL | BCM2835_SPI_CS_CPHA); |
2376 |
++ |
2377 |
++ if (spi->mode & SPI_CPOL) |
2378 |
++ cs |= BCM2835_SPI_CS_CPOL; |
2379 |
++ if (spi->mode & SPI_CPHA) |
2380 |
++ cs |= BCM2835_SPI_CS_CPHA; |
2381 |
++ |
2382 |
++ bcm2835_wr(bs, BCM2835_SPI_CS, cs); |
2383 |
++ |
2384 |
++ return 0; |
2385 |
++} |
2386 |
++ |
2387 |
+ static void bcm2835_spi_handle_err(struct spi_master *master, |
2388 |
+ struct spi_message *msg) |
2389 |
+ { |
2390 |
+@@ -739,6 +756,7 @@ static int bcm2835_spi_probe(struct platform_device *pdev) |
2391 |
+ master->set_cs = bcm2835_spi_set_cs; |
2392 |
+ master->transfer_one = bcm2835_spi_transfer_one; |
2393 |
+ master->handle_err = bcm2835_spi_handle_err; |
2394 |
++ master->prepare_message = bcm2835_spi_prepare_message; |
2395 |
+ master->dev.of_node = pdev->dev.of_node; |
2396 |
+ |
2397 |
+ bs = spi_master_get_devdata(master); |
2398 |
+diff --git a/drivers/spi/spi-bitbang-txrx.h b/drivers/spi/spi-bitbang-txrx.h |
2399 |
+index 06b34e5bcfa3..47bb9b898dfd 100644 |
2400 |
+--- a/drivers/spi/spi-bitbang-txrx.h |
2401 |
++++ b/drivers/spi/spi-bitbang-txrx.h |
2402 |
+@@ -49,7 +49,7 @@ bitbang_txrx_be_cpha0(struct spi_device *spi, |
2403 |
+ { |
2404 |
+ /* if (cpol == 0) this is SPI_MODE_0; else this is SPI_MODE_2 */ |
2405 |
+ |
2406 |
+- bool oldbit = !(word & 1); |
2407 |
++ u32 oldbit = (!(word & (1<<(bits-1)))) << 31; |
2408 |
+ /* clock starts at inactive polarity */ |
2409 |
+ for (word <<= (32 - bits); likely(bits); bits--) { |
2410 |
+ |
2411 |
+@@ -81,7 +81,7 @@ bitbang_txrx_be_cpha1(struct spi_device *spi, |
2412 |
+ { |
2413 |
+ /* if (cpol == 0) this is SPI_MODE_1; else this is SPI_MODE_3 */ |
2414 |
+ |
2415 |
+- bool oldbit = !(word & (1 << 31)); |
2416 |
++ u32 oldbit = (!(word & (1<<(bits-1)))) << 31; |
2417 |
+ /* clock starts at inactive polarity */ |
2418 |
+ for (word <<= (32 - bits); likely(bits); bits--) { |
2419 |
+ |
2420 |
+diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c |
2421 |
+index eb03e1215195..7edede6e024b 100644 |
2422 |
+--- a/drivers/spi/spi-dw-mmio.c |
2423 |
++++ b/drivers/spi/spi-dw-mmio.c |
2424 |
+@@ -74,6 +74,9 @@ static int dw_spi_mmio_probe(struct platform_device *pdev) |
2425 |
+ |
2426 |
+ dws->max_freq = clk_get_rate(dwsmmio->clk); |
2427 |
+ |
2428 |
++ of_property_read_u32(pdev->dev.of_node, "reg-io-width", |
2429 |
++ &dws->reg_io_width); |
2430 |
++ |
2431 |
+ num_cs = 4; |
2432 |
+ |
2433 |
+ if (pdev->dev.of_node) |
2434 |
+diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c |
2435 |
+index 8d67d03c71eb..4fbfcdc5cb24 100644 |
2436 |
+--- a/drivers/spi/spi-dw.c |
2437 |
++++ b/drivers/spi/spi-dw.c |
2438 |
+@@ -194,7 +194,7 @@ static void dw_writer(struct dw_spi *dws) |
2439 |
+ else |
2440 |
+ txw = *(u16 *)(dws->tx); |
2441 |
+ } |
2442 |
+- dw_writel(dws, DW_SPI_DR, txw); |
2443 |
++ dw_write_io_reg(dws, DW_SPI_DR, txw); |
2444 |
+ dws->tx += dws->n_bytes; |
2445 |
+ } |
2446 |
+ } |
2447 |
+@@ -205,7 +205,7 @@ static void dw_reader(struct dw_spi *dws) |
2448 |
+ u16 rxw; |
2449 |
+ |
2450 |
+ while (max--) { |
2451 |
+- rxw = dw_readl(dws, DW_SPI_DR); |
2452 |
++ rxw = dw_read_io_reg(dws, DW_SPI_DR); |
2453 |
+ /* Care rx only if the transfer's original "rx" is not null */ |
2454 |
+ if (dws->rx_end - dws->len) { |
2455 |
+ if (dws->n_bytes == 1) |
2456 |
+diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h |
2457 |
+index 6c91391c1a4f..b75ed327d5a2 100644 |
2458 |
+--- a/drivers/spi/spi-dw.h |
2459 |
++++ b/drivers/spi/spi-dw.h |
2460 |
+@@ -109,6 +109,7 @@ struct dw_spi { |
2461 |
+ u32 fifo_len; /* depth of the FIFO buffer */ |
2462 |
+ u32 max_freq; /* max bus freq supported */ |
2463 |
+ |
2464 |
++ u32 reg_io_width; /* DR I/O width in bytes */ |
2465 |
+ u16 bus_num; |
2466 |
+ u16 num_cs; /* supported slave numbers */ |
2467 |
+ |
2468 |
+@@ -145,11 +146,45 @@ static inline u32 dw_readl(struct dw_spi *dws, u32 offset) |
2469 |
+ return __raw_readl(dws->regs + offset); |
2470 |
+ } |
2471 |
+ |
2472 |
++static inline u16 dw_readw(struct dw_spi *dws, u32 offset) |
2473 |
++{ |
2474 |
++ return __raw_readw(dws->regs + offset); |
2475 |
++} |
2476 |
++ |
2477 |
+ static inline void dw_writel(struct dw_spi *dws, u32 offset, u32 val) |
2478 |
+ { |
2479 |
+ __raw_writel(val, dws->regs + offset); |
2480 |
+ } |
2481 |
+ |
2482 |
++static inline void dw_writew(struct dw_spi *dws, u32 offset, u16 val) |
2483 |
++{ |
2484 |
++ __raw_writew(val, dws->regs + offset); |
2485 |
++} |
2486 |
++ |
2487 |
++static inline u32 dw_read_io_reg(struct dw_spi *dws, u32 offset) |
2488 |
++{ |
2489 |
++ switch (dws->reg_io_width) { |
2490 |
++ case 2: |
2491 |
++ return dw_readw(dws, offset); |
2492 |
++ case 4: |
2493 |
++ default: |
2494 |
++ return dw_readl(dws, offset); |
2495 |
++ } |
2496 |
++} |
2497 |
++ |
2498 |
++static inline void dw_write_io_reg(struct dw_spi *dws, u32 offset, u32 val) |
2499 |
++{ |
2500 |
++ switch (dws->reg_io_width) { |
2501 |
++ case 2: |
2502 |
++ dw_writew(dws, offset, val); |
2503 |
++ break; |
2504 |
++ case 4: |
2505 |
++ default: |
2506 |
++ dw_writel(dws, offset, val); |
2507 |
++ break; |
2508 |
++ } |
2509 |
++} |
2510 |
++ |
2511 |
+ static inline void spi_enable_chip(struct dw_spi *dws, int enable) |
2512 |
+ { |
2513 |
+ dw_writel(dws, DW_SPI_SSIENR, (enable ? 1 : 0)); |
2514 |
+diff --git a/drivers/spi/spi-img-spfi.c b/drivers/spi/spi-img-spfi.c |
2515 |
+index acce90ac7371..bb916c8d40db 100644 |
2516 |
+--- a/drivers/spi/spi-img-spfi.c |
2517 |
++++ b/drivers/spi/spi-img-spfi.c |
2518 |
+@@ -105,6 +105,10 @@ struct img_spfi { |
2519 |
+ bool rx_dma_busy; |
2520 |
+ }; |
2521 |
+ |
2522 |
++struct img_spfi_device_data { |
2523 |
++ bool gpio_requested; |
2524 |
++}; |
2525 |
++ |
2526 |
+ static inline u32 spfi_readl(struct img_spfi *spfi, u32 reg) |
2527 |
+ { |
2528 |
+ return readl(spfi->regs + reg); |
2529 |
+@@ -267,15 +271,15 @@ static int img_spfi_start_pio(struct spi_master *master, |
2530 |
+ cpu_relax(); |
2531 |
+ } |
2532 |
+ |
2533 |
+- ret = spfi_wait_all_done(spfi); |
2534 |
+- if (ret < 0) |
2535 |
+- return ret; |
2536 |
+- |
2537 |
+ if (rx_bytes > 0 || tx_bytes > 0) { |
2538 |
+ dev_err(spfi->dev, "PIO transfer timed out\n"); |
2539 |
+ return -ETIMEDOUT; |
2540 |
+ } |
2541 |
+ |
2542 |
++ ret = spfi_wait_all_done(spfi); |
2543 |
++ if (ret < 0) |
2544 |
++ return ret; |
2545 |
++ |
2546 |
+ return 0; |
2547 |
+ } |
2548 |
+ |
2549 |
+@@ -440,21 +444,50 @@ static int img_spfi_unprepare(struct spi_master *master, |
2550 |
+ |
2551 |
+ static int img_spfi_setup(struct spi_device *spi) |
2552 |
+ { |
2553 |
+- int ret; |
2554 |
+- |
2555 |
+- ret = gpio_request_one(spi->cs_gpio, (spi->mode & SPI_CS_HIGH) ? |
2556 |
+- GPIOF_OUT_INIT_LOW : GPIOF_OUT_INIT_HIGH, |
2557 |
+- dev_name(&spi->dev)); |
2558 |
+- if (ret) |
2559 |
+- dev_err(&spi->dev, "can't request chipselect gpio %d\n", |
2560 |
++ int ret = -EINVAL; |
2561 |
++ struct img_spfi_device_data *spfi_data = spi_get_ctldata(spi); |
2562 |
++ |
2563 |
++ if (!spfi_data) { |
2564 |
++ spfi_data = kzalloc(sizeof(*spfi_data), GFP_KERNEL); |
2565 |
++ if (!spfi_data) |
2566 |
++ return -ENOMEM; |
2567 |
++ spfi_data->gpio_requested = false; |
2568 |
++ spi_set_ctldata(spi, spfi_data); |
2569 |
++ } |
2570 |
++ if (!spfi_data->gpio_requested) { |
2571 |
++ ret = gpio_request_one(spi->cs_gpio, |
2572 |
++ (spi->mode & SPI_CS_HIGH) ? |
2573 |
++ GPIOF_OUT_INIT_LOW : GPIOF_OUT_INIT_HIGH, |
2574 |
++ dev_name(&spi->dev)); |
2575 |
++ if (ret) |
2576 |
++ dev_err(&spi->dev, "can't request chipselect gpio %d\n", |
2577 |
+ spi->cs_gpio); |
2578 |
+- |
2579 |
++ else |
2580 |
++ spfi_data->gpio_requested = true; |
2581 |
++ } else { |
2582 |
++ if (gpio_is_valid(spi->cs_gpio)) { |
2583 |
++ int mode = ((spi->mode & SPI_CS_HIGH) ? |
2584 |
++ GPIOF_OUT_INIT_LOW : GPIOF_OUT_INIT_HIGH); |
2585 |
++ |
2586 |
++ ret = gpio_direction_output(spi->cs_gpio, mode); |
2587 |
++ if (ret) |
2588 |
++ dev_err(&spi->dev, "chipselect gpio %d setup failed (%d)\n", |
2589 |
++ spi->cs_gpio, ret); |
2590 |
++ } |
2591 |
++ } |
2592 |
+ return ret; |
2593 |
+ } |
2594 |
+ |
2595 |
+ static void img_spfi_cleanup(struct spi_device *spi) |
2596 |
+ { |
2597 |
+- gpio_free(spi->cs_gpio); |
2598 |
++ struct img_spfi_device_data *spfi_data = spi_get_ctldata(spi); |
2599 |
++ |
2600 |
++ if (spfi_data) { |
2601 |
++ if (spfi_data->gpio_requested) |
2602 |
++ gpio_free(spi->cs_gpio); |
2603 |
++ kfree(spfi_data); |
2604 |
++ spi_set_ctldata(spi, NULL); |
2605 |
++ } |
2606 |
+ } |
2607 |
+ |
2608 |
+ static void img_spfi_config(struct spi_master *master, struct spi_device *spi, |
2609 |
+diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c |
2610 |
+index 58673841286c..3d09e0b69b73 100644 |
2611 |
+--- a/drivers/spi/spi-omap2-mcspi.c |
2612 |
++++ b/drivers/spi/spi-omap2-mcspi.c |
2613 |
+@@ -245,6 +245,7 @@ static void omap2_mcspi_set_enable(const struct spi_device *spi, int enable) |
2614 |
+ |
2615 |
+ static void omap2_mcspi_set_cs(struct spi_device *spi, bool enable) |
2616 |
+ { |
2617 |
++ struct omap2_mcspi *mcspi = spi_master_get_devdata(spi->master); |
2618 |
+ u32 l; |
2619 |
+ |
2620 |
+ /* The controller handles the inverted chip selects |
2621 |
+@@ -255,6 +256,12 @@ static void omap2_mcspi_set_cs(struct spi_device *spi, bool enable) |
2622 |
+ enable = !enable; |
2623 |
+ |
2624 |
+ if (spi->controller_state) { |
2625 |
++ int err = pm_runtime_get_sync(mcspi->dev); |
2626 |
++ if (err < 0) { |
2627 |
++ dev_err(mcspi->dev, "failed to get sync: %d\n", err); |
2628 |
++ return; |
2629 |
++ } |
2630 |
++ |
2631 |
+ l = mcspi_cached_chconf0(spi); |
2632 |
+ |
2633 |
+ if (enable) |
2634 |
+@@ -263,6 +270,9 @@ static void omap2_mcspi_set_cs(struct spi_device *spi, bool enable) |
2635 |
+ l |= OMAP2_MCSPI_CHCONF_FORCE; |
2636 |
+ |
2637 |
+ mcspi_write_chconf0(spi, l); |
2638 |
++ |
2639 |
++ pm_runtime_mark_last_busy(mcspi->dev); |
2640 |
++ pm_runtime_put_autosuspend(mcspi->dev); |
2641 |
+ } |
2642 |
+ } |
2643 |
+ |
2644 |
+diff --git a/drivers/spi/spi-orion.c b/drivers/spi/spi-orion.c |
2645 |
+index 8cad107a5b3f..a87cfd4ba17b 100644 |
2646 |
+--- a/drivers/spi/spi-orion.c |
2647 |
++++ b/drivers/spi/spi-orion.c |
2648 |
+@@ -41,6 +41,11 @@ |
2649 |
+ #define ORION_SPI_DATA_OUT_REG 0x08 |
2650 |
+ #define ORION_SPI_DATA_IN_REG 0x0c |
2651 |
+ #define ORION_SPI_INT_CAUSE_REG 0x10 |
2652 |
++#define ORION_SPI_TIMING_PARAMS_REG 0x18 |
2653 |
++ |
2654 |
++#define ORION_SPI_TMISO_SAMPLE_MASK (0x3 << 6) |
2655 |
++#define ORION_SPI_TMISO_SAMPLE_1 (1 << 6) |
2656 |
++#define ORION_SPI_TMISO_SAMPLE_2 (2 << 6) |
2657 |
+ |
2658 |
+ #define ORION_SPI_MODE_CPOL (1 << 11) |
2659 |
+ #define ORION_SPI_MODE_CPHA (1 << 12) |
2660 |
+@@ -70,6 +75,7 @@ struct orion_spi_dev { |
2661 |
+ unsigned int min_divisor; |
2662 |
+ unsigned int max_divisor; |
2663 |
+ u32 prescale_mask; |
2664 |
++ bool is_errata_50mhz_ac; |
2665 |
+ }; |
2666 |
+ |
2667 |
+ struct orion_spi { |
2668 |
+@@ -195,6 +201,41 @@ orion_spi_mode_set(struct spi_device *spi) |
2669 |
+ writel(reg, spi_reg(orion_spi, ORION_SPI_IF_CONFIG_REG)); |
2670 |
+ } |
2671 |
+ |
2672 |
++static void |
2673 |
++orion_spi_50mhz_ac_timing_erratum(struct spi_device *spi, unsigned int speed) |
2674 |
++{ |
2675 |
++ u32 reg; |
2676 |
++ struct orion_spi *orion_spi; |
2677 |
++ |
2678 |
++ orion_spi = spi_master_get_devdata(spi->master); |
2679 |
++ |
2680 |
++ /* |
2681 |
++ * Erratum description: (Erratum NO. FE-9144572) The device |
2682 |
++ * SPI interface supports frequencies of up to 50 MHz. |
2683 |
++ * However, due to this erratum, when the device core clock is |
2684 |
++ * 250 MHz and the SPI interfaces is configured for 50MHz SPI |
2685 |
++ * clock and CPOL=CPHA=1 there might occur data corruption on |
2686 |
++ * reads from the SPI device. |
2687 |
++ * Erratum Workaround: |
2688 |
++ * Work in one of the following configurations: |
2689 |
++ * 1. Set CPOL=CPHA=0 in "SPI Interface Configuration |
2690 |
++ * Register". |
2691 |
++ * 2. Set TMISO_SAMPLE value to 0x2 in "SPI Timing Parameters 1 |
2692 |
++ * Register" before setting the interface. |
2693 |
++ */ |
2694 |
++ reg = readl(spi_reg(orion_spi, ORION_SPI_TIMING_PARAMS_REG)); |
2695 |
++ reg &= ~ORION_SPI_TMISO_SAMPLE_MASK; |
2696 |
++ |
2697 |
++ if (clk_get_rate(orion_spi->clk) == 250000000 && |
2698 |
++ speed == 50000000 && spi->mode & SPI_CPOL && |
2699 |
++ spi->mode & SPI_CPHA) |
2700 |
++ reg |= ORION_SPI_TMISO_SAMPLE_2; |
2701 |
++ else |
2702 |
++ reg |= ORION_SPI_TMISO_SAMPLE_1; /* This is the default value */ |
2703 |
++ |
2704 |
++ writel(reg, spi_reg(orion_spi, ORION_SPI_TIMING_PARAMS_REG)); |
2705 |
++} |
2706 |
++ |
2707 |
+ /* |
2708 |
+ * called only when no transfer is active on the bus |
2709 |
+ */ |
2710 |
+@@ -216,6 +257,9 @@ orion_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t) |
2711 |
+ |
2712 |
+ orion_spi_mode_set(spi); |
2713 |
+ |
2714 |
++ if (orion_spi->devdata->is_errata_50mhz_ac) |
2715 |
++ orion_spi_50mhz_ac_timing_erratum(spi, speed); |
2716 |
++ |
2717 |
+ rc = orion_spi_baudrate_set(spi, speed); |
2718 |
+ if (rc) |
2719 |
+ return rc; |
2720 |
+@@ -413,6 +457,14 @@ static const struct orion_spi_dev armada_375_spi_dev_data = { |
2721 |
+ .prescale_mask = ARMADA_SPI_CLK_PRESCALE_MASK, |
2722 |
+ }; |
2723 |
+ |
2724 |
++static const struct orion_spi_dev armada_380_spi_dev_data = { |
2725 |
++ .typ = ARMADA_SPI, |
2726 |
++ .max_hz = 50000000, |
2727 |
++ .max_divisor = 1920, |
2728 |
++ .prescale_mask = ARMADA_SPI_CLK_PRESCALE_MASK, |
2729 |
++ .is_errata_50mhz_ac = true, |
2730 |
++}; |
2731 |
++ |
2732 |
+ static const struct of_device_id orion_spi_of_match_table[] = { |
2733 |
+ { |
2734 |
+ .compatible = "marvell,orion-spi", |
2735 |
+@@ -428,7 +480,7 @@ static const struct of_device_id orion_spi_of_match_table[] = { |
2736 |
+ }, |
2737 |
+ { |
2738 |
+ .compatible = "marvell,armada-380-spi", |
2739 |
+- .data = &armada_xp_spi_dev_data, |
2740 |
++ .data = &armada_380_spi_dev_data, |
2741 |
+ }, |
2742 |
+ { |
2743 |
+ .compatible = "marvell,armada-390-spi", |
2744 |
+diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c |
2745 |
+index d3370a612d84..a7629f8edfca 100644 |
2746 |
+--- a/drivers/spi/spi-sh-msiof.c |
2747 |
++++ b/drivers/spi/spi-sh-msiof.c |
2748 |
+@@ -48,8 +48,8 @@ struct sh_msiof_spi_priv { |
2749 |
+ const struct sh_msiof_chipdata *chipdata; |
2750 |
+ struct sh_msiof_spi_info *info; |
2751 |
+ struct completion done; |
2752 |
+- int tx_fifo_size; |
2753 |
+- int rx_fifo_size; |
2754 |
++ unsigned int tx_fifo_size; |
2755 |
++ unsigned int rx_fifo_size; |
2756 |
+ void *tx_dma_page; |
2757 |
+ void *rx_dma_page; |
2758 |
+ dma_addr_t tx_dma_addr; |
2759 |
+@@ -95,8 +95,6 @@ struct sh_msiof_spi_priv { |
2760 |
+ #define MDR2_WDLEN1(i) (((i) - 1) << 16) /* Word Count (1-64/256 (SH, A1))) */ |
2761 |
+ #define MDR2_GRPMASK1 0x00000001 /* Group Output Mask 1 (SH, A1) */ |
2762 |
+ |
2763 |
+-#define MAX_WDLEN 256U |
2764 |
+- |
2765 |
+ /* TSCR and RSCR */ |
2766 |
+ #define SCR_BRPS_MASK 0x1f00 /* Prescaler Setting (1-32) */ |
2767 |
+ #define SCR_BRPS(i) (((i) - 1) << 8) |
2768 |
+@@ -850,7 +848,12 @@ static int sh_msiof_transfer_one(struct spi_master *master, |
2769 |
+ * DMA supports 32-bit words only, hence pack 8-bit and 16-bit |
2770 |
+ * words, with byte resp. word swapping. |
2771 |
+ */ |
2772 |
+- unsigned int l = min(len, MAX_WDLEN * 4); |
2773 |
++ unsigned int l = 0; |
2774 |
++ |
2775 |
++ if (tx_buf) |
2776 |
++ l = min(len, p->tx_fifo_size * 4); |
2777 |
++ if (rx_buf) |
2778 |
++ l = min(len, p->rx_fifo_size * 4); |
2779 |
+ |
2780 |
+ if (bits <= 8) { |
2781 |
+ if (l & 3) |
2782 |
+@@ -963,7 +966,7 @@ static const struct sh_msiof_chipdata sh_data = { |
2783 |
+ |
2784 |
+ static const struct sh_msiof_chipdata r8a779x_data = { |
2785 |
+ .tx_fifo_size = 64, |
2786 |
+- .rx_fifo_size = 256, |
2787 |
++ .rx_fifo_size = 64, |
2788 |
+ .master_flags = SPI_MASTER_MUST_TX, |
2789 |
+ }; |
2790 |
+ |
2791 |
+diff --git a/drivers/spi/spi-xilinx.c b/drivers/spi/spi-xilinx.c |
2792 |
+index 133f53a9c1d4..a339c1e9997a 100644 |
2793 |
+--- a/drivers/spi/spi-xilinx.c |
2794 |
++++ b/drivers/spi/spi-xilinx.c |
2795 |
+@@ -249,19 +249,23 @@ static int xilinx_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t) |
2796 |
+ xspi->tx_ptr = t->tx_buf; |
2797 |
+ xspi->rx_ptr = t->rx_buf; |
2798 |
+ remaining_words = t->len / xspi->bytes_per_word; |
2799 |
+- reinit_completion(&xspi->done); |
2800 |
+ |
2801 |
+ if (xspi->irq >= 0 && remaining_words > xspi->buffer_size) { |
2802 |
++ u32 isr; |
2803 |
+ use_irq = true; |
2804 |
+- xspi->write_fn(XSPI_INTR_TX_EMPTY, |
2805 |
+- xspi->regs + XIPIF_V123B_IISR_OFFSET); |
2806 |
+- /* Enable the global IPIF interrupt */ |
2807 |
+- xspi->write_fn(XIPIF_V123B_GINTR_ENABLE, |
2808 |
+- xspi->regs + XIPIF_V123B_DGIER_OFFSET); |
2809 |
+ /* Inhibit irq to avoid spurious irqs on tx_empty*/ |
2810 |
+ cr = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET); |
2811 |
+ xspi->write_fn(cr | XSPI_CR_TRANS_INHIBIT, |
2812 |
+ xspi->regs + XSPI_CR_OFFSET); |
2813 |
++ /* ACK old irqs (if any) */ |
2814 |
++ isr = xspi->read_fn(xspi->regs + XIPIF_V123B_IISR_OFFSET); |
2815 |
++ if (isr) |
2816 |
++ xspi->write_fn(isr, |
2817 |
++ xspi->regs + XIPIF_V123B_IISR_OFFSET); |
2818 |
++ /* Enable the global IPIF interrupt */ |
2819 |
++ xspi->write_fn(XIPIF_V123B_GINTR_ENABLE, |
2820 |
++ xspi->regs + XIPIF_V123B_DGIER_OFFSET); |
2821 |
++ reinit_completion(&xspi->done); |
2822 |
+ } |
2823 |
+ |
2824 |
+ while (remaining_words) { |
2825 |
+@@ -302,8 +306,10 @@ static int xilinx_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t) |
2826 |
+ remaining_words -= n_words; |
2827 |
+ } |
2828 |
+ |
2829 |
+- if (use_irq) |
2830 |
++ if (use_irq) { |
2831 |
+ xspi->write_fn(0, xspi->regs + XIPIF_V123B_DGIER_OFFSET); |
2832 |
++ xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET); |
2833 |
++ } |
2834 |
+ |
2835 |
+ return t->len; |
2836 |
+ } |
2837 |
+diff --git a/drivers/staging/comedi/drivers/adl_pci7x3x.c b/drivers/staging/comedi/drivers/adl_pci7x3x.c |
2838 |
+index 934af3ff7897..b0fc027cf485 100644 |
2839 |
+--- a/drivers/staging/comedi/drivers/adl_pci7x3x.c |
2840 |
++++ b/drivers/staging/comedi/drivers/adl_pci7x3x.c |
2841 |
+@@ -120,8 +120,20 @@ static int adl_pci7x3x_do_insn_bits(struct comedi_device *dev, |
2842 |
+ { |
2843 |
+ unsigned long reg = (unsigned long)s->private; |
2844 |
+ |
2845 |
+- if (comedi_dio_update_state(s, data)) |
2846 |
+- outl(s->state, dev->iobase + reg); |
2847 |
++ if (comedi_dio_update_state(s, data)) { |
2848 |
++ unsigned int val = s->state; |
2849 |
++ |
2850 |
++ if (s->n_chan == 16) { |
2851 |
++ /* |
2852 |
++ * It seems the PCI-7230 needs the 16-bit DO state |
2853 |
++ * to be shifted left by 16 bits before being written |
2854 |
++ * to the 32-bit register. Set the value in both |
2855 |
++ * halves of the register to be sure. |
2856 |
++ */ |
2857 |
++ val |= val << 16; |
2858 |
++ } |
2859 |
++ outl(val, dev->iobase + reg); |
2860 |
++ } |
2861 |
+ |
2862 |
+ data[1] = s->state; |
2863 |
+ |
2864 |
+diff --git a/drivers/staging/comedi/drivers/usbduxsigma.c b/drivers/staging/comedi/drivers/usbduxsigma.c |
2865 |
+index eaa9add491df..dc0b25a54088 100644 |
2866 |
+--- a/drivers/staging/comedi/drivers/usbduxsigma.c |
2867 |
++++ b/drivers/staging/comedi/drivers/usbduxsigma.c |
2868 |
+@@ -550,27 +550,6 @@ static int usbduxsigma_ai_cmdtest(struct comedi_device *dev, |
2869 |
+ if (err) |
2870 |
+ return 3; |
2871 |
+ |
2872 |
+- /* Step 4: fix up any arguments */ |
2873 |
+- |
2874 |
+- if (high_speed) { |
2875 |
+- /* |
2876 |
+- * every 2 channels get a time window of 125us. Thus, if we |
2877 |
+- * sample all 16 channels we need 1ms. If we sample only one |
2878 |
+- * channel we need only 125us |
2879 |
+- */ |
2880 |
+- devpriv->ai_interval = interval; |
2881 |
+- devpriv->ai_timer = cmd->scan_begin_arg / (125000 * interval); |
2882 |
+- } else { |
2883 |
+- /* interval always 1ms */ |
2884 |
+- devpriv->ai_interval = 1; |
2885 |
+- devpriv->ai_timer = cmd->scan_begin_arg / 1000000; |
2886 |
+- } |
2887 |
+- if (devpriv->ai_timer < 1) |
2888 |
+- err |= -EINVAL; |
2889 |
+- |
2890 |
+- if (err) |
2891 |
+- return 4; |
2892 |
+- |
2893 |
+ return 0; |
2894 |
+ } |
2895 |
+ |
2896 |
+@@ -668,6 +647,22 @@ static int usbduxsigma_ai_cmd(struct comedi_device *dev, |
2897 |
+ |
2898 |
+ down(&devpriv->sem); |
2899 |
+ |
2900 |
++ if (devpriv->high_speed) { |
2901 |
++ /* |
2902 |
++ * every 2 channels get a time window of 125us. Thus, if we |
2903 |
++ * sample all 16 channels we need 1ms. If we sample only one |
2904 |
++ * channel we need only 125us |
2905 |
++ */ |
2906 |
++ unsigned int interval = usbduxsigma_chans_to_interval(len); |
2907 |
++ |
2908 |
++ devpriv->ai_interval = interval; |
2909 |
++ devpriv->ai_timer = cmd->scan_begin_arg / (125000 * interval); |
2910 |
++ } else { |
2911 |
++ /* interval always 1ms */ |
2912 |
++ devpriv->ai_interval = 1; |
2913 |
++ devpriv->ai_timer = cmd->scan_begin_arg / 1000000; |
2914 |
++ } |
2915 |
++ |
2916 |
+ for (i = 0; i < len; i++) { |
2917 |
+ unsigned int chan = CR_CHAN(cmd->chanlist[i]); |
2918 |
+ |
2919 |
+@@ -917,25 +912,6 @@ static int usbduxsigma_ao_cmdtest(struct comedi_device *dev, |
2920 |
+ if (err) |
2921 |
+ return 3; |
2922 |
+ |
2923 |
+- /* Step 4: fix up any arguments */ |
2924 |
+- |
2925 |
+- /* we count in timer steps */ |
2926 |
+- if (high_speed) { |
2927 |
+- /* timing of the conversion itself: every 125 us */ |
2928 |
+- devpriv->ao_timer = cmd->convert_arg / 125000; |
2929 |
+- } else { |
2930 |
+- /* |
2931 |
+- * timing of the scan: every 1ms |
2932 |
+- * we get all channels at once |
2933 |
+- */ |
2934 |
+- devpriv->ao_timer = cmd->scan_begin_arg / 1000000; |
2935 |
+- } |
2936 |
+- if (devpriv->ao_timer < 1) |
2937 |
+- err |= -EINVAL; |
2938 |
+- |
2939 |
+- if (err) |
2940 |
+- return 4; |
2941 |
+- |
2942 |
+ return 0; |
2943 |
+ } |
2944 |
+ |
2945 |
+@@ -948,6 +924,20 @@ static int usbduxsigma_ao_cmd(struct comedi_device *dev, |
2946 |
+ |
2947 |
+ down(&devpriv->sem); |
2948 |
+ |
2949 |
++ if (cmd->convert_src == TRIG_TIMER) { |
2950 |
++ /* |
2951 |
++ * timing of the conversion itself: every 125 us |
2952 |
++ * at high speed (not used yet) |
2953 |
++ */ |
2954 |
++ devpriv->ao_timer = cmd->convert_arg / 125000; |
2955 |
++ } else { |
2956 |
++ /* |
2957 |
++ * timing of the scan: every 1ms |
2958 |
++ * we get all channels at once |
2959 |
++ */ |
2960 |
++ devpriv->ao_timer = cmd->scan_begin_arg / 1000000; |
2961 |
++ } |
2962 |
++ |
2963 |
+ devpriv->ao_counter = devpriv->ao_timer; |
2964 |
+ |
2965 |
+ if (cmd->start_src == TRIG_NOW) { |
2966 |
+diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_core.c b/drivers/staging/rtl8192e/rtl8192e/rtl_core.c |
2967 |
+index c6cdb43b864c..476808261fa8 100644 |
2968 |
+--- a/drivers/staging/rtl8192e/rtl8192e/rtl_core.c |
2969 |
++++ b/drivers/staging/rtl8192e/rtl8192e/rtl_core.c |
2970 |
+@@ -1826,8 +1826,8 @@ void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, |
2971 |
+ return; |
2972 |
+ } |
2973 |
+ |
2974 |
+- if (queue_index != TXCMD_QUEUE) |
2975 |
+- netdev_warn(dev, "%s(): queue index != TXCMD_QUEUE\n", |
2976 |
++ if (queue_index == TXCMD_QUEUE) |
2977 |
++ netdev_warn(dev, "%s(): queue index == TXCMD_QUEUE\n", |
2978 |
+ __func__); |
2979 |
+ |
2980 |
+ memcpy((unsigned char *)(skb->cb), &dev, sizeof(dev)); |
2981 |
+diff --git a/drivers/staging/unisys/visorbus/visorchipset.c b/drivers/staging/unisys/visorbus/visorchipset.c |
2982 |
+index bb8087e70127..44269d58eb51 100644 |
2983 |
+--- a/drivers/staging/unisys/visorbus/visorchipset.c |
2984 |
++++ b/drivers/staging/unisys/visorbus/visorchipset.c |
2985 |
+@@ -2381,6 +2381,9 @@ static struct acpi_driver unisys_acpi_driver = { |
2986 |
+ .remove = visorchipset_exit, |
2987 |
+ }, |
2988 |
+ }; |
2989 |
++ |
2990 |
++MODULE_DEVICE_TABLE(acpi, unisys_device_ids); |
2991 |
++ |
2992 |
+ static __init uint32_t visorutil_spar_detect(void) |
2993 |
+ { |
2994 |
+ unsigned int eax, ebx, ecx, edx; |
2995 |
+diff --git a/drivers/tty/serial/8250/8250_omap.c b/drivers/tty/serial/8250/8250_omap.c |
2996 |
+index d75a66c72750..b470df122642 100644 |
2997 |
+--- a/drivers/tty/serial/8250/8250_omap.c |
2998 |
++++ b/drivers/tty/serial/8250/8250_omap.c |
2999 |
+@@ -100,6 +100,7 @@ struct omap8250_priv { |
3000 |
+ struct work_struct qos_work; |
3001 |
+ struct uart_8250_dma omap8250_dma; |
3002 |
+ spinlock_t rx_dma_lock; |
3003 |
++ bool rx_dma_broken; |
3004 |
+ }; |
3005 |
+ |
3006 |
+ static u32 uart_read(struct uart_8250_port *up, u32 reg) |
3007 |
+@@ -754,6 +755,7 @@ static void omap_8250_rx_dma_flush(struct uart_8250_port *p) |
3008 |
+ struct omap8250_priv *priv = p->port.private_data; |
3009 |
+ struct uart_8250_dma *dma = p->dma; |
3010 |
+ unsigned long flags; |
3011 |
++ int ret; |
3012 |
+ |
3013 |
+ spin_lock_irqsave(&priv->rx_dma_lock, flags); |
3014 |
+ |
3015 |
+@@ -762,7 +764,9 @@ static void omap_8250_rx_dma_flush(struct uart_8250_port *p) |
3016 |
+ return; |
3017 |
+ } |
3018 |
+ |
3019 |
+- dmaengine_pause(dma->rxchan); |
3020 |
++ ret = dmaengine_pause(dma->rxchan); |
3021 |
++ if (WARN_ON_ONCE(ret)) |
3022 |
++ priv->rx_dma_broken = true; |
3023 |
+ |
3024 |
+ spin_unlock_irqrestore(&priv->rx_dma_lock, flags); |
3025 |
+ |
3026 |
+@@ -806,6 +810,9 @@ static int omap_8250_rx_dma(struct uart_8250_port *p, unsigned int iir) |
3027 |
+ break; |
3028 |
+ } |
3029 |
+ |
3030 |
++ if (priv->rx_dma_broken) |
3031 |
++ return -EINVAL; |
3032 |
++ |
3033 |
+ spin_lock_irqsave(&priv->rx_dma_lock, flags); |
3034 |
+ |
3035 |
+ if (dma->rx_running) |
3036 |
+@@ -1180,6 +1187,11 @@ static int omap8250_probe(struct platform_device *pdev) |
3037 |
+ |
3038 |
+ if (of_machine_is_compatible("ti,am33xx")) |
3039 |
+ priv->habit |= OMAP_DMA_TX_KICK; |
3040 |
++ /* |
3041 |
++ * pause is currently not supported atleast on omap-sdma |
3042 |
++ * and edma on most earlier kernels. |
3043 |
++ */ |
3044 |
++ priv->rx_dma_broken = true; |
3045 |
+ } |
3046 |
+ } |
3047 |
+ #endif |
3048 |
+diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c |
3049 |
+index e55f18b93fe7..46ddce479f26 100644 |
3050 |
+--- a/drivers/tty/serial/8250/8250_pci.c |
3051 |
++++ b/drivers/tty/serial/8250/8250_pci.c |
3052 |
+@@ -2017,6 +2017,12 @@ pci_wch_ch38x_setup(struct serial_private *priv, |
3053 |
+ #define PCIE_DEVICE_ID_WCH_CH382_2S1P 0x3250 |
3054 |
+ #define PCIE_DEVICE_ID_WCH_CH384_4S 0x3470 |
3055 |
+ |
3056 |
++#define PCI_VENDOR_ID_PERICOM 0x12D8 |
3057 |
++#define PCI_DEVICE_ID_PERICOM_PI7C9X7951 0x7951 |
3058 |
++#define PCI_DEVICE_ID_PERICOM_PI7C9X7952 0x7952 |
3059 |
++#define PCI_DEVICE_ID_PERICOM_PI7C9X7954 0x7954 |
3060 |
++#define PCI_DEVICE_ID_PERICOM_PI7C9X7958 0x7958 |
3061 |
++ |
3062 |
+ /* Unknown vendors/cards - this should not be in linux/pci_ids.h */ |
3063 |
+ #define PCI_SUBDEVICE_ID_UNKNOWN_0x1584 0x1584 |
3064 |
+ #define PCI_SUBDEVICE_ID_UNKNOWN_0x1588 0x1588 |
3065 |
+@@ -2331,27 +2337,12 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = { |
3066 |
+ * Pericom |
3067 |
+ */ |
3068 |
+ { |
3069 |
+- .vendor = 0x12d8, |
3070 |
+- .device = 0x7952, |
3071 |
+- .subvendor = PCI_ANY_ID, |
3072 |
+- .subdevice = PCI_ANY_ID, |
3073 |
+- .setup = pci_pericom_setup, |
3074 |
+- }, |
3075 |
+- { |
3076 |
+- .vendor = 0x12d8, |
3077 |
+- .device = 0x7954, |
3078 |
+- .subvendor = PCI_ANY_ID, |
3079 |
+- .subdevice = PCI_ANY_ID, |
3080 |
+- .setup = pci_pericom_setup, |
3081 |
+- }, |
3082 |
+- { |
3083 |
+- .vendor = 0x12d8, |
3084 |
+- .device = 0x7958, |
3085 |
+- .subvendor = PCI_ANY_ID, |
3086 |
+- .subdevice = PCI_ANY_ID, |
3087 |
+- .setup = pci_pericom_setup, |
3088 |
++ .vendor = PCI_VENDOR_ID_PERICOM, |
3089 |
++ .device = PCI_ANY_ID, |
3090 |
++ .subvendor = PCI_ANY_ID, |
3091 |
++ .subdevice = PCI_ANY_ID, |
3092 |
++ .setup = pci_pericom_setup, |
3093 |
+ }, |
3094 |
+- |
3095 |
+ /* |
3096 |
+ * PLX |
3097 |
+ */ |
3098 |
+@@ -3056,6 +3047,10 @@ enum pci_board_num_t { |
3099 |
+ pbn_fintek_8, |
3100 |
+ pbn_fintek_12, |
3101 |
+ pbn_wch384_4, |
3102 |
++ pbn_pericom_PI7C9X7951, |
3103 |
++ pbn_pericom_PI7C9X7952, |
3104 |
++ pbn_pericom_PI7C9X7954, |
3105 |
++ pbn_pericom_PI7C9X7958, |
3106 |
+ }; |
3107 |
+ |
3108 |
+ /* |
3109 |
+@@ -3881,7 +3876,6 @@ static struct pciserial_board pci_boards[] = { |
3110 |
+ .base_baud = 115200, |
3111 |
+ .first_offset = 0x40, |
3112 |
+ }, |
3113 |
+- |
3114 |
+ [pbn_wch384_4] = { |
3115 |
+ .flags = FL_BASE0, |
3116 |
+ .num_ports = 4, |
3117 |
+@@ -3889,6 +3883,33 @@ static struct pciserial_board pci_boards[] = { |
3118 |
+ .uart_offset = 8, |
3119 |
+ .first_offset = 0xC0, |
3120 |
+ }, |
3121 |
++ /* |
3122 |
++ * Pericom PI7C9X795[1248] Uno/Dual/Quad/Octal UART |
3123 |
++ */ |
3124 |
++ [pbn_pericom_PI7C9X7951] = { |
3125 |
++ .flags = FL_BASE0, |
3126 |
++ .num_ports = 1, |
3127 |
++ .base_baud = 921600, |
3128 |
++ .uart_offset = 0x8, |
3129 |
++ }, |
3130 |
++ [pbn_pericom_PI7C9X7952] = { |
3131 |
++ .flags = FL_BASE0, |
3132 |
++ .num_ports = 2, |
3133 |
++ .base_baud = 921600, |
3134 |
++ .uart_offset = 0x8, |
3135 |
++ }, |
3136 |
++ [pbn_pericom_PI7C9X7954] = { |
3137 |
++ .flags = FL_BASE0, |
3138 |
++ .num_ports = 4, |
3139 |
++ .base_baud = 921600, |
3140 |
++ .uart_offset = 0x8, |
3141 |
++ }, |
3142 |
++ [pbn_pericom_PI7C9X7958] = { |
3143 |
++ .flags = FL_BASE0, |
3144 |
++ .num_ports = 8, |
3145 |
++ .base_baud = 921600, |
3146 |
++ .uart_offset = 0x8, |
3147 |
++ }, |
3148 |
+ }; |
3149 |
+ |
3150 |
+ static const struct pci_device_id blacklist[] = { |
3151 |
+@@ -5154,6 +5175,25 @@ static struct pci_device_id serial_pci_tbl[] = { |
3152 |
+ 0, |
3153 |
+ 0, pbn_exar_XR17V8358 }, |
3154 |
+ /* |
3155 |
++ * Pericom PI7C9X795[1248] Uno/Dual/Quad/Octal UART |
3156 |
++ */ |
3157 |
++ { PCI_VENDOR_ID_PERICOM, PCI_DEVICE_ID_PERICOM_PI7C9X7951, |
3158 |
++ PCI_ANY_ID, PCI_ANY_ID, |
3159 |
++ 0, |
3160 |
++ 0, pbn_pericom_PI7C9X7951 }, |
3161 |
++ { PCI_VENDOR_ID_PERICOM, PCI_DEVICE_ID_PERICOM_PI7C9X7952, |
3162 |
++ PCI_ANY_ID, PCI_ANY_ID, |
3163 |
++ 0, |
3164 |
++ 0, pbn_pericom_PI7C9X7952 }, |
3165 |
++ { PCI_VENDOR_ID_PERICOM, PCI_DEVICE_ID_PERICOM_PI7C9X7954, |
3166 |
++ PCI_ANY_ID, PCI_ANY_ID, |
3167 |
++ 0, |
3168 |
++ 0, pbn_pericom_PI7C9X7954 }, |
3169 |
++ { PCI_VENDOR_ID_PERICOM, PCI_DEVICE_ID_PERICOM_PI7C9X7958, |
3170 |
++ PCI_ANY_ID, PCI_ANY_ID, |
3171 |
++ 0, |
3172 |
++ 0, pbn_pericom_PI7C9X7958 }, |
3173 |
++ /* |
3174 |
+ * Topic TP560 Data/Fax/Voice 56k modem (reported by Evan Clarke) |
3175 |
+ */ |
3176 |
+ { PCI_VENDOR_ID_TOPIC, PCI_DEVICE_ID_TOPIC_TP560, |
3177 |
+diff --git a/drivers/tty/serial/8250/8250_pnp.c b/drivers/tty/serial/8250/8250_pnp.c |
3178 |
+index 50a09cd76d50..658b392d1170 100644 |
3179 |
+--- a/drivers/tty/serial/8250/8250_pnp.c |
3180 |
++++ b/drivers/tty/serial/8250/8250_pnp.c |
3181 |
+@@ -41,6 +41,12 @@ static const struct pnp_device_id pnp_dev_table[] = { |
3182 |
+ { "AEI1240", 0 }, |
3183 |
+ /* Rockwell 56K ACF II Fax+Data+Voice Modem */ |
3184 |
+ { "AKY1021", 0 /*SPCI_FL_NO_SHIRQ*/ }, |
3185 |
++ /* |
3186 |
++ * ALi Fast Infrared Controller |
3187 |
++ * Native driver (ali-ircc) is broken so at least |
3188 |
++ * it can be used with irtty-sir. |
3189 |
++ */ |
3190 |
++ { "ALI5123", 0 }, |
3191 |
+ /* AZT3005 PnP SOUND DEVICE */ |
3192 |
+ { "AZT4001", 0 }, |
3193 |
+ /* Best Data Products Inc. Smart One 336F PnP Modem */ |
3194 |
+@@ -364,6 +370,11 @@ static const struct pnp_device_id pnp_dev_table[] = { |
3195 |
+ /* Winbond CIR port, should not be probed. We should keep track |
3196 |
+ of it to prevent the legacy serial driver from probing it */ |
3197 |
+ { "WEC1022", CIR_PORT }, |
3198 |
++ /* |
3199 |
++ * SMSC IrCC SIR/FIR port, should not be probed by serial driver |
3200 |
++ * as well so its own driver can bind to it. |
3201 |
++ */ |
3202 |
++ { "SMCF010", CIR_PORT }, |
3203 |
+ { "", 0 } |
3204 |
+ }; |
3205 |
+ |
3206 |
+diff --git a/drivers/tty/serial/8250/8250_uniphier.c b/drivers/tty/serial/8250/8250_uniphier.c |
3207 |
+index 7d79425c2b09..d11621e2cf1d 100644 |
3208 |
+--- a/drivers/tty/serial/8250/8250_uniphier.c |
3209 |
++++ b/drivers/tty/serial/8250/8250_uniphier.c |
3210 |
+@@ -218,6 +218,7 @@ static int uniphier_uart_probe(struct platform_device *pdev) |
3211 |
+ ret = serial8250_register_8250_port(&up); |
3212 |
+ if (ret < 0) { |
3213 |
+ dev_err(dev, "failed to register 8250 port\n"); |
3214 |
++ clk_disable_unprepare(priv->clk); |
3215 |
+ return ret; |
3216 |
+ } |
3217 |
+ |
3218 |
+diff --git a/drivers/tty/serial/men_z135_uart.c b/drivers/tty/serial/men_z135_uart.c |
3219 |
+index 35c55505b3eb..5a41b8fbb10a 100644 |
3220 |
+--- a/drivers/tty/serial/men_z135_uart.c |
3221 |
++++ b/drivers/tty/serial/men_z135_uart.c |
3222 |
+@@ -392,7 +392,6 @@ static irqreturn_t men_z135_intr(int irq, void *data) |
3223 |
+ struct men_z135_port *uart = (struct men_z135_port *)data; |
3224 |
+ struct uart_port *port = &uart->port; |
3225 |
+ bool handled = false; |
3226 |
+- unsigned long flags; |
3227 |
+ int irq_id; |
3228 |
+ |
3229 |
+ uart->stat_reg = ioread32(port->membase + MEN_Z135_STAT_REG); |
3230 |
+@@ -401,7 +400,7 @@ static irqreturn_t men_z135_intr(int irq, void *data) |
3231 |
+ if (!irq_id) |
3232 |
+ goto out; |
3233 |
+ |
3234 |
+- spin_lock_irqsave(&port->lock, flags); |
3235 |
++ spin_lock(&port->lock); |
3236 |
+ /* It's save to write to IIR[7:6] RXC[9:8] */ |
3237 |
+ iowrite8(irq_id, port->membase + MEN_Z135_STAT_REG); |
3238 |
+ |
3239 |
+@@ -427,7 +426,7 @@ static irqreturn_t men_z135_intr(int irq, void *data) |
3240 |
+ handled = true; |
3241 |
+ } |
3242 |
+ |
3243 |
+- spin_unlock_irqrestore(&port->lock, flags); |
3244 |
++ spin_unlock(&port->lock); |
3245 |
+ out: |
3246 |
+ return IRQ_RETVAL(handled); |
3247 |
+ } |
3248 |
+@@ -717,7 +716,7 @@ static void men_z135_set_termios(struct uart_port *port, |
3249 |
+ |
3250 |
+ baud = uart_get_baud_rate(port, termios, old, 0, uart_freq / 16); |
3251 |
+ |
3252 |
+- spin_lock(&port->lock); |
3253 |
++ spin_lock_irq(&port->lock); |
3254 |
+ if (tty_termios_baud_rate(termios)) |
3255 |
+ tty_termios_encode_baud_rate(termios, baud, baud); |
3256 |
+ |
3257 |
+@@ -725,7 +724,7 @@ static void men_z135_set_termios(struct uart_port *port, |
3258 |
+ iowrite32(bd_reg, port->membase + MEN_Z135_BAUD_REG); |
3259 |
+ |
3260 |
+ uart_update_timeout(port, termios->c_cflag, baud); |
3261 |
+- spin_unlock(&port->lock); |
3262 |
++ spin_unlock_irq(&port->lock); |
3263 |
+ } |
3264 |
+ |
3265 |
+ static const char *men_z135_type(struct uart_port *port) |
3266 |
+diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c |
3267 |
+index 67d0c213b1c7..5916311eecb1 100644 |
3268 |
+--- a/drivers/tty/serial/samsung.c |
3269 |
++++ b/drivers/tty/serial/samsung.c |
3270 |
+@@ -295,15 +295,6 @@ static int s3c24xx_serial_start_tx_dma(struct s3c24xx_uart_port *ourport, |
3271 |
+ if (ourport->tx_mode != S3C24XX_TX_DMA) |
3272 |
+ enable_tx_dma(ourport); |
3273 |
+ |
3274 |
+- while (xmit->tail & (dma_get_cache_alignment() - 1)) { |
3275 |
+- if (rd_regl(port, S3C2410_UFSTAT) & ourport->info->tx_fifofull) |
3276 |
+- return 0; |
3277 |
+- wr_regb(port, S3C2410_UTXH, xmit->buf[xmit->tail]); |
3278 |
+- xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); |
3279 |
+- port->icount.tx++; |
3280 |
+- count--; |
3281 |
+- } |
3282 |
+- |
3283 |
+ dma->tx_size = count & ~(dma_get_cache_alignment() - 1); |
3284 |
+ dma->tx_transfer_addr = dma->tx_addr + xmit->tail; |
3285 |
+ |
3286 |
+@@ -342,7 +333,9 @@ static void s3c24xx_serial_start_next_tx(struct s3c24xx_uart_port *ourport) |
3287 |
+ return; |
3288 |
+ } |
3289 |
+ |
3290 |
+- if (!ourport->dma || !ourport->dma->tx_chan || count < port->fifosize) |
3291 |
++ if (!ourport->dma || !ourport->dma->tx_chan || |
3292 |
++ count < ourport->min_dma_size || |
3293 |
++ xmit->tail & (dma_get_cache_alignment() - 1)) |
3294 |
+ s3c24xx_serial_start_tx_pio(ourport); |
3295 |
+ else |
3296 |
+ s3c24xx_serial_start_tx_dma(ourport, count); |
3297 |
+@@ -736,15 +729,20 @@ static irqreturn_t s3c24xx_serial_tx_chars(int irq, void *id) |
3298 |
+ struct uart_port *port = &ourport->port; |
3299 |
+ struct circ_buf *xmit = &port->state->xmit; |
3300 |
+ unsigned long flags; |
3301 |
+- int count; |
3302 |
++ int count, dma_count = 0; |
3303 |
+ |
3304 |
+ spin_lock_irqsave(&port->lock, flags); |
3305 |
+ |
3306 |
+ count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); |
3307 |
+ |
3308 |
+- if (ourport->dma && ourport->dma->tx_chan && count >= port->fifosize) { |
3309 |
+- s3c24xx_serial_start_tx_dma(ourport, count); |
3310 |
+- goto out; |
3311 |
++ if (ourport->dma && ourport->dma->tx_chan && |
3312 |
++ count >= ourport->min_dma_size) { |
3313 |
++ int align = dma_get_cache_alignment() - |
3314 |
++ (xmit->tail & (dma_get_cache_alignment() - 1)); |
3315 |
++ if (count-align >= ourport->min_dma_size) { |
3316 |
++ dma_count = count-align; |
3317 |
++ count = align; |
3318 |
++ } |
3319 |
+ } |
3320 |
+ |
3321 |
+ if (port->x_char) { |
3322 |
+@@ -765,14 +763,24 @@ static irqreturn_t s3c24xx_serial_tx_chars(int irq, void *id) |
3323 |
+ |
3324 |
+ /* try and drain the buffer... */ |
3325 |
+ |
3326 |
+- count = port->fifosize; |
3327 |
+- while (!uart_circ_empty(xmit) && count-- > 0) { |
3328 |
++ if (count > port->fifosize) { |
3329 |
++ count = port->fifosize; |
3330 |
++ dma_count = 0; |
3331 |
++ } |
3332 |
++ |
3333 |
++ while (!uart_circ_empty(xmit) && count > 0) { |
3334 |
+ if (rd_regl(port, S3C2410_UFSTAT) & ourport->info->tx_fifofull) |
3335 |
+ break; |
3336 |
+ |
3337 |
+ wr_regb(port, S3C2410_UTXH, xmit->buf[xmit->tail]); |
3338 |
+ xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); |
3339 |
+ port->icount.tx++; |
3340 |
++ count--; |
3341 |
++ } |
3342 |
++ |
3343 |
++ if (!count && dma_count) { |
3344 |
++ s3c24xx_serial_start_tx_dma(ourport, dma_count); |
3345 |
++ goto out; |
3346 |
+ } |
3347 |
+ |
3348 |
+ if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) { |
3349 |
+@@ -1838,6 +1846,13 @@ static int s3c24xx_serial_probe(struct platform_device *pdev) |
3350 |
+ else if (ourport->info->fifosize) |
3351 |
+ ourport->port.fifosize = ourport->info->fifosize; |
3352 |
+ |
3353 |
++ /* |
3354 |
++ * DMA transfers must be aligned at least to cache line size, |
3355 |
++ * so find minimal transfer size suitable for DMA mode |
3356 |
++ */ |
3357 |
++ ourport->min_dma_size = max_t(int, ourport->port.fifosize, |
3358 |
++ dma_get_cache_alignment()); |
3359 |
++ |
3360 |
+ probe_index++; |
3361 |
+ |
3362 |
+ dbg("%s: initialising port %p...\n", __func__, ourport); |
3363 |
+diff --git a/drivers/tty/serial/samsung.h b/drivers/tty/serial/samsung.h |
3364 |
+index d275032aa68d..fc5deaa4f382 100644 |
3365 |
+--- a/drivers/tty/serial/samsung.h |
3366 |
++++ b/drivers/tty/serial/samsung.h |
3367 |
+@@ -82,6 +82,7 @@ struct s3c24xx_uart_port { |
3368 |
+ unsigned char tx_claimed; |
3369 |
+ unsigned int pm_level; |
3370 |
+ unsigned long baudclk_rate; |
3371 |
++ unsigned int min_dma_size; |
3372 |
+ |
3373 |
+ unsigned int rx_irq; |
3374 |
+ unsigned int tx_irq; |
3375 |
+diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c |
3376 |
+index 69e769c35cf5..06ecd1e6871c 100644 |
3377 |
+--- a/drivers/usb/dwc3/ep0.c |
3378 |
++++ b/drivers/usb/dwc3/ep0.c |
3379 |
+@@ -820,6 +820,11 @@ static void dwc3_ep0_complete_data(struct dwc3 *dwc, |
3380 |
+ unsigned maxp = ep0->endpoint.maxpacket; |
3381 |
+ |
3382 |
+ transfer_size += (maxp - (transfer_size % maxp)); |
3383 |
++ |
3384 |
++ /* Maximum of DWC3_EP0_BOUNCE_SIZE can only be received */ |
3385 |
++ if (transfer_size > DWC3_EP0_BOUNCE_SIZE) |
3386 |
++ transfer_size = DWC3_EP0_BOUNCE_SIZE; |
3387 |
++ |
3388 |
+ transferred = min_t(u32, ur->length, |
3389 |
+ transfer_size - length); |
3390 |
+ memcpy(ur->buf, dwc->ep0_bounce, transferred); |
3391 |
+@@ -941,11 +946,14 @@ static void __dwc3_ep0_do_control_data(struct dwc3 *dwc, |
3392 |
+ return; |
3393 |
+ } |
3394 |
+ |
3395 |
+- WARN_ON(req->request.length > DWC3_EP0_BOUNCE_SIZE); |
3396 |
+- |
3397 |
+ maxpacket = dep->endpoint.maxpacket; |
3398 |
+ transfer_size = roundup(req->request.length, maxpacket); |
3399 |
+ |
3400 |
++ if (transfer_size > DWC3_EP0_BOUNCE_SIZE) { |
3401 |
++ dev_WARN(dwc->dev, "bounce buf can't handle req len\n"); |
3402 |
++ transfer_size = DWC3_EP0_BOUNCE_SIZE; |
3403 |
++ } |
3404 |
++ |
3405 |
+ dwc->ep0_bounced = true; |
3406 |
+ |
3407 |
+ /* |
3408 |
+diff --git a/drivers/usb/gadget/function/f_uac2.c b/drivers/usb/gadget/function/f_uac2.c |
3409 |
+index 531861547253..96d935b00504 100644 |
3410 |
+--- a/drivers/usb/gadget/function/f_uac2.c |
3411 |
++++ b/drivers/usb/gadget/function/f_uac2.c |
3412 |
+@@ -975,6 +975,29 @@ free_ep(struct uac2_rtd_params *prm, struct usb_ep *ep) |
3413 |
+ "%s:%d Error!\n", __func__, __LINE__); |
3414 |
+ } |
3415 |
+ |
3416 |
++static void set_ep_max_packet_size(const struct f_uac2_opts *uac2_opts, |
3417 |
++ struct usb_endpoint_descriptor *ep_desc, |
3418 |
++ unsigned int factor, bool is_playback) |
3419 |
++{ |
3420 |
++ int chmask, srate, ssize; |
3421 |
++ u16 max_packet_size; |
3422 |
++ |
3423 |
++ if (is_playback) { |
3424 |
++ chmask = uac2_opts->p_chmask; |
3425 |
++ srate = uac2_opts->p_srate; |
3426 |
++ ssize = uac2_opts->p_ssize; |
3427 |
++ } else { |
3428 |
++ chmask = uac2_opts->c_chmask; |
3429 |
++ srate = uac2_opts->c_srate; |
3430 |
++ ssize = uac2_opts->c_ssize; |
3431 |
++ } |
3432 |
++ |
3433 |
++ max_packet_size = num_channels(chmask) * ssize * |
3434 |
++ DIV_ROUND_UP(srate, factor / (1 << (ep_desc->bInterval - 1))); |
3435 |
++ ep_desc->wMaxPacketSize = cpu_to_le16(min(max_packet_size, |
3436 |
++ le16_to_cpu(ep_desc->wMaxPacketSize))); |
3437 |
++} |
3438 |
++ |
3439 |
+ static int |
3440 |
+ afunc_bind(struct usb_configuration *cfg, struct usb_function *fn) |
3441 |
+ { |
3442 |
+@@ -1070,10 +1093,14 @@ afunc_bind(struct usb_configuration *cfg, struct usb_function *fn) |
3443 |
+ uac2->p_prm.uac2 = uac2; |
3444 |
+ uac2->c_prm.uac2 = uac2; |
3445 |
+ |
3446 |
++ /* Calculate wMaxPacketSize according to audio bandwidth */ |
3447 |
++ set_ep_max_packet_size(uac2_opts, &fs_epin_desc, 1000, true); |
3448 |
++ set_ep_max_packet_size(uac2_opts, &fs_epout_desc, 1000, false); |
3449 |
++ set_ep_max_packet_size(uac2_opts, &hs_epin_desc, 8000, true); |
3450 |
++ set_ep_max_packet_size(uac2_opts, &hs_epout_desc, 8000, false); |
3451 |
++ |
3452 |
+ hs_epout_desc.bEndpointAddress = fs_epout_desc.bEndpointAddress; |
3453 |
+- hs_epout_desc.wMaxPacketSize = fs_epout_desc.wMaxPacketSize; |
3454 |
+ hs_epin_desc.bEndpointAddress = fs_epin_desc.bEndpointAddress; |
3455 |
+- hs_epin_desc.wMaxPacketSize = fs_epin_desc.wMaxPacketSize; |
3456 |
+ |
3457 |
+ ret = usb_assign_descriptors(fn, fs_audio_desc, hs_audio_desc, NULL); |
3458 |
+ if (ret) |
3459 |
+diff --git a/drivers/usb/gadget/udc/m66592-udc.c b/drivers/usb/gadget/udc/m66592-udc.c |
3460 |
+index 309706fe4bf0..9704053dfe05 100644 |
3461 |
+--- a/drivers/usb/gadget/udc/m66592-udc.c |
3462 |
++++ b/drivers/usb/gadget/udc/m66592-udc.c |
3463 |
+@@ -1052,7 +1052,7 @@ static void set_feature(struct m66592 *m66592, struct usb_ctrlrequest *ctrl) |
3464 |
+ tmp = m66592_read(m66592, M66592_INTSTS0) & |
3465 |
+ M66592_CTSQ; |
3466 |
+ udelay(1); |
3467 |
+- } while (tmp != M66592_CS_IDST || timeout-- > 0); |
3468 |
++ } while (tmp != M66592_CS_IDST && timeout-- > 0); |
3469 |
+ |
3470 |
+ if (tmp == M66592_CS_IDST) |
3471 |
+ m66592_bset(m66592, |
3472 |
+diff --git a/drivers/usb/host/ehci-sysfs.c b/drivers/usb/host/ehci-sysfs.c |
3473 |
+index 5e44407aa099..5216f2b09d63 100644 |
3474 |
+--- a/drivers/usb/host/ehci-sysfs.c |
3475 |
++++ b/drivers/usb/host/ehci-sysfs.c |
3476 |
+@@ -29,7 +29,7 @@ static ssize_t show_companion(struct device *dev, |
3477 |
+ int count = PAGE_SIZE; |
3478 |
+ char *ptr = buf; |
3479 |
+ |
3480 |
+- ehci = hcd_to_ehci(bus_to_hcd(dev_get_drvdata(dev))); |
3481 |
++ ehci = hcd_to_ehci(dev_get_drvdata(dev)); |
3482 |
+ nports = HCS_N_PORTS(ehci->hcs_params); |
3483 |
+ |
3484 |
+ for (index = 0; index < nports; ++index) { |
3485 |
+@@ -54,7 +54,7 @@ static ssize_t store_companion(struct device *dev, |
3486 |
+ struct ehci_hcd *ehci; |
3487 |
+ int portnum, new_owner; |
3488 |
+ |
3489 |
+- ehci = hcd_to_ehci(bus_to_hcd(dev_get_drvdata(dev))); |
3490 |
++ ehci = hcd_to_ehci(dev_get_drvdata(dev)); |
3491 |
+ new_owner = PORT_OWNER; /* Owned by companion */ |
3492 |
+ if (sscanf(buf, "%d", &portnum) != 1) |
3493 |
+ return -EINVAL; |
3494 |
+@@ -85,7 +85,7 @@ static ssize_t show_uframe_periodic_max(struct device *dev, |
3495 |
+ struct ehci_hcd *ehci; |
3496 |
+ int n; |
3497 |
+ |
3498 |
+- ehci = hcd_to_ehci(bus_to_hcd(dev_get_drvdata(dev))); |
3499 |
++ ehci = hcd_to_ehci(dev_get_drvdata(dev)); |
3500 |
+ n = scnprintf(buf, PAGE_SIZE, "%d\n", ehci->uframe_periodic_max); |
3501 |
+ return n; |
3502 |
+ } |
3503 |
+@@ -101,7 +101,7 @@ static ssize_t store_uframe_periodic_max(struct device *dev, |
3504 |
+ unsigned long flags; |
3505 |
+ ssize_t ret; |
3506 |
+ |
3507 |
+- ehci = hcd_to_ehci(bus_to_hcd(dev_get_drvdata(dev))); |
3508 |
++ ehci = hcd_to_ehci(dev_get_drvdata(dev)); |
3509 |
+ if (kstrtouint(buf, 0, &uframe_periodic_max) < 0) |
3510 |
+ return -EINVAL; |
3511 |
+ |
3512 |
+diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c |
3513 |
+index 4c8b3b82103d..a5a0376bbd48 100644 |
3514 |
+--- a/drivers/usb/serial/ftdi_sio.c |
3515 |
++++ b/drivers/usb/serial/ftdi_sio.c |
3516 |
+@@ -605,6 +605,10 @@ static const struct usb_device_id id_table_combined[] = { |
3517 |
+ { USB_DEVICE(FTDI_VID, FTDI_NT_ORIONLXM_PID), |
3518 |
+ .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk }, |
3519 |
+ { USB_DEVICE(FTDI_VID, FTDI_SYNAPSE_SS200_PID) }, |
3520 |
++ { USB_DEVICE(FTDI_VID, FTDI_CUSTOMWARE_MINIPLEX_PID) }, |
3521 |
++ { USB_DEVICE(FTDI_VID, FTDI_CUSTOMWARE_MINIPLEX2_PID) }, |
3522 |
++ { USB_DEVICE(FTDI_VID, FTDI_CUSTOMWARE_MINIPLEX2WI_PID) }, |
3523 |
++ { USB_DEVICE(FTDI_VID, FTDI_CUSTOMWARE_MINIPLEX3_PID) }, |
3524 |
+ /* |
3525 |
+ * ELV devices: |
3526 |
+ */ |
3527 |
+diff --git a/drivers/usb/serial/ftdi_sio_ids.h b/drivers/usb/serial/ftdi_sio_ids.h |
3528 |
+index 792e054126de..2943b97b2a83 100644 |
3529 |
+--- a/drivers/usb/serial/ftdi_sio_ids.h |
3530 |
++++ b/drivers/usb/serial/ftdi_sio_ids.h |
3531 |
+@@ -568,6 +568,14 @@ |
3532 |
+ */ |
3533 |
+ #define FTDI_SYNAPSE_SS200_PID 0x9090 /* SS200 - SNAP Stick 200 */ |
3534 |
+ |
3535 |
++/* |
3536 |
++ * CustomWare / ShipModul NMEA multiplexers product ids (FTDI_VID) |
3537 |
++ */ |
3538 |
++#define FTDI_CUSTOMWARE_MINIPLEX_PID 0xfd48 /* MiniPlex first generation NMEA Multiplexer */ |
3539 |
++#define FTDI_CUSTOMWARE_MINIPLEX2_PID 0xfd49 /* MiniPlex-USB and MiniPlex-2 series */ |
3540 |
++#define FTDI_CUSTOMWARE_MINIPLEX2WI_PID 0xfd4a /* MiniPlex-2Wi */ |
3541 |
++#define FTDI_CUSTOMWARE_MINIPLEX3_PID 0xfd4b /* MiniPlex-3 series */ |
3542 |
++ |
3543 |
+ |
3544 |
+ /********************************/ |
3545 |
+ /** third-party VID/PID combos **/ |
3546 |
+diff --git a/drivers/usb/serial/pl2303.c b/drivers/usb/serial/pl2303.c |
3547 |
+index f5257af33ecf..ae682e4eeaef 100644 |
3548 |
+--- a/drivers/usb/serial/pl2303.c |
3549 |
++++ b/drivers/usb/serial/pl2303.c |
3550 |
+@@ -362,21 +362,38 @@ static speed_t pl2303_encode_baud_rate_direct(unsigned char buf[4], |
3551 |
+ static speed_t pl2303_encode_baud_rate_divisor(unsigned char buf[4], |
3552 |
+ speed_t baud) |
3553 |
+ { |
3554 |
+- unsigned int tmp; |
3555 |
++ unsigned int baseline, mantissa, exponent; |
3556 |
+ |
3557 |
+ /* |
3558 |
+ * Apparently the formula is: |
3559 |
+- * baudrate = 12M * 32 / (2^buf[1]) / buf[0] |
3560 |
++ * baudrate = 12M * 32 / (mantissa * 4^exponent) |
3561 |
++ * where |
3562 |
++ * mantissa = buf[8:0] |
3563 |
++ * exponent = buf[11:9] |
3564 |
+ */ |
3565 |
+- tmp = 12000000 * 32 / baud; |
3566 |
++ baseline = 12000000 * 32; |
3567 |
++ mantissa = baseline / baud; |
3568 |
++ if (mantissa == 0) |
3569 |
++ mantissa = 1; /* Avoid dividing by zero if baud > 32*12M. */ |
3570 |
++ exponent = 0; |
3571 |
++ while (mantissa >= 512) { |
3572 |
++ if (exponent < 7) { |
3573 |
++ mantissa >>= 2; /* divide by 4 */ |
3574 |
++ exponent++; |
3575 |
++ } else { |
3576 |
++ /* Exponent is maxed. Trim mantissa and leave. */ |
3577 |
++ mantissa = 511; |
3578 |
++ break; |
3579 |
++ } |
3580 |
++ } |
3581 |
++ |
3582 |
+ buf[3] = 0x80; |
3583 |
+ buf[2] = 0; |
3584 |
+- buf[1] = (tmp >= 256); |
3585 |
+- while (tmp >= 256) { |
3586 |
+- tmp >>= 2; |
3587 |
+- buf[1] <<= 1; |
3588 |
+- } |
3589 |
+- buf[0] = tmp; |
3590 |
++ buf[1] = exponent << 1 | mantissa >> 8; |
3591 |
++ buf[0] = mantissa & 0xff; |
3592 |
++ |
3593 |
++ /* Calculate and return the exact baud rate. */ |
3594 |
++ baud = (baseline / mantissa) >> (exponent << 1); |
3595 |
+ |
3596 |
+ return baud; |
3597 |
+ } |
3598 |
+diff --git a/drivers/usb/serial/qcserial.c b/drivers/usb/serial/qcserial.c |
3599 |
+index d156545728c2..ebcec8cda858 100644 |
3600 |
+--- a/drivers/usb/serial/qcserial.c |
3601 |
++++ b/drivers/usb/serial/qcserial.c |
3602 |
+@@ -139,6 +139,7 @@ static const struct usb_device_id id_table[] = { |
3603 |
+ {USB_DEVICE(0x0AF0, 0x8120)}, /* Option GTM681W */ |
3604 |
+ |
3605 |
+ /* non-Gobi Sierra Wireless devices */ |
3606 |
++ {DEVICE_SWI(0x03f0, 0x4e1d)}, /* HP lt4111 LTE/EV-DO/HSPA+ Gobi 4G Module */ |
3607 |
+ {DEVICE_SWI(0x0f3d, 0x68a2)}, /* Sierra Wireless MC7700 */ |
3608 |
+ {DEVICE_SWI(0x114f, 0x68a2)}, /* Sierra Wireless MC7750 */ |
3609 |
+ {DEVICE_SWI(0x1199, 0x68a2)}, /* Sierra Wireless MC7710 */ |
3610 |
+diff --git a/drivers/usb/serial/symbolserial.c b/drivers/usb/serial/symbolserial.c |
3611 |
+index 8fceec7298e0..6ed804450a5a 100644 |
3612 |
+--- a/drivers/usb/serial/symbolserial.c |
3613 |
++++ b/drivers/usb/serial/symbolserial.c |
3614 |
+@@ -94,7 +94,7 @@ exit: |
3615 |
+ |
3616 |
+ static int symbol_open(struct tty_struct *tty, struct usb_serial_port *port) |
3617 |
+ { |
3618 |
+- struct symbol_private *priv = usb_get_serial_data(port->serial); |
3619 |
++ struct symbol_private *priv = usb_get_serial_port_data(port); |
3620 |
+ unsigned long flags; |
3621 |
+ int result = 0; |
3622 |
+ |
3623 |
+@@ -120,7 +120,7 @@ static void symbol_close(struct usb_serial_port *port) |
3624 |
+ static void symbol_throttle(struct tty_struct *tty) |
3625 |
+ { |
3626 |
+ struct usb_serial_port *port = tty->driver_data; |
3627 |
+- struct symbol_private *priv = usb_get_serial_data(port->serial); |
3628 |
++ struct symbol_private *priv = usb_get_serial_port_data(port); |
3629 |
+ |
3630 |
+ spin_lock_irq(&priv->lock); |
3631 |
+ priv->throttled = true; |
3632 |
+@@ -130,7 +130,7 @@ static void symbol_throttle(struct tty_struct *tty) |
3633 |
+ static void symbol_unthrottle(struct tty_struct *tty) |
3634 |
+ { |
3635 |
+ struct usb_serial_port *port = tty->driver_data; |
3636 |
+- struct symbol_private *priv = usb_get_serial_data(port->serial); |
3637 |
++ struct symbol_private *priv = usb_get_serial_port_data(port); |
3638 |
+ int result; |
3639 |
+ bool was_throttled; |
3640 |
+ |
3641 |
+diff --git a/fs/ceph/super.c b/fs/ceph/super.c |
3642 |
+index d1c833c321b9..7b6bfcbf801c 100644 |
3643 |
+--- a/fs/ceph/super.c |
3644 |
++++ b/fs/ceph/super.c |
3645 |
+@@ -479,7 +479,7 @@ static int ceph_show_options(struct seq_file *m, struct dentry *root) |
3646 |
+ if (fsopt->max_readdir_bytes != CEPH_MAX_READDIR_BYTES_DEFAULT) |
3647 |
+ seq_printf(m, ",readdir_max_bytes=%d", fsopt->max_readdir_bytes); |
3648 |
+ if (strcmp(fsopt->snapdir_name, CEPH_SNAPDIRNAME_DEFAULT)) |
3649 |
+- seq_printf(m, ",snapdirname=%s", fsopt->snapdir_name); |
3650 |
++ seq_show_option(m, "snapdirname", fsopt->snapdir_name); |
3651 |
+ |
3652 |
+ return 0; |
3653 |
+ } |
3654 |
+diff --git a/fs/cifs/cifsfs.c b/fs/cifs/cifsfs.c |
3655 |
+index 0a9fb6b53126..6a1119e87fbb 100644 |
3656 |
+--- a/fs/cifs/cifsfs.c |
3657 |
++++ b/fs/cifs/cifsfs.c |
3658 |
+@@ -394,17 +394,17 @@ cifs_show_options(struct seq_file *s, struct dentry *root) |
3659 |
+ struct sockaddr *srcaddr; |
3660 |
+ srcaddr = (struct sockaddr *)&tcon->ses->server->srcaddr; |
3661 |
+ |
3662 |
+- seq_printf(s, ",vers=%s", tcon->ses->server->vals->version_string); |
3663 |
++ seq_show_option(s, "vers", tcon->ses->server->vals->version_string); |
3664 |
+ cifs_show_security(s, tcon->ses); |
3665 |
+ cifs_show_cache_flavor(s, cifs_sb); |
3666 |
+ |
3667 |
+ if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_MULTIUSER) |
3668 |
+ seq_puts(s, ",multiuser"); |
3669 |
+ else if (tcon->ses->user_name) |
3670 |
+- seq_printf(s, ",username=%s", tcon->ses->user_name); |
3671 |
++ seq_show_option(s, "username", tcon->ses->user_name); |
3672 |
+ |
3673 |
+ if (tcon->ses->domainName) |
3674 |
+- seq_printf(s, ",domain=%s", tcon->ses->domainName); |
3675 |
++ seq_show_option(s, "domain", tcon->ses->domainName); |
3676 |
+ |
3677 |
+ if (srcaddr->sa_family != AF_UNSPEC) { |
3678 |
+ struct sockaddr_in *saddr4; |
3679 |
+diff --git a/fs/ext4/super.c b/fs/ext4/super.c |
3680 |
+index 58987b5c514b..9981064c4a54 100644 |
3681 |
+--- a/fs/ext4/super.c |
3682 |
++++ b/fs/ext4/super.c |
3683 |
+@@ -1763,10 +1763,10 @@ static inline void ext4_show_quota_options(struct seq_file *seq, |
3684 |
+ } |
3685 |
+ |
3686 |
+ if (sbi->s_qf_names[USRQUOTA]) |
3687 |
+- seq_printf(seq, ",usrjquota=%s", sbi->s_qf_names[USRQUOTA]); |
3688 |
++ seq_show_option(seq, "usrjquota", sbi->s_qf_names[USRQUOTA]); |
3689 |
+ |
3690 |
+ if (sbi->s_qf_names[GRPQUOTA]) |
3691 |
+- seq_printf(seq, ",grpjquota=%s", sbi->s_qf_names[GRPQUOTA]); |
3692 |
++ seq_show_option(seq, "grpjquota", sbi->s_qf_names[GRPQUOTA]); |
3693 |
+ #endif |
3694 |
+ } |
3695 |
+ |
3696 |
+diff --git a/fs/gfs2/super.c b/fs/gfs2/super.c |
3697 |
+index 2982445947e1..894fb01a91da 100644 |
3698 |
+--- a/fs/gfs2/super.c |
3699 |
++++ b/fs/gfs2/super.c |
3700 |
+@@ -1334,11 +1334,11 @@ static int gfs2_show_options(struct seq_file *s, struct dentry *root) |
3701 |
+ if (is_ancestor(root, sdp->sd_master_dir)) |
3702 |
+ seq_puts(s, ",meta"); |
3703 |
+ if (args->ar_lockproto[0]) |
3704 |
+- seq_printf(s, ",lockproto=%s", args->ar_lockproto); |
3705 |
++ seq_show_option(s, "lockproto", args->ar_lockproto); |
3706 |
+ if (args->ar_locktable[0]) |
3707 |
+- seq_printf(s, ",locktable=%s", args->ar_locktable); |
3708 |
++ seq_show_option(s, "locktable", args->ar_locktable); |
3709 |
+ if (args->ar_hostdata[0]) |
3710 |
+- seq_printf(s, ",hostdata=%s", args->ar_hostdata); |
3711 |
++ seq_show_option(s, "hostdata", args->ar_hostdata); |
3712 |
+ if (args->ar_spectator) |
3713 |
+ seq_puts(s, ",spectator"); |
3714 |
+ if (args->ar_localflocks) |
3715 |
+diff --git a/fs/hfs/super.c b/fs/hfs/super.c |
3716 |
+index 55c03b9e9070..4574fdd3d421 100644 |
3717 |
+--- a/fs/hfs/super.c |
3718 |
++++ b/fs/hfs/super.c |
3719 |
+@@ -136,9 +136,9 @@ static int hfs_show_options(struct seq_file *seq, struct dentry *root) |
3720 |
+ struct hfs_sb_info *sbi = HFS_SB(root->d_sb); |
3721 |
+ |
3722 |
+ if (sbi->s_creator != cpu_to_be32(0x3f3f3f3f)) |
3723 |
+- seq_printf(seq, ",creator=%.4s", (char *)&sbi->s_creator); |
3724 |
++ seq_show_option_n(seq, "creator", (char *)&sbi->s_creator, 4); |
3725 |
+ if (sbi->s_type != cpu_to_be32(0x3f3f3f3f)) |
3726 |
+- seq_printf(seq, ",type=%.4s", (char *)&sbi->s_type); |
3727 |
++ seq_show_option_n(seq, "type", (char *)&sbi->s_type, 4); |
3728 |
+ seq_printf(seq, ",uid=%u,gid=%u", |
3729 |
+ from_kuid_munged(&init_user_ns, sbi->s_uid), |
3730 |
+ from_kgid_munged(&init_user_ns, sbi->s_gid)); |
3731 |
+diff --git a/fs/hfsplus/options.c b/fs/hfsplus/options.c |
3732 |
+index c90b72ee676d..bb806e58c977 100644 |
3733 |
+--- a/fs/hfsplus/options.c |
3734 |
++++ b/fs/hfsplus/options.c |
3735 |
+@@ -218,9 +218,9 @@ int hfsplus_show_options(struct seq_file *seq, struct dentry *root) |
3736 |
+ struct hfsplus_sb_info *sbi = HFSPLUS_SB(root->d_sb); |
3737 |
+ |
3738 |
+ if (sbi->creator != HFSPLUS_DEF_CR_TYPE) |
3739 |
+- seq_printf(seq, ",creator=%.4s", (char *)&sbi->creator); |
3740 |
++ seq_show_option_n(seq, "creator", (char *)&sbi->creator, 4); |
3741 |
+ if (sbi->type != HFSPLUS_DEF_CR_TYPE) |
3742 |
+- seq_printf(seq, ",type=%.4s", (char *)&sbi->type); |
3743 |
++ seq_show_option_n(seq, "type", (char *)&sbi->type, 4); |
3744 |
+ seq_printf(seq, ",umask=%o,uid=%u,gid=%u", sbi->umask, |
3745 |
+ from_kuid_munged(&init_user_ns, sbi->uid), |
3746 |
+ from_kgid_munged(&init_user_ns, sbi->gid)); |
3747 |
+diff --git a/fs/hostfs/hostfs_kern.c b/fs/hostfs/hostfs_kern.c |
3748 |
+index 059597b23f67..2ac99db3750e 100644 |
3749 |
+--- a/fs/hostfs/hostfs_kern.c |
3750 |
++++ b/fs/hostfs/hostfs_kern.c |
3751 |
+@@ -260,7 +260,7 @@ static int hostfs_show_options(struct seq_file *seq, struct dentry *root) |
3752 |
+ size_t offset = strlen(root_ino) + 1; |
3753 |
+ |
3754 |
+ if (strlen(root_path) > offset) |
3755 |
+- seq_printf(seq, ",%s", root_path + offset); |
3756 |
++ seq_show_option(seq, root_path + offset, NULL); |
3757 |
+ |
3758 |
+ if (append) |
3759 |
+ seq_puts(seq, ",append"); |
3760 |
+diff --git a/fs/hpfs/namei.c b/fs/hpfs/namei.c |
3761 |
+index a0872f239f04..9e92c9c2d319 100644 |
3762 |
+--- a/fs/hpfs/namei.c |
3763 |
++++ b/fs/hpfs/namei.c |
3764 |
+@@ -8,6 +8,17 @@ |
3765 |
+ #include <linux/sched.h> |
3766 |
+ #include "hpfs_fn.h" |
3767 |
+ |
3768 |
++static void hpfs_update_directory_times(struct inode *dir) |
3769 |
++{ |
3770 |
++ time_t t = get_seconds(); |
3771 |
++ if (t == dir->i_mtime.tv_sec && |
3772 |
++ t == dir->i_ctime.tv_sec) |
3773 |
++ return; |
3774 |
++ dir->i_mtime.tv_sec = dir->i_ctime.tv_sec = t; |
3775 |
++ dir->i_mtime.tv_nsec = dir->i_ctime.tv_nsec = 0; |
3776 |
++ hpfs_write_inode_nolock(dir); |
3777 |
++} |
3778 |
++ |
3779 |
+ static int hpfs_mkdir(struct inode *dir, struct dentry *dentry, umode_t mode) |
3780 |
+ { |
3781 |
+ const unsigned char *name = dentry->d_name.name; |
3782 |
+@@ -99,6 +110,7 @@ static int hpfs_mkdir(struct inode *dir, struct dentry *dentry, umode_t mode) |
3783 |
+ result->i_mode = mode | S_IFDIR; |
3784 |
+ hpfs_write_inode_nolock(result); |
3785 |
+ } |
3786 |
++ hpfs_update_directory_times(dir); |
3787 |
+ d_instantiate(dentry, result); |
3788 |
+ hpfs_unlock(dir->i_sb); |
3789 |
+ return 0; |
3790 |
+@@ -187,6 +199,7 @@ static int hpfs_create(struct inode *dir, struct dentry *dentry, umode_t mode, b |
3791 |
+ result->i_mode = mode | S_IFREG; |
3792 |
+ hpfs_write_inode_nolock(result); |
3793 |
+ } |
3794 |
++ hpfs_update_directory_times(dir); |
3795 |
+ d_instantiate(dentry, result); |
3796 |
+ hpfs_unlock(dir->i_sb); |
3797 |
+ return 0; |
3798 |
+@@ -262,6 +275,7 @@ static int hpfs_mknod(struct inode *dir, struct dentry *dentry, umode_t mode, de |
3799 |
+ insert_inode_hash(result); |
3800 |
+ |
3801 |
+ hpfs_write_inode_nolock(result); |
3802 |
++ hpfs_update_directory_times(dir); |
3803 |
+ d_instantiate(dentry, result); |
3804 |
+ brelse(bh); |
3805 |
+ hpfs_unlock(dir->i_sb); |
3806 |
+@@ -340,6 +354,7 @@ static int hpfs_symlink(struct inode *dir, struct dentry *dentry, const char *sy |
3807 |
+ insert_inode_hash(result); |
3808 |
+ |
3809 |
+ hpfs_write_inode_nolock(result); |
3810 |
++ hpfs_update_directory_times(dir); |
3811 |
+ d_instantiate(dentry, result); |
3812 |
+ hpfs_unlock(dir->i_sb); |
3813 |
+ return 0; |
3814 |
+@@ -423,6 +438,8 @@ again: |
3815 |
+ out1: |
3816 |
+ hpfs_brelse4(&qbh); |
3817 |
+ out: |
3818 |
++ if (!err) |
3819 |
++ hpfs_update_directory_times(dir); |
3820 |
+ hpfs_unlock(dir->i_sb); |
3821 |
+ return err; |
3822 |
+ } |
3823 |
+@@ -477,6 +494,8 @@ static int hpfs_rmdir(struct inode *dir, struct dentry *dentry) |
3824 |
+ out1: |
3825 |
+ hpfs_brelse4(&qbh); |
3826 |
+ out: |
3827 |
++ if (!err) |
3828 |
++ hpfs_update_directory_times(dir); |
3829 |
+ hpfs_unlock(dir->i_sb); |
3830 |
+ return err; |
3831 |
+ } |
3832 |
+@@ -595,7 +614,7 @@ static int hpfs_rename(struct inode *old_dir, struct dentry *old_dentry, |
3833 |
+ goto end1; |
3834 |
+ } |
3835 |
+ |
3836 |
+- end: |
3837 |
++end: |
3838 |
+ hpfs_i(i)->i_parent_dir = new_dir->i_ino; |
3839 |
+ if (S_ISDIR(i->i_mode)) { |
3840 |
+ inc_nlink(new_dir); |
3841 |
+@@ -610,6 +629,10 @@ static int hpfs_rename(struct inode *old_dir, struct dentry *old_dentry, |
3842 |
+ brelse(bh); |
3843 |
+ } |
3844 |
+ end1: |
3845 |
++ if (!err) { |
3846 |
++ hpfs_update_directory_times(old_dir); |
3847 |
++ hpfs_update_directory_times(new_dir); |
3848 |
++ } |
3849 |
+ hpfs_unlock(i->i_sb); |
3850 |
+ return err; |
3851 |
+ } |
3852 |
+diff --git a/fs/libfs.c b/fs/libfs.c |
3853 |
+index 102edfd39000..c7cbfb092e94 100644 |
3854 |
+--- a/fs/libfs.c |
3855 |
++++ b/fs/libfs.c |
3856 |
+@@ -1185,7 +1185,7 @@ void make_empty_dir_inode(struct inode *inode) |
3857 |
+ inode->i_uid = GLOBAL_ROOT_UID; |
3858 |
+ inode->i_gid = GLOBAL_ROOT_GID; |
3859 |
+ inode->i_rdev = 0; |
3860 |
+- inode->i_size = 2; |
3861 |
++ inode->i_size = 0; |
3862 |
+ inode->i_blkbits = PAGE_SHIFT; |
3863 |
+ inode->i_blocks = 0; |
3864 |
+ |
3865 |
+diff --git a/fs/ocfs2/file.c b/fs/ocfs2/file.c |
3866 |
+index 719f7f4c7a37..33efa334ec76 100644 |
3867 |
+--- a/fs/ocfs2/file.c |
3868 |
++++ b/fs/ocfs2/file.c |
3869 |
+@@ -2372,6 +2372,20 @@ relock: |
3870 |
+ /* buffered aio wouldn't have proper lock coverage today */ |
3871 |
+ BUG_ON(written == -EIOCBQUEUED && !(iocb->ki_flags & IOCB_DIRECT)); |
3872 |
+ |
3873 |
++ /* |
3874 |
++ * deep in g_f_a_w_n()->ocfs2_direct_IO we pass in a ocfs2_dio_end_io |
3875 |
++ * function pointer which is called when o_direct io completes so that |
3876 |
++ * it can unlock our rw lock. |
3877 |
++ * Unfortunately there are error cases which call end_io and others |
3878 |
++ * that don't. so we don't have to unlock the rw_lock if either an |
3879 |
++ * async dio is going to do it in the future or an end_io after an |
3880 |
++ * error has already done it. |
3881 |
++ */ |
3882 |
++ if ((written == -EIOCBQUEUED) || (!ocfs2_iocb_is_rw_locked(iocb))) { |
3883 |
++ rw_level = -1; |
3884 |
++ unaligned_dio = 0; |
3885 |
++ } |
3886 |
++ |
3887 |
+ if (unlikely(written <= 0)) |
3888 |
+ goto no_sync; |
3889 |
+ |
3890 |
+@@ -2396,20 +2410,6 @@ relock: |
3891 |
+ } |
3892 |
+ |
3893 |
+ no_sync: |
3894 |
+- /* |
3895 |
+- * deep in g_f_a_w_n()->ocfs2_direct_IO we pass in a ocfs2_dio_end_io |
3896 |
+- * function pointer which is called when o_direct io completes so that |
3897 |
+- * it can unlock our rw lock. |
3898 |
+- * Unfortunately there are error cases which call end_io and others |
3899 |
+- * that don't. so we don't have to unlock the rw_lock if either an |
3900 |
+- * async dio is going to do it in the future or an end_io after an |
3901 |
+- * error has already done it. |
3902 |
+- */ |
3903 |
+- if ((ret == -EIOCBQUEUED) || (!ocfs2_iocb_is_rw_locked(iocb))) { |
3904 |
+- rw_level = -1; |
3905 |
+- unaligned_dio = 0; |
3906 |
+- } |
3907 |
+- |
3908 |
+ if (unaligned_dio) { |
3909 |
+ ocfs2_iocb_clear_unaligned_aio(iocb); |
3910 |
+ mutex_unlock(&OCFS2_I(inode)->ip_unaligned_aio); |
3911 |
+diff --git a/fs/ocfs2/super.c b/fs/ocfs2/super.c |
3912 |
+index 403c5660b306..a482e312c7b2 100644 |
3913 |
+--- a/fs/ocfs2/super.c |
3914 |
++++ b/fs/ocfs2/super.c |
3915 |
+@@ -1550,8 +1550,8 @@ static int ocfs2_show_options(struct seq_file *s, struct dentry *root) |
3916 |
+ seq_printf(s, ",localflocks,"); |
3917 |
+ |
3918 |
+ if (osb->osb_cluster_stack[0]) |
3919 |
+- seq_printf(s, ",cluster_stack=%.*s", OCFS2_STACK_LABEL_LEN, |
3920 |
+- osb->osb_cluster_stack); |
3921 |
++ seq_show_option_n(s, "cluster_stack", osb->osb_cluster_stack, |
3922 |
++ OCFS2_STACK_LABEL_LEN); |
3923 |
+ if (opts & OCFS2_MOUNT_USRQUOTA) |
3924 |
+ seq_printf(s, ",usrquota"); |
3925 |
+ if (opts & OCFS2_MOUNT_GRPQUOTA) |
3926 |
+diff --git a/fs/overlayfs/super.c b/fs/overlayfs/super.c |
3927 |
+index 7466ff339c66..79073d68b475 100644 |
3928 |
+--- a/fs/overlayfs/super.c |
3929 |
++++ b/fs/overlayfs/super.c |
3930 |
+@@ -588,10 +588,10 @@ static int ovl_show_options(struct seq_file *m, struct dentry *dentry) |
3931 |
+ struct super_block *sb = dentry->d_sb; |
3932 |
+ struct ovl_fs *ufs = sb->s_fs_info; |
3933 |
+ |
3934 |
+- seq_printf(m, ",lowerdir=%s", ufs->config.lowerdir); |
3935 |
++ seq_show_option(m, "lowerdir", ufs->config.lowerdir); |
3936 |
+ if (ufs->config.upperdir) { |
3937 |
+- seq_printf(m, ",upperdir=%s", ufs->config.upperdir); |
3938 |
+- seq_printf(m, ",workdir=%s", ufs->config.workdir); |
3939 |
++ seq_show_option(m, "upperdir", ufs->config.upperdir); |
3940 |
++ seq_show_option(m, "workdir", ufs->config.workdir); |
3941 |
+ } |
3942 |
+ return 0; |
3943 |
+ } |
3944 |
+diff --git a/fs/reiserfs/super.c b/fs/reiserfs/super.c |
3945 |
+index 0e4cf728126f..4a62fe8cc3bf 100644 |
3946 |
+--- a/fs/reiserfs/super.c |
3947 |
++++ b/fs/reiserfs/super.c |
3948 |
+@@ -714,18 +714,20 @@ static int reiserfs_show_options(struct seq_file *seq, struct dentry *root) |
3949 |
+ seq_puts(seq, ",acl"); |
3950 |
+ |
3951 |
+ if (REISERFS_SB(s)->s_jdev) |
3952 |
+- seq_printf(seq, ",jdev=%s", REISERFS_SB(s)->s_jdev); |
3953 |
++ seq_show_option(seq, "jdev", REISERFS_SB(s)->s_jdev); |
3954 |
+ |
3955 |
+ if (journal->j_max_commit_age != journal->j_default_max_commit_age) |
3956 |
+ seq_printf(seq, ",commit=%d", journal->j_max_commit_age); |
3957 |
+ |
3958 |
+ #ifdef CONFIG_QUOTA |
3959 |
+ if (REISERFS_SB(s)->s_qf_names[USRQUOTA]) |
3960 |
+- seq_printf(seq, ",usrjquota=%s", REISERFS_SB(s)->s_qf_names[USRQUOTA]); |
3961 |
++ seq_show_option(seq, "usrjquota", |
3962 |
++ REISERFS_SB(s)->s_qf_names[USRQUOTA]); |
3963 |
+ else if (opts & (1 << REISERFS_USRQUOTA)) |
3964 |
+ seq_puts(seq, ",usrquota"); |
3965 |
+ if (REISERFS_SB(s)->s_qf_names[GRPQUOTA]) |
3966 |
+- seq_printf(seq, ",grpjquota=%s", REISERFS_SB(s)->s_qf_names[GRPQUOTA]); |
3967 |
++ seq_show_option(seq, "grpjquota", |
3968 |
++ REISERFS_SB(s)->s_qf_names[GRPQUOTA]); |
3969 |
+ else if (opts & (1 << REISERFS_GRPQUOTA)) |
3970 |
+ seq_puts(seq, ",grpquota"); |
3971 |
+ if (REISERFS_SB(s)->s_jquota_fmt) { |
3972 |
+diff --git a/fs/xfs/libxfs/xfs_da_format.h b/fs/xfs/libxfs/xfs_da_format.h |
3973 |
+index 74bcbabfa523..b14bbd6bb05f 100644 |
3974 |
+--- a/fs/xfs/libxfs/xfs_da_format.h |
3975 |
++++ b/fs/xfs/libxfs/xfs_da_format.h |
3976 |
+@@ -680,8 +680,15 @@ typedef struct xfs_attr_leaf_name_remote { |
3977 |
+ typedef struct xfs_attr_leafblock { |
3978 |
+ xfs_attr_leaf_hdr_t hdr; /* constant-structure header block */ |
3979 |
+ xfs_attr_leaf_entry_t entries[1]; /* sorted on key, not name */ |
3980 |
+- xfs_attr_leaf_name_local_t namelist; /* grows from bottom of buf */ |
3981 |
+- xfs_attr_leaf_name_remote_t valuelist; /* grows from bottom of buf */ |
3982 |
++ /* |
3983 |
++ * The rest of the block contains the following structures after the |
3984 |
++ * leaf entries, growing from the bottom up. The variables are never |
3985 |
++ * referenced and definining them can actually make gcc optimize away |
3986 |
++ * accesses to the 'entries' array above index 0 so don't do that. |
3987 |
++ * |
3988 |
++ * xfs_attr_leaf_name_local_t namelist; |
3989 |
++ * xfs_attr_leaf_name_remote_t valuelist; |
3990 |
++ */ |
3991 |
+ } xfs_attr_leafblock_t; |
3992 |
+ |
3993 |
+ /* |
3994 |
+diff --git a/fs/xfs/libxfs/xfs_dir2_data.c b/fs/xfs/libxfs/xfs_dir2_data.c |
3995 |
+index de1ea16f5748..534bbf283d6b 100644 |
3996 |
+--- a/fs/xfs/libxfs/xfs_dir2_data.c |
3997 |
++++ b/fs/xfs/libxfs/xfs_dir2_data.c |
3998 |
+@@ -252,7 +252,8 @@ xfs_dir3_data_reada_verify( |
3999 |
+ return; |
4000 |
+ case cpu_to_be32(XFS_DIR2_DATA_MAGIC): |
4001 |
+ case cpu_to_be32(XFS_DIR3_DATA_MAGIC): |
4002 |
+- xfs_dir3_data_verify(bp); |
4003 |
++ bp->b_ops = &xfs_dir3_data_buf_ops; |
4004 |
++ bp->b_ops->verify_read(bp); |
4005 |
+ return; |
4006 |
+ default: |
4007 |
+ xfs_buf_ioerror(bp, -EFSCORRUPTED); |
4008 |
+diff --git a/fs/xfs/libxfs/xfs_dir2_node.c b/fs/xfs/libxfs/xfs_dir2_node.c |
4009 |
+index 41b80d3d3877..06bb4218b362 100644 |
4010 |
+--- a/fs/xfs/libxfs/xfs_dir2_node.c |
4011 |
++++ b/fs/xfs/libxfs/xfs_dir2_node.c |
4012 |
+@@ -2132,6 +2132,7 @@ xfs_dir2_node_replace( |
4013 |
+ int error; /* error return value */ |
4014 |
+ int i; /* btree level */ |
4015 |
+ xfs_ino_t inum; /* new inode number */ |
4016 |
++ int ftype; /* new file type */ |
4017 |
+ xfs_dir2_leaf_t *leaf; /* leaf structure */ |
4018 |
+ xfs_dir2_leaf_entry_t *lep; /* leaf entry being changed */ |
4019 |
+ int rval; /* internal return value */ |
4020 |
+@@ -2145,7 +2146,14 @@ xfs_dir2_node_replace( |
4021 |
+ state = xfs_da_state_alloc(); |
4022 |
+ state->args = args; |
4023 |
+ state->mp = args->dp->i_mount; |
4024 |
++ |
4025 |
++ /* |
4026 |
++ * We have to save new inode number and ftype since |
4027 |
++ * xfs_da3_node_lookup_int() is going to overwrite them |
4028 |
++ */ |
4029 |
+ inum = args->inumber; |
4030 |
++ ftype = args->filetype; |
4031 |
++ |
4032 |
+ /* |
4033 |
+ * Lookup the entry to change in the btree. |
4034 |
+ */ |
4035 |
+@@ -2183,7 +2191,7 @@ xfs_dir2_node_replace( |
4036 |
+ * Fill in the new inode number and log the entry. |
4037 |
+ */ |
4038 |
+ dep->inumber = cpu_to_be64(inum); |
4039 |
+- args->dp->d_ops->data_put_ftype(dep, args->filetype); |
4040 |
++ args->dp->d_ops->data_put_ftype(dep, ftype); |
4041 |
+ xfs_dir2_data_log_entry(args, state->extrablk.bp, dep); |
4042 |
+ rval = 0; |
4043 |
+ } |
4044 |
+diff --git a/fs/xfs/xfs_aops.c b/fs/xfs/xfs_aops.c |
4045 |
+index 3859f5e27a4d..458fced2c0f9 100644 |
4046 |
+--- a/fs/xfs/xfs_aops.c |
4047 |
++++ b/fs/xfs/xfs_aops.c |
4048 |
+@@ -356,7 +356,8 @@ xfs_end_bio( |
4049 |
+ { |
4050 |
+ xfs_ioend_t *ioend = bio->bi_private; |
4051 |
+ |
4052 |
+- ioend->io_error = test_bit(BIO_UPTODATE, &bio->bi_flags) ? 0 : error; |
4053 |
++ if (!ioend->io_error && !test_bit(BIO_UPTODATE, &bio->bi_flags)) |
4054 |
++ ioend->io_error = error; |
4055 |
+ |
4056 |
+ /* Toss bio and pass work off to an xfsdatad thread */ |
4057 |
+ bio->bi_private = NULL; |
4058 |
+diff --git a/fs/xfs/xfs_super.c b/fs/xfs/xfs_super.c |
4059 |
+index 1fb16562c159..bbd9b1f10ffb 100644 |
4060 |
+--- a/fs/xfs/xfs_super.c |
4061 |
++++ b/fs/xfs/xfs_super.c |
4062 |
+@@ -511,9 +511,9 @@ xfs_showargs( |
4063 |
+ seq_printf(m, "," MNTOPT_LOGBSIZE "=%dk", mp->m_logbsize >> 10); |
4064 |
+ |
4065 |
+ if (mp->m_logname) |
4066 |
+- seq_printf(m, "," MNTOPT_LOGDEV "=%s", mp->m_logname); |
4067 |
++ seq_show_option(m, MNTOPT_LOGDEV, mp->m_logname); |
4068 |
+ if (mp->m_rtname) |
4069 |
+- seq_printf(m, "," MNTOPT_RTDEV "=%s", mp->m_rtname); |
4070 |
++ seq_show_option(m, MNTOPT_RTDEV, mp->m_rtname); |
4071 |
+ |
4072 |
+ if (mp->m_dalign > 0) |
4073 |
+ seq_printf(m, "," MNTOPT_SUNIT "=%d", |
4074 |
+diff --git a/include/linux/acpi.h b/include/linux/acpi.h |
4075 |
+index d2445fa9999f..0b2394f61af4 100644 |
4076 |
+--- a/include/linux/acpi.h |
4077 |
++++ b/include/linux/acpi.h |
4078 |
+@@ -221,7 +221,7 @@ struct pci_dev; |
4079 |
+ |
4080 |
+ int acpi_pci_irq_enable (struct pci_dev *dev); |
4081 |
+ void acpi_penalize_isa_irq(int irq, int active); |
4082 |
+- |
4083 |
++void acpi_penalize_sci_irq(int irq, int trigger, int polarity); |
4084 |
+ void acpi_pci_irq_disable (struct pci_dev *dev); |
4085 |
+ |
4086 |
+ extern int ec_read(u8 addr, u8 *val); |
4087 |
+diff --git a/include/linux/iio/iio.h b/include/linux/iio/iio.h |
4088 |
+index f79148261d16..7bb7f673cb3f 100644 |
4089 |
+--- a/include/linux/iio/iio.h |
4090 |
++++ b/include/linux/iio/iio.h |
4091 |
+@@ -645,6 +645,15 @@ int iio_str_to_fixpoint(const char *str, int fract_mult, int *integer, |
4092 |
+ #define IIO_DEGREE_TO_RAD(deg) (((deg) * 314159ULL + 9000000ULL) / 18000000ULL) |
4093 |
+ |
4094 |
+ /** |
4095 |
++ * IIO_RAD_TO_DEGREE() - Convert rad to degree |
4096 |
++ * @rad: A value in rad |
4097 |
++ * |
4098 |
++ * Returns the given value converted from rad to degree |
4099 |
++ */ |
4100 |
++#define IIO_RAD_TO_DEGREE(rad) \ |
4101 |
++ (((rad) * 18000000ULL + 314159ULL / 2) / 314159ULL) |
4102 |
++ |
4103 |
++/** |
4104 |
+ * IIO_G_TO_M_S_2() - Convert g to meter / second**2 |
4105 |
+ * @g: A value in g |
4106 |
+ * |
4107 |
+@@ -652,4 +661,12 @@ int iio_str_to_fixpoint(const char *str, int fract_mult, int *integer, |
4108 |
+ */ |
4109 |
+ #define IIO_G_TO_M_S_2(g) ((g) * 980665ULL / 100000ULL) |
4110 |
+ |
4111 |
++/** |
4112 |
++ * IIO_M_S_2_TO_G() - Convert meter / second**2 to g |
4113 |
++ * @ms2: A value in meter / second**2 |
4114 |
++ * |
4115 |
++ * Returns the given value converted from meter / second**2 to g |
4116 |
++ */ |
4117 |
++#define IIO_M_S_2_TO_G(ms2) (((ms2) * 100000ULL + 980665ULL / 2) / 980665ULL) |
4118 |
++ |
4119 |
+ #endif /* _INDUSTRIAL_IO_H_ */ |
4120 |
+diff --git a/include/linux/pci.h b/include/linux/pci.h |
4121 |
+index 860c751810fc..1d4eb6057f72 100644 |
4122 |
+--- a/include/linux/pci.h |
4123 |
++++ b/include/linux/pci.h |
4124 |
+@@ -180,6 +180,8 @@ enum pci_dev_flags { |
4125 |
+ PCI_DEV_FLAGS_NO_BUS_RESET = (__force pci_dev_flags_t) (1 << 6), |
4126 |
+ /* Do not use PM reset even if device advertises NoSoftRst- */ |
4127 |
+ PCI_DEV_FLAGS_NO_PM_RESET = (__force pci_dev_flags_t) (1 << 7), |
4128 |
++ /* Get VPD from function 0 VPD */ |
4129 |
++ PCI_DEV_FLAGS_VPD_REF_F0 = (__force pci_dev_flags_t) (1 << 8), |
4130 |
+ }; |
4131 |
+ |
4132 |
+ enum pci_irq_reroute_variant { |
4133 |
+diff --git a/include/linux/seq_file.h b/include/linux/seq_file.h |
4134 |
+index 912a7c482649..d4c7271382cb 100644 |
4135 |
+--- a/include/linux/seq_file.h |
4136 |
++++ b/include/linux/seq_file.h |
4137 |
+@@ -149,6 +149,41 @@ static inline struct user_namespace *seq_user_ns(struct seq_file *seq) |
4138 |
+ #endif |
4139 |
+ } |
4140 |
+ |
4141 |
++/** |
4142 |
++ * seq_show_options - display mount options with appropriate escapes. |
4143 |
++ * @m: the seq_file handle |
4144 |
++ * @name: the mount option name |
4145 |
++ * @value: the mount option name's value, can be NULL |
4146 |
++ */ |
4147 |
++static inline void seq_show_option(struct seq_file *m, const char *name, |
4148 |
++ const char *value) |
4149 |
++{ |
4150 |
++ seq_putc(m, ','); |
4151 |
++ seq_escape(m, name, ",= \t\n\\"); |
4152 |
++ if (value) { |
4153 |
++ seq_putc(m, '='); |
4154 |
++ seq_escape(m, value, ", \t\n\\"); |
4155 |
++ } |
4156 |
++} |
4157 |
++ |
4158 |
++/** |
4159 |
++ * seq_show_option_n - display mount options with appropriate escapes |
4160 |
++ * where @value must be a specific length. |
4161 |
++ * @m: the seq_file handle |
4162 |
++ * @name: the mount option name |
4163 |
++ * @value: the mount option name's value, cannot be NULL |
4164 |
++ * @length: the length of @value to display |
4165 |
++ * |
4166 |
++ * This is a macro since this uses "length" to define the size of the |
4167 |
++ * stack buffer. |
4168 |
++ */ |
4169 |
++#define seq_show_option_n(m, name, value, length) { \ |
4170 |
++ char val_buf[length + 1]; \ |
4171 |
++ strncpy(val_buf, value, length); \ |
4172 |
++ val_buf[length] = '\0'; \ |
4173 |
++ seq_show_option(m, name, val_buf); \ |
4174 |
++} |
4175 |
++ |
4176 |
+ #define SEQ_START_TOKEN ((void *)1) |
4177 |
+ /* |
4178 |
+ * Helpers for iteration over list_head-s in seq_files |
4179 |
+diff --git a/include/uapi/linux/dm-ioctl.h b/include/uapi/linux/dm-ioctl.h |
4180 |
+index 061aca3a962d..d34611e35a30 100644 |
4181 |
+--- a/include/uapi/linux/dm-ioctl.h |
4182 |
++++ b/include/uapi/linux/dm-ioctl.h |
4183 |
+@@ -267,9 +267,9 @@ enum { |
4184 |
+ #define DM_DEV_SET_GEOMETRY _IOWR(DM_IOCTL, DM_DEV_SET_GEOMETRY_CMD, struct dm_ioctl) |
4185 |
+ |
4186 |
+ #define DM_VERSION_MAJOR 4 |
4187 |
+-#define DM_VERSION_MINOR 32 |
4188 |
++#define DM_VERSION_MINOR 33 |
4189 |
+ #define DM_VERSION_PATCHLEVEL 0 |
4190 |
+-#define DM_VERSION_EXTRA "-ioctl (2015-6-26)" |
4191 |
++#define DM_VERSION_EXTRA "-ioctl (2015-8-18)" |
4192 |
+ |
4193 |
+ /* Status bits */ |
4194 |
+ #define DM_READONLY_FLAG (1 << 0) /* In/Out */ |
4195 |
+diff --git a/kernel/cgroup.c b/kernel/cgroup.c |
4196 |
+index f89d9292eee6..c6c4240e7d28 100644 |
4197 |
+--- a/kernel/cgroup.c |
4198 |
++++ b/kernel/cgroup.c |
4199 |
+@@ -1334,7 +1334,7 @@ static int cgroup_show_options(struct seq_file *seq, |
4200 |
+ |
4201 |
+ for_each_subsys(ss, ssid) |
4202 |
+ if (root->subsys_mask & (1 << ssid)) |
4203 |
+- seq_printf(seq, ",%s", ss->name); |
4204 |
++ seq_show_option(seq, ss->name, NULL); |
4205 |
+ if (root->flags & CGRP_ROOT_NOPREFIX) |
4206 |
+ seq_puts(seq, ",noprefix"); |
4207 |
+ if (root->flags & CGRP_ROOT_XATTR) |
4208 |
+@@ -1342,13 +1342,14 @@ static int cgroup_show_options(struct seq_file *seq, |
4209 |
+ |
4210 |
+ spin_lock(&release_agent_path_lock); |
4211 |
+ if (strlen(root->release_agent_path)) |
4212 |
+- seq_printf(seq, ",release_agent=%s", root->release_agent_path); |
4213 |
++ seq_show_option(seq, "release_agent", |
4214 |
++ root->release_agent_path); |
4215 |
+ spin_unlock(&release_agent_path_lock); |
4216 |
+ |
4217 |
+ if (test_bit(CGRP_CPUSET_CLONE_CHILDREN, &root->cgrp.flags)) |
4218 |
+ seq_puts(seq, ",clone_children"); |
4219 |
+ if (strlen(root->name)) |
4220 |
+- seq_printf(seq, ",name=%s", root->name); |
4221 |
++ seq_show_option(seq, "name", root->name); |
4222 |
+ return 0; |
4223 |
+ } |
4224 |
+ |
4225 |
+diff --git a/kernel/sched/core.c b/kernel/sched/core.c |
4226 |
+index 78b4bad10081..e9673433cc01 100644 |
4227 |
+--- a/kernel/sched/core.c |
4228 |
++++ b/kernel/sched/core.c |
4229 |
+@@ -5433,6 +5433,14 @@ static int sched_cpu_active(struct notifier_block *nfb, |
4230 |
+ case CPU_STARTING: |
4231 |
+ set_cpu_rq_start_time(); |
4232 |
+ return NOTIFY_OK; |
4233 |
++ case CPU_ONLINE: |
4234 |
++ /* |
4235 |
++ * At this point a starting CPU has marked itself as online via |
4236 |
++ * set_cpu_online(). But it might not yet have marked itself |
4237 |
++ * as active, which is essential from here on. |
4238 |
++ * |
4239 |
++ * Thus, fall-through and help the starting CPU along. |
4240 |
++ */ |
4241 |
+ case CPU_DOWN_FAILED: |
4242 |
+ set_cpu_active((long)hcpu, true); |
4243 |
+ return NOTIFY_OK; |
4244 |
+diff --git a/mm/memory_hotplug.c b/mm/memory_hotplug.c |
4245 |
+index 6da82bcb0a8b..8fd97dac538a 100644 |
4246 |
+--- a/mm/memory_hotplug.c |
4247 |
++++ b/mm/memory_hotplug.c |
4248 |
+@@ -1248,6 +1248,14 @@ int __ref add_memory(int nid, u64 start, u64 size) |
4249 |
+ |
4250 |
+ mem_hotplug_begin(); |
4251 |
+ |
4252 |
++ /* |
4253 |
++ * Add new range to memblock so that when hotadd_new_pgdat() is called |
4254 |
++ * to allocate new pgdat, get_pfn_range_for_nid() will be able to find |
4255 |
++ * this new range and calculate total pages correctly. The range will |
4256 |
++ * be removed at hot-remove time. |
4257 |
++ */ |
4258 |
++ memblock_add_node(start, size, nid); |
4259 |
++ |
4260 |
+ new_node = !node_online(nid); |
4261 |
+ if (new_node) { |
4262 |
+ pgdat = hotadd_new_pgdat(nid, start); |
4263 |
+@@ -1277,7 +1285,6 @@ int __ref add_memory(int nid, u64 start, u64 size) |
4264 |
+ |
4265 |
+ /* create new memmap entry */ |
4266 |
+ firmware_map_add_hotplug(start, start + size, "System RAM"); |
4267 |
+- memblock_add_node(start, size, nid); |
4268 |
+ |
4269 |
+ goto out; |
4270 |
+ |
4271 |
+@@ -1286,6 +1293,7 @@ error: |
4272 |
+ if (new_pgdat) |
4273 |
+ rollback_node_hotadd(nid, pgdat); |
4274 |
+ release_memory_resource(res); |
4275 |
++ memblock_remove(start, size); |
4276 |
+ |
4277 |
+ out: |
4278 |
+ mem_hotplug_done(); |
4279 |
+diff --git a/net/ceph/ceph_common.c b/net/ceph/ceph_common.c |
4280 |
+index f30329f72641..69a4d30a9ccf 100644 |
4281 |
+--- a/net/ceph/ceph_common.c |
4282 |
++++ b/net/ceph/ceph_common.c |
4283 |
+@@ -517,8 +517,11 @@ int ceph_print_client_options(struct seq_file *m, struct ceph_client *client) |
4284 |
+ struct ceph_options *opt = client->options; |
4285 |
+ size_t pos = m->count; |
4286 |
+ |
4287 |
+- if (opt->name) |
4288 |
+- seq_printf(m, "name=%s,", opt->name); |
4289 |
++ if (opt->name) { |
4290 |
++ seq_puts(m, "name="); |
4291 |
++ seq_escape(m, opt->name, ", \t\n\\"); |
4292 |
++ seq_putc(m, ','); |
4293 |
++ } |
4294 |
+ if (opt->key) |
4295 |
+ seq_puts(m, "secret=<hidden>,"); |
4296 |
+ |
4297 |
+diff --git a/security/selinux/hooks.c b/security/selinux/hooks.c |
4298 |
+index 564079c5c49d..cdf4c589a391 100644 |
4299 |
+--- a/security/selinux/hooks.c |
4300 |
++++ b/security/selinux/hooks.c |
4301 |
+@@ -1100,7 +1100,7 @@ static void selinux_write_opts(struct seq_file *m, |
4302 |
+ seq_puts(m, prefix); |
4303 |
+ if (has_comma) |
4304 |
+ seq_putc(m, '\"'); |
4305 |
+- seq_puts(m, opts->mnt_opts[i]); |
4306 |
++ seq_escape(m, opts->mnt_opts[i], "\"\n\\"); |
4307 |
+ if (has_comma) |
4308 |
+ seq_putc(m, '\"'); |
4309 |
+ } |
4310 |
+diff --git a/sound/soc/codecs/adav80x.c b/sound/soc/codecs/adav80x.c |
4311 |
+index 36d842570745..69c63b92e078 100644 |
4312 |
+--- a/sound/soc/codecs/adav80x.c |
4313 |
++++ b/sound/soc/codecs/adav80x.c |
4314 |
+@@ -865,7 +865,6 @@ const struct regmap_config adav80x_regmap_config = { |
4315 |
+ .val_bits = 8, |
4316 |
+ .pad_bits = 1, |
4317 |
+ .reg_bits = 7, |
4318 |
+- .read_flag_mask = 0x01, |
4319 |
+ |
4320 |
+ .max_register = ADAV80X_PLL_OUTE, |
4321 |
+ |
4322 |
+diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c |
4323 |
+index 802e05eae3e9..4180827a8480 100644 |
4324 |
+--- a/sound/soc/codecs/arizona.c |
4325 |
++++ b/sound/soc/codecs/arizona.c |
4326 |
+@@ -1756,17 +1756,6 @@ int arizona_init_dai(struct arizona_priv *priv, int id) |
4327 |
+ } |
4328 |
+ EXPORT_SYMBOL_GPL(arizona_init_dai); |
4329 |
+ |
4330 |
+-static irqreturn_t arizona_fll_clock_ok(int irq, void *data) |
4331 |
+-{ |
4332 |
+- struct arizona_fll *fll = data; |
4333 |
+- |
4334 |
+- arizona_fll_dbg(fll, "clock OK\n"); |
4335 |
+- |
4336 |
+- complete(&fll->ok); |
4337 |
+- |
4338 |
+- return IRQ_HANDLED; |
4339 |
+-} |
4340 |
+- |
4341 |
+ static struct { |
4342 |
+ unsigned int min; |
4343 |
+ unsigned int max; |
4344 |
+@@ -2048,17 +2037,18 @@ static int arizona_is_enabled_fll(struct arizona_fll *fll) |
4345 |
+ static int arizona_enable_fll(struct arizona_fll *fll) |
4346 |
+ { |
4347 |
+ struct arizona *arizona = fll->arizona; |
4348 |
+- unsigned long time_left; |
4349 |
+ bool use_sync = false; |
4350 |
+ int already_enabled = arizona_is_enabled_fll(fll); |
4351 |
+ struct arizona_fll_cfg cfg; |
4352 |
++ int i; |
4353 |
++ unsigned int val; |
4354 |
+ |
4355 |
+ if (already_enabled < 0) |
4356 |
+ return already_enabled; |
4357 |
+ |
4358 |
+ if (already_enabled) { |
4359 |
+ /* Facilitate smooth refclk across the transition */ |
4360 |
+- regmap_update_bits_async(fll->arizona->regmap, fll->base + 0x7, |
4361 |
++ regmap_update_bits_async(fll->arizona->regmap, fll->base + 0x9, |
4362 |
+ ARIZONA_FLL1_GAIN_MASK, 0); |
4363 |
+ regmap_update_bits_async(fll->arizona->regmap, fll->base + 1, |
4364 |
+ ARIZONA_FLL1_FREERUN, |
4365 |
+@@ -2110,9 +2100,6 @@ static int arizona_enable_fll(struct arizona_fll *fll) |
4366 |
+ if (!already_enabled) |
4367 |
+ pm_runtime_get(arizona->dev); |
4368 |
+ |
4369 |
+- /* Clear any pending completions */ |
4370 |
+- try_wait_for_completion(&fll->ok); |
4371 |
+- |
4372 |
+ regmap_update_bits_async(arizona->regmap, fll->base + 1, |
4373 |
+ ARIZONA_FLL1_ENA, ARIZONA_FLL1_ENA); |
4374 |
+ if (use_sync) |
4375 |
+@@ -2124,10 +2111,24 @@ static int arizona_enable_fll(struct arizona_fll *fll) |
4376 |
+ regmap_update_bits_async(arizona->regmap, fll->base + 1, |
4377 |
+ ARIZONA_FLL1_FREERUN, 0); |
4378 |
+ |
4379 |
+- time_left = wait_for_completion_timeout(&fll->ok, |
4380 |
+- msecs_to_jiffies(250)); |
4381 |
+- if (time_left == 0) |
4382 |
++ arizona_fll_dbg(fll, "Waiting for FLL lock...\n"); |
4383 |
++ val = 0; |
4384 |
++ for (i = 0; i < 15; i++) { |
4385 |
++ if (i < 5) |
4386 |
++ usleep_range(200, 400); |
4387 |
++ else |
4388 |
++ msleep(20); |
4389 |
++ |
4390 |
++ regmap_read(arizona->regmap, |
4391 |
++ ARIZONA_INTERRUPT_RAW_STATUS_5, |
4392 |
++ &val); |
4393 |
++ if (val & (ARIZONA_FLL1_CLOCK_OK_STS << (fll->id - 1))) |
4394 |
++ break; |
4395 |
++ } |
4396 |
++ if (i == 15) |
4397 |
+ arizona_fll_warn(fll, "Timed out waiting for lock\n"); |
4398 |
++ else |
4399 |
++ arizona_fll_dbg(fll, "FLL locked (%d polls)\n", i); |
4400 |
+ |
4401 |
+ return 0; |
4402 |
+ } |
4403 |
+@@ -2212,11 +2213,8 @@ EXPORT_SYMBOL_GPL(arizona_set_fll); |
4404 |
+ int arizona_init_fll(struct arizona *arizona, int id, int base, int lock_irq, |
4405 |
+ int ok_irq, struct arizona_fll *fll) |
4406 |
+ { |
4407 |
+- int ret; |
4408 |
+ unsigned int val; |
4409 |
+ |
4410 |
+- init_completion(&fll->ok); |
4411 |
+- |
4412 |
+ fll->id = id; |
4413 |
+ fll->base = base; |
4414 |
+ fll->arizona = arizona; |
4415 |
+@@ -2238,13 +2236,6 @@ int arizona_init_fll(struct arizona *arizona, int id, int base, int lock_irq, |
4416 |
+ snprintf(fll->clock_ok_name, sizeof(fll->clock_ok_name), |
4417 |
+ "FLL%d clock OK", id); |
4418 |
+ |
4419 |
+- ret = arizona_request_irq(arizona, ok_irq, fll->clock_ok_name, |
4420 |
+- arizona_fll_clock_ok, fll); |
4421 |
+- if (ret != 0) { |
4422 |
+- dev_err(arizona->dev, "Failed to get FLL%d clock OK IRQ: %d\n", |
4423 |
+- id, ret); |
4424 |
+- } |
4425 |
+- |
4426 |
+ regmap_update_bits(arizona->regmap, fll->base + 1, |
4427 |
+ ARIZONA_FLL1_FREERUN, 0); |
4428 |
+ |
4429 |
+diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h |
4430 |
+index 43deb0462309..36867d05e0bb 100644 |
4431 |
+--- a/sound/soc/codecs/arizona.h |
4432 |
++++ b/sound/soc/codecs/arizona.h |
4433 |
+@@ -242,7 +242,6 @@ struct arizona_fll { |
4434 |
+ int id; |
4435 |
+ unsigned int base; |
4436 |
+ unsigned int vco_mult; |
4437 |
+- struct completion ok; |
4438 |
+ |
4439 |
+ unsigned int fout; |
4440 |
+ int sync_src; |
4441 |
+diff --git a/sound/soc/codecs/rt5640.c b/sound/soc/codecs/rt5640.c |
4442 |
+index 9bc78e57513d..ff72cd8c236e 100644 |
4443 |
+--- a/sound/soc/codecs/rt5640.c |
4444 |
++++ b/sound/soc/codecs/rt5640.c |
4445 |
+@@ -984,6 +984,35 @@ static int rt5640_hp_event(struct snd_soc_dapm_widget *w, |
4446 |
+ return 0; |
4447 |
+ } |
4448 |
+ |
4449 |
++static int rt5640_lout_event(struct snd_soc_dapm_widget *w, |
4450 |
++ struct snd_kcontrol *kcontrol, int event) |
4451 |
++{ |
4452 |
++ struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
4453 |
++ |
4454 |
++ switch (event) { |
4455 |
++ case SND_SOC_DAPM_POST_PMU: |
4456 |
++ hp_amp_power_on(codec); |
4457 |
++ snd_soc_update_bits(codec, RT5640_PWR_ANLG1, |
4458 |
++ RT5640_PWR_LM, RT5640_PWR_LM); |
4459 |
++ snd_soc_update_bits(codec, RT5640_OUTPUT, |
4460 |
++ RT5640_L_MUTE | RT5640_R_MUTE, 0); |
4461 |
++ break; |
4462 |
++ |
4463 |
++ case SND_SOC_DAPM_PRE_PMD: |
4464 |
++ snd_soc_update_bits(codec, RT5640_OUTPUT, |
4465 |
++ RT5640_L_MUTE | RT5640_R_MUTE, |
4466 |
++ RT5640_L_MUTE | RT5640_R_MUTE); |
4467 |
++ snd_soc_update_bits(codec, RT5640_PWR_ANLG1, |
4468 |
++ RT5640_PWR_LM, 0); |
4469 |
++ break; |
4470 |
++ |
4471 |
++ default: |
4472 |
++ return 0; |
4473 |
++ } |
4474 |
++ |
4475 |
++ return 0; |
4476 |
++} |
4477 |
++ |
4478 |
+ static int rt5640_hp_power_event(struct snd_soc_dapm_widget *w, |
4479 |
+ struct snd_kcontrol *kcontrol, int event) |
4480 |
+ { |
4481 |
+@@ -1179,13 +1208,16 @@ static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = { |
4482 |
+ 0, rt5640_spo_l_mix, ARRAY_SIZE(rt5640_spo_l_mix)), |
4483 |
+ SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0, |
4484 |
+ 0, rt5640_spo_r_mix, ARRAY_SIZE(rt5640_spo_r_mix)), |
4485 |
+- SND_SOC_DAPM_MIXER("LOUT MIX", RT5640_PWR_ANLG1, RT5640_PWR_LM_BIT, 0, |
4486 |
++ SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0, |
4487 |
+ rt5640_lout_mix, ARRAY_SIZE(rt5640_lout_mix)), |
4488 |
+ SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM, |
4489 |
+ 0, 0, rt5640_hp_power_event, SND_SOC_DAPM_POST_PMU), |
4490 |
+ SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0, |
4491 |
+ rt5640_hp_event, |
4492 |
+ SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), |
4493 |
++ SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0, |
4494 |
++ rt5640_lout_event, |
4495 |
++ SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), |
4496 |
+ SND_SOC_DAPM_SUPPLY("HP L Amp", RT5640_PWR_ANLG1, |
4497 |
+ RT5640_PWR_HP_L_BIT, 0, NULL, 0), |
4498 |
+ SND_SOC_DAPM_SUPPLY("HP R Amp", RT5640_PWR_ANLG1, |
4499 |
+@@ -1500,8 +1532,10 @@ static const struct snd_soc_dapm_route rt5640_dapm_routes[] = { |
4500 |
+ {"HP R Playback", "Switch", "HP Amp"}, |
4501 |
+ {"HPOL", NULL, "HP L Playback"}, |
4502 |
+ {"HPOR", NULL, "HP R Playback"}, |
4503 |
+- {"LOUTL", NULL, "LOUT MIX"}, |
4504 |
+- {"LOUTR", NULL, "LOUT MIX"}, |
4505 |
++ |
4506 |
++ {"LOUT amp", NULL, "LOUT MIX"}, |
4507 |
++ {"LOUTL", NULL, "LOUT amp"}, |
4508 |
++ {"LOUTR", NULL, "LOUT amp"}, |
4509 |
+ }; |
4510 |
+ |
4511 |
+ static const struct snd_soc_dapm_route rt5640_specific_dapm_routes[] = { |
4512 |
+diff --git a/sound/soc/codecs/rt5645.c b/sound/soc/codecs/rt5645.c |
4513 |
+index 961bd7e5877e..58713733d314 100644 |
4514 |
+--- a/sound/soc/codecs/rt5645.c |
4515 |
++++ b/sound/soc/codecs/rt5645.c |
4516 |
+@@ -3232,6 +3232,13 @@ static struct dmi_system_id dmi_platform_intel_braswell[] = { |
4517 |
+ DMI_MATCH(DMI_PRODUCT_NAME, "Strago"), |
4518 |
+ }, |
4519 |
+ }, |
4520 |
++ { |
4521 |
++ .ident = "Google Celes", |
4522 |
++ .callback = strago_quirk_cb, |
4523 |
++ .matches = { |
4524 |
++ DMI_MATCH(DMI_PRODUCT_NAME, "Celes"), |
4525 |
++ }, |
4526 |
++ }, |
4527 |
+ { } |
4528 |
+ }; |
4529 |
+ |
4530 |
+diff --git a/sound/soc/samsung/arndale_rt5631.c b/sound/soc/samsung/arndale_rt5631.c |
4531 |
+index 8bf2e2c4bafb..9e371eb3e4fa 100644 |
4532 |
+--- a/sound/soc/samsung/arndale_rt5631.c |
4533 |
++++ b/sound/soc/samsung/arndale_rt5631.c |
4534 |
+@@ -116,15 +116,6 @@ static int arndale_audio_probe(struct platform_device *pdev) |
4535 |
+ return ret; |
4536 |
+ } |
4537 |
+ |
4538 |
+-static int arndale_audio_remove(struct platform_device *pdev) |
4539 |
+-{ |
4540 |
+- struct snd_soc_card *card = platform_get_drvdata(pdev); |
4541 |
+- |
4542 |
+- snd_soc_unregister_card(card); |
4543 |
+- |
4544 |
+- return 0; |
4545 |
+-} |
4546 |
+- |
4547 |
+ static const struct of_device_id samsung_arndale_rt5631_of_match[] __maybe_unused = { |
4548 |
+ { .compatible = "samsung,arndale-rt5631", }, |
4549 |
+ { .compatible = "samsung,arndale-alc5631", }, |
4550 |
+@@ -139,7 +130,6 @@ static struct platform_driver arndale_audio_driver = { |
4551 |
+ .of_match_table = of_match_ptr(samsung_arndale_rt5631_of_match), |
4552 |
+ }, |
4553 |
+ .probe = arndale_audio_probe, |
4554 |
+- .remove = arndale_audio_remove, |
4555 |
+ }; |
4556 |
+ |
4557 |
+ module_platform_driver(arndale_audio_driver); |