1 |
commit: c285e5b1406daa444fdb52371f53c4fb2714ba06 |
2 |
Author: Aric Belsito <lluixhi <AT> gmail <DOT> com> |
3 |
AuthorDate: Mon Aug 7 18:03:48 2017 +0000 |
4 |
Commit: Aric Belsito <lluixhi <AT> gmail <DOT> com> |
5 |
CommitDate: Mon Aug 7 18:03:48 2017 +0000 |
6 |
URL: https://gitweb.gentoo.org/proj/musl.git/commit/?id=c285e5b1 |
7 |
|
8 |
sys-devel/gcc: Add patch for PR80706 to GCC 7.1.0 |
9 |
|
10 |
Should fix build of FireFox. |
11 |
|
12 |
sys-devel/gcc/Manifest | 3 +- |
13 |
sys-devel/gcc/files/gcc-7.1.0-pr80706.patch | 119 ++++++++++++++++++++++++++++ |
14 |
sys-devel/gcc/gcc-7.1.0-r1.ebuild | 3 + |
15 |
3 files changed, 124 insertions(+), 1 deletion(-) |
16 |
|
17 |
diff --git a/sys-devel/gcc/Manifest b/sys-devel/gcc/Manifest |
18 |
index a5a5a51..8f23059 100644 |
19 |
--- a/sys-devel/gcc/Manifest |
20 |
+++ b/sys-devel/gcc/Manifest |
21 |
@@ -22,6 +22,7 @@ AUX gcc-4.9.3-secure-plt.patch 1478 SHA256 b9435e19c3193e872bfdce8f635755655cf6e |
22 |
AUX gcc-4.9.3-tree-vect-data-refs-correctness.patch 315 SHA256 904ae5ce2ecd5a2f7786c54d148a7562d0bb6f51fe60761038c2f57b8cf70356 SHA512 88d93c061ef72035522270ab60c8c2ec04e2fa2d69763f45b9eab0c37b19c23920484358d7556ad885775071ac04cf94684a2cd8ed93418d5f0c54ac3a045c9d WHIRLPOOL 2b9c281401abc111d53467c51b6238c6f4c430a73d8833f161766f973138ffe3b4fa1ffe5cc5813b5e2f8a81dee2cdcaaff2b9a8f8e13089f993f3ab3d69ccbd |
23 |
AUX gcc-5.4.0-pr68470.patch 2012 SHA256 f8949e1d35bf7bba80aec50bdcd5d6b008f731679b06f3d89e6d8a4eb98e492e SHA512 dea9ab12a37b88308424af2882b4755366745c204cd74e6892374d4aeb0981487f9fa1d44ab4d4e6184c83547c3ea30ed731719fa074bea62bdf8bfcf1dfbca0 WHIRLPOOL 2f66cd0d2dcaf237fd730eefe6f477970db14c237a8309925f799984a010f5470f6fc0f6a735316c7eab4de9dc958d773a4ffa14eea7093158690e9ff8f1847e |
24 |
AUX gcc-5.4.0-pr70473.patch 1665 SHA256 d674821a34356e78c4aa8405fc27f30effd5a7ab4f5929892e23a4c53023e137 SHA512 6fc8f70a1e34ae475d15fb20e198b63f00a11eff3bd09f1518b76d9622d32c9500beb49065bb1a32dc40119146f009bbda21fd0e74bc200771384b547f282680 WHIRLPOOL d22f1daec32b91bd29d6b87481681c86f405b4f5567468339b9f25e0e5ad6818d171db1692be588a0174767f9fcdf21a28d895932a8ef7a2ecc910a1984075db |
25 |
+AUX gcc-7.1.0-pr80706.patch 3306 SHA256 5fe4ae00ef68686a37e4bacd4424c9950a91e12a19d2b6a857524b558d49acf2 SHA512 4c5a72c221d21a6ad03586d4f570caffb16be041d7a232c6da2622fd8603341c4a4e97cc48b61509fb9be04ba59d06c339a2718cf72803cff67bc31813c5161c WHIRLPOOL f3876e3d682af9ca3584a6c877c5b452e529a93adbbc69fde5a9dc0d8b973a5c4f13c5322bd70e0cd1971970a09c9891313ea51648eda8457ca8e20326dc1e8e |
26 |
AUX gcc-configure-LANG.patch 2052 SHA256 63de6d2dcfe14f21d147abeb1390405b9220c03f8e968f482d4b4c1cf279c88b SHA512 a694c7ac2f45cc657097ff5b0cf1356ac88a9c06035c9ba15167e9d444844d0d8a478eb1b9b62195dd063774f79697b9148b9cdb6c261640b472c291061b2129 WHIRLPOOL 3cc1ec912fb192ff1058de5b93e49a994ba30d1501a932290dd5b3df1cd783875621cda56edeb41894cd5fa10c04917e693a40a60be8d742ddd7992bf5d8afeb |
27 |
AUX gcc-configure-texinfo.patch 337 SHA256 74b73a7ecec2d88889876b4db480cd173632f49d5396bb8e5b3c93673f9b5b98 SHA512 a15fba8bf2ff02bdeca54d6f186bfa08c1079c6a8ba0a3beef154483ce5c1b8c497e7ffeec32371968f0037e0ff8384609eb0c367d0155a4e5a7eef8aad084d5 WHIRLPOOL 39d008aad06f7621e4e5db15f5e85a59e583b43f8d247029bd4944466bb60a9795bda157d185c45c329294078e282703a243aad5c468d90c77665dd6336870d4 |
28 |
AUX gcc-spec-env-r1.patch 3148 SHA256 da0a6442eb42bce58cbdc7858b110a2e65fc5bd5b4b780b9b491033de6e302fa SHA512 ecae71577543772cfe1711f1b4a8815c0b5d706ebd01edacd1f07586637d4805e25771f970a6e6d1bb696d4b1b5ef3e0036088a96a9f6beff7ddaee704175d16 WHIRLPOOL 3535605998eabccdee71ba396ed5cefbb8b0a8cb073101f6444c7d01233f3b3904c1b29f4daf0a3417c68de8dbd62a0b7dc367cacfcbfa0c4ee1b69b7df8c6fb |
29 |
@@ -66,5 +67,5 @@ EBUILD gcc-5.4.0-r3.ebuild 1934 SHA256 3d643e82c9ff1017c6ad6eb8a24994ffbbd48d70e |
30 |
EBUILD gcc-5.4.0-r4.ebuild 1936 SHA256 2bb3cda67f82af445fca53eb0c198de14f24fa1764fe0bab5eabadd090cfd3c9 SHA512 e949174290ff75386a69c5c89b980e9af04a8c1002458de4dad1b213bca6389ca99e566180027b62d3f0a196080bf49dd185e1bd1aa9603c7a311994f1344804 WHIRLPOOL f5c6df6698d1e868fea6a4b459813004898a0e88811f76c832c122ee3508bf188732a51ded3d678b90c984c80f91f6997b2ab0c3e6ead9df14b321e8364f353a |
31 |
EBUILD gcc-6.3.0.ebuild 902 SHA256 f75f2d455bd332ab08dcb12ef5101319b9117ea48d773e782d7ec9e9bd017738 SHA512 2cb339bd2003d2e6c0e649377c693a5c6874583ac27d1b60ffa3bc9723f83c26554dd385154133e8384a92e85c0c134bbb787c7ba34e1ca174f05e23758d1bb2 WHIRLPOOL 88a7ef0e56136cb610f16aa92be0967f40d59d7ee1877bddc213035fd8007745beb2743b5016acfa6bf6a3f334e002e311c0e457aea2b68d4f7a9e311f6f1d4b |
32 |
EBUILD gcc-6.4.0.ebuild 902 SHA256 e54104dd9fd73c8017661a03c3614e71c40bf9be73ddbe87fe11e3c7d0efb004 SHA512 1fb4edafa2d62cd6e34fb42e5b07adaeb036fae0c4819416f8f24d612c49c51fac1ad1c356d8b82822ac772919016a7125294d8609fd5209fb3a63155af56541 WHIRLPOOL 9073081c7e4453d83e8d86e664712f96422b0bc1383a416ce22b3a475a9df496e10788e93fa0462e52ff31f07b911015f5f29587cfe0ec094757a727012e83a5 |
33 |
-EBUILD gcc-7.1.0-r1.ebuild 603 SHA256 9cbff0ffd838af811cde3103906c146eaf17517caf48c8ad62a9216bbc435c8b SHA512 6dd72ba363429342fd12de1fcb677556b17d97cc98af1ac9c1feac76fd219d9e4fdc37b8838d28025d16a0179e85b21b159e24471d6ec1643d2c32fe09689543 WHIRLPOOL a8718baf8b73fff11bc7f8bdcad69df6060e96838ca7e6b64651990084777dba9d9d59c6391518622981161495bbbcadc395138472b9551d69fed47d2897f65f |
34 |
+EBUILD gcc-7.1.0-r1.ebuild 670 SHA256 09e9bafeeaad9b0b897d2b4da1b8c3ee56daf3401eea3f7a63ee62fd6fe696f5 SHA512 90875ac0b5bffe3488c681d375f671d54b03806613d3b4618f650f2fd44727cf687d923afe10ba1f9b0ceba2575814867ed1b28b2ed7601cdb7d97ee53a62a80 WHIRLPOOL 621007ffa8a4ce055ce5125fd51b7934f584e64577afcea24f3e2aa7e77e4d87373de7b4a9f40717afd69686838784583a2228bebe0c72feaba631baae54943b |
35 |
MISC metadata.xml 2282 SHA256 afee9279279d988491f12e47d474f13431cd28c871c5d78df367b6d3cac7e58c SHA512 a6b3c24ddf715f9c2db299a6d0f9caeabf2f3223b3d7ea61773cb53b4f2db2c470dbd18860532cad719409f91b9f438847f52cdb3b0d396e38e024f504a16940 WHIRLPOOL f6d3f8a22a6e52290ffd7bc46b7e4a66519aa4dcc83d787024b636e9f5832dfd7eef891f2904c64fccdb10f33c87b8b18430e656a32a291ba2f928221c6e67cc |
36 |
|
37 |
diff --git a/sys-devel/gcc/files/gcc-7.1.0-pr80706.patch b/sys-devel/gcc/files/gcc-7.1.0-pr80706.patch |
38 |
new file mode 100644 |
39 |
index 0000000..73572b2 |
40 |
--- /dev/null |
41 |
+++ b/sys-devel/gcc/files/gcc-7.1.0-pr80706.patch |
42 |
@@ -0,0 +1,119 @@ |
43 |
+--- branches/gcc-7-branch/gcc/config/i386/sync.md 2017/04/20 09:50:13 247016 |
44 |
++++ branches/gcc-7-branch/gcc/config/i386/sync.md 2017/05/14 12:49:55 248032 |
45 |
+@@ -25,6 +25,9 @@ |
46 |
+ UNSPEC_FILD_ATOMIC |
47 |
+ UNSPEC_FIST_ATOMIC |
48 |
+ |
49 |
++ UNSPEC_LDX_ATOMIC |
50 |
++ UNSPEC_STX_ATOMIC |
51 |
++ |
52 |
+ ;; __atomic support |
53 |
+ UNSPEC_LDA |
54 |
+ UNSPEC_STA |
55 |
+@@ -199,9 +202,8 @@ |
56 |
+ } |
57 |
+ else |
58 |
+ { |
59 |
+- adjust_reg_mode (tmp, DImode); |
60 |
+- emit_move_insn (tmp, src); |
61 |
+- emit_move_insn (mem, tmp); |
62 |
++ emit_insn (gen_loaddi_via_sse (tmp, src)); |
63 |
++ emit_insn (gen_storedi_via_sse (mem, tmp)); |
64 |
+ } |
65 |
+ |
66 |
+ if (mem != dst) |
67 |
+@@ -226,10 +228,12 @@ |
68 |
+ "operands[5] = gen_lowpart (DFmode, operands[1]);") |
69 |
+ |
70 |
+ (define_peephole2 |
71 |
+- [(set (match_operand:DI 0 "sse_reg_operand") |
72 |
+- (match_operand:DI 1 "memory_operand")) |
73 |
++ [(set (match_operand:DF 0 "sse_reg_operand") |
74 |
++ (unspec:DF [(match_operand:DI 1 "memory_operand")] |
75 |
++ UNSPEC_LDX_ATOMIC)) |
76 |
+ (set (match_operand:DI 2 "memory_operand") |
77 |
+- (match_dup 0)) |
78 |
++ (unspec:DI [(match_dup 0)] |
79 |
++ UNSPEC_STX_ATOMIC)) |
80 |
+ (set (match_operand:DF 3 "fp_register_operand") |
81 |
+ (match_operand:DF 4 "memory_operand"))] |
82 |
+ "!TARGET_64BIT |
83 |
+@@ -301,7 +305,9 @@ |
84 |
+ rtx dst = operands[0], src = operands[1]; |
85 |
+ rtx mem = operands[2], tmp = operands[3]; |
86 |
+ |
87 |
+- if (!SSE_REG_P (src)) |
88 |
++ if (SSE_REG_P (src)) |
89 |
++ emit_move_insn (dst, src); |
90 |
++ else |
91 |
+ { |
92 |
+ if (REG_P (src)) |
93 |
+ { |
94 |
+@@ -313,16 +319,13 @@ |
95 |
+ { |
96 |
+ emit_insn (gen_loaddi_via_fpu (tmp, src)); |
97 |
+ emit_insn (gen_storedi_via_fpu (dst, tmp)); |
98 |
+- DONE; |
99 |
+ } |
100 |
+ else |
101 |
+ { |
102 |
+- adjust_reg_mode (tmp, DImode); |
103 |
+- emit_move_insn (tmp, src); |
104 |
+- src = tmp; |
105 |
++ emit_insn (gen_loaddi_via_sse (tmp, src)); |
106 |
++ emit_insn (gen_storedi_via_sse (dst, tmp)); |
107 |
+ } |
108 |
+ } |
109 |
+- emit_move_insn (dst, src); |
110 |
+ DONE; |
111 |
+ }) |
112 |
+ |
113 |
+@@ -344,10 +347,12 @@ |
114 |
+ (define_peephole2 |
115 |
+ [(set (match_operand:DF 0 "memory_operand") |
116 |
+ (match_operand:DF 1 "fp_register_operand")) |
117 |
+- (set (match_operand:DI 2 "sse_reg_operand") |
118 |
+- (match_operand:DI 3 "memory_operand")) |
119 |
++ (set (match_operand:DF 2 "sse_reg_operand") |
120 |
++ (unspec:DF [(match_operand:DI 3 "memory_operand")] |
121 |
++ UNSPEC_LDX_ATOMIC)) |
122 |
+ (set (match_operand:DI 4 "memory_operand") |
123 |
+- (match_dup 2))] |
124 |
++ (unspec:DI [(match_dup 2)] |
125 |
++ UNSPEC_STX_ATOMIC))] |
126 |
+ "!TARGET_64BIT |
127 |
+ && peep2_reg_dead_p (3, operands[2]) |
128 |
+ && rtx_equal_p (operands[0], adjust_address_nv (operands[3], DFmode, 0))" |
129 |
+@@ -382,6 +387,32 @@ |
130 |
+ [(set_attr "type" "fmov") |
131 |
+ (set_attr "mode" "DI")]) |
132 |
+ |
133 |
++(define_insn "loaddi_via_sse" |
134 |
++ [(set (match_operand:DF 0 "register_operand" "=x") |
135 |
++ (unspec:DF [(match_operand:DI 1 "memory_operand" "m")] |
136 |
++ UNSPEC_LDX_ATOMIC))] |
137 |
++ "TARGET_SSE" |
138 |
++{ |
139 |
++ if (TARGET_SSE2) |
140 |
++ return "%vmovq\t{%1, %0|%0, %1}"; |
141 |
++ return "movlps\t{%1, %0|%0, %1}"; |
142 |
++} |
143 |
++ [(set_attr "type" "ssemov") |
144 |
++ (set_attr "mode" "DI")]) |
145 |
++ |
146 |
++(define_insn "storedi_via_sse" |
147 |
++ [(set (match_operand:DI 0 "memory_operand" "=m") |
148 |
++ (unspec:DI [(match_operand:DF 1 "register_operand" "x")] |
149 |
++ UNSPEC_STX_ATOMIC))] |
150 |
++ "TARGET_SSE" |
151 |
++{ |
152 |
++ if (TARGET_SSE2) |
153 |
++ return "%vmovq\t{%1, %0|%0, %1}"; |
154 |
++ return "movlps\t{%1, %0|%0, %1}"; |
155 |
++} |
156 |
++ [(set_attr "type" "ssemov") |
157 |
++ (set_attr "mode" "DI")]) |
158 |
++ |
159 |
+ (define_expand "atomic_compare_and_swap<mode>" |
160 |
+ [(match_operand:QI 0 "register_operand") ;; bool success output |
161 |
+ (match_operand:SWI124 1 "register_operand") ;; oldval output |
162 |
|
163 |
diff --git a/sys-devel/gcc/gcc-7.1.0-r1.ebuild b/sys-devel/gcc/gcc-7.1.0-r1.ebuild |
164 |
index 3052a73..c5194d1 100644 |
165 |
--- a/sys-devel/gcc/gcc-7.1.0-r1.ebuild |
166 |
+++ b/sys-devel/gcc/gcc-7.1.0-r1.ebuild |
167 |
@@ -22,6 +22,9 @@ fi |
168 |
src_prepare() { |
169 |
toolchain_src_prepare |
170 |
|
171 |
+ # Upstream Patch |
172 |
+ epatch "${FILESDIR}"/${PN}-7.1.0-pr80706.patch |
173 |
+ |
174 |
if use elibc_musl || [[ ${CATEGORY} = cross-*-musl ]]; then |
175 |
epatch "${FILESDIR}"/6.3.0/cpu_indicator.patch |
176 |
epatch "${FILESDIR}"/7.1.0/posix_memalign.patch |