1 |
commit: ff0deccebd4c7163fe50ac3a8642445a2f3189a3 |
2 |
Author: Huang Rui <vowstar <AT> gmail <DOT> com> |
3 |
AuthorDate: Sun Feb 23 06:54:44 2020 +0000 |
4 |
Commit: Rui Huang <vowstar <AT> gmail <DOT> com> |
5 |
CommitDate: Sun Feb 23 06:54:45 2020 +0000 |
6 |
URL: https://gitweb.gentoo.org/repo/proj/guru.git/commit/?id=ff0decce |
7 |
|
8 |
sci-electronics/verilator: add 9999 ebuild |
9 |
|
10 |
Add verilator-9999.ebuild to get the latest software |
11 |
|
12 |
Package-Manager: Portage-2.3.89, Repoman-2.3.20 |
13 |
Signed-off-by: Huang Rui <vowstar <AT> gmail.com> |
14 |
|
15 |
sci-electronics/verilator/verilator-9999.ebuild | 39 +++++++++++++++++++++++++ |
16 |
1 file changed, 39 insertions(+) |
17 |
|
18 |
diff --git a/sci-electronics/verilator/verilator-9999.ebuild b/sci-electronics/verilator/verilator-9999.ebuild |
19 |
new file mode 100644 |
20 |
index 0000000..80f4993 |
21 |
--- /dev/null |
22 |
+++ b/sci-electronics/verilator/verilator-9999.ebuild |
23 |
@@ -0,0 +1,39 @@ |
24 |
+# Copyright 1999-2020 Gentoo Authors |
25 |
+# Distributed under the terms of the GNU General Public License v2 |
26 |
+ |
27 |
+EAPI=7 |
28 |
+ |
29 |
+inherit autotools |
30 |
+ |
31 |
+DESCRIPTION="The fast free Verilog/SystemVerilog simulator" |
32 |
+HOMEPAGE="https://www.veripool.org/wiki/verilator" |
33 |
+ |
34 |
+if [[ ${PV} == "9999" ]] ; then |
35 |
+ inherit git-r3 |
36 |
+ EGIT_REPO_URI="https://git.veripool.org/git/${PN}" |
37 |
+else |
38 |
+ SRC_URI="http://www.veripool.org/ftp/${P}.tgz -> ${P}.tar.gz" |
39 |
+ KEYWORDS="~alpha ~amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sh ~sparc ~x86" |
40 |
+fi |
41 |
+ |
42 |
+LICENSE="|| ( Artistic-2 LGPL-3 )" |
43 |
+SLOT="0" |
44 |
+ |
45 |
+DEPEND=" |
46 |
+ dev-lang/perl |
47 |
+ sys-libs/zlib |
48 |
+" |
49 |
+ |
50 |
+RDEPEND=" |
51 |
+ ${DEPEND} |
52 |
+" |
53 |
+ |
54 |
+BDEPEND=" |
55 |
+ sys-devel/bison |
56 |
+ sys-devel/flex |
57 |
+" |
58 |
+ |
59 |
+src_prepare() { |
60 |
+ default |
61 |
+ eautoconf --force |
62 |
+} |