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commit: 451eaa396936654d9772705c46a620bcd202fe6b |
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Author: Michał Górny <mgorny <AT> gentoo <DOT> org> |
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AuthorDate: Tue Oct 1 12:11:11 2019 +0000 |
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Commit: Michał Górny <mgorny <AT> gentoo <DOT> org> |
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CommitDate: Tue Oct 1 12:22:27 2019 +0000 |
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URL: https://gitweb.gentoo.org/repo/gentoo.git/commit/?id=451eaa39 |
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profiles/desc/llvm_targets.desc: RISCV & WASM are no longer exp |
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Signed-off-by: Michał Górny <mgorny <AT> gentoo.org> |
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profiles/desc/llvm_targets.desc | 4 ++-- |
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1 file changed, 2 insertions(+), 2 deletions(-) |
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diff --git a/profiles/desc/llvm_targets.desc b/profiles/desc/llvm_targets.desc |
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index e83d886dedb..6a45455f4c3 100644 |
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--- a/profiles/desc/llvm_targets.desc |
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+++ b/profiles/desc/llvm_targets.desc |
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@@ -12,9 +12,9 @@ Mips - MIPS CPU target (includes MIPS64) |
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MSP430 - MSP430 CPU target (experimental) |
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NVPTX - NVIDIA PTX (GPU) target (32-bit and 64-bit) |
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PowerPC - PowerPC CPU target (PPC32 and PPC64) |
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-RISCV - RISC-V CPU target [EXPERIMENTAL] |
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+RISCV - RISC-V CPU target |
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Sparc - Sparc CPU target |
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SystemZ - SystemZ (s390x) CPU target |
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-WebAssembly - WebAssembly backend [EXPERIMENTAL] |
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+WebAssembly - WebAssembly backend |
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X86 - X86 CPU target (includes amd64) |
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XCore - XCore CPU target |
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