[gentoo-commits] repo/gentoo:master commit in: dev-lang/zig/, dev-lang/zig/files/

[Jakov Smolić]

commit:     d005e3b069726d01579b86d32f6fe32c26573aa3
Author:     Eric Joldasov <bratishkaerik <AT> getgoogleoff <DOT> me>
AuthorDate: Tue Jul 26 21:25:12 2022 +0000
Commit:     Jakov Smolić <jsmolic <AT> gentoo <DOT> org>
CommitDate: Mon Aug 22 08:16:08 2022 +0000
URL:        https://gitweb.gentoo.org/repo/gentoo.git/commit/?id=d005e3b0

dev-lang/zig: block dev-lang/zig-bin, add risv stage0 patch for 0.9.1

Bug: https://bugs.gentoo.org/851732
Signed-off-by: Eric Joldasov <bratishkaerik <AT> getgoogleoff.me>
Signed-off-by: Jakov Smolić <jsmolic <AT> gentoo.org>

 dev-lang/zig/files/zig-0.9.1-fix-riscv.patch | 47 ++++++++++++++++++++++++++++
 dev-lang/zig/zig-0.9.1.ebuild                | 26 +++++++--------
 2 files changed, 59 insertions(+), 14 deletions(-)

diff --git a/dev-lang/zig/files/zig-0.9.1-fix-riscv.patch b/dev-lang/zig/files/zig-0.9.1-fix-riscv.patch
new file mode 100644
index 000000000000..372a68ea02ad
--- /dev/null
+++ b/dev-lang/zig/files/zig-0.9.1-fix-riscv.patch
@@ -0,0 +1,47 @@
+https://github.com/ziglang/zig/commit/ca3c4ff2d0afcdc8fe86e7e7b41a967c88779729
+From: Shupei Fan <dymarkfan@×××××××.com>
+zig0: properly set llvm_cpu_names and llvm_cpu_features for riscv
+
+Bug: https://bugs.gentoo.org/851732
+
+--- a/src/stage1/zig0.cpp
++++ b/src/stage1/zig0.cpp
+@@ -160,6 +160,17 @@ static void get_native_target(ZigTarget *target) {
+     }
+ }
+ 
++static const char* get_baseline_llvm_cpu_name(ZigLLVM_ArchType arch) {
++    return "";
++}
++
++static const char* get_baseline_llvm_cpu_features(ZigLLVM_ArchType arch) {
++    switch (arch) {
++        case ZigLLVM_riscv64: return "+a,+c,+d,+m";
++        default: return "";
++    }
++}
++
+ static Error target_parse_triple(struct ZigTarget *target, const char *zig_triple, const char *mcpu,
+         const char *dynamic_linker)
+ {
+@@ -178,8 +189,8 @@ static Error target_parse_triple(struct ZigTarget *target, const char *zig_tripl
+         } else if (strcmp(mcpu, "baseline") == 0) {
+             target->is_native_os = false;
+             target->is_native_cpu = false;
+-            target->llvm_cpu_name = "";
+-            target->llvm_cpu_features = "";
++            target->llvm_cpu_name = get_baseline_llvm_cpu_name(target->arch);
++            target->llvm_cpu_features = get_baseline_llvm_cpu_features(target->arch);
+         } else {
+             const char *msg = "stage0 can't handle CPU/features in the target";
+             stage2_panic(msg, strlen(msg));
+@@ -220,6 +231,9 @@ static Error target_parse_triple(struct ZigTarget *target, const char *zig_tripl
+             const char *msg = "stage0 can't handle CPU/features in the target";
+             stage2_panic(msg, strlen(msg));
+         }
++
++        target->llvm_cpu_name = get_baseline_llvm_cpu_name(target->arch);
++        target->llvm_cpu_features = get_baseline_llvm_cpu_features(target->arch);
+     }
+ 
+     return ErrorNone;

diff --git a/dev-lang/zig/zig-0.9.1.ebuild b/dev-lang/zig/zig-0.9.1.ebuild
index 18dd79a4bbad..0c78b3e76b08 100644
--- a/dev-lang/zig/zig-0.9.1.ebuild
+++ b/dev-lang/zig/zig-0.9.1.ebuild
@@ -21,26 +21,24 @@ SLOT="0"
 IUSE="test +threads"
 RESTRICT="!test? ( test )"
 
-PATCHES=("${FILESDIR}/${P}-fix-single-threaded.patch")
+PATCHES=(
+	"${FILESDIR}/${P}-fix-single-threaded.patch"
+	"${FILESDIR}/${P}-fix-riscv.patch"
+)
 
 BUILD_DIR="${S}/build"
 
-# According to zig's author, zig builds that do not support all targets are not
-# supported by the upstream project.
-ALL_LLVM_TARGETS=(
-	AArch64 AMDGPU ARM AVR BPF Hexagon Lanai Mips MSP430 NVPTX
-	PowerPC RISCV Sparc SystemZ WebAssembly X86 XCore
-)
-ALL_LLVM_TARGETS=( "${ALL_LLVM_TARGETS[@]/#/llvm_targets_}" )
-LLVM_TARGET_USEDEPS="${ALL_LLVM_TARGETS[@]}"
-
-RDEPEND="
+DEPEND="
 	sys-devel/clang:${LLVM_MAX_SLOT}
 	>=sys-devel/lld-${LLVM_MAX_SLOT}
 	<sys-devel/lld-$((${LLVM_MAX_SLOT} + 1))
-	sys-devel/llvm:${LLVM_MAX_SLOT}[${LLVM_TARGET_USEDEPS// /,}]
+	sys-devel/llvm:${LLVM_MAX_SLOT}
+	>=sys-libs/zlib-1.2.12
+"
+
+RDEPEND="${DEPEND}
+	!dev-lang/zig-bin
 "
-DEPEND="${RDEPEND}"
 
 llvm_check_deps() {
 	has_version "sys-devel/clang:${LLVM_SLOT}"
@@ -58,7 +56,7 @@ src_configure() {
 	local mycmakeargs=(
 		-DZIG_USE_CCACHE=OFF
 		-DZIG_PREFER_CLANG_CPP_DYLIB=ON
-		-DZIG_SINGLE_THREADED="$(usex threads OFF ON)"
+		-DZIG_SINGLE_THREADED="$(usex !threads)"
 	)
 
 	cmake_src_configure