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commit: 39fd8a06895d4086f7c6b5c17b8aa0d1e99c6a7d |
2 |
Author: Mike Pagano <mpagano <AT> gentoo <DOT> org> |
3 |
AuthorDate: Mon Jan 27 14:24:11 2020 +0000 |
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Commit: Mike Pagano <mpagano <AT> gentoo <DOT> org> |
5 |
CommitDate: Mon Jan 27 14:24:11 2020 +0000 |
6 |
URL: https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=39fd8a06 |
7 |
|
8 |
Linux patch 4.14.168 |
9 |
|
10 |
Signed-off-by: Mike Pagano <mpagano <AT> gentoo.org> |
11 |
|
12 |
0000_README | 4 + |
13 |
1167_linux-4.14.168.patch | 9493 +++++++++++++++++++++++++++++++++++++++++++++ |
14 |
2 files changed, 9497 insertions(+) |
15 |
|
16 |
diff --git a/0000_README b/0000_README |
17 |
index 89f313a..ea6db7d 100644 |
18 |
--- a/0000_README |
19 |
+++ b/0000_README |
20 |
@@ -711,6 +711,10 @@ Patch: 1166_linux-4.14.167.patch |
21 |
From: https://www.kernel.org |
22 |
Desc: Linux 4.14.167 |
23 |
|
24 |
+Patch: 1167_linux-4.14.168.patch |
25 |
+From: https://www.kernel.org |
26 |
+Desc: Linux 4.14.168 |
27 |
+ |
28 |
Patch: 1500_XATTR_USER_PREFIX.patch |
29 |
From: https://bugs.gentoo.org/show_bug.cgi?id=470644 |
30 |
Desc: Support for namespace user.pax.* on tmpfs. |
31 |
|
32 |
diff --git a/1167_linux-4.14.168.patch b/1167_linux-4.14.168.patch |
33 |
new file mode 100644 |
34 |
index 0000000..a7c2190 |
35 |
--- /dev/null |
36 |
+++ b/1167_linux-4.14.168.patch |
37 |
@@ -0,0 +1,9493 @@ |
38 |
+diff --git a/Makefile b/Makefile |
39 |
+index 3e8eaabf2bcb..1e74ba09cdda 100644 |
40 |
+--- a/Makefile |
41 |
++++ b/Makefile |
42 |
+@@ -1,7 +1,7 @@ |
43 |
+ # SPDX-License-Identifier: GPL-2.0 |
44 |
+ VERSION = 4 |
45 |
+ PATCHLEVEL = 14 |
46 |
+-SUBLEVEL = 167 |
47 |
++SUBLEVEL = 168 |
48 |
+ EXTRAVERSION = |
49 |
+ NAME = Petit Gorille |
50 |
+ |
51 |
+@@ -971,6 +971,7 @@ ifdef CONFIG_STACK_VALIDATION |
52 |
+ endif |
53 |
+ endif |
54 |
+ |
55 |
++PHONY += prepare0 |
56 |
+ |
57 |
+ ifeq ($(KBUILD_EXTMOD),) |
58 |
+ core-y += kernel/ certs/ mm/ fs/ ipc/ security/ crypto/ block/ |
59 |
+@@ -1065,8 +1066,7 @@ include/config/kernel.release: include/config/auto.conf FORCE |
60 |
+ # archprepare is used in arch Makefiles and when processed asm symlink, |
61 |
+ # version.h and scripts_basic is processed / created. |
62 |
+ |
63 |
+-# Listed in dependency order |
64 |
+-PHONY += prepare archprepare prepare0 prepare1 prepare2 prepare3 |
65 |
++PHONY += prepare archprepare prepare1 prepare2 prepare3 |
66 |
+ |
67 |
+ # prepare3 is used to check if we are building in a separate output directory, |
68 |
+ # and if so do: |
69 |
+diff --git a/arch/arm/boot/dts/lpc3250-phy3250.dts b/arch/arm/boot/dts/lpc3250-phy3250.dts |
70 |
+index b7bd3a110a8d..dd0bdf765599 100644 |
71 |
+--- a/arch/arm/boot/dts/lpc3250-phy3250.dts |
72 |
++++ b/arch/arm/boot/dts/lpc3250-phy3250.dts |
73 |
+@@ -49,8 +49,8 @@ |
74 |
+ sd_reg: regulator@2 { |
75 |
+ compatible = "regulator-fixed"; |
76 |
+ regulator-name = "sd_reg"; |
77 |
+- regulator-min-microvolt = <1800000>; |
78 |
+- regulator-max-microvolt = <1800000>; |
79 |
++ regulator-min-microvolt = <3300000>; |
80 |
++ regulator-max-microvolt = <3300000>; |
81 |
+ gpio = <&gpio 5 5 0>; |
82 |
+ enable-active-high; |
83 |
+ }; |
84 |
+diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi |
85 |
+index d077bd2b9583..c5b119ddb70b 100644 |
86 |
+--- a/arch/arm/boot/dts/lpc32xx.dtsi |
87 |
++++ b/arch/arm/boot/dts/lpc32xx.dtsi |
88 |
+@@ -139,11 +139,11 @@ |
89 |
+ }; |
90 |
+ |
91 |
+ clcd: clcd@31040000 { |
92 |
+- compatible = "arm,pl110", "arm,primecell"; |
93 |
++ compatible = "arm,pl111", "arm,primecell"; |
94 |
+ reg = <0x31040000 0x1000>; |
95 |
+ interrupts = <14 IRQ_TYPE_LEVEL_HIGH>; |
96 |
+- clocks = <&clk LPC32XX_CLK_LCD>; |
97 |
+- clock-names = "apb_pclk"; |
98 |
++ clocks = <&clk LPC32XX_CLK_LCD>, <&clk LPC32XX_CLK_LCD>; |
99 |
++ clock-names = "clcdclk", "apb_pclk"; |
100 |
+ status = "disabled"; |
101 |
+ }; |
102 |
+ |
103 |
+@@ -462,7 +462,9 @@ |
104 |
+ key: key@40050000 { |
105 |
+ compatible = "nxp,lpc3220-key"; |
106 |
+ reg = <0x40050000 0x1000>; |
107 |
+- interrupts = <54 IRQ_TYPE_LEVEL_HIGH>; |
108 |
++ clocks = <&clk LPC32XX_CLK_KEY>; |
109 |
++ interrupt-parent = <&sic1>; |
110 |
++ interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; |
111 |
+ status = "disabled"; |
112 |
+ }; |
113 |
+ |
114 |
+diff --git a/arch/arm/boot/dts/ls1021a-twr.dts b/arch/arm/boot/dts/ls1021a-twr.dts |
115 |
+index 44715c8ef756..72a3fc63d0ec 100644 |
116 |
+--- a/arch/arm/boot/dts/ls1021a-twr.dts |
117 |
++++ b/arch/arm/boot/dts/ls1021a-twr.dts |
118 |
+@@ -143,7 +143,7 @@ |
119 |
+ }; |
120 |
+ |
121 |
+ &enet0 { |
122 |
+- tbi-handle = <&tbi1>; |
123 |
++ tbi-handle = <&tbi0>; |
124 |
+ phy-handle = <&sgmii_phy2>; |
125 |
+ phy-connection-type = "sgmii"; |
126 |
+ status = "okay"; |
127 |
+@@ -222,6 +222,13 @@ |
128 |
+ sgmii_phy2: ethernet-phy@2 { |
129 |
+ reg = <0x2>; |
130 |
+ }; |
131 |
++ tbi0: tbi-phy@1f { |
132 |
++ reg = <0x1f>; |
133 |
++ device_type = "tbi-phy"; |
134 |
++ }; |
135 |
++}; |
136 |
++ |
137 |
++&mdio1 { |
138 |
+ tbi1: tbi-phy@1f { |
139 |
+ reg = <0x1f>; |
140 |
+ device_type = "tbi-phy"; |
141 |
+diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi |
142 |
+index 2d20f60947b9..1343c86988c5 100644 |
143 |
+--- a/arch/arm/boot/dts/ls1021a.dtsi |
144 |
++++ b/arch/arm/boot/dts/ls1021a.dtsi |
145 |
+@@ -562,13 +562,22 @@ |
146 |
+ }; |
147 |
+ |
148 |
+ mdio0: mdio@2d24000 { |
149 |
+- compatible = "gianfar"; |
150 |
++ compatible = "fsl,etsec2-mdio"; |
151 |
+ device_type = "mdio"; |
152 |
+ #address-cells = <1>; |
153 |
+ #size-cells = <0>; |
154 |
+ reg = <0x0 0x2d24000 0x0 0x4000>; |
155 |
+ }; |
156 |
+ |
157 |
++ mdio1: mdio@2d64000 { |
158 |
++ compatible = "fsl,etsec2-mdio"; |
159 |
++ device_type = "mdio"; |
160 |
++ #address-cells = <1>; |
161 |
++ #size-cells = <0>; |
162 |
++ reg = <0x0 0x2d64000 0x0 0x4000>, |
163 |
++ <0x0 0x2d50030 0x0 0x4>; |
164 |
++ }; |
165 |
++ |
166 |
+ ptp_clock@2d10e00 { |
167 |
+ compatible = "fsl,etsec-ptp"; |
168 |
+ reg = <0x0 0x2d10e00 0x0 0xb0>; |
169 |
+diff --git a/arch/arm/boot/dts/stm32h743i-eval.dts b/arch/arm/boot/dts/stm32h743i-eval.dts |
170 |
+index 6c07786e7ddb..0d98b2865bd7 100644 |
171 |
+--- a/arch/arm/boot/dts/stm32h743i-eval.dts |
172 |
++++ b/arch/arm/boot/dts/stm32h743i-eval.dts |
173 |
+@@ -71,6 +71,7 @@ |
174 |
+ }; |
175 |
+ |
176 |
+ &adc_12 { |
177 |
++ vdda-supply = <&vdda>; |
178 |
+ vref-supply = <&vdda>; |
179 |
+ status = "okay"; |
180 |
+ adc1: adc@0 { |
181 |
+diff --git a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts |
182 |
+index 10da56e86ab8..21b38c386f1b 100644 |
183 |
+--- a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts |
184 |
++++ b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts |
185 |
+@@ -79,6 +79,8 @@ |
186 |
+ wifi_pwrseq: wifi_pwrseq { |
187 |
+ compatible = "mmc-pwrseq-simple"; |
188 |
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ |
189 |
++ clocks = <&rtc 1>; |
190 |
++ clock-names = "ext_clock"; |
191 |
+ }; |
192 |
+ |
193 |
+ sound_spdif { |
194 |
+@@ -128,6 +130,8 @@ |
195 |
+ pinctrl-names = "default"; |
196 |
+ pinctrl-0 = <&mmc1_pins_a>; |
197 |
+ vmmc-supply = <®_vcc3v3>; |
198 |
++ vqmmc-supply = <®_vcc3v3>; |
199 |
++ mmc-pwrseq = <&wifi_pwrseq>; |
200 |
+ bus-width = <4>; |
201 |
+ non-removable; |
202 |
+ status = "okay"; |
203 |
+diff --git a/arch/arm/common/mcpm_entry.c b/arch/arm/common/mcpm_entry.c |
204 |
+index 2b913f17d50f..c24a55b0deac 100644 |
205 |
+--- a/arch/arm/common/mcpm_entry.c |
206 |
++++ b/arch/arm/common/mcpm_entry.c |
207 |
+@@ -379,7 +379,7 @@ static int __init nocache_trampoline(unsigned long _arg) |
208 |
+ unsigned int cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); |
209 |
+ phys_reset_t phys_reset; |
210 |
+ |
211 |
+- mcpm_set_entry_vector(cpu, cluster, cpu_resume); |
212 |
++ mcpm_set_entry_vector(cpu, cluster, cpu_resume_no_hyp); |
213 |
+ setup_mm_for_reboot(); |
214 |
+ |
215 |
+ __mcpm_cpu_going_down(cpu, cluster); |
216 |
+diff --git a/arch/arm/include/asm/suspend.h b/arch/arm/include/asm/suspend.h |
217 |
+index 452bbdcbcc83..506314265c6f 100644 |
218 |
+--- a/arch/arm/include/asm/suspend.h |
219 |
++++ b/arch/arm/include/asm/suspend.h |
220 |
+@@ -10,6 +10,7 @@ struct sleep_save_sp { |
221 |
+ }; |
222 |
+ |
223 |
+ extern void cpu_resume(void); |
224 |
++extern void cpu_resume_no_hyp(void); |
225 |
+ extern void cpu_resume_arm(void); |
226 |
+ extern int cpu_suspend(unsigned long, int (*)(unsigned long)); |
227 |
+ |
228 |
+diff --git a/arch/arm/kernel/hyp-stub.S b/arch/arm/kernel/hyp-stub.S |
229 |
+index 60146e32619a..82a942894fc0 100644 |
230 |
+--- a/arch/arm/kernel/hyp-stub.S |
231 |
++++ b/arch/arm/kernel/hyp-stub.S |
232 |
+@@ -180,8 +180,8 @@ ARM_BE8(orr r7, r7, #(1 << 25)) @ HSCTLR.EE |
233 |
+ @ Check whether GICv3 system registers are available |
234 |
+ mrc p15, 0, r7, c0, c1, 1 @ ID_PFR1 |
235 |
+ ubfx r7, r7, #28, #4 |
236 |
+- cmp r7, #1 |
237 |
+- bne 2f |
238 |
++ teq r7, #0 |
239 |
++ beq 2f |
240 |
+ |
241 |
+ @ Enable system register accesses |
242 |
+ mrc p15, 4, r7, c12, c9, 5 @ ICC_HSRE |
243 |
+diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S |
244 |
+index a8257fc9cf2a..5dc8b80bb693 100644 |
245 |
+--- a/arch/arm/kernel/sleep.S |
246 |
++++ b/arch/arm/kernel/sleep.S |
247 |
+@@ -120,6 +120,14 @@ ENDPROC(cpu_resume_after_mmu) |
248 |
+ .text |
249 |
+ .align |
250 |
+ |
251 |
++#ifdef CONFIG_MCPM |
252 |
++ .arm |
253 |
++THUMB( .thumb ) |
254 |
++ENTRY(cpu_resume_no_hyp) |
255 |
++ARM_BE8(setend be) @ ensure we are in BE mode |
256 |
++ b no_hyp |
257 |
++#endif |
258 |
++ |
259 |
+ #ifdef CONFIG_MMU |
260 |
+ .arm |
261 |
+ ENTRY(cpu_resume_arm) |
262 |
+@@ -135,6 +143,7 @@ ARM_BE8(setend be) @ ensure we are in BE mode |
263 |
+ bl __hyp_stub_install_secondary |
264 |
+ #endif |
265 |
+ safe_svcmode_maskall r1 |
266 |
++no_hyp: |
267 |
+ mov r1, #0 |
268 |
+ ALT_SMP(mrc p15, 0, r0, c0, c0, 5) |
269 |
+ ALT_UP_B(1f) |
270 |
+@@ -163,6 +172,9 @@ ENDPROC(cpu_resume) |
271 |
+ |
272 |
+ #ifdef CONFIG_MMU |
273 |
+ ENDPROC(cpu_resume_arm) |
274 |
++#endif |
275 |
++#ifdef CONFIG_MCPM |
276 |
++ENDPROC(cpu_resume_no_hyp) |
277 |
+ #endif |
278 |
+ |
279 |
+ .align 2 |
280 |
+diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c |
281 |
+index 45c8f2ef4e23..9274a484c6a3 100644 |
282 |
+--- a/arch/arm/mach-omap2/omap_hwmod.c |
283 |
++++ b/arch/arm/mach-omap2/omap_hwmod.c |
284 |
+@@ -2530,7 +2530,7 @@ static void _setup_iclk_autoidle(struct omap_hwmod *oh) |
285 |
+ */ |
286 |
+ static int _setup_reset(struct omap_hwmod *oh) |
287 |
+ { |
288 |
+- int r; |
289 |
++ int r = 0; |
290 |
+ |
291 |
+ if (oh->_state != _HWMOD_STATE_INITIALIZED) |
292 |
+ return -EINVAL; |
293 |
+diff --git a/arch/arm/mach-rpc/irq.c b/arch/arm/mach-rpc/irq.c |
294 |
+index b8a61cb11207..7f0f40178634 100644 |
295 |
+--- a/arch/arm/mach-rpc/irq.c |
296 |
++++ b/arch/arm/mach-rpc/irq.c |
297 |
+@@ -118,7 +118,7 @@ extern unsigned char rpc_default_fiq_start, rpc_default_fiq_end; |
298 |
+ |
299 |
+ void __init rpc_init_irq(void) |
300 |
+ { |
301 |
+- unsigned int irq, clr, set = 0; |
302 |
++ unsigned int irq, clr, set; |
303 |
+ |
304 |
+ iomd_writeb(0, IOMD_IRQMASKA); |
305 |
+ iomd_writeb(0, IOMD_IRQMASKB); |
306 |
+@@ -130,6 +130,7 @@ void __init rpc_init_irq(void) |
307 |
+ |
308 |
+ for (irq = 0; irq < NR_IRQS; irq++) { |
309 |
+ clr = IRQ_NOREQUEST; |
310 |
++ set = 0; |
311 |
+ |
312 |
+ if (irq <= 6 || (irq >= 9 && irq <= 15)) |
313 |
+ clr |= IRQ_NOPROBE; |
314 |
+diff --git a/arch/arm/plat-pxa/ssp.c b/arch/arm/plat-pxa/ssp.c |
315 |
+index b92673efffff..97bd43c16cd8 100644 |
316 |
+--- a/arch/arm/plat-pxa/ssp.c |
317 |
++++ b/arch/arm/plat-pxa/ssp.c |
318 |
+@@ -230,18 +230,12 @@ static int pxa_ssp_probe(struct platform_device *pdev) |
319 |
+ |
320 |
+ static int pxa_ssp_remove(struct platform_device *pdev) |
321 |
+ { |
322 |
+- struct resource *res; |
323 |
+ struct ssp_device *ssp; |
324 |
+ |
325 |
+ ssp = platform_get_drvdata(pdev); |
326 |
+ if (ssp == NULL) |
327 |
+ return -ENODEV; |
328 |
+ |
329 |
+- res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
330 |
+- release_mem_region(res->start, resource_size(res)); |
331 |
+- |
332 |
+- clk_put(ssp->clk); |
333 |
+- |
334 |
+ mutex_lock(&ssp_lock); |
335 |
+ list_del(&ssp->node); |
336 |
+ mutex_unlock(&ssp_lock); |
337 |
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi |
338 |
+index 8c8db1b057df..788a6f8c5994 100644 |
339 |
+--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi |
340 |
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi |
341 |
+@@ -274,7 +274,8 @@ |
342 |
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, |
343 |
+ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, |
344 |
+ <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; |
345 |
+- clocks = <&ccu 58>; |
346 |
++ clocks = <&ccu 58>, <&osc24M>, <&rtc 0>; |
347 |
++ clock-names = "apb", "hosc", "losc"; |
348 |
+ gpio-controller; |
349 |
+ #gpio-cells = <3>; |
350 |
+ interrupt-controller; |
351 |
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts |
352 |
+index e2c71753e327..407d32f4fe73 100644 |
353 |
+--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts |
354 |
++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts |
355 |
+@@ -226,7 +226,6 @@ |
356 |
+ cap-mmc-highspeed; |
357 |
+ mmc-ddr-3_3v; |
358 |
+ max-frequency = <50000000>; |
359 |
+- non-removable; |
360 |
+ disable-wp; |
361 |
+ |
362 |
+ mmc-pwrseq = <&emmc_pwrseq>; |
363 |
+diff --git a/arch/arm64/boot/dts/arm/juno-clocks.dtsi b/arch/arm64/boot/dts/arm/juno-clocks.dtsi |
364 |
+index e5e265dfa902..2870b5eeb198 100644 |
365 |
+--- a/arch/arm64/boot/dts/arm/juno-clocks.dtsi |
366 |
++++ b/arch/arm64/boot/dts/arm/juno-clocks.dtsi |
367 |
+@@ -8,10 +8,10 @@ |
368 |
+ */ |
369 |
+ / { |
370 |
+ /* SoC fixed clocks */ |
371 |
+- soc_uartclk: refclk7273800hz { |
372 |
++ soc_uartclk: refclk7372800hz { |
373 |
+ compatible = "fixed-clock"; |
374 |
+ #clock-cells = <0>; |
375 |
+- clock-frequency = <7273800>; |
376 |
++ clock-frequency = <7372800>; |
377 |
+ clock-output-names = "juno:uartclk"; |
378 |
+ }; |
379 |
+ |
380 |
+diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi |
381 |
+index b6b44fdf7fac..c1028b47edde 100644 |
382 |
+--- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi |
383 |
++++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi |
384 |
+@@ -458,6 +458,8 @@ |
385 |
+ l11 { |
386 |
+ regulator-min-microvolt = <1750000>; |
387 |
+ regulator-max-microvolt = <3337000>; |
388 |
++ regulator-allow-set-load; |
389 |
++ regulator-system-load = <200000>; |
390 |
+ }; |
391 |
+ |
392 |
+ l12 { |
393 |
+diff --git a/arch/m68k/amiga/cia.c b/arch/m68k/amiga/cia.c |
394 |
+index 2081b8cd5591..b9aee983e6f4 100644 |
395 |
+--- a/arch/m68k/amiga/cia.c |
396 |
++++ b/arch/m68k/amiga/cia.c |
397 |
+@@ -88,10 +88,19 @@ static irqreturn_t cia_handler(int irq, void *dev_id) |
398 |
+ struct ciabase *base = dev_id; |
399 |
+ int mach_irq; |
400 |
+ unsigned char ints; |
401 |
++ unsigned long flags; |
402 |
+ |
403 |
++ /* Interrupts get disabled while the timer irq flag is cleared and |
404 |
++ * the timer interrupt serviced. |
405 |
++ */ |
406 |
+ mach_irq = base->cia_irq; |
407 |
++ local_irq_save(flags); |
408 |
+ ints = cia_set_irq(base, CIA_ICR_ALL); |
409 |
+ amiga_custom.intreq = base->int_mask; |
410 |
++ if (ints & 1) |
411 |
++ generic_handle_irq(mach_irq); |
412 |
++ local_irq_restore(flags); |
413 |
++ mach_irq++, ints >>= 1; |
414 |
+ for (; ints; mach_irq++, ints >>= 1) { |
415 |
+ if (ints & 1) |
416 |
+ generic_handle_irq(mach_irq); |
417 |
+diff --git a/arch/m68k/atari/ataints.c b/arch/m68k/atari/ataints.c |
418 |
+index 3d2b63bedf05..56f02ea2c248 100644 |
419 |
+--- a/arch/m68k/atari/ataints.c |
420 |
++++ b/arch/m68k/atari/ataints.c |
421 |
+@@ -142,7 +142,7 @@ struct mfptimerbase { |
422 |
+ .name = "MFP Timer D" |
423 |
+ }; |
424 |
+ |
425 |
+-static irqreturn_t mfptimer_handler(int irq, void *dev_id) |
426 |
++static irqreturn_t mfp_timer_d_handler(int irq, void *dev_id) |
427 |
+ { |
428 |
+ struct mfptimerbase *base = dev_id; |
429 |
+ int mach_irq; |
430 |
+@@ -344,7 +344,7 @@ void __init atari_init_IRQ(void) |
431 |
+ st_mfp.tim_ct_cd = (st_mfp.tim_ct_cd & 0xf0) | 0x6; |
432 |
+ |
433 |
+ /* request timer D dispatch handler */ |
434 |
+- if (request_irq(IRQ_MFP_TIMD, mfptimer_handler, IRQF_SHARED, |
435 |
++ if (request_irq(IRQ_MFP_TIMD, mfp_timer_d_handler, IRQF_SHARED, |
436 |
+ stmfp_base.name, &stmfp_base)) |
437 |
+ pr_err("Couldn't register %s interrupt\n", stmfp_base.name); |
438 |
+ |
439 |
+diff --git a/arch/m68k/atari/time.c b/arch/m68k/atari/time.c |
440 |
+index c549b48174ec..972181c1fe4b 100644 |
441 |
+--- a/arch/m68k/atari/time.c |
442 |
++++ b/arch/m68k/atari/time.c |
443 |
+@@ -24,6 +24,18 @@ |
444 |
+ DEFINE_SPINLOCK(rtc_lock); |
445 |
+ EXPORT_SYMBOL_GPL(rtc_lock); |
446 |
+ |
447 |
++static irqreturn_t mfp_timer_c_handler(int irq, void *dev_id) |
448 |
++{ |
449 |
++ irq_handler_t timer_routine = dev_id; |
450 |
++ unsigned long flags; |
451 |
++ |
452 |
++ local_irq_save(flags); |
453 |
++ timer_routine(0, NULL); |
454 |
++ local_irq_restore(flags); |
455 |
++ |
456 |
++ return IRQ_HANDLED; |
457 |
++} |
458 |
++ |
459 |
+ void __init |
460 |
+ atari_sched_init(irq_handler_t timer_routine) |
461 |
+ { |
462 |
+@@ -32,7 +44,8 @@ atari_sched_init(irq_handler_t timer_routine) |
463 |
+ /* start timer C, div = 1:100 */ |
464 |
+ st_mfp.tim_ct_cd = (st_mfp.tim_ct_cd & 15) | 0x60; |
465 |
+ /* install interrupt service routine for MFP Timer C */ |
466 |
+- if (request_irq(IRQ_MFP_TIMC, timer_routine, 0, "timer", timer_routine)) |
467 |
++ if (request_irq(IRQ_MFP_TIMC, mfp_timer_c_handler, 0, "timer", |
468 |
++ timer_routine)) |
469 |
+ pr_err("Couldn't register timer interrupt\n"); |
470 |
+ } |
471 |
+ |
472 |
+diff --git a/arch/m68k/bvme6000/config.c b/arch/m68k/bvme6000/config.c |
473 |
+index 2cfff4765040..0e602c32b246 100644 |
474 |
+--- a/arch/m68k/bvme6000/config.c |
475 |
++++ b/arch/m68k/bvme6000/config.c |
476 |
+@@ -45,11 +45,6 @@ extern int bvme6000_set_clock_mmss (unsigned long); |
477 |
+ extern void bvme6000_reset (void); |
478 |
+ void bvme6000_set_vectors (void); |
479 |
+ |
480 |
+-/* Save tick handler routine pointer, will point to xtime_update() in |
481 |
+- * kernel/timer/timekeeping.c, called via bvme6000_process_int() */ |
482 |
+- |
483 |
+-static irq_handler_t tick_handler; |
484 |
+- |
485 |
+ |
486 |
+ int __init bvme6000_parse_bootinfo(const struct bi_record *bi) |
487 |
+ { |
488 |
+@@ -159,12 +154,18 @@ irqreturn_t bvme6000_abort_int (int irq, void *dev_id) |
489 |
+ |
490 |
+ static irqreturn_t bvme6000_timer_int (int irq, void *dev_id) |
491 |
+ { |
492 |
++ irq_handler_t timer_routine = dev_id; |
493 |
++ unsigned long flags; |
494 |
+ volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE; |
495 |
+- unsigned char msr = rtc->msr & 0xc0; |
496 |
++ unsigned char msr; |
497 |
+ |
498 |
++ local_irq_save(flags); |
499 |
++ msr = rtc->msr & 0xc0; |
500 |
+ rtc->msr = msr | 0x20; /* Ack the interrupt */ |
501 |
++ timer_routine(0, NULL); |
502 |
++ local_irq_restore(flags); |
503 |
+ |
504 |
+- return tick_handler(irq, dev_id); |
505 |
++ return IRQ_HANDLED; |
506 |
+ } |
507 |
+ |
508 |
+ /* |
509 |
+@@ -183,9 +184,8 @@ void bvme6000_sched_init (irq_handler_t timer_routine) |
510 |
+ |
511 |
+ rtc->msr = 0; /* Ensure timer registers accessible */ |
512 |
+ |
513 |
+- tick_handler = timer_routine; |
514 |
+- if (request_irq(BVME_IRQ_RTC, bvme6000_timer_int, 0, |
515 |
+- "timer", bvme6000_timer_int)) |
516 |
++ if (request_irq(BVME_IRQ_RTC, bvme6000_timer_int, 0, "timer", |
517 |
++ timer_routine)) |
518 |
+ panic ("Couldn't register timer int"); |
519 |
+ |
520 |
+ rtc->t1cr_omr = 0x04; /* Mode 2, ext clk */ |
521 |
+diff --git a/arch/m68k/hp300/time.c b/arch/m68k/hp300/time.c |
522 |
+index 289d928a46cb..d30b03ea93a2 100644 |
523 |
+--- a/arch/m68k/hp300/time.c |
524 |
++++ b/arch/m68k/hp300/time.c |
525 |
+@@ -38,13 +38,19 @@ |
526 |
+ |
527 |
+ static irqreturn_t hp300_tick(int irq, void *dev_id) |
528 |
+ { |
529 |
++ irq_handler_t timer_routine = dev_id; |
530 |
++ unsigned long flags; |
531 |
+ unsigned long tmp; |
532 |
+- irq_handler_t vector = dev_id; |
533 |
++ |
534 |
++ local_irq_save(flags); |
535 |
+ in_8(CLOCKBASE + CLKSR); |
536 |
+ asm volatile ("movpw %1@(5),%0" : "=d" (tmp) : "a" (CLOCKBASE)); |
537 |
++ timer_routine(0, NULL); |
538 |
++ local_irq_restore(flags); |
539 |
++ |
540 |
+ /* Turn off the network and SCSI leds */ |
541 |
+ blinken_leds(0, 0xe0); |
542 |
+- return vector(irq, NULL); |
543 |
++ return IRQ_HANDLED; |
544 |
+ } |
545 |
+ |
546 |
+ u32 hp300_gettimeoffset(void) |
547 |
+diff --git a/arch/m68k/mac/via.c b/arch/m68k/mac/via.c |
548 |
+index 9f59a662ace5..863806e6775a 100644 |
549 |
+--- a/arch/m68k/mac/via.c |
550 |
++++ b/arch/m68k/mac/via.c |
551 |
+@@ -54,16 +54,6 @@ static __u8 rbv_clear; |
552 |
+ |
553 |
+ static int gIER,gIFR,gBufA,gBufB; |
554 |
+ |
555 |
+-/* |
556 |
+- * Timer defs. |
557 |
+- */ |
558 |
+- |
559 |
+-#define TICK_SIZE 10000 |
560 |
+-#define MAC_CLOCK_TICK (783300/HZ) /* ticks per HZ */ |
561 |
+-#define MAC_CLOCK_LOW (MAC_CLOCK_TICK&0xFF) |
562 |
+-#define MAC_CLOCK_HIGH (MAC_CLOCK_TICK>>8) |
563 |
+- |
564 |
+- |
565 |
+ /* |
566 |
+ * On Macs with a genuine VIA chip there is no way to mask an individual slot |
567 |
+ * interrupt. This limitation also seems to apply to VIA clone logic cores in |
568 |
+@@ -278,22 +268,6 @@ void __init via_init(void) |
569 |
+ } |
570 |
+ } |
571 |
+ |
572 |
+-/* |
573 |
+- * Start the 100 Hz clock |
574 |
+- */ |
575 |
+- |
576 |
+-void __init via_init_clock(irq_handler_t func) |
577 |
+-{ |
578 |
+- via1[vACR] |= 0x40; |
579 |
+- via1[vT1LL] = MAC_CLOCK_LOW; |
580 |
+- via1[vT1LH] = MAC_CLOCK_HIGH; |
581 |
+- via1[vT1CL] = MAC_CLOCK_LOW; |
582 |
+- via1[vT1CH] = MAC_CLOCK_HIGH; |
583 |
+- |
584 |
+- if (request_irq(IRQ_MAC_TIMER_1, func, 0, "timer", func)) |
585 |
+- pr_err("Couldn't register %s interrupt\n", "timer"); |
586 |
+-} |
587 |
+- |
588 |
+ /* |
589 |
+ * Debugging dump, used in various places to see what's going on. |
590 |
+ */ |
591 |
+@@ -321,29 +295,6 @@ void via_debug_dump(void) |
592 |
+ } |
593 |
+ } |
594 |
+ |
595 |
+-/* |
596 |
+- * This is always executed with interrupts disabled. |
597 |
+- * |
598 |
+- * TBI: get time offset between scheduling timer ticks |
599 |
+- */ |
600 |
+- |
601 |
+-u32 mac_gettimeoffset(void) |
602 |
+-{ |
603 |
+- unsigned long ticks, offset = 0; |
604 |
+- |
605 |
+- /* read VIA1 timer 2 current value */ |
606 |
+- ticks = via1[vT1CL] | (via1[vT1CH] << 8); |
607 |
+- /* The probability of underflow is less than 2% */ |
608 |
+- if (ticks > MAC_CLOCK_TICK - MAC_CLOCK_TICK / 50) |
609 |
+- /* Check for pending timer interrupt in VIA1 IFR */ |
610 |
+- if (via1[vIFR] & 0x40) offset = TICK_SIZE; |
611 |
+- |
612 |
+- ticks = MAC_CLOCK_TICK - ticks; |
613 |
+- ticks = ticks * 10000L / MAC_CLOCK_TICK; |
614 |
+- |
615 |
+- return (ticks + offset) * 1000; |
616 |
+-} |
617 |
+- |
618 |
+ /* |
619 |
+ * Flush the L2 cache on Macs that have it by flipping |
620 |
+ * the system into 24-bit mode for an instant. |
621 |
+@@ -447,6 +398,8 @@ void via_nubus_irq_shutdown(int irq) |
622 |
+ * via6522.c :-), disable/pending masks added. |
623 |
+ */ |
624 |
+ |
625 |
++#define VIA_TIMER_1_INT BIT(6) |
626 |
++ |
627 |
+ void via1_irq(struct irq_desc *desc) |
628 |
+ { |
629 |
+ int irq_num; |
630 |
+@@ -456,6 +409,21 @@ void via1_irq(struct irq_desc *desc) |
631 |
+ if (!events) |
632 |
+ return; |
633 |
+ |
634 |
++ irq_num = IRQ_MAC_TIMER_1; |
635 |
++ irq_bit = VIA_TIMER_1_INT; |
636 |
++ if (events & irq_bit) { |
637 |
++ unsigned long flags; |
638 |
++ |
639 |
++ local_irq_save(flags); |
640 |
++ via1[vIFR] = irq_bit; |
641 |
++ generic_handle_irq(irq_num); |
642 |
++ local_irq_restore(flags); |
643 |
++ |
644 |
++ events &= ~irq_bit; |
645 |
++ if (!events) |
646 |
++ return; |
647 |
++ } |
648 |
++ |
649 |
+ irq_num = VIA1_SOURCE_BASE; |
650 |
+ irq_bit = 1; |
651 |
+ do { |
652 |
+@@ -612,3 +580,56 @@ int via2_scsi_drq_pending(void) |
653 |
+ return via2[gIFR] & (1 << IRQ_IDX(IRQ_MAC_SCSIDRQ)); |
654 |
+ } |
655 |
+ EXPORT_SYMBOL(via2_scsi_drq_pending); |
656 |
++ |
657 |
++/* timer and clock source */ |
658 |
++ |
659 |
++#define VIA_CLOCK_FREQ 783360 /* VIA "phase 2" clock in Hz */ |
660 |
++#define VIA_TIMER_INTERVAL (1000000 / HZ) /* microseconds per jiffy */ |
661 |
++#define VIA_TIMER_CYCLES (VIA_CLOCK_FREQ / HZ) /* clock cycles per jiffy */ |
662 |
++ |
663 |
++#define VIA_TC (VIA_TIMER_CYCLES - 2) /* including 0 and -1 */ |
664 |
++#define VIA_TC_LOW (VIA_TC & 0xFF) |
665 |
++#define VIA_TC_HIGH (VIA_TC >> 8) |
666 |
++ |
667 |
++void __init via_init_clock(irq_handler_t timer_routine) |
668 |
++{ |
669 |
++ if (request_irq(IRQ_MAC_TIMER_1, timer_routine, 0, "timer", NULL)) { |
670 |
++ pr_err("Couldn't register %s interrupt\n", "timer"); |
671 |
++ return; |
672 |
++ } |
673 |
++ |
674 |
++ via1[vT1LL] = VIA_TC_LOW; |
675 |
++ via1[vT1LH] = VIA_TC_HIGH; |
676 |
++ via1[vT1CL] = VIA_TC_LOW; |
677 |
++ via1[vT1CH] = VIA_TC_HIGH; |
678 |
++ via1[vACR] |= 0x40; |
679 |
++} |
680 |
++ |
681 |
++u32 mac_gettimeoffset(void) |
682 |
++{ |
683 |
++ unsigned long flags; |
684 |
++ u8 count_high; |
685 |
++ u16 count, offset = 0; |
686 |
++ |
687 |
++ /* |
688 |
++ * Timer counter wrap-around is detected with the timer interrupt flag |
689 |
++ * but reading the counter low byte (vT1CL) would reset the flag. |
690 |
++ * Also, accessing both counter registers is essentially a data race. |
691 |
++ * These problems are avoided by ignoring the low byte. Clock accuracy |
692 |
++ * is 256 times worse (error can reach 0.327 ms) but CPU overhead is |
693 |
++ * reduced by avoiding slow VIA register accesses. |
694 |
++ */ |
695 |
++ |
696 |
++ local_irq_save(flags); |
697 |
++ count_high = via1[vT1CH]; |
698 |
++ if (count_high == 0xFF) |
699 |
++ count_high = 0; |
700 |
++ if (count_high > 0 && (via1[vIFR] & VIA_TIMER_1_INT)) |
701 |
++ offset = VIA_TIMER_CYCLES; |
702 |
++ local_irq_restore(flags); |
703 |
++ |
704 |
++ count = count_high << 8; |
705 |
++ count = VIA_TIMER_CYCLES - count + offset; |
706 |
++ |
707 |
++ return ((count * VIA_TIMER_INTERVAL) / VIA_TIMER_CYCLES) * 1000; |
708 |
++} |
709 |
+diff --git a/arch/m68k/mvme147/config.c b/arch/m68k/mvme147/config.c |
710 |
+index 8778612d1f31..78ae803c833e 100644 |
711 |
+--- a/arch/m68k/mvme147/config.c |
712 |
++++ b/arch/m68k/mvme147/config.c |
713 |
+@@ -46,11 +46,6 @@ extern void mvme147_reset (void); |
714 |
+ |
715 |
+ static int bcd2int (unsigned char b); |
716 |
+ |
717 |
+-/* Save tick handler routine pointer, will point to xtime_update() in |
718 |
+- * kernel/time/timekeeping.c, called via mvme147_process_int() */ |
719 |
+- |
720 |
+-irq_handler_t tick_handler; |
721 |
+- |
722 |
+ |
723 |
+ int __init mvme147_parse_bootinfo(const struct bi_record *bi) |
724 |
+ { |
725 |
+@@ -106,16 +101,23 @@ void __init config_mvme147(void) |
726 |
+ |
727 |
+ static irqreturn_t mvme147_timer_int (int irq, void *dev_id) |
728 |
+ { |
729 |
++ irq_handler_t timer_routine = dev_id; |
730 |
++ unsigned long flags; |
731 |
++ |
732 |
++ local_irq_save(flags); |
733 |
+ m147_pcc->t1_int_cntrl = PCC_TIMER_INT_CLR; |
734 |
+ m147_pcc->t1_int_cntrl = PCC_INT_ENAB|PCC_LEVEL_TIMER1; |
735 |
+- return tick_handler(irq, dev_id); |
736 |
++ timer_routine(0, NULL); |
737 |
++ local_irq_restore(flags); |
738 |
++ |
739 |
++ return IRQ_HANDLED; |
740 |
+ } |
741 |
+ |
742 |
+ |
743 |
+ void mvme147_sched_init (irq_handler_t timer_routine) |
744 |
+ { |
745 |
+- tick_handler = timer_routine; |
746 |
+- if (request_irq(PCC_IRQ_TIMER1, mvme147_timer_int, 0, "timer 1", NULL)) |
747 |
++ if (request_irq(PCC_IRQ_TIMER1, mvme147_timer_int, 0, "timer 1", |
748 |
++ timer_routine)) |
749 |
+ pr_err("Couldn't register timer interrupt\n"); |
750 |
+ |
751 |
+ /* Init the clock with a value */ |
752 |
+diff --git a/arch/m68k/mvme16x/config.c b/arch/m68k/mvme16x/config.c |
753 |
+index 6fa06d4d16bf..3116dd576bb3 100644 |
754 |
+--- a/arch/m68k/mvme16x/config.c |
755 |
++++ b/arch/m68k/mvme16x/config.c |
756 |
+@@ -51,11 +51,6 @@ extern void mvme16x_reset (void); |
757 |
+ |
758 |
+ int bcd2int (unsigned char b); |
759 |
+ |
760 |
+-/* Save tick handler routine pointer, will point to xtime_update() in |
761 |
+- * kernel/time/timekeeping.c, called via mvme16x_process_int() */ |
762 |
+- |
763 |
+-static irq_handler_t tick_handler; |
764 |
+- |
765 |
+ |
766 |
+ unsigned short mvme16x_config; |
767 |
+ EXPORT_SYMBOL(mvme16x_config); |
768 |
+@@ -354,8 +349,15 @@ static irqreturn_t mvme16x_abort_int (int irq, void *dev_id) |
769 |
+ |
770 |
+ static irqreturn_t mvme16x_timer_int (int irq, void *dev_id) |
771 |
+ { |
772 |
+- *(volatile unsigned char *)0xfff4201b |= 8; |
773 |
+- return tick_handler(irq, dev_id); |
774 |
++ irq_handler_t timer_routine = dev_id; |
775 |
++ unsigned long flags; |
776 |
++ |
777 |
++ local_irq_save(flags); |
778 |
++ *(volatile unsigned char *)0xfff4201b |= 8; |
779 |
++ timer_routine(0, NULL); |
780 |
++ local_irq_restore(flags); |
781 |
++ |
782 |
++ return IRQ_HANDLED; |
783 |
+ } |
784 |
+ |
785 |
+ void mvme16x_sched_init (irq_handler_t timer_routine) |
786 |
+@@ -363,14 +365,13 @@ void mvme16x_sched_init (irq_handler_t timer_routine) |
787 |
+ uint16_t brdno = be16_to_cpu(mvme_bdid.brdno); |
788 |
+ int irq; |
789 |
+ |
790 |
+- tick_handler = timer_routine; |
791 |
+ /* Using PCCchip2 or MC2 chip tick timer 1 */ |
792 |
+ *(volatile unsigned long *)0xfff42008 = 0; |
793 |
+ *(volatile unsigned long *)0xfff42004 = 10000; /* 10ms */ |
794 |
+ *(volatile unsigned char *)0xfff42017 |= 3; |
795 |
+ *(volatile unsigned char *)0xfff4201b = 0x16; |
796 |
+- if (request_irq(MVME16x_IRQ_TIMER, mvme16x_timer_int, 0, |
797 |
+- "timer", mvme16x_timer_int)) |
798 |
++ if (request_irq(MVME16x_IRQ_TIMER, mvme16x_timer_int, 0, "timer", |
799 |
++ timer_routine)) |
800 |
+ panic ("Couldn't register timer int"); |
801 |
+ |
802 |
+ if (brdno == 0x0162 || brdno == 0x172) |
803 |
+diff --git a/arch/m68k/q40/q40ints.c b/arch/m68k/q40/q40ints.c |
804 |
+index 3e7603202977..1c696906c159 100644 |
805 |
+--- a/arch/m68k/q40/q40ints.c |
806 |
++++ b/arch/m68k/q40/q40ints.c |
807 |
+@@ -127,10 +127,10 @@ void q40_mksound(unsigned int hz, unsigned int ticks) |
808 |
+ sound_ticks = ticks << 1; |
809 |
+ } |
810 |
+ |
811 |
+-static irq_handler_t q40_timer_routine; |
812 |
+- |
813 |
+-static irqreturn_t q40_timer_int (int irq, void * dev) |
814 |
++static irqreturn_t q40_timer_int(int irq, void *dev_id) |
815 |
+ { |
816 |
++ irq_handler_t timer_routine = dev_id; |
817 |
++ |
818 |
+ ql_ticks = ql_ticks ? 0 : 1; |
819 |
+ if (sound_ticks) { |
820 |
+ unsigned char sval=(sound_ticks & 1) ? 128-SVOL : 128+SVOL; |
821 |
+@@ -139,8 +139,13 @@ static irqreturn_t q40_timer_int (int irq, void * dev) |
822 |
+ *DAC_RIGHT=sval; |
823 |
+ } |
824 |
+ |
825 |
+- if (!ql_ticks) |
826 |
+- q40_timer_routine(irq, dev); |
827 |
++ if (!ql_ticks) { |
828 |
++ unsigned long flags; |
829 |
++ |
830 |
++ local_irq_save(flags); |
831 |
++ timer_routine(0, NULL); |
832 |
++ local_irq_restore(flags); |
833 |
++ } |
834 |
+ return IRQ_HANDLED; |
835 |
+ } |
836 |
+ |
837 |
+@@ -148,11 +153,9 @@ void q40_sched_init (irq_handler_t timer_routine) |
838 |
+ { |
839 |
+ int timer_irq; |
840 |
+ |
841 |
+- q40_timer_routine = timer_routine; |
842 |
+ timer_irq = Q40_IRQ_FRAME; |
843 |
+ |
844 |
+- if (request_irq(timer_irq, q40_timer_int, 0, |
845 |
+- "timer", q40_timer_int)) |
846 |
++ if (request_irq(timer_irq, q40_timer_int, 0, "timer", timer_routine)) |
847 |
+ panic("Couldn't register timer int"); |
848 |
+ |
849 |
+ master_outb(-1, FRAME_CLEAR_REG); |
850 |
+diff --git a/arch/m68k/sun3/sun3ints.c b/arch/m68k/sun3/sun3ints.c |
851 |
+index 6bbca30c9188..a5824abb4a39 100644 |
852 |
+--- a/arch/m68k/sun3/sun3ints.c |
853 |
++++ b/arch/m68k/sun3/sun3ints.c |
854 |
+@@ -61,8 +61,10 @@ static irqreturn_t sun3_int7(int irq, void *dev_id) |
855 |
+ |
856 |
+ static irqreturn_t sun3_int5(int irq, void *dev_id) |
857 |
+ { |
858 |
++ unsigned long flags; |
859 |
+ unsigned int cnt; |
860 |
+ |
861 |
++ local_irq_save(flags); |
862 |
+ #ifdef CONFIG_SUN3 |
863 |
+ intersil_clear(); |
864 |
+ #endif |
865 |
+@@ -76,6 +78,7 @@ static irqreturn_t sun3_int5(int irq, void *dev_id) |
866 |
+ cnt = kstat_irqs_cpu(irq, 0); |
867 |
+ if (!(cnt % 20)) |
868 |
+ sun3_leds(led_pattern[cnt % 160 / 20]); |
869 |
++ local_irq_restore(flags); |
870 |
+ return IRQ_HANDLED; |
871 |
+ } |
872 |
+ |
873 |
+diff --git a/arch/m68k/sun3x/time.c b/arch/m68k/sun3x/time.c |
874 |
+index 7a2c53d9f779..48b43903253e 100644 |
875 |
+--- a/arch/m68k/sun3x/time.c |
876 |
++++ b/arch/m68k/sun3x/time.c |
877 |
+@@ -78,15 +78,19 @@ u32 sun3x_gettimeoffset(void) |
878 |
+ } |
879 |
+ |
880 |
+ #if 0 |
881 |
+-static void sun3x_timer_tick(int irq, void *dev_id, struct pt_regs *regs) |
882 |
++static irqreturn_t sun3x_timer_tick(int irq, void *dev_id) |
883 |
+ { |
884 |
+- void (*vector)(int, void *, struct pt_regs *) = dev_id; |
885 |
++ irq_handler_t timer_routine = dev_id; |
886 |
++ unsigned long flags; |
887 |
+ |
888 |
+- /* Clear the pending interrupt - pulse the enable line low */ |
889 |
+- disable_irq(5); |
890 |
+- enable_irq(5); |
891 |
++ local_irq_save(flags); |
892 |
++ /* Clear the pending interrupt - pulse the enable line low */ |
893 |
++ disable_irq(5); |
894 |
++ enable_irq(5); |
895 |
++ timer_routine(0, NULL); |
896 |
++ local_irq_restore(flags); |
897 |
+ |
898 |
+- vector(irq, NULL, regs); |
899 |
++ return IRQ_HANDLED; |
900 |
+ } |
901 |
+ #endif |
902 |
+ |
903 |
+diff --git a/arch/mips/bcm63xx/Makefile b/arch/mips/bcm63xx/Makefile |
904 |
+index c69f297fc1df..d89651e538f6 100644 |
905 |
+--- a/arch/mips/bcm63xx/Makefile |
906 |
++++ b/arch/mips/bcm63xx/Makefile |
907 |
+@@ -1,8 +1,8 @@ |
908 |
+ # SPDX-License-Identifier: GPL-2.0 |
909 |
+ obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \ |
910 |
+- setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \ |
911 |
+- dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \ |
912 |
+- dev-wdt.o dev-usb-usbd.o |
913 |
++ setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \ |
914 |
++ dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o dev-wdt.o \ |
915 |
++ dev-usb-usbd.o |
916 |
+ obj-$(CONFIG_EARLY_PRINTK) += early_printk.o |
917 |
+ |
918 |
+ obj-y += boards/ |
919 |
+diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c b/arch/mips/bcm63xx/boards/board_bcm963xx.c |
920 |
+index b2097c0d2ed7..36ec3dc2c999 100644 |
921 |
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c |
922 |
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c |
923 |
+@@ -23,7 +23,6 @@ |
924 |
+ #include <bcm63xx_nvram.h> |
925 |
+ #include <bcm63xx_dev_pci.h> |
926 |
+ #include <bcm63xx_dev_enet.h> |
927 |
+-#include <bcm63xx_dev_dsp.h> |
928 |
+ #include <bcm63xx_dev_flash.h> |
929 |
+ #include <bcm63xx_dev_hsspi.h> |
930 |
+ #include <bcm63xx_dev_pcmcia.h> |
931 |
+@@ -289,14 +288,6 @@ static struct board_info __initdata board_96348gw_10 = { |
932 |
+ .has_pccard = 1, |
933 |
+ .has_ehci0 = 1, |
934 |
+ |
935 |
+- .has_dsp = 1, |
936 |
+- .dsp = { |
937 |
+- .gpio_rst = 6, |
938 |
+- .gpio_int = 34, |
939 |
+- .cs = 2, |
940 |
+- .ext_irq = 2, |
941 |
+- }, |
942 |
+- |
943 |
+ .leds = { |
944 |
+ { |
945 |
+ .name = "adsl-fail", |
946 |
+@@ -401,14 +392,6 @@ static struct board_info __initdata board_96348gw = { |
947 |
+ |
948 |
+ .has_ohci0 = 1, |
949 |
+ |
950 |
+- .has_dsp = 1, |
951 |
+- .dsp = { |
952 |
+- .gpio_rst = 6, |
953 |
+- .gpio_int = 34, |
954 |
+- .ext_irq = 2, |
955 |
+- .cs = 2, |
956 |
+- }, |
957 |
+- |
958 |
+ .leds = { |
959 |
+ { |
960 |
+ .name = "adsl-fail", |
961 |
+@@ -898,9 +881,6 @@ int __init board_register_devices(void) |
962 |
+ if (board.has_usbd) |
963 |
+ bcm63xx_usbd_register(&board.usbd); |
964 |
+ |
965 |
+- if (board.has_dsp) |
966 |
+- bcm63xx_dsp_register(&board.dsp); |
967 |
+- |
968 |
+ /* Generate MAC address for WLAN and register our SPROM, |
969 |
+ * do this after registering enet devices |
970 |
+ */ |
971 |
+diff --git a/arch/mips/bcm63xx/dev-dsp.c b/arch/mips/bcm63xx/dev-dsp.c |
972 |
+deleted file mode 100644 |
973 |
+index 5bb5b154c9bd..000000000000 |
974 |
+--- a/arch/mips/bcm63xx/dev-dsp.c |
975 |
++++ /dev/null |
976 |
+@@ -1,56 +0,0 @@ |
977 |
+-/* |
978 |
+- * Broadcom BCM63xx VoIP DSP registration |
979 |
+- * |
980 |
+- * This file is subject to the terms and conditions of the GNU General Public |
981 |
+- * License. See the file "COPYING" in the main directory of this archive |
982 |
+- * for more details. |
983 |
+- * |
984 |
+- * Copyright (C) 2009 Florian Fainelli <florian@×××××××.org> |
985 |
+- */ |
986 |
+- |
987 |
+-#include <linux/init.h> |
988 |
+-#include <linux/kernel.h> |
989 |
+-#include <linux/platform_device.h> |
990 |
+- |
991 |
+-#include <bcm63xx_cpu.h> |
992 |
+-#include <bcm63xx_dev_dsp.h> |
993 |
+-#include <bcm63xx_regs.h> |
994 |
+-#include <bcm63xx_io.h> |
995 |
+- |
996 |
+-static struct resource voip_dsp_resources[] = { |
997 |
+- { |
998 |
+- .start = -1, /* filled at runtime */ |
999 |
+- .end = -1, /* filled at runtime */ |
1000 |
+- .flags = IORESOURCE_MEM, |
1001 |
+- }, |
1002 |
+- { |
1003 |
+- .start = -1, /* filled at runtime */ |
1004 |
+- .flags = IORESOURCE_IRQ, |
1005 |
+- }, |
1006 |
+-}; |
1007 |
+- |
1008 |
+-static struct platform_device bcm63xx_voip_dsp_device = { |
1009 |
+- .name = "bcm63xx-voip-dsp", |
1010 |
+- .id = -1, |
1011 |
+- .num_resources = ARRAY_SIZE(voip_dsp_resources), |
1012 |
+- .resource = voip_dsp_resources, |
1013 |
+-}; |
1014 |
+- |
1015 |
+-int __init bcm63xx_dsp_register(const struct bcm63xx_dsp_platform_data *pd) |
1016 |
+-{ |
1017 |
+- struct bcm63xx_dsp_platform_data *dpd; |
1018 |
+- u32 val; |
1019 |
+- |
1020 |
+- /* Get the memory window */ |
1021 |
+- val = bcm_mpi_readl(MPI_CSBASE_REG(pd->cs - 1)); |
1022 |
+- val &= MPI_CSBASE_BASE_MASK; |
1023 |
+- voip_dsp_resources[0].start = val; |
1024 |
+- voip_dsp_resources[0].end = val + 0xFFFFFFF; |
1025 |
+- voip_dsp_resources[1].start = pd->ext_irq; |
1026 |
+- |
1027 |
+- /* copy given platform data */ |
1028 |
+- dpd = bcm63xx_voip_dsp_device.dev.platform_data; |
1029 |
+- memcpy(dpd, pd, sizeof (*pd)); |
1030 |
+- |
1031 |
+- return platform_device_register(&bcm63xx_voip_dsp_device); |
1032 |
+-} |
1033 |
+diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h |
1034 |
+index 57b34257be2b..98eb15b0524c 100644 |
1035 |
+--- a/arch/mips/include/asm/io.h |
1036 |
++++ b/arch/mips/include/asm/io.h |
1037 |
+@@ -60,21 +60,11 @@ |
1038 |
+ * instruction, so the lower 16 bits must be zero. Should be true on |
1039 |
+ * on any sane architecture; generic code does not use this assumption. |
1040 |
+ */ |
1041 |
+-extern const unsigned long mips_io_port_base; |
1042 |
++extern unsigned long mips_io_port_base; |
1043 |
+ |
1044 |
+-/* |
1045 |
+- * Gcc will generate code to load the value of mips_io_port_base after each |
1046 |
+- * function call which may be fairly wasteful in some cases. So we don't |
1047 |
+- * play quite by the book. We tell gcc mips_io_port_base is a long variable |
1048 |
+- * which solves the code generation issue. Now we need to violate the |
1049 |
+- * aliasing rules a little to make initialization possible and finally we |
1050 |
+- * will need the barrier() to fight side effects of the aliasing chat. |
1051 |
+- * This trickery will eventually collapse under gcc's optimizer. Oh well. |
1052 |
+- */ |
1053 |
+ static inline void set_io_port_base(unsigned long base) |
1054 |
+ { |
1055 |
+- * (unsigned long *) &mips_io_port_base = base; |
1056 |
+- barrier(); |
1057 |
++ mips_io_port_base = base; |
1058 |
+ } |
1059 |
+ |
1060 |
+ /* |
1061 |
+diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_dsp.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_dsp.h |
1062 |
+deleted file mode 100644 |
1063 |
+index 4e4970787371..000000000000 |
1064 |
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_dsp.h |
1065 |
++++ /dev/null |
1066 |
+@@ -1,14 +0,0 @@ |
1067 |
+-/* SPDX-License-Identifier: GPL-2.0 */ |
1068 |
+-#ifndef __BCM63XX_DSP_H |
1069 |
+-#define __BCM63XX_DSP_H |
1070 |
+- |
1071 |
+-struct bcm63xx_dsp_platform_data { |
1072 |
+- unsigned gpio_rst; |
1073 |
+- unsigned gpio_int; |
1074 |
+- unsigned cs; |
1075 |
+- unsigned ext_irq; |
1076 |
+-}; |
1077 |
+- |
1078 |
+-int __init bcm63xx_dsp_register(const struct bcm63xx_dsp_platform_data *pd); |
1079 |
+- |
1080 |
+-#endif /* __BCM63XX_DSP_H */ |
1081 |
+diff --git a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h |
1082 |
+index 5e5b1bc4a324..830f53f28e3f 100644 |
1083 |
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h |
1084 |
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h |
1085 |
+@@ -7,7 +7,6 @@ |
1086 |
+ #include <linux/leds.h> |
1087 |
+ #include <bcm63xx_dev_enet.h> |
1088 |
+ #include <bcm63xx_dev_usb_usbd.h> |
1089 |
+-#include <bcm63xx_dev_dsp.h> |
1090 |
+ |
1091 |
+ /* |
1092 |
+ * flash mapping |
1093 |
+@@ -31,7 +30,6 @@ struct board_info { |
1094 |
+ unsigned int has_ohci0:1; |
1095 |
+ unsigned int has_ehci0:1; |
1096 |
+ unsigned int has_usbd:1; |
1097 |
+- unsigned int has_dsp:1; |
1098 |
+ unsigned int has_uart0:1; |
1099 |
+ unsigned int has_uart1:1; |
1100 |
+ |
1101 |
+@@ -43,9 +41,6 @@ struct board_info { |
1102 |
+ /* USB config */ |
1103 |
+ struct bcm63xx_usbd_platform_data usbd; |
1104 |
+ |
1105 |
+- /* DSP config */ |
1106 |
+- struct bcm63xx_dsp_platform_data dsp; |
1107 |
+- |
1108 |
+ /* GPIO LEDs */ |
1109 |
+ struct gpio_led leds[5]; |
1110 |
+ |
1111 |
+diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c |
1112 |
+index 795caa763da3..05ed4ed411c7 100644 |
1113 |
+--- a/arch/mips/kernel/setup.c |
1114 |
++++ b/arch/mips/kernel/setup.c |
1115 |
+@@ -75,7 +75,7 @@ static char __initdata builtin_cmdline[COMMAND_LINE_SIZE] = CONFIG_CMDLINE; |
1116 |
+ * mips_io_port_base is the begin of the address space to which x86 style |
1117 |
+ * I/O ports are mapped. |
1118 |
+ */ |
1119 |
+-const unsigned long mips_io_port_base = -1; |
1120 |
++unsigned long mips_io_port_base = -1; |
1121 |
+ EXPORT_SYMBOL(mips_io_port_base); |
1122 |
+ |
1123 |
+ static struct resource code_resource = { .name = "Kernel code", }; |
1124 |
+diff --git a/arch/nios2/kernel/nios2_ksyms.c b/arch/nios2/kernel/nios2_ksyms.c |
1125 |
+index bf2f55d10a4d..4e704046a150 100644 |
1126 |
+--- a/arch/nios2/kernel/nios2_ksyms.c |
1127 |
++++ b/arch/nios2/kernel/nios2_ksyms.c |
1128 |
+@@ -9,12 +9,20 @@ |
1129 |
+ #include <linux/export.h> |
1130 |
+ #include <linux/string.h> |
1131 |
+ |
1132 |
++#include <asm/cacheflush.h> |
1133 |
++#include <asm/pgtable.h> |
1134 |
++ |
1135 |
+ /* string functions */ |
1136 |
+ |
1137 |
+ EXPORT_SYMBOL(memcpy); |
1138 |
+ EXPORT_SYMBOL(memset); |
1139 |
+ EXPORT_SYMBOL(memmove); |
1140 |
+ |
1141 |
++/* memory management */ |
1142 |
++ |
1143 |
++EXPORT_SYMBOL(empty_zero_page); |
1144 |
++EXPORT_SYMBOL(flush_icache_range); |
1145 |
++ |
1146 |
+ /* |
1147 |
+ * libgcc functions - functions that are used internally by the |
1148 |
+ * compiler... (prototypes are not correct though, but that |
1149 |
+@@ -31,3 +39,7 @@ DECLARE_EXPORT(__udivsi3); |
1150 |
+ DECLARE_EXPORT(__umoddi3); |
1151 |
+ DECLARE_EXPORT(__umodsi3); |
1152 |
+ DECLARE_EXPORT(__muldi3); |
1153 |
++DECLARE_EXPORT(__ucmpdi2); |
1154 |
++DECLARE_EXPORT(__lshrdi3); |
1155 |
++DECLARE_EXPORT(__ashldi3); |
1156 |
++DECLARE_EXPORT(__ashrdi3); |
1157 |
+diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile |
1158 |
+index 0f04c878113e..9c78ef298257 100644 |
1159 |
+--- a/arch/powerpc/Makefile |
1160 |
++++ b/arch/powerpc/Makefile |
1161 |
+@@ -385,7 +385,9 @@ vdso_install: |
1162 |
+ ifeq ($(CONFIG_PPC64),y) |
1163 |
+ $(Q)$(MAKE) $(build)=arch/$(ARCH)/kernel/vdso64 $@ |
1164 |
+ endif |
1165 |
++ifdef CONFIG_VDSO32 |
1166 |
+ $(Q)$(MAKE) $(build)=arch/$(ARCH)/kernel/vdso32 $@ |
1167 |
++endif |
1168 |
+ |
1169 |
+ archclean: |
1170 |
+ $(Q)$(MAKE) $(clean)=$(boot) |
1171 |
+diff --git a/arch/powerpc/include/asm/archrandom.h b/arch/powerpc/include/asm/archrandom.h |
1172 |
+index 9c63b596e6ce..a09595f00cab 100644 |
1173 |
+--- a/arch/powerpc/include/asm/archrandom.h |
1174 |
++++ b/arch/powerpc/include/asm/archrandom.h |
1175 |
+@@ -28,7 +28,7 @@ static inline int arch_get_random_seed_int(unsigned int *v) |
1176 |
+ unsigned long val; |
1177 |
+ int rc; |
1178 |
+ |
1179 |
+- rc = arch_get_random_long(&val); |
1180 |
++ rc = arch_get_random_seed_long(&val); |
1181 |
+ if (rc) |
1182 |
+ *v = val; |
1183 |
+ |
1184 |
+diff --git a/arch/powerpc/kernel/cacheinfo.c b/arch/powerpc/kernel/cacheinfo.c |
1185 |
+index a8f20e5928e1..9edb45430133 100644 |
1186 |
+--- a/arch/powerpc/kernel/cacheinfo.c |
1187 |
++++ b/arch/powerpc/kernel/cacheinfo.c |
1188 |
+@@ -865,4 +865,25 @@ void cacheinfo_cpu_offline(unsigned int cpu_id) |
1189 |
+ if (cache) |
1190 |
+ cache_cpu_clear(cache, cpu_id); |
1191 |
+ } |
1192 |
++ |
1193 |
++void cacheinfo_teardown(void) |
1194 |
++{ |
1195 |
++ unsigned int cpu; |
1196 |
++ |
1197 |
++ lockdep_assert_cpus_held(); |
1198 |
++ |
1199 |
++ for_each_online_cpu(cpu) |
1200 |
++ cacheinfo_cpu_offline(cpu); |
1201 |
++} |
1202 |
++ |
1203 |
++void cacheinfo_rebuild(void) |
1204 |
++{ |
1205 |
++ unsigned int cpu; |
1206 |
++ |
1207 |
++ lockdep_assert_cpus_held(); |
1208 |
++ |
1209 |
++ for_each_online_cpu(cpu) |
1210 |
++ cacheinfo_cpu_online(cpu); |
1211 |
++} |
1212 |
++ |
1213 |
+ #endif /* (CONFIG_PPC_PSERIES && CONFIG_SUSPEND) || CONFIG_HOTPLUG_CPU */ |
1214 |
+diff --git a/arch/powerpc/kernel/cacheinfo.h b/arch/powerpc/kernel/cacheinfo.h |
1215 |
+index 955f5e999f1b..52bd3fc6642d 100644 |
1216 |
+--- a/arch/powerpc/kernel/cacheinfo.h |
1217 |
++++ b/arch/powerpc/kernel/cacheinfo.h |
1218 |
+@@ -6,4 +6,8 @@ |
1219 |
+ extern void cacheinfo_cpu_online(unsigned int cpu_id); |
1220 |
+ extern void cacheinfo_cpu_offline(unsigned int cpu_id); |
1221 |
+ |
1222 |
++/* Allow migration/suspend to tear down and rebuild the hierarchy. */ |
1223 |
++extern void cacheinfo_teardown(void); |
1224 |
++extern void cacheinfo_rebuild(void); |
1225 |
++ |
1226 |
+ #endif /* _PPC_CACHEINFO_H */ |
1227 |
+diff --git a/arch/powerpc/kernel/dt_cpu_ftrs.c b/arch/powerpc/kernel/dt_cpu_ftrs.c |
1228 |
+index 2357df60de95..7ed2b1b6643c 100644 |
1229 |
+--- a/arch/powerpc/kernel/dt_cpu_ftrs.c |
1230 |
++++ b/arch/powerpc/kernel/dt_cpu_ftrs.c |
1231 |
+@@ -705,8 +705,10 @@ static bool __init cpufeatures_process_feature(struct dt_cpu_feature *f) |
1232 |
+ m = &dt_cpu_feature_match_table[i]; |
1233 |
+ if (!strcmp(f->name, m->name)) { |
1234 |
+ known = true; |
1235 |
+- if (m->enable(f)) |
1236 |
++ if (m->enable(f)) { |
1237 |
++ cur_cpu_spec->cpu_features |= m->cpu_ftr_bit_mask; |
1238 |
+ break; |
1239 |
++ } |
1240 |
+ |
1241 |
+ pr_info("not enabling: %s (disabled or unsupported by kernel)\n", |
1242 |
+ f->name); |
1243 |
+@@ -714,17 +716,12 @@ static bool __init cpufeatures_process_feature(struct dt_cpu_feature *f) |
1244 |
+ } |
1245 |
+ } |
1246 |
+ |
1247 |
+- if (!known && enable_unknown) { |
1248 |
+- if (!feat_try_enable_unknown(f)) { |
1249 |
+- pr_info("not enabling: %s (unknown and unsupported by kernel)\n", |
1250 |
+- f->name); |
1251 |
+- return false; |
1252 |
+- } |
1253 |
++ if (!known && (!enable_unknown || !feat_try_enable_unknown(f))) { |
1254 |
++ pr_info("not enabling: %s (unknown and unsupported by kernel)\n", |
1255 |
++ f->name); |
1256 |
++ return false; |
1257 |
+ } |
1258 |
+ |
1259 |
+- if (m->cpu_ftr_bit_mask) |
1260 |
+- cur_cpu_spec->cpu_features |= m->cpu_ftr_bit_mask; |
1261 |
+- |
1262 |
+ if (known) |
1263 |
+ pr_debug("enabling: %s\n", f->name); |
1264 |
+ else |
1265 |
+diff --git a/arch/powerpc/kvm/book3s_64_vio.c b/arch/powerpc/kvm/book3s_64_vio.c |
1266 |
+index 5e4446296021..ef6a58838e7c 100644 |
1267 |
+--- a/arch/powerpc/kvm/book3s_64_vio.c |
1268 |
++++ b/arch/powerpc/kvm/book3s_64_vio.c |
1269 |
+@@ -134,7 +134,6 @@ extern void kvm_spapr_tce_release_iommu_group(struct kvm *kvm, |
1270 |
+ continue; |
1271 |
+ |
1272 |
+ kref_put(&stit->kref, kvm_spapr_tce_liobn_put); |
1273 |
+- return; |
1274 |
+ } |
1275 |
+ } |
1276 |
+ } |
1277 |
+diff --git a/arch/powerpc/mm/dump_hashpagetable.c b/arch/powerpc/mm/dump_hashpagetable.c |
1278 |
+index 5c4c93dcff19..f666d74f05f5 100644 |
1279 |
+--- a/arch/powerpc/mm/dump_hashpagetable.c |
1280 |
++++ b/arch/powerpc/mm/dump_hashpagetable.c |
1281 |
+@@ -343,7 +343,7 @@ static unsigned long hpte_find(struct pg_state *st, unsigned long ea, int psize) |
1282 |
+ |
1283 |
+ /* Look in secondary table */ |
1284 |
+ if (slot == -1) |
1285 |
+- slot = base_hpte_find(ea, psize, true, &v, &r); |
1286 |
++ slot = base_hpte_find(ea, psize, false, &v, &r); |
1287 |
+ |
1288 |
+ /* No entry found */ |
1289 |
+ if (slot == -1) |
1290 |
+diff --git a/arch/powerpc/platforms/pseries/mobility.c b/arch/powerpc/platforms/pseries/mobility.c |
1291 |
+index 9739a055e5f7..2d3668acb6ef 100644 |
1292 |
+--- a/arch/powerpc/platforms/pseries/mobility.c |
1293 |
++++ b/arch/powerpc/platforms/pseries/mobility.c |
1294 |
+@@ -23,6 +23,7 @@ |
1295 |
+ #include <asm/machdep.h> |
1296 |
+ #include <asm/rtas.h> |
1297 |
+ #include "pseries.h" |
1298 |
++#include "../../kernel/cacheinfo.h" |
1299 |
+ |
1300 |
+ static struct kobject *mobility_kobj; |
1301 |
+ |
1302 |
+@@ -359,11 +360,20 @@ void post_mobility_fixup(void) |
1303 |
+ */ |
1304 |
+ cpus_read_lock(); |
1305 |
+ |
1306 |
++ /* |
1307 |
++ * It's common for the destination firmware to replace cache |
1308 |
++ * nodes. Release all of the cacheinfo hierarchy's references |
1309 |
++ * before updating the device tree. |
1310 |
++ */ |
1311 |
++ cacheinfo_teardown(); |
1312 |
++ |
1313 |
+ rc = pseries_devicetree_update(MIGRATION_SCOPE); |
1314 |
+ if (rc) |
1315 |
+ printk(KERN_ERR "Post-mobility device tree update " |
1316 |
+ "failed: %d\n", rc); |
1317 |
+ |
1318 |
++ cacheinfo_rebuild(); |
1319 |
++ |
1320 |
+ cpus_read_unlock(); |
1321 |
+ |
1322 |
+ /* Possibly switch to a new RFI flush type */ |
1323 |
+diff --git a/arch/x86/Kconfig.debug b/arch/x86/Kconfig.debug |
1324 |
+index 6293a8768a91..bec0952c5595 100644 |
1325 |
+--- a/arch/x86/Kconfig.debug |
1326 |
++++ b/arch/x86/Kconfig.debug |
1327 |
+@@ -189,7 +189,7 @@ config HAVE_MMIOTRACE_SUPPORT |
1328 |
+ |
1329 |
+ config X86_DECODER_SELFTEST |
1330 |
+ bool "x86 instruction decoder selftest" |
1331 |
+- depends on DEBUG_KERNEL && KPROBES |
1332 |
++ depends on DEBUG_KERNEL && INSTRUCTION_DECODER |
1333 |
+ depends on !COMPILE_TEST |
1334 |
+ ---help--- |
1335 |
+ Perform x86 instruction decoder selftests at build time. |
1336 |
+diff --git a/arch/x86/kernel/kgdb.c b/arch/x86/kernel/kgdb.c |
1337 |
+index 8e36f249646e..904e18bb38c5 100644 |
1338 |
+--- a/arch/x86/kernel/kgdb.c |
1339 |
++++ b/arch/x86/kernel/kgdb.c |
1340 |
+@@ -438,7 +438,7 @@ static void kgdb_disable_hw_debug(struct pt_regs *regs) |
1341 |
+ */ |
1342 |
+ void kgdb_roundup_cpus(unsigned long flags) |
1343 |
+ { |
1344 |
+- apic->send_IPI_allbutself(APIC_DM_NMI); |
1345 |
++ apic->send_IPI_allbutself(NMI_VECTOR); |
1346 |
+ } |
1347 |
+ #endif |
1348 |
+ |
1349 |
+diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c |
1350 |
+index 5400a24e1a8c..c5d7b4ae17ca 100644 |
1351 |
+--- a/arch/x86/mm/tlb.c |
1352 |
++++ b/arch/x86/mm/tlb.c |
1353 |
+@@ -651,9 +651,6 @@ void native_flush_tlb_others(const struct cpumask *cpumask, |
1354 |
+ * that UV should be updated so that smp_call_function_many(), |
1355 |
+ * etc, are optimal on UV. |
1356 |
+ */ |
1357 |
+- unsigned int cpu; |
1358 |
+- |
1359 |
+- cpu = smp_processor_id(); |
1360 |
+ cpumask = uv_flush_tlb_others(cpumask, info); |
1361 |
+ if (cpumask) |
1362 |
+ smp_call_function_many(cpumask, flush_tlb_func_remote, |
1363 |
+diff --git a/block/blk-merge.c b/block/blk-merge.c |
1364 |
+index f61b50a01bc7..415b5dafd9e6 100644 |
1365 |
+--- a/block/blk-merge.c |
1366 |
++++ b/block/blk-merge.c |
1367 |
+@@ -299,13 +299,7 @@ void blk_recalc_rq_segments(struct request *rq) |
1368 |
+ |
1369 |
+ void blk_recount_segments(struct request_queue *q, struct bio *bio) |
1370 |
+ { |
1371 |
+- unsigned short seg_cnt; |
1372 |
+- |
1373 |
+- /* estimate segment number by bi_vcnt for non-cloned bio */ |
1374 |
+- if (bio_flagged(bio, BIO_CLONED)) |
1375 |
+- seg_cnt = bio_segments(bio); |
1376 |
+- else |
1377 |
+- seg_cnt = bio->bi_vcnt; |
1378 |
++ unsigned short seg_cnt = bio_segments(bio); |
1379 |
+ |
1380 |
+ if (test_bit(QUEUE_FLAG_NO_SG_MERGE, &q->queue_flags) && |
1381 |
+ (seg_cnt < queue_max_segments(q))) |
1382 |
+diff --git a/crypto/pcrypt.c b/crypto/pcrypt.c |
1383 |
+index f8ec3d4ba4a8..a5718c0a3dc4 100644 |
1384 |
+--- a/crypto/pcrypt.c |
1385 |
++++ b/crypto/pcrypt.c |
1386 |
+@@ -394,7 +394,7 @@ static int pcrypt_sysfs_add(struct padata_instance *pinst, const char *name) |
1387 |
+ int ret; |
1388 |
+ |
1389 |
+ pinst->kobj.kset = pcrypt_kset; |
1390 |
+- ret = kobject_add(&pinst->kobj, NULL, name); |
1391 |
++ ret = kobject_add(&pinst->kobj, NULL, "%s", name); |
1392 |
+ if (!ret) |
1393 |
+ kobject_uevent(&pinst->kobj, KOBJ_ADD); |
1394 |
+ |
1395 |
+diff --git a/crypto/tgr192.c b/crypto/tgr192.c |
1396 |
+index 321bc6ff2a9d..904c8444aa0a 100644 |
1397 |
+--- a/crypto/tgr192.c |
1398 |
++++ b/crypto/tgr192.c |
1399 |
+@@ -25,8 +25,9 @@ |
1400 |
+ #include <linux/init.h> |
1401 |
+ #include <linux/module.h> |
1402 |
+ #include <linux/mm.h> |
1403 |
+-#include <asm/byteorder.h> |
1404 |
+ #include <linux/types.h> |
1405 |
++#include <asm/byteorder.h> |
1406 |
++#include <asm/unaligned.h> |
1407 |
+ |
1408 |
+ #define TGR192_DIGEST_SIZE 24 |
1409 |
+ #define TGR160_DIGEST_SIZE 20 |
1410 |
+@@ -468,10 +469,9 @@ static void tgr192_transform(struct tgr192_ctx *tctx, const u8 * data) |
1411 |
+ u64 a, b, c, aa, bb, cc; |
1412 |
+ u64 x[8]; |
1413 |
+ int i; |
1414 |
+- const __le64 *ptr = (const __le64 *)data; |
1415 |
+ |
1416 |
+ for (i = 0; i < 8; i++) |
1417 |
+- x[i] = le64_to_cpu(ptr[i]); |
1418 |
++ x[i] = get_unaligned_le64(data + i * sizeof(__le64)); |
1419 |
+ |
1420 |
+ /* save */ |
1421 |
+ a = aa = tctx->a; |
1422 |
+diff --git a/drivers/ata/libahci.c b/drivers/ata/libahci.c |
1423 |
+index cda9a0b5bdaa..7473ff46de66 100644 |
1424 |
+--- a/drivers/ata/libahci.c |
1425 |
++++ b/drivers/ata/libahci.c |
1426 |
+@@ -191,7 +191,6 @@ struct ata_port_operations ahci_pmp_retry_srst_ops = { |
1427 |
+ EXPORT_SYMBOL_GPL(ahci_pmp_retry_srst_ops); |
1428 |
+ |
1429 |
+ static bool ahci_em_messages __read_mostly = true; |
1430 |
+-EXPORT_SYMBOL_GPL(ahci_em_messages); |
1431 |
+ module_param(ahci_em_messages, bool, 0444); |
1432 |
+ /* add other LED protocol types when they become supported */ |
1433 |
+ MODULE_PARM_DESC(ahci_em_messages, |
1434 |
+diff --git a/drivers/base/core.c b/drivers/base/core.c |
1435 |
+index 2b0a1054535c..93c2fc58013e 100644 |
1436 |
+--- a/drivers/base/core.c |
1437 |
++++ b/drivers/base/core.c |
1438 |
+@@ -180,11 +180,20 @@ struct device_link *device_link_add(struct device *consumer, |
1439 |
+ struct device *supplier, u32 flags) |
1440 |
+ { |
1441 |
+ struct device_link *link; |
1442 |
++ bool rpm_put_supplier = false; |
1443 |
+ |
1444 |
+ if (!consumer || !supplier || |
1445 |
+ ((flags & DL_FLAG_STATELESS) && (flags & DL_FLAG_AUTOREMOVE))) |
1446 |
+ return NULL; |
1447 |
+ |
1448 |
++ if (flags & DL_FLAG_PM_RUNTIME && flags & DL_FLAG_RPM_ACTIVE) { |
1449 |
++ if (pm_runtime_get_sync(supplier) < 0) { |
1450 |
++ pm_runtime_put_noidle(supplier); |
1451 |
++ return NULL; |
1452 |
++ } |
1453 |
++ rpm_put_supplier = true; |
1454 |
++ } |
1455 |
++ |
1456 |
+ device_links_write_lock(); |
1457 |
+ device_pm_lock(); |
1458 |
+ |
1459 |
+@@ -209,13 +218,8 @@ struct device_link *device_link_add(struct device *consumer, |
1460 |
+ |
1461 |
+ if (flags & DL_FLAG_PM_RUNTIME) { |
1462 |
+ if (flags & DL_FLAG_RPM_ACTIVE) { |
1463 |
+- if (pm_runtime_get_sync(supplier) < 0) { |
1464 |
+- pm_runtime_put_noidle(supplier); |
1465 |
+- kfree(link); |
1466 |
+- link = NULL; |
1467 |
+- goto out; |
1468 |
+- } |
1469 |
+ link->rpm_active = true; |
1470 |
++ rpm_put_supplier = false; |
1471 |
+ } |
1472 |
+ pm_runtime_new_link(consumer); |
1473 |
+ /* |
1474 |
+@@ -286,6 +290,10 @@ struct device_link *device_link_add(struct device *consumer, |
1475 |
+ out: |
1476 |
+ device_pm_unlock(); |
1477 |
+ device_links_write_unlock(); |
1478 |
++ |
1479 |
++ if (rpm_put_supplier) |
1480 |
++ pm_runtime_put(supplier); |
1481 |
++ |
1482 |
+ return link; |
1483 |
+ } |
1484 |
+ EXPORT_SYMBOL_GPL(device_link_add); |
1485 |
+diff --git a/drivers/base/power/wakeup.c b/drivers/base/power/wakeup.c |
1486 |
+index df53e2b3296b..877b2a1767a5 100644 |
1487 |
+--- a/drivers/base/power/wakeup.c |
1488 |
++++ b/drivers/base/power/wakeup.c |
1489 |
+@@ -877,7 +877,7 @@ EXPORT_SYMBOL_GPL(pm_system_wakeup); |
1490 |
+ |
1491 |
+ void pm_system_cancel_wakeup(void) |
1492 |
+ { |
1493 |
+- atomic_dec(&pm_abort_suspend); |
1494 |
++ atomic_dec_if_positive(&pm_abort_suspend); |
1495 |
+ } |
1496 |
+ |
1497 |
+ void pm_wakeup_clear(bool reset) |
1498 |
+diff --git a/drivers/bcma/driver_pci.c b/drivers/bcma/driver_pci.c |
1499 |
+index f499a469e66d..12b2cc9a3fbe 100644 |
1500 |
+--- a/drivers/bcma/driver_pci.c |
1501 |
++++ b/drivers/bcma/driver_pci.c |
1502 |
+@@ -78,7 +78,7 @@ static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u16 device, u8 address) |
1503 |
+ v |= (address << BCMA_CORE_PCI_MDIODATA_REGADDR_SHF_OLD); |
1504 |
+ } |
1505 |
+ |
1506 |
+- v = BCMA_CORE_PCI_MDIODATA_START; |
1507 |
++ v |= BCMA_CORE_PCI_MDIODATA_START; |
1508 |
+ v |= BCMA_CORE_PCI_MDIODATA_READ; |
1509 |
+ v |= BCMA_CORE_PCI_MDIODATA_TA; |
1510 |
+ |
1511 |
+@@ -121,7 +121,7 @@ static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u16 device, |
1512 |
+ v |= (address << BCMA_CORE_PCI_MDIODATA_REGADDR_SHF_OLD); |
1513 |
+ } |
1514 |
+ |
1515 |
+- v = BCMA_CORE_PCI_MDIODATA_START; |
1516 |
++ v |= BCMA_CORE_PCI_MDIODATA_START; |
1517 |
+ v |= BCMA_CORE_PCI_MDIODATA_WRITE; |
1518 |
+ v |= BCMA_CORE_PCI_MDIODATA_TA; |
1519 |
+ v |= data; |
1520 |
+diff --git a/drivers/block/drbd/drbd_main.c b/drivers/block/drbd/drbd_main.c |
1521 |
+index 7ea13b5497fd..b998e3abca7a 100644 |
1522 |
+--- a/drivers/block/drbd/drbd_main.c |
1523 |
++++ b/drivers/block/drbd/drbd_main.c |
1524 |
+@@ -334,6 +334,8 @@ static int drbd_thread_setup(void *arg) |
1525 |
+ thi->name[0], |
1526 |
+ resource->name); |
1527 |
+ |
1528 |
++ allow_kernel_signal(DRBD_SIGKILL); |
1529 |
++ allow_kernel_signal(SIGXCPU); |
1530 |
+ restart: |
1531 |
+ retval = thi->function(thi); |
1532 |
+ |
1533 |
+diff --git a/drivers/clk/clk-highbank.c b/drivers/clk/clk-highbank.c |
1534 |
+index 727ed8e1bb72..8e4581004695 100644 |
1535 |
+--- a/drivers/clk/clk-highbank.c |
1536 |
++++ b/drivers/clk/clk-highbank.c |
1537 |
+@@ -293,6 +293,7 @@ static __init struct clk *hb_clk_init(struct device_node *node, const struct clk |
1538 |
+ /* Map system registers */ |
1539 |
+ srnp = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs"); |
1540 |
+ hb_clk->reg = of_iomap(srnp, 0); |
1541 |
++ of_node_put(srnp); |
1542 |
+ BUG_ON(!hb_clk->reg); |
1543 |
+ hb_clk->reg += reg; |
1544 |
+ |
1545 |
+diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c |
1546 |
+index 1a292519d84f..999a90a16609 100644 |
1547 |
+--- a/drivers/clk/clk-qoriq.c |
1548 |
++++ b/drivers/clk/clk-qoriq.c |
1549 |
+@@ -1382,6 +1382,7 @@ static void __init clockgen_init(struct device_node *np) |
1550 |
+ pr_err("%s: Couldn't map %pOF regs\n", __func__, |
1551 |
+ guts); |
1552 |
+ } |
1553 |
++ of_node_put(guts); |
1554 |
+ } |
1555 |
+ |
1556 |
+ } |
1557 |
+diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c |
1558 |
+index 8eb93eb2f857..e0547654cb7b 100644 |
1559 |
+--- a/drivers/clk/imx/clk-imx6q.c |
1560 |
++++ b/drivers/clk/imx/clk-imx6q.c |
1561 |
+@@ -431,6 +431,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) |
1562 |
+ np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop"); |
1563 |
+ anatop_base = base = of_iomap(np, 0); |
1564 |
+ WARN_ON(!base); |
1565 |
++ of_node_put(np); |
1566 |
+ |
1567 |
+ /* Audio/video PLL post dividers do not work on i.MX6q revision 1.0 */ |
1568 |
+ if (clk_on_imx6q() && imx_get_soc_revision() == IMX_CHIP_REVISION_1_0) { |
1569 |
+diff --git a/drivers/clk/imx/clk-imx6sx.c b/drivers/clk/imx/clk-imx6sx.c |
1570 |
+index e6d389e333d7..baa07553a0dd 100644 |
1571 |
+--- a/drivers/clk/imx/clk-imx6sx.c |
1572 |
++++ b/drivers/clk/imx/clk-imx6sx.c |
1573 |
+@@ -164,6 +164,7 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node) |
1574 |
+ np = of_find_compatible_node(NULL, NULL, "fsl,imx6sx-anatop"); |
1575 |
+ base = of_iomap(np, 0); |
1576 |
+ WARN_ON(!base); |
1577 |
++ of_node_put(np); |
1578 |
+ |
1579 |
+ clks[IMX6SX_PLL1_BYPASS_SRC] = imx_clk_mux("pll1_bypass_src", base + 0x00, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels)); |
1580 |
+ clks[IMX6SX_PLL2_BYPASS_SRC] = imx_clk_mux("pll2_bypass_src", base + 0x30, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels)); |
1581 |
+diff --git a/drivers/clk/imx/clk-imx7d.c b/drivers/clk/imx/clk-imx7d.c |
1582 |
+index 0ac9b30c8b90..9f5e5b9d4a25 100644 |
1583 |
+--- a/drivers/clk/imx/clk-imx7d.c |
1584 |
++++ b/drivers/clk/imx/clk-imx7d.c |
1585 |
+@@ -416,6 +416,7 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node) |
1586 |
+ np = of_find_compatible_node(NULL, NULL, "fsl,imx7d-anatop"); |
1587 |
+ base = of_iomap(np, 0); |
1588 |
+ WARN_ON(!base); |
1589 |
++ of_node_put(np); |
1590 |
+ |
1591 |
+ clks[IMX7D_PLL_ARM_MAIN_SRC] = imx_clk_mux("pll_arm_main_src", base + 0x60, 14, 2, pll_bypass_src_sel, ARRAY_SIZE(pll_bypass_src_sel)); |
1592 |
+ clks[IMX7D_PLL_DRAM_MAIN_SRC] = imx_clk_mux("pll_dram_main_src", base + 0x70, 14, 2, pll_bypass_src_sel, ARRAY_SIZE(pll_bypass_src_sel)); |
1593 |
+diff --git a/drivers/clk/imx/clk-vf610.c b/drivers/clk/imx/clk-vf610.c |
1594 |
+index 6dae54325a91..a334667c450a 100644 |
1595 |
+--- a/drivers/clk/imx/clk-vf610.c |
1596 |
++++ b/drivers/clk/imx/clk-vf610.c |
1597 |
+@@ -203,6 +203,7 @@ static void __init vf610_clocks_init(struct device_node *ccm_node) |
1598 |
+ np = of_find_compatible_node(NULL, NULL, "fsl,vf610-anatop"); |
1599 |
+ anatop_base = of_iomap(np, 0); |
1600 |
+ BUG_ON(!anatop_base); |
1601 |
++ of_node_put(np); |
1602 |
+ |
1603 |
+ np = ccm_node; |
1604 |
+ ccm_base = of_iomap(np, 0); |
1605 |
+diff --git a/drivers/clk/mvebu/armada-370.c b/drivers/clk/mvebu/armada-370.c |
1606 |
+index 2c7c1085f883..8fdfa97900cd 100644 |
1607 |
+--- a/drivers/clk/mvebu/armada-370.c |
1608 |
++++ b/drivers/clk/mvebu/armada-370.c |
1609 |
+@@ -177,8 +177,10 @@ static void __init a370_clk_init(struct device_node *np) |
1610 |
+ |
1611 |
+ mvebu_coreclk_setup(np, &a370_coreclks); |
1612 |
+ |
1613 |
+- if (cgnp) |
1614 |
++ if (cgnp) { |
1615 |
+ mvebu_clk_gating_setup(cgnp, a370_gating_desc); |
1616 |
++ of_node_put(cgnp); |
1617 |
++ } |
1618 |
+ } |
1619 |
+ CLK_OF_DECLARE(a370_clk, "marvell,armada-370-core-clock", a370_clk_init); |
1620 |
+ |
1621 |
+diff --git a/drivers/clk/mvebu/armada-xp.c b/drivers/clk/mvebu/armada-xp.c |
1622 |
+index 0ec44ae9a2a2..df529982adc9 100644 |
1623 |
+--- a/drivers/clk/mvebu/armada-xp.c |
1624 |
++++ b/drivers/clk/mvebu/armada-xp.c |
1625 |
+@@ -228,7 +228,9 @@ static void __init axp_clk_init(struct device_node *np) |
1626 |
+ |
1627 |
+ mvebu_coreclk_setup(np, &axp_coreclks); |
1628 |
+ |
1629 |
+- if (cgnp) |
1630 |
++ if (cgnp) { |
1631 |
+ mvebu_clk_gating_setup(cgnp, axp_gating_desc); |
1632 |
++ of_node_put(cgnp); |
1633 |
++ } |
1634 |
+ } |
1635 |
+ CLK_OF_DECLARE(axp_clk, "marvell,armada-xp-core-clock", axp_clk_init); |
1636 |
+diff --git a/drivers/clk/mvebu/dove.c b/drivers/clk/mvebu/dove.c |
1637 |
+index 59fad9546c84..5f258c9bb68b 100644 |
1638 |
+--- a/drivers/clk/mvebu/dove.c |
1639 |
++++ b/drivers/clk/mvebu/dove.c |
1640 |
+@@ -190,10 +190,14 @@ static void __init dove_clk_init(struct device_node *np) |
1641 |
+ |
1642 |
+ mvebu_coreclk_setup(np, &dove_coreclks); |
1643 |
+ |
1644 |
+- if (ddnp) |
1645 |
++ if (ddnp) { |
1646 |
+ dove_divider_clk_init(ddnp); |
1647 |
++ of_node_put(ddnp); |
1648 |
++ } |
1649 |
+ |
1650 |
+- if (cgnp) |
1651 |
++ if (cgnp) { |
1652 |
+ mvebu_clk_gating_setup(cgnp, dove_gating_desc); |
1653 |
++ of_node_put(cgnp); |
1654 |
++ } |
1655 |
+ } |
1656 |
+ CLK_OF_DECLARE(dove_clk, "marvell,dove-core-clock", dove_clk_init); |
1657 |
+diff --git a/drivers/clk/mvebu/kirkwood.c b/drivers/clk/mvebu/kirkwood.c |
1658 |
+index a2a8d614039d..890ebf623261 100644 |
1659 |
+--- a/drivers/clk/mvebu/kirkwood.c |
1660 |
++++ b/drivers/clk/mvebu/kirkwood.c |
1661 |
+@@ -333,6 +333,8 @@ static void __init kirkwood_clk_init(struct device_node *np) |
1662 |
+ if (cgnp) { |
1663 |
+ mvebu_clk_gating_setup(cgnp, kirkwood_gating_desc); |
1664 |
+ kirkwood_clk_muxing_setup(cgnp, kirkwood_mux_desc); |
1665 |
++ |
1666 |
++ of_node_put(cgnp); |
1667 |
+ } |
1668 |
+ } |
1669 |
+ CLK_OF_DECLARE(kirkwood_clk, "marvell,kirkwood-core-clock", |
1670 |
+diff --git a/drivers/clk/mvebu/mv98dx3236.c b/drivers/clk/mvebu/mv98dx3236.c |
1671 |
+index 6e203af73cac..c8a0d03d2cd6 100644 |
1672 |
+--- a/drivers/clk/mvebu/mv98dx3236.c |
1673 |
++++ b/drivers/clk/mvebu/mv98dx3236.c |
1674 |
+@@ -174,7 +174,9 @@ static void __init mv98dx3236_clk_init(struct device_node *np) |
1675 |
+ |
1676 |
+ mvebu_coreclk_setup(np, &mv98dx3236_core_clocks); |
1677 |
+ |
1678 |
+- if (cgnp) |
1679 |
++ if (cgnp) { |
1680 |
+ mvebu_clk_gating_setup(cgnp, mv98dx3236_gating_desc); |
1681 |
++ of_node_put(cgnp); |
1682 |
++ } |
1683 |
+ } |
1684 |
+ CLK_OF_DECLARE(mv98dx3236_clk, "marvell,mv98dx3236-core-clock", mv98dx3236_clk_init); |
1685 |
+diff --git a/drivers/clk/qcom/gcc-msm8996.c b/drivers/clk/qcom/gcc-msm8996.c |
1686 |
+index 7ddec886fcd3..c0b043b1bd24 100644 |
1687 |
+--- a/drivers/clk/qcom/gcc-msm8996.c |
1688 |
++++ b/drivers/clk/qcom/gcc-msm8996.c |
1689 |
+@@ -140,22 +140,6 @@ static const char * const gcc_xo_gpll0_gpll4_gpll0_early_div[] = { |
1690 |
+ "gpll0_early_div" |
1691 |
+ }; |
1692 |
+ |
1693 |
+-static const struct parent_map gcc_xo_gpll0_gpll2_gpll3_gpll0_early_div_map[] = { |
1694 |
+- { P_XO, 0 }, |
1695 |
+- { P_GPLL0, 1 }, |
1696 |
+- { P_GPLL2, 2 }, |
1697 |
+- { P_GPLL3, 3 }, |
1698 |
+- { P_GPLL0_EARLY_DIV, 6 } |
1699 |
+-}; |
1700 |
+- |
1701 |
+-static const char * const gcc_xo_gpll0_gpll2_gpll3_gpll0_early_div[] = { |
1702 |
+- "xo", |
1703 |
+- "gpll0", |
1704 |
+- "gpll2", |
1705 |
+- "gpll3", |
1706 |
+- "gpll0_early_div" |
1707 |
+-}; |
1708 |
+- |
1709 |
+ static const struct parent_map gcc_xo_gpll0_gpll1_early_div_gpll1_gpll4_gpll0_early_div_map[] = { |
1710 |
+ { P_XO, 0 }, |
1711 |
+ { P_GPLL0, 1 }, |
1712 |
+@@ -194,26 +178,6 @@ static const char * const gcc_xo_gpll0_gpll2_gpll3_gpll1_gpll2_early_gpll0_early |
1713 |
+ "gpll0_early_div" |
1714 |
+ }; |
1715 |
+ |
1716 |
+-static const struct parent_map gcc_xo_gpll0_gpll2_gpll3_gpll1_gpll4_gpll0_early_div_map[] = { |
1717 |
+- { P_XO, 0 }, |
1718 |
+- { P_GPLL0, 1 }, |
1719 |
+- { P_GPLL2, 2 }, |
1720 |
+- { P_GPLL3, 3 }, |
1721 |
+- { P_GPLL1, 4 }, |
1722 |
+- { P_GPLL4, 5 }, |
1723 |
+- { P_GPLL0_EARLY_DIV, 6 } |
1724 |
+-}; |
1725 |
+- |
1726 |
+-static const char * const gcc_xo_gpll0_gpll2_gpll3_gpll1_gpll4_gpll0_early_div[] = { |
1727 |
+- "xo", |
1728 |
+- "gpll0", |
1729 |
+- "gpll2", |
1730 |
+- "gpll3", |
1731 |
+- "gpll1", |
1732 |
+- "gpll4", |
1733 |
+- "gpll0_early_div" |
1734 |
+-}; |
1735 |
+- |
1736 |
+ static struct clk_fixed_factor xo = { |
1737 |
+ .mult = 1, |
1738 |
+ .div = 1, |
1739 |
+diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c |
1740 |
+index d8d3cb67b402..3d3026221927 100644 |
1741 |
+--- a/drivers/clk/samsung/clk-exynos4.c |
1742 |
++++ b/drivers/clk/samsung/clk-exynos4.c |
1743 |
+@@ -1240,6 +1240,7 @@ static unsigned long __init exynos4_get_xom(void) |
1744 |
+ xom = readl(chipid_base + 8); |
1745 |
+ |
1746 |
+ iounmap(chipid_base); |
1747 |
++ of_node_put(np); |
1748 |
+ } |
1749 |
+ |
1750 |
+ return xom; |
1751 |
+diff --git a/drivers/clk/socfpga/clk-pll-a10.c b/drivers/clk/socfpga/clk-pll-a10.c |
1752 |
+index 35fabe1a32c3..269467e8e07e 100644 |
1753 |
+--- a/drivers/clk/socfpga/clk-pll-a10.c |
1754 |
++++ b/drivers/clk/socfpga/clk-pll-a10.c |
1755 |
+@@ -95,6 +95,7 @@ static struct clk * __init __socfpga_pll_init(struct device_node *node, |
1756 |
+ |
1757 |
+ clkmgr_np = of_find_compatible_node(NULL, NULL, "altr,clk-mgr"); |
1758 |
+ clk_mgr_a10_base_addr = of_iomap(clkmgr_np, 0); |
1759 |
++ of_node_put(clkmgr_np); |
1760 |
+ BUG_ON(!clk_mgr_a10_base_addr); |
1761 |
+ pll_clk->hw.reg = clk_mgr_a10_base_addr + reg; |
1762 |
+ |
1763 |
+diff --git a/drivers/clk/socfpga/clk-pll.c b/drivers/clk/socfpga/clk-pll.c |
1764 |
+index c7f463172e4b..b4b44e9b5901 100644 |
1765 |
+--- a/drivers/clk/socfpga/clk-pll.c |
1766 |
++++ b/drivers/clk/socfpga/clk-pll.c |
1767 |
+@@ -100,6 +100,7 @@ static __init struct clk *__socfpga_pll_init(struct device_node *node, |
1768 |
+ |
1769 |
+ clkmgr_np = of_find_compatible_node(NULL, NULL, "altr,clk-mgr"); |
1770 |
+ clk_mgr_base_addr = of_iomap(clkmgr_np, 0); |
1771 |
++ of_node_put(clkmgr_np); |
1772 |
+ BUG_ON(!clk_mgr_base_addr); |
1773 |
+ pll_clk->hw.reg = clk_mgr_base_addr + reg; |
1774 |
+ |
1775 |
+diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-a23.c b/drivers/clk/sunxi-ng/ccu-sun8i-a23.c |
1776 |
+index d93b452f0df9..1cef040ebe82 100644 |
1777 |
+--- a/drivers/clk/sunxi-ng/ccu-sun8i-a23.c |
1778 |
++++ b/drivers/clk/sunxi-ng/ccu-sun8i-a23.c |
1779 |
+@@ -132,7 +132,7 @@ static SUNXI_CCU_NKM_WITH_GATE_LOCK(pll_mipi_clk, "pll-mipi", |
1780 |
+ 8, 4, /* N */ |
1781 |
+ 4, 2, /* K */ |
1782 |
+ 0, 4, /* M */ |
1783 |
+- BIT(31), /* gate */ |
1784 |
++ BIT(31) | BIT(23) | BIT(22), /* gate */ |
1785 |
+ BIT(28), /* lock */ |
1786 |
+ CLK_SET_RATE_UNGATE); |
1787 |
+ |
1788 |
+diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c |
1789 |
+index 9e3f4088724b..c7f9d974b10d 100644 |
1790 |
+--- a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c |
1791 |
++++ b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c |
1792 |
+@@ -84,7 +84,7 @@ static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_ve_clk, "pll-ve", |
1793 |
+ BIT(28), /* lock */ |
1794 |
+ 0); |
1795 |
+ |
1796 |
+-static SUNXI_CCU_NKM_WITH_GATE_LOCK(pll_ddr_clk, "pll-ddr", |
1797 |
++static SUNXI_CCU_NKM_WITH_GATE_LOCK(pll_ddr0_clk, "pll-ddr0", |
1798 |
+ "osc24M", 0x020, |
1799 |
+ 8, 5, /* N */ |
1800 |
+ 4, 2, /* K */ |
1801 |
+@@ -123,6 +123,14 @@ static SUNXI_CCU_NK_WITH_GATE_LOCK_POSTDIV(pll_periph1_clk, "pll-periph1", |
1802 |
+ 2, /* post-div */ |
1803 |
+ 0); |
1804 |
+ |
1805 |
++static SUNXI_CCU_NM_WITH_GATE_LOCK(pll_ddr1_clk, "pll-ddr1", |
1806 |
++ "osc24M", 0x04c, |
1807 |
++ 8, 7, /* N */ |
1808 |
++ 0, 2, /* M */ |
1809 |
++ BIT(31), /* gate */ |
1810 |
++ BIT(28), /* lock */ |
1811 |
++ 0); |
1812 |
++ |
1813 |
+ static const char * const cpu_parents[] = { "osc32k", "osc24M", |
1814 |
+ "pll-cpu", "pll-cpu" }; |
1815 |
+ static SUNXI_CCU_MUX(cpu_clk, "cpu", cpu_parents, |
1816 |
+@@ -310,7 +318,8 @@ static SUNXI_CCU_GATE(usb_phy0_clk, "usb-phy0", "osc24M", |
1817 |
+ static SUNXI_CCU_GATE(usb_ohci0_clk, "usb-ohci0", "osc24M", |
1818 |
+ 0x0cc, BIT(16), 0); |
1819 |
+ |
1820 |
+-static const char * const dram_parents[] = { "pll-ddr", "pll-periph0-2x" }; |
1821 |
++static const char * const dram_parents[] = { "pll-ddr0", "pll-ddr1", |
1822 |
++ "pll-periph0-2x" }; |
1823 |
+ static SUNXI_CCU_M_WITH_MUX(dram_clk, "dram", dram_parents, |
1824 |
+ 0x0f4, 0, 4, 20, 2, CLK_IS_CRITICAL); |
1825 |
+ |
1826 |
+@@ -369,10 +378,11 @@ static struct ccu_common *sun8i_v3s_ccu_clks[] = { |
1827 |
+ &pll_audio_base_clk.common, |
1828 |
+ &pll_video_clk.common, |
1829 |
+ &pll_ve_clk.common, |
1830 |
+- &pll_ddr_clk.common, |
1831 |
++ &pll_ddr0_clk.common, |
1832 |
+ &pll_periph0_clk.common, |
1833 |
+ &pll_isp_clk.common, |
1834 |
+ &pll_periph1_clk.common, |
1835 |
++ &pll_ddr1_clk.common, |
1836 |
+ &cpu_clk.common, |
1837 |
+ &axi_clk.common, |
1838 |
+ &ahb1_clk.common, |
1839 |
+@@ -457,11 +467,12 @@ static struct clk_hw_onecell_data sun8i_v3s_hw_clks = { |
1840 |
+ [CLK_PLL_AUDIO_8X] = &pll_audio_8x_clk.hw, |
1841 |
+ [CLK_PLL_VIDEO] = &pll_video_clk.common.hw, |
1842 |
+ [CLK_PLL_VE] = &pll_ve_clk.common.hw, |
1843 |
+- [CLK_PLL_DDR] = &pll_ddr_clk.common.hw, |
1844 |
++ [CLK_PLL_DDR0] = &pll_ddr0_clk.common.hw, |
1845 |
+ [CLK_PLL_PERIPH0] = &pll_periph0_clk.common.hw, |
1846 |
+ [CLK_PLL_PERIPH0_2X] = &pll_periph0_2x_clk.hw, |
1847 |
+ [CLK_PLL_ISP] = &pll_isp_clk.common.hw, |
1848 |
+ [CLK_PLL_PERIPH1] = &pll_periph1_clk.common.hw, |
1849 |
++ [CLK_PLL_DDR1] = &pll_ddr1_clk.common.hw, |
1850 |
+ [CLK_CPU] = &cpu_clk.common.hw, |
1851 |
+ [CLK_AXI] = &axi_clk.common.hw, |
1852 |
+ [CLK_AHB1] = &ahb1_clk.common.hw, |
1853 |
+diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.h b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.h |
1854 |
+index 4a4d36fdad96..a091b7217dfd 100644 |
1855 |
+--- a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.h |
1856 |
++++ b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.h |
1857 |
+@@ -29,7 +29,7 @@ |
1858 |
+ #define CLK_PLL_AUDIO_8X 5 |
1859 |
+ #define CLK_PLL_VIDEO 6 |
1860 |
+ #define CLK_PLL_VE 7 |
1861 |
+-#define CLK_PLL_DDR 8 |
1862 |
++#define CLK_PLL_DDR0 8 |
1863 |
+ #define CLK_PLL_PERIPH0 9 |
1864 |
+ #define CLK_PLL_PERIPH0_2X 10 |
1865 |
+ #define CLK_PLL_ISP 11 |
1866 |
+@@ -58,6 +58,8 @@ |
1867 |
+ |
1868 |
+ /* And the GPU module clock is exported */ |
1869 |
+ |
1870 |
+-#define CLK_NUMBER (CLK_MIPI_CSI + 1) |
1871 |
++#define CLK_PLL_DDR1 74 |
1872 |
++ |
1873 |
++#define CLK_NUMBER (CLK_PLL_DDR1 + 1) |
1874 |
+ |
1875 |
+ #endif /* _CCU_SUN8I_H3_H_ */ |
1876 |
+diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c |
1877 |
+index aaf5bfa9bd9c..e3ae041ac30e 100644 |
1878 |
+--- a/drivers/clocksource/exynos_mct.c |
1879 |
++++ b/drivers/clocksource/exynos_mct.c |
1880 |
+@@ -563,7 +563,19 @@ static int __init exynos4_timer_resources(struct device_node *np, void __iomem * |
1881 |
+ return 0; |
1882 |
+ |
1883 |
+ out_irq: |
1884 |
+- free_percpu_irq(mct_irqs[MCT_L0_IRQ], &percpu_mct_tick); |
1885 |
++ if (mct_int_type == MCT_INT_PPI) { |
1886 |
++ free_percpu_irq(mct_irqs[MCT_L0_IRQ], &percpu_mct_tick); |
1887 |
++ } else { |
1888 |
++ for_each_possible_cpu(cpu) { |
1889 |
++ struct mct_clock_event_device *pcpu_mevt = |
1890 |
++ per_cpu_ptr(&percpu_mct_tick, cpu); |
1891 |
++ |
1892 |
++ if (pcpu_mevt->evt.irq != -1) { |
1893 |
++ free_irq(pcpu_mevt->evt.irq, pcpu_mevt); |
1894 |
++ pcpu_mevt->evt.irq = -1; |
1895 |
++ } |
1896 |
++ } |
1897 |
++ } |
1898 |
+ return err; |
1899 |
+ } |
1900 |
+ |
1901 |
+diff --git a/drivers/clocksource/timer-sun5i.c b/drivers/clocksource/timer-sun5i.c |
1902 |
+index 2a3fe83ec337..6f4a9a8faccc 100644 |
1903 |
+--- a/drivers/clocksource/timer-sun5i.c |
1904 |
++++ b/drivers/clocksource/timer-sun5i.c |
1905 |
+@@ -202,6 +202,11 @@ static int __init sun5i_setup_clocksource(struct device_node *node, |
1906 |
+ } |
1907 |
+ |
1908 |
+ rate = clk_get_rate(clk); |
1909 |
++ if (!rate) { |
1910 |
++ pr_err("Couldn't get parent clock rate\n"); |
1911 |
++ ret = -EINVAL; |
1912 |
++ goto err_disable_clk; |
1913 |
++ } |
1914 |
+ |
1915 |
+ cs->timer.base = base; |
1916 |
+ cs->timer.clk = clk; |
1917 |
+@@ -275,6 +280,11 @@ static int __init sun5i_setup_clockevent(struct device_node *node, void __iomem |
1918 |
+ } |
1919 |
+ |
1920 |
+ rate = clk_get_rate(clk); |
1921 |
++ if (!rate) { |
1922 |
++ pr_err("Couldn't get parent clock rate\n"); |
1923 |
++ ret = -EINVAL; |
1924 |
++ goto err_disable_clk; |
1925 |
++ } |
1926 |
+ |
1927 |
+ ce->timer.base = base; |
1928 |
+ ce->timer.ticks_per_jiffy = DIV_ROUND_UP(rate, HZ); |
1929 |
+diff --git a/drivers/cpufreq/brcmstb-avs-cpufreq.c b/drivers/cpufreq/brcmstb-avs-cpufreq.c |
1930 |
+index 7281a2c19c36..39c462711eae 100644 |
1931 |
+--- a/drivers/cpufreq/brcmstb-avs-cpufreq.c |
1932 |
++++ b/drivers/cpufreq/brcmstb-avs-cpufreq.c |
1933 |
+@@ -468,12 +468,12 @@ static int brcm_avs_set_pstate(struct private_data *priv, unsigned int pstate) |
1934 |
+ return __issue_avs_command(priv, AVS_CMD_SET_PSTATE, true, args); |
1935 |
+ } |
1936 |
+ |
1937 |
+-static unsigned long brcm_avs_get_voltage(void __iomem *base) |
1938 |
++static u32 brcm_avs_get_voltage(void __iomem *base) |
1939 |
+ { |
1940 |
+ return readl(base + AVS_MBOX_VOLTAGE1); |
1941 |
+ } |
1942 |
+ |
1943 |
+-static unsigned long brcm_avs_get_frequency(void __iomem *base) |
1944 |
++static u32 brcm_avs_get_frequency(void __iomem *base) |
1945 |
+ { |
1946 |
+ return readl(base + AVS_MBOX_FREQUENCY) * 1000; /* in kHz */ |
1947 |
+ } |
1948 |
+@@ -762,8 +762,8 @@ static bool brcm_avs_is_firmware_loaded(struct private_data *priv) |
1949 |
+ rc = brcm_avs_get_pmap(priv, NULL); |
1950 |
+ magic = readl(priv->base + AVS_MBOX_MAGIC); |
1951 |
+ |
1952 |
+- return (magic == AVS_FIRMWARE_MAGIC) && (rc != -ENOTSUPP) && |
1953 |
+- (rc != -EINVAL); |
1954 |
++ return (magic == AVS_FIRMWARE_MAGIC) && ((rc != -ENOTSUPP) || |
1955 |
++ (rc != -EINVAL)); |
1956 |
+ } |
1957 |
+ |
1958 |
+ static unsigned int brcm_avs_cpufreq_get(unsigned int cpu) |
1959 |
+@@ -973,14 +973,14 @@ static ssize_t show_brcm_avs_voltage(struct cpufreq_policy *policy, char *buf) |
1960 |
+ { |
1961 |
+ struct private_data *priv = policy->driver_data; |
1962 |
+ |
1963 |
+- return sprintf(buf, "0x%08lx\n", brcm_avs_get_voltage(priv->base)); |
1964 |
++ return sprintf(buf, "0x%08x\n", brcm_avs_get_voltage(priv->base)); |
1965 |
+ } |
1966 |
+ |
1967 |
+ static ssize_t show_brcm_avs_frequency(struct cpufreq_policy *policy, char *buf) |
1968 |
+ { |
1969 |
+ struct private_data *priv = policy->driver_data; |
1970 |
+ |
1971 |
+- return sprintf(buf, "0x%08lx\n", brcm_avs_get_frequency(priv->base)); |
1972 |
++ return sprintf(buf, "0x%08x\n", brcm_avs_get_frequency(priv->base)); |
1973 |
+ } |
1974 |
+ |
1975 |
+ cpufreq_freq_attr_ro(brcm_avs_pstate); |
1976 |
+diff --git a/drivers/crypto/amcc/crypto4xx_trng.h b/drivers/crypto/amcc/crypto4xx_trng.h |
1977 |
+index 931d22531f51..7bbda51b7337 100644 |
1978 |
+--- a/drivers/crypto/amcc/crypto4xx_trng.h |
1979 |
++++ b/drivers/crypto/amcc/crypto4xx_trng.h |
1980 |
+@@ -26,9 +26,9 @@ void ppc4xx_trng_probe(struct crypto4xx_core_device *core_dev); |
1981 |
+ void ppc4xx_trng_remove(struct crypto4xx_core_device *core_dev); |
1982 |
+ #else |
1983 |
+ static inline void ppc4xx_trng_probe( |
1984 |
+- struct crypto4xx_device *dev __maybe_unused) { } |
1985 |
++ struct crypto4xx_core_device *dev __maybe_unused) { } |
1986 |
+ static inline void ppc4xx_trng_remove( |
1987 |
+- struct crypto4xx_device *dev __maybe_unused) { } |
1988 |
++ struct crypto4xx_core_device *dev __maybe_unused) { } |
1989 |
+ #endif |
1990 |
+ |
1991 |
+ #endif |
1992 |
+diff --git a/drivers/crypto/bcm/cipher.c b/drivers/crypto/bcm/cipher.c |
1993 |
+index 84422435f39b..279e907590e9 100644 |
1994 |
+--- a/drivers/crypto/bcm/cipher.c |
1995 |
++++ b/drivers/crypto/bcm/cipher.c |
1996 |
+@@ -718,7 +718,7 @@ static int handle_ahash_req(struct iproc_reqctx_s *rctx) |
1997 |
+ */ |
1998 |
+ unsigned int new_data_len; |
1999 |
+ |
2000 |
+- unsigned int chunk_start = 0; |
2001 |
++ unsigned int __maybe_unused chunk_start = 0; |
2002 |
+ u32 db_size; /* Length of data field, incl gcm and hash padding */ |
2003 |
+ int pad_len = 0; /* total pad len, including gcm, hash, stat padding */ |
2004 |
+ u32 data_pad_len = 0; /* length of GCM/CCM padding */ |
2005 |
+@@ -1676,8 +1676,6 @@ static void spu_rx_callback(struct mbox_client *cl, void *msg) |
2006 |
+ struct spu_hw *spu = &iproc_priv.spu; |
2007 |
+ struct brcm_message *mssg = msg; |
2008 |
+ struct iproc_reqctx_s *rctx; |
2009 |
+- struct iproc_ctx_s *ctx; |
2010 |
+- struct crypto_async_request *areq; |
2011 |
+ int err = 0; |
2012 |
+ |
2013 |
+ rctx = mssg->ctx; |
2014 |
+@@ -1687,8 +1685,6 @@ static void spu_rx_callback(struct mbox_client *cl, void *msg) |
2015 |
+ err = -EFAULT; |
2016 |
+ goto cb_finish; |
2017 |
+ } |
2018 |
+- areq = rctx->parent; |
2019 |
+- ctx = rctx->ctx; |
2020 |
+ |
2021 |
+ /* process the SPU status */ |
2022 |
+ err = spu->spu_status_process(rctx->msg_buf.rx_stat); |
2023 |
+diff --git a/drivers/crypto/caam/caamrng.c b/drivers/crypto/caam/caamrng.c |
2024 |
+index fde07d4ff019..ff6718a11e9e 100644 |
2025 |
+--- a/drivers/crypto/caam/caamrng.c |
2026 |
++++ b/drivers/crypto/caam/caamrng.c |
2027 |
+@@ -353,7 +353,10 @@ static int __init caam_rng_init(void) |
2028 |
+ goto free_rng_ctx; |
2029 |
+ |
2030 |
+ dev_info(dev, "registering rng-caam\n"); |
2031 |
+- return hwrng_register(&caam_rng); |
2032 |
++ |
2033 |
++ err = hwrng_register(&caam_rng); |
2034 |
++ if (!err) |
2035 |
++ return err; |
2036 |
+ |
2037 |
+ free_rng_ctx: |
2038 |
+ kfree(rng_ctx); |
2039 |
+diff --git a/drivers/crypto/caam/error.c b/drivers/crypto/caam/error.c |
2040 |
+index 8da88beb1abb..832ba2afdcd5 100644 |
2041 |
+--- a/drivers/crypto/caam/error.c |
2042 |
++++ b/drivers/crypto/caam/error.c |
2043 |
+@@ -22,7 +22,7 @@ void caam_dump_sg(const char *level, const char *prefix_str, int prefix_type, |
2044 |
+ size_t len; |
2045 |
+ void *buf; |
2046 |
+ |
2047 |
+- for (it = sg; it && tlen > 0 ; it = sg_next(sg)) { |
2048 |
++ for (it = sg; it && tlen > 0 ; it = sg_next(it)) { |
2049 |
+ /* |
2050 |
+ * make sure the scatterlist's page |
2051 |
+ * has a valid virtual memory mapping |
2052 |
+diff --git a/drivers/crypto/ccp/ccp-crypto-aes.c b/drivers/crypto/ccp/ccp-crypto-aes.c |
2053 |
+index 89291c15015c..3f768699332b 100644 |
2054 |
+--- a/drivers/crypto/ccp/ccp-crypto-aes.c |
2055 |
++++ b/drivers/crypto/ccp/ccp-crypto-aes.c |
2056 |
+@@ -1,7 +1,8 @@ |
2057 |
++// SPDX-License-Identifier: GPL-2.0 |
2058 |
+ /* |
2059 |
+ * AMD Cryptographic Coprocessor (CCP) AES crypto API support |
2060 |
+ * |
2061 |
+- * Copyright (C) 2013,2016 Advanced Micro Devices, Inc. |
2062 |
++ * Copyright (C) 2013-2019 Advanced Micro Devices, Inc. |
2063 |
+ * |
2064 |
+ * Author: Tom Lendacky <thomas.lendacky@×××.com> |
2065 |
+ * |
2066 |
+@@ -79,8 +80,7 @@ static int ccp_aes_crypt(struct ablkcipher_request *req, bool encrypt) |
2067 |
+ return -EINVAL; |
2068 |
+ |
2069 |
+ if (((ctx->u.aes.mode == CCP_AES_MODE_ECB) || |
2070 |
+- (ctx->u.aes.mode == CCP_AES_MODE_CBC) || |
2071 |
+- (ctx->u.aes.mode == CCP_AES_MODE_CFB)) && |
2072 |
++ (ctx->u.aes.mode == CCP_AES_MODE_CBC)) && |
2073 |
+ (req->nbytes & (AES_BLOCK_SIZE - 1))) |
2074 |
+ return -EINVAL; |
2075 |
+ |
2076 |
+@@ -291,7 +291,7 @@ static struct ccp_aes_def aes_algs[] = { |
2077 |
+ .version = CCP_VERSION(3, 0), |
2078 |
+ .name = "cfb(aes)", |
2079 |
+ .driver_name = "cfb-aes-ccp", |
2080 |
+- .blocksize = AES_BLOCK_SIZE, |
2081 |
++ .blocksize = 1, |
2082 |
+ .ivsize = AES_BLOCK_SIZE, |
2083 |
+ .alg_defaults = &ccp_aes_defaults, |
2084 |
+ }, |
2085 |
+diff --git a/drivers/crypto/ccp/ccp-ops.c b/drivers/crypto/ccp/ccp-ops.c |
2086 |
+index 1e2e42106dee..330853a2702f 100644 |
2087 |
+--- a/drivers/crypto/ccp/ccp-ops.c |
2088 |
++++ b/drivers/crypto/ccp/ccp-ops.c |
2089 |
+@@ -458,8 +458,8 @@ static int ccp_copy_from_sb(struct ccp_cmd_queue *cmd_q, |
2090 |
+ return ccp_copy_to_from_sb(cmd_q, wa, jobid, sb, byte_swap, true); |
2091 |
+ } |
2092 |
+ |
2093 |
+-static int ccp_run_aes_cmac_cmd(struct ccp_cmd_queue *cmd_q, |
2094 |
+- struct ccp_cmd *cmd) |
2095 |
++static noinline_for_stack int |
2096 |
++ccp_run_aes_cmac_cmd(struct ccp_cmd_queue *cmd_q, struct ccp_cmd *cmd) |
2097 |
+ { |
2098 |
+ struct ccp_aes_engine *aes = &cmd->u.aes; |
2099 |
+ struct ccp_dm_workarea key, ctx; |
2100 |
+@@ -614,8 +614,8 @@ e_key: |
2101 |
+ return ret; |
2102 |
+ } |
2103 |
+ |
2104 |
+-static int ccp_run_aes_gcm_cmd(struct ccp_cmd_queue *cmd_q, |
2105 |
+- struct ccp_cmd *cmd) |
2106 |
++static noinline_for_stack int |
2107 |
++ccp_run_aes_gcm_cmd(struct ccp_cmd_queue *cmd_q, struct ccp_cmd *cmd) |
2108 |
+ { |
2109 |
+ struct ccp_aes_engine *aes = &cmd->u.aes; |
2110 |
+ struct ccp_dm_workarea key, ctx, final_wa, tag; |
2111 |
+@@ -897,7 +897,8 @@ e_key: |
2112 |
+ return ret; |
2113 |
+ } |
2114 |
+ |
2115 |
+-static int ccp_run_aes_cmd(struct ccp_cmd_queue *cmd_q, struct ccp_cmd *cmd) |
2116 |
++static noinline_for_stack int |
2117 |
++ccp_run_aes_cmd(struct ccp_cmd_queue *cmd_q, struct ccp_cmd *cmd) |
2118 |
+ { |
2119 |
+ struct ccp_aes_engine *aes = &cmd->u.aes; |
2120 |
+ struct ccp_dm_workarea key, ctx; |
2121 |
+@@ -907,12 +908,6 @@ static int ccp_run_aes_cmd(struct ccp_cmd_queue *cmd_q, struct ccp_cmd *cmd) |
2122 |
+ bool in_place = false; |
2123 |
+ int ret; |
2124 |
+ |
2125 |
+- if (aes->mode == CCP_AES_MODE_CMAC) |
2126 |
+- return ccp_run_aes_cmac_cmd(cmd_q, cmd); |
2127 |
+- |
2128 |
+- if (aes->mode == CCP_AES_MODE_GCM) |
2129 |
+- return ccp_run_aes_gcm_cmd(cmd_q, cmd); |
2130 |
+- |
2131 |
+ if (!((aes->key_len == AES_KEYSIZE_128) || |
2132 |
+ (aes->key_len == AES_KEYSIZE_192) || |
2133 |
+ (aes->key_len == AES_KEYSIZE_256))) |
2134 |
+@@ -1080,8 +1075,8 @@ e_key: |
2135 |
+ return ret; |
2136 |
+ } |
2137 |
+ |
2138 |
+-static int ccp_run_xts_aes_cmd(struct ccp_cmd_queue *cmd_q, |
2139 |
+- struct ccp_cmd *cmd) |
2140 |
++static noinline_for_stack int |
2141 |
++ccp_run_xts_aes_cmd(struct ccp_cmd_queue *cmd_q, struct ccp_cmd *cmd) |
2142 |
+ { |
2143 |
+ struct ccp_xts_aes_engine *xts = &cmd->u.xts; |
2144 |
+ struct ccp_dm_workarea key, ctx; |
2145 |
+@@ -1280,7 +1275,8 @@ e_key: |
2146 |
+ return ret; |
2147 |
+ } |
2148 |
+ |
2149 |
+-static int ccp_run_des3_cmd(struct ccp_cmd_queue *cmd_q, struct ccp_cmd *cmd) |
2150 |
++static noinline_for_stack int |
2151 |
++ccp_run_des3_cmd(struct ccp_cmd_queue *cmd_q, struct ccp_cmd *cmd) |
2152 |
+ { |
2153 |
+ struct ccp_des3_engine *des3 = &cmd->u.des3; |
2154 |
+ |
2155 |
+@@ -1293,6 +1289,9 @@ static int ccp_run_des3_cmd(struct ccp_cmd_queue *cmd_q, struct ccp_cmd *cmd) |
2156 |
+ int ret; |
2157 |
+ |
2158 |
+ /* Error checks */ |
2159 |
++ if (cmd_q->ccp->vdata->version < CCP_VERSION(5, 0)) |
2160 |
++ return -EINVAL; |
2161 |
++ |
2162 |
+ if (!cmd_q->ccp->vdata->perform->des3) |
2163 |
+ return -EINVAL; |
2164 |
+ |
2165 |
+@@ -1375,8 +1374,6 @@ static int ccp_run_des3_cmd(struct ccp_cmd_queue *cmd_q, struct ccp_cmd *cmd) |
2166 |
+ * passthru option to convert from big endian to little endian. |
2167 |
+ */ |
2168 |
+ if (des3->mode != CCP_DES3_MODE_ECB) { |
2169 |
+- u32 load_mode; |
2170 |
+- |
2171 |
+ op.sb_ctx = cmd_q->sb_ctx; |
2172 |
+ |
2173 |
+ ret = ccp_init_dm_workarea(&ctx, cmd_q, |
2174 |
+@@ -1392,12 +1389,8 @@ static int ccp_run_des3_cmd(struct ccp_cmd_queue *cmd_q, struct ccp_cmd *cmd) |
2175 |
+ if (ret) |
2176 |
+ goto e_ctx; |
2177 |
+ |
2178 |
+- if (cmd_q->ccp->vdata->version == CCP_VERSION(3, 0)) |
2179 |
+- load_mode = CCP_PASSTHRU_BYTESWAP_NOOP; |
2180 |
+- else |
2181 |
+- load_mode = CCP_PASSTHRU_BYTESWAP_256BIT; |
2182 |
+ ret = ccp_copy_to_sb(cmd_q, &ctx, op.jobid, op.sb_ctx, |
2183 |
+- load_mode); |
2184 |
++ CCP_PASSTHRU_BYTESWAP_256BIT); |
2185 |
+ if (ret) { |
2186 |
+ cmd->engine_error = cmd_q->cmd_error; |
2187 |
+ goto e_ctx; |
2188 |
+@@ -1459,10 +1452,6 @@ static int ccp_run_des3_cmd(struct ccp_cmd_queue *cmd_q, struct ccp_cmd *cmd) |
2189 |
+ } |
2190 |
+ |
2191 |
+ /* ...but we only need the last DES3_EDE_BLOCK_SIZE bytes */ |
2192 |
+- if (cmd_q->ccp->vdata->version == CCP_VERSION(3, 0)) |
2193 |
+- dm_offset = CCP_SB_BYTES - des3->iv_len; |
2194 |
+- else |
2195 |
+- dm_offset = 0; |
2196 |
+ ccp_get_dm_area(&ctx, dm_offset, des3->iv, 0, |
2197 |
+ DES3_EDE_BLOCK_SIZE); |
2198 |
+ } |
2199 |
+@@ -1483,7 +1472,8 @@ e_key: |
2200 |
+ return ret; |
2201 |
+ } |
2202 |
+ |
2203 |
+-static int ccp_run_sha_cmd(struct ccp_cmd_queue *cmd_q, struct ccp_cmd *cmd) |
2204 |
++static noinline_for_stack int |
2205 |
++ccp_run_sha_cmd(struct ccp_cmd_queue *cmd_q, struct ccp_cmd *cmd) |
2206 |
+ { |
2207 |
+ struct ccp_sha_engine *sha = &cmd->u.sha; |
2208 |
+ struct ccp_dm_workarea ctx; |
2209 |
+@@ -1827,7 +1817,8 @@ e_ctx: |
2210 |
+ return ret; |
2211 |
+ } |
2212 |
+ |
2213 |
+-static int ccp_run_rsa_cmd(struct ccp_cmd_queue *cmd_q, struct ccp_cmd *cmd) |
2214 |
++static noinline_for_stack int |
2215 |
++ccp_run_rsa_cmd(struct ccp_cmd_queue *cmd_q, struct ccp_cmd *cmd) |
2216 |
+ { |
2217 |
+ struct ccp_rsa_engine *rsa = &cmd->u.rsa; |
2218 |
+ struct ccp_dm_workarea exp, src, dst; |
2219 |
+@@ -1958,8 +1949,8 @@ e_sb: |
2220 |
+ return ret; |
2221 |
+ } |
2222 |
+ |
2223 |
+-static int ccp_run_passthru_cmd(struct ccp_cmd_queue *cmd_q, |
2224 |
+- struct ccp_cmd *cmd) |
2225 |
++static noinline_for_stack int |
2226 |
++ccp_run_passthru_cmd(struct ccp_cmd_queue *cmd_q, struct ccp_cmd *cmd) |
2227 |
+ { |
2228 |
+ struct ccp_passthru_engine *pt = &cmd->u.passthru; |
2229 |
+ struct ccp_dm_workarea mask; |
2230 |
+@@ -2090,7 +2081,8 @@ e_mask: |
2231 |
+ return ret; |
2232 |
+ } |
2233 |
+ |
2234 |
+-static int ccp_run_passthru_nomap_cmd(struct ccp_cmd_queue *cmd_q, |
2235 |
++static noinline_for_stack int |
2236 |
++ccp_run_passthru_nomap_cmd(struct ccp_cmd_queue *cmd_q, |
2237 |
+ struct ccp_cmd *cmd) |
2238 |
+ { |
2239 |
+ struct ccp_passthru_nomap_engine *pt = &cmd->u.passthru_nomap; |
2240 |
+@@ -2431,7 +2423,8 @@ e_src: |
2241 |
+ return ret; |
2242 |
+ } |
2243 |
+ |
2244 |
+-static int ccp_run_ecc_cmd(struct ccp_cmd_queue *cmd_q, struct ccp_cmd *cmd) |
2245 |
++static noinline_for_stack int |
2246 |
++ccp_run_ecc_cmd(struct ccp_cmd_queue *cmd_q, struct ccp_cmd *cmd) |
2247 |
+ { |
2248 |
+ struct ccp_ecc_engine *ecc = &cmd->u.ecc; |
2249 |
+ |
2250 |
+@@ -2468,7 +2461,17 @@ int ccp_run_cmd(struct ccp_cmd_queue *cmd_q, struct ccp_cmd *cmd) |
2251 |
+ |
2252 |
+ switch (cmd->engine) { |
2253 |
+ case CCP_ENGINE_AES: |
2254 |
+- ret = ccp_run_aes_cmd(cmd_q, cmd); |
2255 |
++ switch (cmd->u.aes.mode) { |
2256 |
++ case CCP_AES_MODE_CMAC: |
2257 |
++ ret = ccp_run_aes_cmac_cmd(cmd_q, cmd); |
2258 |
++ break; |
2259 |
++ case CCP_AES_MODE_GCM: |
2260 |
++ ret = ccp_run_aes_gcm_cmd(cmd_q, cmd); |
2261 |
++ break; |
2262 |
++ default: |
2263 |
++ ret = ccp_run_aes_cmd(cmd_q, cmd); |
2264 |
++ break; |
2265 |
++ } |
2266 |
+ break; |
2267 |
+ case CCP_ENGINE_XTS_AES_128: |
2268 |
+ ret = ccp_run_xts_aes_cmd(cmd_q, cmd); |
2269 |
+diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-hash.c b/drivers/crypto/sunxi-ss/sun4i-ss-hash.c |
2270 |
+index 1a724263761b..2d178e013535 100644 |
2271 |
+--- a/drivers/crypto/sunxi-ss/sun4i-ss-hash.c |
2272 |
++++ b/drivers/crypto/sunxi-ss/sun4i-ss-hash.c |
2273 |
+@@ -179,7 +179,7 @@ static int sun4i_hash(struct ahash_request *areq) |
2274 |
+ */ |
2275 |
+ unsigned int i = 0, end, fill, min_fill, nwait, nbw = 0, j = 0, todo; |
2276 |
+ unsigned int in_i = 0; |
2277 |
+- u32 spaces, rx_cnt = SS_RX_DEFAULT, bf[32] = {0}, wb = 0, v, ivmode = 0; |
2278 |
++ u32 spaces, rx_cnt = SS_RX_DEFAULT, bf[32] = {0}, v, ivmode = 0; |
2279 |
+ struct sun4i_req_ctx *op = ahash_request_ctx(areq); |
2280 |
+ struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq); |
2281 |
+ struct sun4i_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm); |
2282 |
+@@ -188,6 +188,7 @@ static int sun4i_hash(struct ahash_request *areq) |
2283 |
+ struct sg_mapping_iter mi; |
2284 |
+ int in_r, err = 0; |
2285 |
+ size_t copied = 0; |
2286 |
++ __le32 wb = 0; |
2287 |
+ |
2288 |
+ dev_dbg(ss->dev, "%s %s bc=%llu len=%u mode=%x wl=%u h0=%0x", |
2289 |
+ __func__, crypto_tfm_alg_name(areq->base.tfm), |
2290 |
+@@ -399,7 +400,7 @@ hash_final: |
2291 |
+ |
2292 |
+ nbw = op->len - 4 * nwait; |
2293 |
+ if (nbw) { |
2294 |
+- wb = *(u32 *)(op->buf + nwait * 4); |
2295 |
++ wb = cpu_to_le32(*(u32 *)(op->buf + nwait * 4)); |
2296 |
+ wb &= GENMASK((nbw * 8) - 1, 0); |
2297 |
+ |
2298 |
+ op->byte_count += nbw; |
2299 |
+@@ -408,7 +409,7 @@ hash_final: |
2300 |
+ |
2301 |
+ /* write the remaining bytes of the nbw buffer */ |
2302 |
+ wb |= ((1 << 7) << (nbw * 8)); |
2303 |
+- bf[j++] = wb; |
2304 |
++ bf[j++] = le32_to_cpu(wb); |
2305 |
+ |
2306 |
+ /* |
2307 |
+ * number of space to pad to obtain 64o minus 8(size) minus 4 (final 1) |
2308 |
+@@ -427,13 +428,13 @@ hash_final: |
2309 |
+ |
2310 |
+ /* write the length of data */ |
2311 |
+ if (op->mode == SS_OP_SHA1) { |
2312 |
+- __be64 bits = cpu_to_be64(op->byte_count << 3); |
2313 |
+- bf[j++] = lower_32_bits(bits); |
2314 |
+- bf[j++] = upper_32_bits(bits); |
2315 |
++ __be64 *bits = (__be64 *)&bf[j]; |
2316 |
++ *bits = cpu_to_be64(op->byte_count << 3); |
2317 |
++ j += 2; |
2318 |
+ } else { |
2319 |
+- __le64 bits = op->byte_count << 3; |
2320 |
+- bf[j++] = lower_32_bits(bits); |
2321 |
+- bf[j++] = upper_32_bits(bits); |
2322 |
++ __le64 *bits = (__le64 *)&bf[j]; |
2323 |
++ *bits = cpu_to_le64(op->byte_count << 3); |
2324 |
++ j += 2; |
2325 |
+ } |
2326 |
+ writesl(ss->base + SS_RXFIFO, bf, j); |
2327 |
+ |
2328 |
+@@ -475,7 +476,7 @@ hash_final: |
2329 |
+ } |
2330 |
+ } else { |
2331 |
+ for (i = 0; i < 4; i++) { |
2332 |
+- v = readl(ss->base + SS_MD0 + i * 4); |
2333 |
++ v = cpu_to_le32(readl(ss->base + SS_MD0 + i * 4)); |
2334 |
+ memcpy(areq->result + i * 4, &v, 4); |
2335 |
+ } |
2336 |
+ } |
2337 |
+diff --git a/drivers/dma/dma-axi-dmac.c b/drivers/dma/dma-axi-dmac.c |
2338 |
+index 7f0b9aa15867..9887f2a14aa9 100644 |
2339 |
+--- a/drivers/dma/dma-axi-dmac.c |
2340 |
++++ b/drivers/dma/dma-axi-dmac.c |
2341 |
+@@ -451,7 +451,7 @@ static struct dma_async_tx_descriptor *axi_dmac_prep_interleaved( |
2342 |
+ |
2343 |
+ if (chan->hw_2d) { |
2344 |
+ if (!axi_dmac_check_len(chan, xt->sgl[0].size) || |
2345 |
+- !axi_dmac_check_len(chan, xt->numf)) |
2346 |
++ xt->numf == 0) |
2347 |
+ return NULL; |
2348 |
+ if (xt->sgl[0].size + dst_icg > chan->max_length || |
2349 |
+ xt->sgl[0].size + src_icg > chan->max_length) |
2350 |
+diff --git a/drivers/dma/dw/platform.c b/drivers/dma/dw/platform.c |
2351 |
+index 46a519e07195..b408c07662f5 100644 |
2352 |
+--- a/drivers/dma/dw/platform.c |
2353 |
++++ b/drivers/dma/dw/platform.c |
2354 |
+@@ -87,13 +87,20 @@ static void dw_dma_acpi_controller_register(struct dw_dma *dw) |
2355 |
+ dma_cap_set(DMA_SLAVE, info->dma_cap); |
2356 |
+ info->filter_fn = dw_dma_acpi_filter; |
2357 |
+ |
2358 |
+- ret = devm_acpi_dma_controller_register(dev, acpi_dma_simple_xlate, |
2359 |
+- info); |
2360 |
++ ret = acpi_dma_controller_register(dev, acpi_dma_simple_xlate, info); |
2361 |
+ if (ret) |
2362 |
+ dev_err(dev, "could not register acpi_dma_controller\n"); |
2363 |
+ } |
2364 |
++ |
2365 |
++static void dw_dma_acpi_controller_free(struct dw_dma *dw) |
2366 |
++{ |
2367 |
++ struct device *dev = dw->dma.dev; |
2368 |
++ |
2369 |
++ acpi_dma_controller_free(dev); |
2370 |
++} |
2371 |
+ #else /* !CONFIG_ACPI */ |
2372 |
+ static inline void dw_dma_acpi_controller_register(struct dw_dma *dw) {} |
2373 |
++static inline void dw_dma_acpi_controller_free(struct dw_dma *dw) {} |
2374 |
+ #endif /* !CONFIG_ACPI */ |
2375 |
+ |
2376 |
+ #ifdef CONFIG_OF |
2377 |
+@@ -249,6 +256,9 @@ static int dw_remove(struct platform_device *pdev) |
2378 |
+ { |
2379 |
+ struct dw_dma_chip *chip = platform_get_drvdata(pdev); |
2380 |
+ |
2381 |
++ if (ACPI_HANDLE(&pdev->dev)) |
2382 |
++ dw_dma_acpi_controller_free(chip->dw); |
2383 |
++ |
2384 |
+ if (pdev->dev.of_node) |
2385 |
+ of_dma_controller_free(pdev->dev.of_node); |
2386 |
+ |
2387 |
+diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c |
2388 |
+index 519c24465dea..57a49fe713fd 100644 |
2389 |
+--- a/drivers/dma/edma.c |
2390 |
++++ b/drivers/dma/edma.c |
2391 |
+@@ -2340,8 +2340,10 @@ static int edma_probe(struct platform_device *pdev) |
2392 |
+ |
2393 |
+ ecc->tc_list = devm_kcalloc(dev, ecc->num_tc, |
2394 |
+ sizeof(*ecc->tc_list), GFP_KERNEL); |
2395 |
+- if (!ecc->tc_list) |
2396 |
+- return -ENOMEM; |
2397 |
++ if (!ecc->tc_list) { |
2398 |
++ ret = -ENOMEM; |
2399 |
++ goto err_reg1; |
2400 |
++ } |
2401 |
+ |
2402 |
+ for (i = 0;; i++) { |
2403 |
+ ret = of_parse_phandle_with_fixed_args(node, "ti,tptcs", |
2404 |
+diff --git a/drivers/dma/hsu/hsu.c b/drivers/dma/hsu/hsu.c |
2405 |
+index 29d04ca71d52..15525a2b8ebd 100644 |
2406 |
+--- a/drivers/dma/hsu/hsu.c |
2407 |
++++ b/drivers/dma/hsu/hsu.c |
2408 |
+@@ -64,10 +64,10 @@ static void hsu_dma_chan_start(struct hsu_dma_chan *hsuc) |
2409 |
+ |
2410 |
+ if (hsuc->direction == DMA_MEM_TO_DEV) { |
2411 |
+ bsr = config->dst_maxburst; |
2412 |
+- mtsr = config->src_addr_width; |
2413 |
++ mtsr = config->dst_addr_width; |
2414 |
+ } else if (hsuc->direction == DMA_DEV_TO_MEM) { |
2415 |
+ bsr = config->src_maxburst; |
2416 |
+- mtsr = config->dst_addr_width; |
2417 |
++ mtsr = config->src_addr_width; |
2418 |
+ } |
2419 |
+ |
2420 |
+ hsu_chan_disable(hsuc); |
2421 |
+diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c |
2422 |
+index 0fc12a8783e3..99f3f22ed647 100644 |
2423 |
+--- a/drivers/dma/imx-sdma.c |
2424 |
++++ b/drivers/dma/imx-sdma.c |
2425 |
+@@ -1441,6 +1441,14 @@ static void sdma_add_scripts(struct sdma_engine *sdma, |
2426 |
+ if (!sdma->script_number) |
2427 |
+ sdma->script_number = SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V1; |
2428 |
+ |
2429 |
++ if (sdma->script_number > sizeof(struct sdma_script_start_addrs) |
2430 |
++ / sizeof(s32)) { |
2431 |
++ dev_err(sdma->dev, |
2432 |
++ "SDMA script number %d not match with firmware.\n", |
2433 |
++ sdma->script_number); |
2434 |
++ return; |
2435 |
++ } |
2436 |
++ |
2437 |
+ for (i = 0; i < sdma->script_number; i++) |
2438 |
+ if (addr_arr[i] > 0) |
2439 |
+ saddr_arr[i] = addr_arr[i]; |
2440 |
+diff --git a/drivers/dma/mv_xor.c b/drivers/dma/mv_xor.c |
2441 |
+index 1993889003fd..1c57577f49fe 100644 |
2442 |
+--- a/drivers/dma/mv_xor.c |
2443 |
++++ b/drivers/dma/mv_xor.c |
2444 |
+@@ -1059,6 +1059,7 @@ mv_xor_channel_add(struct mv_xor_device *xordev, |
2445 |
+ mv_chan->op_in_desc = XOR_MODE_IN_DESC; |
2446 |
+ |
2447 |
+ dma_dev = &mv_chan->dmadev; |
2448 |
++ dma_dev->dev = &pdev->dev; |
2449 |
+ mv_chan->xordev = xordev; |
2450 |
+ |
2451 |
+ /* |
2452 |
+@@ -1091,7 +1092,6 @@ mv_xor_channel_add(struct mv_xor_device *xordev, |
2453 |
+ dma_dev->device_free_chan_resources = mv_xor_free_chan_resources; |
2454 |
+ dma_dev->device_tx_status = mv_xor_status; |
2455 |
+ dma_dev->device_issue_pending = mv_xor_issue_pending; |
2456 |
+- dma_dev->dev = &pdev->dev; |
2457 |
+ |
2458 |
+ /* set prep routines based on capability */ |
2459 |
+ if (dma_has_cap(DMA_INTERRUPT, dma_dev->cap_mask)) |
2460 |
+diff --git a/drivers/dma/tegra210-adma.c b/drivers/dma/tegra210-adma.c |
2461 |
+index 09b6756366c3..4f4733d831a1 100644 |
2462 |
+--- a/drivers/dma/tegra210-adma.c |
2463 |
++++ b/drivers/dma/tegra210-adma.c |
2464 |
+@@ -98,6 +98,7 @@ struct tegra_adma_chan_regs { |
2465 |
+ unsigned int src_addr; |
2466 |
+ unsigned int trg_addr; |
2467 |
+ unsigned int fifo_ctrl; |
2468 |
++ unsigned int cmd; |
2469 |
+ unsigned int tc; |
2470 |
+ }; |
2471 |
+ |
2472 |
+@@ -127,6 +128,7 @@ struct tegra_adma_chan { |
2473 |
+ enum dma_transfer_direction sreq_dir; |
2474 |
+ unsigned int sreq_index; |
2475 |
+ bool sreq_reserved; |
2476 |
++ struct tegra_adma_chan_regs ch_regs; |
2477 |
+ |
2478 |
+ /* Transfer count and position info */ |
2479 |
+ unsigned int tx_buf_count; |
2480 |
+@@ -635,8 +637,30 @@ static struct dma_chan *tegra_dma_of_xlate(struct of_phandle_args *dma_spec, |
2481 |
+ static int tegra_adma_runtime_suspend(struct device *dev) |
2482 |
+ { |
2483 |
+ struct tegra_adma *tdma = dev_get_drvdata(dev); |
2484 |
++ struct tegra_adma_chan_regs *ch_reg; |
2485 |
++ struct tegra_adma_chan *tdc; |
2486 |
++ int i; |
2487 |
+ |
2488 |
+ tdma->global_cmd = tdma_read(tdma, ADMA_GLOBAL_CMD); |
2489 |
++ if (!tdma->global_cmd) |
2490 |
++ goto clk_disable; |
2491 |
++ |
2492 |
++ for (i = 0; i < tdma->nr_channels; i++) { |
2493 |
++ tdc = &tdma->channels[i]; |
2494 |
++ ch_reg = &tdc->ch_regs; |
2495 |
++ ch_reg->cmd = tdma_ch_read(tdc, ADMA_CH_CMD); |
2496 |
++ /* skip if channel is not active */ |
2497 |
++ if (!ch_reg->cmd) |
2498 |
++ continue; |
2499 |
++ ch_reg->tc = tdma_ch_read(tdc, ADMA_CH_TC); |
2500 |
++ ch_reg->src_addr = tdma_ch_read(tdc, ADMA_CH_LOWER_SRC_ADDR); |
2501 |
++ ch_reg->trg_addr = tdma_ch_read(tdc, ADMA_CH_LOWER_TRG_ADDR); |
2502 |
++ ch_reg->ctrl = tdma_ch_read(tdc, ADMA_CH_CTRL); |
2503 |
++ ch_reg->fifo_ctrl = tdma_ch_read(tdc, ADMA_CH_FIFO_CTRL); |
2504 |
++ ch_reg->config = tdma_ch_read(tdc, ADMA_CH_CONFIG); |
2505 |
++ } |
2506 |
++ |
2507 |
++clk_disable: |
2508 |
+ clk_disable_unprepare(tdma->ahub_clk); |
2509 |
+ |
2510 |
+ return 0; |
2511 |
+@@ -645,7 +669,9 @@ static int tegra_adma_runtime_suspend(struct device *dev) |
2512 |
+ static int tegra_adma_runtime_resume(struct device *dev) |
2513 |
+ { |
2514 |
+ struct tegra_adma *tdma = dev_get_drvdata(dev); |
2515 |
+- int ret; |
2516 |
++ struct tegra_adma_chan_regs *ch_reg; |
2517 |
++ struct tegra_adma_chan *tdc; |
2518 |
++ int ret, i; |
2519 |
+ |
2520 |
+ ret = clk_prepare_enable(tdma->ahub_clk); |
2521 |
+ if (ret) { |
2522 |
+@@ -654,6 +680,24 @@ static int tegra_adma_runtime_resume(struct device *dev) |
2523 |
+ } |
2524 |
+ tdma_write(tdma, ADMA_GLOBAL_CMD, tdma->global_cmd); |
2525 |
+ |
2526 |
++ if (!tdma->global_cmd) |
2527 |
++ return 0; |
2528 |
++ |
2529 |
++ for (i = 0; i < tdma->nr_channels; i++) { |
2530 |
++ tdc = &tdma->channels[i]; |
2531 |
++ ch_reg = &tdc->ch_regs; |
2532 |
++ /* skip if channel was not active earlier */ |
2533 |
++ if (!ch_reg->cmd) |
2534 |
++ continue; |
2535 |
++ tdma_ch_write(tdc, ADMA_CH_TC, ch_reg->tc); |
2536 |
++ tdma_ch_write(tdc, ADMA_CH_LOWER_SRC_ADDR, ch_reg->src_addr); |
2537 |
++ tdma_ch_write(tdc, ADMA_CH_LOWER_TRG_ADDR, ch_reg->trg_addr); |
2538 |
++ tdma_ch_write(tdc, ADMA_CH_CTRL, ch_reg->ctrl); |
2539 |
++ tdma_ch_write(tdc, ADMA_CH_FIFO_CTRL, ch_reg->fifo_ctrl); |
2540 |
++ tdma_ch_write(tdc, ADMA_CH_CONFIG, ch_reg->config); |
2541 |
++ tdma_ch_write(tdc, ADMA_CH_CMD, ch_reg->cmd); |
2542 |
++ } |
2543 |
++ |
2544 |
+ return 0; |
2545 |
+ } |
2546 |
+ |
2547 |
+@@ -700,16 +744,6 @@ static int tegra_adma_probe(struct platform_device *pdev) |
2548 |
+ return PTR_ERR(tdma->ahub_clk); |
2549 |
+ } |
2550 |
+ |
2551 |
+- pm_runtime_enable(&pdev->dev); |
2552 |
+- |
2553 |
+- ret = pm_runtime_get_sync(&pdev->dev); |
2554 |
+- if (ret < 0) |
2555 |
+- goto rpm_disable; |
2556 |
+- |
2557 |
+- ret = tegra_adma_init(tdma); |
2558 |
+- if (ret) |
2559 |
+- goto rpm_put; |
2560 |
+- |
2561 |
+ INIT_LIST_HEAD(&tdma->dma_dev.channels); |
2562 |
+ for (i = 0; i < tdma->nr_channels; i++) { |
2563 |
+ struct tegra_adma_chan *tdc = &tdma->channels[i]; |
2564 |
+@@ -727,6 +761,16 @@ static int tegra_adma_probe(struct platform_device *pdev) |
2565 |
+ tdc->tdma = tdma; |
2566 |
+ } |
2567 |
+ |
2568 |
++ pm_runtime_enable(&pdev->dev); |
2569 |
++ |
2570 |
++ ret = pm_runtime_get_sync(&pdev->dev); |
2571 |
++ if (ret < 0) |
2572 |
++ goto rpm_disable; |
2573 |
++ |
2574 |
++ ret = tegra_adma_init(tdma); |
2575 |
++ if (ret) |
2576 |
++ goto rpm_put; |
2577 |
++ |
2578 |
+ dma_cap_set(DMA_SLAVE, tdma->dma_dev.cap_mask); |
2579 |
+ dma_cap_set(DMA_PRIVATE, tdma->dma_dev.cap_mask); |
2580 |
+ dma_cap_set(DMA_CYCLIC, tdma->dma_dev.cap_mask); |
2581 |
+@@ -768,13 +812,13 @@ static int tegra_adma_probe(struct platform_device *pdev) |
2582 |
+ |
2583 |
+ dma_remove: |
2584 |
+ dma_async_device_unregister(&tdma->dma_dev); |
2585 |
+-irq_dispose: |
2586 |
+- while (--i >= 0) |
2587 |
+- irq_dispose_mapping(tdma->channels[i].irq); |
2588 |
+ rpm_put: |
2589 |
+ pm_runtime_put_sync(&pdev->dev); |
2590 |
+ rpm_disable: |
2591 |
+ pm_runtime_disable(&pdev->dev); |
2592 |
++irq_dispose: |
2593 |
++ while (--i >= 0) |
2594 |
++ irq_dispose_mapping(tdma->channels[i].irq); |
2595 |
+ |
2596 |
+ return ret; |
2597 |
+ } |
2598 |
+diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c |
2599 |
+index f7fa05fee45a..329021189c38 100644 |
2600 |
+--- a/drivers/edac/edac_mc.c |
2601 |
++++ b/drivers/edac/edac_mc.c |
2602 |
+@@ -680,22 +680,18 @@ static int del_mc_from_global_list(struct mem_ctl_info *mci) |
2603 |
+ |
2604 |
+ struct mem_ctl_info *edac_mc_find(int idx) |
2605 |
+ { |
2606 |
+- struct mem_ctl_info *mci = NULL; |
2607 |
++ struct mem_ctl_info *mci; |
2608 |
+ struct list_head *item; |
2609 |
+ |
2610 |
+ mutex_lock(&mem_ctls_mutex); |
2611 |
+ |
2612 |
+ list_for_each(item, &mc_devices) { |
2613 |
+ mci = list_entry(item, struct mem_ctl_info, link); |
2614 |
+- |
2615 |
+- if (mci->mc_idx >= idx) { |
2616 |
+- if (mci->mc_idx == idx) { |
2617 |
+- goto unlock; |
2618 |
+- } |
2619 |
+- break; |
2620 |
+- } |
2621 |
++ if (mci->mc_idx == idx) |
2622 |
++ goto unlock; |
2623 |
+ } |
2624 |
+ |
2625 |
++ mci = NULL; |
2626 |
+ unlock: |
2627 |
+ mutex_unlock(&mem_ctls_mutex); |
2628 |
+ return mci; |
2629 |
+diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c |
2630 |
+index c8c83f84aced..9d94c306c8ca 100644 |
2631 |
+--- a/drivers/gpu/drm/drm_dp_mst_topology.c |
2632 |
++++ b/drivers/gpu/drm/drm_dp_mst_topology.c |
2633 |
+@@ -982,9 +982,20 @@ static struct drm_dp_mst_port *drm_dp_mst_get_port_ref_locked(struct drm_dp_mst_ |
2634 |
+ static struct drm_dp_mst_port *drm_dp_get_validated_port_ref(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port) |
2635 |
+ { |
2636 |
+ struct drm_dp_mst_port *rport = NULL; |
2637 |
++ |
2638 |
+ mutex_lock(&mgr->lock); |
2639 |
+- if (mgr->mst_primary) |
2640 |
+- rport = drm_dp_mst_get_port_ref_locked(mgr->mst_primary, port); |
2641 |
++ /* |
2642 |
++ * Port may or may not be 'valid' but we don't care about that when |
2643 |
++ * destroying the port and we are guaranteed that the port pointer |
2644 |
++ * will be valid until we've finished |
2645 |
++ */ |
2646 |
++ if (current_work() == &mgr->destroy_connector_work) { |
2647 |
++ kref_get(&port->kref); |
2648 |
++ rport = port; |
2649 |
++ } else if (mgr->mst_primary) { |
2650 |
++ rport = drm_dp_mst_get_port_ref_locked(mgr->mst_primary, |
2651 |
++ port); |
2652 |
++ } |
2653 |
+ mutex_unlock(&mgr->lock); |
2654 |
+ return rport; |
2655 |
+ } |
2656 |
+diff --git a/drivers/gpu/drm/etnaviv/etnaviv_dump.c b/drivers/gpu/drm/etnaviv/etnaviv_dump.c |
2657 |
+index 2d955d7d7b6d..e154e6fb64da 100644 |
2658 |
+--- a/drivers/gpu/drm/etnaviv/etnaviv_dump.c |
2659 |
++++ b/drivers/gpu/drm/etnaviv/etnaviv_dump.c |
2660 |
+@@ -207,7 +207,7 @@ void etnaviv_core_dump(struct etnaviv_gpu *gpu) |
2661 |
+ mutex_lock(&obj->lock); |
2662 |
+ pages = etnaviv_gem_get_pages(obj); |
2663 |
+ mutex_unlock(&obj->lock); |
2664 |
+- if (pages) { |
2665 |
++ if (!IS_ERR(pages)) { |
2666 |
+ int j; |
2667 |
+ |
2668 |
+ iter.hdr->data[0] = bomap - bomap_start; |
2669 |
+diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gem_prime.c b/drivers/gpu/drm/etnaviv/etnaviv_gem_prime.c |
2670 |
+index ae884723e9b1..880b95511b98 100644 |
2671 |
+--- a/drivers/gpu/drm/etnaviv/etnaviv_gem_prime.c |
2672 |
++++ b/drivers/gpu/drm/etnaviv/etnaviv_gem_prime.c |
2673 |
+@@ -26,7 +26,7 @@ struct sg_table *etnaviv_gem_prime_get_sg_table(struct drm_gem_object *obj) |
2674 |
+ int npages = obj->size >> PAGE_SHIFT; |
2675 |
+ |
2676 |
+ if (WARN_ON(!etnaviv_obj->pages)) /* should have already pinned! */ |
2677 |
+- return NULL; |
2678 |
++ return ERR_PTR(-EINVAL); |
2679 |
+ |
2680 |
+ return drm_prime_pages_to_sg(etnaviv_obj->pages, npages); |
2681 |
+ } |
2682 |
+diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_fbdev.c b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_fbdev.c |
2683 |
+index 8bd29075ae4e..edcca1761500 100644 |
2684 |
+--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_fbdev.c |
2685 |
++++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_fbdev.c |
2686 |
+@@ -71,7 +71,6 @@ static int hibmc_drm_fb_create(struct drm_fb_helper *helper, |
2687 |
+ DRM_DEBUG_DRIVER("surface width(%d), height(%d) and bpp(%d)\n", |
2688 |
+ sizes->surface_width, sizes->surface_height, |
2689 |
+ sizes->surface_bpp); |
2690 |
+- sizes->surface_depth = 32; |
2691 |
+ |
2692 |
+ bytes_per_pixel = DIV_ROUND_UP(sizes->surface_bpp, 8); |
2693 |
+ |
2694 |
+diff --git a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c |
2695 |
+index 7791313405b5..c8671b1578c6 100644 |
2696 |
+--- a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c |
2697 |
++++ b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c |
2698 |
+@@ -394,19 +394,17 @@ static const unsigned int a3xx_registers[] = { |
2699 |
+ 0x2200, 0x2212, 0x2214, 0x2217, 0x221a, 0x221a, 0x2240, 0x227e, |
2700 |
+ 0x2280, 0x228b, 0x22c0, 0x22c0, 0x22c4, 0x22ce, 0x22d0, 0x22d8, |
2701 |
+ 0x22df, 0x22e6, 0x22e8, 0x22e9, 0x22ec, 0x22ec, 0x22f0, 0x22f7, |
2702 |
+- 0x22ff, 0x22ff, 0x2340, 0x2343, 0x2348, 0x2349, 0x2350, 0x2356, |
2703 |
+- 0x2360, 0x2360, 0x2440, 0x2440, 0x2444, 0x2444, 0x2448, 0x244d, |
2704 |
+- 0x2468, 0x2469, 0x246c, 0x246d, 0x2470, 0x2470, 0x2472, 0x2472, |
2705 |
+- 0x2474, 0x2475, 0x2479, 0x247a, 0x24c0, 0x24d3, 0x24e4, 0x24ef, |
2706 |
+- 0x2500, 0x2509, 0x250c, 0x250c, 0x250e, 0x250e, 0x2510, 0x2511, |
2707 |
+- 0x2514, 0x2515, 0x25e4, 0x25e4, 0x25ea, 0x25ea, 0x25ec, 0x25ed, |
2708 |
+- 0x25f0, 0x25f0, 0x2600, 0x2612, 0x2614, 0x2617, 0x261a, 0x261a, |
2709 |
+- 0x2640, 0x267e, 0x2680, 0x268b, 0x26c0, 0x26c0, 0x26c4, 0x26ce, |
2710 |
+- 0x26d0, 0x26d8, 0x26df, 0x26e6, 0x26e8, 0x26e9, 0x26ec, 0x26ec, |
2711 |
+- 0x26f0, 0x26f7, 0x26ff, 0x26ff, 0x2740, 0x2743, 0x2748, 0x2749, |
2712 |
+- 0x2750, 0x2756, 0x2760, 0x2760, 0x300c, 0x300e, 0x301c, 0x301d, |
2713 |
+- 0x302a, 0x302a, 0x302c, 0x302d, 0x3030, 0x3031, 0x3034, 0x3036, |
2714 |
+- 0x303c, 0x303c, 0x305e, 0x305f, |
2715 |
++ 0x22ff, 0x22ff, 0x2340, 0x2343, 0x2440, 0x2440, 0x2444, 0x2444, |
2716 |
++ 0x2448, 0x244d, 0x2468, 0x2469, 0x246c, 0x246d, 0x2470, 0x2470, |
2717 |
++ 0x2472, 0x2472, 0x2474, 0x2475, 0x2479, 0x247a, 0x24c0, 0x24d3, |
2718 |
++ 0x24e4, 0x24ef, 0x2500, 0x2509, 0x250c, 0x250c, 0x250e, 0x250e, |
2719 |
++ 0x2510, 0x2511, 0x2514, 0x2515, 0x25e4, 0x25e4, 0x25ea, 0x25ea, |
2720 |
++ 0x25ec, 0x25ed, 0x25f0, 0x25f0, 0x2600, 0x2612, 0x2614, 0x2617, |
2721 |
++ 0x261a, 0x261a, 0x2640, 0x267e, 0x2680, 0x268b, 0x26c0, 0x26c0, |
2722 |
++ 0x26c4, 0x26ce, 0x26d0, 0x26d8, 0x26df, 0x26e6, 0x26e8, 0x26e9, |
2723 |
++ 0x26ec, 0x26ec, 0x26f0, 0x26f7, 0x26ff, 0x26ff, 0x2740, 0x2743, |
2724 |
++ 0x300c, 0x300e, 0x301c, 0x301d, 0x302a, 0x302a, 0x302c, 0x302d, |
2725 |
++ 0x3030, 0x3031, 0x3034, 0x3036, 0x303c, 0x303c, 0x305e, 0x305f, |
2726 |
+ ~0 /* sentinel */ |
2727 |
+ }; |
2728 |
+ |
2729 |
+diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c |
2730 |
+index a9a0b56f1fbc..b9cb7c09e05a 100644 |
2731 |
+--- a/drivers/gpu/drm/msm/dsi/dsi_host.c |
2732 |
++++ b/drivers/gpu/drm/msm/dsi/dsi_host.c |
2733 |
+@@ -34,6 +34,8 @@ |
2734 |
+ #include "dsi_cfg.h" |
2735 |
+ #include "msm_kms.h" |
2736 |
+ |
2737 |
++#define DSI_RESET_TOGGLE_DELAY_MS 20 |
2738 |
++ |
2739 |
+ static int dsi_get_version(const void __iomem *base, u32 *major, u32 *minor) |
2740 |
+ { |
2741 |
+ u32 ver; |
2742 |
+@@ -906,7 +908,7 @@ static void dsi_sw_reset(struct msm_dsi_host *msm_host) |
2743 |
+ wmb(); /* clocks need to be enabled before reset */ |
2744 |
+ |
2745 |
+ dsi_write(msm_host, REG_DSI_RESET, 1); |
2746 |
+- wmb(); /* make sure reset happen */ |
2747 |
++ msleep(DSI_RESET_TOGGLE_DELAY_MS); /* make sure reset happen */ |
2748 |
+ dsi_write(msm_host, REG_DSI_RESET, 0); |
2749 |
+ } |
2750 |
+ |
2751 |
+@@ -1288,7 +1290,7 @@ static void dsi_sw_reset_restore(struct msm_dsi_host *msm_host) |
2752 |
+ |
2753 |
+ /* dsi controller can only be reset while clocks are running */ |
2754 |
+ dsi_write(msm_host, REG_DSI_RESET, 1); |
2755 |
+- wmb(); /* make sure reset happen */ |
2756 |
++ msleep(DSI_RESET_TOGGLE_DELAY_MS); /* make sure reset happen */ |
2757 |
+ dsi_write(msm_host, REG_DSI_RESET, 0); |
2758 |
+ wmb(); /* controller out of reset */ |
2759 |
+ dsi_write(msm_host, REG_DSI_CTRL, data0); |
2760 |
+diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c |
2761 |
+index 824067d2d427..42f0ecb0cf35 100644 |
2762 |
+--- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c |
2763 |
++++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c |
2764 |
+@@ -635,7 +635,7 @@ fail: |
2765 |
+ if (cfg_handler) |
2766 |
+ mdp5_cfg_destroy(cfg_handler); |
2767 |
+ |
2768 |
+- return NULL; |
2769 |
++ return ERR_PTR(ret); |
2770 |
+ } |
2771 |
+ |
2772 |
+ static struct mdp5_cfg_platform *mdp5_get_config(struct platform_device *dev) |
2773 |
+diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gddr3.c b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gddr3.c |
2774 |
+index 60ece0a8a2e1..1d2d6bae73cd 100644 |
2775 |
+--- a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gddr3.c |
2776 |
++++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gddr3.c |
2777 |
+@@ -87,7 +87,7 @@ nvkm_gddr3_calc(struct nvkm_ram *ram) |
2778 |
+ WR = (ram->next->bios.timing[2] & 0x007f0000) >> 16; |
2779 |
+ /* XXX: Get these values from the VBIOS instead */ |
2780 |
+ DLL = !(ram->mr[1] & 0x1); |
2781 |
+- RON = !(ram->mr[1] & 0x300) >> 8; |
2782 |
++ RON = !((ram->mr[1] & 0x300) >> 8); |
2783 |
+ break; |
2784 |
+ default: |
2785 |
+ return -ENOSYS; |
2786 |
+diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c |
2787 |
+index 11b28b086a06..7b052879af72 100644 |
2788 |
+--- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c |
2789 |
++++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c |
2790 |
+@@ -88,10 +88,10 @@ nvkm_memx_fini(struct nvkm_memx **pmemx, bool exec) |
2791 |
+ if (exec) { |
2792 |
+ nvkm_pmu_send(pmu, reply, PROC_MEMX, MEMX_MSG_EXEC, |
2793 |
+ memx->base, finish); |
2794 |
++ nvkm_debug(subdev, "Exec took %uns, PMU_IN %08x\n", |
2795 |
++ reply[0], reply[1]); |
2796 |
+ } |
2797 |
+ |
2798 |
+- nvkm_debug(subdev, "Exec took %uns, PMU_IN %08x\n", |
2799 |
+- reply[0], reply[1]); |
2800 |
+ kfree(memx); |
2801 |
+ return 0; |
2802 |
+ } |
2803 |
+diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c |
2804 |
+index ce8b353b5753..ba31c7674fcd 100644 |
2805 |
+--- a/drivers/gpu/drm/radeon/cik.c |
2806 |
++++ b/drivers/gpu/drm/radeon/cik.c |
2807 |
+@@ -7012,8 +7012,8 @@ static int cik_irq_init(struct radeon_device *rdev) |
2808 |
+ } |
2809 |
+ |
2810 |
+ /* setup interrupt control */ |
2811 |
+- /* XXX this should actually be a bus address, not an MC address. same on older asics */ |
2812 |
+- WREG32(INTERRUPT_CNTL2, rdev->ih.gpu_addr >> 8); |
2813 |
++ /* set dummy read address to dummy page address */ |
2814 |
++ WREG32(INTERRUPT_CNTL2, rdev->dummy_page.addr >> 8); |
2815 |
+ interrupt_cntl = RREG32(INTERRUPT_CNTL); |
2816 |
+ /* IH_DUMMY_RD_OVERRIDE=0 - dummy read disabled with msi, enabled without msi |
2817 |
+ * IH_DUMMY_RD_OVERRIDE=1 - dummy read controlled by IH_DUMMY_RD_EN |
2818 |
+diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c |
2819 |
+index e06e2d8feab3..a724bb87cfad 100644 |
2820 |
+--- a/drivers/gpu/drm/radeon/r600.c |
2821 |
++++ b/drivers/gpu/drm/radeon/r600.c |
2822 |
+@@ -3690,8 +3690,8 @@ int r600_irq_init(struct radeon_device *rdev) |
2823 |
+ } |
2824 |
+ |
2825 |
+ /* setup interrupt control */ |
2826 |
+- /* set dummy read address to ring address */ |
2827 |
+- WREG32(INTERRUPT_CNTL2, rdev->ih.gpu_addr >> 8); |
2828 |
++ /* set dummy read address to dummy page address */ |
2829 |
++ WREG32(INTERRUPT_CNTL2, rdev->dummy_page.addr >> 8); |
2830 |
+ interrupt_cntl = RREG32(INTERRUPT_CNTL); |
2831 |
+ /* IH_DUMMY_RD_OVERRIDE=0 - dummy read disabled with msi, enabled without msi |
2832 |
+ * IH_DUMMY_RD_OVERRIDE=1 - dummy read controlled by IH_DUMMY_RD_EN |
2833 |
+diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c |
2834 |
+index 1907c950d76f..1144cafea9ac 100644 |
2835 |
+--- a/drivers/gpu/drm/radeon/si.c |
2836 |
++++ b/drivers/gpu/drm/radeon/si.c |
2837 |
+@@ -5993,8 +5993,8 @@ static int si_irq_init(struct radeon_device *rdev) |
2838 |
+ } |
2839 |
+ |
2840 |
+ /* setup interrupt control */ |
2841 |
+- /* set dummy read address to ring address */ |
2842 |
+- WREG32(INTERRUPT_CNTL2, rdev->ih.gpu_addr >> 8); |
2843 |
++ /* set dummy read address to dummy page address */ |
2844 |
++ WREG32(INTERRUPT_CNTL2, rdev->dummy_page.addr >> 8); |
2845 |
+ interrupt_cntl = RREG32(INTERRUPT_CNTL); |
2846 |
+ /* IH_DUMMY_RD_OVERRIDE=0 - dummy read disabled with msi, enabled without msi |
2847 |
+ * IH_DUMMY_RD_OVERRIDE=1 - dummy read controlled by IH_DUMMY_RD_EN |
2848 |
+diff --git a/drivers/gpu/drm/shmobile/shmob_drm_drv.c b/drivers/gpu/drm/shmobile/shmob_drm_drv.c |
2849 |
+index 592572554eb0..58d8a98c749b 100644 |
2850 |
+--- a/drivers/gpu/drm/shmobile/shmob_drm_drv.c |
2851 |
++++ b/drivers/gpu/drm/shmobile/shmob_drm_drv.c |
2852 |
+@@ -233,8 +233,8 @@ static int shmob_drm_probe(struct platform_device *pdev) |
2853 |
+ |
2854 |
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
2855 |
+ sdev->mmio = devm_ioremap_resource(&pdev->dev, res); |
2856 |
+- if (sdev->mmio == NULL) |
2857 |
+- return -ENOMEM; |
2858 |
++ if (IS_ERR(sdev->mmio)) |
2859 |
++ return PTR_ERR(sdev->mmio); |
2860 |
+ |
2861 |
+ ret = shmob_drm_setup_clocks(sdev, pdata->clk_source); |
2862 |
+ if (ret < 0) |
2863 |
+diff --git a/drivers/gpu/drm/sti/sti_hda.c b/drivers/gpu/drm/sti/sti_hda.c |
2864 |
+index cf65e32b5090..0399bb18d387 100644 |
2865 |
+--- a/drivers/gpu/drm/sti/sti_hda.c |
2866 |
++++ b/drivers/gpu/drm/sti/sti_hda.c |
2867 |
+@@ -721,7 +721,6 @@ static int sti_hda_bind(struct device *dev, struct device *master, void *data) |
2868 |
+ return 0; |
2869 |
+ |
2870 |
+ err_sysfs: |
2871 |
+- drm_bridge_remove(bridge); |
2872 |
+ return -EINVAL; |
2873 |
+ } |
2874 |
+ |
2875 |
+diff --git a/drivers/gpu/drm/sti/sti_hdmi.c b/drivers/gpu/drm/sti/sti_hdmi.c |
2876 |
+index 30f02d2fdd03..bbb195a92e93 100644 |
2877 |
+--- a/drivers/gpu/drm/sti/sti_hdmi.c |
2878 |
++++ b/drivers/gpu/drm/sti/sti_hdmi.c |
2879 |
+@@ -1314,7 +1314,6 @@ static int sti_hdmi_bind(struct device *dev, struct device *master, void *data) |
2880 |
+ return 0; |
2881 |
+ |
2882 |
+ err_sysfs: |
2883 |
+- drm_bridge_remove(bridge); |
2884 |
+ hdmi->drm_connector = NULL; |
2885 |
+ return -EINVAL; |
2886 |
+ } |
2887 |
+diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c b/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c |
2888 |
+index 5cf2527bffc8..d7a8fea94557 100644 |
2889 |
+--- a/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c |
2890 |
++++ b/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c |
2891 |
+@@ -50,7 +50,7 @@ static unsigned long sun4i_tmds_calc_divider(unsigned long rate, |
2892 |
+ (rate - tmp_rate) < (rate - best_rate)) { |
2893 |
+ best_rate = tmp_rate; |
2894 |
+ best_m = m; |
2895 |
+- is_double = d; |
2896 |
++ is_double = (d == 2) ? true : false; |
2897 |
+ } |
2898 |
+ } |
2899 |
+ } |
2900 |
+diff --git a/drivers/gpu/drm/virtio/virtgpu_vq.c b/drivers/gpu/drm/virtio/virtgpu_vq.c |
2901 |
+index 21c2de81f3e3..a3be65e689fd 100644 |
2902 |
+--- a/drivers/gpu/drm/virtio/virtgpu_vq.c |
2903 |
++++ b/drivers/gpu/drm/virtio/virtgpu_vq.c |
2904 |
+@@ -648,11 +648,11 @@ int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev, |
2905 |
+ { |
2906 |
+ struct virtio_gpu_get_capset *cmd_p; |
2907 |
+ struct virtio_gpu_vbuffer *vbuf; |
2908 |
+- int max_size = vgdev->capsets[idx].max_size; |
2909 |
++ int max_size; |
2910 |
+ struct virtio_gpu_drv_cap_cache *cache_ent; |
2911 |
+ void *resp_buf; |
2912 |
+ |
2913 |
+- if (idx > vgdev->num_capsets) |
2914 |
++ if (idx >= vgdev->num_capsets) |
2915 |
+ return -EINVAL; |
2916 |
+ |
2917 |
+ if (version > vgdev->capsets[idx].max_version) |
2918 |
+@@ -662,6 +662,7 @@ int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev, |
2919 |
+ if (!cache_ent) |
2920 |
+ return -ENOMEM; |
2921 |
+ |
2922 |
++ max_size = vgdev->capsets[idx].max_size; |
2923 |
+ cache_ent->caps_cache = kmalloc(max_size, GFP_KERNEL); |
2924 |
+ if (!cache_ent->caps_cache) { |
2925 |
+ kfree(cache_ent); |
2926 |
+diff --git a/drivers/hwmon/lm75.c b/drivers/hwmon/lm75.c |
2927 |
+index 005ffb5ffa92..1737bb5fbaaf 100644 |
2928 |
+--- a/drivers/hwmon/lm75.c |
2929 |
++++ b/drivers/hwmon/lm75.c |
2930 |
+@@ -165,7 +165,7 @@ static int lm75_write(struct device *dev, enum hwmon_sensor_types type, |
2931 |
+ temp = DIV_ROUND_CLOSEST(temp << (resolution - 8), |
2932 |
+ 1000) << (16 - resolution); |
2933 |
+ |
2934 |
+- return regmap_write(data->regmap, reg, temp); |
2935 |
++ return regmap_write(data->regmap, reg, (u16)temp); |
2936 |
+ } |
2937 |
+ |
2938 |
+ static umode_t lm75_is_visible(const void *data, enum hwmon_sensor_types type, |
2939 |
+diff --git a/drivers/hwmon/pmbus/tps53679.c b/drivers/hwmon/pmbus/tps53679.c |
2940 |
+index 85b515cd9df0..2bc352c5357f 100644 |
2941 |
+--- a/drivers/hwmon/pmbus/tps53679.c |
2942 |
++++ b/drivers/hwmon/pmbus/tps53679.c |
2943 |
+@@ -80,7 +80,14 @@ static struct pmbus_driver_info tps53679_info = { |
2944 |
+ static int tps53679_probe(struct i2c_client *client, |
2945 |
+ const struct i2c_device_id *id) |
2946 |
+ { |
2947 |
+- return pmbus_do_probe(client, id, &tps53679_info); |
2948 |
++ struct pmbus_driver_info *info; |
2949 |
++ |
2950 |
++ info = devm_kmemdup(&client->dev, &tps53679_info, sizeof(*info), |
2951 |
++ GFP_KERNEL); |
2952 |
++ if (!info) |
2953 |
++ return -ENOMEM; |
2954 |
++ |
2955 |
++ return pmbus_do_probe(client, id, info); |
2956 |
+ } |
2957 |
+ |
2958 |
+ static const struct i2c_device_id tps53679_id[] = { |
2959 |
+diff --git a/drivers/hwmon/shtc1.c b/drivers/hwmon/shtc1.c |
2960 |
+index decd7df995ab..2a18539591ea 100644 |
2961 |
+--- a/drivers/hwmon/shtc1.c |
2962 |
++++ b/drivers/hwmon/shtc1.c |
2963 |
+@@ -38,7 +38,7 @@ static const unsigned char shtc1_cmd_read_id_reg[] = { 0xef, 0xc8 }; |
2964 |
+ |
2965 |
+ /* constants for reading the ID register */ |
2966 |
+ #define SHTC1_ID 0x07 |
2967 |
+-#define SHTC1_ID_REG_MASK 0x1f |
2968 |
++#define SHTC1_ID_REG_MASK 0x3f |
2969 |
+ |
2970 |
+ /* delays for non-blocking i2c commands, both in us */ |
2971 |
+ #define SHTC1_NONBLOCKING_WAIT_TIME_HPM 14400 |
2972 |
+diff --git a/drivers/hwmon/w83627hf.c b/drivers/hwmon/w83627hf.c |
2973 |
+index 8ac89d0781cc..a575e1cdb81a 100644 |
2974 |
+--- a/drivers/hwmon/w83627hf.c |
2975 |
++++ b/drivers/hwmon/w83627hf.c |
2976 |
+@@ -130,17 +130,23 @@ superio_select(struct w83627hf_sio_data *sio, int ld) |
2977 |
+ outb(ld, sio->sioaddr + 1); |
2978 |
+ } |
2979 |
+ |
2980 |
+-static inline void |
2981 |
++static inline int |
2982 |
+ superio_enter(struct w83627hf_sio_data *sio) |
2983 |
+ { |
2984 |
++ if (!request_muxed_region(sio->sioaddr, 2, DRVNAME)) |
2985 |
++ return -EBUSY; |
2986 |
++ |
2987 |
+ outb(0x87, sio->sioaddr); |
2988 |
+ outb(0x87, sio->sioaddr); |
2989 |
++ |
2990 |
++ return 0; |
2991 |
+ } |
2992 |
+ |
2993 |
+ static inline void |
2994 |
+ superio_exit(struct w83627hf_sio_data *sio) |
2995 |
+ { |
2996 |
+ outb(0xAA, sio->sioaddr); |
2997 |
++ release_region(sio->sioaddr, 2); |
2998 |
+ } |
2999 |
+ |
3000 |
+ #define W627_DEVID 0x52 |
3001 |
+@@ -1278,7 +1284,7 @@ static DEVICE_ATTR_RO(name); |
3002 |
+ static int __init w83627hf_find(int sioaddr, unsigned short *addr, |
3003 |
+ struct w83627hf_sio_data *sio_data) |
3004 |
+ { |
3005 |
+- int err = -ENODEV; |
3006 |
++ int err; |
3007 |
+ u16 val; |
3008 |
+ |
3009 |
+ static __initconst char *const names[] = { |
3010 |
+@@ -1290,7 +1296,11 @@ static int __init w83627hf_find(int sioaddr, unsigned short *addr, |
3011 |
+ }; |
3012 |
+ |
3013 |
+ sio_data->sioaddr = sioaddr; |
3014 |
+- superio_enter(sio_data); |
3015 |
++ err = superio_enter(sio_data); |
3016 |
++ if (err) |
3017 |
++ return err; |
3018 |
++ |
3019 |
++ err = -ENODEV; |
3020 |
+ val = force_id ? force_id : superio_inb(sio_data, DEVID); |
3021 |
+ switch (val) { |
3022 |
+ case W627_DEVID: |
3023 |
+@@ -1644,9 +1654,21 @@ static int w83627thf_read_gpio5(struct platform_device *pdev) |
3024 |
+ struct w83627hf_sio_data *sio_data = dev_get_platdata(&pdev->dev); |
3025 |
+ int res = 0xff, sel; |
3026 |
+ |
3027 |
+- superio_enter(sio_data); |
3028 |
++ if (superio_enter(sio_data)) { |
3029 |
++ /* |
3030 |
++ * Some other driver reserved the address space for itself. |
3031 |
++ * We don't want to fail driver instantiation because of that, |
3032 |
++ * so display a warning and keep going. |
3033 |
++ */ |
3034 |
++ dev_warn(&pdev->dev, |
3035 |
++ "Can not read VID data: Failed to enable SuperIO access\n"); |
3036 |
++ return res; |
3037 |
++ } |
3038 |
++ |
3039 |
+ superio_select(sio_data, W83627HF_LD_GPIO5); |
3040 |
+ |
3041 |
++ res = 0xff; |
3042 |
++ |
3043 |
+ /* Make sure these GPIO pins are enabled */ |
3044 |
+ if (!(superio_inb(sio_data, W83627THF_GPIO5_EN) & (1<<3))) { |
3045 |
+ dev_dbg(&pdev->dev, "GPIO5 disabled, no VID function\n"); |
3046 |
+@@ -1677,7 +1699,17 @@ static int w83687thf_read_vid(struct platform_device *pdev) |
3047 |
+ struct w83627hf_sio_data *sio_data = dev_get_platdata(&pdev->dev); |
3048 |
+ int res = 0xff; |
3049 |
+ |
3050 |
+- superio_enter(sio_data); |
3051 |
++ if (superio_enter(sio_data)) { |
3052 |
++ /* |
3053 |
++ * Some other driver reserved the address space for itself. |
3054 |
++ * We don't want to fail driver instantiation because of that, |
3055 |
++ * so display a warning and keep going. |
3056 |
++ */ |
3057 |
++ dev_warn(&pdev->dev, |
3058 |
++ "Can not read VID data: Failed to enable SuperIO access\n"); |
3059 |
++ return res; |
3060 |
++ } |
3061 |
++ |
3062 |
+ superio_select(sio_data, W83627HF_LD_HWM); |
3063 |
+ |
3064 |
+ /* Make sure these GPIO pins are enabled */ |
3065 |
+diff --git a/drivers/iio/dac/ad5380.c b/drivers/iio/dac/ad5380.c |
3066 |
+index 97d2c5111f43..8bf7fc626a9d 100644 |
3067 |
+--- a/drivers/iio/dac/ad5380.c |
3068 |
++++ b/drivers/iio/dac/ad5380.c |
3069 |
+@@ -221,7 +221,7 @@ static int ad5380_read_raw(struct iio_dev *indio_dev, |
3070 |
+ if (ret) |
3071 |
+ return ret; |
3072 |
+ *val >>= chan->scan_type.shift; |
3073 |
+- val -= (1 << chan->scan_type.realbits) / 2; |
3074 |
++ *val -= (1 << chan->scan_type.realbits) / 2; |
3075 |
+ return IIO_VAL_INT; |
3076 |
+ case IIO_CHAN_INFO_SCALE: |
3077 |
+ *val = 2 * st->vref; |
3078 |
+diff --git a/drivers/infiniband/core/cma.c b/drivers/infiniband/core/cma.c |
3079 |
+index fc4630e4acdd..1614f6f3677c 100644 |
3080 |
+--- a/drivers/infiniband/core/cma.c |
3081 |
++++ b/drivers/infiniband/core/cma.c |
3082 |
+@@ -2789,7 +2789,7 @@ static void addr_handler(int status, struct sockaddr *src_addr, |
3083 |
+ if (status) |
3084 |
+ pr_debug_ratelimited("RDMA CM: ADDR_ERROR: failed to acquire device. status %d\n", |
3085 |
+ status); |
3086 |
+- } else { |
3087 |
++ } else if (status) { |
3088 |
+ pr_debug_ratelimited("RDMA CM: ADDR_ERROR: failed to resolve IP. status %d\n", status); |
3089 |
+ } |
3090 |
+ |
3091 |
+diff --git a/drivers/infiniband/hw/cxgb4/cm.c b/drivers/infiniband/hw/cxgb4/cm.c |
3092 |
+index bb36cdf82a8d..7eb1cc1b1aa0 100644 |
3093 |
+--- a/drivers/infiniband/hw/cxgb4/cm.c |
3094 |
++++ b/drivers/infiniband/hw/cxgb4/cm.c |
3095 |
+@@ -2056,7 +2056,7 @@ static int import_ep(struct c4iw_ep *ep, int iptype, __u8 *peer_ip, |
3096 |
+ } else { |
3097 |
+ pdev = get_real_dev(n->dev); |
3098 |
+ ep->l2t = cxgb4_l2t_get(cdev->rdev.lldi.l2t, |
3099 |
+- n, pdev, 0); |
3100 |
++ n, pdev, rt_tos2priority(tos)); |
3101 |
+ if (!ep->l2t) |
3102 |
+ goto out; |
3103 |
+ ep->mtu = dst_mtu(dst); |
3104 |
+@@ -2147,7 +2147,8 @@ static int c4iw_reconnect(struct c4iw_ep *ep) |
3105 |
+ laddr6->sin6_addr.s6_addr, |
3106 |
+ raddr6->sin6_addr.s6_addr, |
3107 |
+ laddr6->sin6_port, |
3108 |
+- raddr6->sin6_port, 0, |
3109 |
++ raddr6->sin6_port, |
3110 |
++ ep->com.cm_id->tos, |
3111 |
+ raddr6->sin6_scope_id); |
3112 |
+ iptype = 6; |
3113 |
+ ra = (__u8 *)&raddr6->sin6_addr; |
3114 |
+@@ -2923,15 +2924,18 @@ static int terminate(struct c4iw_dev *dev, struct sk_buff *skb) |
3115 |
+ ep = get_ep_from_tid(dev, tid); |
3116 |
+ BUG_ON(!ep); |
3117 |
+ |
3118 |
+- if (ep && ep->com.qp) { |
3119 |
+- pr_warn("TERM received tid %u qpid %u\n", |
3120 |
+- tid, ep->com.qp->wq.sq.qid); |
3121 |
+- attrs.next_state = C4IW_QP_STATE_TERMINATE; |
3122 |
+- c4iw_modify_qp(ep->com.qp->rhp, ep->com.qp, |
3123 |
+- C4IW_QP_ATTR_NEXT_STATE, &attrs, 1); |
3124 |
++ if (ep) { |
3125 |
++ if (ep->com.qp) { |
3126 |
++ pr_warn("TERM received tid %u qpid %u\n", tid, |
3127 |
++ ep->com.qp->wq.sq.qid); |
3128 |
++ attrs.next_state = C4IW_QP_STATE_TERMINATE; |
3129 |
++ c4iw_modify_qp(ep->com.qp->rhp, ep->com.qp, |
3130 |
++ C4IW_QP_ATTR_NEXT_STATE, &attrs, 1); |
3131 |
++ } |
3132 |
++ |
3133 |
++ c4iw_put_ep(&ep->com); |
3134 |
+ } else |
3135 |
+ pr_warn("TERM received tid %u no ep/qp\n", tid); |
3136 |
+- c4iw_put_ep(&ep->com); |
3137 |
+ |
3138 |
+ return 0; |
3139 |
+ } |
3140 |
+@@ -3295,7 +3299,7 @@ int c4iw_connect(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param) |
3141 |
+ laddr6->sin6_addr.s6_addr, |
3142 |
+ raddr6->sin6_addr.s6_addr, |
3143 |
+ laddr6->sin6_port, |
3144 |
+- raddr6->sin6_port, 0, |
3145 |
++ raddr6->sin6_port, cm_id->tos, |
3146 |
+ raddr6->sin6_scope_id); |
3147 |
+ } |
3148 |
+ if (!ep->dst) { |
3149 |
+diff --git a/drivers/infiniband/hw/hfi1/chip.c b/drivers/infiniband/hw/hfi1/chip.c |
3150 |
+index 9f78bb07744c..4a0b7c003477 100644 |
3151 |
+--- a/drivers/infiniband/hw/hfi1/chip.c |
3152 |
++++ b/drivers/infiniband/hw/hfi1/chip.c |
3153 |
+@@ -10552,12 +10552,29 @@ void set_link_down_reason(struct hfi1_pportdata *ppd, u8 lcl_reason, |
3154 |
+ } |
3155 |
+ } |
3156 |
+ |
3157 |
+-/* |
3158 |
+- * Verify if BCT for data VLs is non-zero. |
3159 |
++/** |
3160 |
++ * data_vls_operational() - Verify if data VL BCT credits and MTU |
3161 |
++ * are both set. |
3162 |
++ * @ppd: pointer to hfi1_pportdata structure |
3163 |
++ * |
3164 |
++ * Return: true - Ok, false -otherwise. |
3165 |
+ */ |
3166 |
+ static inline bool data_vls_operational(struct hfi1_pportdata *ppd) |
3167 |
+ { |
3168 |
+- return !!ppd->actual_vls_operational; |
3169 |
++ int i; |
3170 |
++ u64 reg; |
3171 |
++ |
3172 |
++ if (!ppd->actual_vls_operational) |
3173 |
++ return false; |
3174 |
++ |
3175 |
++ for (i = 0; i < ppd->vls_supported; i++) { |
3176 |
++ reg = read_csr(ppd->dd, SEND_CM_CREDIT_VL + (8 * i)); |
3177 |
++ if ((reg && !ppd->dd->vld[i].mtu) || |
3178 |
++ (!reg && ppd->dd->vld[i].mtu)) |
3179 |
++ return false; |
3180 |
++ } |
3181 |
++ |
3182 |
++ return true; |
3183 |
+ } |
3184 |
+ |
3185 |
+ /* |
3186 |
+@@ -10662,7 +10679,8 @@ int set_link_state(struct hfi1_pportdata *ppd, u32 state) |
3187 |
+ |
3188 |
+ if (!data_vls_operational(ppd)) { |
3189 |
+ dd_dev_err(dd, |
3190 |
+- "%s: data VLs not operational\n", __func__); |
3191 |
++ "%s: Invalid data VL credits or mtu\n", |
3192 |
++ __func__); |
3193 |
+ ret = -EINVAL; |
3194 |
+ break; |
3195 |
+ } |
3196 |
+diff --git a/drivers/infiniband/hw/hns/hns_roce_qp.c b/drivers/infiniband/hw/hns/hns_roce_qp.c |
3197 |
+index 3a37d26889df..281e9987ffc8 100644 |
3198 |
+--- a/drivers/infiniband/hw/hns/hns_roce_qp.c |
3199 |
++++ b/drivers/infiniband/hw/hns/hns_roce_qp.c |
3200 |
+@@ -241,7 +241,6 @@ void hns_roce_qp_free(struct hns_roce_dev *hr_dev, struct hns_roce_qp *hr_qp) |
3201 |
+ |
3202 |
+ if ((hr_qp->ibqp.qp_type) != IB_QPT_GSI) { |
3203 |
+ hns_roce_table_put(hr_dev, &qp_table->irrl_table, hr_qp->qpn); |
3204 |
+- hns_roce_table_put(hr_dev, &qp_table->qp_table, hr_qp->qpn); |
3205 |
+ } |
3206 |
+ } |
3207 |
+ |
3208 |
+diff --git a/drivers/infiniband/hw/mlx5/qp.c b/drivers/infiniband/hw/mlx5/qp.c |
3209 |
+index 5a7dcb5afe6e..84c962820aa2 100644 |
3210 |
+--- a/drivers/infiniband/hw/mlx5/qp.c |
3211 |
++++ b/drivers/infiniband/hw/mlx5/qp.c |
3212 |
+@@ -2357,6 +2357,11 @@ static enum mlx5_qp_optpar opt_mask[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE][MLX5_Q |
3213 |
+ [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | |
3214 |
+ MLX5_QP_OPTPAR_Q_KEY | |
3215 |
+ MLX5_QP_OPTPAR_PRI_PORT, |
3216 |
++ [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_RRE | |
3217 |
++ MLX5_QP_OPTPAR_RAE | |
3218 |
++ MLX5_QP_OPTPAR_RWE | |
3219 |
++ MLX5_QP_OPTPAR_PKEY_INDEX | |
3220 |
++ MLX5_QP_OPTPAR_PRI_PORT, |
3221 |
+ }, |
3222 |
+ [MLX5_QP_STATE_RTR] = { |
3223 |
+ [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | |
3224 |
+@@ -2390,6 +2395,12 @@ static enum mlx5_qp_optpar opt_mask[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE][MLX5_Q |
3225 |
+ MLX5_QP_OPTPAR_RWE | |
3226 |
+ MLX5_QP_OPTPAR_PM_STATE, |
3227 |
+ [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, |
3228 |
++ [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | |
3229 |
++ MLX5_QP_OPTPAR_RRE | |
3230 |
++ MLX5_QP_OPTPAR_RAE | |
3231 |
++ MLX5_QP_OPTPAR_RWE | |
3232 |
++ MLX5_QP_OPTPAR_PM_STATE | |
3233 |
++ MLX5_QP_OPTPAR_RNR_TIMEOUT, |
3234 |
+ }, |
3235 |
+ }, |
3236 |
+ [MLX5_QP_STATE_RTS] = { |
3237 |
+@@ -2406,6 +2417,12 @@ static enum mlx5_qp_optpar opt_mask[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE][MLX5_Q |
3238 |
+ [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY | |
3239 |
+ MLX5_QP_OPTPAR_SRQN | |
3240 |
+ MLX5_QP_OPTPAR_CQN_RCV, |
3241 |
++ [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_RRE | |
3242 |
++ MLX5_QP_OPTPAR_RAE | |
3243 |
++ MLX5_QP_OPTPAR_RWE | |
3244 |
++ MLX5_QP_OPTPAR_RNR_TIMEOUT | |
3245 |
++ MLX5_QP_OPTPAR_PM_STATE | |
3246 |
++ MLX5_QP_OPTPAR_ALT_ADDR_PATH, |
3247 |
+ }, |
3248 |
+ }, |
3249 |
+ [MLX5_QP_STATE_SQER] = { |
3250 |
+@@ -2417,6 +2434,10 @@ static enum mlx5_qp_optpar opt_mask[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE][MLX5_Q |
3251 |
+ MLX5_QP_OPTPAR_RWE | |
3252 |
+ MLX5_QP_OPTPAR_RAE | |
3253 |
+ MLX5_QP_OPTPAR_RRE, |
3254 |
++ [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_RNR_TIMEOUT | |
3255 |
++ MLX5_QP_OPTPAR_RWE | |
3256 |
++ MLX5_QP_OPTPAR_RAE | |
3257 |
++ MLX5_QP_OPTPAR_RRE, |
3258 |
+ }, |
3259 |
+ }, |
3260 |
+ }; |
3261 |
+diff --git a/drivers/infiniband/hw/ocrdma/ocrdma_verbs.c b/drivers/infiniband/hw/ocrdma/ocrdma_verbs.c |
3262 |
+index 27d5e8d9f08d..7683d13dad3d 100644 |
3263 |
+--- a/drivers/infiniband/hw/ocrdma/ocrdma_verbs.c |
3264 |
++++ b/drivers/infiniband/hw/ocrdma/ocrdma_verbs.c |
3265 |
+@@ -55,7 +55,7 @@ |
3266 |
+ |
3267 |
+ int ocrdma_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey) |
3268 |
+ { |
3269 |
+- if (index > 1) |
3270 |
++ if (index > 0) |
3271 |
+ return -EINVAL; |
3272 |
+ |
3273 |
+ *pkey = 0xffff; |
3274 |
+diff --git a/drivers/infiniband/hw/qedr/verbs.c b/drivers/infiniband/hw/qedr/verbs.c |
3275 |
+index 656e7c1a4449..6ae72accae3d 100644 |
3276 |
+--- a/drivers/infiniband/hw/qedr/verbs.c |
3277 |
++++ b/drivers/infiniband/hw/qedr/verbs.c |
3278 |
+@@ -63,7 +63,7 @@ static inline int qedr_ib_copy_to_udata(struct ib_udata *udata, void *src, |
3279 |
+ |
3280 |
+ int qedr_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey) |
3281 |
+ { |
3282 |
+- if (index > QEDR_ROCE_PKEY_TABLE_LEN) |
3283 |
++ if (index >= QEDR_ROCE_PKEY_TABLE_LEN) |
3284 |
+ return -EINVAL; |
3285 |
+ |
3286 |
+ *pkey = QEDR_ROCE_PKEY_DEFAULT; |
3287 |
+@@ -178,54 +178,47 @@ int qedr_query_device(struct ib_device *ibdev, |
3288 |
+ return 0; |
3289 |
+ } |
3290 |
+ |
3291 |
+-#define QEDR_SPEED_SDR (1) |
3292 |
+-#define QEDR_SPEED_DDR (2) |
3293 |
+-#define QEDR_SPEED_QDR (4) |
3294 |
+-#define QEDR_SPEED_FDR10 (8) |
3295 |
+-#define QEDR_SPEED_FDR (16) |
3296 |
+-#define QEDR_SPEED_EDR (32) |
3297 |
+- |
3298 |
+ static inline void get_link_speed_and_width(int speed, u8 *ib_speed, |
3299 |
+ u8 *ib_width) |
3300 |
+ { |
3301 |
+ switch (speed) { |
3302 |
+ case 1000: |
3303 |
+- *ib_speed = QEDR_SPEED_SDR; |
3304 |
++ *ib_speed = IB_SPEED_SDR; |
3305 |
+ *ib_width = IB_WIDTH_1X; |
3306 |
+ break; |
3307 |
+ case 10000: |
3308 |
+- *ib_speed = QEDR_SPEED_QDR; |
3309 |
++ *ib_speed = IB_SPEED_QDR; |
3310 |
+ *ib_width = IB_WIDTH_1X; |
3311 |
+ break; |
3312 |
+ |
3313 |
+ case 20000: |
3314 |
+- *ib_speed = QEDR_SPEED_DDR; |
3315 |
++ *ib_speed = IB_SPEED_DDR; |
3316 |
+ *ib_width = IB_WIDTH_4X; |
3317 |
+ break; |
3318 |
+ |
3319 |
+ case 25000: |
3320 |
+- *ib_speed = QEDR_SPEED_EDR; |
3321 |
++ *ib_speed = IB_SPEED_EDR; |
3322 |
+ *ib_width = IB_WIDTH_1X; |
3323 |
+ break; |
3324 |
+ |
3325 |
+ case 40000: |
3326 |
+- *ib_speed = QEDR_SPEED_QDR; |
3327 |
++ *ib_speed = IB_SPEED_QDR; |
3328 |
+ *ib_width = IB_WIDTH_4X; |
3329 |
+ break; |
3330 |
+ |
3331 |
+ case 50000: |
3332 |
+- *ib_speed = QEDR_SPEED_QDR; |
3333 |
+- *ib_width = IB_WIDTH_4X; |
3334 |
++ *ib_speed = IB_SPEED_HDR; |
3335 |
++ *ib_width = IB_WIDTH_1X; |
3336 |
+ break; |
3337 |
+ |
3338 |
+ case 100000: |
3339 |
+- *ib_speed = QEDR_SPEED_EDR; |
3340 |
++ *ib_speed = IB_SPEED_EDR; |
3341 |
+ *ib_width = IB_WIDTH_4X; |
3342 |
+ break; |
3343 |
+ |
3344 |
+ default: |
3345 |
+ /* Unsupported */ |
3346 |
+- *ib_speed = QEDR_SPEED_SDR; |
3347 |
++ *ib_speed = IB_SPEED_SDR; |
3348 |
+ *ib_width = IB_WIDTH_1X; |
3349 |
+ } |
3350 |
+ } |
3351 |
+diff --git a/drivers/infiniband/hw/usnic/usnic_ib_verbs.c b/drivers/infiniband/hw/usnic/usnic_ib_verbs.c |
3352 |
+index fdfa25059723..2602c7375d58 100644 |
3353 |
+--- a/drivers/infiniband/hw/usnic/usnic_ib_verbs.c |
3354 |
++++ b/drivers/infiniband/hw/usnic/usnic_ib_verbs.c |
3355 |
+@@ -423,7 +423,7 @@ struct net_device *usnic_get_netdev(struct ib_device *device, u8 port_num) |
3356 |
+ int usnic_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, |
3357 |
+ u16 *pkey) |
3358 |
+ { |
3359 |
+- if (index > 1) |
3360 |
++ if (index > 0) |
3361 |
+ return -EINVAL; |
3362 |
+ |
3363 |
+ *pkey = 0xffff; |
3364 |
+diff --git a/drivers/infiniband/sw/rxe/rxe_cq.c b/drivers/infiniband/sw/rxe/rxe_cq.c |
3365 |
+index c4aabf78dc90..f6e036ded046 100644 |
3366 |
+--- a/drivers/infiniband/sw/rxe/rxe_cq.c |
3367 |
++++ b/drivers/infiniband/sw/rxe/rxe_cq.c |
3368 |
+@@ -30,7 +30,7 @@ |
3369 |
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
3370 |
+ * SOFTWARE. |
3371 |
+ */ |
3372 |
+- |
3373 |
++#include <linux/vmalloc.h> |
3374 |
+ #include "rxe.h" |
3375 |
+ #include "rxe_loc.h" |
3376 |
+ #include "rxe_queue.h" |
3377 |
+@@ -97,7 +97,7 @@ int rxe_cq_from_init(struct rxe_dev *rxe, struct rxe_cq *cq, int cqe, |
3378 |
+ err = do_mmap_info(rxe, udata, false, context, cq->queue->buf, |
3379 |
+ cq->queue->buf_size, &cq->queue->ip); |
3380 |
+ if (err) { |
3381 |
+- kvfree(cq->queue->buf); |
3382 |
++ vfree(cq->queue->buf); |
3383 |
+ kfree(cq->queue); |
3384 |
+ return err; |
3385 |
+ } |
3386 |
+diff --git a/drivers/infiniband/sw/rxe/rxe_pool.c b/drivers/infiniband/sw/rxe/rxe_pool.c |
3387 |
+index b4a8acc7bb7d..0e2425f28233 100644 |
3388 |
+--- a/drivers/infiniband/sw/rxe/rxe_pool.c |
3389 |
++++ b/drivers/infiniband/sw/rxe/rxe_pool.c |
3390 |
+@@ -112,6 +112,18 @@ static inline struct kmem_cache *pool_cache(struct rxe_pool *pool) |
3391 |
+ return rxe_type_info[pool->type].cache; |
3392 |
+ } |
3393 |
+ |
3394 |
++static void rxe_cache_clean(size_t cnt) |
3395 |
++{ |
3396 |
++ int i; |
3397 |
++ struct rxe_type_info *type; |
3398 |
++ |
3399 |
++ for (i = 0; i < cnt; i++) { |
3400 |
++ type = &rxe_type_info[i]; |
3401 |
++ kmem_cache_destroy(type->cache); |
3402 |
++ type->cache = NULL; |
3403 |
++ } |
3404 |
++} |
3405 |
++ |
3406 |
+ int rxe_cache_init(void) |
3407 |
+ { |
3408 |
+ int err; |
3409 |
+@@ -136,24 +148,14 @@ int rxe_cache_init(void) |
3410 |
+ return 0; |
3411 |
+ |
3412 |
+ err1: |
3413 |
+- while (--i >= 0) { |
3414 |
+- kmem_cache_destroy(type->cache); |
3415 |
+- type->cache = NULL; |
3416 |
+- } |
3417 |
++ rxe_cache_clean(i); |
3418 |
+ |
3419 |
+ return err; |
3420 |
+ } |
3421 |
+ |
3422 |
+ void rxe_cache_exit(void) |
3423 |
+ { |
3424 |
+- int i; |
3425 |
+- struct rxe_type_info *type; |
3426 |
+- |
3427 |
+- for (i = 0; i < RXE_NUM_TYPES; i++) { |
3428 |
+- type = &rxe_type_info[i]; |
3429 |
+- kmem_cache_destroy(type->cache); |
3430 |
+- type->cache = NULL; |
3431 |
+- } |
3432 |
++ rxe_cache_clean(RXE_NUM_TYPES); |
3433 |
+ } |
3434 |
+ |
3435 |
+ static int rxe_pool_init_index(struct rxe_pool *pool, u32 max, u32 min) |
3436 |
+diff --git a/drivers/infiniband/sw/rxe/rxe_qp.c b/drivers/infiniband/sw/rxe/rxe_qp.c |
3437 |
+index aeea994b04c4..25055a68a2c0 100644 |
3438 |
+--- a/drivers/infiniband/sw/rxe/rxe_qp.c |
3439 |
++++ b/drivers/infiniband/sw/rxe/rxe_qp.c |
3440 |
+@@ -34,6 +34,7 @@ |
3441 |
+ #include <linux/skbuff.h> |
3442 |
+ #include <linux/delay.h> |
3443 |
+ #include <linux/sched.h> |
3444 |
++#include <linux/vmalloc.h> |
3445 |
+ |
3446 |
+ #include "rxe.h" |
3447 |
+ #include "rxe_loc.h" |
3448 |
+@@ -255,7 +256,7 @@ static int rxe_qp_init_req(struct rxe_dev *rxe, struct rxe_qp *qp, |
3449 |
+ qp->sq.queue->buf_size, &qp->sq.queue->ip); |
3450 |
+ |
3451 |
+ if (err) { |
3452 |
+- kvfree(qp->sq.queue->buf); |
3453 |
++ vfree(qp->sq.queue->buf); |
3454 |
+ kfree(qp->sq.queue); |
3455 |
+ return err; |
3456 |
+ } |
3457 |
+@@ -308,7 +309,7 @@ static int rxe_qp_init_resp(struct rxe_dev *rxe, struct rxe_qp *qp, |
3458 |
+ qp->rq.queue->buf_size, |
3459 |
+ &qp->rq.queue->ip); |
3460 |
+ if (err) { |
3461 |
+- kvfree(qp->rq.queue->buf); |
3462 |
++ vfree(qp->rq.queue->buf); |
3463 |
+ kfree(qp->rq.queue); |
3464 |
+ return err; |
3465 |
+ } |
3466 |
+diff --git a/drivers/infiniband/ulp/iser/iscsi_iser.h b/drivers/infiniband/ulp/iser/iscsi_iser.h |
3467 |
+index c1ae4aeae2f9..46dfc6ae9d1c 100644 |
3468 |
+--- a/drivers/infiniband/ulp/iser/iscsi_iser.h |
3469 |
++++ b/drivers/infiniband/ulp/iser/iscsi_iser.h |
3470 |
+@@ -197,7 +197,7 @@ struct iser_data_buf { |
3471 |
+ struct scatterlist *sg; |
3472 |
+ int size; |
3473 |
+ unsigned long data_len; |
3474 |
+- unsigned int dma_nents; |
3475 |
++ int dma_nents; |
3476 |
+ }; |
3477 |
+ |
3478 |
+ /* fwd declarations */ |
3479 |
+diff --git a/drivers/infiniband/ulp/iser/iser_memory.c b/drivers/infiniband/ulp/iser/iser_memory.c |
3480 |
+index 322209d5ff58..19883169e7b7 100644 |
3481 |
+--- a/drivers/infiniband/ulp/iser/iser_memory.c |
3482 |
++++ b/drivers/infiniband/ulp/iser/iser_memory.c |
3483 |
+@@ -240,8 +240,8 @@ int iser_fast_reg_fmr(struct iscsi_iser_task *iser_task, |
3484 |
+ page_vec->npages = 0; |
3485 |
+ page_vec->fake_mr.page_size = SIZE_4K; |
3486 |
+ plen = ib_sg_to_pages(&page_vec->fake_mr, mem->sg, |
3487 |
+- mem->size, NULL, iser_set_page); |
3488 |
+- if (unlikely(plen < mem->size)) { |
3489 |
++ mem->dma_nents, NULL, iser_set_page); |
3490 |
++ if (unlikely(plen < mem->dma_nents)) { |
3491 |
+ iser_err("page vec too short to hold this SG\n"); |
3492 |
+ iser_data_buf_dump(mem, device->ib_device); |
3493 |
+ iser_dump_page_vec(page_vec); |
3494 |
+@@ -450,10 +450,10 @@ static int iser_fast_reg_mr(struct iscsi_iser_task *iser_task, |
3495 |
+ |
3496 |
+ ib_update_fast_reg_key(mr, ib_inc_rkey(mr->rkey)); |
3497 |
+ |
3498 |
+- n = ib_map_mr_sg(mr, mem->sg, mem->size, NULL, SIZE_4K); |
3499 |
+- if (unlikely(n != mem->size)) { |
3500 |
++ n = ib_map_mr_sg(mr, mem->sg, mem->dma_nents, NULL, SIZE_4K); |
3501 |
++ if (unlikely(n != mem->dma_nents)) { |
3502 |
+ iser_err("failed to map sg (%d/%d)\n", |
3503 |
+- n, mem->size); |
3504 |
++ n, mem->dma_nents); |
3505 |
+ return n < 0 ? n : -EINVAL; |
3506 |
+ } |
3507 |
+ |
3508 |
+diff --git a/drivers/input/keyboard/nomadik-ske-keypad.c b/drivers/input/keyboard/nomadik-ske-keypad.c |
3509 |
+index 8567ee47761e..ae3b04557074 100644 |
3510 |
+--- a/drivers/input/keyboard/nomadik-ske-keypad.c |
3511 |
++++ b/drivers/input/keyboard/nomadik-ske-keypad.c |
3512 |
+@@ -100,7 +100,7 @@ static int __init ske_keypad_chip_init(struct ske_keypad *keypad) |
3513 |
+ while ((readl(keypad->reg_base + SKE_RIS) != 0x00000000) && timeout--) |
3514 |
+ cpu_relax(); |
3515 |
+ |
3516 |
+- if (!timeout) |
3517 |
++ if (timeout == -1) |
3518 |
+ return -EINVAL; |
3519 |
+ |
3520 |
+ /* |
3521 |
+diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c |
3522 |
+index d09c24825734..778f167be2d3 100644 |
3523 |
+--- a/drivers/iommu/amd_iommu.c |
3524 |
++++ b/drivers/iommu/amd_iommu.c |
3525 |
+@@ -2160,6 +2160,8 @@ skip_ats_check: |
3526 |
+ */ |
3527 |
+ domain_flush_tlb_pde(domain); |
3528 |
+ |
3529 |
++ domain_flush_complete(domain); |
3530 |
++ |
3531 |
+ return ret; |
3532 |
+ } |
3533 |
+ |
3534 |
+diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c |
3535 |
+index 6a3cf4d0bd5e..4d2920988d60 100644 |
3536 |
+--- a/drivers/iommu/amd_iommu_init.c |
3537 |
++++ b/drivers/iommu/amd_iommu_init.c |
3538 |
+@@ -420,6 +420,9 @@ static void iommu_enable(struct amd_iommu *iommu) |
3539 |
+ |
3540 |
+ static void iommu_disable(struct amd_iommu *iommu) |
3541 |
+ { |
3542 |
++ if (!iommu->mmio_base) |
3543 |
++ return; |
3544 |
++ |
3545 |
+ /* Disable command buffer */ |
3546 |
+ iommu_feature_disable(iommu, CONTROL_CMDBUF_EN); |
3547 |
+ |
3548 |
+diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c |
3549 |
+index 523d0889c2a4..b48666849dbe 100644 |
3550 |
+--- a/drivers/iommu/intel-iommu.c |
3551 |
++++ b/drivers/iommu/intel-iommu.c |
3552 |
+@@ -442,7 +442,6 @@ struct dmar_rmrr_unit { |
3553 |
+ u64 end_address; /* reserved end address */ |
3554 |
+ struct dmar_dev_scope *devices; /* target devices */ |
3555 |
+ int devices_cnt; /* target device count */ |
3556 |
+- struct iommu_resv_region *resv; /* reserved region handle */ |
3557 |
+ }; |
3558 |
+ |
3559 |
+ struct dmar_atsr_unit { |
3560 |
+@@ -3361,9 +3360,12 @@ static int __init init_dmars(void) |
3561 |
+ iommu_identity_mapping |= IDENTMAP_ALL; |
3562 |
+ |
3563 |
+ #ifdef CONFIG_INTEL_IOMMU_BROKEN_GFX_WA |
3564 |
+- iommu_identity_mapping |= IDENTMAP_GFX; |
3565 |
++ dmar_map_gfx = 0; |
3566 |
+ #endif |
3567 |
+ |
3568 |
++ if (!dmar_map_gfx) |
3569 |
++ iommu_identity_mapping |= IDENTMAP_GFX; |
3570 |
++ |
3571 |
+ check_tylersburg_isoch(); |
3572 |
+ |
3573 |
+ if (iommu_identity_mapping) { |
3574 |
+@@ -4168,7 +4170,6 @@ static inline void init_iommu_pm_ops(void) {} |
3575 |
+ int __init dmar_parse_one_rmrr(struct acpi_dmar_header *header, void *arg) |
3576 |
+ { |
3577 |
+ struct acpi_dmar_reserved_memory *rmrr; |
3578 |
+- int prot = DMA_PTE_READ|DMA_PTE_WRITE; |
3579 |
+ struct dmar_rmrr_unit *rmrru; |
3580 |
+ size_t length; |
3581 |
+ |
3582 |
+@@ -4182,22 +4183,16 @@ int __init dmar_parse_one_rmrr(struct acpi_dmar_header *header, void *arg) |
3583 |
+ rmrru->end_address = rmrr->end_address; |
3584 |
+ |
3585 |
+ length = rmrr->end_address - rmrr->base_address + 1; |
3586 |
+- rmrru->resv = iommu_alloc_resv_region(rmrr->base_address, length, prot, |
3587 |
+- IOMMU_RESV_DIRECT); |
3588 |
+- if (!rmrru->resv) |
3589 |
+- goto free_rmrru; |
3590 |
+ |
3591 |
+ rmrru->devices = dmar_alloc_dev_scope((void *)(rmrr + 1), |
3592 |
+ ((void *)rmrr) + rmrr->header.length, |
3593 |
+ &rmrru->devices_cnt); |
3594 |
+ if (rmrru->devices_cnt && rmrru->devices == NULL) |
3595 |
+- goto free_all; |
3596 |
++ goto free_rmrru; |
3597 |
+ |
3598 |
+ list_add(&rmrru->list, &dmar_rmrr_units); |
3599 |
+ |
3600 |
+ return 0; |
3601 |
+-free_all: |
3602 |
+- kfree(rmrru->resv); |
3603 |
+ free_rmrru: |
3604 |
+ kfree(rmrru); |
3605 |
+ out: |
3606 |
+@@ -4415,7 +4410,6 @@ static void intel_iommu_free_dmars(void) |
3607 |
+ list_for_each_entry_safe(rmrru, rmrr_n, &dmar_rmrr_units, list) { |
3608 |
+ list_del(&rmrru->list); |
3609 |
+ dmar_free_dev_scope(&rmrru->devices, &rmrru->devices_cnt); |
3610 |
+- kfree(rmrru->resv); |
3611 |
+ kfree(rmrru); |
3612 |
+ } |
3613 |
+ |
3614 |
+@@ -5183,22 +5177,33 @@ static void intel_iommu_remove_device(struct device *dev) |
3615 |
+ static void intel_iommu_get_resv_regions(struct device *device, |
3616 |
+ struct list_head *head) |
3617 |
+ { |
3618 |
++ int prot = DMA_PTE_READ | DMA_PTE_WRITE; |
3619 |
+ struct iommu_resv_region *reg; |
3620 |
+ struct dmar_rmrr_unit *rmrr; |
3621 |
+ struct device *i_dev; |
3622 |
+ int i; |
3623 |
+ |
3624 |
+- rcu_read_lock(); |
3625 |
++ down_read(&dmar_global_lock); |
3626 |
+ for_each_rmrr_units(rmrr) { |
3627 |
+ for_each_active_dev_scope(rmrr->devices, rmrr->devices_cnt, |
3628 |
+ i, i_dev) { |
3629 |
++ struct iommu_resv_region *resv; |
3630 |
++ size_t length; |
3631 |
++ |
3632 |
+ if (i_dev != device) |
3633 |
+ continue; |
3634 |
+ |
3635 |
+- list_add_tail(&rmrr->resv->list, head); |
3636 |
++ length = rmrr->end_address - rmrr->base_address + 1; |
3637 |
++ resv = iommu_alloc_resv_region(rmrr->base_address, |
3638 |
++ length, prot, |
3639 |
++ IOMMU_RESV_DIRECT); |
3640 |
++ if (!resv) |
3641 |
++ break; |
3642 |
++ |
3643 |
++ list_add_tail(&resv->list, head); |
3644 |
+ } |
3645 |
+ } |
3646 |
+- rcu_read_unlock(); |
3647 |
++ up_read(&dmar_global_lock); |
3648 |
+ |
3649 |
+ reg = iommu_alloc_resv_region(IOAPIC_RANGE_START, |
3650 |
+ IOAPIC_RANGE_END - IOAPIC_RANGE_START + 1, |
3651 |
+@@ -5213,10 +5218,8 @@ static void intel_iommu_put_resv_regions(struct device *dev, |
3652 |
+ { |
3653 |
+ struct iommu_resv_region *entry, *next; |
3654 |
+ |
3655 |
+- list_for_each_entry_safe(entry, next, head, list) { |
3656 |
+- if (entry->type == IOMMU_RESV_MSI) |
3657 |
+- kfree(entry); |
3658 |
+- } |
3659 |
++ list_for_each_entry_safe(entry, next, head, list) |
3660 |
++ kfree(entry); |
3661 |
+ } |
3662 |
+ |
3663 |
+ #ifdef CONFIG_INTEL_IOMMU_SVM |
3664 |
+diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c |
3665 |
+index 4b761678a18b..2c48a9d6d91e 100644 |
3666 |
+--- a/drivers/iommu/iommu.c |
3667 |
++++ b/drivers/iommu/iommu.c |
3668 |
+@@ -1856,9 +1856,9 @@ int iommu_request_dm_for_dev(struct device *dev) |
3669 |
+ int ret; |
3670 |
+ |
3671 |
+ /* Device must already be in a group before calling this function */ |
3672 |
+- group = iommu_group_get_for_dev(dev); |
3673 |
+- if (IS_ERR(group)) |
3674 |
+- return PTR_ERR(group); |
3675 |
++ group = iommu_group_get(dev); |
3676 |
++ if (!group) |
3677 |
++ return -EINVAL; |
3678 |
+ |
3679 |
+ mutex_lock(&group->mutex); |
3680 |
+ |
3681 |
+diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c |
3682 |
+index c30f62700431..0f99e95a1a73 100644 |
3683 |
+--- a/drivers/iommu/mtk_iommu.c |
3684 |
++++ b/drivers/iommu/mtk_iommu.c |
3685 |
+@@ -115,6 +115,30 @@ struct mtk_iommu_domain { |
3686 |
+ |
3687 |
+ static struct iommu_ops mtk_iommu_ops; |
3688 |
+ |
3689 |
++/* |
3690 |
++ * In M4U 4GB mode, the physical address is remapped as below: |
3691 |
++ * |
3692 |
++ * CPU Physical address: |
3693 |
++ * ==================== |
3694 |
++ * |
3695 |
++ * 0 1G 2G 3G 4G 5G |
3696 |
++ * |---A---|---B---|---C---|---D---|---E---| |
3697 |
++ * +--I/O--+------------Memory-------------+ |
3698 |
++ * |
3699 |
++ * IOMMU output physical address: |
3700 |
++ * ============================= |
3701 |
++ * |
3702 |
++ * 4G 5G 6G 7G 8G |
3703 |
++ * |---E---|---B---|---C---|---D---| |
3704 |
++ * +------------Memory-------------+ |
3705 |
++ * |
3706 |
++ * The Region 'A'(I/O) can NOT be mapped by M4U; For Region 'B'/'C'/'D', the |
3707 |
++ * bit32 of the CPU physical address always is needed to set, and for Region |
3708 |
++ * 'E', the CPU physical address keep as is. |
3709 |
++ * Additionally, The iommu consumers always use the CPU phyiscal address. |
3710 |
++ */ |
3711 |
++#define MTK_IOMMU_4GB_MODE_REMAP_BASE 0x40000000 |
3712 |
++ |
3713 |
+ static LIST_HEAD(m4ulist); /* List all the M4U HWs */ |
3714 |
+ |
3715 |
+ #define for_each_m4u(data) list_for_each_entry(data, &m4ulist, list) |
3716 |
+@@ -404,7 +428,7 @@ static phys_addr_t mtk_iommu_iova_to_phys(struct iommu_domain *domain, |
3717 |
+ pa = dom->iop->iova_to_phys(dom->iop, iova); |
3718 |
+ spin_unlock_irqrestore(&dom->pgtlock, flags); |
3719 |
+ |
3720 |
+- if (data->enable_4GB) |
3721 |
++ if (data->enable_4GB && pa < MTK_IOMMU_4GB_MODE_REMAP_BASE) |
3722 |
+ pa |= BIT_ULL(32); |
3723 |
+ |
3724 |
+ return pa; |
3725 |
+diff --git a/drivers/lightnvm/pblk-rb.c b/drivers/lightnvm/pblk-rb.c |
3726 |
+index c0dd17a82170..73de2deaba67 100644 |
3727 |
+--- a/drivers/lightnvm/pblk-rb.c |
3728 |
++++ b/drivers/lightnvm/pblk-rb.c |
3729 |
+@@ -825,8 +825,8 @@ int pblk_rb_tear_down_check(struct pblk_rb *rb) |
3730 |
+ } |
3731 |
+ |
3732 |
+ out: |
3733 |
+- spin_unlock(&rb->w_lock); |
3734 |
+ spin_unlock_irq(&rb->s_lock); |
3735 |
++ spin_unlock(&rb->w_lock); |
3736 |
+ |
3737 |
+ return ret; |
3738 |
+ } |
3739 |
+diff --git a/drivers/media/i2c/ov2659.c b/drivers/media/i2c/ov2659.c |
3740 |
+index 44b0584eb8a6..e7768ed1ff9c 100644 |
3741 |
+--- a/drivers/media/i2c/ov2659.c |
3742 |
++++ b/drivers/media/i2c/ov2659.c |
3743 |
+@@ -1136,7 +1136,7 @@ static int ov2659_set_fmt(struct v4l2_subdev *sd, |
3744 |
+ mf = v4l2_subdev_get_try_format(sd, cfg, fmt->pad); |
3745 |
+ *mf = fmt->format; |
3746 |
+ #else |
3747 |
+- return -ENOTTY; |
3748 |
++ ret = -ENOTTY; |
3749 |
+ #endif |
3750 |
+ } else { |
3751 |
+ s64 val; |
3752 |
+diff --git a/drivers/media/pci/cx18/cx18-fileops.c b/drivers/media/pci/cx18/cx18-fileops.c |
3753 |
+index 98467b2089fa..099d59b992c1 100644 |
3754 |
+--- a/drivers/media/pci/cx18/cx18-fileops.c |
3755 |
++++ b/drivers/media/pci/cx18/cx18-fileops.c |
3756 |
+@@ -484,7 +484,7 @@ static ssize_t cx18_read_pos(struct cx18_stream *s, char __user *ubuf, |
3757 |
+ |
3758 |
+ CX18_DEBUG_HI_FILE("read %zd from %s, got %zd\n", count, s->name, rc); |
3759 |
+ if (rc > 0) |
3760 |
+- pos += rc; |
3761 |
++ *pos += rc; |
3762 |
+ return rc; |
3763 |
+ } |
3764 |
+ |
3765 |
+diff --git a/drivers/media/pci/cx23885/cx23885-dvb.c b/drivers/media/pci/cx23885/cx23885-dvb.c |
3766 |
+index e795ddeb7fe2..60f122edaefb 100644 |
3767 |
+--- a/drivers/media/pci/cx23885/cx23885-dvb.c |
3768 |
++++ b/drivers/media/pci/cx23885/cx23885-dvb.c |
3769 |
+@@ -1460,8 +1460,9 @@ static int dvb_register(struct cx23885_tsport *port) |
3770 |
+ if (fe0->dvb.frontend != NULL) { |
3771 |
+ struct i2c_adapter *tun_i2c; |
3772 |
+ |
3773 |
+- fe0->dvb.frontend->sec_priv = kmalloc(sizeof(dib7000p_ops), GFP_KERNEL); |
3774 |
+- memcpy(fe0->dvb.frontend->sec_priv, &dib7000p_ops, sizeof(dib7000p_ops)); |
3775 |
++ fe0->dvb.frontend->sec_priv = kmemdup(&dib7000p_ops, sizeof(dib7000p_ops), GFP_KERNEL); |
3776 |
++ if (!fe0->dvb.frontend->sec_priv) |
3777 |
++ return -ENOMEM; |
3778 |
+ tun_i2c = dib7000p_ops.get_i2c_master(fe0->dvb.frontend, DIBX000_I2C_INTERFACE_TUNER, 1); |
3779 |
+ if (!dvb_attach(dib0070_attach, fe0->dvb.frontend, tun_i2c, &dib7070p_dib0070_config)) |
3780 |
+ return -ENODEV; |
3781 |
+diff --git a/drivers/media/pci/ivtv/ivtv-fileops.c b/drivers/media/pci/ivtv/ivtv-fileops.c |
3782 |
+index c9bd018e53de..e2b19c3eaa87 100644 |
3783 |
+--- a/drivers/media/pci/ivtv/ivtv-fileops.c |
3784 |
++++ b/drivers/media/pci/ivtv/ivtv-fileops.c |
3785 |
+@@ -420,7 +420,7 @@ static ssize_t ivtv_read_pos(struct ivtv_stream *s, char __user *ubuf, size_t co |
3786 |
+ |
3787 |
+ IVTV_DEBUG_HI_FILE("read %zd from %s, got %zd\n", count, s->name, rc); |
3788 |
+ if (rc > 0) |
3789 |
+- pos += rc; |
3790 |
++ *pos += rc; |
3791 |
+ return rc; |
3792 |
+ } |
3793 |
+ |
3794 |
+diff --git a/drivers/media/pci/tw5864/tw5864-video.c b/drivers/media/pci/tw5864/tw5864-video.c |
3795 |
+index e7bd2b8484e3..ee1230440b39 100644 |
3796 |
+--- a/drivers/media/pci/tw5864/tw5864-video.c |
3797 |
++++ b/drivers/media/pci/tw5864/tw5864-video.c |
3798 |
+@@ -1395,13 +1395,13 @@ static void tw5864_handle_frame(struct tw5864_h264_frame *frame) |
3799 |
+ input->vb = NULL; |
3800 |
+ spin_unlock_irqrestore(&input->slock, flags); |
3801 |
+ |
3802 |
+- v4l2_buf = to_vb2_v4l2_buffer(&vb->vb.vb2_buf); |
3803 |
+- |
3804 |
+ if (!vb) { /* Gone because of disabling */ |
3805 |
+ dev_dbg(&dev->pci->dev, "vb is empty, dropping frame\n"); |
3806 |
+ return; |
3807 |
+ } |
3808 |
+ |
3809 |
++ v4l2_buf = to_vb2_v4l2_buffer(&vb->vb.vb2_buf); |
3810 |
++ |
3811 |
+ /* |
3812 |
+ * Check for space. |
3813 |
+ * Mind the overhead of startcode emulation prevention. |
3814 |
+diff --git a/drivers/media/platform/atmel/atmel-isi.c b/drivers/media/platform/atmel/atmel-isi.c |
3815 |
+index 891fa2505efa..2f962a3418f6 100644 |
3816 |
+--- a/drivers/media/platform/atmel/atmel-isi.c |
3817 |
++++ b/drivers/media/platform/atmel/atmel-isi.c |
3818 |
+@@ -496,7 +496,7 @@ static void stop_streaming(struct vb2_queue *vq) |
3819 |
+ spin_unlock_irq(&isi->irqlock); |
3820 |
+ |
3821 |
+ if (!isi->enable_preview_path) { |
3822 |
+- timeout = jiffies + FRAME_INTERVAL_MILLI_SEC * HZ; |
3823 |
++ timeout = jiffies + (FRAME_INTERVAL_MILLI_SEC * HZ) / 1000; |
3824 |
+ /* Wait until the end of the current frame. */ |
3825 |
+ while ((isi_readl(isi, ISI_STATUS) & ISI_CTRL_CDC) && |
3826 |
+ time_before(jiffies, timeout)) |
3827 |
+diff --git a/drivers/media/platform/davinci/isif.c b/drivers/media/platform/davinci/isif.c |
3828 |
+index 90d0f13283ae..12065ad1ac45 100644 |
3829 |
+--- a/drivers/media/platform/davinci/isif.c |
3830 |
++++ b/drivers/media/platform/davinci/isif.c |
3831 |
+@@ -886,9 +886,7 @@ static int isif_set_hw_if_params(struct vpfe_hw_if_param *params) |
3832 |
+ static int isif_config_ycbcr(void) |
3833 |
+ { |
3834 |
+ struct isif_ycbcr_config *params = &isif_cfg.ycbcr; |
3835 |
+- struct vpss_pg_frame_size frame_size; |
3836 |
+ u32 modeset = 0, ccdcfg = 0; |
3837 |
+- struct vpss_sync_pol sync; |
3838 |
+ |
3839 |
+ dev_dbg(isif_cfg.dev, "\nStarting isif_config_ycbcr..."); |
3840 |
+ |
3841 |
+@@ -976,13 +974,6 @@ static int isif_config_ycbcr(void) |
3842 |
+ /* two fields are interleaved in memory */ |
3843 |
+ regw(0x00000249, SDOFST); |
3844 |
+ |
3845 |
+- /* Setup test pattern if enabled */ |
3846 |
+- if (isif_cfg.bayer.config_params.test_pat_gen) { |
3847 |
+- sync.ccdpg_hdpol = params->hd_pol; |
3848 |
+- sync.ccdpg_vdpol = params->vd_pol; |
3849 |
+- dm365_vpss_set_sync_pol(sync); |
3850 |
+- dm365_vpss_set_pg_frame_size(frame_size); |
3851 |
+- } |
3852 |
+ return 0; |
3853 |
+ } |
3854 |
+ |
3855 |
+diff --git a/drivers/media/platform/davinci/vpbe.c b/drivers/media/platform/davinci/vpbe.c |
3856 |
+index 1d3c13e36904..915af9ca4711 100644 |
3857 |
+--- a/drivers/media/platform/davinci/vpbe.c |
3858 |
++++ b/drivers/media/platform/davinci/vpbe.c |
3859 |
+@@ -126,7 +126,7 @@ static int vpbe_enum_outputs(struct vpbe_device *vpbe_dev, |
3860 |
+ struct v4l2_output *output) |
3861 |
+ { |
3862 |
+ struct vpbe_config *cfg = vpbe_dev->cfg; |
3863 |
+- int temp_index = output->index; |
3864 |
++ unsigned int temp_index = output->index; |
3865 |
+ |
3866 |
+ if (temp_index >= cfg->num_outputs) |
3867 |
+ return -EINVAL; |
3868 |
+diff --git a/drivers/media/platform/omap/omap_vout.c b/drivers/media/platform/omap/omap_vout.c |
3869 |
+index 4d29860d27b4..18604b608ab2 100644 |
3870 |
+--- a/drivers/media/platform/omap/omap_vout.c |
3871 |
++++ b/drivers/media/platform/omap/omap_vout.c |
3872 |
+@@ -1527,23 +1527,20 @@ static int vidioc_dqbuf(struct file *file, void *fh, struct v4l2_buffer *b) |
3873 |
+ unsigned long size; |
3874 |
+ struct videobuf_buffer *vb; |
3875 |
+ |
3876 |
+- vb = q->bufs[b->index]; |
3877 |
+- |
3878 |
+ if (!vout->streaming) |
3879 |
+ return -EINVAL; |
3880 |
+ |
3881 |
+- if (file->f_flags & O_NONBLOCK) |
3882 |
+- /* Call videobuf_dqbuf for non blocking mode */ |
3883 |
+- ret = videobuf_dqbuf(q, (struct v4l2_buffer *)b, 1); |
3884 |
+- else |
3885 |
+- /* Call videobuf_dqbuf for blocking mode */ |
3886 |
+- ret = videobuf_dqbuf(q, (struct v4l2_buffer *)b, 0); |
3887 |
++ ret = videobuf_dqbuf(q, b, !!(file->f_flags & O_NONBLOCK)); |
3888 |
++ if (ret) |
3889 |
++ return ret; |
3890 |
++ |
3891 |
++ vb = q->bufs[b->index]; |
3892 |
+ |
3893 |
+ addr = (unsigned long) vout->buf_phy_addr[vb->i]; |
3894 |
+ size = (unsigned long) vb->size; |
3895 |
+ dma_unmap_single(vout->vid_dev->v4l2_dev.dev, addr, |
3896 |
+ size, DMA_TO_DEVICE); |
3897 |
+- return ret; |
3898 |
++ return 0; |
3899 |
+ } |
3900 |
+ |
3901 |
+ static int vidioc_streamon(struct file *file, void *fh, enum v4l2_buf_type i) |
3902 |
+diff --git a/drivers/media/platform/s5p-jpeg/jpeg-core.c b/drivers/media/platform/s5p-jpeg/jpeg-core.c |
3903 |
+index 4568e68e15fa..85a5e33600c0 100644 |
3904 |
+--- a/drivers/media/platform/s5p-jpeg/jpeg-core.c |
3905 |
++++ b/drivers/media/platform/s5p-jpeg/jpeg-core.c |
3906 |
+@@ -2005,7 +2005,7 @@ static int s5p_jpeg_controls_create(struct s5p_jpeg_ctx *ctx) |
3907 |
+ |
3908 |
+ v4l2_ctrl_new_std(&ctx->ctrl_handler, &s5p_jpeg_ctrl_ops, |
3909 |
+ V4L2_CID_JPEG_RESTART_INTERVAL, |
3910 |
+- 0, 3, 0xffff, 0); |
3911 |
++ 0, 0xffff, 1, 0); |
3912 |
+ if (ctx->jpeg->variant->version == SJPEG_S5P) |
3913 |
+ mask = ~0x06; /* 422, 420 */ |
3914 |
+ } |
3915 |
+diff --git a/drivers/media/platform/vivid/vivid-osd.c b/drivers/media/platform/vivid/vivid-osd.c |
3916 |
+index bdc380b14e0c..a95b7c56569e 100644 |
3917 |
+--- a/drivers/media/platform/vivid/vivid-osd.c |
3918 |
++++ b/drivers/media/platform/vivid/vivid-osd.c |
3919 |
+@@ -167,7 +167,7 @@ static int _vivid_fb_check_var(struct fb_var_screeninfo *var, struct vivid_dev * |
3920 |
+ var->nonstd = 0; |
3921 |
+ |
3922 |
+ var->vmode &= ~FB_VMODE_MASK; |
3923 |
+- var->vmode = FB_VMODE_NONINTERLACED; |
3924 |
++ var->vmode |= FB_VMODE_NONINTERLACED; |
3925 |
+ |
3926 |
+ /* Dummy values */ |
3927 |
+ var->hsync_len = 24; |
3928 |
+diff --git a/drivers/media/radio/wl128x/fmdrv_common.c b/drivers/media/radio/wl128x/fmdrv_common.c |
3929 |
+index 26895ae42fcf..2d20d908e280 100644 |
3930 |
+--- a/drivers/media/radio/wl128x/fmdrv_common.c |
3931 |
++++ b/drivers/media/radio/wl128x/fmdrv_common.c |
3932 |
+@@ -1271,8 +1271,9 @@ static int fm_download_firmware(struct fmdev *fmdev, const u8 *fw_name) |
3933 |
+ |
3934 |
+ switch (action->type) { |
3935 |
+ case ACTION_SEND_COMMAND: /* Send */ |
3936 |
+- if (fmc_send_cmd(fmdev, 0, 0, action->data, |
3937 |
+- action->size, NULL, NULL)) |
3938 |
++ ret = fmc_send_cmd(fmdev, 0, 0, action->data, |
3939 |
++ action->size, NULL, NULL); |
3940 |
++ if (ret) |
3941 |
+ goto rel_fw; |
3942 |
+ |
3943 |
+ cmd_cnt++; |
3944 |
+diff --git a/drivers/mfd/intel-lpss-pci.c b/drivers/mfd/intel-lpss-pci.c |
3945 |
+index 2b7e8eeaa59e..0504761516f7 100644 |
3946 |
+--- a/drivers/mfd/intel-lpss-pci.c |
3947 |
++++ b/drivers/mfd/intel-lpss-pci.c |
3948 |
+@@ -126,6 +126,18 @@ static const struct intel_lpss_platform_info apl_i2c_info = { |
3949 |
+ .properties = apl_i2c_properties, |
3950 |
+ }; |
3951 |
+ |
3952 |
++static struct property_entry glk_i2c_properties[] = { |
3953 |
++ PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 313), |
3954 |
++ PROPERTY_ENTRY_U32("i2c-sda-falling-time-ns", 171), |
3955 |
++ PROPERTY_ENTRY_U32("i2c-scl-falling-time-ns", 290), |
3956 |
++ { }, |
3957 |
++}; |
3958 |
++ |
3959 |
++static const struct intel_lpss_platform_info glk_i2c_info = { |
3960 |
++ .clk_rate = 133000000, |
3961 |
++ .properties = glk_i2c_properties, |
3962 |
++}; |
3963 |
++ |
3964 |
+ static const struct intel_lpss_platform_info cnl_i2c_info = { |
3965 |
+ .clk_rate = 216000000, |
3966 |
+ .properties = spt_i2c_properties, |
3967 |
+@@ -165,14 +177,14 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { |
3968 |
+ { PCI_VDEVICE(INTEL, 0x1ac6), (kernel_ulong_t)&bxt_info }, |
3969 |
+ { PCI_VDEVICE(INTEL, 0x1aee), (kernel_ulong_t)&bxt_uart_info }, |
3970 |
+ /* GLK */ |
3971 |
+- { PCI_VDEVICE(INTEL, 0x31ac), (kernel_ulong_t)&bxt_i2c_info }, |
3972 |
+- { PCI_VDEVICE(INTEL, 0x31ae), (kernel_ulong_t)&bxt_i2c_info }, |
3973 |
+- { PCI_VDEVICE(INTEL, 0x31b0), (kernel_ulong_t)&bxt_i2c_info }, |
3974 |
+- { PCI_VDEVICE(INTEL, 0x31b2), (kernel_ulong_t)&bxt_i2c_info }, |
3975 |
+- { PCI_VDEVICE(INTEL, 0x31b4), (kernel_ulong_t)&bxt_i2c_info }, |
3976 |
+- { PCI_VDEVICE(INTEL, 0x31b6), (kernel_ulong_t)&bxt_i2c_info }, |
3977 |
+- { PCI_VDEVICE(INTEL, 0x31b8), (kernel_ulong_t)&bxt_i2c_info }, |
3978 |
+- { PCI_VDEVICE(INTEL, 0x31ba), (kernel_ulong_t)&bxt_i2c_info }, |
3979 |
++ { PCI_VDEVICE(INTEL, 0x31ac), (kernel_ulong_t)&glk_i2c_info }, |
3980 |
++ { PCI_VDEVICE(INTEL, 0x31ae), (kernel_ulong_t)&glk_i2c_info }, |
3981 |
++ { PCI_VDEVICE(INTEL, 0x31b0), (kernel_ulong_t)&glk_i2c_info }, |
3982 |
++ { PCI_VDEVICE(INTEL, 0x31b2), (kernel_ulong_t)&glk_i2c_info }, |
3983 |
++ { PCI_VDEVICE(INTEL, 0x31b4), (kernel_ulong_t)&glk_i2c_info }, |
3984 |
++ { PCI_VDEVICE(INTEL, 0x31b6), (kernel_ulong_t)&glk_i2c_info }, |
3985 |
++ { PCI_VDEVICE(INTEL, 0x31b8), (kernel_ulong_t)&glk_i2c_info }, |
3986 |
++ { PCI_VDEVICE(INTEL, 0x31ba), (kernel_ulong_t)&glk_i2c_info }, |
3987 |
+ { PCI_VDEVICE(INTEL, 0x31bc), (kernel_ulong_t)&bxt_uart_info }, |
3988 |
+ { PCI_VDEVICE(INTEL, 0x31be), (kernel_ulong_t)&bxt_uart_info }, |
3989 |
+ { PCI_VDEVICE(INTEL, 0x31c0), (kernel_ulong_t)&bxt_uart_info }, |
3990 |
+diff --git a/drivers/mfd/intel-lpss.c b/drivers/mfd/intel-lpss.c |
3991 |
+index b5c4f8f974aa..9ed573e232c0 100644 |
3992 |
+--- a/drivers/mfd/intel-lpss.c |
3993 |
++++ b/drivers/mfd/intel-lpss.c |
3994 |
+@@ -541,6 +541,7 @@ module_init(intel_lpss_init); |
3995 |
+ |
3996 |
+ static void __exit intel_lpss_exit(void) |
3997 |
+ { |
3998 |
++ ida_destroy(&intel_lpss_devid_ida); |
3999 |
+ debugfs_remove(intel_lpss_debugfs); |
4000 |
+ } |
4001 |
+ module_exit(intel_lpss_exit); |
4002 |
+diff --git a/drivers/misc/mic/card/mic_x100.c b/drivers/misc/mic/card/mic_x100.c |
4003 |
+index b9f0710ffa6b..4007adc666f3 100644 |
4004 |
+--- a/drivers/misc/mic/card/mic_x100.c |
4005 |
++++ b/drivers/misc/mic/card/mic_x100.c |
4006 |
+@@ -249,6 +249,9 @@ static int __init mic_probe(struct platform_device *pdev) |
4007 |
+ mdrv->dev = &pdev->dev; |
4008 |
+ snprintf(mdrv->name, sizeof(mic_driver_name), mic_driver_name); |
4009 |
+ |
4010 |
++ /* FIXME: use dma_set_mask_and_coherent() and check result */ |
4011 |
++ dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); |
4012 |
++ |
4013 |
+ mdev->mmio.pa = MIC_X100_MMIO_BASE; |
4014 |
+ mdev->mmio.len = MIC_X100_MMIO_LEN; |
4015 |
+ mdev->mmio.va = devm_ioremap(&pdev->dev, MIC_X100_MMIO_BASE, |
4016 |
+@@ -294,18 +297,6 @@ static void mic_platform_shutdown(struct platform_device *pdev) |
4017 |
+ mic_remove(pdev); |
4018 |
+ } |
4019 |
+ |
4020 |
+-static u64 mic_dma_mask = DMA_BIT_MASK(64); |
4021 |
+- |
4022 |
+-static struct platform_device mic_platform_dev = { |
4023 |
+- .name = mic_driver_name, |
4024 |
+- .id = 0, |
4025 |
+- .num_resources = 0, |
4026 |
+- .dev = { |
4027 |
+- .dma_mask = &mic_dma_mask, |
4028 |
+- .coherent_dma_mask = DMA_BIT_MASK(64), |
4029 |
+- }, |
4030 |
+-}; |
4031 |
+- |
4032 |
+ static struct platform_driver __refdata mic_platform_driver = { |
4033 |
+ .probe = mic_probe, |
4034 |
+ .remove = mic_remove, |
4035 |
+@@ -315,6 +306,8 @@ static struct platform_driver __refdata mic_platform_driver = { |
4036 |
+ }, |
4037 |
+ }; |
4038 |
+ |
4039 |
++static struct platform_device *mic_platform_dev; |
4040 |
++ |
4041 |
+ static int __init mic_init(void) |
4042 |
+ { |
4043 |
+ int ret; |
4044 |
+@@ -328,9 +321,12 @@ static int __init mic_init(void) |
4045 |
+ |
4046 |
+ request_module("mic_x100_dma"); |
4047 |
+ mic_init_card_debugfs(); |
4048 |
+- ret = platform_device_register(&mic_platform_dev); |
4049 |
++ |
4050 |
++ mic_platform_dev = platform_device_register_simple(mic_driver_name, |
4051 |
++ 0, NULL, 0); |
4052 |
++ ret = PTR_ERR_OR_ZERO(mic_platform_dev); |
4053 |
+ if (ret) { |
4054 |
+- pr_err("platform_device_register ret %d\n", ret); |
4055 |
++ pr_err("platform_device_register_full ret %d\n", ret); |
4056 |
+ goto cleanup_debugfs; |
4057 |
+ } |
4058 |
+ ret = platform_driver_register(&mic_platform_driver); |
4059 |
+@@ -341,7 +337,7 @@ static int __init mic_init(void) |
4060 |
+ return ret; |
4061 |
+ |
4062 |
+ device_unregister: |
4063 |
+- platform_device_unregister(&mic_platform_dev); |
4064 |
++ platform_device_unregister(mic_platform_dev); |
4065 |
+ cleanup_debugfs: |
4066 |
+ mic_exit_card_debugfs(); |
4067 |
+ done: |
4068 |
+@@ -351,7 +347,7 @@ done: |
4069 |
+ static void __exit mic_exit(void) |
4070 |
+ { |
4071 |
+ platform_driver_unregister(&mic_platform_driver); |
4072 |
+- platform_device_unregister(&mic_platform_dev); |
4073 |
++ platform_device_unregister(mic_platform_dev); |
4074 |
+ mic_exit_card_debugfs(); |
4075 |
+ } |
4076 |
+ |
4077 |
+diff --git a/drivers/misc/sgi-xp/xpc_partition.c b/drivers/misc/sgi-xp/xpc_partition.c |
4078 |
+index 6956f7e7d439..ca5f0102daef 100644 |
4079 |
+--- a/drivers/misc/sgi-xp/xpc_partition.c |
4080 |
++++ b/drivers/misc/sgi-xp/xpc_partition.c |
4081 |
+@@ -70,7 +70,7 @@ xpc_get_rsvd_page_pa(int nasid) |
4082 |
+ unsigned long rp_pa = nasid; /* seed with nasid */ |
4083 |
+ size_t len = 0; |
4084 |
+ size_t buf_len = 0; |
4085 |
+- void *buf = buf; |
4086 |
++ void *buf = NULL; |
4087 |
+ void *buf_base = NULL; |
4088 |
+ enum xp_retval (*get_partition_rsvd_page_pa) |
4089 |
+ (void *, u64 *, unsigned long *, size_t *) = |
4090 |
+diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c |
4091 |
+index ad88deb2e8f3..3740fb0052a4 100644 |
4092 |
+--- a/drivers/mmc/core/host.c |
4093 |
++++ b/drivers/mmc/core/host.c |
4094 |
+@@ -376,8 +376,6 @@ struct mmc_host *mmc_alloc_host(int extra, struct device *dev) |
4095 |
+ |
4096 |
+ if (mmc_gpio_alloc(host)) { |
4097 |
+ put_device(&host->class_dev); |
4098 |
+- ida_simple_remove(&mmc_host_ida, host->index); |
4099 |
+- kfree(host); |
4100 |
+ return NULL; |
4101 |
+ } |
4102 |
+ |
4103 |
+diff --git a/drivers/mmc/core/quirks.h b/drivers/mmc/core/quirks.h |
4104 |
+index 5153577754f0..09897abb79ed 100644 |
4105 |
+--- a/drivers/mmc/core/quirks.h |
4106 |
++++ b/drivers/mmc/core/quirks.h |
4107 |
+@@ -119,7 +119,14 @@ static const struct mmc_fixup mmc_ext_csd_fixups[] = { |
4108 |
+ END_FIXUP |
4109 |
+ }; |
4110 |
+ |
4111 |
++ |
4112 |
+ static const struct mmc_fixup sdio_fixup_methods[] = { |
4113 |
++ SDIO_FIXUP(SDIO_VENDOR_ID_TI_WL1251, SDIO_DEVICE_ID_TI_WL1251, |
4114 |
++ add_quirk, MMC_QUIRK_NONSTD_FUNC_IF), |
4115 |
++ |
4116 |
++ SDIO_FIXUP(SDIO_VENDOR_ID_TI_WL1251, SDIO_DEVICE_ID_TI_WL1251, |
4117 |
++ add_quirk, MMC_QUIRK_DISABLE_CD), |
4118 |
++ |
4119 |
+ SDIO_FIXUP(SDIO_VENDOR_ID_TI, SDIO_DEVICE_ID_TI_WL1271, |
4120 |
+ add_quirk, MMC_QUIRK_NONSTD_FUNC_IF), |
4121 |
+ |
4122 |
+diff --git a/drivers/mmc/host/sdhci-brcmstb.c b/drivers/mmc/host/sdhci-brcmstb.c |
4123 |
+index 552bddc5096c..1cd10356fc14 100644 |
4124 |
+--- a/drivers/mmc/host/sdhci-brcmstb.c |
4125 |
++++ b/drivers/mmc/host/sdhci-brcmstb.c |
4126 |
+@@ -55,7 +55,9 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev) |
4127 |
+ } |
4128 |
+ |
4129 |
+ sdhci_get_of_property(pdev); |
4130 |
+- mmc_of_parse(host->mmc); |
4131 |
++ res = mmc_of_parse(host->mmc); |
4132 |
++ if (res) |
4133 |
++ goto err; |
4134 |
+ |
4135 |
+ /* |
4136 |
+ * Supply the existing CAPS, but clear the UHS modes. This |
4137 |
+diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c |
4138 |
+index 8e49974ffa0e..8ee59b20b47a 100644 |
4139 |
+--- a/drivers/net/dsa/qca8k.c |
4140 |
++++ b/drivers/net/dsa/qca8k.c |
4141 |
+@@ -459,6 +459,18 @@ qca8k_set_pad_ctrl(struct qca8k_priv *priv, int port, int mode) |
4142 |
+ qca8k_write(priv, QCA8K_REG_PORT5_PAD_CTRL, |
4143 |
+ QCA8K_PORT_PAD_RGMII_RX_DELAY_EN); |
4144 |
+ break; |
4145 |
++ case PHY_INTERFACE_MODE_RGMII_ID: |
4146 |
++ /* RGMII_ID needs internal delay. This is enabled through |
4147 |
++ * PORT5_PAD_CTRL for all ports, rather than individual port |
4148 |
++ * registers |
4149 |
++ */ |
4150 |
++ qca8k_write(priv, reg, |
4151 |
++ QCA8K_PORT_PAD_RGMII_EN | |
4152 |
++ QCA8K_PORT_PAD_RGMII_TX_DELAY(QCA8K_MAX_DELAY) | |
4153 |
++ QCA8K_PORT_PAD_RGMII_RX_DELAY(QCA8K_MAX_DELAY)); |
4154 |
++ qca8k_write(priv, QCA8K_REG_PORT5_PAD_CTRL, |
4155 |
++ QCA8K_PORT_PAD_RGMII_RX_DELAY_EN); |
4156 |
++ break; |
4157 |
+ case PHY_INTERFACE_MODE_SGMII: |
4158 |
+ qca8k_write(priv, reg, QCA8K_PORT_PAD_SGMII_EN); |
4159 |
+ break; |
4160 |
+diff --git a/drivers/net/dsa/qca8k.h b/drivers/net/dsa/qca8k.h |
4161 |
+index 613fe5c50236..d146e54c8a6c 100644 |
4162 |
+--- a/drivers/net/dsa/qca8k.h |
4163 |
++++ b/drivers/net/dsa/qca8k.h |
4164 |
+@@ -40,6 +40,7 @@ |
4165 |
+ ((0x8 + (x & 0x3)) << 22) |
4166 |
+ #define QCA8K_PORT_PAD_RGMII_RX_DELAY(x) \ |
4167 |
+ ((0x10 + (x & 0x3)) << 20) |
4168 |
++#define QCA8K_MAX_DELAY 3 |
4169 |
+ #define QCA8K_PORT_PAD_RGMII_RX_DELAY_EN BIT(24) |
4170 |
+ #define QCA8K_PORT_PAD_SGMII_EN BIT(7) |
4171 |
+ #define QCA8K_REG_MODULE_EN 0x030 |
4172 |
+diff --git a/drivers/net/ethernet/amazon/ena/ena_com.c b/drivers/net/ethernet/amazon/ena/ena_com.c |
4173 |
+index 1a4ffc5d3da4..10e6053f6671 100644 |
4174 |
+--- a/drivers/net/ethernet/amazon/ena/ena_com.c |
4175 |
++++ b/drivers/net/ethernet/amazon/ena/ena_com.c |
4176 |
+@@ -2002,7 +2002,7 @@ int ena_com_set_hash_function(struct ena_com_dev *ena_dev) |
4177 |
+ if (unlikely(ret)) |
4178 |
+ return ret; |
4179 |
+ |
4180 |
+- if (get_resp.u.flow_hash_func.supported_func & (1 << rss->hash_func)) { |
4181 |
++ if (!(get_resp.u.flow_hash_func.supported_func & BIT(rss->hash_func))) { |
4182 |
+ pr_err("Func hash %d isn't supported by device, abort\n", |
4183 |
+ rss->hash_func); |
4184 |
+ return -EOPNOTSUPP; |
4185 |
+@@ -2087,6 +2087,7 @@ int ena_com_fill_hash_function(struct ena_com_dev *ena_dev, |
4186 |
+ return -EINVAL; |
4187 |
+ } |
4188 |
+ |
4189 |
++ rss->hash_func = func; |
4190 |
+ rc = ena_com_set_hash_function(ena_dev); |
4191 |
+ |
4192 |
+ /* Restore the old function */ |
4193 |
+diff --git a/drivers/net/ethernet/amazon/ena/ena_ethtool.c b/drivers/net/ethernet/amazon/ena/ena_ethtool.c |
4194 |
+index 967020fb26ee..a2f02c23fe14 100644 |
4195 |
+--- a/drivers/net/ethernet/amazon/ena/ena_ethtool.c |
4196 |
++++ b/drivers/net/ethernet/amazon/ena/ena_ethtool.c |
4197 |
+@@ -694,8 +694,8 @@ static int ena_set_rxfh(struct net_device *netdev, const u32 *indir, |
4198 |
+ if (indir) { |
4199 |
+ for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) { |
4200 |
+ rc = ena_com_indirect_table_fill_entry(ena_dev, |
4201 |
+- ENA_IO_RXQ_IDX(indir[i]), |
4202 |
+- i); |
4203 |
++ i, |
4204 |
++ ENA_IO_RXQ_IDX(indir[i])); |
4205 |
+ if (unlikely(rc)) { |
4206 |
+ netif_err(adapter, drv, netdev, |
4207 |
+ "Cannot fill indirect table (index is too large)\n"); |
4208 |
+diff --git a/drivers/net/ethernet/amazon/ena/ena_netdev.c b/drivers/net/ethernet/amazon/ena/ena_netdev.c |
4209 |
+index d22b138c2b09..518ff393a026 100644 |
4210 |
+--- a/drivers/net/ethernet/amazon/ena/ena_netdev.c |
4211 |
++++ b/drivers/net/ethernet/amazon/ena/ena_netdev.c |
4212 |
+@@ -1796,6 +1796,7 @@ err_setup_rx: |
4213 |
+ err_setup_tx: |
4214 |
+ ena_free_io_irq(adapter); |
4215 |
+ err_req_irq: |
4216 |
++ ena_del_napi(adapter); |
4217 |
+ |
4218 |
+ return rc; |
4219 |
+ } |
4220 |
+diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_vec.c b/drivers/net/ethernet/aquantia/atlantic/aq_vec.c |
4221 |
+index 5fecc9a099ef..bb2894a333f2 100644 |
4222 |
+--- a/drivers/net/ethernet/aquantia/atlantic/aq_vec.c |
4223 |
++++ b/drivers/net/ethernet/aquantia/atlantic/aq_vec.c |
4224 |
+@@ -310,15 +310,13 @@ irqreturn_t aq_vec_isr_legacy(int irq, void *private) |
4225 |
+ { |
4226 |
+ struct aq_vec_s *self = private; |
4227 |
+ u64 irq_mask = 0U; |
4228 |
+- irqreturn_t err = 0; |
4229 |
++ int err; |
4230 |
+ |
4231 |
+- if (!self) { |
4232 |
+- err = -EINVAL; |
4233 |
+- goto err_exit; |
4234 |
+- } |
4235 |
++ if (!self) |
4236 |
++ return IRQ_NONE; |
4237 |
+ err = self->aq_hw_ops->hw_irq_read(self->aq_hw, &irq_mask); |
4238 |
+ if (err < 0) |
4239 |
+- goto err_exit; |
4240 |
++ return IRQ_NONE; |
4241 |
+ |
4242 |
+ if (irq_mask) { |
4243 |
+ self->aq_hw_ops->hw_irq_disable(self->aq_hw, |
4244 |
+@@ -326,11 +324,10 @@ irqreturn_t aq_vec_isr_legacy(int irq, void *private) |
4245 |
+ napi_schedule(&self->napi); |
4246 |
+ } else { |
4247 |
+ self->aq_hw_ops->hw_irq_enable(self->aq_hw, 1U); |
4248 |
+- err = IRQ_NONE; |
4249 |
++ return IRQ_NONE; |
4250 |
+ } |
4251 |
+ |
4252 |
+-err_exit: |
4253 |
+- return err >= 0 ? IRQ_HANDLED : IRQ_NONE; |
4254 |
++ return IRQ_HANDLED; |
4255 |
+ } |
4256 |
+ |
4257 |
+ cpumask_t *aq_vec_get_affinity_mask(struct aq_vec_s *self) |
4258 |
+diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0.c b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0.c |
4259 |
+index b0abd187cead..b83ee74d2839 100644 |
4260 |
+--- a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0.c |
4261 |
++++ b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0.c |
4262 |
+@@ -182,8 +182,8 @@ static int hw_atl_a0_hw_rss_set(struct aq_hw_s *self, |
4263 |
+ u32 i = 0U; |
4264 |
+ u32 num_rss_queues = max(1U, self->aq_nic_cfg->num_rss_queues); |
4265 |
+ int err = 0; |
4266 |
+- u16 bitary[(HW_ATL_A0_RSS_REDIRECTION_MAX * |
4267 |
+- HW_ATL_A0_RSS_REDIRECTION_BITS / 16U)]; |
4268 |
++ u16 bitary[1 + (HW_ATL_A0_RSS_REDIRECTION_MAX * |
4269 |
++ HW_ATL_A0_RSS_REDIRECTION_BITS / 16U)]; |
4270 |
+ |
4271 |
+ memset(bitary, 0, sizeof(bitary)); |
4272 |
+ |
4273 |
+diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c |
4274 |
+index 236325f48ec9..1c1bb074f664 100644 |
4275 |
+--- a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c |
4276 |
++++ b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c |
4277 |
+@@ -183,8 +183,8 @@ static int hw_atl_b0_hw_rss_set(struct aq_hw_s *self, |
4278 |
+ u32 i = 0U; |
4279 |
+ u32 num_rss_queues = max(1U, self->aq_nic_cfg->num_rss_queues); |
4280 |
+ int err = 0; |
4281 |
+- u16 bitary[(HW_ATL_B0_RSS_REDIRECTION_MAX * |
4282 |
+- HW_ATL_B0_RSS_REDIRECTION_BITS / 16U)]; |
4283 |
++ u16 bitary[1 + (HW_ATL_B0_RSS_REDIRECTION_MAX * |
4284 |
++ HW_ATL_B0_RSS_REDIRECTION_BITS / 16U)]; |
4285 |
+ |
4286 |
+ memset(bitary, 0, sizeof(bitary)); |
4287 |
+ |
4288 |
+diff --git a/drivers/net/ethernet/broadcom/bcmsysport.c b/drivers/net/ethernet/broadcom/bcmsysport.c |
4289 |
+index 79018fea7be2..69b2f99b0c19 100644 |
4290 |
+--- a/drivers/net/ethernet/broadcom/bcmsysport.c |
4291 |
++++ b/drivers/net/ethernet/broadcom/bcmsysport.c |
4292 |
+@@ -2116,7 +2116,7 @@ static int bcm_sysport_probe(struct platform_device *pdev) |
4293 |
+ |
4294 |
+ priv->phy_interface = of_get_phy_mode(dn); |
4295 |
+ /* Default to GMII interface mode */ |
4296 |
+- if (priv->phy_interface < 0) |
4297 |
++ if ((int)priv->phy_interface < 0) |
4298 |
+ priv->phy_interface = PHY_INTERFACE_MODE_GMII; |
4299 |
+ |
4300 |
+ /* In the case of a fixed PHY, the DT node associated |
4301 |
+diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c b/drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c |
4302 |
+index fc8e185718a1..3c78cd1cdd6f 100644 |
4303 |
+--- a/drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c |
4304 |
++++ b/drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c |
4305 |
+@@ -1667,21 +1667,19 @@ static int bnxt_flash_package_from_file(struct net_device *dev, |
4306 |
+ mutex_lock(&bp->hwrm_cmd_lock); |
4307 |
+ hwrm_err = _hwrm_send_message(bp, &install, sizeof(install), |
4308 |
+ INSTALL_PACKAGE_TIMEOUT); |
4309 |
+- if (hwrm_err) |
4310 |
+- goto flash_pkg_exit; |
4311 |
+- |
4312 |
+- if (resp->error_code) { |
4313 |
++ if (hwrm_err) { |
4314 |
+ u8 error_code = ((struct hwrm_err_output *)resp)->cmd_err; |
4315 |
+ |
4316 |
+- if (error_code == NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR) { |
4317 |
++ if (resp->error_code && error_code == |
4318 |
++ NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR) { |
4319 |
+ install.flags |= cpu_to_le16( |
4320 |
+ NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG); |
4321 |
+ hwrm_err = _hwrm_send_message(bp, &install, |
4322 |
+ sizeof(install), |
4323 |
+ INSTALL_PACKAGE_TIMEOUT); |
4324 |
+- if (hwrm_err) |
4325 |
+- goto flash_pkg_exit; |
4326 |
+ } |
4327 |
++ if (hwrm_err) |
4328 |
++ goto flash_pkg_exit; |
4329 |
+ } |
4330 |
+ |
4331 |
+ if (resp->result) { |
4332 |
+@@ -2463,7 +2461,7 @@ static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest, |
4333 |
+ bool offline = false; |
4334 |
+ u8 test_results = 0; |
4335 |
+ u8 test_mask = 0; |
4336 |
+- int rc, i; |
4337 |
++ int rc = 0, i; |
4338 |
+ |
4339 |
+ if (!bp->num_tests || !BNXT_SINGLE_PF(bp)) |
4340 |
+ return; |
4341 |
+@@ -2521,9 +2519,9 @@ static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest, |
4342 |
+ } |
4343 |
+ bnxt_hwrm_phy_loopback(bp, false); |
4344 |
+ bnxt_half_close_nic(bp); |
4345 |
+- bnxt_open_nic(bp, false, true); |
4346 |
++ rc = bnxt_open_nic(bp, false, true); |
4347 |
+ } |
4348 |
+- if (bnxt_test_irq(bp)) { |
4349 |
++ if (rc || bnxt_test_irq(bp)) { |
4350 |
+ buf[BNXT_IRQ_TEST_IDX] = 1; |
4351 |
+ etest->flags |= ETH_TEST_FL_FAILED; |
4352 |
+ } |
4353 |
+diff --git a/drivers/net/ethernet/hisilicon/hix5hd2_gmac.c b/drivers/net/ethernet/hisilicon/hix5hd2_gmac.c |
4354 |
+index aab6fb10af94..6adf6831d120 100644 |
4355 |
+--- a/drivers/net/ethernet/hisilicon/hix5hd2_gmac.c |
4356 |
++++ b/drivers/net/ethernet/hisilicon/hix5hd2_gmac.c |
4357 |
+@@ -1202,7 +1202,7 @@ static int hix5hd2_dev_probe(struct platform_device *pdev) |
4358 |
+ goto err_free_mdio; |
4359 |
+ |
4360 |
+ priv->phy_mode = of_get_phy_mode(node); |
4361 |
+- if (priv->phy_mode < 0) { |
4362 |
++ if ((int)priv->phy_mode < 0) { |
4363 |
+ netdev_err(ndev, "not find phy-mode\n"); |
4364 |
+ ret = -EINVAL; |
4365 |
+ goto err_mdiobus; |
4366 |
+diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h |
4367 |
+index 9fcfd9395424..a4c5e72d6012 100644 |
4368 |
+--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h |
4369 |
++++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h |
4370 |
+@@ -480,7 +480,7 @@ struct hclge_vport { |
4371 |
+ u16 alloc_rss_size; |
4372 |
+ |
4373 |
+ u16 qs_offset; |
4374 |
+- u16 bw_limit; /* VSI BW Limit (0 = disabled) */ |
4375 |
++ u32 bw_limit; /* VSI BW Limit (0 = disabled) */ |
4376 |
+ u8 dwrr; |
4377 |
+ |
4378 |
+ int vport_id; |
4379 |
+diff --git a/drivers/net/ethernet/ibm/ehea/ehea_main.c b/drivers/net/ethernet/ibm/ehea/ehea_main.c |
4380 |
+index 30cbdf0fed59..373deb247ac0 100644 |
4381 |
+--- a/drivers/net/ethernet/ibm/ehea/ehea_main.c |
4382 |
++++ b/drivers/net/ethernet/ibm/ehea/ehea_main.c |
4383 |
+@@ -1475,7 +1475,7 @@ static int ehea_init_port_res(struct ehea_port *port, struct ehea_port_res *pr, |
4384 |
+ |
4385 |
+ memset(pr, 0, sizeof(struct ehea_port_res)); |
4386 |
+ |
4387 |
+- pr->tx_bytes = rx_bytes; |
4388 |
++ pr->tx_bytes = tx_bytes; |
4389 |
+ pr->tx_packets = tx_packets; |
4390 |
+ pr->rx_bytes = rx_bytes; |
4391 |
+ pr->rx_packets = rx_packets; |
4392 |
+diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c |
4393 |
+index 0edfd199937d..e4c1e6345edd 100644 |
4394 |
+--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c |
4395 |
++++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c |
4396 |
+@@ -1871,13 +1871,7 @@ static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring, |
4397 |
+ static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring, |
4398 |
+ struct sk_buff *skb) |
4399 |
+ { |
4400 |
+- /* if the page was released unmap it, else just sync our portion */ |
4401 |
+- if (unlikely(IXGBE_CB(skb)->page_released)) { |
4402 |
+- dma_unmap_page_attrs(rx_ring->dev, IXGBE_CB(skb)->dma, |
4403 |
+- ixgbe_rx_pg_size(rx_ring), |
4404 |
+- DMA_FROM_DEVICE, |
4405 |
+- IXGBE_RX_DMA_ATTR); |
4406 |
+- } else if (ring_uses_build_skb(rx_ring)) { |
4407 |
++ if (ring_uses_build_skb(rx_ring)) { |
4408 |
+ unsigned long offset = (unsigned long)(skb->data) & ~PAGE_MASK; |
4409 |
+ |
4410 |
+ dma_sync_single_range_for_cpu(rx_ring->dev, |
4411 |
+@@ -1894,6 +1888,14 @@ static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring, |
4412 |
+ skb_frag_size(frag), |
4413 |
+ DMA_FROM_DEVICE); |
4414 |
+ } |
4415 |
++ |
4416 |
++ /* If the page was released, just unmap it. */ |
4417 |
++ if (unlikely(IXGBE_CB(skb)->page_released)) { |
4418 |
++ dma_unmap_page_attrs(rx_ring->dev, IXGBE_CB(skb)->dma, |
4419 |
++ ixgbe_rx_pg_size(rx_ring), |
4420 |
++ DMA_FROM_DEVICE, |
4421 |
++ IXGBE_RX_DMA_ATTR); |
4422 |
++ } |
4423 |
+ } |
4424 |
+ |
4425 |
+ /** |
4426 |
+diff --git a/drivers/net/ethernet/mellanox/mlx5/core/qp.c b/drivers/net/ethernet/mellanox/mlx5/core/qp.c |
4427 |
+index 5f091c6ea049..b92d5690287b 100644 |
4428 |
+--- a/drivers/net/ethernet/mellanox/mlx5/core/qp.c |
4429 |
++++ b/drivers/net/ethernet/mellanox/mlx5/core/qp.c |
4430 |
+@@ -44,14 +44,15 @@ static struct mlx5_core_rsc_common *mlx5_get_rsc(struct mlx5_core_dev *dev, |
4431 |
+ { |
4432 |
+ struct mlx5_qp_table *table = &dev->priv.qp_table; |
4433 |
+ struct mlx5_core_rsc_common *common; |
4434 |
++ unsigned long flags; |
4435 |
+ |
4436 |
+- spin_lock(&table->lock); |
4437 |
++ spin_lock_irqsave(&table->lock, flags); |
4438 |
+ |
4439 |
+ common = radix_tree_lookup(&table->tree, rsn); |
4440 |
+ if (common) |
4441 |
+ atomic_inc(&common->refcount); |
4442 |
+ |
4443 |
+- spin_unlock(&table->lock); |
4444 |
++ spin_unlock_irqrestore(&table->lock, flags); |
4445 |
+ |
4446 |
+ if (!common) { |
4447 |
+ mlx5_core_warn(dev, "Async event for bogus resource 0x%x\n", |
4448 |
+diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h |
4449 |
+index 8ab7a4f98a07..e7974ba06432 100644 |
4450 |
+--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h |
4451 |
++++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h |
4452 |
+@@ -2452,7 +2452,7 @@ static inline void mlxsw_reg_qtct_pack(char *payload, u8 local_port, |
4453 |
+ * Configures the ETS elements. |
4454 |
+ */ |
4455 |
+ #define MLXSW_REG_QEEC_ID 0x400D |
4456 |
+-#define MLXSW_REG_QEEC_LEN 0x1C |
4457 |
++#define MLXSW_REG_QEEC_LEN 0x20 |
4458 |
+ |
4459 |
+ MLXSW_REG_DEFINE(qeec, MLXSW_REG_QEEC_ID, MLXSW_REG_QEEC_LEN); |
4460 |
+ |
4461 |
+@@ -2494,6 +2494,15 @@ MLXSW_ITEM32(reg, qeec, element_index, 0x04, 0, 8); |
4462 |
+ */ |
4463 |
+ MLXSW_ITEM32(reg, qeec, next_element_index, 0x08, 0, 8); |
4464 |
+ |
4465 |
++/* reg_qeec_mise |
4466 |
++ * Min shaper configuration enable. Enables configuration of the min |
4467 |
++ * shaper on this ETS element |
4468 |
++ * 0 - Disable |
4469 |
++ * 1 - Enable |
4470 |
++ * Access: RW |
4471 |
++ */ |
4472 |
++MLXSW_ITEM32(reg, qeec, mise, 0x0C, 31, 1); |
4473 |
++ |
4474 |
+ enum { |
4475 |
+ MLXSW_REG_QEEC_BYTES_MODE, |
4476 |
+ MLXSW_REG_QEEC_PACKETS_MODE, |
4477 |
+@@ -2510,6 +2519,17 @@ enum { |
4478 |
+ */ |
4479 |
+ MLXSW_ITEM32(reg, qeec, pb, 0x0C, 28, 1); |
4480 |
+ |
4481 |
++/* The smallest permitted min shaper rate. */ |
4482 |
++#define MLXSW_REG_QEEC_MIS_MIN 200000 /* Kbps */ |
4483 |
++ |
4484 |
++/* reg_qeec_min_shaper_rate |
4485 |
++ * Min shaper information rate. |
4486 |
++ * For CPU port, can only be configured for port hierarchy. |
4487 |
++ * When in bytes mode, value is specified in units of 1000bps. |
4488 |
++ * Access: RW |
4489 |
++ */ |
4490 |
++MLXSW_ITEM32(reg, qeec, min_shaper_rate, 0x0C, 0, 28); |
4491 |
++ |
4492 |
+ /* reg_qeec_mase |
4493 |
+ * Max shaper configuration enable. Enables configuration of the max |
4494 |
+ * shaper on this ETS element. |
4495 |
+diff --git a/drivers/net/ethernet/natsemi/sonic.c b/drivers/net/ethernet/natsemi/sonic.c |
4496 |
+index 23821540ab07..a051dddcbd76 100644 |
4497 |
+--- a/drivers/net/ethernet/natsemi/sonic.c |
4498 |
++++ b/drivers/net/ethernet/natsemi/sonic.c |
4499 |
+@@ -221,9 +221,9 @@ static int sonic_send_packet(struct sk_buff *skb, struct net_device *dev) |
4500 |
+ |
4501 |
+ laddr = dma_map_single(lp->device, skb->data, length, DMA_TO_DEVICE); |
4502 |
+ if (!laddr) { |
4503 |
+- printk(KERN_ERR "%s: failed to map tx DMA buffer.\n", dev->name); |
4504 |
+- dev_kfree_skb(skb); |
4505 |
+- return NETDEV_TX_BUSY; |
4506 |
++ pr_err_ratelimited("%s: failed to map tx DMA buffer.\n", dev->name); |
4507 |
++ dev_kfree_skb_any(skb); |
4508 |
++ return NETDEV_TX_OK; |
4509 |
+ } |
4510 |
+ |
4511 |
+ sonic_tda_put(dev, entry, SONIC_TD_STATUS, 0); /* clear status */ |
4512 |
+diff --git a/drivers/net/ethernet/pasemi/pasemi_mac.c b/drivers/net/ethernet/pasemi/pasemi_mac.c |
4513 |
+index 49591d9c2e1b..c9b4ac9d3330 100644 |
4514 |
+--- a/drivers/net/ethernet/pasemi/pasemi_mac.c |
4515 |
++++ b/drivers/net/ethernet/pasemi/pasemi_mac.c |
4516 |
+@@ -1053,7 +1053,6 @@ static int pasemi_mac_phy_init(struct net_device *dev) |
4517 |
+ |
4518 |
+ dn = pci_device_to_OF_node(mac->pdev); |
4519 |
+ phy_dn = of_parse_phandle(dn, "phy-handle", 0); |
4520 |
+- of_node_put(phy_dn); |
4521 |
+ |
4522 |
+ mac->link = 0; |
4523 |
+ mac->speed = 0; |
4524 |
+@@ -1062,6 +1061,7 @@ static int pasemi_mac_phy_init(struct net_device *dev) |
4525 |
+ phydev = of_phy_connect(dev, phy_dn, &pasemi_adjust_link, 0, |
4526 |
+ PHY_INTERFACE_MODE_SGMII); |
4527 |
+ |
4528 |
++ of_node_put(phy_dn); |
4529 |
+ if (!phydev) { |
4530 |
+ printk(KERN_ERR "%s: Could not attach to phy\n", dev->name); |
4531 |
+ return -ENODEV; |
4532 |
+diff --git a/drivers/net/ethernet/qlogic/qed/qed_iwarp.c b/drivers/net/ethernet/qlogic/qed/qed_iwarp.c |
4533 |
+index bb09f5a9846f..38d0f62bf037 100644 |
4534 |
+--- a/drivers/net/ethernet/qlogic/qed/qed_iwarp.c |
4535 |
++++ b/drivers/net/ethernet/qlogic/qed/qed_iwarp.c |
4536 |
+@@ -509,7 +509,8 @@ int qed_iwarp_destroy_qp(struct qed_hwfn *p_hwfn, struct qed_rdma_qp *qp) |
4537 |
+ |
4538 |
+ /* Make sure ep is closed before returning and freeing memory. */ |
4539 |
+ if (ep) { |
4540 |
+- while (ep->state != QED_IWARP_EP_CLOSED && wait_count++ < 200) |
4541 |
++ while (READ_ONCE(ep->state) != QED_IWARP_EP_CLOSED && |
4542 |
++ wait_count++ < 200) |
4543 |
+ msleep(100); |
4544 |
+ |
4545 |
+ if (ep->state != QED_IWARP_EP_CLOSED) |
4546 |
+@@ -991,8 +992,6 @@ qed_iwarp_mpa_complete(struct qed_hwfn *p_hwfn, |
4547 |
+ |
4548 |
+ params.ep_context = ep; |
4549 |
+ |
4550 |
+- ep->state = QED_IWARP_EP_CLOSED; |
4551 |
+- |
4552 |
+ switch (fw_return_code) { |
4553 |
+ case RDMA_RETURN_OK: |
4554 |
+ ep->qp->max_rd_atomic_req = ep->cm_info.ord; |
4555 |
+@@ -1052,6 +1051,10 @@ qed_iwarp_mpa_complete(struct qed_hwfn *p_hwfn, |
4556 |
+ break; |
4557 |
+ } |
4558 |
+ |
4559 |
++ if (fw_return_code != RDMA_RETURN_OK) |
4560 |
++ /* paired with READ_ONCE in destroy_qp */ |
4561 |
++ smp_store_release(&ep->state, QED_IWARP_EP_CLOSED); |
4562 |
++ |
4563 |
+ ep->event_cb(ep->cb_context, ¶ms); |
4564 |
+ |
4565 |
+ /* on passive side, if there is no associated QP (REJECT) we need to |
4566 |
+@@ -2069,7 +2072,9 @@ void qed_iwarp_qp_in_error(struct qed_hwfn *p_hwfn, |
4567 |
+ params.status = (fw_return_code == IWARP_QP_IN_ERROR_GOOD_CLOSE) ? |
4568 |
+ 0 : -ECONNRESET; |
4569 |
+ |
4570 |
+- ep->state = QED_IWARP_EP_CLOSED; |
4571 |
++ /* paired with READ_ONCE in destroy_qp */ |
4572 |
++ smp_store_release(&ep->state, QED_IWARP_EP_CLOSED); |
4573 |
++ |
4574 |
+ spin_lock_bh(&p_hwfn->p_rdma_info->iwarp.iw_lock); |
4575 |
+ list_del(&ep->list_entry); |
4576 |
+ spin_unlock_bh(&p_hwfn->p_rdma_info->iwarp.iw_lock); |
4577 |
+@@ -2157,7 +2162,8 @@ qed_iwarp_tcp_connect_unsuccessful(struct qed_hwfn *p_hwfn, |
4578 |
+ params.event = QED_IWARP_EVENT_ACTIVE_COMPLETE; |
4579 |
+ params.ep_context = ep; |
4580 |
+ params.cm_info = &ep->cm_info; |
4581 |
+- ep->state = QED_IWARP_EP_CLOSED; |
4582 |
++ /* paired with READ_ONCE in destroy_qp */ |
4583 |
++ smp_store_release(&ep->state, QED_IWARP_EP_CLOSED); |
4584 |
+ |
4585 |
+ switch (fw_return_code) { |
4586 |
+ case IWARP_CONN_ERROR_TCP_CONNECT_INVALID_PACKET: |
4587 |
+diff --git a/drivers/net/ethernet/qlogic/qed/qed_l2.c b/drivers/net/ethernet/qlogic/qed/qed_l2.c |
4588 |
+index 62cde3854a5c..5d7adedac68d 100644 |
4589 |
+--- a/drivers/net/ethernet/qlogic/qed/qed_l2.c |
4590 |
++++ b/drivers/net/ethernet/qlogic/qed/qed_l2.c |
4591 |
+@@ -1629,10 +1629,9 @@ static void __qed_get_vport_pstats_addrlen(struct qed_hwfn *p_hwfn, |
4592 |
+ } |
4593 |
+ } |
4594 |
+ |
4595 |
+-static void __qed_get_vport_pstats(struct qed_hwfn *p_hwfn, |
4596 |
+- struct qed_ptt *p_ptt, |
4597 |
+- struct qed_eth_stats *p_stats, |
4598 |
+- u16 statistics_bin) |
4599 |
++static noinline_for_stack void |
4600 |
++__qed_get_vport_pstats(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, |
4601 |
++ struct qed_eth_stats *p_stats, u16 statistics_bin) |
4602 |
+ { |
4603 |
+ struct eth_pstorm_per_queue_stat pstats; |
4604 |
+ u32 pstats_addr = 0, pstats_len = 0; |
4605 |
+@@ -1659,10 +1658,9 @@ static void __qed_get_vport_pstats(struct qed_hwfn *p_hwfn, |
4606 |
+ HILO_64_REGPAIR(pstats.error_drop_pkts); |
4607 |
+ } |
4608 |
+ |
4609 |
+-static void __qed_get_vport_tstats(struct qed_hwfn *p_hwfn, |
4610 |
+- struct qed_ptt *p_ptt, |
4611 |
+- struct qed_eth_stats *p_stats, |
4612 |
+- u16 statistics_bin) |
4613 |
++static noinline_for_stack void |
4614 |
++__qed_get_vport_tstats(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, |
4615 |
++ struct qed_eth_stats *p_stats, u16 statistics_bin) |
4616 |
+ { |
4617 |
+ struct tstorm_per_port_stat tstats; |
4618 |
+ u32 tstats_addr, tstats_len; |
4619 |
+@@ -1705,10 +1703,9 @@ static void __qed_get_vport_ustats_addrlen(struct qed_hwfn *p_hwfn, |
4620 |
+ } |
4621 |
+ } |
4622 |
+ |
4623 |
+-static void __qed_get_vport_ustats(struct qed_hwfn *p_hwfn, |
4624 |
+- struct qed_ptt *p_ptt, |
4625 |
+- struct qed_eth_stats *p_stats, |
4626 |
+- u16 statistics_bin) |
4627 |
++static noinline_for_stack |
4628 |
++void __qed_get_vport_ustats(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, |
4629 |
++ struct qed_eth_stats *p_stats, u16 statistics_bin) |
4630 |
+ { |
4631 |
+ struct eth_ustorm_per_queue_stat ustats; |
4632 |
+ u32 ustats_addr = 0, ustats_len = 0; |
4633 |
+@@ -1747,10 +1744,9 @@ static void __qed_get_vport_mstats_addrlen(struct qed_hwfn *p_hwfn, |
4634 |
+ } |
4635 |
+ } |
4636 |
+ |
4637 |
+-static void __qed_get_vport_mstats(struct qed_hwfn *p_hwfn, |
4638 |
+- struct qed_ptt *p_ptt, |
4639 |
+- struct qed_eth_stats *p_stats, |
4640 |
+- u16 statistics_bin) |
4641 |
++static noinline_for_stack void |
4642 |
++__qed_get_vport_mstats(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, |
4643 |
++ struct qed_eth_stats *p_stats, u16 statistics_bin) |
4644 |
+ { |
4645 |
+ struct eth_mstorm_per_queue_stat mstats; |
4646 |
+ u32 mstats_addr = 0, mstats_len = 0; |
4647 |
+@@ -1776,9 +1772,9 @@ static void __qed_get_vport_mstats(struct qed_hwfn *p_hwfn, |
4648 |
+ HILO_64_REGPAIR(mstats.tpa_coalesced_bytes); |
4649 |
+ } |
4650 |
+ |
4651 |
+-static void __qed_get_vport_port_stats(struct qed_hwfn *p_hwfn, |
4652 |
+- struct qed_ptt *p_ptt, |
4653 |
+- struct qed_eth_stats *p_stats) |
4654 |
++static noinline_for_stack void |
4655 |
++__qed_get_vport_port_stats(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, |
4656 |
++ struct qed_eth_stats *p_stats) |
4657 |
+ { |
4658 |
+ struct qed_eth_stats_common *p_common = &p_stats->common; |
4659 |
+ struct port_stats port_stats; |
4660 |
+diff --git a/drivers/net/ethernet/qualcomm/qca_spi.c b/drivers/net/ethernet/qualcomm/qca_spi.c |
4661 |
+index 275fc6f154a7..1c87178fc485 100644 |
4662 |
+--- a/drivers/net/ethernet/qualcomm/qca_spi.c |
4663 |
++++ b/drivers/net/ethernet/qualcomm/qca_spi.c |
4664 |
+@@ -475,7 +475,6 @@ qcaspi_qca7k_sync(struct qcaspi *qca, int event) |
4665 |
+ u16 signature = 0; |
4666 |
+ u16 spi_config; |
4667 |
+ u16 wrbuf_space = 0; |
4668 |
+- static u16 reset_count; |
4669 |
+ |
4670 |
+ if (event == QCASPI_EVENT_CPUON) { |
4671 |
+ /* Read signature twice, if not valid |
4672 |
+@@ -528,13 +527,13 @@ qcaspi_qca7k_sync(struct qcaspi *qca, int event) |
4673 |
+ |
4674 |
+ qca->sync = QCASPI_SYNC_RESET; |
4675 |
+ qca->stats.trig_reset++; |
4676 |
+- reset_count = 0; |
4677 |
++ qca->reset_count = 0; |
4678 |
+ break; |
4679 |
+ case QCASPI_SYNC_RESET: |
4680 |
+- reset_count++; |
4681 |
++ qca->reset_count++; |
4682 |
+ netdev_dbg(qca->net_dev, "sync: waiting for CPU on, count %u.\n", |
4683 |
+- reset_count); |
4684 |
+- if (reset_count >= QCASPI_RESET_TIMEOUT) { |
4685 |
++ qca->reset_count); |
4686 |
++ if (qca->reset_count >= QCASPI_RESET_TIMEOUT) { |
4687 |
+ /* reset did not seem to take place, try again */ |
4688 |
+ qca->sync = QCASPI_SYNC_UNKNOWN; |
4689 |
+ qca->stats.reset_timeout++; |
4690 |
+diff --git a/drivers/net/ethernet/qualcomm/qca_spi.h b/drivers/net/ethernet/qualcomm/qca_spi.h |
4691 |
+index fc0e98726b36..719c41227f22 100644 |
4692 |
+--- a/drivers/net/ethernet/qualcomm/qca_spi.h |
4693 |
++++ b/drivers/net/ethernet/qualcomm/qca_spi.h |
4694 |
+@@ -92,6 +92,7 @@ struct qcaspi { |
4695 |
+ |
4696 |
+ unsigned int intr_req; |
4697 |
+ unsigned int intr_svc; |
4698 |
++ u16 reset_count; |
4699 |
+ |
4700 |
+ #ifdef CONFIG_DEBUG_FS |
4701 |
+ struct dentry *device_root; |
4702 |
+diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c |
4703 |
+index 9b1906a65e11..25f3b2ad26e9 100644 |
4704 |
+--- a/drivers/net/ethernet/renesas/sh_eth.c |
4705 |
++++ b/drivers/net/ethernet/renesas/sh_eth.c |
4706 |
+@@ -3046,12 +3046,16 @@ static struct sh_eth_plat_data *sh_eth_parse_dt(struct device *dev) |
4707 |
+ struct device_node *np = dev->of_node; |
4708 |
+ struct sh_eth_plat_data *pdata; |
4709 |
+ const char *mac_addr; |
4710 |
++ int ret; |
4711 |
+ |
4712 |
+ pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); |
4713 |
+ if (!pdata) |
4714 |
+ return NULL; |
4715 |
+ |
4716 |
+- pdata->phy_interface = of_get_phy_mode(np); |
4717 |
++ ret = of_get_phy_mode(np); |
4718 |
++ if (ret < 0) |
4719 |
++ return NULL; |
4720 |
++ pdata->phy_interface = ret; |
4721 |
+ |
4722 |
+ mac_addr = of_get_mac_address(np); |
4723 |
+ if (mac_addr) |
4724 |
+diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c |
4725 |
+index 866444b6c82f..11a4a81b0397 100644 |
4726 |
+--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c |
4727 |
++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c |
4728 |
+@@ -203,7 +203,7 @@ static int ipq806x_gmac_of_parse(struct ipq806x_gmac *gmac) |
4729 |
+ struct device *dev = &gmac->pdev->dev; |
4730 |
+ |
4731 |
+ gmac->phy_mode = of_get_phy_mode(dev->of_node); |
4732 |
+- if (gmac->phy_mode < 0) { |
4733 |
++ if ((int)gmac->phy_mode < 0) { |
4734 |
+ dev_err(dev, "missing phy mode property\n"); |
4735 |
+ return -EINVAL; |
4736 |
+ } |
4737 |
+diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c |
4738 |
+index 8be4b32544ef..d71d3c1c85ee 100644 |
4739 |
+--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c |
4740 |
++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c |
4741 |
+@@ -285,7 +285,7 @@ static int meson8b_dwmac_probe(struct platform_device *pdev) |
4742 |
+ |
4743 |
+ dwmac->pdev = pdev; |
4744 |
+ dwmac->phy_mode = of_get_phy_mode(pdev->dev.of_node); |
4745 |
+- if (dwmac->phy_mode < 0) { |
4746 |
++ if ((int)dwmac->phy_mode < 0) { |
4747 |
+ dev_err(&pdev->dev, "missing phy-mode property\n"); |
4748 |
+ ret = -EINVAL; |
4749 |
+ goto err_remove_config_dt; |
4750 |
+diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c |
4751 |
+index 8445af580cb6..e5566c121525 100644 |
4752 |
+--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c |
4753 |
++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c |
4754 |
+@@ -438,7 +438,7 @@ static void dwmac4_set_filter(struct mac_device_info *hw, |
4755 |
+ } |
4756 |
+ |
4757 |
+ /* Handle multiple unicast addresses */ |
4758 |
+- if (netdev_uc_count(dev) > GMAC_MAX_PERFECT_ADDRESSES) { |
4759 |
++ if (netdev_uc_count(dev) > hw->unicast_filter_entries) { |
4760 |
+ /* Switch to promiscuous mode if more than 128 addrs |
4761 |
+ * are required |
4762 |
+ */ |
4763 |
+diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c |
4764 |
+index e471a903c654..1c1d6a942822 100644 |
4765 |
+--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c |
4766 |
++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c |
4767 |
+@@ -154,7 +154,7 @@ static int stmmac_enable(struct ptp_clock_info *ptp, |
4768 |
+ /* structure describing a PTP hardware clock */ |
4769 |
+ static const struct ptp_clock_info stmmac_ptp_clock_ops = { |
4770 |
+ .owner = THIS_MODULE, |
4771 |
+- .name = "stmmac_ptp_clock", |
4772 |
++ .name = "stmmac ptp", |
4773 |
+ .max_adj = 62500000, |
4774 |
+ .n_alarm = 0, |
4775 |
+ .n_ext_ts = 0, |
4776 |
+diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c |
4777 |
+index 9ccd08a051f6..1152d74433f6 100644 |
4778 |
+--- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c |
4779 |
++++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c |
4780 |
+@@ -1574,7 +1574,7 @@ static int axienet_probe(struct platform_device *pdev) |
4781 |
+ } |
4782 |
+ } else { |
4783 |
+ lp->phy_mode = of_get_phy_mode(pdev->dev.of_node); |
4784 |
+- if (lp->phy_mode < 0) { |
4785 |
++ if ((int)lp->phy_mode < 0) { |
4786 |
+ ret = -EINVAL; |
4787 |
+ goto free_netdev; |
4788 |
+ } |
4789 |
+diff --git a/drivers/net/hyperv/netvsc_drv.c b/drivers/net/hyperv/netvsc_drv.c |
4790 |
+index a89de5752a8c..14451e14d99d 100644 |
4791 |
+--- a/drivers/net/hyperv/netvsc_drv.c |
4792 |
++++ b/drivers/net/hyperv/netvsc_drv.c |
4793 |
+@@ -282,9 +282,9 @@ static inline u32 netvsc_get_hash( |
4794 |
+ else if (flow.basic.n_proto == htons(ETH_P_IPV6)) |
4795 |
+ hash = jhash2((u32 *)&flow.addrs.v6addrs, 8, hashrnd); |
4796 |
+ else |
4797 |
+- hash = 0; |
4798 |
++ return 0; |
4799 |
+ |
4800 |
+- skb_set_hash(skb, hash, PKT_HASH_TYPE_L3); |
4801 |
++ __skb_set_sw_hash(skb, hash, false); |
4802 |
+ } |
4803 |
+ |
4804 |
+ return hash; |
4805 |
+@@ -802,8 +802,7 @@ static struct sk_buff *netvsc_alloc_recv_skb(struct net_device *net, |
4806 |
+ skb->protocol == htons(ETH_P_IP)) |
4807 |
+ netvsc_comp_ipcsum(skb); |
4808 |
+ |
4809 |
+- /* Do L4 checksum offload if enabled and present. |
4810 |
+- */ |
4811 |
++ /* Do L4 checksum offload if enabled and present. */ |
4812 |
+ if (csum_info && (net->features & NETIF_F_RXCSUM)) { |
4813 |
+ if (csum_info->receive.tcp_checksum_succeeded || |
4814 |
+ csum_info->receive.udp_checksum_succeeded) |
4815 |
+@@ -1840,6 +1839,12 @@ static rx_handler_result_t netvsc_vf_handle_frame(struct sk_buff **pskb) |
4816 |
+ struct netvsc_vf_pcpu_stats *pcpu_stats |
4817 |
+ = this_cpu_ptr(ndev_ctx->vf_stats); |
4818 |
+ |
4819 |
++ skb = skb_share_check(skb, GFP_ATOMIC); |
4820 |
++ if (unlikely(!skb)) |
4821 |
++ return RX_HANDLER_CONSUMED; |
4822 |
++ |
4823 |
++ *pskb = skb; |
4824 |
++ |
4825 |
+ skb->dev = ndev; |
4826 |
+ |
4827 |
+ u64_stats_update_begin(&pcpu_stats->syncp); |
4828 |
+diff --git a/drivers/net/phy/fixed_phy.c b/drivers/net/phy/fixed_phy.c |
4829 |
+index eb5167210681..3ab2eb677a59 100644 |
4830 |
+--- a/drivers/net/phy/fixed_phy.c |
4831 |
++++ b/drivers/net/phy/fixed_phy.c |
4832 |
+@@ -67,11 +67,11 @@ static int fixed_mdio_read(struct mii_bus *bus, int phy_addr, int reg_num) |
4833 |
+ do { |
4834 |
+ s = read_seqcount_begin(&fp->seqcount); |
4835 |
+ /* Issue callback if user registered it. */ |
4836 |
+- if (fp->link_update) { |
4837 |
++ if (fp->link_update) |
4838 |
+ fp->link_update(fp->phydev->attached_dev, |
4839 |
+ &fp->status); |
4840 |
+- fixed_phy_update(fp); |
4841 |
+- } |
4842 |
++ /* Check the GPIO for change in status */ |
4843 |
++ fixed_phy_update(fp); |
4844 |
+ state = fp->status; |
4845 |
+ } while (read_seqcount_retry(&fp->seqcount, s)); |
4846 |
+ |
4847 |
+diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c |
4848 |
+index a98c227a4c2e..99dae55cd334 100644 |
4849 |
+--- a/drivers/net/phy/phy_device.c |
4850 |
++++ b/drivers/net/phy/phy_device.c |
4851 |
+@@ -76,7 +76,7 @@ static LIST_HEAD(phy_fixup_list); |
4852 |
+ static DEFINE_MUTEX(phy_fixup_lock); |
4853 |
+ |
4854 |
+ #ifdef CONFIG_PM |
4855 |
+-static bool mdio_bus_phy_may_suspend(struct phy_device *phydev) |
4856 |
++static bool mdio_bus_phy_may_suspend(struct phy_device *phydev, bool suspend) |
4857 |
+ { |
4858 |
+ struct device_driver *drv = phydev->mdio.dev.driver; |
4859 |
+ struct phy_driver *phydrv = to_phy_driver(drv); |
4860 |
+@@ -88,10 +88,11 @@ static bool mdio_bus_phy_may_suspend(struct phy_device *phydev) |
4861 |
+ /* PHY not attached? May suspend if the PHY has not already been |
4862 |
+ * suspended as part of a prior call to phy_disconnect() -> |
4863 |
+ * phy_detach() -> phy_suspend() because the parent netdev might be the |
4864 |
+- * MDIO bus driver and clock gated at this point. |
4865 |
++ * MDIO bus driver and clock gated at this point. Also may resume if |
4866 |
++ * PHY is not attached. |
4867 |
+ */ |
4868 |
+ if (!netdev) |
4869 |
+- return !phydev->suspended; |
4870 |
++ return suspend ? !phydev->suspended : phydev->suspended; |
4871 |
+ |
4872 |
+ /* Don't suspend PHY if the attached netdev parent may wakeup. |
4873 |
+ * The parent may point to a PCI device, as in tg3 driver. |
4874 |
+@@ -121,7 +122,7 @@ static int mdio_bus_phy_suspend(struct device *dev) |
4875 |
+ if (phydev->attached_dev && phydev->adjust_link) |
4876 |
+ phy_stop_machine(phydev); |
4877 |
+ |
4878 |
+- if (!mdio_bus_phy_may_suspend(phydev)) |
4879 |
++ if (!mdio_bus_phy_may_suspend(phydev, true)) |
4880 |
+ return 0; |
4881 |
+ |
4882 |
+ return phy_suspend(phydev); |
4883 |
+@@ -132,7 +133,7 @@ static int mdio_bus_phy_resume(struct device *dev) |
4884 |
+ struct phy_device *phydev = to_phy_device(dev); |
4885 |
+ int ret; |
4886 |
+ |
4887 |
+- if (!mdio_bus_phy_may_suspend(phydev)) |
4888 |
++ if (!mdio_bus_phy_may_suspend(phydev, false)) |
4889 |
+ goto no_resume; |
4890 |
+ |
4891 |
+ ret = phy_resume(phydev); |
4892 |
+diff --git a/drivers/net/vxlan.c b/drivers/net/vxlan.c |
4893 |
+index 5aa7d5091f4d..4d97a7b5fe3c 100644 |
4894 |
+--- a/drivers/net/vxlan.c |
4895 |
++++ b/drivers/net/vxlan.c |
4896 |
+@@ -3494,7 +3494,6 @@ static int vxlan_changelink(struct net_device *dev, struct nlattr *tb[], |
4897 |
+ struct vxlan_rdst *dst = &vxlan->default_dst; |
4898 |
+ struct vxlan_rdst old_dst; |
4899 |
+ struct vxlan_config conf; |
4900 |
+- struct vxlan_fdb *f = NULL; |
4901 |
+ int err; |
4902 |
+ |
4903 |
+ err = vxlan_nl2conf(tb, data, |
4904 |
+@@ -3520,19 +3519,19 @@ static int vxlan_changelink(struct net_device *dev, struct nlattr *tb[], |
4905 |
+ old_dst.remote_ifindex, 0); |
4906 |
+ |
4907 |
+ if (!vxlan_addr_any(&dst->remote_ip)) { |
4908 |
+- err = vxlan_fdb_create(vxlan, all_zeros_mac, |
4909 |
++ err = vxlan_fdb_update(vxlan, all_zeros_mac, |
4910 |
+ &dst->remote_ip, |
4911 |
+ NUD_REACHABLE | NUD_PERMANENT, |
4912 |
++ NLM_F_APPEND | NLM_F_CREATE, |
4913 |
+ vxlan->cfg.dst_port, |
4914 |
+ dst->remote_vni, |
4915 |
+ dst->remote_vni, |
4916 |
+ dst->remote_ifindex, |
4917 |
+- NTF_SELF, &f); |
4918 |
++ NTF_SELF); |
4919 |
+ if (err) { |
4920 |
+ spin_unlock_bh(&vxlan->hash_lock); |
4921 |
+ return err; |
4922 |
+ } |
4923 |
+- vxlan_fdb_notify(vxlan, f, first_remote_rtnl(f), RTM_NEWNEIGH); |
4924 |
+ } |
4925 |
+ spin_unlock_bh(&vxlan->hash_lock); |
4926 |
+ } |
4927 |
+diff --git a/drivers/net/wireless/ath/ath10k/sdio.c b/drivers/net/wireless/ath/ath10k/sdio.c |
4928 |
+index 0a1248ebccf5..f49b21b137c1 100644 |
4929 |
+--- a/drivers/net/wireless/ath/ath10k/sdio.c |
4930 |
++++ b/drivers/net/wireless/ath/ath10k/sdio.c |
4931 |
+@@ -392,16 +392,11 @@ static int ath10k_sdio_mbox_rx_process_packet(struct ath10k *ar, |
4932 |
+ struct ath10k_htc_hdr *htc_hdr = (struct ath10k_htc_hdr *)skb->data; |
4933 |
+ bool trailer_present = htc_hdr->flags & ATH10K_HTC_FLAG_TRAILER_PRESENT; |
4934 |
+ enum ath10k_htc_ep_id eid; |
4935 |
+- u16 payload_len; |
4936 |
+ u8 *trailer; |
4937 |
+ int ret; |
4938 |
+ |
4939 |
+- payload_len = le16_to_cpu(htc_hdr->len); |
4940 |
+- skb->len = payload_len + sizeof(struct ath10k_htc_hdr); |
4941 |
+- |
4942 |
+ if (trailer_present) { |
4943 |
+- trailer = skb->data + sizeof(*htc_hdr) + |
4944 |
+- payload_len - htc_hdr->trailer_len; |
4945 |
++ trailer = skb->data + skb->len - htc_hdr->trailer_len; |
4946 |
+ |
4947 |
+ eid = pipe_id_to_eid(htc_hdr->eid); |
4948 |
+ |
4949 |
+@@ -635,13 +630,31 @@ static int ath10k_sdio_mbox_rx_packet(struct ath10k *ar, |
4950 |
+ { |
4951 |
+ struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar); |
4952 |
+ struct sk_buff *skb = pkt->skb; |
4953 |
++ struct ath10k_htc_hdr *htc_hdr; |
4954 |
+ int ret; |
4955 |
+ |
4956 |
+ ret = ath10k_sdio_readsb(ar, ar_sdio->mbox_info.htc_addr, |
4957 |
+ skb->data, pkt->alloc_len); |
4958 |
++ if (ret) |
4959 |
++ goto out; |
4960 |
++ |
4961 |
++ /* Update actual length. The original length may be incorrect, |
4962 |
++ * as the FW will bundle multiple packets as long as their sizes |
4963 |
++ * fit within the same aligned length (pkt->alloc_len). |
4964 |
++ */ |
4965 |
++ htc_hdr = (struct ath10k_htc_hdr *)skb->data; |
4966 |
++ pkt->act_len = le16_to_cpu(htc_hdr->len) + sizeof(*htc_hdr); |
4967 |
++ if (pkt->act_len > pkt->alloc_len) { |
4968 |
++ ath10k_warn(ar, "rx packet too large (%zu > %zu)\n", |
4969 |
++ pkt->act_len, pkt->alloc_len); |
4970 |
++ ret = -EMSGSIZE; |
4971 |
++ goto out; |
4972 |
++ } |
4973 |
++ |
4974 |
++ skb_put(skb, pkt->act_len); |
4975 |
++ |
4976 |
++out: |
4977 |
+ pkt->status = ret; |
4978 |
+- if (!ret) |
4979 |
+- skb_put(skb, pkt->act_len); |
4980 |
+ |
4981 |
+ return ret; |
4982 |
+ } |
4983 |
+diff --git a/drivers/net/wireless/ath/ath9k/dynack.c b/drivers/net/wireless/ath/ath9k/dynack.c |
4984 |
+index 6e236a485431..71b4888b30e7 100644 |
4985 |
+--- a/drivers/net/wireless/ath/ath9k/dynack.c |
4986 |
++++ b/drivers/net/wireless/ath/ath9k/dynack.c |
4987 |
+@@ -300,9 +300,9 @@ void ath_dynack_node_init(struct ath_hw *ah, struct ath_node *an) |
4988 |
+ |
4989 |
+ an->ackto = ackto; |
4990 |
+ |
4991 |
+- spin_lock(&da->qlock); |
4992 |
++ spin_lock_bh(&da->qlock); |
4993 |
+ list_add_tail(&an->list, &da->nodes); |
4994 |
+- spin_unlock(&da->qlock); |
4995 |
++ spin_unlock_bh(&da->qlock); |
4996 |
+ } |
4997 |
+ EXPORT_SYMBOL(ath_dynack_node_init); |
4998 |
+ |
4999 |
+@@ -316,9 +316,9 @@ void ath_dynack_node_deinit(struct ath_hw *ah, struct ath_node *an) |
5000 |
+ { |
5001 |
+ struct ath_dynack *da = &ah->dynack; |
5002 |
+ |
5003 |
+- spin_lock(&da->qlock); |
5004 |
++ spin_lock_bh(&da->qlock); |
5005 |
+ list_del(&an->list); |
5006 |
+- spin_unlock(&da->qlock); |
5007 |
++ spin_unlock_bh(&da->qlock); |
5008 |
+ } |
5009 |
+ EXPORT_SYMBOL(ath_dynack_node_deinit); |
5010 |
+ |
5011 |
+diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/fw.c b/drivers/net/wireless/intel/iwlwifi/mvm/fw.c |
5012 |
+index 78228f870f8f..754dcc1c1f40 100644 |
5013 |
+--- a/drivers/net/wireless/intel/iwlwifi/mvm/fw.c |
5014 |
++++ b/drivers/net/wireless/intel/iwlwifi/mvm/fw.c |
5015 |
+@@ -107,12 +107,12 @@ static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm) |
5016 |
+ int i; |
5017 |
+ struct iwl_rss_config_cmd cmd = { |
5018 |
+ .flags = cpu_to_le32(IWL_RSS_ENABLE), |
5019 |
+- .hash_mask = IWL_RSS_HASH_TYPE_IPV4_TCP | |
5020 |
+- IWL_RSS_HASH_TYPE_IPV4_UDP | |
5021 |
+- IWL_RSS_HASH_TYPE_IPV4_PAYLOAD | |
5022 |
+- IWL_RSS_HASH_TYPE_IPV6_TCP | |
5023 |
+- IWL_RSS_HASH_TYPE_IPV6_UDP | |
5024 |
+- IWL_RSS_HASH_TYPE_IPV6_PAYLOAD, |
5025 |
++ .hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) | |
5026 |
++ BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) | |
5027 |
++ BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) | |
5028 |
++ BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) | |
5029 |
++ BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) | |
5030 |
++ BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD), |
5031 |
+ }; |
5032 |
+ |
5033 |
+ if (mvm->trans->num_rx_queues == 1) |
5034 |
+diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c b/drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c |
5035 |
+index 7fb8bbaf2142..1a12e829e98b 100644 |
5036 |
+--- a/drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c |
5037 |
++++ b/drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c |
5038 |
+@@ -871,12 +871,12 @@ void iwl_mvm_rx_mpdu_mq(struct iwl_mvm *mvm, struct napi_struct *napi, |
5039 |
+ bool toggle_bit = phy_info & IWL_RX_MPDU_PHY_AMPDU_TOGGLE; |
5040 |
+ |
5041 |
+ rx_status->flag |= RX_FLAG_AMPDU_DETAILS; |
5042 |
+- rx_status->ampdu_reference = mvm->ampdu_ref; |
5043 |
+ /* toggle is switched whenever new aggregation starts */ |
5044 |
+ if (toggle_bit != mvm->ampdu_toggle) { |
5045 |
+ mvm->ampdu_ref++; |
5046 |
+ mvm->ampdu_toggle = toggle_bit; |
5047 |
+ } |
5048 |
++ rx_status->ampdu_reference = mvm->ampdu_ref; |
5049 |
+ } |
5050 |
+ |
5051 |
+ rcu_read_lock(); |
5052 |
+diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/sta.c b/drivers/net/wireless/intel/iwlwifi/mvm/sta.c |
5053 |
+index 0cfdbaa2af3a..684c0f65a052 100644 |
5054 |
+--- a/drivers/net/wireless/intel/iwlwifi/mvm/sta.c |
5055 |
++++ b/drivers/net/wireless/intel/iwlwifi/mvm/sta.c |
5056 |
+@@ -2417,7 +2417,7 @@ int iwl_mvm_sta_tx_agg_start(struct iwl_mvm *mvm, struct ieee80211_vif *vif, |
5057 |
+ struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta); |
5058 |
+ struct iwl_mvm_tid_data *tid_data; |
5059 |
+ u16 normalized_ssn; |
5060 |
+- int txq_id; |
5061 |
++ u16 txq_id; |
5062 |
+ int ret; |
5063 |
+ |
5064 |
+ if (WARN_ON_ONCE(tid >= IWL_MAX_TID_COUNT)) |
5065 |
+@@ -2452,17 +2452,24 @@ int iwl_mvm_sta_tx_agg_start(struct iwl_mvm *mvm, struct ieee80211_vif *vif, |
5066 |
+ */ |
5067 |
+ txq_id = mvmsta->tid_data[tid].txq_id; |
5068 |
+ if (txq_id == IWL_MVM_INVALID_QUEUE) { |
5069 |
+- txq_id = iwl_mvm_find_free_queue(mvm, mvmsta->sta_id, |
5070 |
+- IWL_MVM_DQA_MIN_DATA_QUEUE, |
5071 |
+- IWL_MVM_DQA_MAX_DATA_QUEUE); |
5072 |
+- if (txq_id < 0) { |
5073 |
+- ret = txq_id; |
5074 |
++ ret = iwl_mvm_find_free_queue(mvm, mvmsta->sta_id, |
5075 |
++ IWL_MVM_DQA_MIN_DATA_QUEUE, |
5076 |
++ IWL_MVM_DQA_MAX_DATA_QUEUE); |
5077 |
++ if (ret < 0) { |
5078 |
+ IWL_ERR(mvm, "Failed to allocate agg queue\n"); |
5079 |
+ goto release_locks; |
5080 |
+ } |
5081 |
+ |
5082 |
++ txq_id = ret; |
5083 |
++ |
5084 |
+ /* TXQ hasn't yet been enabled, so mark it only as reserved */ |
5085 |
+ mvm->queue_info[txq_id].status = IWL_MVM_QUEUE_RESERVED; |
5086 |
++ } else if (WARN_ON(txq_id >= IWL_MAX_HW_QUEUES)) { |
5087 |
++ ret = -ENXIO; |
5088 |
++ IWL_ERR(mvm, "tid_id %d out of range (0, %d)!\n", |
5089 |
++ tid, IWL_MAX_HW_QUEUES - 1); |
5090 |
++ goto out; |
5091 |
++ |
5092 |
+ } else if (unlikely(mvm->queue_info[txq_id].status == |
5093 |
+ IWL_MVM_QUEUE_SHARED)) { |
5094 |
+ ret = -ENXIO; |
5095 |
+diff --git a/drivers/net/wireless/marvell/libertas_tf/cmd.c b/drivers/net/wireless/marvell/libertas_tf/cmd.c |
5096 |
+index 909ac3685010..2b193f1257a5 100644 |
5097 |
+--- a/drivers/net/wireless/marvell/libertas_tf/cmd.c |
5098 |
++++ b/drivers/net/wireless/marvell/libertas_tf/cmd.c |
5099 |
+@@ -69,7 +69,7 @@ static void lbtf_geo_init(struct lbtf_private *priv) |
5100 |
+ break; |
5101 |
+ } |
5102 |
+ |
5103 |
+- for (ch = priv->range.start; ch < priv->range.end; ch++) |
5104 |
++ for (ch = range->start; ch < range->end; ch++) |
5105 |
+ priv->channels[CHAN_TO_IDX(ch)].flags = 0; |
5106 |
+ } |
5107 |
+ |
5108 |
+diff --git a/drivers/net/wireless/mediatek/mt7601u/phy.c b/drivers/net/wireless/mediatek/mt7601u/phy.c |
5109 |
+index ca09a5d4305e..71a47459bf8a 100644 |
5110 |
+--- a/drivers/net/wireless/mediatek/mt7601u/phy.c |
5111 |
++++ b/drivers/net/wireless/mediatek/mt7601u/phy.c |
5112 |
+@@ -221,7 +221,7 @@ int mt7601u_wait_bbp_ready(struct mt7601u_dev *dev) |
5113 |
+ |
5114 |
+ do { |
5115 |
+ val = mt7601u_bbp_rr(dev, MT_BBP_REG_VERSION); |
5116 |
+- if (val && ~val) |
5117 |
++ if (val && val != 0xff) |
5118 |
+ break; |
5119 |
+ } while (--i); |
5120 |
+ |
5121 |
+diff --git a/drivers/ntb/hw/idt/ntb_hw_idt.c b/drivers/ntb/hw/idt/ntb_hw_idt.c |
5122 |
+index d44d7ef38fe8..b68e2cad74cc 100644 |
5123 |
+--- a/drivers/ntb/hw/idt/ntb_hw_idt.c |
5124 |
++++ b/drivers/ntb/hw/idt/ntb_hw_idt.c |
5125 |
+@@ -1105,9 +1105,9 @@ static struct idt_mw_cfg *idt_scan_mws(struct idt_ntb_dev *ndev, int port, |
5126 |
+ } |
5127 |
+ |
5128 |
+ /* Allocate memory for memory window descriptors */ |
5129 |
+- ret_mws = devm_kcalloc(&ndev->ntb.pdev->dev, *mw_cnt, |
5130 |
+- sizeof(*ret_mws), GFP_KERNEL); |
5131 |
+- if (IS_ERR_OR_NULL(ret_mws)) |
5132 |
++ ret_mws = devm_kcalloc(&ndev->ntb.pdev->dev, *mw_cnt, sizeof(*ret_mws), |
5133 |
++ GFP_KERNEL); |
5134 |
++ if (!ret_mws) |
5135 |
+ return ERR_PTR(-ENOMEM); |
5136 |
+ |
5137 |
+ /* Copy the info of detected memory windows */ |
5138 |
+@@ -2393,7 +2393,7 @@ static struct idt_ntb_dev *idt_create_dev(struct pci_dev *pdev, |
5139 |
+ |
5140 |
+ /* Allocate memory for the IDT PCIe-device descriptor */ |
5141 |
+ ndev = devm_kzalloc(&pdev->dev, sizeof(*ndev), GFP_KERNEL); |
5142 |
+- if (IS_ERR_OR_NULL(ndev)) { |
5143 |
++ if (!ndev) { |
5144 |
+ dev_err(&pdev->dev, "Memory allocation failed for descriptor"); |
5145 |
+ return ERR_PTR(-ENOMEM); |
5146 |
+ } |
5147 |
+diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c |
5148 |
+index cd11cced3678..3788c053a0b1 100644 |
5149 |
+--- a/drivers/nvme/host/pci.c |
5150 |
++++ b/drivers/nvme/host/pci.c |
5151 |
+@@ -2274,7 +2274,7 @@ static int nvme_pci_reg_write32(struct nvme_ctrl *ctrl, u32 off, u32 val) |
5152 |
+ |
5153 |
+ static int nvme_pci_reg_read64(struct nvme_ctrl *ctrl, u32 off, u64 *val) |
5154 |
+ { |
5155 |
+- *val = readq(to_nvme_dev(ctrl)->bar + off); |
5156 |
++ *val = lo_hi_readq(to_nvme_dev(ctrl)->bar + off); |
5157 |
+ return 0; |
5158 |
+ } |
5159 |
+ |
5160 |
+diff --git a/drivers/nvmem/imx-ocotp.c b/drivers/nvmem/imx-ocotp.c |
5161 |
+index 193ca8fd350a..0c8c3b9bb6a7 100644 |
5162 |
+--- a/drivers/nvmem/imx-ocotp.c |
5163 |
++++ b/drivers/nvmem/imx-ocotp.c |
5164 |
+@@ -199,7 +199,8 @@ static int imx_ocotp_write(void *context, unsigned int offset, void *val, |
5165 |
+ strobe_prog = clk_rate / (1000000000 / 10000) + 2 * (DEF_RELAX + 1) - 1; |
5166 |
+ strobe_read = clk_rate / (1000000000 / 40) + 2 * (DEF_RELAX + 1) - 1; |
5167 |
+ |
5168 |
+- timing = strobe_prog & 0x00000FFF; |
5169 |
++ timing = readl(priv->base + IMX_OCOTP_ADDR_TIMING) & 0x0FC00000; |
5170 |
++ timing |= strobe_prog & 0x00000FFF; |
5171 |
+ timing |= (relax << 12) & 0x0000F000; |
5172 |
+ timing |= (strobe_read << 16) & 0x003F0000; |
5173 |
+ |
5174 |
+diff --git a/drivers/of/of_mdio.c b/drivers/of/of_mdio.c |
5175 |
+index 8c1819230ed2..fe26697d3bd7 100644 |
5176 |
+--- a/drivers/of/of_mdio.c |
5177 |
++++ b/drivers/of/of_mdio.c |
5178 |
+@@ -358,7 +358,7 @@ struct phy_device *of_phy_get_and_connect(struct net_device *dev, |
5179 |
+ struct phy_device *phy; |
5180 |
+ |
5181 |
+ iface = of_get_phy_mode(np); |
5182 |
+- if (iface < 0) |
5183 |
++ if ((int)iface < 0) |
5184 |
+ return NULL; |
5185 |
+ |
5186 |
+ phy_np = of_parse_phandle(np, "phy-handle", 0); |
5187 |
+diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c |
5188 |
+index f9308c2f22e6..c2541a772abc 100644 |
5189 |
+--- a/drivers/pci/endpoint/functions/pci-epf-test.c |
5190 |
++++ b/drivers/pci/endpoint/functions/pci-epf-test.c |
5191 |
+@@ -177,7 +177,7 @@ static int pci_epf_test_read(struct pci_epf_test *epf_test) |
5192 |
+ goto err_map_addr; |
5193 |
+ } |
5194 |
+ |
5195 |
+- memcpy(buf, src_addr, reg->size); |
5196 |
++ memcpy_fromio(buf, src_addr, reg->size); |
5197 |
+ |
5198 |
+ crc32 = crc32_le(~0, buf, reg->size); |
5199 |
+ if (crc32 != reg->checksum) |
5200 |
+@@ -231,7 +231,7 @@ static int pci_epf_test_write(struct pci_epf_test *epf_test) |
5201 |
+ get_random_bytes(buf, reg->size); |
5202 |
+ reg->checksum = crc32_le(~0, buf, reg->size); |
5203 |
+ |
5204 |
+- memcpy(dst_addr, buf, reg->size); |
5205 |
++ memcpy_toio(dst_addr, buf, reg->size); |
5206 |
+ |
5207 |
+ /* |
5208 |
+ * wait 1ms inorder for the write to complete. Without this delay L3 |
5209 |
+diff --git a/drivers/pci/host/pcie-iproc.c b/drivers/pci/host/pcie-iproc.c |
5210 |
+index c0ecc9f35667..8f8dac0155d6 100644 |
5211 |
+--- a/drivers/pci/host/pcie-iproc.c |
5212 |
++++ b/drivers/pci/host/pcie-iproc.c |
5213 |
+@@ -573,14 +573,6 @@ static void __iomem *iproc_pcie_map_cfg_bus(struct iproc_pcie *pcie, |
5214 |
+ return (pcie->base + offset); |
5215 |
+ } |
5216 |
+ |
5217 |
+- /* |
5218 |
+- * PAXC is connected to an internally emulated EP within the SoC. It |
5219 |
+- * allows only one device. |
5220 |
+- */ |
5221 |
+- if (pcie->ep_is_internal) |
5222 |
+- if (slot > 0) |
5223 |
+- return NULL; |
5224 |
+- |
5225 |
+ return iproc_pcie_map_ep_cfg_reg(pcie, busno, slot, fn, where); |
5226 |
+ } |
5227 |
+ |
5228 |
+diff --git a/drivers/pci/switch/switchtec.c b/drivers/pci/switch/switchtec.c |
5229 |
+index 0941555b84a5..73dba2739849 100644 |
5230 |
+--- a/drivers/pci/switch/switchtec.c |
5231 |
++++ b/drivers/pci/switch/switchtec.c |
5232 |
+@@ -399,10 +399,6 @@ static void mrpc_cmd_submit(struct switchtec_dev *stdev) |
5233 |
+ stuser->data, stuser->data_len); |
5234 |
+ iowrite32(stuser->cmd, &stdev->mmio_mrpc->cmd); |
5235 |
+ |
5236 |
+- stuser->status = ioread32(&stdev->mmio_mrpc->status); |
5237 |
+- if (stuser->status != SWITCHTEC_MRPC_STATUS_INPROGRESS) |
5238 |
+- mrpc_complete_cmd(stdev); |
5239 |
+- |
5240 |
+ schedule_delayed_work(&stdev->mrpc_timeout, |
5241 |
+ msecs_to_jiffies(500)); |
5242 |
+ } |
5243 |
+diff --git a/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c b/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c |
5244 |
+index 85a8c97d9dfe..5fe419e468ec 100644 |
5245 |
+--- a/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c |
5246 |
++++ b/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c |
5247 |
+@@ -54,8 +54,12 @@ |
5248 |
+ /* drive strength control for ASIU GPIO */ |
5249 |
+ #define IPROC_GPIO_ASIU_DRV0_CTRL_OFFSET 0x58 |
5250 |
+ |
5251 |
+-/* drive strength control for CCM/CRMU (AON) GPIO */ |
5252 |
+-#define IPROC_GPIO_DRV0_CTRL_OFFSET 0x00 |
5253 |
++/* pinconf for CCM GPIO */ |
5254 |
++#define IPROC_GPIO_PULL_DN_OFFSET 0x10 |
5255 |
++#define IPROC_GPIO_PULL_UP_OFFSET 0x14 |
5256 |
++ |
5257 |
++/* pinconf for CRMU(aon) GPIO and CCM GPIO*/ |
5258 |
++#define IPROC_GPIO_DRV_CTRL_OFFSET 0x00 |
5259 |
+ |
5260 |
+ #define GPIO_BANK_SIZE 0x200 |
5261 |
+ #define NGPIOS_PER_BANK 32 |
5262 |
+@@ -76,6 +80,12 @@ enum iproc_pinconf_param { |
5263 |
+ IPROC_PINCON_MAX, |
5264 |
+ }; |
5265 |
+ |
5266 |
++enum iproc_pinconf_ctrl_type { |
5267 |
++ IOCTRL_TYPE_AON = 1, |
5268 |
++ IOCTRL_TYPE_CDRU, |
5269 |
++ IOCTRL_TYPE_INVALID, |
5270 |
++}; |
5271 |
++ |
5272 |
+ /* |
5273 |
+ * Iproc GPIO core |
5274 |
+ * |
5275 |
+@@ -100,6 +110,7 @@ struct iproc_gpio { |
5276 |
+ |
5277 |
+ void __iomem *base; |
5278 |
+ void __iomem *io_ctrl; |
5279 |
++ enum iproc_pinconf_ctrl_type io_ctrl_type; |
5280 |
+ |
5281 |
+ raw_spinlock_t lock; |
5282 |
+ |
5283 |
+@@ -461,20 +472,44 @@ static const struct pinctrl_ops iproc_pctrl_ops = { |
5284 |
+ static int iproc_gpio_set_pull(struct iproc_gpio *chip, unsigned gpio, |
5285 |
+ bool disable, bool pull_up) |
5286 |
+ { |
5287 |
++ void __iomem *base; |
5288 |
+ unsigned long flags; |
5289 |
++ unsigned int shift; |
5290 |
++ u32 val_1, val_2; |
5291 |
+ |
5292 |
+ raw_spin_lock_irqsave(&chip->lock, flags); |
5293 |
+- |
5294 |
+- if (disable) { |
5295 |
+- iproc_set_bit(chip, IPROC_GPIO_RES_EN_OFFSET, gpio, false); |
5296 |
++ if (chip->io_ctrl_type == IOCTRL_TYPE_CDRU) { |
5297 |
++ base = chip->io_ctrl; |
5298 |
++ shift = IPROC_GPIO_SHIFT(gpio); |
5299 |
++ |
5300 |
++ val_1 = readl(base + IPROC_GPIO_PULL_UP_OFFSET); |
5301 |
++ val_2 = readl(base + IPROC_GPIO_PULL_DN_OFFSET); |
5302 |
++ if (disable) { |
5303 |
++ /* no pull-up or pull-down */ |
5304 |
++ val_1 &= ~BIT(shift); |
5305 |
++ val_2 &= ~BIT(shift); |
5306 |
++ } else if (pull_up) { |
5307 |
++ val_1 |= BIT(shift); |
5308 |
++ val_2 &= ~BIT(shift); |
5309 |
++ } else { |
5310 |
++ val_1 &= ~BIT(shift); |
5311 |
++ val_2 |= BIT(shift); |
5312 |
++ } |
5313 |
++ writel(val_1, base + IPROC_GPIO_PULL_UP_OFFSET); |
5314 |
++ writel(val_2, base + IPROC_GPIO_PULL_DN_OFFSET); |
5315 |
+ } else { |
5316 |
+- iproc_set_bit(chip, IPROC_GPIO_PAD_RES_OFFSET, gpio, |
5317 |
+- pull_up); |
5318 |
+- iproc_set_bit(chip, IPROC_GPIO_RES_EN_OFFSET, gpio, true); |
5319 |
++ if (disable) { |
5320 |
++ iproc_set_bit(chip, IPROC_GPIO_RES_EN_OFFSET, gpio, |
5321 |
++ false); |
5322 |
++ } else { |
5323 |
++ iproc_set_bit(chip, IPROC_GPIO_PAD_RES_OFFSET, gpio, |
5324 |
++ pull_up); |
5325 |
++ iproc_set_bit(chip, IPROC_GPIO_RES_EN_OFFSET, gpio, |
5326 |
++ true); |
5327 |
++ } |
5328 |
+ } |
5329 |
+ |
5330 |
+ raw_spin_unlock_irqrestore(&chip->lock, flags); |
5331 |
+- |
5332 |
+ dev_dbg(chip->dev, "gpio:%u set pullup:%d\n", gpio, pull_up); |
5333 |
+ |
5334 |
+ return 0; |
5335 |
+@@ -483,14 +518,35 @@ static int iproc_gpio_set_pull(struct iproc_gpio *chip, unsigned gpio, |
5336 |
+ static void iproc_gpio_get_pull(struct iproc_gpio *chip, unsigned gpio, |
5337 |
+ bool *disable, bool *pull_up) |
5338 |
+ { |
5339 |
++ void __iomem *base; |
5340 |
+ unsigned long flags; |
5341 |
++ unsigned int shift; |
5342 |
++ u32 val_1, val_2; |
5343 |
+ |
5344 |
+ raw_spin_lock_irqsave(&chip->lock, flags); |
5345 |
+- *disable = !iproc_get_bit(chip, IPROC_GPIO_RES_EN_OFFSET, gpio); |
5346 |
+- *pull_up = iproc_get_bit(chip, IPROC_GPIO_PAD_RES_OFFSET, gpio); |
5347 |
++ if (chip->io_ctrl_type == IOCTRL_TYPE_CDRU) { |
5348 |
++ base = chip->io_ctrl; |
5349 |
++ shift = IPROC_GPIO_SHIFT(gpio); |
5350 |
++ |
5351 |
++ val_1 = readl(base + IPROC_GPIO_PULL_UP_OFFSET) & BIT(shift); |
5352 |
++ val_2 = readl(base + IPROC_GPIO_PULL_DN_OFFSET) & BIT(shift); |
5353 |
++ |
5354 |
++ *pull_up = val_1 ? true : false; |
5355 |
++ *disable = (val_1 | val_2) ? false : true; |
5356 |
++ |
5357 |
++ } else { |
5358 |
++ *disable = !iproc_get_bit(chip, IPROC_GPIO_RES_EN_OFFSET, gpio); |
5359 |
++ *pull_up = iproc_get_bit(chip, IPROC_GPIO_PAD_RES_OFFSET, gpio); |
5360 |
++ } |
5361 |
+ raw_spin_unlock_irqrestore(&chip->lock, flags); |
5362 |
+ } |
5363 |
+ |
5364 |
++#define DRV_STRENGTH_OFFSET(gpio, bit, type) ((type) == IOCTRL_TYPE_AON ? \ |
5365 |
++ ((2 - (bit)) * 4 + IPROC_GPIO_DRV_CTRL_OFFSET) : \ |
5366 |
++ ((type) == IOCTRL_TYPE_CDRU) ? \ |
5367 |
++ ((bit) * 4 + IPROC_GPIO_DRV_CTRL_OFFSET) : \ |
5368 |
++ ((bit) * 4 + IPROC_GPIO_REG(gpio, IPROC_GPIO_ASIU_DRV0_CTRL_OFFSET))) |
5369 |
++ |
5370 |
+ static int iproc_gpio_set_strength(struct iproc_gpio *chip, unsigned gpio, |
5371 |
+ unsigned strength) |
5372 |
+ { |
5373 |
+@@ -505,11 +561,8 @@ static int iproc_gpio_set_strength(struct iproc_gpio *chip, unsigned gpio, |
5374 |
+ |
5375 |
+ if (chip->io_ctrl) { |
5376 |
+ base = chip->io_ctrl; |
5377 |
+- offset = IPROC_GPIO_DRV0_CTRL_OFFSET; |
5378 |
+ } else { |
5379 |
+ base = chip->base; |
5380 |
+- offset = IPROC_GPIO_REG(gpio, |
5381 |
+- IPROC_GPIO_ASIU_DRV0_CTRL_OFFSET); |
5382 |
+ } |
5383 |
+ |
5384 |
+ shift = IPROC_GPIO_SHIFT(gpio); |
5385 |
+@@ -520,11 +573,11 @@ static int iproc_gpio_set_strength(struct iproc_gpio *chip, unsigned gpio, |
5386 |
+ raw_spin_lock_irqsave(&chip->lock, flags); |
5387 |
+ strength = (strength / 2) - 1; |
5388 |
+ for (i = 0; i < GPIO_DRV_STRENGTH_BITS; i++) { |
5389 |
++ offset = DRV_STRENGTH_OFFSET(gpio, i, chip->io_ctrl_type); |
5390 |
+ val = readl(base + offset); |
5391 |
+ val &= ~BIT(shift); |
5392 |
+ val |= ((strength >> i) & 0x1) << shift; |
5393 |
+ writel(val, base + offset); |
5394 |
+- offset += 4; |
5395 |
+ } |
5396 |
+ raw_spin_unlock_irqrestore(&chip->lock, flags); |
5397 |
+ |
5398 |
+@@ -541,11 +594,8 @@ static int iproc_gpio_get_strength(struct iproc_gpio *chip, unsigned gpio, |
5399 |
+ |
5400 |
+ if (chip->io_ctrl) { |
5401 |
+ base = chip->io_ctrl; |
5402 |
+- offset = IPROC_GPIO_DRV0_CTRL_OFFSET; |
5403 |
+ } else { |
5404 |
+ base = chip->base; |
5405 |
+- offset = IPROC_GPIO_REG(gpio, |
5406 |
+- IPROC_GPIO_ASIU_DRV0_CTRL_OFFSET); |
5407 |
+ } |
5408 |
+ |
5409 |
+ shift = IPROC_GPIO_SHIFT(gpio); |
5410 |
+@@ -553,10 +603,10 @@ static int iproc_gpio_get_strength(struct iproc_gpio *chip, unsigned gpio, |
5411 |
+ raw_spin_lock_irqsave(&chip->lock, flags); |
5412 |
+ *strength = 0; |
5413 |
+ for (i = 0; i < GPIO_DRV_STRENGTH_BITS; i++) { |
5414 |
++ offset = DRV_STRENGTH_OFFSET(gpio, i, chip->io_ctrl_type); |
5415 |
+ val = readl(base + offset) & BIT(shift); |
5416 |
+ val >>= shift; |
5417 |
+ *strength += (val << i); |
5418 |
+- offset += 4; |
5419 |
+ } |
5420 |
+ |
5421 |
+ /* convert to mA */ |
5422 |
+@@ -734,6 +784,7 @@ static int iproc_gpio_probe(struct platform_device *pdev) |
5423 |
+ u32 ngpios, pinconf_disable_mask = 0; |
5424 |
+ int irq, ret; |
5425 |
+ bool no_pinconf = false; |
5426 |
++ enum iproc_pinconf_ctrl_type io_ctrl_type = IOCTRL_TYPE_INVALID; |
5427 |
+ |
5428 |
+ /* NSP does not support drive strength config */ |
5429 |
+ if (of_device_is_compatible(dev->of_node, "brcm,iproc-nsp-gpio")) |
5430 |
+@@ -764,8 +815,15 @@ static int iproc_gpio_probe(struct platform_device *pdev) |
5431 |
+ dev_err(dev, "unable to map I/O memory\n"); |
5432 |
+ return PTR_ERR(chip->io_ctrl); |
5433 |
+ } |
5434 |
++ if (of_device_is_compatible(dev->of_node, |
5435 |
++ "brcm,cygnus-ccm-gpio")) |
5436 |
++ io_ctrl_type = IOCTRL_TYPE_CDRU; |
5437 |
++ else |
5438 |
++ io_ctrl_type = IOCTRL_TYPE_AON; |
5439 |
+ } |
5440 |
+ |
5441 |
++ chip->io_ctrl_type = io_ctrl_type; |
5442 |
++ |
5443 |
+ if (of_property_read_u32(dev->of_node, "ngpios", &ngpios)) { |
5444 |
+ dev_err(&pdev->dev, "missing ngpios DT property\n"); |
5445 |
+ return -ENODEV; |
5446 |
+diff --git a/drivers/pinctrl/sh-pfc/pfc-emev2.c b/drivers/pinctrl/sh-pfc/pfc-emev2.c |
5447 |
+index 1cbbe04d7df6..eafd8edbcbe9 100644 |
5448 |
+--- a/drivers/pinctrl/sh-pfc/pfc-emev2.c |
5449 |
++++ b/drivers/pinctrl/sh-pfc/pfc-emev2.c |
5450 |
+@@ -1263,6 +1263,14 @@ static const char * const dtv_groups[] = { |
5451 |
+ "dtv_b", |
5452 |
+ }; |
5453 |
+ |
5454 |
++static const char * const err_rst_reqb_groups[] = { |
5455 |
++ "err_rst_reqb", |
5456 |
++}; |
5457 |
++ |
5458 |
++static const char * const ext_clki_groups[] = { |
5459 |
++ "ext_clki", |
5460 |
++}; |
5461 |
++ |
5462 |
+ static const char * const iic0_groups[] = { |
5463 |
+ "iic0", |
5464 |
+ }; |
5465 |
+@@ -1285,6 +1293,10 @@ static const char * const lcd_groups[] = { |
5466 |
+ "yuv3", |
5467 |
+ }; |
5468 |
+ |
5469 |
++static const char * const lowpwr_groups[] = { |
5470 |
++ "lowpwr", |
5471 |
++}; |
5472 |
++ |
5473 |
+ static const char * const ntsc_groups[] = { |
5474 |
+ "ntsc_clk", |
5475 |
+ "ntsc_data", |
5476 |
+@@ -1298,6 +1310,10 @@ static const char * const pwm1_groups[] = { |
5477 |
+ "pwm1", |
5478 |
+ }; |
5479 |
+ |
5480 |
++static const char * const ref_clko_groups[] = { |
5481 |
++ "ref_clko", |
5482 |
++}; |
5483 |
++ |
5484 |
+ static const char * const sd_groups[] = { |
5485 |
+ "sd_cki", |
5486 |
+ }; |
5487 |
+@@ -1391,13 +1407,17 @@ static const struct sh_pfc_function pinmux_functions[] = { |
5488 |
+ SH_PFC_FUNCTION(cam), |
5489 |
+ SH_PFC_FUNCTION(cf), |
5490 |
+ SH_PFC_FUNCTION(dtv), |
5491 |
++ SH_PFC_FUNCTION(err_rst_reqb), |
5492 |
++ SH_PFC_FUNCTION(ext_clki), |
5493 |
+ SH_PFC_FUNCTION(iic0), |
5494 |
+ SH_PFC_FUNCTION(iic1), |
5495 |
+ SH_PFC_FUNCTION(jtag), |
5496 |
+ SH_PFC_FUNCTION(lcd), |
5497 |
++ SH_PFC_FUNCTION(lowpwr), |
5498 |
+ SH_PFC_FUNCTION(ntsc), |
5499 |
+ SH_PFC_FUNCTION(pwm0), |
5500 |
+ SH_PFC_FUNCTION(pwm1), |
5501 |
++ SH_PFC_FUNCTION(ref_clko), |
5502 |
+ SH_PFC_FUNCTION(sd), |
5503 |
+ SH_PFC_FUNCTION(sdi0), |
5504 |
+ SH_PFC_FUNCTION(sdi1), |
5505 |
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c |
5506 |
+index 35f436bcb849..e9739dbcb356 100644 |
5507 |
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c |
5508 |
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c |
5509 |
+@@ -1982,7 +1982,7 @@ static const unsigned int gether_gmii_pins[] = { |
5510 |
+ */ |
5511 |
+ 185, 186, 187, 188, 189, 190, 191, 192, 174, 161, 204, |
5512 |
+ 171, 170, 169, 168, 167, 166, 173, 172, 176, 184, 183, 203, |
5513 |
+- 205, 163, 206, 207, |
5514 |
++ 205, 163, 206, 207, 158, |
5515 |
+ }; |
5516 |
+ static const unsigned int gether_gmii_mux[] = { |
5517 |
+ ET_ERXD0_MARK, ET_ERXD1_MARK, ET_ERXD2_MARK, ET_ERXD3_MARK, |
5518 |
+@@ -2154,6 +2154,7 @@ static const unsigned int lcd0_data24_1_mux[] = { |
5519 |
+ LCD0_D0_MARK, LCD0_D1_MARK, LCD0_D2_MARK, LCD0_D3_MARK, |
5520 |
+ LCD0_D4_MARK, LCD0_D5_MARK, LCD0_D6_MARK, LCD0_D7_MARK, |
5521 |
+ LCD0_D8_MARK, LCD0_D9_MARK, LCD0_D10_MARK, LCD0_D11_MARK, |
5522 |
++ LCD0_D12_MARK, LCD0_D13_MARK, LCD0_D14_MARK, LCD0_D15_MARK, |
5523 |
+ LCD0_D16_MARK, LCD0_D17_MARK, LCD0_D18_PORT163_MARK, |
5524 |
+ LCD0_D19_PORT162_MARK, LCD0_D20_PORT161_MARK, LCD0_D21_PORT158_MARK, |
5525 |
+ LCD0_D22_PORT160_MARK, LCD0_D23_PORT159_MARK, |
5526 |
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c |
5527 |
+index c01ef02d326b..e4774b220040 100644 |
5528 |
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c |
5529 |
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c |
5530 |
+@@ -3220,8 +3220,7 @@ static const unsigned int qspi_data4_b_pins[] = { |
5531 |
+ RCAR_GP_PIN(6, 4), |
5532 |
+ }; |
5533 |
+ static const unsigned int qspi_data4_b_mux[] = { |
5534 |
+- SPCLK_B_MARK, MOSI_IO0_B_MARK, MISO_IO1_B_MARK, |
5535 |
+- IO2_B_MARK, IO3_B_MARK, SSL_B_MARK, |
5536 |
++ MOSI_IO0_B_MARK, MISO_IO1_B_MARK, IO2_B_MARK, IO3_B_MARK, |
5537 |
+ }; |
5538 |
+ /* - SCIF0 ------------------------------------------------------------------ */ |
5539 |
+ static const unsigned int scif0_data_pins[] = { |
5540 |
+@@ -4349,17 +4348,14 @@ static const unsigned int vin1_b_data18_pins[] = { |
5541 |
+ }; |
5542 |
+ static const unsigned int vin1_b_data18_mux[] = { |
5543 |
+ /* B */ |
5544 |
+- VI1_DATA0_B_MARK, VI1_DATA1_B_MARK, |
5545 |
+ VI1_DATA2_B_MARK, VI1_DATA3_B_MARK, |
5546 |
+ VI1_DATA4_B_MARK, VI1_DATA5_B_MARK, |
5547 |
+ VI1_DATA6_B_MARK, VI1_DATA7_B_MARK, |
5548 |
+ /* G */ |
5549 |
+- VI1_G0_B_MARK, VI1_G1_B_MARK, |
5550 |
+ VI1_G2_B_MARK, VI1_G3_B_MARK, |
5551 |
+ VI1_G4_B_MARK, VI1_G5_B_MARK, |
5552 |
+ VI1_G6_B_MARK, VI1_G7_B_MARK, |
5553 |
+ /* R */ |
5554 |
+- VI1_R0_B_MARK, VI1_R1_B_MARK, |
5555 |
+ VI1_R2_B_MARK, VI1_R3_B_MARK, |
5556 |
+ VI1_R4_B_MARK, VI1_R5_B_MARK, |
5557 |
+ VI1_R6_B_MARK, VI1_R7_B_MARK, |
5558 |
+@@ -5213,7 +5209,7 @@ static const char * const scifb2_groups[] = { |
5559 |
+ "scifb2_data_b", |
5560 |
+ "scifb2_clk_b", |
5561 |
+ "scifb2_ctrl_b", |
5562 |
+- "scifb0_data_c", |
5563 |
++ "scifb2_data_c", |
5564 |
+ "scifb2_clk_c", |
5565 |
+ "scifb2_data_d", |
5566 |
+ }; |
5567 |
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7792.c b/drivers/pinctrl/sh-pfc/pfc-r8a7792.c |
5568 |
+index cc3597f66605..46c41ca6ea38 100644 |
5569 |
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7792.c |
5570 |
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7792.c |
5571 |
+@@ -1916,6 +1916,7 @@ static const char * const vin1_groups[] = { |
5572 |
+ "vin1_data8", |
5573 |
+ "vin1_data24_b", |
5574 |
+ "vin1_data20_b", |
5575 |
++ "vin1_data18_b", |
5576 |
+ "vin1_data16_b", |
5577 |
+ "vin1_sync", |
5578 |
+ "vin1_field", |
5579 |
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7794.c b/drivers/pinctrl/sh-pfc/pfc-r8a7794.c |
5580 |
+index a0ed220071f5..93bdd3e8fb67 100644 |
5581 |
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7794.c |
5582 |
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7794.c |
5583 |
+@@ -4742,7 +4742,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { |
5584 |
+ FN_AVB_MDC, FN_SSI_SDATA6_B, 0, 0, } |
5585 |
+ }, |
5586 |
+ { PINMUX_CFG_REG_VAR("IPSR9", 0xE6060044, 32, |
5587 |
+- 1, 3, 3, 3, 3, 2, 2, 3, 3, 3, 3, 3, 3) { |
5588 |
++ 1, 3, 3, 3, 3, 2, 2, 3, 3, 3, 3, 3) { |
5589 |
+ /* IP9_31 [1] */ |
5590 |
+ 0, 0, |
5591 |
+ /* IP9_30_28 [3] */ |
5592 |
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c |
5593 |
+index 4f5ee1d7317d..36421df1b326 100644 |
5594 |
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c |
5595 |
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c |
5596 |
+@@ -391,10 +391,10 @@ FM(IP12_31_28) IP12_31_28 \ |
5597 |
+ #define MOD_SEL0_27 FM(SEL_MSIOF3_0) FM(SEL_MSIOF3_1) |
5598 |
+ #define MOD_SEL0_26 FM(SEL_HSCIF3_0) FM(SEL_HSCIF3_1) |
5599 |
+ #define MOD_SEL0_25 FM(SEL_SCIF4_0) FM(SEL_SCIF4_1) |
5600 |
+-#define MOD_SEL0_24_23 FM(SEL_PWM0_0) FM(SEL_PWM0_1) FM(SEL_PWM0_2) FM(SEL_PWM0_3) |
5601 |
+-#define MOD_SEL0_22_21 FM(SEL_PWM1_0) FM(SEL_PWM1_1) FM(SEL_PWM1_2) FM(SEL_PWM1_3) |
5602 |
+-#define MOD_SEL0_20_19 FM(SEL_PWM2_0) FM(SEL_PWM2_1) FM(SEL_PWM2_2) FM(SEL_PWM2_3) |
5603 |
+-#define MOD_SEL0_18_17 FM(SEL_PWM3_0) FM(SEL_PWM3_1) FM(SEL_PWM3_2) FM(SEL_PWM3_3) |
5604 |
++#define MOD_SEL0_24_23 FM(SEL_PWM0_0) FM(SEL_PWM0_1) FM(SEL_PWM0_2) F_(0, 0) |
5605 |
++#define MOD_SEL0_22_21 FM(SEL_PWM1_0) FM(SEL_PWM1_1) FM(SEL_PWM1_2) F_(0, 0) |
5606 |
++#define MOD_SEL0_20_19 FM(SEL_PWM2_0) FM(SEL_PWM2_1) FM(SEL_PWM2_2) F_(0, 0) |
5607 |
++#define MOD_SEL0_18_17 FM(SEL_PWM3_0) FM(SEL_PWM3_1) FM(SEL_PWM3_2) F_(0, 0) |
5608 |
+ #define MOD_SEL0_15 FM(SEL_IRQ_0_0) FM(SEL_IRQ_0_1) |
5609 |
+ #define MOD_SEL0_14 FM(SEL_IRQ_1_0) FM(SEL_IRQ_1_1) |
5610 |
+ #define MOD_SEL0_13 FM(SEL_IRQ_2_0) FM(SEL_IRQ_2_1) |
5611 |
+diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7269.c b/drivers/pinctrl/sh-pfc/pfc-sh7269.c |
5612 |
+index a50d22bef1f4..cfdb4fc177c3 100644 |
5613 |
+--- a/drivers/pinctrl/sh-pfc/pfc-sh7269.c |
5614 |
++++ b/drivers/pinctrl/sh-pfc/pfc-sh7269.c |
5615 |
+@@ -2119,7 +2119,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { |
5616 |
+ }, |
5617 |
+ |
5618 |
+ { PINMUX_CFG_REG("PCIOR0", 0xfffe3852, 16, 1) { |
5619 |
+- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
5620 |
++ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
5621 |
+ PC8_IN, PC8_OUT, |
5622 |
+ PC7_IN, PC7_OUT, |
5623 |
+ PC6_IN, PC6_OUT, |
5624 |
+diff --git a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c |
5625 |
+index d25e6f674d0a..6dca760f9f28 100644 |
5626 |
+--- a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c |
5627 |
++++ b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c |
5628 |
+@@ -3086,6 +3086,7 @@ static const unsigned int tpu4_to2_mux[] = { |
5629 |
+ }; |
5630 |
+ static const unsigned int tpu4_to3_pins[] = { |
5631 |
+ /* TO */ |
5632 |
++ PIN_NUMBER(6, 26), |
5633 |
+ }; |
5634 |
+ static const unsigned int tpu4_to3_mux[] = { |
5635 |
+ TPU4TO3_MARK, |
5636 |
+@@ -3366,7 +3367,8 @@ static const char * const fsic_groups[] = { |
5637 |
+ "fsic_sclk_out", |
5638 |
+ "fsic_data_in", |
5639 |
+ "fsic_data_out", |
5640 |
+- "fsic_spdif", |
5641 |
++ "fsic_spdif_0", |
5642 |
++ "fsic_spdif_1", |
5643 |
+ }; |
5644 |
+ |
5645 |
+ static const char * const fsid_groups[] = { |
5646 |
+diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7734.c b/drivers/pinctrl/sh-pfc/pfc-sh7734.c |
5647 |
+index 3eccc9b3ca84..c691e5e9d9de 100644 |
5648 |
+--- a/drivers/pinctrl/sh-pfc/pfc-sh7734.c |
5649 |
++++ b/drivers/pinctrl/sh-pfc/pfc-sh7734.c |
5650 |
+@@ -2231,13 +2231,13 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { |
5651 |
+ FN_LCD_CL1_B, 0, 0, |
5652 |
+ /* IP10_5_3 [3] */ |
5653 |
+ FN_SSI_WS23, FN_VI1_5_B, FN_TX1_D, FN_HSCK0_C, FN_FALE_B, |
5654 |
+- FN_LCD_DON_B, 0, 0, 0, |
5655 |
++ FN_LCD_DON_B, 0, 0, |
5656 |
+ /* IP10_2_0 [3] */ |
5657 |
+ FN_SSI_SCK23, FN_VI1_4_B, FN_RX1_D, FN_FCLE_B, |
5658 |
+ FN_LCD_DATA15_B, 0, 0, 0 } |
5659 |
+ }, |
5660 |
+ { PINMUX_CFG_REG_VAR("IPSR11", 0xFFFC0048, 32, |
5661 |
+- 3, 1, 2, 2, 2, 3, 3, 1, 2, 3, 3, 1, 1, 1, 1) { |
5662 |
++ 3, 1, 2, 3, 2, 2, 3, 3, 1, 2, 3, 3, 1, 1, 1, 1) { |
5663 |
+ /* IP11_31_29 [3] */ |
5664 |
+ 0, 0, 0, 0, 0, 0, 0, 0, |
5665 |
+ /* IP11_28 [1] */ |
5666 |
+diff --git a/drivers/platform/mips/cpu_hwmon.c b/drivers/platform/mips/cpu_hwmon.c |
5667 |
+index 322de58eebaf..02484ae9a116 100644 |
5668 |
+--- a/drivers/platform/mips/cpu_hwmon.c |
5669 |
++++ b/drivers/platform/mips/cpu_hwmon.c |
5670 |
+@@ -158,7 +158,7 @@ static int __init loongson_hwmon_init(void) |
5671 |
+ |
5672 |
+ cpu_hwmon_dev = hwmon_device_register(NULL); |
5673 |
+ if (IS_ERR(cpu_hwmon_dev)) { |
5674 |
+- ret = -ENOMEM; |
5675 |
++ ret = PTR_ERR(cpu_hwmon_dev); |
5676 |
+ pr_err("hwmon_device_register fail!\n"); |
5677 |
+ goto fail_hwmon_device_register; |
5678 |
+ } |
5679 |
+diff --git a/drivers/platform/x86/alienware-wmi.c b/drivers/platform/x86/alienware-wmi.c |
5680 |
+index e335b18da20f..2c82188f8486 100644 |
5681 |
+--- a/drivers/platform/x86/alienware-wmi.c |
5682 |
++++ b/drivers/platform/x86/alienware-wmi.c |
5683 |
+@@ -505,23 +505,22 @@ static acpi_status alienware_wmax_command(struct wmax_basic_args *in_args, |
5684 |
+ |
5685 |
+ input.length = (acpi_size) sizeof(*in_args); |
5686 |
+ input.pointer = in_args; |
5687 |
+- if (out_data != NULL) { |
5688 |
++ if (out_data) { |
5689 |
+ output.length = ACPI_ALLOCATE_BUFFER; |
5690 |
+ output.pointer = NULL; |
5691 |
+ status = wmi_evaluate_method(WMAX_CONTROL_GUID, 0, |
5692 |
+ command, &input, &output); |
5693 |
+- } else |
5694 |
++ if (ACPI_SUCCESS(status)) { |
5695 |
++ obj = (union acpi_object *)output.pointer; |
5696 |
++ if (obj && obj->type == ACPI_TYPE_INTEGER) |
5697 |
++ *out_data = (u32)obj->integer.value; |
5698 |
++ } |
5699 |
++ kfree(output.pointer); |
5700 |
++ } else { |
5701 |
+ status = wmi_evaluate_method(WMAX_CONTROL_GUID, 0, |
5702 |
+ command, &input, NULL); |
5703 |
+- |
5704 |
+- if (ACPI_SUCCESS(status) && out_data != NULL) { |
5705 |
+- obj = (union acpi_object *)output.pointer; |
5706 |
+- if (obj && obj->type == ACPI_TYPE_INTEGER) |
5707 |
+- *out_data = (u32) obj->integer.value; |
5708 |
+ } |
5709 |
+- kfree(output.pointer); |
5710 |
+ return status; |
5711 |
+- |
5712 |
+ } |
5713 |
+ |
5714 |
+ /* |
5715 |
+@@ -571,7 +570,7 @@ static ssize_t show_hdmi_source(struct device *dev, |
5716 |
+ return scnprintf(buf, PAGE_SIZE, |
5717 |
+ "input [gpu] unknown\n"); |
5718 |
+ } |
5719 |
+- pr_err("alienware-wmi: unknown HDMI source status: %d\n", out_data); |
5720 |
++ pr_err("alienware-wmi: unknown HDMI source status: %u\n", status); |
5721 |
+ return scnprintf(buf, PAGE_SIZE, "input gpu [unknown]\n"); |
5722 |
+ } |
5723 |
+ |
5724 |
+diff --git a/drivers/platform/x86/wmi.c b/drivers/platform/x86/wmi.c |
5725 |
+index 7f8fa42a1084..a56e997816b2 100644 |
5726 |
+--- a/drivers/platform/x86/wmi.c |
5727 |
++++ b/drivers/platform/x86/wmi.c |
5728 |
+@@ -748,6 +748,9 @@ static int wmi_dev_match(struct device *dev, struct device_driver *driver) |
5729 |
+ struct wmi_block *wblock = dev_to_wblock(dev); |
5730 |
+ const struct wmi_device_id *id = wmi_driver->id_table; |
5731 |
+ |
5732 |
++ if (id == NULL) |
5733 |
++ return 0; |
5734 |
++ |
5735 |
+ while (id->guid_string) { |
5736 |
+ uuid_le driver_guid; |
5737 |
+ |
5738 |
+diff --git a/drivers/power/supply/power_supply_core.c b/drivers/power/supply/power_supply_core.c |
5739 |
+index 3226faebe0a0..0f1a0efd5926 100644 |
5740 |
+--- a/drivers/power/supply/power_supply_core.c |
5741 |
++++ b/drivers/power/supply/power_supply_core.c |
5742 |
+@@ -891,14 +891,14 @@ __power_supply_register(struct device *parent, |
5743 |
+ } |
5744 |
+ |
5745 |
+ spin_lock_init(&psy->changed_lock); |
5746 |
+- rc = device_init_wakeup(dev, ws); |
5747 |
+- if (rc) |
5748 |
+- goto wakeup_init_failed; |
5749 |
+- |
5750 |
+ rc = device_add(dev); |
5751 |
+ if (rc) |
5752 |
+ goto device_add_failed; |
5753 |
+ |
5754 |
++ rc = device_init_wakeup(dev, ws); |
5755 |
++ if (rc) |
5756 |
++ goto wakeup_init_failed; |
5757 |
++ |
5758 |
+ rc = psy_register_thermal(psy); |
5759 |
+ if (rc) |
5760 |
+ goto register_thermal_failed; |
5761 |
+@@ -935,8 +935,8 @@ register_cooler_failed: |
5762 |
+ psy_unregister_thermal(psy); |
5763 |
+ register_thermal_failed: |
5764 |
+ device_del(dev); |
5765 |
+-device_add_failed: |
5766 |
+ wakeup_init_failed: |
5767 |
++device_add_failed: |
5768 |
+ check_supplies_failed: |
5769 |
+ dev_set_name_failed: |
5770 |
+ put_device(dev); |
5771 |
+diff --git a/drivers/pwm/pwm-lpss.c b/drivers/pwm/pwm-lpss.c |
5772 |
+index 1e69c1c9ec09..7a4a6406cf69 100644 |
5773 |
+--- a/drivers/pwm/pwm-lpss.c |
5774 |
++++ b/drivers/pwm/pwm-lpss.c |
5775 |
+@@ -216,6 +216,12 @@ EXPORT_SYMBOL_GPL(pwm_lpss_probe); |
5776 |
+ |
5777 |
+ int pwm_lpss_remove(struct pwm_lpss_chip *lpwm) |
5778 |
+ { |
5779 |
++ int i; |
5780 |
++ |
5781 |
++ for (i = 0; i < lpwm->info->npwm; i++) { |
5782 |
++ if (pwm_is_enabled(&lpwm->chip.pwms[i])) |
5783 |
++ pm_runtime_put(lpwm->chip.dev); |
5784 |
++ } |
5785 |
+ return pwmchip_remove(&lpwm->chip); |
5786 |
+ } |
5787 |
+ EXPORT_SYMBOL_GPL(pwm_lpss_remove); |
5788 |
+diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c |
5789 |
+index 9b79cbc7a715..3d2c36963a4f 100644 |
5790 |
+--- a/drivers/pwm/pwm-meson.c |
5791 |
++++ b/drivers/pwm/pwm-meson.c |
5792 |
+@@ -188,7 +188,7 @@ static int meson_pwm_calc(struct meson_pwm *meson, |
5793 |
+ do_div(fin_ps, fin_freq); |
5794 |
+ |
5795 |
+ /* Calc pre_div with the period */ |
5796 |
+- for (pre_div = 0; pre_div < MISC_CLK_DIV_MASK; pre_div++) { |
5797 |
++ for (pre_div = 0; pre_div <= MISC_CLK_DIV_MASK; pre_div++) { |
5798 |
+ cnt = DIV_ROUND_CLOSEST_ULL((u64)period * 1000, |
5799 |
+ fin_ps * (pre_div + 1)); |
5800 |
+ dev_dbg(meson->chip.dev, "fin_ps=%llu pre_div=%u cnt=%u\n", |
5801 |
+@@ -197,7 +197,7 @@ static int meson_pwm_calc(struct meson_pwm *meson, |
5802 |
+ break; |
5803 |
+ } |
5804 |
+ |
5805 |
+- if (pre_div == MISC_CLK_DIV_MASK) { |
5806 |
++ if (pre_div > MISC_CLK_DIV_MASK) { |
5807 |
+ dev_err(meson->chip.dev, "unable to get period pre_div\n"); |
5808 |
+ return -EINVAL; |
5809 |
+ } |
5810 |
+@@ -325,11 +325,6 @@ static int meson_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, |
5811 |
+ if (state->period != channel->state.period || |
5812 |
+ state->duty_cycle != channel->state.duty_cycle || |
5813 |
+ state->polarity != channel->state.polarity) { |
5814 |
+- if (channel->state.enabled) { |
5815 |
+- meson_pwm_disable(meson, pwm->hwpwm); |
5816 |
+- channel->state.enabled = false; |
5817 |
+- } |
5818 |
+- |
5819 |
+ if (state->polarity != channel->state.polarity) { |
5820 |
+ if (state->polarity == PWM_POLARITY_NORMAL) |
5821 |
+ meson->inverter_mask |= BIT(pwm->hwpwm); |
5822 |
+diff --git a/drivers/rapidio/rio_cm.c b/drivers/rapidio/rio_cm.c |
5823 |
+index ef989a15aefc..b29fc258eeba 100644 |
5824 |
+--- a/drivers/rapidio/rio_cm.c |
5825 |
++++ b/drivers/rapidio/rio_cm.c |
5826 |
+@@ -1215,7 +1215,9 @@ static int riocm_ch_listen(u16 ch_id) |
5827 |
+ riocm_debug(CHOP, "(ch_%d)", ch_id); |
5828 |
+ |
5829 |
+ ch = riocm_get_channel(ch_id); |
5830 |
+- if (!ch || !riocm_cmp_exch(ch, RIO_CM_CHAN_BOUND, RIO_CM_LISTEN)) |
5831 |
++ if (!ch) |
5832 |
++ return -EINVAL; |
5833 |
++ if (!riocm_cmp_exch(ch, RIO_CM_CHAN_BOUND, RIO_CM_LISTEN)) |
5834 |
+ ret = -EINVAL; |
5835 |
+ riocm_put_channel(ch); |
5836 |
+ return ret; |
5837 |
+diff --git a/drivers/regulator/lp87565-regulator.c b/drivers/regulator/lp87565-regulator.c |
5838 |
+index cfdbe294fb6a..32d4e6ec2e19 100644 |
5839 |
+--- a/drivers/regulator/lp87565-regulator.c |
5840 |
++++ b/drivers/regulator/lp87565-regulator.c |
5841 |
+@@ -188,7 +188,7 @@ static int lp87565_regulator_probe(struct platform_device *pdev) |
5842 |
+ struct lp87565 *lp87565 = dev_get_drvdata(pdev->dev.parent); |
5843 |
+ struct regulator_config config = { }; |
5844 |
+ struct regulator_dev *rdev; |
5845 |
+- int i, min_idx = LP87565_BUCK_1, max_idx = LP87565_BUCK_3; |
5846 |
++ int i, min_idx = LP87565_BUCK_0, max_idx = LP87565_BUCK_3; |
5847 |
+ |
5848 |
+ platform_set_drvdata(pdev, lp87565); |
5849 |
+ |
5850 |
+diff --git a/drivers/regulator/pv88060-regulator.c b/drivers/regulator/pv88060-regulator.c |
5851 |
+index a9446056435f..1f2d8180506b 100644 |
5852 |
+--- a/drivers/regulator/pv88060-regulator.c |
5853 |
++++ b/drivers/regulator/pv88060-regulator.c |
5854 |
+@@ -135,7 +135,7 @@ static int pv88060_set_current_limit(struct regulator_dev *rdev, int min, |
5855 |
+ int i; |
5856 |
+ |
5857 |
+ /* search for closest to maximum */ |
5858 |
+- for (i = info->n_current_limits; i >= 0; i--) { |
5859 |
++ for (i = info->n_current_limits - 1; i >= 0; i--) { |
5860 |
+ if (min <= info->current_limits[i] |
5861 |
+ && max >= info->current_limits[i]) { |
5862 |
+ return regmap_update_bits(rdev->regmap, |
5863 |
+diff --git a/drivers/regulator/pv88080-regulator.c b/drivers/regulator/pv88080-regulator.c |
5864 |
+index 9a08cb2de501..6770e4de2097 100644 |
5865 |
+--- a/drivers/regulator/pv88080-regulator.c |
5866 |
++++ b/drivers/regulator/pv88080-regulator.c |
5867 |
+@@ -279,7 +279,7 @@ static int pv88080_set_current_limit(struct regulator_dev *rdev, int min, |
5868 |
+ int i; |
5869 |
+ |
5870 |
+ /* search for closest to maximum */ |
5871 |
+- for (i = info->n_current_limits; i >= 0; i--) { |
5872 |
++ for (i = info->n_current_limits - 1; i >= 0; i--) { |
5873 |
+ if (min <= info->current_limits[i] |
5874 |
+ && max >= info->current_limits[i]) { |
5875 |
+ return regmap_update_bits(rdev->regmap, |
5876 |
+diff --git a/drivers/regulator/pv88090-regulator.c b/drivers/regulator/pv88090-regulator.c |
5877 |
+index 7a0c15957bd0..2302b0df7630 100644 |
5878 |
+--- a/drivers/regulator/pv88090-regulator.c |
5879 |
++++ b/drivers/regulator/pv88090-regulator.c |
5880 |
+@@ -157,7 +157,7 @@ static int pv88090_set_current_limit(struct regulator_dev *rdev, int min, |
5881 |
+ int i; |
5882 |
+ |
5883 |
+ /* search for closest to maximum */ |
5884 |
+- for (i = info->n_current_limits; i >= 0; i--) { |
5885 |
++ for (i = info->n_current_limits - 1; i >= 0; i--) { |
5886 |
+ if (min <= info->current_limits[i] |
5887 |
+ && max >= info->current_limits[i]) { |
5888 |
+ return regmap_update_bits(rdev->regmap, |
5889 |
+diff --git a/drivers/regulator/tps65086-regulator.c b/drivers/regulator/tps65086-regulator.c |
5890 |
+index 45e96e154690..5a5e9b5bf4be 100644 |
5891 |
+--- a/drivers/regulator/tps65086-regulator.c |
5892 |
++++ b/drivers/regulator/tps65086-regulator.c |
5893 |
+@@ -90,8 +90,8 @@ static const struct regulator_linear_range tps65086_buck345_25mv_ranges[] = { |
5894 |
+ static const struct regulator_linear_range tps65086_ldoa1_ranges[] = { |
5895 |
+ REGULATOR_LINEAR_RANGE(1350000, 0x0, 0x0, 0), |
5896 |
+ REGULATOR_LINEAR_RANGE(1500000, 0x1, 0x7, 100000), |
5897 |
+- REGULATOR_LINEAR_RANGE(2300000, 0x8, 0xA, 100000), |
5898 |
+- REGULATOR_LINEAR_RANGE(2700000, 0xB, 0xD, 150000), |
5899 |
++ REGULATOR_LINEAR_RANGE(2300000, 0x8, 0xB, 100000), |
5900 |
++ REGULATOR_LINEAR_RANGE(2850000, 0xC, 0xD, 150000), |
5901 |
+ REGULATOR_LINEAR_RANGE(3300000, 0xE, 0xE, 0), |
5902 |
+ }; |
5903 |
+ |
5904 |
+diff --git a/drivers/regulator/wm831x-dcdc.c b/drivers/regulator/wm831x-dcdc.c |
5905 |
+index 5a5bc4bb08d2..df591435d12a 100644 |
5906 |
+--- a/drivers/regulator/wm831x-dcdc.c |
5907 |
++++ b/drivers/regulator/wm831x-dcdc.c |
5908 |
+@@ -327,8 +327,8 @@ static int wm831x_buckv_get_voltage_sel(struct regulator_dev *rdev) |
5909 |
+ } |
5910 |
+ |
5911 |
+ /* Current limit options */ |
5912 |
+-static u16 wm831x_dcdc_ilim[] = { |
5913 |
+- 125, 250, 375, 500, 625, 750, 875, 1000 |
5914 |
++static const unsigned int wm831x_dcdc_ilim[] = { |
5915 |
++ 125000, 250000, 375000, 500000, 625000, 750000, 875000, 1000000 |
5916 |
+ }; |
5917 |
+ |
5918 |
+ static int wm831x_buckv_set_current_limit(struct regulator_dev *rdev, |
5919 |
+diff --git a/drivers/rtc/rtc-88pm80x.c b/drivers/rtc/rtc-88pm80x.c |
5920 |
+index 466bf7f9a285..7da2a1fb50f8 100644 |
5921 |
+--- a/drivers/rtc/rtc-88pm80x.c |
5922 |
++++ b/drivers/rtc/rtc-88pm80x.c |
5923 |
+@@ -116,12 +116,14 @@ static int pm80x_rtc_read_time(struct device *dev, struct rtc_time *tm) |
5924 |
+ unsigned char buf[4]; |
5925 |
+ unsigned long ticks, base, data; |
5926 |
+ regmap_raw_read(info->map, PM800_RTC_EXPIRE2_1, buf, 4); |
5927 |
+- base = (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0]; |
5928 |
++ base = ((unsigned long)buf[3] << 24) | (buf[2] << 16) | |
5929 |
++ (buf[1] << 8) | buf[0]; |
5930 |
+ dev_dbg(info->dev, "%x-%x-%x-%x\n", buf[0], buf[1], buf[2], buf[3]); |
5931 |
+ |
5932 |
+ /* load 32-bit read-only counter */ |
5933 |
+ regmap_raw_read(info->map, PM800_RTC_COUNTER1, buf, 4); |
5934 |
+- data = (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0]; |
5935 |
++ data = ((unsigned long)buf[3] << 24) | (buf[2] << 16) | |
5936 |
++ (buf[1] << 8) | buf[0]; |
5937 |
+ ticks = base + data; |
5938 |
+ dev_dbg(info->dev, "get base:0x%lx, RO count:0x%lx, ticks:0x%lx\n", |
5939 |
+ base, data, ticks); |
5940 |
+@@ -144,7 +146,8 @@ static int pm80x_rtc_set_time(struct device *dev, struct rtc_time *tm) |
5941 |
+ |
5942 |
+ /* load 32-bit read-only counter */ |
5943 |
+ regmap_raw_read(info->map, PM800_RTC_COUNTER1, buf, 4); |
5944 |
+- data = (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0]; |
5945 |
++ data = ((unsigned long)buf[3] << 24) | (buf[2] << 16) | |
5946 |
++ (buf[1] << 8) | buf[0]; |
5947 |
+ base = ticks - data; |
5948 |
+ dev_dbg(info->dev, "set base:0x%lx, RO count:0x%lx, ticks:0x%lx\n", |
5949 |
+ base, data, ticks); |
5950 |
+@@ -165,11 +168,13 @@ static int pm80x_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) |
5951 |
+ int ret; |
5952 |
+ |
5953 |
+ regmap_raw_read(info->map, PM800_RTC_EXPIRE2_1, buf, 4); |
5954 |
+- base = (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0]; |
5955 |
++ base = ((unsigned long)buf[3] << 24) | (buf[2] << 16) | |
5956 |
++ (buf[1] << 8) | buf[0]; |
5957 |
+ dev_dbg(info->dev, "%x-%x-%x-%x\n", buf[0], buf[1], buf[2], buf[3]); |
5958 |
+ |
5959 |
+ regmap_raw_read(info->map, PM800_RTC_EXPIRE1_1, buf, 4); |
5960 |
+- data = (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0]; |
5961 |
++ data = ((unsigned long)buf[3] << 24) | (buf[2] << 16) | |
5962 |
++ (buf[1] << 8) | buf[0]; |
5963 |
+ ticks = base + data; |
5964 |
+ dev_dbg(info->dev, "get base:0x%lx, RO count:0x%lx, ticks:0x%lx\n", |
5965 |
+ base, data, ticks); |
5966 |
+@@ -192,12 +197,14 @@ static int pm80x_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) |
5967 |
+ regmap_update_bits(info->map, PM800_RTC_CONTROL, PM800_ALARM1_EN, 0); |
5968 |
+ |
5969 |
+ regmap_raw_read(info->map, PM800_RTC_EXPIRE2_1, buf, 4); |
5970 |
+- base = (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0]; |
5971 |
++ base = ((unsigned long)buf[3] << 24) | (buf[2] << 16) | |
5972 |
++ (buf[1] << 8) | buf[0]; |
5973 |
+ dev_dbg(info->dev, "%x-%x-%x-%x\n", buf[0], buf[1], buf[2], buf[3]); |
5974 |
+ |
5975 |
+ /* load 32-bit read-only counter */ |
5976 |
+ regmap_raw_read(info->map, PM800_RTC_COUNTER1, buf, 4); |
5977 |
+- data = (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0]; |
5978 |
++ data = ((unsigned long)buf[3] << 24) | (buf[2] << 16) | |
5979 |
++ (buf[1] << 8) | buf[0]; |
5980 |
+ ticks = base + data; |
5981 |
+ dev_dbg(info->dev, "get base:0x%lx, RO count:0x%lx, ticks:0x%lx\n", |
5982 |
+ base, data, ticks); |
5983 |
+diff --git a/drivers/rtc/rtc-88pm860x.c b/drivers/rtc/rtc-88pm860x.c |
5984 |
+index 166faae3a59c..7d3e5168fcef 100644 |
5985 |
+--- a/drivers/rtc/rtc-88pm860x.c |
5986 |
++++ b/drivers/rtc/rtc-88pm860x.c |
5987 |
+@@ -115,11 +115,13 @@ static int pm860x_rtc_read_time(struct device *dev, struct rtc_time *tm) |
5988 |
+ pm860x_page_bulk_read(info->i2c, REG0_ADDR, 8, buf); |
5989 |
+ dev_dbg(info->dev, "%x-%x-%x-%x-%x-%x-%x-%x\n", buf[0], buf[1], |
5990 |
+ buf[2], buf[3], buf[4], buf[5], buf[6], buf[7]); |
5991 |
+- base = (buf[1] << 24) | (buf[3] << 16) | (buf[5] << 8) | buf[7]; |
5992 |
++ base = ((unsigned long)buf[1] << 24) | (buf[3] << 16) | |
5993 |
++ (buf[5] << 8) | buf[7]; |
5994 |
+ |
5995 |
+ /* load 32-bit read-only counter */ |
5996 |
+ pm860x_bulk_read(info->i2c, PM8607_RTC_COUNTER1, 4, buf); |
5997 |
+- data = (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0]; |
5998 |
++ data = ((unsigned long)buf[3] << 24) | (buf[2] << 16) | |
5999 |
++ (buf[1] << 8) | buf[0]; |
6000 |
+ ticks = base + data; |
6001 |
+ dev_dbg(info->dev, "get base:0x%lx, RO count:0x%lx, ticks:0x%lx\n", |
6002 |
+ base, data, ticks); |
6003 |
+@@ -145,7 +147,8 @@ static int pm860x_rtc_set_time(struct device *dev, struct rtc_time *tm) |
6004 |
+ |
6005 |
+ /* load 32-bit read-only counter */ |
6006 |
+ pm860x_bulk_read(info->i2c, PM8607_RTC_COUNTER1, 4, buf); |
6007 |
+- data = (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0]; |
6008 |
++ data = ((unsigned long)buf[3] << 24) | (buf[2] << 16) | |
6009 |
++ (buf[1] << 8) | buf[0]; |
6010 |
+ base = ticks - data; |
6011 |
+ dev_dbg(info->dev, "set base:0x%lx, RO count:0x%lx, ticks:0x%lx\n", |
6012 |
+ base, data, ticks); |
6013 |
+@@ -170,10 +173,12 @@ static int pm860x_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) |
6014 |
+ pm860x_page_bulk_read(info->i2c, REG0_ADDR, 8, buf); |
6015 |
+ dev_dbg(info->dev, "%x-%x-%x-%x-%x-%x-%x-%x\n", buf[0], buf[1], |
6016 |
+ buf[2], buf[3], buf[4], buf[5], buf[6], buf[7]); |
6017 |
+- base = (buf[1] << 24) | (buf[3] << 16) | (buf[5] << 8) | buf[7]; |
6018 |
++ base = ((unsigned long)buf[1] << 24) | (buf[3] << 16) | |
6019 |
++ (buf[5] << 8) | buf[7]; |
6020 |
+ |
6021 |
+ pm860x_bulk_read(info->i2c, PM8607_RTC_EXPIRE1, 4, buf); |
6022 |
+- data = (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0]; |
6023 |
++ data = ((unsigned long)buf[3] << 24) | (buf[2] << 16) | |
6024 |
++ (buf[1] << 8) | buf[0]; |
6025 |
+ ticks = base + data; |
6026 |
+ dev_dbg(info->dev, "get base:0x%lx, RO count:0x%lx, ticks:0x%lx\n", |
6027 |
+ base, data, ticks); |
6028 |
+@@ -198,11 +203,13 @@ static int pm860x_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) |
6029 |
+ pm860x_page_bulk_read(info->i2c, REG0_ADDR, 8, buf); |
6030 |
+ dev_dbg(info->dev, "%x-%x-%x-%x-%x-%x-%x-%x\n", buf[0], buf[1], |
6031 |
+ buf[2], buf[3], buf[4], buf[5], buf[6], buf[7]); |
6032 |
+- base = (buf[1] << 24) | (buf[3] << 16) | (buf[5] << 8) | buf[7]; |
6033 |
++ base = ((unsigned long)buf[1] << 24) | (buf[3] << 16) | |
6034 |
++ (buf[5] << 8) | buf[7]; |
6035 |
+ |
6036 |
+ /* load 32-bit read-only counter */ |
6037 |
+ pm860x_bulk_read(info->i2c, PM8607_RTC_COUNTER1, 4, buf); |
6038 |
+- data = (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0]; |
6039 |
++ data = ((unsigned long)buf[3] << 24) | (buf[2] << 16) | |
6040 |
++ (buf[1] << 8) | buf[0]; |
6041 |
+ ticks = base + data; |
6042 |
+ dev_dbg(info->dev, "get base:0x%lx, RO count:0x%lx, ticks:0x%lx\n", |
6043 |
+ base, data, ticks); |
6044 |
+diff --git a/drivers/rtc/rtc-ds1307.c b/drivers/rtc/rtc-ds1307.c |
6045 |
+index e7d9215c9201..8d45d93b1db6 100644 |
6046 |
+--- a/drivers/rtc/rtc-ds1307.c |
6047 |
++++ b/drivers/rtc/rtc-ds1307.c |
6048 |
+@@ -733,8 +733,8 @@ static int rx8130_set_alarm(struct device *dev, struct rtc_wkalrm *t) |
6049 |
+ if (ret < 0) |
6050 |
+ return ret; |
6051 |
+ |
6052 |
+- ctl[0] &= ~RX8130_REG_EXTENSION_WADA; |
6053 |
+- ctl[1] |= RX8130_REG_FLAG_AF; |
6054 |
++ ctl[0] &= RX8130_REG_EXTENSION_WADA; |
6055 |
++ ctl[1] &= ~RX8130_REG_FLAG_AF; |
6056 |
+ ctl[2] &= ~RX8130_REG_CONTROL0_AIE; |
6057 |
+ |
6058 |
+ ret = regmap_bulk_write(ds1307->regmap, RX8130_REG_EXTENSION, ctl, |
6059 |
+@@ -757,8 +757,7 @@ static int rx8130_set_alarm(struct device *dev, struct rtc_wkalrm *t) |
6060 |
+ |
6061 |
+ ctl[2] |= RX8130_REG_CONTROL0_AIE; |
6062 |
+ |
6063 |
+- return regmap_bulk_write(ds1307->regmap, RX8130_REG_EXTENSION, ctl, |
6064 |
+- sizeof(ctl)); |
6065 |
++ return regmap_write(ds1307->regmap, RX8130_REG_CONTROL0, ctl[2]); |
6066 |
+ } |
6067 |
+ |
6068 |
+ static int rx8130_alarm_irq_enable(struct device *dev, unsigned int enabled) |
6069 |
+diff --git a/drivers/rtc/rtc-ds1672.c b/drivers/rtc/rtc-ds1672.c |
6070 |
+index 9caaccccaa57..b1ebca099b0d 100644 |
6071 |
+--- a/drivers/rtc/rtc-ds1672.c |
6072 |
++++ b/drivers/rtc/rtc-ds1672.c |
6073 |
+@@ -58,7 +58,8 @@ static int ds1672_get_datetime(struct i2c_client *client, struct rtc_time *tm) |
6074 |
+ "%s: raw read data - counters=%02x,%02x,%02x,%02x\n", |
6075 |
+ __func__, buf[0], buf[1], buf[2], buf[3]); |
6076 |
+ |
6077 |
+- time = (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0]; |
6078 |
++ time = ((unsigned long)buf[3] << 24) | (buf[2] << 16) | |
6079 |
++ (buf[1] << 8) | buf[0]; |
6080 |
+ |
6081 |
+ rtc_time_to_tm(time, tm); |
6082 |
+ |
6083 |
+diff --git a/drivers/rtc/rtc-mc146818-lib.c b/drivers/rtc/rtc-mc146818-lib.c |
6084 |
+index 2f1772a358ca..18a6f15e313d 100644 |
6085 |
+--- a/drivers/rtc/rtc-mc146818-lib.c |
6086 |
++++ b/drivers/rtc/rtc-mc146818-lib.c |
6087 |
+@@ -82,7 +82,7 @@ unsigned int mc146818_get_time(struct rtc_time *time) |
6088 |
+ time->tm_year += real_year - 72; |
6089 |
+ #endif |
6090 |
+ |
6091 |
+- if (century) |
6092 |
++ if (century > 20) |
6093 |
+ time->tm_year += (century - 19) * 100; |
6094 |
+ |
6095 |
+ /* |
6096 |
+diff --git a/drivers/rtc/rtc-pcf2127.c b/drivers/rtc/rtc-pcf2127.c |
6097 |
+index 9f1b14bf91ae..367e0f803440 100644 |
6098 |
+--- a/drivers/rtc/rtc-pcf2127.c |
6099 |
++++ b/drivers/rtc/rtc-pcf2127.c |
6100 |
+@@ -52,20 +52,14 @@ static int pcf2127_rtc_read_time(struct device *dev, struct rtc_time *tm) |
6101 |
+ struct pcf2127 *pcf2127 = dev_get_drvdata(dev); |
6102 |
+ unsigned char buf[10]; |
6103 |
+ int ret; |
6104 |
+- int i; |
6105 |
+ |
6106 |
+- for (i = 0; i <= PCF2127_REG_CTRL3; i++) { |
6107 |
+- ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL1 + i, |
6108 |
+- (unsigned int *)(buf + i)); |
6109 |
+- if (ret) { |
6110 |
+- dev_err(dev, "%s: read error\n", __func__); |
6111 |
+- return ret; |
6112 |
+- } |
6113 |
+- } |
6114 |
+- |
6115 |
+- ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_SC, |
6116 |
+- (buf + PCF2127_REG_SC), |
6117 |
+- ARRAY_SIZE(buf) - PCF2127_REG_SC); |
6118 |
++ /* |
6119 |
++ * Avoid reading CTRL2 register as it causes WD_VAL register |
6120 |
++ * value to reset to 0 which means watchdog is stopped. |
6121 |
++ */ |
6122 |
++ ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_CTRL3, |
6123 |
++ (buf + PCF2127_REG_CTRL3), |
6124 |
++ ARRAY_SIZE(buf) - PCF2127_REG_CTRL3); |
6125 |
+ if (ret) { |
6126 |
+ dev_err(dev, "%s: read error\n", __func__); |
6127 |
+ return ret; |
6128 |
+@@ -86,14 +80,12 @@ static int pcf2127_rtc_read_time(struct device *dev, struct rtc_time *tm) |
6129 |
+ } |
6130 |
+ |
6131 |
+ dev_dbg(dev, |
6132 |
+- "%s: raw data is cr1=%02x, cr2=%02x, cr3=%02x, " |
6133 |
+- "sec=%02x, min=%02x, hr=%02x, " |
6134 |
++ "%s: raw data is cr3=%02x, sec=%02x, min=%02x, hr=%02x, " |
6135 |
+ "mday=%02x, wday=%02x, mon=%02x, year=%02x\n", |
6136 |
+- __func__, |
6137 |
+- buf[0], buf[1], buf[2], |
6138 |
+- buf[3], buf[4], buf[5], |
6139 |
+- buf[6], buf[7], buf[8], buf[9]); |
6140 |
+- |
6141 |
++ __func__, buf[PCF2127_REG_CTRL3], buf[PCF2127_REG_SC], |
6142 |
++ buf[PCF2127_REG_MN], buf[PCF2127_REG_HR], |
6143 |
++ buf[PCF2127_REG_DM], buf[PCF2127_REG_DW], |
6144 |
++ buf[PCF2127_REG_MO], buf[PCF2127_REG_YR]); |
6145 |
+ |
6146 |
+ tm->tm_sec = bcd2bin(buf[PCF2127_REG_SC] & 0x7F); |
6147 |
+ tm->tm_min = bcd2bin(buf[PCF2127_REG_MN] & 0x7F); |
6148 |
+diff --git a/drivers/rtc/rtc-pcf8563.c b/drivers/rtc/rtc-pcf8563.c |
6149 |
+index 8c836c51a508..4d0b81f9805f 100644 |
6150 |
+--- a/drivers/rtc/rtc-pcf8563.c |
6151 |
++++ b/drivers/rtc/rtc-pcf8563.c |
6152 |
+@@ -563,7 +563,6 @@ static int pcf8563_probe(struct i2c_client *client, |
6153 |
+ struct pcf8563 *pcf8563; |
6154 |
+ int err; |
6155 |
+ unsigned char buf; |
6156 |
+- unsigned char alm_pending; |
6157 |
+ |
6158 |
+ dev_dbg(&client->dev, "%s\n", __func__); |
6159 |
+ |
6160 |
+@@ -587,13 +586,13 @@ static int pcf8563_probe(struct i2c_client *client, |
6161 |
+ return err; |
6162 |
+ } |
6163 |
+ |
6164 |
+- err = pcf8563_get_alarm_mode(client, NULL, &alm_pending); |
6165 |
+- if (err) { |
6166 |
+- dev_err(&client->dev, "%s: read error\n", __func__); |
6167 |
++ /* Clear flags and disable interrupts */ |
6168 |
++ buf = 0; |
6169 |
++ err = pcf8563_write_block_data(client, PCF8563_REG_ST2, 1, &buf); |
6170 |
++ if (err < 0) { |
6171 |
++ dev_err(&client->dev, "%s: write error\n", __func__); |
6172 |
+ return err; |
6173 |
+ } |
6174 |
+- if (alm_pending) |
6175 |
+- pcf8563_set_alarm_mode(client, 0); |
6176 |
+ |
6177 |
+ pcf8563->rtc = devm_rtc_device_register(&client->dev, |
6178 |
+ pcf8563_driver.driver.name, |
6179 |
+@@ -605,7 +604,7 @@ static int pcf8563_probe(struct i2c_client *client, |
6180 |
+ if (client->irq > 0) { |
6181 |
+ err = devm_request_threaded_irq(&client->dev, client->irq, |
6182 |
+ NULL, pcf8563_irq, |
6183 |
+- IRQF_SHARED|IRQF_ONESHOT|IRQF_TRIGGER_FALLING, |
6184 |
++ IRQF_SHARED | IRQF_ONESHOT | IRQF_TRIGGER_LOW, |
6185 |
+ pcf8563_driver.driver.name, client); |
6186 |
+ if (err) { |
6187 |
+ dev_err(&client->dev, "unable to request IRQ %d\n", |
6188 |
+diff --git a/drivers/rtc/rtc-pm8xxx.c b/drivers/rtc/rtc-pm8xxx.c |
6189 |
+index fac835530671..a1b4b0ed1f19 100644 |
6190 |
+--- a/drivers/rtc/rtc-pm8xxx.c |
6191 |
++++ b/drivers/rtc/rtc-pm8xxx.c |
6192 |
+@@ -186,7 +186,8 @@ static int pm8xxx_rtc_read_time(struct device *dev, struct rtc_time *tm) |
6193 |
+ } |
6194 |
+ } |
6195 |
+ |
6196 |
+- secs = value[0] | (value[1] << 8) | (value[2] << 16) | (value[3] << 24); |
6197 |
++ secs = value[0] | (value[1] << 8) | (value[2] << 16) | |
6198 |
++ ((unsigned long)value[3] << 24); |
6199 |
+ |
6200 |
+ rtc_time_to_tm(secs, tm); |
6201 |
+ |
6202 |
+@@ -267,7 +268,8 @@ static int pm8xxx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) |
6203 |
+ return rc; |
6204 |
+ } |
6205 |
+ |
6206 |
+- secs = value[0] | (value[1] << 8) | (value[2] << 16) | (value[3] << 24); |
6207 |
++ secs = value[0] | (value[1] << 8) | (value[2] << 16) | |
6208 |
++ ((unsigned long)value[3] << 24); |
6209 |
+ |
6210 |
+ rtc_time_to_tm(secs, &alarm->time); |
6211 |
+ |
6212 |
+diff --git a/drivers/scsi/fnic/fnic_isr.c b/drivers/scsi/fnic/fnic_isr.c |
6213 |
+index 4e3a50202e8c..d28088218c36 100644 |
6214 |
+--- a/drivers/scsi/fnic/fnic_isr.c |
6215 |
++++ b/drivers/scsi/fnic/fnic_isr.c |
6216 |
+@@ -254,7 +254,7 @@ int fnic_set_intr_mode(struct fnic *fnic) |
6217 |
+ int vecs = n + m + o + 1; |
6218 |
+ |
6219 |
+ if (pci_alloc_irq_vectors(fnic->pdev, vecs, vecs, |
6220 |
+- PCI_IRQ_MSIX) < 0) { |
6221 |
++ PCI_IRQ_MSIX) == vecs) { |
6222 |
+ fnic->rq_count = n; |
6223 |
+ fnic->raw_wq_count = m; |
6224 |
+ fnic->wq_copy_count = o; |
6225 |
+@@ -280,7 +280,7 @@ int fnic_set_intr_mode(struct fnic *fnic) |
6226 |
+ fnic->wq_copy_count >= 1 && |
6227 |
+ fnic->cq_count >= 3 && |
6228 |
+ fnic->intr_count >= 1 && |
6229 |
+- pci_alloc_irq_vectors(fnic->pdev, 1, 1, PCI_IRQ_MSI) < 0) { |
6230 |
++ pci_alloc_irq_vectors(fnic->pdev, 1, 1, PCI_IRQ_MSI) == 1) { |
6231 |
+ fnic->rq_count = 1; |
6232 |
+ fnic->raw_wq_count = 1; |
6233 |
+ fnic->wq_copy_count = 1; |
6234 |
+diff --git a/drivers/scsi/libfc/fc_exch.c b/drivers/scsi/libfc/fc_exch.c |
6235 |
+index 42bcf7f3a0f9..6ba257cbc6d9 100644 |
6236 |
+--- a/drivers/scsi/libfc/fc_exch.c |
6237 |
++++ b/drivers/scsi/libfc/fc_exch.c |
6238 |
+@@ -2603,7 +2603,7 @@ void fc_exch_recv(struct fc_lport *lport, struct fc_frame *fp) |
6239 |
+ |
6240 |
+ /* lport lock ? */ |
6241 |
+ if (!lport || lport->state == LPORT_ST_DISABLED) { |
6242 |
+- FC_LPORT_DBG(lport, "Receiving frames for an lport that " |
6243 |
++ FC_LIBFC_DBG("Receiving frames for an lport that " |
6244 |
+ "has not been initialized correctly\n"); |
6245 |
+ fc_frame_free(fp); |
6246 |
+ return; |
6247 |
+diff --git a/drivers/scsi/megaraid/megaraid_sas_base.c b/drivers/scsi/megaraid/megaraid_sas_base.c |
6248 |
+index 577513649afb..6abad63b127a 100644 |
6249 |
+--- a/drivers/scsi/megaraid/megaraid_sas_base.c |
6250 |
++++ b/drivers/scsi/megaraid/megaraid_sas_base.c |
6251 |
+@@ -3823,12 +3823,12 @@ megasas_transition_to_ready(struct megasas_instance *instance, int ocr) |
6252 |
+ /* |
6253 |
+ * The cur_state should not last for more than max_wait secs |
6254 |
+ */ |
6255 |
+- for (i = 0; i < max_wait; i++) { |
6256 |
++ for (i = 0; i < max_wait * 50; i++) { |
6257 |
+ curr_abs_state = instance->instancet-> |
6258 |
+ read_fw_status_reg(instance->reg_set); |
6259 |
+ |
6260 |
+ if (abs_state == curr_abs_state) { |
6261 |
+- msleep(1000); |
6262 |
++ msleep(20); |
6263 |
+ } else |
6264 |
+ break; |
6265 |
+ } |
6266 |
+diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c |
6267 |
+index 5617bb18c233..5f9d4dbc4a98 100644 |
6268 |
+--- a/drivers/scsi/qla2xxx/qla_os.c |
6269 |
++++ b/drivers/scsi/qla2xxx/qla_os.c |
6270 |
+@@ -6714,8 +6714,7 @@ qla2x00_module_init(void) |
6271 |
+ /* Initialize target kmem_cache and mem_pools */ |
6272 |
+ ret = qlt_init(); |
6273 |
+ if (ret < 0) { |
6274 |
+- kmem_cache_destroy(srb_cachep); |
6275 |
+- return ret; |
6276 |
++ goto destroy_cache; |
6277 |
+ } else if (ret > 0) { |
6278 |
+ /* |
6279 |
+ * If initiator mode is explictly disabled by qlt_init(), |
6280 |
+@@ -6736,11 +6735,10 @@ qla2x00_module_init(void) |
6281 |
+ qla2xxx_transport_template = |
6282 |
+ fc_attach_transport(&qla2xxx_transport_functions); |
6283 |
+ if (!qla2xxx_transport_template) { |
6284 |
+- kmem_cache_destroy(srb_cachep); |
6285 |
+ ql_log(ql_log_fatal, NULL, 0x0002, |
6286 |
+ "fc_attach_transport failed...Failing load!.\n"); |
6287 |
+- qlt_exit(); |
6288 |
+- return -ENODEV; |
6289 |
++ ret = -ENODEV; |
6290 |
++ goto qlt_exit; |
6291 |
+ } |
6292 |
+ |
6293 |
+ apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops); |
6294 |
+@@ -6752,27 +6750,37 @@ qla2x00_module_init(void) |
6295 |
+ qla2xxx_transport_vport_template = |
6296 |
+ fc_attach_transport(&qla2xxx_transport_vport_functions); |
6297 |
+ if (!qla2xxx_transport_vport_template) { |
6298 |
+- kmem_cache_destroy(srb_cachep); |
6299 |
+- qlt_exit(); |
6300 |
+- fc_release_transport(qla2xxx_transport_template); |
6301 |
+ ql_log(ql_log_fatal, NULL, 0x0004, |
6302 |
+ "fc_attach_transport vport failed...Failing load!.\n"); |
6303 |
+- return -ENODEV; |
6304 |
++ ret = -ENODEV; |
6305 |
++ goto unreg_chrdev; |
6306 |
+ } |
6307 |
+ ql_log(ql_log_info, NULL, 0x0005, |
6308 |
+ "QLogic Fibre Channel HBA Driver: %s.\n", |
6309 |
+ qla2x00_version_str); |
6310 |
+ ret = pci_register_driver(&qla2xxx_pci_driver); |
6311 |
+ if (ret) { |
6312 |
+- kmem_cache_destroy(srb_cachep); |
6313 |
+- qlt_exit(); |
6314 |
+- fc_release_transport(qla2xxx_transport_template); |
6315 |
+- fc_release_transport(qla2xxx_transport_vport_template); |
6316 |
+ ql_log(ql_log_fatal, NULL, 0x0006, |
6317 |
+ "pci_register_driver failed...ret=%d Failing load!.\n", |
6318 |
+ ret); |
6319 |
++ goto release_vport_transport; |
6320 |
+ } |
6321 |
+ return ret; |
6322 |
++ |
6323 |
++release_vport_transport: |
6324 |
++ fc_release_transport(qla2xxx_transport_vport_template); |
6325 |
++ |
6326 |
++unreg_chrdev: |
6327 |
++ if (apidev_major >= 0) |
6328 |
++ unregister_chrdev(apidev_major, QLA2XXX_APIDEV); |
6329 |
++ fc_release_transport(qla2xxx_transport_template); |
6330 |
++ |
6331 |
++qlt_exit: |
6332 |
++ qlt_exit(); |
6333 |
++ |
6334 |
++destroy_cache: |
6335 |
++ kmem_cache_destroy(srb_cachep); |
6336 |
++ return ret; |
6337 |
+ } |
6338 |
+ |
6339 |
+ /** |
6340 |
+diff --git a/drivers/scsi/qla2xxx/qla_target.c b/drivers/scsi/qla2xxx/qla_target.c |
6341 |
+index 55227d20496a..21011c5fddeb 100644 |
6342 |
+--- a/drivers/scsi/qla2xxx/qla_target.c |
6343 |
++++ b/drivers/scsi/qla2xxx/qla_target.c |
6344 |
+@@ -2122,14 +2122,14 @@ void qlt_send_resp_ctio(struct qla_qpair *qpair, struct qla_tgt_cmd *cmd, |
6345 |
+ ctio->u.status1.scsi_status |= |
6346 |
+ cpu_to_le16(SS_RESIDUAL_UNDER); |
6347 |
+ |
6348 |
+- /* Response code and sense key */ |
6349 |
+- put_unaligned_le32(((0x70 << 24) | (sense_key << 8)), |
6350 |
+- (&ctio->u.status1.sense_data)[0]); |
6351 |
++ /* Fixed format sense data. */ |
6352 |
++ ctio->u.status1.sense_data[0] = 0x70; |
6353 |
++ ctio->u.status1.sense_data[2] = sense_key; |
6354 |
+ /* Additional sense length */ |
6355 |
+- put_unaligned_le32(0x0a, (&ctio->u.status1.sense_data)[1]); |
6356 |
++ ctio->u.status1.sense_data[7] = 0xa; |
6357 |
+ /* ASC and ASCQ */ |
6358 |
+- put_unaligned_le32(((asc << 24) | (ascq << 16)), |
6359 |
+- (&ctio->u.status1.sense_data)[3]); |
6360 |
++ ctio->u.status1.sense_data[12] = asc; |
6361 |
++ ctio->u.status1.sense_data[13] = ascq; |
6362 |
+ |
6363 |
+ /* Memory Barrier */ |
6364 |
+ wmb(); |
6365 |
+@@ -2179,7 +2179,7 @@ void qlt_xmit_tm_rsp(struct qla_tgt_mgmt_cmd *mcmd) |
6366 |
+ mcmd->orig_iocb.imm_ntfy.u.isp24.status_subcode == |
6367 |
+ ELS_TPRLO) { |
6368 |
+ ql_dbg(ql_dbg_disc, vha, 0x2106, |
6369 |
+- "TM response logo %phC status %#x state %#x", |
6370 |
++ "TM response logo %8phC status %#x state %#x", |
6371 |
+ mcmd->sess->port_name, mcmd->fc_tm_rsp, |
6372 |
+ mcmd->flags); |
6373 |
+ qlt_schedule_sess_for_deletion_lock(mcmd->sess); |
6374 |
+diff --git a/drivers/soc/fsl/qe/gpio.c b/drivers/soc/fsl/qe/gpio.c |
6375 |
+index 3b27075c21a7..5cbc5ce5ac15 100644 |
6376 |
+--- a/drivers/soc/fsl/qe/gpio.c |
6377 |
++++ b/drivers/soc/fsl/qe/gpio.c |
6378 |
+@@ -152,8 +152,10 @@ struct qe_pin *qe_pin_request(struct device_node *np, int index) |
6379 |
+ if (err < 0) |
6380 |
+ goto err0; |
6381 |
+ gc = gpio_to_chip(err); |
6382 |
+- if (WARN_ON(!gc)) |
6383 |
++ if (WARN_ON(!gc)) { |
6384 |
++ err = -ENODEV; |
6385 |
+ goto err0; |
6386 |
++ } |
6387 |
+ |
6388 |
+ if (!of_device_is_compatible(gc->of_node, "fsl,mpc8323-qe-pario-bank")) { |
6389 |
+ pr_debug("%s: tried to get a non-qe pin\n", __func__); |
6390 |
+diff --git a/drivers/spi/spi-bcm2835aux.c b/drivers/spi/spi-bcm2835aux.c |
6391 |
+index 5c89bbb05441..e075712c501e 100644 |
6392 |
+--- a/drivers/spi/spi-bcm2835aux.c |
6393 |
++++ b/drivers/spi/spi-bcm2835aux.c |
6394 |
+@@ -416,7 +416,18 @@ static int bcm2835aux_spi_probe(struct platform_device *pdev) |
6395 |
+ platform_set_drvdata(pdev, master); |
6396 |
+ master->mode_bits = (SPI_CPOL | SPI_CS_HIGH | SPI_NO_CS); |
6397 |
+ master->bits_per_word_mask = SPI_BPW_MASK(8); |
6398 |
+- master->num_chipselect = -1; |
6399 |
++ /* even though the driver never officially supported native CS |
6400 |
++ * allow a single native CS for legacy DT support purposes when |
6401 |
++ * no cs-gpio is configured. |
6402 |
++ * Known limitations for native cs are: |
6403 |
++ * * multiple chip-selects: cs0-cs2 are all simultaniously asserted |
6404 |
++ * whenever there is a transfer - this even includes SPI_NO_CS |
6405 |
++ * * SPI_CS_HIGH: is ignores - cs are always asserted low |
6406 |
++ * * cs_change: cs is deasserted after each spi_transfer |
6407 |
++ * * cs_delay_usec: cs is always deasserted one SCK cycle after |
6408 |
++ * a spi_transfer |
6409 |
++ */ |
6410 |
++ master->num_chipselect = 1; |
6411 |
+ master->transfer_one = bcm2835aux_spi_transfer_one; |
6412 |
+ master->handle_err = bcm2835aux_spi_handle_err; |
6413 |
+ master->prepare_message = bcm2835aux_spi_prepare_message; |
6414 |
+diff --git a/drivers/spi/spi-cadence.c b/drivers/spi/spi-cadence.c |
6415 |
+index 02bd1eba045b..d08ad93d97a1 100644 |
6416 |
+--- a/drivers/spi/spi-cadence.c |
6417 |
++++ b/drivers/spi/spi-cadence.c |
6418 |
+@@ -584,11 +584,6 @@ static int cdns_spi_probe(struct platform_device *pdev) |
6419 |
+ goto clk_dis_apb; |
6420 |
+ } |
6421 |
+ |
6422 |
+- pm_runtime_use_autosuspend(&pdev->dev); |
6423 |
+- pm_runtime_set_autosuspend_delay(&pdev->dev, SPI_AUTOSUSPEND_TIMEOUT); |
6424 |
+- pm_runtime_set_active(&pdev->dev); |
6425 |
+- pm_runtime_enable(&pdev->dev); |
6426 |
+- |
6427 |
+ ret = of_property_read_u32(pdev->dev.of_node, "num-cs", &num_cs); |
6428 |
+ if (ret < 0) |
6429 |
+ master->num_chipselect = CDNS_SPI_DEFAULT_NUM_CS; |
6430 |
+@@ -603,8 +598,10 @@ static int cdns_spi_probe(struct platform_device *pdev) |
6431 |
+ /* SPI controller initializations */ |
6432 |
+ cdns_spi_init_hw(xspi); |
6433 |
+ |
6434 |
+- pm_runtime_mark_last_busy(&pdev->dev); |
6435 |
+- pm_runtime_put_autosuspend(&pdev->dev); |
6436 |
++ pm_runtime_set_active(&pdev->dev); |
6437 |
++ pm_runtime_enable(&pdev->dev); |
6438 |
++ pm_runtime_use_autosuspend(&pdev->dev); |
6439 |
++ pm_runtime_set_autosuspend_delay(&pdev->dev, SPI_AUTOSUSPEND_TIMEOUT); |
6440 |
+ |
6441 |
+ irq = platform_get_irq(pdev, 0); |
6442 |
+ if (irq <= 0) { |
6443 |
+diff --git a/drivers/spi/spi-fsl-spi.c b/drivers/spi/spi-fsl-spi.c |
6444 |
+index 8b79e36fab21..cd784552de7f 100644 |
6445 |
+--- a/drivers/spi/spi-fsl-spi.c |
6446 |
++++ b/drivers/spi/spi-fsl-spi.c |
6447 |
+@@ -407,7 +407,6 @@ static int fsl_spi_do_one_msg(struct spi_master *master, |
6448 |
+ } |
6449 |
+ |
6450 |
+ m->status = status; |
6451 |
+- spi_finalize_current_message(master); |
6452 |
+ |
6453 |
+ if (status || !cs_change) { |
6454 |
+ ndelay(nsecs); |
6455 |
+@@ -415,6 +414,7 @@ static int fsl_spi_do_one_msg(struct spi_master *master, |
6456 |
+ } |
6457 |
+ |
6458 |
+ fsl_spi_setup_transfer(spi, NULL); |
6459 |
++ spi_finalize_current_message(master); |
6460 |
+ return 0; |
6461 |
+ } |
6462 |
+ |
6463 |
+diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c |
6464 |
+index 2ad04796ef29..84ff0c507f0b 100644 |
6465 |
+--- a/drivers/spi/spi-tegra114.c |
6466 |
++++ b/drivers/spi/spi-tegra114.c |
6467 |
+@@ -307,10 +307,16 @@ static unsigned tegra_spi_fill_tx_fifo_from_client_txbuf( |
6468 |
+ x |= (u32)(*tx_buf++) << (i * 8); |
6469 |
+ tegra_spi_writel(tspi, x, SPI_TX_FIFO); |
6470 |
+ } |
6471 |
++ |
6472 |
++ tspi->cur_tx_pos += written_words * tspi->bytes_per_word; |
6473 |
+ } else { |
6474 |
++ unsigned int write_bytes; |
6475 |
+ max_n_32bit = min(tspi->curr_dma_words, tx_empty_count); |
6476 |
+ written_words = max_n_32bit; |
6477 |
+ nbytes = written_words * tspi->bytes_per_word; |
6478 |
++ if (nbytes > t->len - tspi->cur_pos) |
6479 |
++ nbytes = t->len - tspi->cur_pos; |
6480 |
++ write_bytes = nbytes; |
6481 |
+ for (count = 0; count < max_n_32bit; count++) { |
6482 |
+ u32 x = 0; |
6483 |
+ |
6484 |
+@@ -319,8 +325,10 @@ static unsigned tegra_spi_fill_tx_fifo_from_client_txbuf( |
6485 |
+ x |= (u32)(*tx_buf++) << (i * 8); |
6486 |
+ tegra_spi_writel(tspi, x, SPI_TX_FIFO); |
6487 |
+ } |
6488 |
++ |
6489 |
++ tspi->cur_tx_pos += write_bytes; |
6490 |
+ } |
6491 |
+- tspi->cur_tx_pos += written_words * tspi->bytes_per_word; |
6492 |
++ |
6493 |
+ return written_words; |
6494 |
+ } |
6495 |
+ |
6496 |
+@@ -344,20 +352,27 @@ static unsigned int tegra_spi_read_rx_fifo_to_client_rxbuf( |
6497 |
+ for (i = 0; len && (i < 4); i++, len--) |
6498 |
+ *rx_buf++ = (x >> i*8) & 0xFF; |
6499 |
+ } |
6500 |
+- tspi->cur_rx_pos += tspi->curr_dma_words * tspi->bytes_per_word; |
6501 |
+ read_words += tspi->curr_dma_words; |
6502 |
++ tspi->cur_rx_pos += tspi->curr_dma_words * tspi->bytes_per_word; |
6503 |
+ } else { |
6504 |
+ u32 rx_mask = ((u32)1 << t->bits_per_word) - 1; |
6505 |
++ u8 bytes_per_word = tspi->bytes_per_word; |
6506 |
++ unsigned int read_bytes; |
6507 |
+ |
6508 |
++ len = rx_full_count * bytes_per_word; |
6509 |
++ if (len > t->len - tspi->cur_pos) |
6510 |
++ len = t->len - tspi->cur_pos; |
6511 |
++ read_bytes = len; |
6512 |
+ for (count = 0; count < rx_full_count; count++) { |
6513 |
+ u32 x = tegra_spi_readl(tspi, SPI_RX_FIFO) & rx_mask; |
6514 |
+ |
6515 |
+- for (i = 0; (i < tspi->bytes_per_word); i++) |
6516 |
++ for (i = 0; len && (i < bytes_per_word); i++, len--) |
6517 |
+ *rx_buf++ = (x >> (i*8)) & 0xFF; |
6518 |
+ } |
6519 |
+- tspi->cur_rx_pos += rx_full_count * tspi->bytes_per_word; |
6520 |
+ read_words += rx_full_count; |
6521 |
++ tspi->cur_rx_pos += read_bytes; |
6522 |
+ } |
6523 |
++ |
6524 |
+ return read_words; |
6525 |
+ } |
6526 |
+ |
6527 |
+@@ -372,12 +387,17 @@ static void tegra_spi_copy_client_txbuf_to_spi_txbuf( |
6528 |
+ unsigned len = tspi->curr_dma_words * tspi->bytes_per_word; |
6529 |
+ |
6530 |
+ memcpy(tspi->tx_dma_buf, t->tx_buf + tspi->cur_pos, len); |
6531 |
++ tspi->cur_tx_pos += tspi->curr_dma_words * tspi->bytes_per_word; |
6532 |
+ } else { |
6533 |
+ unsigned int i; |
6534 |
+ unsigned int count; |
6535 |
+ u8 *tx_buf = (u8 *)t->tx_buf + tspi->cur_tx_pos; |
6536 |
+ unsigned consume = tspi->curr_dma_words * tspi->bytes_per_word; |
6537 |
++ unsigned int write_bytes; |
6538 |
+ |
6539 |
++ if (consume > t->len - tspi->cur_pos) |
6540 |
++ consume = t->len - tspi->cur_pos; |
6541 |
++ write_bytes = consume; |
6542 |
+ for (count = 0; count < tspi->curr_dma_words; count++) { |
6543 |
+ u32 x = 0; |
6544 |
+ |
6545 |
+@@ -386,8 +406,9 @@ static void tegra_spi_copy_client_txbuf_to_spi_txbuf( |
6546 |
+ x |= (u32)(*tx_buf++) << (i * 8); |
6547 |
+ tspi->tx_dma_buf[count] = x; |
6548 |
+ } |
6549 |
++ |
6550 |
++ tspi->cur_tx_pos += write_bytes; |
6551 |
+ } |
6552 |
+- tspi->cur_tx_pos += tspi->curr_dma_words * tspi->bytes_per_word; |
6553 |
+ |
6554 |
+ /* Make the dma buffer to read by dma */ |
6555 |
+ dma_sync_single_for_device(tspi->dev, tspi->tx_dma_phys, |
6556 |
+@@ -405,20 +426,28 @@ static void tegra_spi_copy_spi_rxbuf_to_client_rxbuf( |
6557 |
+ unsigned len = tspi->curr_dma_words * tspi->bytes_per_word; |
6558 |
+ |
6559 |
+ memcpy(t->rx_buf + tspi->cur_rx_pos, tspi->rx_dma_buf, len); |
6560 |
++ tspi->cur_rx_pos += tspi->curr_dma_words * tspi->bytes_per_word; |
6561 |
+ } else { |
6562 |
+ unsigned int i; |
6563 |
+ unsigned int count; |
6564 |
+ unsigned char *rx_buf = t->rx_buf + tspi->cur_rx_pos; |
6565 |
+ u32 rx_mask = ((u32)1 << t->bits_per_word) - 1; |
6566 |
++ unsigned consume = tspi->curr_dma_words * tspi->bytes_per_word; |
6567 |
++ unsigned int read_bytes; |
6568 |
+ |
6569 |
++ if (consume > t->len - tspi->cur_pos) |
6570 |
++ consume = t->len - tspi->cur_pos; |
6571 |
++ read_bytes = consume; |
6572 |
+ for (count = 0; count < tspi->curr_dma_words; count++) { |
6573 |
+ u32 x = tspi->rx_dma_buf[count] & rx_mask; |
6574 |
+ |
6575 |
+- for (i = 0; (i < tspi->bytes_per_word); i++) |
6576 |
++ for (i = 0; consume && (i < tspi->bytes_per_word); |
6577 |
++ i++, consume--) |
6578 |
+ *rx_buf++ = (x >> (i*8)) & 0xFF; |
6579 |
+ } |
6580 |
++ |
6581 |
++ tspi->cur_rx_pos += read_bytes; |
6582 |
+ } |
6583 |
+- tspi->cur_rx_pos += tspi->curr_dma_words * tspi->bytes_per_word; |
6584 |
+ |
6585 |
+ /* Make the dma buffer to read by dma */ |
6586 |
+ dma_sync_single_for_device(tspi->dev, tspi->rx_dma_phys, |
6587 |
+@@ -470,22 +499,39 @@ static int tegra_spi_start_rx_dma(struct tegra_spi_data *tspi, int len) |
6588 |
+ return 0; |
6589 |
+ } |
6590 |
+ |
6591 |
+-static int tegra_spi_start_dma_based_transfer( |
6592 |
+- struct tegra_spi_data *tspi, struct spi_transfer *t) |
6593 |
++static int tegra_spi_flush_fifos(struct tegra_spi_data *tspi) |
6594 |
+ { |
6595 |
+- u32 val; |
6596 |
+- unsigned int len; |
6597 |
+- int ret = 0; |
6598 |
++ unsigned long timeout = jiffies + HZ; |
6599 |
+ u32 status; |
6600 |
+ |
6601 |
+- /* Make sure that Rx and Tx fifo are empty */ |
6602 |
+ status = tegra_spi_readl(tspi, SPI_FIFO_STATUS); |
6603 |
+ if ((status & SPI_FIFO_EMPTY) != SPI_FIFO_EMPTY) { |
6604 |
+- dev_err(tspi->dev, "Rx/Tx fifo are not empty status 0x%08x\n", |
6605 |
+- (unsigned)status); |
6606 |
+- return -EIO; |
6607 |
++ status |= SPI_RX_FIFO_FLUSH | SPI_TX_FIFO_FLUSH; |
6608 |
++ tegra_spi_writel(tspi, status, SPI_FIFO_STATUS); |
6609 |
++ while ((status & SPI_FIFO_EMPTY) != SPI_FIFO_EMPTY) { |
6610 |
++ status = tegra_spi_readl(tspi, SPI_FIFO_STATUS); |
6611 |
++ if (time_after(jiffies, timeout)) { |
6612 |
++ dev_err(tspi->dev, |
6613 |
++ "timeout waiting for fifo flush\n"); |
6614 |
++ return -EIO; |
6615 |
++ } |
6616 |
++ |
6617 |
++ udelay(1); |
6618 |
++ } |
6619 |
+ } |
6620 |
+ |
6621 |
++ return 0; |
6622 |
++} |
6623 |
++ |
6624 |
++static int tegra_spi_start_dma_based_transfer( |
6625 |
++ struct tegra_spi_data *tspi, struct spi_transfer *t) |
6626 |
++{ |
6627 |
++ u32 val; |
6628 |
++ unsigned int len; |
6629 |
++ int ret = 0; |
6630 |
++ u8 dma_burst; |
6631 |
++ struct dma_slave_config dma_sconfig = {0}; |
6632 |
++ |
6633 |
+ val = SPI_DMA_BLK_SET(tspi->curr_dma_words - 1); |
6634 |
+ tegra_spi_writel(tspi, val, SPI_DMA_BLK); |
6635 |
+ |
6636 |
+@@ -496,12 +542,16 @@ static int tegra_spi_start_dma_based_transfer( |
6637 |
+ len = tspi->curr_dma_words * 4; |
6638 |
+ |
6639 |
+ /* Set attention level based on length of transfer */ |
6640 |
+- if (len & 0xF) |
6641 |
++ if (len & 0xF) { |
6642 |
+ val |= SPI_TX_TRIG_1 | SPI_RX_TRIG_1; |
6643 |
+- else if (((len) >> 4) & 0x1) |
6644 |
++ dma_burst = 1; |
6645 |
++ } else if (((len) >> 4) & 0x1) { |
6646 |
+ val |= SPI_TX_TRIG_4 | SPI_RX_TRIG_4; |
6647 |
+- else |
6648 |
++ dma_burst = 4; |
6649 |
++ } else { |
6650 |
+ val |= SPI_TX_TRIG_8 | SPI_RX_TRIG_8; |
6651 |
++ dma_burst = 8; |
6652 |
++ } |
6653 |
+ |
6654 |
+ if (tspi->cur_direction & DATA_DIR_TX) |
6655 |
+ val |= SPI_IE_TX; |
6656 |
+@@ -512,7 +562,18 @@ static int tegra_spi_start_dma_based_transfer( |
6657 |
+ tegra_spi_writel(tspi, val, SPI_DMA_CTL); |
6658 |
+ tspi->dma_control_reg = val; |
6659 |
+ |
6660 |
++ dma_sconfig.device_fc = true; |
6661 |
+ if (tspi->cur_direction & DATA_DIR_TX) { |
6662 |
++ dma_sconfig.dst_addr = tspi->phys + SPI_TX_FIFO; |
6663 |
++ dma_sconfig.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; |
6664 |
++ dma_sconfig.dst_maxburst = dma_burst; |
6665 |
++ ret = dmaengine_slave_config(tspi->tx_dma_chan, &dma_sconfig); |
6666 |
++ if (ret < 0) { |
6667 |
++ dev_err(tspi->dev, |
6668 |
++ "DMA slave config failed: %d\n", ret); |
6669 |
++ return ret; |
6670 |
++ } |
6671 |
++ |
6672 |
+ tegra_spi_copy_client_txbuf_to_spi_txbuf(tspi, t); |
6673 |
+ ret = tegra_spi_start_tx_dma(tspi, len); |
6674 |
+ if (ret < 0) { |
6675 |
+@@ -523,6 +584,16 @@ static int tegra_spi_start_dma_based_transfer( |
6676 |
+ } |
6677 |
+ |
6678 |
+ if (tspi->cur_direction & DATA_DIR_RX) { |
6679 |
++ dma_sconfig.src_addr = tspi->phys + SPI_RX_FIFO; |
6680 |
++ dma_sconfig.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; |
6681 |
++ dma_sconfig.src_maxburst = dma_burst; |
6682 |
++ ret = dmaengine_slave_config(tspi->rx_dma_chan, &dma_sconfig); |
6683 |
++ if (ret < 0) { |
6684 |
++ dev_err(tspi->dev, |
6685 |
++ "DMA slave config failed: %d\n", ret); |
6686 |
++ return ret; |
6687 |
++ } |
6688 |
++ |
6689 |
+ /* Make the dma buffer to read by dma */ |
6690 |
+ dma_sync_single_for_device(tspi->dev, tspi->rx_dma_phys, |
6691 |
+ tspi->dma_buf_size, DMA_FROM_DEVICE); |
6692 |
+@@ -582,7 +653,6 @@ static int tegra_spi_init_dma_param(struct tegra_spi_data *tspi, |
6693 |
+ u32 *dma_buf; |
6694 |
+ dma_addr_t dma_phys; |
6695 |
+ int ret; |
6696 |
+- struct dma_slave_config dma_sconfig; |
6697 |
+ |
6698 |
+ dma_chan = dma_request_slave_channel_reason(tspi->dev, |
6699 |
+ dma_to_memory ? "rx" : "tx"); |
6700 |
+@@ -602,19 +672,6 @@ static int tegra_spi_init_dma_param(struct tegra_spi_data *tspi, |
6701 |
+ return -ENOMEM; |
6702 |
+ } |
6703 |
+ |
6704 |
+- if (dma_to_memory) { |
6705 |
+- dma_sconfig.src_addr = tspi->phys + SPI_RX_FIFO; |
6706 |
+- dma_sconfig.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; |
6707 |
+- dma_sconfig.src_maxburst = 0; |
6708 |
+- } else { |
6709 |
+- dma_sconfig.dst_addr = tspi->phys + SPI_TX_FIFO; |
6710 |
+- dma_sconfig.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; |
6711 |
+- dma_sconfig.dst_maxburst = 0; |
6712 |
+- } |
6713 |
+- |
6714 |
+- ret = dmaengine_slave_config(dma_chan, &dma_sconfig); |
6715 |
+- if (ret) |
6716 |
+- goto scrub; |
6717 |
+ if (dma_to_memory) { |
6718 |
+ tspi->rx_dma_chan = dma_chan; |
6719 |
+ tspi->rx_dma_buf = dma_buf; |
6720 |
+@@ -625,11 +682,6 @@ static int tegra_spi_init_dma_param(struct tegra_spi_data *tspi, |
6721 |
+ tspi->tx_dma_phys = dma_phys; |
6722 |
+ } |
6723 |
+ return 0; |
6724 |
+- |
6725 |
+-scrub: |
6726 |
+- dma_free_coherent(tspi->dev, tspi->dma_buf_size, dma_buf, dma_phys); |
6727 |
+- dma_release_channel(dma_chan); |
6728 |
+- return ret; |
6729 |
+ } |
6730 |
+ |
6731 |
+ static void tegra_spi_deinit_dma_param(struct tegra_spi_data *tspi, |
6732 |
+@@ -730,6 +782,8 @@ static int tegra_spi_start_transfer_one(struct spi_device *spi, |
6733 |
+ |
6734 |
+ if (tspi->is_packed) |
6735 |
+ command1 |= SPI_PACKED; |
6736 |
++ else |
6737 |
++ command1 &= ~SPI_PACKED; |
6738 |
+ |
6739 |
+ command1 &= ~(SPI_CS_SEL_MASK | SPI_TX_EN | SPI_RX_EN); |
6740 |
+ tspi->cur_direction = 0; |
6741 |
+@@ -748,6 +802,9 @@ static int tegra_spi_start_transfer_one(struct spi_device *spi, |
6742 |
+ dev_dbg(tspi->dev, "The def 0x%x and written 0x%x\n", |
6743 |
+ tspi->def_command1_reg, (unsigned)command1); |
6744 |
+ |
6745 |
++ ret = tegra_spi_flush_fifos(tspi); |
6746 |
++ if (ret < 0) |
6747 |
++ return ret; |
6748 |
+ if (total_fifo_words > SPI_FIFO_DEPTH) |
6749 |
+ ret = tegra_spi_start_dma_based_transfer(tspi, t); |
6750 |
+ else |
6751 |
+@@ -838,7 +895,17 @@ static int tegra_spi_transfer_one_message(struct spi_master *master, |
6752 |
+ if (WARN_ON(ret == 0)) { |
6753 |
+ dev_err(tspi->dev, |
6754 |
+ "spi transfer timeout, err %d\n", ret); |
6755 |
++ if (tspi->is_curr_dma_xfer && |
6756 |
++ (tspi->cur_direction & DATA_DIR_TX)) |
6757 |
++ dmaengine_terminate_all(tspi->tx_dma_chan); |
6758 |
++ if (tspi->is_curr_dma_xfer && |
6759 |
++ (tspi->cur_direction & DATA_DIR_RX)) |
6760 |
++ dmaengine_terminate_all(tspi->rx_dma_chan); |
6761 |
+ ret = -EIO; |
6762 |
++ tegra_spi_flush_fifos(tspi); |
6763 |
++ reset_control_assert(tspi->rst); |
6764 |
++ udelay(2); |
6765 |
++ reset_control_deassert(tspi->rst); |
6766 |
+ goto complete_xfer; |
6767 |
+ } |
6768 |
+ |
6769 |
+@@ -889,6 +956,7 @@ static irqreturn_t handle_cpu_based_xfer(struct tegra_spi_data *tspi) |
6770 |
+ tspi->status_reg); |
6771 |
+ dev_err(tspi->dev, "CpuXfer 0x%08x:0x%08x\n", |
6772 |
+ tspi->command1_reg, tspi->dma_control_reg); |
6773 |
++ tegra_spi_flush_fifos(tspi); |
6774 |
+ reset_control_assert(tspi->rst); |
6775 |
+ udelay(2); |
6776 |
+ reset_control_deassert(tspi->rst); |
6777 |
+@@ -961,6 +1029,7 @@ static irqreturn_t handle_dma_based_xfer(struct tegra_spi_data *tspi) |
6778 |
+ tspi->status_reg); |
6779 |
+ dev_err(tspi->dev, "DmaXfer 0x%08x:0x%08x\n", |
6780 |
+ tspi->command1_reg, tspi->dma_control_reg); |
6781 |
++ tegra_spi_flush_fifos(tspi); |
6782 |
+ reset_control_assert(tspi->rst); |
6783 |
+ udelay(2); |
6784 |
+ reset_control_deassert(tspi->rst); |
6785 |
+diff --git a/drivers/spi/spi-topcliff-pch.c b/drivers/spi/spi-topcliff-pch.c |
6786 |
+index 4389ab80c23e..fa730a871d25 100644 |
6787 |
+--- a/drivers/spi/spi-topcliff-pch.c |
6788 |
++++ b/drivers/spi/spi-topcliff-pch.c |
6789 |
+@@ -1008,6 +1008,9 @@ static void pch_spi_handle_dma(struct pch_spi_data *data, int *bpw) |
6790 |
+ |
6791 |
+ /* RX */ |
6792 |
+ dma->sg_rx_p = kcalloc(num, sizeof(*dma->sg_rx_p), GFP_ATOMIC); |
6793 |
++ if (!dma->sg_rx_p) |
6794 |
++ return; |
6795 |
++ |
6796 |
+ sg_init_table(dma->sg_rx_p, num); /* Initialize SG table */ |
6797 |
+ /* offset, length setting */ |
6798 |
+ sg = dma->sg_rx_p; |
6799 |
+@@ -1068,6 +1071,9 @@ static void pch_spi_handle_dma(struct pch_spi_data *data, int *bpw) |
6800 |
+ } |
6801 |
+ |
6802 |
+ dma->sg_tx_p = kcalloc(num, sizeof(*dma->sg_tx_p), GFP_ATOMIC); |
6803 |
++ if (!dma->sg_tx_p) |
6804 |
++ return; |
6805 |
++ |
6806 |
+ sg_init_table(dma->sg_tx_p, num); /* Initialize SG table */ |
6807 |
+ /* offset, length setting */ |
6808 |
+ sg = dma->sg_tx_p; |
6809 |
+diff --git a/drivers/staging/comedi/drivers/ni_mio_common.c b/drivers/staging/comedi/drivers/ni_mio_common.c |
6810 |
+index 36361bdf934a..2f82dcb1fd06 100644 |
6811 |
+--- a/drivers/staging/comedi/drivers/ni_mio_common.c |
6812 |
++++ b/drivers/staging/comedi/drivers/ni_mio_common.c |
6813 |
+@@ -4991,7 +4991,10 @@ static int ni_valid_rtsi_output_source(struct comedi_device *dev, |
6814 |
+ case NI_RTSI_OUTPUT_G_SRC0: |
6815 |
+ case NI_RTSI_OUTPUT_G_GATE0: |
6816 |
+ case NI_RTSI_OUTPUT_RGOUT0: |
6817 |
+- case NI_RTSI_OUTPUT_RTSI_BRD_0: |
6818 |
++ case NI_RTSI_OUTPUT_RTSI_BRD(0): |
6819 |
++ case NI_RTSI_OUTPUT_RTSI_BRD(1): |
6820 |
++ case NI_RTSI_OUTPUT_RTSI_BRD(2): |
6821 |
++ case NI_RTSI_OUTPUT_RTSI_BRD(3): |
6822 |
+ return 1; |
6823 |
+ case NI_RTSI_OUTPUT_RTSI_OSC: |
6824 |
+ return (devpriv->is_m_series) ? 1 : 0; |
6825 |
+@@ -5012,11 +5015,18 @@ static int ni_set_rtsi_routing(struct comedi_device *dev, |
6826 |
+ devpriv->rtsi_trig_a_output_reg |= NISTC_RTSI_TRIG(chan, src); |
6827 |
+ ni_stc_writew(dev, devpriv->rtsi_trig_a_output_reg, |
6828 |
+ NISTC_RTSI_TRIGA_OUT_REG); |
6829 |
+- } else if (chan < 8) { |
6830 |
++ } else if (chan < NISTC_RTSI_TRIG_NUM_CHAN(devpriv->is_m_series)) { |
6831 |
+ devpriv->rtsi_trig_b_output_reg &= ~NISTC_RTSI_TRIG_MASK(chan); |
6832 |
+ devpriv->rtsi_trig_b_output_reg |= NISTC_RTSI_TRIG(chan, src); |
6833 |
+ ni_stc_writew(dev, devpriv->rtsi_trig_b_output_reg, |
6834 |
+ NISTC_RTSI_TRIGB_OUT_REG); |
6835 |
++ } else if (chan != NISTC_RTSI_TRIG_OLD_CLK_CHAN) { |
6836 |
++ /* probably should never reach this, since the |
6837 |
++ * ni_valid_rtsi_output_source above errors out if chan is too |
6838 |
++ * high |
6839 |
++ */ |
6840 |
++ dev_err(dev->class_dev, "%s: unknown rtsi channel\n", __func__); |
6841 |
++ return -EINVAL; |
6842 |
+ } |
6843 |
+ return 2; |
6844 |
+ } |
6845 |
+@@ -5032,12 +5042,12 @@ static unsigned int ni_get_rtsi_routing(struct comedi_device *dev, |
6846 |
+ } else if (chan < NISTC_RTSI_TRIG_NUM_CHAN(devpriv->is_m_series)) { |
6847 |
+ return NISTC_RTSI_TRIG_TO_SRC(chan, |
6848 |
+ devpriv->rtsi_trig_b_output_reg); |
6849 |
+- } else { |
6850 |
+- if (chan == NISTC_RTSI_TRIG_OLD_CLK_CHAN) |
6851 |
+- return NI_RTSI_OUTPUT_RTSI_OSC; |
6852 |
+- dev_err(dev->class_dev, "bug! should never get here?\n"); |
6853 |
+- return 0; |
6854 |
++ } else if (chan == NISTC_RTSI_TRIG_OLD_CLK_CHAN) { |
6855 |
++ return NI_RTSI_OUTPUT_RTSI_OSC; |
6856 |
+ } |
6857 |
++ |
6858 |
++ dev_err(dev->class_dev, "%s: unknown rtsi channel\n", __func__); |
6859 |
++ return -EINVAL; |
6860 |
+ } |
6861 |
+ |
6862 |
+ static int ni_rtsi_insn_config(struct comedi_device *dev, |
6863 |
+diff --git a/drivers/staging/greybus/light.c b/drivers/staging/greybus/light.c |
6864 |
+index 0f538b8c3a07..4e7575147775 100644 |
6865 |
+--- a/drivers/staging/greybus/light.c |
6866 |
++++ b/drivers/staging/greybus/light.c |
6867 |
+@@ -1103,21 +1103,21 @@ static void gb_lights_channel_release(struct gb_channel *channel) |
6868 |
+ static void gb_lights_light_release(struct gb_light *light) |
6869 |
+ { |
6870 |
+ int i; |
6871 |
+- int count; |
6872 |
+ |
6873 |
+ light->ready = false; |
6874 |
+ |
6875 |
+- count = light->channels_count; |
6876 |
+- |
6877 |
+ if (light->has_flash) |
6878 |
+ gb_lights_light_v4l2_unregister(light); |
6879 |
++ light->has_flash = false; |
6880 |
+ |
6881 |
+- for (i = 0; i < count; i++) { |
6882 |
++ for (i = 0; i < light->channels_count; i++) |
6883 |
+ gb_lights_channel_release(&light->channels[i]); |
6884 |
+- light->channels_count--; |
6885 |
+- } |
6886 |
++ light->channels_count = 0; |
6887 |
++ |
6888 |
+ kfree(light->channels); |
6889 |
++ light->channels = NULL; |
6890 |
+ kfree(light->name); |
6891 |
++ light->name = NULL; |
6892 |
+ } |
6893 |
+ |
6894 |
+ static void gb_lights_release(struct gb_lights *glights) |
6895 |
+diff --git a/drivers/staging/most/aim-cdev/cdev.c b/drivers/staging/most/aim-cdev/cdev.c |
6896 |
+index 1e5cbc893496..d000b6ff8a7d 100644 |
6897 |
+--- a/drivers/staging/most/aim-cdev/cdev.c |
6898 |
++++ b/drivers/staging/most/aim-cdev/cdev.c |
6899 |
+@@ -455,7 +455,9 @@ static int aim_probe(struct most_interface *iface, int channel_id, |
6900 |
+ c->devno = MKDEV(major, current_minor); |
6901 |
+ cdev_init(&c->cdev, &channel_fops); |
6902 |
+ c->cdev.owner = THIS_MODULE; |
6903 |
+- cdev_add(&c->cdev, c->devno, 1); |
6904 |
++ retval = cdev_add(&c->cdev, c->devno, 1); |
6905 |
++ if (retval < 0) |
6906 |
++ goto err_free_c; |
6907 |
+ c->iface = iface; |
6908 |
+ c->cfg = cfg; |
6909 |
+ c->channel_id = channel_id; |
6910 |
+@@ -491,6 +493,7 @@ error_create_device: |
6911 |
+ list_del(&c->list); |
6912 |
+ error_alloc_kfifo: |
6913 |
+ cdev_del(&c->cdev); |
6914 |
++err_free_c: |
6915 |
+ kfree(c); |
6916 |
+ error_alloc_channel: |
6917 |
+ ida_simple_remove(&minor_id, current_minor); |
6918 |
+diff --git a/drivers/staging/rtlwifi/halmac/halmac_88xx/halmac_func_88xx.c b/drivers/staging/rtlwifi/halmac/halmac_88xx/halmac_func_88xx.c |
6919 |
+index 544f638ed3ef..65edd14a1147 100644 |
6920 |
+--- a/drivers/staging/rtlwifi/halmac/halmac_88xx/halmac_func_88xx.c |
6921 |
++++ b/drivers/staging/rtlwifi/halmac/halmac_88xx/halmac_func_88xx.c |
6922 |
+@@ -2492,8 +2492,11 @@ halmac_parse_psd_data_88xx(struct halmac_adapter *halmac_adapter, u8 *c2h_buf, |
6923 |
+ segment_size = (u8)PSD_DATA_GET_SEGMENT_SIZE(c2h_buf); |
6924 |
+ psd_set->data_size = total_size; |
6925 |
+ |
6926 |
+- if (!psd_set->data) |
6927 |
++ if (!psd_set->data) { |
6928 |
+ psd_set->data = kzalloc(psd_set->data_size, GFP_KERNEL); |
6929 |
++ if (!psd_set->data) |
6930 |
++ return HALMAC_RET_MALLOC_FAIL; |
6931 |
++ } |
6932 |
+ |
6933 |
+ if (segment_id == 0) |
6934 |
+ psd_set->segment_size = segment_size; |
6935 |
+diff --git a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c |
6936 |
+index 377da037f31c..b521752d9aa0 100644 |
6937 |
+--- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c |
6938 |
++++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c |
6939 |
+@@ -1849,6 +1849,12 @@ static int __init bm2835_mmal_init(void) |
6940 |
+ num_cameras = get_num_cameras(instance, |
6941 |
+ resolutions, |
6942 |
+ MAX_BCM2835_CAMERAS); |
6943 |
++ |
6944 |
++ if (num_cameras < 1) { |
6945 |
++ ret = -ENODEV; |
6946 |
++ goto cleanup_mmal; |
6947 |
++ } |
6948 |
++ |
6949 |
+ if (num_cameras > MAX_BCM2835_CAMERAS) |
6950 |
+ num_cameras = MAX_BCM2835_CAMERAS; |
6951 |
+ |
6952 |
+@@ -1948,6 +1954,9 @@ cleanup_gdev: |
6953 |
+ pr_info("%s: error %d while loading driver\n", |
6954 |
+ BM2835_MMAL_MODULE_NAME, ret); |
6955 |
+ |
6956 |
++cleanup_mmal: |
6957 |
++ vchiq_mmal_finalise(instance); |
6958 |
++ |
6959 |
+ return ret; |
6960 |
+ } |
6961 |
+ |
6962 |
+diff --git a/drivers/target/target_core_device.c b/drivers/target/target_core_device.c |
6963 |
+index 92b52d2314b5..cebef8e5a43d 100644 |
6964 |
+--- a/drivers/target/target_core_device.c |
6965 |
++++ b/drivers/target/target_core_device.c |
6966 |
+@@ -85,7 +85,7 @@ transport_lookup_cmd_lun(struct se_cmd *se_cmd, u64 unpacked_lun) |
6967 |
+ goto out_unlock; |
6968 |
+ } |
6969 |
+ |
6970 |
+- se_cmd->se_lun = rcu_dereference(deve->se_lun); |
6971 |
++ se_cmd->se_lun = se_lun; |
6972 |
+ se_cmd->pr_res_key = deve->pr_res_key; |
6973 |
+ se_cmd->orig_fe_lun = unpacked_lun; |
6974 |
+ se_cmd->se_cmd_flags |= SCF_SE_LUN_CMD; |
6975 |
+@@ -176,7 +176,7 @@ int transport_lookup_tmr_lun(struct se_cmd *se_cmd, u64 unpacked_lun) |
6976 |
+ goto out_unlock; |
6977 |
+ } |
6978 |
+ |
6979 |
+- se_cmd->se_lun = rcu_dereference(deve->se_lun); |
6980 |
++ se_cmd->se_lun = se_lun; |
6981 |
+ se_cmd->pr_res_key = deve->pr_res_key; |
6982 |
+ se_cmd->orig_fe_lun = unpacked_lun; |
6983 |
+ se_cmd->se_cmd_flags |= SCF_SE_LUN_CMD; |
6984 |
+diff --git a/drivers/thermal/cpu_cooling.c b/drivers/thermal/cpu_cooling.c |
6985 |
+index 908a8014cf76..aed995ec2c90 100644 |
6986 |
+--- a/drivers/thermal/cpu_cooling.c |
6987 |
++++ b/drivers/thermal/cpu_cooling.c |
6988 |
+@@ -514,7 +514,7 @@ static int cpufreq_get_requested_power(struct thermal_cooling_device *cdev, |
6989 |
+ load = 0; |
6990 |
+ |
6991 |
+ total_load += load; |
6992 |
+- if (trace_thermal_power_cpu_limit_enabled() && load_cpu) |
6993 |
++ if (load_cpu) |
6994 |
+ load_cpu[i] = load; |
6995 |
+ |
6996 |
+ i++; |
6997 |
+diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c |
6998 |
+index 1e61c09153c9..76b92083744c 100644 |
6999 |
+--- a/drivers/thermal/mtk_thermal.c |
7000 |
++++ b/drivers/thermal/mtk_thermal.c |
7001 |
+@@ -407,7 +407,8 @@ static int mtk_thermal_bank_temperature(struct mtk_thermal_bank *bank) |
7002 |
+ u32 raw; |
7003 |
+ |
7004 |
+ for (i = 0; i < conf->bank_data[bank->id].num_sensors; i++) { |
7005 |
+- raw = readl(mt->thermal_base + conf->msr[i]); |
7006 |
++ raw = readl(mt->thermal_base + |
7007 |
++ conf->msr[conf->bank_data[bank->id].sensors[i]]); |
7008 |
+ |
7009 |
+ temp = raw_to_mcelsius(mt, |
7010 |
+ conf->bank_data[bank->id].sensors[i], |
7011 |
+@@ -544,7 +545,8 @@ static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num, |
7012 |
+ |
7013 |
+ for (i = 0; i < conf->bank_data[num].num_sensors; i++) |
7014 |
+ writel(conf->sensor_mux_values[conf->bank_data[num].sensors[i]], |
7015 |
+- mt->thermal_base + conf->adcpnp[i]); |
7016 |
++ mt->thermal_base + |
7017 |
++ conf->adcpnp[conf->bank_data[num].sensors[i]]); |
7018 |
+ |
7019 |
+ writel((1 << conf->bank_data[num].num_sensors) - 1, |
7020 |
+ mt->thermal_base + TEMP_MONCTL0); |
7021 |
+diff --git a/drivers/tty/ipwireless/hardware.c b/drivers/tty/ipwireless/hardware.c |
7022 |
+index a6b8240af6cd..960e9375a1a9 100644 |
7023 |
+--- a/drivers/tty/ipwireless/hardware.c |
7024 |
++++ b/drivers/tty/ipwireless/hardware.c |
7025 |
+@@ -1516,6 +1516,8 @@ static void ipw_send_setup_packet(struct ipw_hardware *hw) |
7026 |
+ sizeof(struct ipw_setup_get_version_query_packet), |
7027 |
+ ADDR_SETUP_PROT, TL_PROTOCOLID_SETUP, |
7028 |
+ TL_SETUP_SIGNO_GET_VERSION_QRY); |
7029 |
++ if (!ver_packet) |
7030 |
++ return; |
7031 |
+ ver_packet->header.length = sizeof(struct tl_setup_get_version_qry); |
7032 |
+ |
7033 |
+ /* |
7034 |
+diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c |
7035 |
+index fb2dcb3f8591..16422987ab0f 100644 |
7036 |
+--- a/drivers/tty/serial/fsl_lpuart.c |
7037 |
++++ b/drivers/tty/serial/fsl_lpuart.c |
7038 |
+@@ -532,26 +532,26 @@ static int lpuart32_poll_init(struct uart_port *port) |
7039 |
+ spin_lock_irqsave(&sport->port.lock, flags); |
7040 |
+ |
7041 |
+ /* Disable Rx & Tx */ |
7042 |
+- writel(0, sport->port.membase + UARTCTRL); |
7043 |
++ lpuart32_write(&sport->port, UARTCTRL, 0); |
7044 |
+ |
7045 |
+- temp = readl(sport->port.membase + UARTFIFO); |
7046 |
++ temp = lpuart32_read(&sport->port, UARTFIFO); |
7047 |
+ |
7048 |
+ /* Enable Rx and Tx FIFO */ |
7049 |
+- writel(temp | UARTFIFO_RXFE | UARTFIFO_TXFE, |
7050 |
+- sport->port.membase + UARTFIFO); |
7051 |
++ lpuart32_write(&sport->port, UARTFIFO, |
7052 |
++ temp | UARTFIFO_RXFE | UARTFIFO_TXFE); |
7053 |
+ |
7054 |
+ /* flush Tx and Rx FIFO */ |
7055 |
+- writel(UARTFIFO_TXFLUSH | UARTFIFO_RXFLUSH, |
7056 |
+- sport->port.membase + UARTFIFO); |
7057 |
++ lpuart32_write(&sport->port, UARTFIFO, |
7058 |
++ UARTFIFO_TXFLUSH | UARTFIFO_RXFLUSH); |
7059 |
+ |
7060 |
+ /* explicitly clear RDRF */ |
7061 |
+- if (readl(sport->port.membase + UARTSTAT) & UARTSTAT_RDRF) { |
7062 |
+- readl(sport->port.membase + UARTDATA); |
7063 |
+- writel(UARTFIFO_RXUF, sport->port.membase + UARTFIFO); |
7064 |
++ if (lpuart32_read(&sport->port, UARTSTAT) & UARTSTAT_RDRF) { |
7065 |
++ lpuart32_read(&sport->port, UARTDATA); |
7066 |
++ lpuart32_write(&sport->port, UARTFIFO, UARTFIFO_RXUF); |
7067 |
+ } |
7068 |
+ |
7069 |
+ /* Enable Rx and Tx */ |
7070 |
+- writel(UARTCTRL_RE | UARTCTRL_TE, sport->port.membase + UARTCTRL); |
7071 |
++ lpuart32_write(&sport->port, UARTCTRL, UARTCTRL_RE | UARTCTRL_TE); |
7072 |
+ spin_unlock_irqrestore(&sport->port.lock, flags); |
7073 |
+ |
7074 |
+ return 0; |
7075 |
+@@ -559,18 +559,18 @@ static int lpuart32_poll_init(struct uart_port *port) |
7076 |
+ |
7077 |
+ static void lpuart32_poll_put_char(struct uart_port *port, unsigned char c) |
7078 |
+ { |
7079 |
+- while (!(readl(port->membase + UARTSTAT) & UARTSTAT_TDRE)) |
7080 |
++ while (!(lpuart32_read(port, UARTSTAT) & UARTSTAT_TDRE)) |
7081 |
+ barrier(); |
7082 |
+ |
7083 |
+- writel(c, port->membase + UARTDATA); |
7084 |
++ lpuart32_write(port, UARTDATA, c); |
7085 |
+ } |
7086 |
+ |
7087 |
+ static int lpuart32_poll_get_char(struct uart_port *port) |
7088 |
+ { |
7089 |
+- if (!(readl(port->membase + UARTSTAT) & UARTSTAT_RDRF)) |
7090 |
++ if (!(lpuart32_read(port, UARTSTAT) & UARTSTAT_RDRF)) |
7091 |
+ return NO_POLL_CHAR; |
7092 |
+ |
7093 |
+- return readl(port->membase + UARTDATA); |
7094 |
++ return lpuart32_read(port, UARTDATA); |
7095 |
+ } |
7096 |
+ #endif |
7097 |
+ |
7098 |
+diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c |
7099 |
+index 03a583264d9e..1e854e1851fb 100644 |
7100 |
+--- a/drivers/tty/serial/stm32-usart.c |
7101 |
++++ b/drivers/tty/serial/stm32-usart.c |
7102 |
+@@ -118,35 +118,51 @@ static void stm32_receive_chars(struct uart_port *port, bool threaded) |
7103 |
+ |
7104 |
+ while (stm32_pending_rx(port, &sr, &stm32_port->last_res, threaded)) { |
7105 |
+ sr |= USART_SR_DUMMY_RX; |
7106 |
+- c = stm32_get_char(port, &sr, &stm32_port->last_res); |
7107 |
+ flag = TTY_NORMAL; |
7108 |
+- port->icount.rx++; |
7109 |
+ |
7110 |
++ /* |
7111 |
++ * Status bits has to be cleared before reading the RDR: |
7112 |
++ * In FIFO mode, reading the RDR will pop the next data |
7113 |
++ * (if any) along with its status bits into the SR. |
7114 |
++ * Not doing so leads to misalignement between RDR and SR, |
7115 |
++ * and clear status bits of the next rx data. |
7116 |
++ * |
7117 |
++ * Clear errors flags for stm32f7 and stm32h7 compatible |
7118 |
++ * devices. On stm32f4 compatible devices, the error bit is |
7119 |
++ * cleared by the sequence [read SR - read DR]. |
7120 |
++ */ |
7121 |
++ if ((sr & USART_SR_ERR_MASK) && ofs->icr != UNDEF_REG) |
7122 |
++ writel_relaxed(sr & USART_SR_ERR_MASK, |
7123 |
++ port->membase + ofs->icr); |
7124 |
++ |
7125 |
++ c = stm32_get_char(port, &sr, &stm32_port->last_res); |
7126 |
++ port->icount.rx++; |
7127 |
+ if (sr & USART_SR_ERR_MASK) { |
7128 |
+- if (sr & USART_SR_LBD) { |
7129 |
+- port->icount.brk++; |
7130 |
+- if (uart_handle_break(port)) |
7131 |
+- continue; |
7132 |
+- } else if (sr & USART_SR_ORE) { |
7133 |
+- if (ofs->icr != UNDEF_REG) |
7134 |
+- writel_relaxed(USART_ICR_ORECF, |
7135 |
+- port->membase + |
7136 |
+- ofs->icr); |
7137 |
++ if (sr & USART_SR_ORE) { |
7138 |
+ port->icount.overrun++; |
7139 |
+ } else if (sr & USART_SR_PE) { |
7140 |
+ port->icount.parity++; |
7141 |
+ } else if (sr & USART_SR_FE) { |
7142 |
+- port->icount.frame++; |
7143 |
++ /* Break detection if character is null */ |
7144 |
++ if (!c) { |
7145 |
++ port->icount.brk++; |
7146 |
++ if (uart_handle_break(port)) |
7147 |
++ continue; |
7148 |
++ } else { |
7149 |
++ port->icount.frame++; |
7150 |
++ } |
7151 |
+ } |
7152 |
+ |
7153 |
+ sr &= port->read_status_mask; |
7154 |
+ |
7155 |
+- if (sr & USART_SR_LBD) |
7156 |
+- flag = TTY_BREAK; |
7157 |
+- else if (sr & USART_SR_PE) |
7158 |
++ if (sr & USART_SR_PE) { |
7159 |
+ flag = TTY_PARITY; |
7160 |
+- else if (sr & USART_SR_FE) |
7161 |
+- flag = TTY_FRAME; |
7162 |
++ } else if (sr & USART_SR_FE) { |
7163 |
++ if (!c) |
7164 |
++ flag = TTY_BREAK; |
7165 |
++ else |
7166 |
++ flag = TTY_FRAME; |
7167 |
++ } |
7168 |
+ } |
7169 |
+ |
7170 |
+ if (uart_handle_sysrq_char(port, c)) |
7171 |
+@@ -164,21 +180,6 @@ static void stm32_tx_dma_complete(void *arg) |
7172 |
+ struct uart_port *port = arg; |
7173 |
+ struct stm32_port *stm32port = to_stm32_port(port); |
7174 |
+ struct stm32_usart_offsets *ofs = &stm32port->info->ofs; |
7175 |
+- unsigned int isr; |
7176 |
+- int ret; |
7177 |
+- |
7178 |
+- ret = readl_relaxed_poll_timeout_atomic(port->membase + ofs->isr, |
7179 |
+- isr, |
7180 |
+- (isr & USART_SR_TC), |
7181 |
+- 10, 100000); |
7182 |
+- |
7183 |
+- if (ret) |
7184 |
+- dev_err(port->dev, "terminal count not set\n"); |
7185 |
+- |
7186 |
+- if (ofs->icr == UNDEF_REG) |
7187 |
+- stm32_clr_bits(port, ofs->isr, USART_SR_TC); |
7188 |
+- else |
7189 |
+- stm32_set_bits(port, ofs->icr, USART_CR_TC); |
7190 |
+ |
7191 |
+ stm32_clr_bits(port, ofs->cr3, USART_CR3_DMAT); |
7192 |
+ stm32port->tx_dma_busy = false; |
7193 |
+@@ -270,7 +271,6 @@ static void stm32_transmit_chars_dma(struct uart_port *port) |
7194 |
+ /* Issue pending DMA TX requests */ |
7195 |
+ dma_async_issue_pending(stm32port->tx_ch); |
7196 |
+ |
7197 |
+- stm32_clr_bits(port, ofs->isr, USART_SR_TC); |
7198 |
+ stm32_set_bits(port, ofs->cr3, USART_CR3_DMAT); |
7199 |
+ |
7200 |
+ xmit->tail = (xmit->tail + count) & (UART_XMIT_SIZE - 1); |
7201 |
+@@ -294,15 +294,15 @@ static void stm32_transmit_chars(struct uart_port *port) |
7202 |
+ return; |
7203 |
+ } |
7204 |
+ |
7205 |
+- if (uart_tx_stopped(port)) { |
7206 |
+- stm32_stop_tx(port); |
7207 |
++ if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { |
7208 |
++ stm32_clr_bits(port, ofs->cr1, USART_CR1_TXEIE); |
7209 |
+ return; |
7210 |
+ } |
7211 |
+ |
7212 |
+- if (uart_circ_empty(xmit)) { |
7213 |
+- stm32_stop_tx(port); |
7214 |
+- return; |
7215 |
+- } |
7216 |
++ if (ofs->icr == UNDEF_REG) |
7217 |
++ stm32_clr_bits(port, ofs->isr, USART_SR_TC); |
7218 |
++ else |
7219 |
++ writel_relaxed(USART_ICR_TCCF, port->membase + ofs->icr); |
7220 |
+ |
7221 |
+ if (stm32_port->tx_ch) |
7222 |
+ stm32_transmit_chars_dma(port); |
7223 |
+@@ -313,7 +313,7 @@ static void stm32_transmit_chars(struct uart_port *port) |
7224 |
+ uart_write_wakeup(port); |
7225 |
+ |
7226 |
+ if (uart_circ_empty(xmit)) |
7227 |
+- stm32_stop_tx(port); |
7228 |
++ stm32_clr_bits(port, ofs->cr1, USART_CR1_TXEIE); |
7229 |
+ } |
7230 |
+ |
7231 |
+ static irqreturn_t stm32_interrupt(int irq, void *ptr) |
7232 |
+@@ -447,7 +447,6 @@ static int stm32_startup(struct uart_port *port) |
7233 |
+ { |
7234 |
+ struct stm32_port *stm32_port = to_stm32_port(port); |
7235 |
+ struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
7236 |
+- struct stm32_usart_config *cfg = &stm32_port->info->cfg; |
7237 |
+ const char *name = to_platform_device(port->dev)->name; |
7238 |
+ u32 val; |
7239 |
+ int ret; |
7240 |
+@@ -458,15 +457,6 @@ static int stm32_startup(struct uart_port *port) |
7241 |
+ if (ret) |
7242 |
+ return ret; |
7243 |
+ |
7244 |
+- if (cfg->has_wakeup && stm32_port->wakeirq >= 0) { |
7245 |
+- ret = dev_pm_set_dedicated_wake_irq(port->dev, |
7246 |
+- stm32_port->wakeirq); |
7247 |
+- if (ret) { |
7248 |
+- free_irq(port->irq, port); |
7249 |
+- return ret; |
7250 |
+- } |
7251 |
+- } |
7252 |
+- |
7253 |
+ val = USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE; |
7254 |
+ if (stm32_port->fifoen) |
7255 |
+ val |= USART_CR1_FIFOEN; |
7256 |
+@@ -480,15 +470,23 @@ static void stm32_shutdown(struct uart_port *port) |
7257 |
+ struct stm32_port *stm32_port = to_stm32_port(port); |
7258 |
+ struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; |
7259 |
+ struct stm32_usart_config *cfg = &stm32_port->info->cfg; |
7260 |
+- u32 val; |
7261 |
++ u32 val, isr; |
7262 |
++ int ret; |
7263 |
+ |
7264 |
+ val = USART_CR1_TXEIE | USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE; |
7265 |
+ val |= BIT(cfg->uart_enable_bit); |
7266 |
+ if (stm32_port->fifoen) |
7267 |
+ val |= USART_CR1_FIFOEN; |
7268 |
++ |
7269 |
++ ret = readl_relaxed_poll_timeout(port->membase + ofs->isr, |
7270 |
++ isr, (isr & USART_SR_TC), |
7271 |
++ 10, 100000); |
7272 |
++ |
7273 |
++ if (ret) |
7274 |
++ dev_err(port->dev, "transmission complete not set\n"); |
7275 |
++ |
7276 |
+ stm32_clr_bits(port, ofs->cr1, val); |
7277 |
+ |
7278 |
+- dev_pm_clear_wake_irq(port->dev); |
7279 |
+ free_irq(port->irq, port); |
7280 |
+ } |
7281 |
+ |
7282 |
+@@ -569,14 +567,14 @@ static void stm32_set_termios(struct uart_port *port, struct ktermios *termios, |
7283 |
+ if (termios->c_iflag & INPCK) |
7284 |
+ port->read_status_mask |= USART_SR_PE | USART_SR_FE; |
7285 |
+ if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK)) |
7286 |
+- port->read_status_mask |= USART_SR_LBD; |
7287 |
++ port->read_status_mask |= USART_SR_FE; |
7288 |
+ |
7289 |
+ /* Characters to ignore */ |
7290 |
+ port->ignore_status_mask = 0; |
7291 |
+ if (termios->c_iflag & IGNPAR) |
7292 |
+ port->ignore_status_mask = USART_SR_PE | USART_SR_FE; |
7293 |
+ if (termios->c_iflag & IGNBRK) { |
7294 |
+- port->ignore_status_mask |= USART_SR_LBD; |
7295 |
++ port->ignore_status_mask |= USART_SR_FE; |
7296 |
+ /* |
7297 |
+ * If we're ignoring parity and break indicators, |
7298 |
+ * ignore overruns too (for real raw support). |
7299 |
+@@ -895,11 +893,18 @@ static int stm32_serial_probe(struct platform_device *pdev) |
7300 |
+ ret = device_init_wakeup(&pdev->dev, true); |
7301 |
+ if (ret) |
7302 |
+ goto err_uninit; |
7303 |
++ |
7304 |
++ ret = dev_pm_set_dedicated_wake_irq(&pdev->dev, |
7305 |
++ stm32port->wakeirq); |
7306 |
++ if (ret) |
7307 |
++ goto err_nowup; |
7308 |
++ |
7309 |
++ device_set_wakeup_enable(&pdev->dev, false); |
7310 |
+ } |
7311 |
+ |
7312 |
+ ret = uart_add_one_port(&stm32_usart_driver, &stm32port->port); |
7313 |
+ if (ret) |
7314 |
+- goto err_nowup; |
7315 |
++ goto err_wirq; |
7316 |
+ |
7317 |
+ ret = stm32_of_dma_rx_probe(stm32port, pdev); |
7318 |
+ if (ret) |
7319 |
+@@ -913,6 +918,10 @@ static int stm32_serial_probe(struct platform_device *pdev) |
7320 |
+ |
7321 |
+ return 0; |
7322 |
+ |
7323 |
++err_wirq: |
7324 |
++ if (stm32port->info->cfg.has_wakeup && stm32port->wakeirq >= 0) |
7325 |
++ dev_pm_clear_wake_irq(&pdev->dev); |
7326 |
++ |
7327 |
+ err_nowup: |
7328 |
+ if (stm32port->info->cfg.has_wakeup && stm32port->wakeirq >= 0) |
7329 |
+ device_init_wakeup(&pdev->dev, false); |
7330 |
+@@ -950,8 +959,10 @@ static int stm32_serial_remove(struct platform_device *pdev) |
7331 |
+ TX_BUF_L, stm32_port->tx_buf, |
7332 |
+ stm32_port->tx_dma_buf); |
7333 |
+ |
7334 |
+- if (cfg->has_wakeup && stm32_port->wakeirq >= 0) |
7335 |
++ if (cfg->has_wakeup && stm32_port->wakeirq >= 0) { |
7336 |
++ dev_pm_clear_wake_irq(&pdev->dev); |
7337 |
+ device_init_wakeup(&pdev->dev, false); |
7338 |
++ } |
7339 |
+ |
7340 |
+ clk_disable_unprepare(stm32_port->clk); |
7341 |
+ |
7342 |
+diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h |
7343 |
+index ffc0c5285e51..9d087881913a 100644 |
7344 |
+--- a/drivers/tty/serial/stm32-usart.h |
7345 |
++++ b/drivers/tty/serial/stm32-usart.h |
7346 |
+@@ -108,7 +108,6 @@ struct stm32_usart_info stm32h7_info = { |
7347 |
+ #define USART_SR_RXNE BIT(5) |
7348 |
+ #define USART_SR_TC BIT(6) |
7349 |
+ #define USART_SR_TXE BIT(7) |
7350 |
+-#define USART_SR_LBD BIT(8) |
7351 |
+ #define USART_SR_CTSIF BIT(9) |
7352 |
+ #define USART_SR_CTS BIT(10) /* F7 */ |
7353 |
+ #define USART_SR_RTOF BIT(11) /* F7 */ |
7354 |
+@@ -120,8 +119,7 @@ struct stm32_usart_info stm32h7_info = { |
7355 |
+ #define USART_SR_SBKF BIT(18) /* F7 */ |
7356 |
+ #define USART_SR_WUF BIT(20) /* H7 */ |
7357 |
+ #define USART_SR_TEACK BIT(21) /* F7 */ |
7358 |
+-#define USART_SR_ERR_MASK (USART_SR_LBD | USART_SR_ORE | \ |
7359 |
+- USART_SR_FE | USART_SR_PE) |
7360 |
++#define USART_SR_ERR_MASK (USART_SR_ORE | USART_SR_FE | USART_SR_PE) |
7361 |
+ /* Dummy bits */ |
7362 |
+ #define USART_SR_DUMMY_RX BIT(16) |
7363 |
+ |
7364 |
+@@ -166,8 +164,6 @@ struct stm32_usart_info stm32h7_info = { |
7365 |
+ /* USART_CR2 */ |
7366 |
+ #define USART_CR2_ADD_MASK GENMASK(3, 0) /* F4 */ |
7367 |
+ #define USART_CR2_ADDM7 BIT(4) /* F7 */ |
7368 |
+-#define USART_CR2_LBDL BIT(5) |
7369 |
+-#define USART_CR2_LBDIE BIT(6) |
7370 |
+ #define USART_CR2_LBCL BIT(8) |
7371 |
+ #define USART_CR2_CPHA BIT(9) |
7372 |
+ #define USART_CR2_CPOL BIT(10) |
7373 |
+@@ -224,12 +220,10 @@ struct stm32_usart_info stm32h7_info = { |
7374 |
+ |
7375 |
+ /* USART_ICR */ |
7376 |
+ #define USART_ICR_PECF BIT(0) /* F7 */ |
7377 |
+-#define USART_ICR_FFECF BIT(1) /* F7 */ |
7378 |
+-#define USART_ICR_NCF BIT(2) /* F7 */ |
7379 |
++#define USART_ICR_FECF BIT(1) /* F7 */ |
7380 |
+ #define USART_ICR_ORECF BIT(3) /* F7 */ |
7381 |
+ #define USART_ICR_IDLECF BIT(4) /* F7 */ |
7382 |
+ #define USART_ICR_TCCF BIT(6) /* F7 */ |
7383 |
+-#define USART_ICR_LBDCF BIT(8) /* F7 */ |
7384 |
+ #define USART_ICR_CTSCF BIT(9) /* F7 */ |
7385 |
+ #define USART_ICR_RTOCF BIT(11) /* F7 */ |
7386 |
+ #define USART_ICR_EOBCF BIT(12) /* F7 */ |
7387 |
+diff --git a/drivers/uio/uio.c b/drivers/uio/uio.c |
7388 |
+index fb5c9701b1fb..7c18536a3742 100644 |
7389 |
+--- a/drivers/uio/uio.c |
7390 |
++++ b/drivers/uio/uio.c |
7391 |
+@@ -939,9 +939,12 @@ int __uio_register_device(struct module *owner, |
7392 |
+ atomic_set(&idev->event, 0); |
7393 |
+ |
7394 |
+ ret = uio_get_minor(idev); |
7395 |
+- if (ret) |
7396 |
++ if (ret) { |
7397 |
++ kfree(idev); |
7398 |
+ return ret; |
7399 |
++ } |
7400 |
+ |
7401 |
++ device_initialize(&idev->dev); |
7402 |
+ idev->dev.devt = MKDEV(uio_major, idev->minor); |
7403 |
+ idev->dev.class = &uio_class; |
7404 |
+ idev->dev.parent = parent; |
7405 |
+@@ -952,7 +955,7 @@ int __uio_register_device(struct module *owner, |
7406 |
+ if (ret) |
7407 |
+ goto err_device_create; |
7408 |
+ |
7409 |
+- ret = device_register(&idev->dev); |
7410 |
++ ret = device_add(&idev->dev); |
7411 |
+ if (ret) |
7412 |
+ goto err_device_create; |
7413 |
+ |
7414 |
+@@ -984,9 +987,10 @@ int __uio_register_device(struct module *owner, |
7415 |
+ err_request_irq: |
7416 |
+ uio_dev_del_attributes(idev); |
7417 |
+ err_uio_dev_add_attributes: |
7418 |
+- device_unregister(&idev->dev); |
7419 |
++ device_del(&idev->dev); |
7420 |
+ err_device_create: |
7421 |
+ uio_free_minor(idev); |
7422 |
++ put_device(&idev->dev); |
7423 |
+ return ret; |
7424 |
+ } |
7425 |
+ EXPORT_SYMBOL_GPL(__uio_register_device); |
7426 |
+diff --git a/drivers/usb/class/cdc-wdm.c b/drivers/usb/class/cdc-wdm.c |
7427 |
+index a593cdfc897f..d5d42dccda10 100644 |
7428 |
+--- a/drivers/usb/class/cdc-wdm.c |
7429 |
++++ b/drivers/usb/class/cdc-wdm.c |
7430 |
+@@ -1085,7 +1085,7 @@ static int wdm_post_reset(struct usb_interface *intf) |
7431 |
+ rv = recover_from_urb_loss(desc); |
7432 |
+ mutex_unlock(&desc->wlock); |
7433 |
+ mutex_unlock(&desc->rlock); |
7434 |
+- return 0; |
7435 |
++ return rv; |
7436 |
+ } |
7437 |
+ |
7438 |
+ static struct usb_driver wdm_driver = { |
7439 |
+diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c |
7440 |
+index e164439b2154..4af9a1c652ed 100644 |
7441 |
+--- a/drivers/usb/dwc2/gadget.c |
7442 |
++++ b/drivers/usb/dwc2/gadget.c |
7443 |
+@@ -2276,6 +2276,7 @@ static unsigned int dwc2_gadget_get_xfersize_ddma(struct dwc2_hsotg_ep *hs_ep) |
7444 |
+ if (status & DEV_DMA_STS_MASK) |
7445 |
+ dev_err(hsotg->dev, "descriptor %d closed with %x\n", |
7446 |
+ i, status & DEV_DMA_STS_MASK); |
7447 |
++ desc++; |
7448 |
+ } |
7449 |
+ |
7450 |
+ return bytes_rem; |
7451 |
+diff --git a/drivers/usb/host/xhci-hub.c b/drivers/usb/host/xhci-hub.c |
7452 |
+index d1363f3fabfa..3bb38d9dc45b 100644 |
7453 |
+--- a/drivers/usb/host/xhci-hub.c |
7454 |
++++ b/drivers/usb/host/xhci-hub.c |
7455 |
+@@ -1118,7 +1118,7 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, |
7456 |
+ } |
7457 |
+ port_li = readl(port_array[wIndex] + PORTLI); |
7458 |
+ status = xhci_get_ext_port_status(temp, port_li); |
7459 |
+- put_unaligned_le32(cpu_to_le32(status), &buf[4]); |
7460 |
++ put_unaligned_le32(status, &buf[4]); |
7461 |
+ } |
7462 |
+ break; |
7463 |
+ case SetPortFeature: |
7464 |
+diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig |
7465 |
+index 85a92d0813dd..440238061edd 100644 |
7466 |
+--- a/drivers/usb/phy/Kconfig |
7467 |
++++ b/drivers/usb/phy/Kconfig |
7468 |
+@@ -20,7 +20,7 @@ config AB8500_USB |
7469 |
+ in host mode, low speed. |
7470 |
+ |
7471 |
+ config FSL_USB2_OTG |
7472 |
+- bool "Freescale USB OTG Transceiver Driver" |
7473 |
++ tristate "Freescale USB OTG Transceiver Driver" |
7474 |
+ depends on USB_EHCI_FSL && USB_FSL_USB2 && USB_OTG_FSM=y && PM |
7475 |
+ depends on USB_GADGET || !USB_GADGET # if USB_GADGET=m, this can't be 'y' |
7476 |
+ select USB_PHY |
7477 |
+diff --git a/drivers/usb/phy/phy-twl6030-usb.c b/drivers/usb/phy/phy-twl6030-usb.c |
7478 |
+index b5dc077ed7d3..8e14fa221191 100644 |
7479 |
+--- a/drivers/usb/phy/phy-twl6030-usb.c |
7480 |
++++ b/drivers/usb/phy/phy-twl6030-usb.c |
7481 |
+@@ -413,7 +413,7 @@ static int twl6030_usb_remove(struct platform_device *pdev) |
7482 |
+ { |
7483 |
+ struct twl6030_usb *twl = platform_get_drvdata(pdev); |
7484 |
+ |
7485 |
+- cancel_delayed_work(&twl->get_status_work); |
7486 |
++ cancel_delayed_work_sync(&twl->get_status_work); |
7487 |
+ twl6030_interrupt_mask(TWL6030_USBOTG_INT_MASK, |
7488 |
+ REG_INT_MSK_LINE_C); |
7489 |
+ twl6030_interrupt_mask(TWL6030_USBOTG_INT_MASK, |
7490 |
+diff --git a/drivers/vfio/mdev/mdev_core.c b/drivers/vfio/mdev/mdev_core.c |
7491 |
+index 0212f0ee8aea..e052f62fdea7 100644 |
7492 |
+--- a/drivers/vfio/mdev/mdev_core.c |
7493 |
++++ b/drivers/vfio/mdev/mdev_core.c |
7494 |
+@@ -150,10 +150,10 @@ static int mdev_device_remove_ops(struct mdev_device *mdev, bool force_remove) |
7495 |
+ |
7496 |
+ static int mdev_device_remove_cb(struct device *dev, void *data) |
7497 |
+ { |
7498 |
+- if (!dev_is_mdev(dev)) |
7499 |
+- return 0; |
7500 |
++ if (dev_is_mdev(dev)) |
7501 |
++ mdev_device_remove(dev, true); |
7502 |
+ |
7503 |
+- return mdev_device_remove(dev, data ? *(bool *)data : true); |
7504 |
++ return 0; |
7505 |
+ } |
7506 |
+ |
7507 |
+ /* |
7508 |
+@@ -182,6 +182,7 @@ int mdev_register_device(struct device *dev, const struct mdev_parent_ops *ops) |
7509 |
+ /* Check for duplicate */ |
7510 |
+ parent = __find_parent_device(dev); |
7511 |
+ if (parent) { |
7512 |
++ parent = NULL; |
7513 |
+ ret = -EEXIST; |
7514 |
+ goto add_dev_err; |
7515 |
+ } |
7516 |
+@@ -240,7 +241,6 @@ EXPORT_SYMBOL(mdev_register_device); |
7517 |
+ void mdev_unregister_device(struct device *dev) |
7518 |
+ { |
7519 |
+ struct mdev_parent *parent; |
7520 |
+- bool force_remove = true; |
7521 |
+ |
7522 |
+ mutex_lock(&parent_list_lock); |
7523 |
+ parent = __find_parent_device(dev); |
7524 |
+@@ -254,8 +254,7 @@ void mdev_unregister_device(struct device *dev) |
7525 |
+ list_del(&parent->next); |
7526 |
+ class_compat_remove_link(mdev_bus_compat_class, dev, NULL); |
7527 |
+ |
7528 |
+- device_for_each_child(dev, (void *)&force_remove, |
7529 |
+- mdev_device_remove_cb); |
7530 |
++ device_for_each_child(dev, NULL, mdev_device_remove_cb); |
7531 |
+ |
7532 |
+ parent_remove_sysfs_files(parent); |
7533 |
+ |
7534 |
+diff --git a/drivers/vfio/pci/vfio_pci.c b/drivers/vfio/pci/vfio_pci.c |
7535 |
+index 9bd3e7911af2..550ab7707b57 100644 |
7536 |
+--- a/drivers/vfio/pci/vfio_pci.c |
7537 |
++++ b/drivers/vfio/pci/vfio_pci.c |
7538 |
+@@ -717,6 +717,7 @@ static long vfio_pci_ioctl(void *device_data, |
7539 |
+ { |
7540 |
+ void __iomem *io; |
7541 |
+ size_t size; |
7542 |
++ u16 orig_cmd; |
7543 |
+ |
7544 |
+ info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index); |
7545 |
+ info.flags = 0; |
7546 |
+@@ -732,15 +733,23 @@ static long vfio_pci_ioctl(void *device_data, |
7547 |
+ break; |
7548 |
+ } |
7549 |
+ |
7550 |
+- /* Is it really there? */ |
7551 |
++ /* |
7552 |
++ * Is it really there? Enable memory decode for |
7553 |
++ * implicit access in pci_map_rom(). |
7554 |
++ */ |
7555 |
++ pci_read_config_word(pdev, PCI_COMMAND, &orig_cmd); |
7556 |
++ pci_write_config_word(pdev, PCI_COMMAND, |
7557 |
++ orig_cmd | PCI_COMMAND_MEMORY); |
7558 |
++ |
7559 |
+ io = pci_map_rom(pdev, &size); |
7560 |
+- if (!io || !size) { |
7561 |
++ if (io) { |
7562 |
++ info.flags = VFIO_REGION_INFO_FLAG_READ; |
7563 |
++ pci_unmap_rom(pdev, io); |
7564 |
++ } else { |
7565 |
+ info.size = 0; |
7566 |
+- break; |
7567 |
+ } |
7568 |
+- pci_unmap_rom(pdev, io); |
7569 |
+ |
7570 |
+- info.flags = VFIO_REGION_INFO_FLAG_READ; |
7571 |
++ pci_write_config_word(pdev, PCI_COMMAND, orig_cmd); |
7572 |
+ break; |
7573 |
+ } |
7574 |
+ case VFIO_PCI_VGA_REGION_INDEX: |
7575 |
+diff --git a/drivers/video/backlight/lm3630a_bl.c b/drivers/video/backlight/lm3630a_bl.c |
7576 |
+index 2030a6b77a09..ef2553f452ca 100644 |
7577 |
+--- a/drivers/video/backlight/lm3630a_bl.c |
7578 |
++++ b/drivers/video/backlight/lm3630a_bl.c |
7579 |
+@@ -201,7 +201,7 @@ static int lm3630a_bank_a_update_status(struct backlight_device *bl) |
7580 |
+ LM3630A_LEDA_ENABLE, LM3630A_LEDA_ENABLE); |
7581 |
+ if (ret < 0) |
7582 |
+ goto out_i2c_err; |
7583 |
+- return bl->props.brightness; |
7584 |
++ return 0; |
7585 |
+ |
7586 |
+ out_i2c_err: |
7587 |
+ dev_err(pchip->dev, "i2c failed to access\n"); |
7588 |
+@@ -278,7 +278,7 @@ static int lm3630a_bank_b_update_status(struct backlight_device *bl) |
7589 |
+ LM3630A_LEDB_ENABLE, LM3630A_LEDB_ENABLE); |
7590 |
+ if (ret < 0) |
7591 |
+ goto out_i2c_err; |
7592 |
+- return bl->props.brightness; |
7593 |
++ return 0; |
7594 |
+ |
7595 |
+ out_i2c_err: |
7596 |
+ dev_err(pchip->dev, "i2c failed to access REG_CTRL\n"); |
7597 |
+diff --git a/drivers/video/fbdev/chipsfb.c b/drivers/video/fbdev/chipsfb.c |
7598 |
+index f103665cad43..f9b366d17587 100644 |
7599 |
+--- a/drivers/video/fbdev/chipsfb.c |
7600 |
++++ b/drivers/video/fbdev/chipsfb.c |
7601 |
+@@ -350,7 +350,7 @@ static void init_chips(struct fb_info *p, unsigned long addr) |
7602 |
+ static int chipsfb_pci_init(struct pci_dev *dp, const struct pci_device_id *ent) |
7603 |
+ { |
7604 |
+ struct fb_info *p; |
7605 |
+- unsigned long addr, size; |
7606 |
++ unsigned long addr; |
7607 |
+ unsigned short cmd; |
7608 |
+ int rc = -ENODEV; |
7609 |
+ |
7610 |
+@@ -362,7 +362,6 @@ static int chipsfb_pci_init(struct pci_dev *dp, const struct pci_device_id *ent) |
7611 |
+ if ((dp->resource[0].flags & IORESOURCE_MEM) == 0) |
7612 |
+ goto err_disable; |
7613 |
+ addr = pci_resource_start(dp, 0); |
7614 |
+- size = pci_resource_len(dp, 0); |
7615 |
+ if (addr == 0) |
7616 |
+ goto err_disable; |
7617 |
+ |
7618 |
+diff --git a/drivers/xen/cpu_hotplug.c b/drivers/xen/cpu_hotplug.c |
7619 |
+index b1357aa4bc55..f192b6f42da9 100644 |
7620 |
+--- a/drivers/xen/cpu_hotplug.c |
7621 |
++++ b/drivers/xen/cpu_hotplug.c |
7622 |
+@@ -54,7 +54,7 @@ static int vcpu_online(unsigned int cpu) |
7623 |
+ } |
7624 |
+ static void vcpu_hotplug(unsigned int cpu) |
7625 |
+ { |
7626 |
+- if (!cpu_possible(cpu)) |
7627 |
++ if (cpu >= nr_cpu_ids || !cpu_possible(cpu)) |
7628 |
+ return; |
7629 |
+ |
7630 |
+ switch (vcpu_online(cpu)) { |
7631 |
+diff --git a/drivers/xen/pvcalls-back.c b/drivers/xen/pvcalls-back.c |
7632 |
+index abd6dbc29ac2..58be15c27b6d 100644 |
7633 |
+--- a/drivers/xen/pvcalls-back.c |
7634 |
++++ b/drivers/xen/pvcalls-back.c |
7635 |
+@@ -792,7 +792,7 @@ static int pvcalls_back_poll(struct xenbus_device *dev, |
7636 |
+ mappass->reqcopy = *req; |
7637 |
+ icsk = inet_csk(mappass->sock->sk); |
7638 |
+ queue = &icsk->icsk_accept_queue; |
7639 |
+- data = queue->rskq_accept_head != NULL; |
7640 |
++ data = READ_ONCE(queue->rskq_accept_head) != NULL; |
7641 |
+ if (data) { |
7642 |
+ mappass->reqcopy.cmd = 0; |
7643 |
+ ret = 0; |
7644 |
+diff --git a/fs/affs/super.c b/fs/affs/super.c |
7645 |
+index 884bedab7266..789a1c7db5d8 100644 |
7646 |
+--- a/fs/affs/super.c |
7647 |
++++ b/fs/affs/super.c |
7648 |
+@@ -559,14 +559,9 @@ affs_remount(struct super_block *sb, int *flags, char *data) |
7649 |
+ int root_block; |
7650 |
+ unsigned long mount_flags; |
7651 |
+ int res = 0; |
7652 |
+- char *new_opts; |
7653 |
+ char volume[32]; |
7654 |
+ char *prefix = NULL; |
7655 |
+ |
7656 |
+- new_opts = kstrdup(data, GFP_KERNEL); |
7657 |
+- if (data && !new_opts) |
7658 |
+- return -ENOMEM; |
7659 |
+- |
7660 |
+ pr_debug("%s(flags=0x%x,opts=\"%s\")\n", __func__, *flags, data); |
7661 |
+ |
7662 |
+ sync_filesystem(sb); |
7663 |
+@@ -577,7 +572,6 @@ affs_remount(struct super_block *sb, int *flags, char *data) |
7664 |
+ &blocksize, &prefix, volume, |
7665 |
+ &mount_flags)) { |
7666 |
+ kfree(prefix); |
7667 |
+- kfree(new_opts); |
7668 |
+ return -EINVAL; |
7669 |
+ } |
7670 |
+ |
7671 |
+diff --git a/fs/afs/super.c b/fs/afs/super.c |
7672 |
+index 689173c0a682..f8529ddbd587 100644 |
7673 |
+--- a/fs/afs/super.c |
7674 |
++++ b/fs/afs/super.c |
7675 |
+@@ -359,6 +359,7 @@ static int afs_fill_super(struct super_block *sb, |
7676 |
+ /* fill in the superblock */ |
7677 |
+ sb->s_blocksize = PAGE_SIZE; |
7678 |
+ sb->s_blocksize_bits = PAGE_SHIFT; |
7679 |
++ sb->s_maxbytes = MAX_LFS_FILESIZE; |
7680 |
+ sb->s_magic = AFS_FS_MAGIC; |
7681 |
+ sb->s_op = &afs_super_ops; |
7682 |
+ sb->s_xattr = afs_xattr_handlers; |
7683 |
+diff --git a/fs/afs/xattr.c b/fs/afs/xattr.c |
7684 |
+index 2830e4f48d85..7c6b62a94e7e 100644 |
7685 |
+--- a/fs/afs/xattr.c |
7686 |
++++ b/fs/afs/xattr.c |
7687 |
+@@ -50,7 +50,7 @@ static int afs_xattr_get_cell(const struct xattr_handler *handler, |
7688 |
+ return namelen; |
7689 |
+ if (namelen > size) |
7690 |
+ return -ERANGE; |
7691 |
+- memcpy(buffer, cell->name, size); |
7692 |
++ memcpy(buffer, cell->name, namelen); |
7693 |
+ return namelen; |
7694 |
+ } |
7695 |
+ |
7696 |
+@@ -104,7 +104,7 @@ static int afs_xattr_get_volume(const struct xattr_handler *handler, |
7697 |
+ return namelen; |
7698 |
+ if (namelen > size) |
7699 |
+ return -ERANGE; |
7700 |
+- memcpy(buffer, volname, size); |
7701 |
++ memcpy(buffer, volname, namelen); |
7702 |
+ return namelen; |
7703 |
+ } |
7704 |
+ |
7705 |
+diff --git a/fs/btrfs/file.c b/fs/btrfs/file.c |
7706 |
+index 97be32da857a..c68ce3412dc1 100644 |
7707 |
+--- a/fs/btrfs/file.c |
7708 |
++++ b/fs/btrfs/file.c |
7709 |
+@@ -1882,7 +1882,7 @@ static ssize_t btrfs_file_write_iter(struct kiocb *iocb, |
7710 |
+ bool sync = (file->f_flags & O_DSYNC) || IS_SYNC(file->f_mapping->host); |
7711 |
+ ssize_t err; |
7712 |
+ loff_t pos; |
7713 |
+- size_t count = iov_iter_count(from); |
7714 |
++ size_t count; |
7715 |
+ loff_t oldsize; |
7716 |
+ int clean_page = 0; |
7717 |
+ |
7718 |
+@@ -1904,6 +1904,7 @@ static ssize_t btrfs_file_write_iter(struct kiocb *iocb, |
7719 |
+ } |
7720 |
+ |
7721 |
+ pos = iocb->ki_pos; |
7722 |
++ count = iov_iter_count(from); |
7723 |
+ if (iocb->ki_flags & IOCB_NOWAIT) { |
7724 |
+ /* |
7725 |
+ * We will allocate space in case nodatacow is not set, |
7726 |
+diff --git a/fs/btrfs/inode-map.c b/fs/btrfs/inode-map.c |
7727 |
+index d02019747d00..2ae32451fb5b 100644 |
7728 |
+--- a/fs/btrfs/inode-map.c |
7729 |
++++ b/fs/btrfs/inode-map.c |
7730 |
+@@ -26,6 +26,19 @@ |
7731 |
+ #include "inode-map.h" |
7732 |
+ #include "transaction.h" |
7733 |
+ |
7734 |
++static void fail_caching_thread(struct btrfs_root *root) |
7735 |
++{ |
7736 |
++ struct btrfs_fs_info *fs_info = root->fs_info; |
7737 |
++ |
7738 |
++ btrfs_warn(fs_info, "failed to start inode caching task"); |
7739 |
++ btrfs_clear_pending_and_info(fs_info, INODE_MAP_CACHE, |
7740 |
++ "disabling inode map caching"); |
7741 |
++ spin_lock(&root->ino_cache_lock); |
7742 |
++ root->ino_cache_state = BTRFS_CACHE_ERROR; |
7743 |
++ spin_unlock(&root->ino_cache_lock); |
7744 |
++ wake_up(&root->ino_cache_wait); |
7745 |
++} |
7746 |
++ |
7747 |
+ static int caching_kthread(void *data) |
7748 |
+ { |
7749 |
+ struct btrfs_root *root = data; |
7750 |
+@@ -42,8 +55,10 @@ static int caching_kthread(void *data) |
7751 |
+ return 0; |
7752 |
+ |
7753 |
+ path = btrfs_alloc_path(); |
7754 |
+- if (!path) |
7755 |
++ if (!path) { |
7756 |
++ fail_caching_thread(root); |
7757 |
+ return -ENOMEM; |
7758 |
++ } |
7759 |
+ |
7760 |
+ /* Since the commit root is read-only, we can safely skip locking. */ |
7761 |
+ path->skip_locking = 1; |
7762 |
+@@ -159,6 +174,7 @@ static void start_caching(struct btrfs_root *root) |
7763 |
+ spin_lock(&root->ino_cache_lock); |
7764 |
+ root->ino_cache_state = BTRFS_CACHE_FINISHED; |
7765 |
+ spin_unlock(&root->ino_cache_lock); |
7766 |
++ wake_up(&root->ino_cache_wait); |
7767 |
+ return; |
7768 |
+ } |
7769 |
+ |
7770 |
+@@ -177,11 +193,8 @@ static void start_caching(struct btrfs_root *root) |
7771 |
+ |
7772 |
+ tsk = kthread_run(caching_kthread, root, "btrfs-ino-cache-%llu", |
7773 |
+ root->root_key.objectid); |
7774 |
+- if (IS_ERR(tsk)) { |
7775 |
+- btrfs_warn(fs_info, "failed to start inode caching task"); |
7776 |
+- btrfs_clear_pending_and_info(fs_info, INODE_MAP_CACHE, |
7777 |
+- "disabling inode map caching"); |
7778 |
+- } |
7779 |
++ if (IS_ERR(tsk)) |
7780 |
++ fail_caching_thread(root); |
7781 |
+ } |
7782 |
+ |
7783 |
+ int btrfs_find_free_ino(struct btrfs_root *root, u64 *objectid) |
7784 |
+@@ -199,11 +212,14 @@ again: |
7785 |
+ |
7786 |
+ wait_event(root->ino_cache_wait, |
7787 |
+ root->ino_cache_state == BTRFS_CACHE_FINISHED || |
7788 |
++ root->ino_cache_state == BTRFS_CACHE_ERROR || |
7789 |
+ root->free_ino_ctl->free_space > 0); |
7790 |
+ |
7791 |
+ if (root->ino_cache_state == BTRFS_CACHE_FINISHED && |
7792 |
+ root->free_ino_ctl->free_space == 0) |
7793 |
+ return -ENOSPC; |
7794 |
++ else if (root->ino_cache_state == BTRFS_CACHE_ERROR) |
7795 |
++ return btrfs_find_free_objectid(root, objectid); |
7796 |
+ else |
7797 |
+ goto again; |
7798 |
+ } |
7799 |
+diff --git a/fs/cifs/connect.c b/fs/cifs/connect.c |
7800 |
+index f523a9ca9574..f0b1279a7de6 100644 |
7801 |
+--- a/fs/cifs/connect.c |
7802 |
++++ b/fs/cifs/connect.c |
7803 |
+@@ -921,6 +921,7 @@ cifs_demultiplex_thread(void *p) |
7804 |
+ mempool_resize(cifs_req_poolp, length + cifs_min_rcv); |
7805 |
+ |
7806 |
+ set_freezable(); |
7807 |
++ allow_kernel_signal(SIGKILL); |
7808 |
+ while (server->tcpStatus != CifsExiting) { |
7809 |
+ if (try_to_freeze()) |
7810 |
+ continue; |
7811 |
+@@ -2320,7 +2321,7 @@ cifs_put_tcp_session(struct TCP_Server_Info *server, int from_reconnect) |
7812 |
+ |
7813 |
+ task = xchg(&server->tsk, NULL); |
7814 |
+ if (task) |
7815 |
+- force_sig(SIGKILL, task); |
7816 |
++ send_sig(SIGKILL, task, 1); |
7817 |
+ } |
7818 |
+ |
7819 |
+ static struct TCP_Server_Info * |
7820 |
+diff --git a/fs/exportfs/expfs.c b/fs/exportfs/expfs.c |
7821 |
+index a561ae17cf43..c08960040dd0 100644 |
7822 |
+--- a/fs/exportfs/expfs.c |
7823 |
++++ b/fs/exportfs/expfs.c |
7824 |
+@@ -147,6 +147,7 @@ static struct dentry *reconnect_one(struct vfsmount *mnt, |
7825 |
+ tmp = lookup_one_len_unlocked(nbuf, parent, strlen(nbuf)); |
7826 |
+ if (IS_ERR(tmp)) { |
7827 |
+ dprintk("%s: lookup failed: %d\n", __func__, PTR_ERR(tmp)); |
7828 |
++ err = PTR_ERR(tmp); |
7829 |
+ goto out_err; |
7830 |
+ } |
7831 |
+ if (tmp != dentry) { |
7832 |
+diff --git a/fs/ext4/inline.c b/fs/ext4/inline.c |
7833 |
+index 137c752ab985..6064bcb8572b 100644 |
7834 |
+--- a/fs/ext4/inline.c |
7835 |
++++ b/fs/ext4/inline.c |
7836 |
+@@ -1425,7 +1425,7 @@ int htree_inlinedir_to_tree(struct file *dir_file, |
7837 |
+ err = ext4_htree_store_dirent(dir_file, hinfo->hash, |
7838 |
+ hinfo->minor_hash, de, &tmp_str); |
7839 |
+ if (err) { |
7840 |
+- count = err; |
7841 |
++ ret = err; |
7842 |
+ goto out; |
7843 |
+ } |
7844 |
+ count++; |
7845 |
+diff --git a/fs/jfs/jfs_txnmgr.c b/fs/jfs/jfs_txnmgr.c |
7846 |
+index 4d973524c887..224ef034004b 100644 |
7847 |
+--- a/fs/jfs/jfs_txnmgr.c |
7848 |
++++ b/fs/jfs/jfs_txnmgr.c |
7849 |
+@@ -1928,8 +1928,7 @@ static void xtLog(struct jfs_log * log, struct tblock * tblk, struct lrd * lrd, |
7850 |
+ * header ? |
7851 |
+ */ |
7852 |
+ if (tlck->type & tlckTRUNCATE) { |
7853 |
+- /* This odd declaration suppresses a bogus gcc warning */ |
7854 |
+- pxd_t pxd = pxd; /* truncated extent of xad */ |
7855 |
++ pxd_t pxd; /* truncated extent of xad */ |
7856 |
+ int twm; |
7857 |
+ |
7858 |
+ /* |
7859 |
+diff --git a/fs/nfs/delegation.c b/fs/nfs/delegation.c |
7860 |
+index 04d57e11577e..09b3bcb86d32 100644 |
7861 |
+--- a/fs/nfs/delegation.c |
7862 |
++++ b/fs/nfs/delegation.c |
7863 |
+@@ -234,6 +234,8 @@ static struct inode *nfs_delegation_grab_inode(struct nfs_delegation *delegation |
7864 |
+ spin_lock(&delegation->lock); |
7865 |
+ if (delegation->inode != NULL) |
7866 |
+ inode = igrab(delegation->inode); |
7867 |
++ if (!inode) |
7868 |
++ set_bit(NFS_DELEGATION_INODE_FREEING, &delegation->flags); |
7869 |
+ spin_unlock(&delegation->lock); |
7870 |
+ return inode; |
7871 |
+ } |
7872 |
+@@ -863,10 +865,11 @@ restart: |
7873 |
+ list_for_each_entry_rcu(server, &clp->cl_superblocks, client_link) { |
7874 |
+ list_for_each_entry_rcu(delegation, &server->delegations, |
7875 |
+ super_list) { |
7876 |
+- if (test_bit(NFS_DELEGATION_RETURNING, |
7877 |
+- &delegation->flags)) |
7878 |
+- continue; |
7879 |
+- if (test_bit(NFS_DELEGATION_NEED_RECLAIM, |
7880 |
++ if (test_bit(NFS_DELEGATION_INODE_FREEING, |
7881 |
++ &delegation->flags) || |
7882 |
++ test_bit(NFS_DELEGATION_RETURNING, |
7883 |
++ &delegation->flags) || |
7884 |
++ test_bit(NFS_DELEGATION_NEED_RECLAIM, |
7885 |
+ &delegation->flags) == 0) |
7886 |
+ continue; |
7887 |
+ if (!nfs_sb_active(server->super)) |
7888 |
+@@ -971,10 +974,11 @@ restart: |
7889 |
+ list_for_each_entry_rcu(server, &clp->cl_superblocks, client_link) { |
7890 |
+ list_for_each_entry_rcu(delegation, &server->delegations, |
7891 |
+ super_list) { |
7892 |
+- if (test_bit(NFS_DELEGATION_RETURNING, |
7893 |
+- &delegation->flags)) |
7894 |
+- continue; |
7895 |
+- if (test_bit(NFS_DELEGATION_TEST_EXPIRED, |
7896 |
++ if (test_bit(NFS_DELEGATION_INODE_FREEING, |
7897 |
++ &delegation->flags) || |
7898 |
++ test_bit(NFS_DELEGATION_RETURNING, |
7899 |
++ &delegation->flags) || |
7900 |
++ test_bit(NFS_DELEGATION_TEST_EXPIRED, |
7901 |
+ &delegation->flags) == 0) |
7902 |
+ continue; |
7903 |
+ if (!nfs_sb_active(server->super)) |
7904 |
+diff --git a/fs/nfs/delegation.h b/fs/nfs/delegation.h |
7905 |
+index df41d16dc6ab..510c9edcc712 100644 |
7906 |
+--- a/fs/nfs/delegation.h |
7907 |
++++ b/fs/nfs/delegation.h |
7908 |
+@@ -34,6 +34,7 @@ enum { |
7909 |
+ NFS_DELEGATION_RETURNING, |
7910 |
+ NFS_DELEGATION_REVOKED, |
7911 |
+ NFS_DELEGATION_TEST_EXPIRED, |
7912 |
++ NFS_DELEGATION_INODE_FREEING, |
7913 |
+ }; |
7914 |
+ |
7915 |
+ int nfs_inode_set_delegation(struct inode *inode, struct rpc_cred *cred, struct nfs_openres *res); |
7916 |
+diff --git a/fs/nfs/flexfilelayout/flexfilelayout.h b/fs/nfs/flexfilelayout/flexfilelayout.h |
7917 |
+index d6515f1584f3..d78ec99b6c4c 100644 |
7918 |
+--- a/fs/nfs/flexfilelayout/flexfilelayout.h |
7919 |
++++ b/fs/nfs/flexfilelayout/flexfilelayout.h |
7920 |
+@@ -131,16 +131,6 @@ FF_LAYOUT_LSEG(struct pnfs_layout_segment *lseg) |
7921 |
+ generic_hdr); |
7922 |
+ } |
7923 |
+ |
7924 |
+-static inline struct nfs4_deviceid_node * |
7925 |
+-FF_LAYOUT_DEVID_NODE(struct pnfs_layout_segment *lseg, u32 idx) |
7926 |
+-{ |
7927 |
+- if (idx >= FF_LAYOUT_LSEG(lseg)->mirror_array_cnt || |
7928 |
+- FF_LAYOUT_LSEG(lseg)->mirror_array[idx] == NULL || |
7929 |
+- FF_LAYOUT_LSEG(lseg)->mirror_array[idx]->mirror_ds == NULL) |
7930 |
+- return NULL; |
7931 |
+- return &FF_LAYOUT_LSEG(lseg)->mirror_array[idx]->mirror_ds->id_node; |
7932 |
+-} |
7933 |
+- |
7934 |
+ static inline struct nfs4_ff_layout_ds * |
7935 |
+ FF_LAYOUT_MIRROR_DS(struct nfs4_deviceid_node *node) |
7936 |
+ { |
7937 |
+@@ -150,9 +140,25 @@ FF_LAYOUT_MIRROR_DS(struct nfs4_deviceid_node *node) |
7938 |
+ static inline struct nfs4_ff_layout_mirror * |
7939 |
+ FF_LAYOUT_COMP(struct pnfs_layout_segment *lseg, u32 idx) |
7940 |
+ { |
7941 |
+- if (idx >= FF_LAYOUT_LSEG(lseg)->mirror_array_cnt) |
7942 |
+- return NULL; |
7943 |
+- return FF_LAYOUT_LSEG(lseg)->mirror_array[idx]; |
7944 |
++ struct nfs4_ff_layout_segment *fls = FF_LAYOUT_LSEG(lseg); |
7945 |
++ |
7946 |
++ if (idx < fls->mirror_array_cnt) |
7947 |
++ return fls->mirror_array[idx]; |
7948 |
++ return NULL; |
7949 |
++} |
7950 |
++ |
7951 |
++static inline struct nfs4_deviceid_node * |
7952 |
++FF_LAYOUT_DEVID_NODE(struct pnfs_layout_segment *lseg, u32 idx) |
7953 |
++{ |
7954 |
++ struct nfs4_ff_layout_mirror *mirror = FF_LAYOUT_COMP(lseg, idx); |
7955 |
++ |
7956 |
++ if (mirror != NULL) { |
7957 |
++ struct nfs4_ff_layout_ds *mirror_ds = mirror->mirror_ds; |
7958 |
++ |
7959 |
++ if (!IS_ERR_OR_NULL(mirror_ds)) |
7960 |
++ return &mirror_ds->id_node; |
7961 |
++ } |
7962 |
++ return NULL; |
7963 |
+ } |
7964 |
+ |
7965 |
+ static inline u32 |
7966 |
+diff --git a/fs/nfs/pnfs.c b/fs/nfs/pnfs.c |
7967 |
+index ec04cce31814..83abf3dd7351 100644 |
7968 |
+--- a/fs/nfs/pnfs.c |
7969 |
++++ b/fs/nfs/pnfs.c |
7970 |
+@@ -725,22 +725,35 @@ static int |
7971 |
+ pnfs_layout_bulk_destroy_byserver_locked(struct nfs_client *clp, |
7972 |
+ struct nfs_server *server, |
7973 |
+ struct list_head *layout_list) |
7974 |
++ __must_hold(&clp->cl_lock) |
7975 |
++ __must_hold(RCU) |
7976 |
+ { |
7977 |
+ struct pnfs_layout_hdr *lo, *next; |
7978 |
+ struct inode *inode; |
7979 |
+ |
7980 |
+ list_for_each_entry_safe(lo, next, &server->layouts, plh_layouts) { |
7981 |
+- if (test_bit(NFS_LAYOUT_INVALID_STID, &lo->plh_flags)) |
7982 |
++ if (test_bit(NFS_LAYOUT_INVALID_STID, &lo->plh_flags) || |
7983 |
++ test_bit(NFS_LAYOUT_INODE_FREEING, &lo->plh_flags) || |
7984 |
++ !list_empty(&lo->plh_bulk_destroy)) |
7985 |
+ continue; |
7986 |
++ /* If the sb is being destroyed, just bail */ |
7987 |
++ if (!nfs_sb_active(server->super)) |
7988 |
++ break; |
7989 |
+ inode = igrab(lo->plh_inode); |
7990 |
+- if (inode == NULL) |
7991 |
+- continue; |
7992 |
+- list_del_init(&lo->plh_layouts); |
7993 |
+- if (pnfs_layout_add_bulk_destroy_list(inode, layout_list)) |
7994 |
+- continue; |
7995 |
+- rcu_read_unlock(); |
7996 |
+- spin_unlock(&clp->cl_lock); |
7997 |
+- iput(inode); |
7998 |
++ if (inode != NULL) { |
7999 |
++ list_del_init(&lo->plh_layouts); |
8000 |
++ if (pnfs_layout_add_bulk_destroy_list(inode, |
8001 |
++ layout_list)) |
8002 |
++ continue; |
8003 |
++ rcu_read_unlock(); |
8004 |
++ spin_unlock(&clp->cl_lock); |
8005 |
++ iput(inode); |
8006 |
++ } else { |
8007 |
++ rcu_read_unlock(); |
8008 |
++ spin_unlock(&clp->cl_lock); |
8009 |
++ set_bit(NFS_LAYOUT_INODE_FREEING, &lo->plh_flags); |
8010 |
++ } |
8011 |
++ nfs_sb_deactive(server->super); |
8012 |
+ spin_lock(&clp->cl_lock); |
8013 |
+ rcu_read_lock(); |
8014 |
+ return -EAGAIN; |
8015 |
+@@ -778,7 +791,7 @@ pnfs_layout_free_bulk_destroy_list(struct list_head *layout_list, |
8016 |
+ /* Free all lsegs that are attached to commit buckets */ |
8017 |
+ nfs_commit_inode(inode, 0); |
8018 |
+ pnfs_put_layout_hdr(lo); |
8019 |
+- iput(inode); |
8020 |
++ nfs_iput_and_deactive(inode); |
8021 |
+ } |
8022 |
+ return ret; |
8023 |
+ } |
8024 |
+diff --git a/fs/nfs/pnfs.h b/fs/nfs/pnfs.h |
8025 |
+index 87f144f14d1e..965d657086c8 100644 |
8026 |
+--- a/fs/nfs/pnfs.h |
8027 |
++++ b/fs/nfs/pnfs.h |
8028 |
+@@ -99,6 +99,7 @@ enum { |
8029 |
+ NFS_LAYOUT_RETURN_REQUESTED, /* Return this layout ASAP */ |
8030 |
+ NFS_LAYOUT_INVALID_STID, /* layout stateid id is invalid */ |
8031 |
+ NFS_LAYOUT_FIRST_LAYOUTGET, /* Serialize first layoutget */ |
8032 |
++ NFS_LAYOUT_INODE_FREEING, /* The inode is being freed */ |
8033 |
+ }; |
8034 |
+ |
8035 |
+ enum layoutdriver_policy_flags { |
8036 |
+diff --git a/fs/nfs/super.c b/fs/nfs/super.c |
8037 |
+index f464f8d9060c..470b761839a5 100644 |
8038 |
+--- a/fs/nfs/super.c |
8039 |
++++ b/fs/nfs/super.c |
8040 |
+@@ -1925,7 +1925,7 @@ static int nfs_parse_devname(const char *dev_name, |
8041 |
+ /* kill possible hostname list: not supported */ |
8042 |
+ comma = strchr(dev_name, ','); |
8043 |
+ if (comma != NULL && comma < end) |
8044 |
+- *comma = 0; |
8045 |
++ len = comma - dev_name; |
8046 |
+ } |
8047 |
+ |
8048 |
+ if (len > maxnamlen) |
8049 |
+diff --git a/fs/nfs/write.c b/fs/nfs/write.c |
8050 |
+index 01b9d9341b54..ed3f5afc4ff7 100644 |
8051 |
+--- a/fs/nfs/write.c |
8052 |
++++ b/fs/nfs/write.c |
8053 |
+@@ -643,7 +643,7 @@ out: |
8054 |
+ return ret; |
8055 |
+ out_launder: |
8056 |
+ nfs_write_error_remove_page(req); |
8057 |
+- return ret; |
8058 |
++ return 0; |
8059 |
+ } |
8060 |
+ |
8061 |
+ static int nfs_do_writepage(struct page *page, struct writeback_control *wbc, |
8062 |
+diff --git a/fs/xfs/xfs_quotaops.c b/fs/xfs/xfs_quotaops.c |
8063 |
+index a65108594a07..21bc6d2d23ca 100644 |
8064 |
+--- a/fs/xfs/xfs_quotaops.c |
8065 |
++++ b/fs/xfs/xfs_quotaops.c |
8066 |
+@@ -214,6 +214,9 @@ xfs_fs_rm_xquota( |
8067 |
+ if (XFS_IS_QUOTA_ON(mp)) |
8068 |
+ return -EINVAL; |
8069 |
+ |
8070 |
++ if (uflags & ~(FS_USER_QUOTA | FS_GROUP_QUOTA | FS_PROJ_QUOTA)) |
8071 |
++ return -EINVAL; |
8072 |
++ |
8073 |
+ if (uflags & FS_USER_QUOTA) |
8074 |
+ flags |= XFS_DQ_USER; |
8075 |
+ if (uflags & FS_GROUP_QUOTA) |
8076 |
+diff --git a/include/linux/device.h b/include/linux/device.h |
8077 |
+index 66fe271c2544..0b2e67014a83 100644 |
8078 |
+--- a/include/linux/device.h |
8079 |
++++ b/include/linux/device.h |
8080 |
+@@ -682,7 +682,8 @@ extern unsigned long devm_get_free_pages(struct device *dev, |
8081 |
+ gfp_t gfp_mask, unsigned int order); |
8082 |
+ extern void devm_free_pages(struct device *dev, unsigned long addr); |
8083 |
+ |
8084 |
+-void __iomem *devm_ioremap_resource(struct device *dev, struct resource *res); |
8085 |
++void __iomem *devm_ioremap_resource(struct device *dev, |
8086 |
++ const struct resource *res); |
8087 |
+ |
8088 |
+ /* allows to add/remove a custom action to devres stack */ |
8089 |
+ int devm_add_action(struct device *dev, void (*action)(void *), void *data); |
8090 |
+diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h |
8091 |
+index 845ff8c51564..0fe1fdedb8a1 100644 |
8092 |
+--- a/include/linux/irqchip/arm-gic-v3.h |
8093 |
++++ b/include/linux/irqchip/arm-gic-v3.h |
8094 |
+@@ -152,7 +152,7 @@ |
8095 |
+ #define GICR_PROPBASER_nCnB GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, nCnB) |
8096 |
+ #define GICR_PROPBASER_nC GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, nC) |
8097 |
+ #define GICR_PROPBASER_RaWt GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RaWt) |
8098 |
+-#define GICR_PROPBASER_RaWb GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RaWt) |
8099 |
++#define GICR_PROPBASER_RaWb GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RaWb) |
8100 |
+ #define GICR_PROPBASER_WaWt GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, WaWt) |
8101 |
+ #define GICR_PROPBASER_WaWb GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, WaWb) |
8102 |
+ #define GICR_PROPBASER_RaWaWt GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RaWaWt) |
8103 |
+@@ -179,7 +179,7 @@ |
8104 |
+ #define GICR_PENDBASER_nCnB GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, nCnB) |
8105 |
+ #define GICR_PENDBASER_nC GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, nC) |
8106 |
+ #define GICR_PENDBASER_RaWt GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, RaWt) |
8107 |
+-#define GICR_PENDBASER_RaWb GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, RaWt) |
8108 |
++#define GICR_PENDBASER_RaWb GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, RaWb) |
8109 |
+ #define GICR_PENDBASER_WaWt GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, WaWt) |
8110 |
+ #define GICR_PENDBASER_WaWb GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, WaWb) |
8111 |
+ #define GICR_PENDBASER_RaWaWt GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, RaWaWt) |
8112 |
+@@ -238,7 +238,7 @@ |
8113 |
+ #define GICR_VPROPBASER_nCnB GIC_BASER_CACHEABILITY(GICR_VPROPBASER, INNER, nCnB) |
8114 |
+ #define GICR_VPROPBASER_nC GIC_BASER_CACHEABILITY(GICR_VPROPBASER, INNER, nC) |
8115 |
+ #define GICR_VPROPBASER_RaWt GIC_BASER_CACHEABILITY(GICR_VPROPBASER, INNER, RaWt) |
8116 |
+-#define GICR_VPROPBASER_RaWb GIC_BASER_CACHEABILITY(GICR_VPROPBASER, INNER, RaWt) |
8117 |
++#define GICR_VPROPBASER_RaWb GIC_BASER_CACHEABILITY(GICR_VPROPBASER, INNER, RaWb) |
8118 |
+ #define GICR_VPROPBASER_WaWt GIC_BASER_CACHEABILITY(GICR_VPROPBASER, INNER, WaWt) |
8119 |
+ #define GICR_VPROPBASER_WaWb GIC_BASER_CACHEABILITY(GICR_VPROPBASER, INNER, WaWb) |
8120 |
+ #define GICR_VPROPBASER_RaWaWt GIC_BASER_CACHEABILITY(GICR_VPROPBASER, INNER, RaWaWt) |
8121 |
+@@ -264,7 +264,7 @@ |
8122 |
+ #define GICR_VPENDBASER_nCnB GIC_BASER_CACHEABILITY(GICR_VPENDBASER, INNER, nCnB) |
8123 |
+ #define GICR_VPENDBASER_nC GIC_BASER_CACHEABILITY(GICR_VPENDBASER, INNER, nC) |
8124 |
+ #define GICR_VPENDBASER_RaWt GIC_BASER_CACHEABILITY(GICR_VPENDBASER, INNER, RaWt) |
8125 |
+-#define GICR_VPENDBASER_RaWb GIC_BASER_CACHEABILITY(GICR_VPENDBASER, INNER, RaWt) |
8126 |
++#define GICR_VPENDBASER_RaWb GIC_BASER_CACHEABILITY(GICR_VPENDBASER, INNER, RaWb) |
8127 |
+ #define GICR_VPENDBASER_WaWt GIC_BASER_CACHEABILITY(GICR_VPENDBASER, INNER, WaWt) |
8128 |
+ #define GICR_VPENDBASER_WaWb GIC_BASER_CACHEABILITY(GICR_VPENDBASER, INNER, WaWb) |
8129 |
+ #define GICR_VPENDBASER_RaWaWt GIC_BASER_CACHEABILITY(GICR_VPENDBASER, INNER, RaWaWt) |
8130 |
+@@ -337,7 +337,7 @@ |
8131 |
+ #define GITS_CBASER_nCnB GIC_BASER_CACHEABILITY(GITS_CBASER, INNER, nCnB) |
8132 |
+ #define GITS_CBASER_nC GIC_BASER_CACHEABILITY(GITS_CBASER, INNER, nC) |
8133 |
+ #define GITS_CBASER_RaWt GIC_BASER_CACHEABILITY(GITS_CBASER, INNER, RaWt) |
8134 |
+-#define GITS_CBASER_RaWb GIC_BASER_CACHEABILITY(GITS_CBASER, INNER, RaWt) |
8135 |
++#define GITS_CBASER_RaWb GIC_BASER_CACHEABILITY(GITS_CBASER, INNER, RaWb) |
8136 |
+ #define GITS_CBASER_WaWt GIC_BASER_CACHEABILITY(GITS_CBASER, INNER, WaWt) |
8137 |
+ #define GITS_CBASER_WaWb GIC_BASER_CACHEABILITY(GITS_CBASER, INNER, WaWb) |
8138 |
+ #define GITS_CBASER_RaWaWt GIC_BASER_CACHEABILITY(GITS_CBASER, INNER, RaWaWt) |
8139 |
+@@ -361,7 +361,7 @@ |
8140 |
+ #define GITS_BASER_nCnB GIC_BASER_CACHEABILITY(GITS_BASER, INNER, nCnB) |
8141 |
+ #define GITS_BASER_nC GIC_BASER_CACHEABILITY(GITS_BASER, INNER, nC) |
8142 |
+ #define GITS_BASER_RaWt GIC_BASER_CACHEABILITY(GITS_BASER, INNER, RaWt) |
8143 |
+-#define GITS_BASER_RaWb GIC_BASER_CACHEABILITY(GITS_BASER, INNER, RaWt) |
8144 |
++#define GITS_BASER_RaWb GIC_BASER_CACHEABILITY(GITS_BASER, INNER, RaWb) |
8145 |
+ #define GITS_BASER_WaWt GIC_BASER_CACHEABILITY(GITS_BASER, INNER, WaWt) |
8146 |
+ #define GITS_BASER_WaWb GIC_BASER_CACHEABILITY(GITS_BASER, INNER, WaWb) |
8147 |
+ #define GITS_BASER_RaWaWt GIC_BASER_CACHEABILITY(GITS_BASER, INNER, RaWaWt) |
8148 |
+diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h |
8149 |
+index 1d793d86d55f..6ffa181598e6 100644 |
8150 |
+--- a/include/linux/mlx5/mlx5_ifc.h |
8151 |
++++ b/include/linux/mlx5/mlx5_ifc.h |
8152 |
+@@ -8671,8 +8671,6 @@ struct mlx5_ifc_query_lag_out_bits { |
8153 |
+ |
8154 |
+ u8 syndrome[0x20]; |
8155 |
+ |
8156 |
+- u8 reserved_at_40[0x40]; |
8157 |
+- |
8158 |
+ struct mlx5_ifc_lagc_bits ctx; |
8159 |
+ }; |
8160 |
+ |
8161 |
+diff --git a/include/linux/mmc/sdio_ids.h b/include/linux/mmc/sdio_ids.h |
8162 |
+index 0a7abe8a407f..68bbbd9edc08 100644 |
8163 |
+--- a/include/linux/mmc/sdio_ids.h |
8164 |
++++ b/include/linux/mmc/sdio_ids.h |
8165 |
+@@ -67,6 +67,8 @@ |
8166 |
+ |
8167 |
+ #define SDIO_VENDOR_ID_TI 0x0097 |
8168 |
+ #define SDIO_DEVICE_ID_TI_WL1271 0x4076 |
8169 |
++#define SDIO_VENDOR_ID_TI_WL1251 0x104c |
8170 |
++#define SDIO_DEVICE_ID_TI_WL1251 0x9066 |
8171 |
+ |
8172 |
+ #define SDIO_VENDOR_ID_STE 0x0020 |
8173 |
+ #define SDIO_DEVICE_ID_STE_CW1200 0x2280 |
8174 |
+diff --git a/include/linux/platform_data/dma-imx-sdma.h b/include/linux/platform_data/dma-imx-sdma.h |
8175 |
+index 6eaa53cef0bd..30e676b36b24 100644 |
8176 |
+--- a/include/linux/platform_data/dma-imx-sdma.h |
8177 |
++++ b/include/linux/platform_data/dma-imx-sdma.h |
8178 |
+@@ -51,7 +51,10 @@ struct sdma_script_start_addrs { |
8179 |
+ /* End of v2 array */ |
8180 |
+ s32 zcanfd_2_mcu_addr; |
8181 |
+ s32 zqspi_2_mcu_addr; |
8182 |
++ s32 mcu_2_ecspi_addr; |
8183 |
+ /* End of v3 array */ |
8184 |
++ s32 mcu_2_zqspi_addr; |
8185 |
++ /* End of v4 array */ |
8186 |
+ }; |
8187 |
+ |
8188 |
+ /** |
8189 |
+diff --git a/include/linux/signal.h b/include/linux/signal.h |
8190 |
+index 843bd62b1ead..c4e3eb89a622 100644 |
8191 |
+--- a/include/linux/signal.h |
8192 |
++++ b/include/linux/signal.h |
8193 |
+@@ -268,6 +268,9 @@ extern void signal_setup_done(int failed, struct ksignal *ksig, int stepping); |
8194 |
+ extern void exit_signals(struct task_struct *tsk); |
8195 |
+ extern void kernel_sigaction(int, __sighandler_t); |
8196 |
+ |
8197 |
++#define SIG_KTHREAD ((__force __sighandler_t)2) |
8198 |
++#define SIG_KTHREAD_KERNEL ((__force __sighandler_t)3) |
8199 |
++ |
8200 |
+ static inline void allow_signal(int sig) |
8201 |
+ { |
8202 |
+ /* |
8203 |
+@@ -275,7 +278,17 @@ static inline void allow_signal(int sig) |
8204 |
+ * know it'll be handled, so that they don't get converted to |
8205 |
+ * SIGKILL or just silently dropped. |
8206 |
+ */ |
8207 |
+- kernel_sigaction(sig, (__force __sighandler_t)2); |
8208 |
++ kernel_sigaction(sig, SIG_KTHREAD); |
8209 |
++} |
8210 |
++ |
8211 |
++static inline void allow_kernel_signal(int sig) |
8212 |
++{ |
8213 |
++ /* |
8214 |
++ * Kernel threads handle their own signals. Let the signal code |
8215 |
++ * know signals sent by the kernel will be handled, so that they |
8216 |
++ * don't get silently dropped. |
8217 |
++ */ |
8218 |
++ kernel_sigaction(sig, SIG_KTHREAD_KERNEL); |
8219 |
+ } |
8220 |
+ |
8221 |
+ static inline void disallow_signal(int sig) |
8222 |
+diff --git a/include/media/davinci/vpbe.h b/include/media/davinci/vpbe.h |
8223 |
+index 79a566d7defd..180a05e91497 100644 |
8224 |
+--- a/include/media/davinci/vpbe.h |
8225 |
++++ b/include/media/davinci/vpbe.h |
8226 |
+@@ -92,7 +92,7 @@ struct vpbe_config { |
8227 |
+ struct encoder_config_info *ext_encoders; |
8228 |
+ /* amplifier information goes here */ |
8229 |
+ struct amp_config_info *amp; |
8230 |
+- int num_outputs; |
8231 |
++ unsigned int num_outputs; |
8232 |
+ /* Order is venc outputs followed by LCD and then external encoders */ |
8233 |
+ struct vpbe_output *outputs; |
8234 |
+ }; |
8235 |
+diff --git a/include/net/request_sock.h b/include/net/request_sock.h |
8236 |
+index 23e22054aa60..04aa2c7d35c4 100644 |
8237 |
+--- a/include/net/request_sock.h |
8238 |
++++ b/include/net/request_sock.h |
8239 |
+@@ -181,7 +181,7 @@ void reqsk_fastopen_remove(struct sock *sk, struct request_sock *req, |
8240 |
+ |
8241 |
+ static inline bool reqsk_queue_empty(const struct request_sock_queue *queue) |
8242 |
+ { |
8243 |
+- return queue->rskq_accept_head == NULL; |
8244 |
++ return READ_ONCE(queue->rskq_accept_head) == NULL; |
8245 |
+ } |
8246 |
+ |
8247 |
+ static inline struct request_sock *reqsk_queue_remove(struct request_sock_queue *queue, |
8248 |
+@@ -193,7 +193,7 @@ static inline struct request_sock *reqsk_queue_remove(struct request_sock_queue |
8249 |
+ req = queue->rskq_accept_head; |
8250 |
+ if (req) { |
8251 |
+ sk_acceptq_removed(parent); |
8252 |
+- queue->rskq_accept_head = req->dl_next; |
8253 |
++ WRITE_ONCE(queue->rskq_accept_head, req->dl_next); |
8254 |
+ if (queue->rskq_accept_head == NULL) |
8255 |
+ queue->rskq_accept_tail = NULL; |
8256 |
+ } |
8257 |
+diff --git a/include/net/tcp.h b/include/net/tcp.h |
8258 |
+index 00d10f0e1194..c96302310314 100644 |
8259 |
+--- a/include/net/tcp.h |
8260 |
++++ b/include/net/tcp.h |
8261 |
+@@ -289,7 +289,7 @@ static inline bool tcp_under_memory_pressure(const struct sock *sk) |
8262 |
+ mem_cgroup_under_socket_pressure(sk->sk_memcg)) |
8263 |
+ return true; |
8264 |
+ |
8265 |
+- return tcp_memory_pressure; |
8266 |
++ return READ_ONCE(tcp_memory_pressure); |
8267 |
+ } |
8268 |
+ /* |
8269 |
+ * The next routines deal with comparing 32 bit unsigned ints |
8270 |
+diff --git a/kernel/debug/kdb/kdb_main.c b/kernel/debug/kdb/kdb_main.c |
8271 |
+index 993db6b2348e..15d902daeef6 100644 |
8272 |
+--- a/kernel/debug/kdb/kdb_main.c |
8273 |
++++ b/kernel/debug/kdb/kdb_main.c |
8274 |
+@@ -2634,7 +2634,7 @@ static int kdb_per_cpu(int argc, const char **argv) |
8275 |
+ diag = kdbgetularg(argv[3], &whichcpu); |
8276 |
+ if (diag) |
8277 |
+ return diag; |
8278 |
+- if (!cpu_online(whichcpu)) { |
8279 |
++ if (whichcpu >= nr_cpu_ids || !cpu_online(whichcpu)) { |
8280 |
+ kdb_printf("cpu %ld is not online\n", whichcpu); |
8281 |
+ return KDB_BADCPUNUM; |
8282 |
+ } |
8283 |
+diff --git a/kernel/events/core.c b/kernel/events/core.c |
8284 |
+index ea4f3f7a0c6f..2ac73b4cb8a9 100644 |
8285 |
+--- a/kernel/events/core.c |
8286 |
++++ b/kernel/events/core.c |
8287 |
+@@ -4762,6 +4762,9 @@ static int perf_event_period(struct perf_event *event, u64 __user *arg) |
8288 |
+ if (perf_event_check_period(event, value)) |
8289 |
+ return -EINVAL; |
8290 |
+ |
8291 |
++ if (!event->attr.freq && (value & (1ULL << 63))) |
8292 |
++ return -EINVAL; |
8293 |
++ |
8294 |
+ event_function_call(event, __perf_event_period, &value); |
8295 |
+ |
8296 |
+ return 0; |
8297 |
+diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c |
8298 |
+index ac4644e92b49..0f0e7975a309 100644 |
8299 |
+--- a/kernel/irq/irqdomain.c |
8300 |
++++ b/kernel/irq/irqdomain.c |
8301 |
+@@ -147,6 +147,7 @@ struct irq_domain *__irq_domain_add(struct fwnode_handle *fwnode, int size, |
8302 |
+ switch (fwid->type) { |
8303 |
+ case IRQCHIP_FWNODE_NAMED: |
8304 |
+ case IRQCHIP_FWNODE_NAMED_ID: |
8305 |
++ domain->fwnode = fwnode; |
8306 |
+ domain->name = kstrdup(fwid->name, GFP_KERNEL); |
8307 |
+ if (!domain->name) { |
8308 |
+ kfree(domain); |
8309 |
+diff --git a/kernel/signal.c b/kernel/signal.c |
8310 |
+index c9b203875001..8fee1f2eba2f 100644 |
8311 |
+--- a/kernel/signal.c |
8312 |
++++ b/kernel/signal.c |
8313 |
+@@ -85,6 +85,11 @@ static int sig_task_ignored(struct task_struct *t, int sig, bool force) |
8314 |
+ handler == SIG_DFL && !(force && sig_kernel_only(sig))) |
8315 |
+ return 1; |
8316 |
+ |
8317 |
++ /* Only allow kernel generated signals to this kthread */ |
8318 |
++ if (unlikely((t->flags & PF_KTHREAD) && |
8319 |
++ (handler == SIG_KTHREAD_KERNEL) && !force)) |
8320 |
++ return true; |
8321 |
++ |
8322 |
+ return sig_handler_ignored(handler, sig); |
8323 |
+ } |
8324 |
+ |
8325 |
+diff --git a/lib/devres.c b/lib/devres.c |
8326 |
+index 5f2aedd58bc5..40a8b12a8b6b 100644 |
8327 |
+--- a/lib/devres.c |
8328 |
++++ b/lib/devres.c |
8329 |
+@@ -132,7 +132,8 @@ EXPORT_SYMBOL(devm_iounmap); |
8330 |
+ * if (IS_ERR(base)) |
8331 |
+ * return PTR_ERR(base); |
8332 |
+ */ |
8333 |
+-void __iomem *devm_ioremap_resource(struct device *dev, struct resource *res) |
8334 |
++void __iomem *devm_ioremap_resource(struct device *dev, |
8335 |
++ const struct resource *res) |
8336 |
+ { |
8337 |
+ resource_size_t size; |
8338 |
+ const char *name; |
8339 |
+diff --git a/lib/kfifo.c b/lib/kfifo.c |
8340 |
+index 90ba1eb1df06..a94227c55551 100644 |
8341 |
+--- a/lib/kfifo.c |
8342 |
++++ b/lib/kfifo.c |
8343 |
+@@ -82,7 +82,8 @@ int __kfifo_init(struct __kfifo *fifo, void *buffer, |
8344 |
+ { |
8345 |
+ size /= esize; |
8346 |
+ |
8347 |
+- size = roundup_pow_of_two(size); |
8348 |
++ if (!is_power_of_2(size)) |
8349 |
++ size = rounddown_pow_of_two(size); |
8350 |
+ |
8351 |
+ fifo->in = 0; |
8352 |
+ fifo->out = 0; |
8353 |
+diff --git a/net/6lowpan/nhc.c b/net/6lowpan/nhc.c |
8354 |
+index 4fa2fdda174d..9e56fb98f33c 100644 |
8355 |
+--- a/net/6lowpan/nhc.c |
8356 |
++++ b/net/6lowpan/nhc.c |
8357 |
+@@ -18,7 +18,7 @@ |
8358 |
+ #include "nhc.h" |
8359 |
+ |
8360 |
+ static struct rb_root rb_root = RB_ROOT; |
8361 |
+-static struct lowpan_nhc *lowpan_nexthdr_nhcs[NEXTHDR_MAX]; |
8362 |
++static struct lowpan_nhc *lowpan_nexthdr_nhcs[NEXTHDR_MAX + 1]; |
8363 |
+ static DEFINE_SPINLOCK(lowpan_nhc_lock); |
8364 |
+ |
8365 |
+ static int lowpan_nhc_insert(struct lowpan_nhc *nhc) |
8366 |
+diff --git a/net/bridge/netfilter/ebtables.c b/net/bridge/netfilter/ebtables.c |
8367 |
+index 35a670ec9077..a1834ad7422c 100644 |
8368 |
+--- a/net/bridge/netfilter/ebtables.c |
8369 |
++++ b/net/bridge/netfilter/ebtables.c |
8370 |
+@@ -2164,7 +2164,9 @@ static int compat_copy_entries(unsigned char *data, unsigned int size_user, |
8371 |
+ if (ret < 0) |
8372 |
+ return ret; |
8373 |
+ |
8374 |
+- WARN_ON(size_remaining); |
8375 |
++ if (size_remaining) |
8376 |
++ return -EINVAL; |
8377 |
++ |
8378 |
+ return state->buf_kern_offset; |
8379 |
+ } |
8380 |
+ |
8381 |
+diff --git a/net/core/neighbour.c b/net/core/neighbour.c |
8382 |
+index 16ac50b1b9a7..567e431813e5 100644 |
8383 |
+--- a/net/core/neighbour.c |
8384 |
++++ b/net/core/neighbour.c |
8385 |
+@@ -1877,8 +1877,8 @@ static int neightbl_fill_info(struct sk_buff *skb, struct neigh_table *tbl, |
8386 |
+ goto nla_put_failure; |
8387 |
+ { |
8388 |
+ unsigned long now = jiffies; |
8389 |
+- unsigned int flush_delta = now - tbl->last_flush; |
8390 |
+- unsigned int rand_delta = now - tbl->last_rand; |
8391 |
++ long flush_delta = now - tbl->last_flush; |
8392 |
++ long rand_delta = now - tbl->last_rand; |
8393 |
+ struct neigh_hash_table *nht; |
8394 |
+ struct ndt_config ndc = { |
8395 |
+ .ndtc_key_len = tbl->key_len, |
8396 |
+diff --git a/net/core/sock.c b/net/core/sock.c |
8397 |
+index 90ccbbf9e6b0..03ca2f638eb4 100644 |
8398 |
+--- a/net/core/sock.c |
8399 |
++++ b/net/core/sock.c |
8400 |
+@@ -2165,8 +2165,8 @@ static void sk_leave_memory_pressure(struct sock *sk) |
8401 |
+ } else { |
8402 |
+ unsigned long *memory_pressure = sk->sk_prot->memory_pressure; |
8403 |
+ |
8404 |
+- if (memory_pressure && *memory_pressure) |
8405 |
+- *memory_pressure = 0; |
8406 |
++ if (memory_pressure && READ_ONCE(*memory_pressure)) |
8407 |
++ WRITE_ONCE(*memory_pressure, 0); |
8408 |
+ } |
8409 |
+ } |
8410 |
+ |
8411 |
+diff --git a/net/ieee802154/6lowpan/reassembly.c b/net/ieee802154/6lowpan/reassembly.c |
8412 |
+index ec7a5da56129..e873a6a007f2 100644 |
8413 |
+--- a/net/ieee802154/6lowpan/reassembly.c |
8414 |
++++ b/net/ieee802154/6lowpan/reassembly.c |
8415 |
+@@ -634,7 +634,7 @@ err_sysctl: |
8416 |
+ |
8417 |
+ void lowpan_net_frag_exit(void) |
8418 |
+ { |
8419 |
+- inet_frags_fini(&lowpan_frags); |
8420 |
+ lowpan_frags_sysctl_unregister(); |
8421 |
+ unregister_pernet_subsys(&lowpan_frags_ops); |
8422 |
++ inet_frags_fini(&lowpan_frags); |
8423 |
+ } |
8424 |
+diff --git a/net/ipv4/inet_connection_sock.c b/net/ipv4/inet_connection_sock.c |
8425 |
+index f7224c4fc30f..da55ce62fe50 100644 |
8426 |
+--- a/net/ipv4/inet_connection_sock.c |
8427 |
++++ b/net/ipv4/inet_connection_sock.c |
8428 |
+@@ -936,7 +936,7 @@ struct sock *inet_csk_reqsk_queue_add(struct sock *sk, |
8429 |
+ req->sk = child; |
8430 |
+ req->dl_next = NULL; |
8431 |
+ if (queue->rskq_accept_head == NULL) |
8432 |
+- queue->rskq_accept_head = req; |
8433 |
++ WRITE_ONCE(queue->rskq_accept_head, req); |
8434 |
+ else |
8435 |
+ queue->rskq_accept_tail->dl_next = req; |
8436 |
+ queue->rskq_accept_tail = req; |
8437 |
+diff --git a/net/ipv4/tcp.c b/net/ipv4/tcp.c |
8438 |
+index 8f07655718f3..db1eceda2359 100644 |
8439 |
+--- a/net/ipv4/tcp.c |
8440 |
++++ b/net/ipv4/tcp.c |
8441 |
+@@ -328,7 +328,7 @@ void tcp_enter_memory_pressure(struct sock *sk) |
8442 |
+ { |
8443 |
+ unsigned long val; |
8444 |
+ |
8445 |
+- if (tcp_memory_pressure) |
8446 |
++ if (READ_ONCE(tcp_memory_pressure)) |
8447 |
+ return; |
8448 |
+ val = jiffies; |
8449 |
+ |
8450 |
+@@ -343,7 +343,7 @@ void tcp_leave_memory_pressure(struct sock *sk) |
8451 |
+ { |
8452 |
+ unsigned long val; |
8453 |
+ |
8454 |
+- if (!tcp_memory_pressure) |
8455 |
++ if (!READ_ONCE(tcp_memory_pressure)) |
8456 |
+ return; |
8457 |
+ val = xchg(&tcp_memory_pressure, 0); |
8458 |
+ if (val) |
8459 |
+diff --git a/net/ipv6/reassembly.c b/net/ipv6/reassembly.c |
8460 |
+index fe797b29ca89..6dea6e92e686 100644 |
8461 |
+--- a/net/ipv6/reassembly.c |
8462 |
++++ b/net/ipv6/reassembly.c |
8463 |
+@@ -593,8 +593,8 @@ err_protocol: |
8464 |
+ |
8465 |
+ void ipv6_frag_exit(void) |
8466 |
+ { |
8467 |
+- inet_frags_fini(&ip6_frags); |
8468 |
+ ip6_frags_sysctl_unregister(); |
8469 |
+ unregister_pernet_subsys(&ip6_frags_ops); |
8470 |
+ inet6_del_protocol(&frag_protocol, IPPROTO_FRAGMENT); |
8471 |
++ inet_frags_fini(&ip6_frags); |
8472 |
+ } |
8473 |
+diff --git a/net/iucv/af_iucv.c b/net/iucv/af_iucv.c |
8474 |
+index ca98276c2709..7a9cbc9502d9 100644 |
8475 |
+--- a/net/iucv/af_iucv.c |
8476 |
++++ b/net/iucv/af_iucv.c |
8477 |
+@@ -2446,6 +2446,13 @@ out: |
8478 |
+ return err; |
8479 |
+ } |
8480 |
+ |
8481 |
++static void afiucv_iucv_exit(void) |
8482 |
++{ |
8483 |
++ device_unregister(af_iucv_dev); |
8484 |
++ driver_unregister(&af_iucv_driver); |
8485 |
++ pr_iucv->iucv_unregister(&af_iucv_handler, 0); |
8486 |
++} |
8487 |
++ |
8488 |
+ static int __init afiucv_init(void) |
8489 |
+ { |
8490 |
+ int err; |
8491 |
+@@ -2479,11 +2486,18 @@ static int __init afiucv_init(void) |
8492 |
+ err = afiucv_iucv_init(); |
8493 |
+ if (err) |
8494 |
+ goto out_sock; |
8495 |
+- } else |
8496 |
+- register_netdevice_notifier(&afiucv_netdev_notifier); |
8497 |
++ } |
8498 |
++ |
8499 |
++ err = register_netdevice_notifier(&afiucv_netdev_notifier); |
8500 |
++ if (err) |
8501 |
++ goto out_notifier; |
8502 |
++ |
8503 |
+ dev_add_pack(&iucv_packet_type); |
8504 |
+ return 0; |
8505 |
+ |
8506 |
++out_notifier: |
8507 |
++ if (pr_iucv) |
8508 |
++ afiucv_iucv_exit(); |
8509 |
+ out_sock: |
8510 |
+ sock_unregister(PF_IUCV); |
8511 |
+ out_proto: |
8512 |
+@@ -2497,12 +2511,11 @@ out: |
8513 |
+ static void __exit afiucv_exit(void) |
8514 |
+ { |
8515 |
+ if (pr_iucv) { |
8516 |
+- device_unregister(af_iucv_dev); |
8517 |
+- driver_unregister(&af_iucv_driver); |
8518 |
+- pr_iucv->iucv_unregister(&af_iucv_handler, 0); |
8519 |
++ afiucv_iucv_exit(); |
8520 |
+ symbol_put(iucv_if); |
8521 |
+- } else |
8522 |
+- unregister_netdevice_notifier(&afiucv_netdev_notifier); |
8523 |
++ } |
8524 |
++ |
8525 |
++ unregister_netdevice_notifier(&afiucv_netdev_notifier); |
8526 |
+ dev_remove_pack(&iucv_packet_type); |
8527 |
+ sock_unregister(PF_IUCV); |
8528 |
+ proto_unregister(&iucv_proto); |
8529 |
+diff --git a/net/l2tp/l2tp_core.c b/net/l2tp/l2tp_core.c |
8530 |
+index e494f04819e9..b9be0360ab94 100644 |
8531 |
+--- a/net/l2tp/l2tp_core.c |
8532 |
++++ b/net/l2tp/l2tp_core.c |
8533 |
+@@ -1892,7 +1892,8 @@ static __net_exit void l2tp_exit_net(struct net *net) |
8534 |
+ } |
8535 |
+ rcu_read_unlock_bh(); |
8536 |
+ |
8537 |
+- flush_workqueue(l2tp_wq); |
8538 |
++ if (l2tp_wq) |
8539 |
++ flush_workqueue(l2tp_wq); |
8540 |
+ rcu_barrier(); |
8541 |
+ } |
8542 |
+ |
8543 |
+diff --git a/net/llc/af_llc.c b/net/llc/af_llc.c |
8544 |
+index 2e472d5c3ea4..d552e8819713 100644 |
8545 |
+--- a/net/llc/af_llc.c |
8546 |
++++ b/net/llc/af_llc.c |
8547 |
+@@ -113,22 +113,26 @@ static inline u8 llc_ui_header_len(struct sock *sk, struct sockaddr_llc *addr) |
8548 |
+ * |
8549 |
+ * Send data via reliable llc2 connection. |
8550 |
+ * Returns 0 upon success, non-zero if action did not succeed. |
8551 |
++ * |
8552 |
++ * This function always consumes a reference to the skb. |
8553 |
+ */ |
8554 |
+ static int llc_ui_send_data(struct sock* sk, struct sk_buff *skb, int noblock) |
8555 |
+ { |
8556 |
+ struct llc_sock* llc = llc_sk(sk); |
8557 |
+- int rc = 0; |
8558 |
+ |
8559 |
+ if (unlikely(llc_data_accept_state(llc->state) || |
8560 |
+ llc->remote_busy_flag || |
8561 |
+ llc->p_flag)) { |
8562 |
+ long timeout = sock_sndtimeo(sk, noblock); |
8563 |
++ int rc; |
8564 |
+ |
8565 |
+ rc = llc_ui_wait_for_busy_core(sk, timeout); |
8566 |
++ if (rc) { |
8567 |
++ kfree_skb(skb); |
8568 |
++ return rc; |
8569 |
++ } |
8570 |
+ } |
8571 |
+- if (unlikely(!rc)) |
8572 |
+- rc = llc_build_and_send_pkt(sk, skb); |
8573 |
+- return rc; |
8574 |
++ return llc_build_and_send_pkt(sk, skb); |
8575 |
+ } |
8576 |
+ |
8577 |
+ static void llc_ui_sk_init(struct socket *sock, struct sock *sk) |
8578 |
+@@ -900,7 +904,7 @@ static int llc_ui_sendmsg(struct socket *sock, struct msghdr *msg, size_t len) |
8579 |
+ DECLARE_SOCKADDR(struct sockaddr_llc *, addr, msg->msg_name); |
8580 |
+ int flags = msg->msg_flags; |
8581 |
+ int noblock = flags & MSG_DONTWAIT; |
8582 |
+- struct sk_buff *skb; |
8583 |
++ struct sk_buff *skb = NULL; |
8584 |
+ size_t size = 0; |
8585 |
+ int rc = -EINVAL, copied = 0, hdrlen; |
8586 |
+ |
8587 |
+@@ -909,10 +913,10 @@ static int llc_ui_sendmsg(struct socket *sock, struct msghdr *msg, size_t len) |
8588 |
+ lock_sock(sk); |
8589 |
+ if (addr) { |
8590 |
+ if (msg->msg_namelen < sizeof(*addr)) |
8591 |
+- goto release; |
8592 |
++ goto out; |
8593 |
+ } else { |
8594 |
+ if (llc_ui_addr_null(&llc->addr)) |
8595 |
+- goto release; |
8596 |
++ goto out; |
8597 |
+ addr = &llc->addr; |
8598 |
+ } |
8599 |
+ /* must bind connection to sap if user hasn't done it. */ |
8600 |
+@@ -920,7 +924,7 @@ static int llc_ui_sendmsg(struct socket *sock, struct msghdr *msg, size_t len) |
8601 |
+ /* bind to sap with null dev, exclusive. */ |
8602 |
+ rc = llc_ui_autobind(sock, addr); |
8603 |
+ if (rc) |
8604 |
+- goto release; |
8605 |
++ goto out; |
8606 |
+ } |
8607 |
+ hdrlen = llc->dev->hard_header_len + llc_ui_header_len(sk, addr); |
8608 |
+ size = hdrlen + len; |
8609 |
+@@ -929,12 +933,12 @@ static int llc_ui_sendmsg(struct socket *sock, struct msghdr *msg, size_t len) |
8610 |
+ copied = size - hdrlen; |
8611 |
+ rc = -EINVAL; |
8612 |
+ if (copied < 0) |
8613 |
+- goto release; |
8614 |
++ goto out; |
8615 |
+ release_sock(sk); |
8616 |
+ skb = sock_alloc_send_skb(sk, size, noblock, &rc); |
8617 |
+ lock_sock(sk); |
8618 |
+ if (!skb) |
8619 |
+- goto release; |
8620 |
++ goto out; |
8621 |
+ skb->dev = llc->dev; |
8622 |
+ skb->protocol = llc_proto_type(addr->sllc_arphrd); |
8623 |
+ skb_reserve(skb, hdrlen); |
8624 |
+@@ -944,29 +948,31 @@ static int llc_ui_sendmsg(struct socket *sock, struct msghdr *msg, size_t len) |
8625 |
+ if (sk->sk_type == SOCK_DGRAM || addr->sllc_ua) { |
8626 |
+ llc_build_and_send_ui_pkt(llc->sap, skb, addr->sllc_mac, |
8627 |
+ addr->sllc_sap); |
8628 |
++ skb = NULL; |
8629 |
+ goto out; |
8630 |
+ } |
8631 |
+ if (addr->sllc_test) { |
8632 |
+ llc_build_and_send_test_pkt(llc->sap, skb, addr->sllc_mac, |
8633 |
+ addr->sllc_sap); |
8634 |
++ skb = NULL; |
8635 |
+ goto out; |
8636 |
+ } |
8637 |
+ if (addr->sllc_xid) { |
8638 |
+ llc_build_and_send_xid_pkt(llc->sap, skb, addr->sllc_mac, |
8639 |
+ addr->sllc_sap); |
8640 |
++ skb = NULL; |
8641 |
+ goto out; |
8642 |
+ } |
8643 |
+ rc = -ENOPROTOOPT; |
8644 |
+ if (!(sk->sk_type == SOCK_STREAM && !addr->sllc_ua)) |
8645 |
+ goto out; |
8646 |
+ rc = llc_ui_send_data(sk, skb, noblock); |
8647 |
++ skb = NULL; |
8648 |
+ out: |
8649 |
+- if (rc) { |
8650 |
+- kfree_skb(skb); |
8651 |
+-release: |
8652 |
++ kfree_skb(skb); |
8653 |
++ if (rc) |
8654 |
+ dprintk("%s: failed sending from %02X to %02X: %d\n", |
8655 |
+ __func__, llc->laddr.lsap, llc->daddr.lsap, rc); |
8656 |
+- } |
8657 |
+ release_sock(sk); |
8658 |
+ return rc ? : copied; |
8659 |
+ } |
8660 |
+diff --git a/net/llc/llc_conn.c b/net/llc/llc_conn.c |
8661 |
+index 444c13e752a0..7fbc682aff04 100644 |
8662 |
+--- a/net/llc/llc_conn.c |
8663 |
++++ b/net/llc/llc_conn.c |
8664 |
+@@ -55,6 +55,8 @@ int sysctl_llc2_busy_timeout = LLC2_BUSY_TIME * HZ; |
8665 |
+ * (executing it's actions and changing state), upper layer will be |
8666 |
+ * indicated or confirmed, if needed. Returns 0 for success, 1 for |
8667 |
+ * failure. The socket lock has to be held before calling this function. |
8668 |
++ * |
8669 |
++ * This function always consumes a reference to the skb. |
8670 |
+ */ |
8671 |
+ int llc_conn_state_process(struct sock *sk, struct sk_buff *skb) |
8672 |
+ { |
8673 |
+@@ -62,12 +64,6 @@ int llc_conn_state_process(struct sock *sk, struct sk_buff *skb) |
8674 |
+ struct llc_sock *llc = llc_sk(skb->sk); |
8675 |
+ struct llc_conn_state_ev *ev = llc_conn_ev(skb); |
8676 |
+ |
8677 |
+- /* |
8678 |
+- * We have to hold the skb, because llc_conn_service will kfree it in |
8679 |
+- * the sending path and we need to look at the skb->cb, where we encode |
8680 |
+- * llc_conn_state_ev. |
8681 |
+- */ |
8682 |
+- skb_get(skb); |
8683 |
+ ev->ind_prim = ev->cfm_prim = 0; |
8684 |
+ /* |
8685 |
+ * Send event to state machine |
8686 |
+@@ -75,21 +71,12 @@ int llc_conn_state_process(struct sock *sk, struct sk_buff *skb) |
8687 |
+ rc = llc_conn_service(skb->sk, skb); |
8688 |
+ if (unlikely(rc != 0)) { |
8689 |
+ printk(KERN_ERR "%s: llc_conn_service failed\n", __func__); |
8690 |
+- goto out_kfree_skb; |
8691 |
+- } |
8692 |
+- |
8693 |
+- if (unlikely(!ev->ind_prim && !ev->cfm_prim)) { |
8694 |
+- /* indicate or confirm not required */ |
8695 |
+- if (!skb->next) |
8696 |
+- goto out_kfree_skb; |
8697 |
+ goto out_skb_put; |
8698 |
+ } |
8699 |
+ |
8700 |
+- if (unlikely(ev->ind_prim && ev->cfm_prim)) /* Paranoia */ |
8701 |
+- skb_get(skb); |
8702 |
+- |
8703 |
+ switch (ev->ind_prim) { |
8704 |
+ case LLC_DATA_PRIM: |
8705 |
++ skb_get(skb); |
8706 |
+ llc_save_primitive(sk, skb, LLC_DATA_PRIM); |
8707 |
+ if (unlikely(sock_queue_rcv_skb(sk, skb))) { |
8708 |
+ /* |
8709 |
+@@ -106,6 +93,7 @@ int llc_conn_state_process(struct sock *sk, struct sk_buff *skb) |
8710 |
+ * skb->sk pointing to the newly created struct sock in |
8711 |
+ * llc_conn_handler. -acme |
8712 |
+ */ |
8713 |
++ skb_get(skb); |
8714 |
+ skb_queue_tail(&sk->sk_receive_queue, skb); |
8715 |
+ sk->sk_state_change(sk); |
8716 |
+ break; |
8717 |
+@@ -121,7 +109,6 @@ int llc_conn_state_process(struct sock *sk, struct sk_buff *skb) |
8718 |
+ sk->sk_state_change(sk); |
8719 |
+ } |
8720 |
+ } |
8721 |
+- kfree_skb(skb); |
8722 |
+ sock_put(sk); |
8723 |
+ break; |
8724 |
+ case LLC_RESET_PRIM: |
8725 |
+@@ -130,14 +117,11 @@ int llc_conn_state_process(struct sock *sk, struct sk_buff *skb) |
8726 |
+ * RESET is not being notified to upper layers for now |
8727 |
+ */ |
8728 |
+ printk(KERN_INFO "%s: received a reset ind!\n", __func__); |
8729 |
+- kfree_skb(skb); |
8730 |
+ break; |
8731 |
+ default: |
8732 |
+- if (ev->ind_prim) { |
8733 |
++ if (ev->ind_prim) |
8734 |
+ printk(KERN_INFO "%s: received unknown %d prim!\n", |
8735 |
+ __func__, ev->ind_prim); |
8736 |
+- kfree_skb(skb); |
8737 |
+- } |
8738 |
+ /* No indication */ |
8739 |
+ break; |
8740 |
+ } |
8741 |
+@@ -179,15 +163,12 @@ int llc_conn_state_process(struct sock *sk, struct sk_buff *skb) |
8742 |
+ printk(KERN_INFO "%s: received a reset conf!\n", __func__); |
8743 |
+ break; |
8744 |
+ default: |
8745 |
+- if (ev->cfm_prim) { |
8746 |
++ if (ev->cfm_prim) |
8747 |
+ printk(KERN_INFO "%s: received unknown %d prim!\n", |
8748 |
+ __func__, ev->cfm_prim); |
8749 |
+- break; |
8750 |
+- } |
8751 |
+- goto out_skb_put; /* No confirmation */ |
8752 |
++ /* No confirmation */ |
8753 |
++ break; |
8754 |
+ } |
8755 |
+-out_kfree_skb: |
8756 |
+- kfree_skb(skb); |
8757 |
+ out_skb_put: |
8758 |
+ kfree_skb(skb); |
8759 |
+ return rc; |
8760 |
+diff --git a/net/llc/llc_if.c b/net/llc/llc_if.c |
8761 |
+index 6daf391b3e84..fc4d2bd8816f 100644 |
8762 |
+--- a/net/llc/llc_if.c |
8763 |
++++ b/net/llc/llc_if.c |
8764 |
+@@ -38,6 +38,8 @@ |
8765 |
+ * closed and -EBUSY when sending data is not permitted in this state or |
8766 |
+ * LLC has send an I pdu with p bit set to 1 and is waiting for it's |
8767 |
+ * response. |
8768 |
++ * |
8769 |
++ * This function always consumes a reference to the skb. |
8770 |
+ */ |
8771 |
+ int llc_build_and_send_pkt(struct sock *sk, struct sk_buff *skb) |
8772 |
+ { |
8773 |
+@@ -46,20 +48,22 @@ int llc_build_and_send_pkt(struct sock *sk, struct sk_buff *skb) |
8774 |
+ struct llc_sock *llc = llc_sk(sk); |
8775 |
+ |
8776 |
+ if (unlikely(llc->state == LLC_CONN_STATE_ADM)) |
8777 |
+- goto out; |
8778 |
++ goto out_free; |
8779 |
+ rc = -EBUSY; |
8780 |
+ if (unlikely(llc_data_accept_state(llc->state) || /* data_conn_refuse */ |
8781 |
+ llc->p_flag)) { |
8782 |
+ llc->failed_data_req = 1; |
8783 |
+- goto out; |
8784 |
++ goto out_free; |
8785 |
+ } |
8786 |
+ ev = llc_conn_ev(skb); |
8787 |
+ ev->type = LLC_CONN_EV_TYPE_PRIM; |
8788 |
+ ev->prim = LLC_DATA_PRIM; |
8789 |
+ ev->prim_type = LLC_PRIM_TYPE_REQ; |
8790 |
+ skb->dev = llc->dev; |
8791 |
+- rc = llc_conn_state_process(sk, skb); |
8792 |
+-out: |
8793 |
++ return llc_conn_state_process(sk, skb); |
8794 |
++ |
8795 |
++out_free: |
8796 |
++ kfree_skb(skb); |
8797 |
+ return rc; |
8798 |
+ } |
8799 |
+ |
8800 |
+diff --git a/net/mac80211/rc80211_minstrel_ht.c b/net/mac80211/rc80211_minstrel_ht.c |
8801 |
+index e57811e4b91f..7ba4272642c9 100644 |
8802 |
+--- a/net/mac80211/rc80211_minstrel_ht.c |
8803 |
++++ b/net/mac80211/rc80211_minstrel_ht.c |
8804 |
+@@ -529,7 +529,7 @@ minstrel_ht_update_stats(struct minstrel_priv *mp, struct minstrel_ht_sta *mi) |
8805 |
+ |
8806 |
+ /* (re)Initialize group rate indexes */ |
8807 |
+ for(j = 0; j < MAX_THR_RATES; j++) |
8808 |
+- tmp_group_tp_rate[j] = group; |
8809 |
++ tmp_group_tp_rate[j] = MCS_GROUP_RATES * group; |
8810 |
+ |
8811 |
+ for (i = 0; i < MCS_GROUP_RATES; i++) { |
8812 |
+ if (!(mi->supported[group] & BIT(i))) |
8813 |
+diff --git a/net/mac80211/rx.c b/net/mac80211/rx.c |
8814 |
+index 4a6b3c7b35e3..31000622376d 100644 |
8815 |
+--- a/net/mac80211/rx.c |
8816 |
++++ b/net/mac80211/rx.c |
8817 |
+@@ -3227,9 +3227,18 @@ ieee80211_rx_h_mgmt(struct ieee80211_rx_data *rx) |
8818 |
+ case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP): |
8819 |
+ /* process for all: mesh, mlme, ibss */ |
8820 |
+ break; |
8821 |
++ case cpu_to_le16(IEEE80211_STYPE_DEAUTH): |
8822 |
++ if (is_multicast_ether_addr(mgmt->da) && |
8823 |
++ !is_broadcast_ether_addr(mgmt->da)) |
8824 |
++ return RX_DROP_MONITOR; |
8825 |
++ |
8826 |
++ /* process only for station/IBSS */ |
8827 |
++ if (sdata->vif.type != NL80211_IFTYPE_STATION && |
8828 |
++ sdata->vif.type != NL80211_IFTYPE_ADHOC) |
8829 |
++ return RX_DROP_MONITOR; |
8830 |
++ break; |
8831 |
+ case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP): |
8832 |
+ case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP): |
8833 |
+- case cpu_to_le16(IEEE80211_STYPE_DEAUTH): |
8834 |
+ case cpu_to_le16(IEEE80211_STYPE_DISASSOC): |
8835 |
+ if (is_multicast_ether_addr(mgmt->da) && |
8836 |
+ !is_broadcast_ether_addr(mgmt->da)) |
8837 |
+diff --git a/net/mpls/mpls_iptunnel.c b/net/mpls/mpls_iptunnel.c |
8838 |
+index 6e558a419f60..6c01166f972b 100644 |
8839 |
+--- a/net/mpls/mpls_iptunnel.c |
8840 |
++++ b/net/mpls/mpls_iptunnel.c |
8841 |
+@@ -28,7 +28,7 @@ |
8842 |
+ #include "internal.h" |
8843 |
+ |
8844 |
+ static const struct nla_policy mpls_iptunnel_policy[MPLS_IPTUNNEL_MAX + 1] = { |
8845 |
+- [MPLS_IPTUNNEL_DST] = { .type = NLA_U32 }, |
8846 |
++ [MPLS_IPTUNNEL_DST] = { .len = sizeof(u32) }, |
8847 |
+ [MPLS_IPTUNNEL_TTL] = { .type = NLA_U8 }, |
8848 |
+ }; |
8849 |
+ |
8850 |
+diff --git a/net/netfilter/nft_set_hash.c b/net/netfilter/nft_set_hash.c |
8851 |
+index 33aa2ac3a62e..73f8f99b1193 100644 |
8852 |
+--- a/net/netfilter/nft_set_hash.c |
8853 |
++++ b/net/netfilter/nft_set_hash.c |
8854 |
+@@ -442,6 +442,23 @@ static bool nft_hash_lookup_fast(const struct net *net, |
8855 |
+ return false; |
8856 |
+ } |
8857 |
+ |
8858 |
++static u32 nft_jhash(const struct nft_set *set, const struct nft_hash *priv, |
8859 |
++ const struct nft_set_ext *ext) |
8860 |
++{ |
8861 |
++ const struct nft_data *key = nft_set_ext_key(ext); |
8862 |
++ u32 hash, k1; |
8863 |
++ |
8864 |
++ if (set->klen == 4) { |
8865 |
++ k1 = *(u32 *)key; |
8866 |
++ hash = jhash_1word(k1, priv->seed); |
8867 |
++ } else { |
8868 |
++ hash = jhash(key, set->klen, priv->seed); |
8869 |
++ } |
8870 |
++ hash = reciprocal_scale(hash, priv->buckets); |
8871 |
++ |
8872 |
++ return hash; |
8873 |
++} |
8874 |
++ |
8875 |
+ static int nft_hash_insert(const struct net *net, const struct nft_set *set, |
8876 |
+ const struct nft_set_elem *elem, |
8877 |
+ struct nft_set_ext **ext) |
8878 |
+@@ -451,8 +468,7 @@ static int nft_hash_insert(const struct net *net, const struct nft_set *set, |
8879 |
+ u8 genmask = nft_genmask_next(net); |
8880 |
+ u32 hash; |
8881 |
+ |
8882 |
+- hash = jhash(nft_set_ext_key(&this->ext), set->klen, priv->seed); |
8883 |
+- hash = reciprocal_scale(hash, priv->buckets); |
8884 |
++ hash = nft_jhash(set, priv, &this->ext); |
8885 |
+ hlist_for_each_entry(he, &priv->table[hash], node) { |
8886 |
+ if (!memcmp(nft_set_ext_key(&this->ext), |
8887 |
+ nft_set_ext_key(&he->ext), set->klen) && |
8888 |
+@@ -491,8 +507,7 @@ static void *nft_hash_deactivate(const struct net *net, |
8889 |
+ u8 genmask = nft_genmask_next(net); |
8890 |
+ u32 hash; |
8891 |
+ |
8892 |
+- hash = jhash(nft_set_ext_key(&this->ext), set->klen, priv->seed); |
8893 |
+- hash = reciprocal_scale(hash, priv->buckets); |
8894 |
++ hash = nft_jhash(set, priv, &this->ext); |
8895 |
+ hlist_for_each_entry(he, &priv->table[hash], node) { |
8896 |
+ if (!memcmp(nft_set_ext_key(&this->ext), &elem->key.val, |
8897 |
+ set->klen) || |
8898 |
+diff --git a/net/packet/af_packet.c b/net/packet/af_packet.c |
8899 |
+index 4e1058159b08..46b7fac82775 100644 |
8900 |
+--- a/net/packet/af_packet.c |
8901 |
++++ b/net/packet/af_packet.c |
8902 |
+@@ -1337,15 +1337,21 @@ static void packet_sock_destruct(struct sock *sk) |
8903 |
+ |
8904 |
+ static bool fanout_flow_is_huge(struct packet_sock *po, struct sk_buff *skb) |
8905 |
+ { |
8906 |
+- u32 rxhash; |
8907 |
++ u32 *history = po->rollover->history; |
8908 |
++ u32 victim, rxhash; |
8909 |
+ int i, count = 0; |
8910 |
+ |
8911 |
+ rxhash = skb_get_hash(skb); |
8912 |
+ for (i = 0; i < ROLLOVER_HLEN; i++) |
8913 |
+- if (po->rollover->history[i] == rxhash) |
8914 |
++ if (READ_ONCE(history[i]) == rxhash) |
8915 |
+ count++; |
8916 |
+ |
8917 |
+- po->rollover->history[prandom_u32() % ROLLOVER_HLEN] = rxhash; |
8918 |
++ victim = prandom_u32() % ROLLOVER_HLEN; |
8919 |
++ |
8920 |
++ /* Avoid dirtying the cache line if possible */ |
8921 |
++ if (READ_ONCE(history[victim]) != rxhash) |
8922 |
++ WRITE_ONCE(history[victim], rxhash); |
8923 |
++ |
8924 |
+ return count > (ROLLOVER_HLEN >> 1); |
8925 |
+ } |
8926 |
+ |
8927 |
+@@ -3407,20 +3413,29 @@ static int packet_recvmsg(struct socket *sock, struct msghdr *msg, size_t len, |
8928 |
+ sock_recv_ts_and_drops(msg, sk, skb); |
8929 |
+ |
8930 |
+ if (msg->msg_name) { |
8931 |
++ int copy_len; |
8932 |
++ |
8933 |
+ /* If the address length field is there to be filled |
8934 |
+ * in, we fill it in now. |
8935 |
+ */ |
8936 |
+ if (sock->type == SOCK_PACKET) { |
8937 |
+ __sockaddr_check_size(sizeof(struct sockaddr_pkt)); |
8938 |
+ msg->msg_namelen = sizeof(struct sockaddr_pkt); |
8939 |
++ copy_len = msg->msg_namelen; |
8940 |
+ } else { |
8941 |
+ struct sockaddr_ll *sll = &PACKET_SKB_CB(skb)->sa.ll; |
8942 |
+ |
8943 |
+ msg->msg_namelen = sll->sll_halen + |
8944 |
+ offsetof(struct sockaddr_ll, sll_addr); |
8945 |
++ copy_len = msg->msg_namelen; |
8946 |
++ if (msg->msg_namelen < sizeof(struct sockaddr_ll)) { |
8947 |
++ memset(msg->msg_name + |
8948 |
++ offsetof(struct sockaddr_ll, sll_addr), |
8949 |
++ 0, sizeof(sll->sll_addr)); |
8950 |
++ msg->msg_namelen = sizeof(struct sockaddr_ll); |
8951 |
++ } |
8952 |
+ } |
8953 |
+- memcpy(msg->msg_name, &PACKET_SKB_CB(skb)->sa, |
8954 |
+- msg->msg_namelen); |
8955 |
++ memcpy(msg->msg_name, &PACKET_SKB_CB(skb)->sa, copy_len); |
8956 |
+ } |
8957 |
+ |
8958 |
+ if (pkt_sk(sk)->auxdata) { |
8959 |
+diff --git a/net/rds/ib_stats.c b/net/rds/ib_stats.c |
8960 |
+index 9252ad126335..ac46d8961b61 100644 |
8961 |
+--- a/net/rds/ib_stats.c |
8962 |
++++ b/net/rds/ib_stats.c |
8963 |
+@@ -42,7 +42,7 @@ DEFINE_PER_CPU_SHARED_ALIGNED(struct rds_ib_statistics, rds_ib_stats); |
8964 |
+ static const char *const rds_ib_stat_names[] = { |
8965 |
+ "ib_connect_raced", |
8966 |
+ "ib_listen_closed_stale", |
8967 |
+- "s_ib_evt_handler_call", |
8968 |
++ "ib_evt_handler_call", |
8969 |
+ "ib_tasklet_call", |
8970 |
+ "ib_tx_cq_event", |
8971 |
+ "ib_tx_ring_full", |
8972 |
+diff --git a/net/rds/stats.c b/net/rds/stats.c |
8973 |
+index 73be187d389e..6bbab4d74c4f 100644 |
8974 |
+--- a/net/rds/stats.c |
8975 |
++++ b/net/rds/stats.c |
8976 |
+@@ -76,6 +76,8 @@ static const char *const rds_stat_names[] = { |
8977 |
+ "cong_update_received", |
8978 |
+ "cong_send_error", |
8979 |
+ "cong_send_blocked", |
8980 |
++ "recv_bytes_added_to_sock", |
8981 |
++ "recv_bytes_freed_fromsock", |
8982 |
+ }; |
8983 |
+ |
8984 |
+ void rds_stats_info_copy(struct rds_info_iterator *iter, |
8985 |
+diff --git a/net/rxrpc/output.c b/net/rxrpc/output.c |
8986 |
+index 5b67cb5d47f0..edddbacf33bc 100644 |
8987 |
+--- a/net/rxrpc/output.c |
8988 |
++++ b/net/rxrpc/output.c |
8989 |
+@@ -404,6 +404,9 @@ send_fragmentable: |
8990 |
+ } |
8991 |
+ break; |
8992 |
+ #endif |
8993 |
++ |
8994 |
++ default: |
8995 |
++ BUG(); |
8996 |
+ } |
8997 |
+ |
8998 |
+ up_write(&conn->params.local->defrag_sem); |
8999 |
+diff --git a/net/sched/act_mirred.c b/net/sched/act_mirred.c |
9000 |
+index 529bb064c4a4..dcfaa4f9c7c5 100644 |
9001 |
+--- a/net/sched/act_mirred.c |
9002 |
++++ b/net/sched/act_mirred.c |
9003 |
+@@ -371,7 +371,11 @@ static int __init mirred_init_module(void) |
9004 |
+ return err; |
9005 |
+ |
9006 |
+ pr_info("Mirror/redirect action on\n"); |
9007 |
+- return tcf_register_action(&act_mirred_ops, &mirred_net_ops); |
9008 |
++ err = tcf_register_action(&act_mirred_ops, &mirred_net_ops); |
9009 |
++ if (err) |
9010 |
++ unregister_netdevice_notifier(&mirred_device_notifier); |
9011 |
++ |
9012 |
++ return err; |
9013 |
+ } |
9014 |
+ |
9015 |
+ static void __exit mirred_cleanup_module(void) |
9016 |
+diff --git a/net/sched/sch_netem.c b/net/sched/sch_netem.c |
9017 |
+index 6266121a03f9..328b043edf07 100644 |
9018 |
+--- a/net/sched/sch_netem.c |
9019 |
++++ b/net/sched/sch_netem.c |
9020 |
+@@ -431,8 +431,7 @@ static int netem_enqueue(struct sk_buff *skb, struct Qdisc *sch, |
9021 |
+ struct netem_skb_cb *cb; |
9022 |
+ struct sk_buff *skb2; |
9023 |
+ struct sk_buff *segs = NULL; |
9024 |
+- unsigned int len = 0, last_len, prev_len = qdisc_pkt_len(skb); |
9025 |
+- int nb = 0; |
9026 |
++ unsigned int prev_len = qdisc_pkt_len(skb); |
9027 |
+ int count = 1; |
9028 |
+ int rc = NET_XMIT_SUCCESS; |
9029 |
+ int rc_drop = NET_XMIT_DROP; |
9030 |
+@@ -489,6 +488,7 @@ static int netem_enqueue(struct sk_buff *skb, struct Qdisc *sch, |
9031 |
+ segs = netem_segment(skb, sch, to_free); |
9032 |
+ if (!segs) |
9033 |
+ return rc_drop; |
9034 |
++ qdisc_skb_cb(segs)->pkt_len = segs->len; |
9035 |
+ } else { |
9036 |
+ segs = skb; |
9037 |
+ } |
9038 |
+@@ -504,6 +504,7 @@ static int netem_enqueue(struct sk_buff *skb, struct Qdisc *sch, |
9039 |
+ if (skb->ip_summed == CHECKSUM_PARTIAL && |
9040 |
+ skb_checksum_help(skb)) { |
9041 |
+ qdisc_drop(skb, sch, to_free); |
9042 |
++ skb = NULL; |
9043 |
+ goto finish_segs; |
9044 |
+ } |
9045 |
+ |
9046 |
+@@ -579,6 +580,12 @@ static int netem_enqueue(struct sk_buff *skb, struct Qdisc *sch, |
9047 |
+ |
9048 |
+ finish_segs: |
9049 |
+ if (segs) { |
9050 |
++ unsigned int len, last_len; |
9051 |
++ int nb; |
9052 |
++ |
9053 |
++ len = skb ? skb->len : 0; |
9054 |
++ nb = skb ? 1 : 0; |
9055 |
++ |
9056 |
+ while (segs) { |
9057 |
+ skb2 = segs->next; |
9058 |
+ segs->next = NULL; |
9059 |
+@@ -594,9 +601,10 @@ finish_segs: |
9060 |
+ } |
9061 |
+ segs = skb2; |
9062 |
+ } |
9063 |
+- sch->q.qlen += nb; |
9064 |
+- if (nb > 1) |
9065 |
+- qdisc_tree_reduce_backlog(sch, 1 - nb, prev_len - len); |
9066 |
++ /* Parent qdiscs accounted for 1 skb of size @prev_len */ |
9067 |
++ qdisc_tree_reduce_backlog(sch, -(nb - 1), -(len - prev_len)); |
9068 |
++ } else if (!skb) { |
9069 |
++ return NET_XMIT_DROP; |
9070 |
+ } |
9071 |
+ return NET_XMIT_SUCCESS; |
9072 |
+ } |
9073 |
+diff --git a/net/tipc/link.c b/net/tipc/link.c |
9074 |
+index da749916faac..82e4e0e152d1 100644 |
9075 |
+--- a/net/tipc/link.c |
9076 |
++++ b/net/tipc/link.c |
9077 |
+@@ -811,18 +811,31 @@ static int link_schedule_user(struct tipc_link *l, struct tipc_msg *hdr) |
9078 |
+ */ |
9079 |
+ void link_prepare_wakeup(struct tipc_link *l) |
9080 |
+ { |
9081 |
++ struct sk_buff_head *wakeupq = &l->wakeupq; |
9082 |
++ struct sk_buff_head *inputq = l->inputq; |
9083 |
+ struct sk_buff *skb, *tmp; |
9084 |
+- int imp, i = 0; |
9085 |
++ struct sk_buff_head tmpq; |
9086 |
++ int avail[5] = {0,}; |
9087 |
++ int imp = 0; |
9088 |
++ |
9089 |
++ __skb_queue_head_init(&tmpq); |
9090 |
+ |
9091 |
+- skb_queue_walk_safe(&l->wakeupq, skb, tmp) { |
9092 |
++ for (; imp <= TIPC_SYSTEM_IMPORTANCE; imp++) |
9093 |
++ avail[imp] = l->backlog[imp].limit - l->backlog[imp].len; |
9094 |
++ |
9095 |
++ skb_queue_walk_safe(wakeupq, skb, tmp) { |
9096 |
+ imp = TIPC_SKB_CB(skb)->chain_imp; |
9097 |
+- if (l->backlog[imp].len < l->backlog[imp].limit) { |
9098 |
+- skb_unlink(skb, &l->wakeupq); |
9099 |
+- skb_queue_tail(l->inputq, skb); |
9100 |
+- } else if (i++ > 10) { |
9101 |
+- break; |
9102 |
+- } |
9103 |
++ if (avail[imp] <= 0) |
9104 |
++ continue; |
9105 |
++ avail[imp]--; |
9106 |
++ __skb_unlink(skb, wakeupq); |
9107 |
++ __skb_queue_tail(&tmpq, skb); |
9108 |
+ } |
9109 |
++ |
9110 |
++ spin_lock_bh(&inputq->lock); |
9111 |
++ skb_queue_splice_tail(&tmpq, inputq); |
9112 |
++ spin_unlock_bh(&inputq->lock); |
9113 |
++ |
9114 |
+ } |
9115 |
+ |
9116 |
+ void tipc_link_reset(struct tipc_link *l) |
9117 |
+diff --git a/net/tipc/node.c b/net/tipc/node.c |
9118 |
+index 42e9bdcc4bb6..82f8f69f4d6b 100644 |
9119 |
+--- a/net/tipc/node.c |
9120 |
++++ b/net/tipc/node.c |
9121 |
+@@ -688,10 +688,10 @@ static void __tipc_node_link_down(struct tipc_node *n, int *bearer_id, |
9122 |
+ static void tipc_node_link_down(struct tipc_node *n, int bearer_id, bool delete) |
9123 |
+ { |
9124 |
+ struct tipc_link_entry *le = &n->links[bearer_id]; |
9125 |
++ struct tipc_media_addr *maddr = NULL; |
9126 |
+ struct tipc_link *l = le->link; |
9127 |
+- struct tipc_media_addr *maddr; |
9128 |
+- struct sk_buff_head xmitq; |
9129 |
+ int old_bearer_id = bearer_id; |
9130 |
++ struct sk_buff_head xmitq; |
9131 |
+ |
9132 |
+ if (!l) |
9133 |
+ return; |
9134 |
+@@ -713,7 +713,8 @@ static void tipc_node_link_down(struct tipc_node *n, int bearer_id, bool delete) |
9135 |
+ tipc_node_write_unlock(n); |
9136 |
+ if (delete) |
9137 |
+ tipc_mon_remove_peer(n->net, n->addr, old_bearer_id); |
9138 |
+- tipc_bearer_xmit(n->net, bearer_id, &xmitq, maddr); |
9139 |
++ if (!skb_queue_empty(&xmitq)) |
9140 |
++ tipc_bearer_xmit(n->net, bearer_id, &xmitq, maddr); |
9141 |
+ tipc_sk_rcv(n->net, &le->inputq); |
9142 |
+ } |
9143 |
+ |
9144 |
+diff --git a/net/tipc/socket.c b/net/tipc/socket.c |
9145 |
+index 21929ba196eb..d9ec6335c7dc 100644 |
9146 |
+--- a/net/tipc/socket.c |
9147 |
++++ b/net/tipc/socket.c |
9148 |
+@@ -487,7 +487,7 @@ static void __tipc_shutdown(struct socket *sock, int error) |
9149 |
+ struct sock *sk = sock->sk; |
9150 |
+ struct tipc_sock *tsk = tipc_sk(sk); |
9151 |
+ struct net *net = sock_net(sk); |
9152 |
+- long timeout = CONN_TIMEOUT_DEFAULT; |
9153 |
++ long timeout = msecs_to_jiffies(CONN_TIMEOUT_DEFAULT); |
9154 |
+ u32 dnode = tsk_peer_node(tsk); |
9155 |
+ struct sk_buff *skb; |
9156 |
+ |
9157 |
+diff --git a/net/tipc/sysctl.c b/net/tipc/sysctl.c |
9158 |
+index 1a779b1e8510..40f6d82083d7 100644 |
9159 |
+--- a/net/tipc/sysctl.c |
9160 |
++++ b/net/tipc/sysctl.c |
9161 |
+@@ -37,6 +37,8 @@ |
9162 |
+ |
9163 |
+ #include <linux/sysctl.h> |
9164 |
+ |
9165 |
++static int zero; |
9166 |
++static int one = 1; |
9167 |
+ static struct ctl_table_header *tipc_ctl_hdr; |
9168 |
+ |
9169 |
+ static struct ctl_table tipc_table[] = { |
9170 |
+@@ -45,14 +47,16 @@ static struct ctl_table tipc_table[] = { |
9171 |
+ .data = &sysctl_tipc_rmem, |
9172 |
+ .maxlen = sizeof(sysctl_tipc_rmem), |
9173 |
+ .mode = 0644, |
9174 |
+- .proc_handler = proc_dointvec, |
9175 |
++ .proc_handler = proc_dointvec_minmax, |
9176 |
++ .extra1 = &one, |
9177 |
+ }, |
9178 |
+ { |
9179 |
+ .procname = "named_timeout", |
9180 |
+ .data = &sysctl_tipc_named_timeout, |
9181 |
+ .maxlen = sizeof(sysctl_tipc_named_timeout), |
9182 |
+ .mode = 0644, |
9183 |
+- .proc_handler = proc_dointvec, |
9184 |
++ .proc_handler = proc_dointvec_minmax, |
9185 |
++ .extra1 = &zero, |
9186 |
+ }, |
9187 |
+ {} |
9188 |
+ }; |
9189 |
+diff --git a/security/apparmor/include/context.h b/security/apparmor/include/context.h |
9190 |
+index 6ae07e9aaa17..812cdec9dd3b 100644 |
9191 |
+--- a/security/apparmor/include/context.h |
9192 |
++++ b/security/apparmor/include/context.h |
9193 |
+@@ -191,6 +191,8 @@ static inline struct aa_label *begin_current_label_crit_section(void) |
9194 |
+ { |
9195 |
+ struct aa_label *label = aa_current_raw_label(); |
9196 |
+ |
9197 |
++ might_sleep(); |
9198 |
++ |
9199 |
+ if (label_is_stale(label)) { |
9200 |
+ label = aa_get_newest_label(label); |
9201 |
+ if (aa_replace_current_label(label) == 0) |
9202 |
+diff --git a/security/apparmor/lsm.c b/security/apparmor/lsm.c |
9203 |
+index 1346ee5be04f..4f08023101f3 100644 |
9204 |
+--- a/security/apparmor/lsm.c |
9205 |
++++ b/security/apparmor/lsm.c |
9206 |
+@@ -108,12 +108,12 @@ static int apparmor_ptrace_access_check(struct task_struct *child, |
9207 |
+ struct aa_label *tracer, *tracee; |
9208 |
+ int error; |
9209 |
+ |
9210 |
+- tracer = begin_current_label_crit_section(); |
9211 |
++ tracer = __begin_current_label_crit_section(); |
9212 |
+ tracee = aa_get_task_label(child); |
9213 |
+ error = aa_may_ptrace(tracer, tracee, |
9214 |
+ mode == PTRACE_MODE_READ ? AA_PTRACE_READ : AA_PTRACE_TRACE); |
9215 |
+ aa_put_label(tracee); |
9216 |
+- end_current_label_crit_section(tracer); |
9217 |
++ __end_current_label_crit_section(tracer); |
9218 |
+ |
9219 |
+ return error; |
9220 |
+ } |
9221 |
+diff --git a/security/keys/key.c b/security/keys/key.c |
9222 |
+index 87172f99f73e..17244f5f54c6 100644 |
9223 |
+--- a/security/keys/key.c |
9224 |
++++ b/security/keys/key.c |
9225 |
+@@ -297,6 +297,7 @@ struct key *key_alloc(struct key_type *type, const char *desc, |
9226 |
+ key->gid = gid; |
9227 |
+ key->perm = perm; |
9228 |
+ key->restrict_link = restrict_link; |
9229 |
++ key->last_used_at = ktime_get_real_seconds(); |
9230 |
+ |
9231 |
+ if (!(flags & KEY_ALLOC_NOT_IN_QUOTA)) |
9232 |
+ key->flags |= 1 << KEY_FLAG_IN_QUOTA; |
9233 |
+diff --git a/sound/aoa/codecs/onyx.c b/sound/aoa/codecs/onyx.c |
9234 |
+index d2d96ca082b7..6224fd3bbf7c 100644 |
9235 |
+--- a/sound/aoa/codecs/onyx.c |
9236 |
++++ b/sound/aoa/codecs/onyx.c |
9237 |
+@@ -74,8 +74,10 @@ static int onyx_read_register(struct onyx *onyx, u8 reg, u8 *value) |
9238 |
+ return 0; |
9239 |
+ } |
9240 |
+ v = i2c_smbus_read_byte_data(onyx->i2c, reg); |
9241 |
+- if (v < 0) |
9242 |
++ if (v < 0) { |
9243 |
++ *value = 0; |
9244 |
+ return -1; |
9245 |
++ } |
9246 |
+ *value = (u8)v; |
9247 |
+ onyx->cache[ONYX_REG_CONTROL-FIRSTREGISTER] = *value; |
9248 |
+ return 0; |
9249 |
+diff --git a/sound/pci/hda/hda_controller.h b/sound/pci/hda/hda_controller.h |
9250 |
+index 8a9dd4767b1e..63cc10604afc 100644 |
9251 |
+--- a/sound/pci/hda/hda_controller.h |
9252 |
++++ b/sound/pci/hda/hda_controller.h |
9253 |
+@@ -176,11 +176,10 @@ struct azx { |
9254 |
+ #define azx_bus(chip) (&(chip)->bus.core) |
9255 |
+ #define bus_to_azx(_bus) container_of(_bus, struct azx, bus.core) |
9256 |
+ |
9257 |
+-#ifdef CONFIG_X86 |
9258 |
+-#define azx_snoop(chip) ((chip)->snoop) |
9259 |
+-#else |
9260 |
+-#define azx_snoop(chip) true |
9261 |
+-#endif |
9262 |
++static inline bool azx_snoop(struct azx *chip) |
9263 |
++{ |
9264 |
++ return !IS_ENABLED(CONFIG_X86) || chip->snoop; |
9265 |
++} |
9266 |
+ |
9267 |
+ /* |
9268 |
+ * macros for easy use |
9269 |
+diff --git a/sound/soc/codecs/cs4349.c b/sound/soc/codecs/cs4349.c |
9270 |
+index 0a749c79ef57..1d38e53dc95c 100644 |
9271 |
+--- a/sound/soc/codecs/cs4349.c |
9272 |
++++ b/sound/soc/codecs/cs4349.c |
9273 |
+@@ -380,6 +380,7 @@ static struct i2c_driver cs4349_i2c_driver = { |
9274 |
+ .driver = { |
9275 |
+ .name = "cs4349", |
9276 |
+ .of_match_table = cs4349_of_match, |
9277 |
++ .pm = &cs4349_runtime_pm, |
9278 |
+ }, |
9279 |
+ .id_table = cs4349_i2c_id, |
9280 |
+ .probe = cs4349_i2c_probe, |
9281 |
+diff --git a/sound/soc/codecs/es8328.c b/sound/soc/codecs/es8328.c |
9282 |
+index bcdb8914ec16..e2f44fa46262 100644 |
9283 |
+--- a/sound/soc/codecs/es8328.c |
9284 |
++++ b/sound/soc/codecs/es8328.c |
9285 |
+@@ -231,7 +231,7 @@ static const struct soc_enum es8328_rline_enum = |
9286 |
+ ARRAY_SIZE(es8328_line_texts), |
9287 |
+ es8328_line_texts); |
9288 |
+ static const struct snd_kcontrol_new es8328_right_line_controls = |
9289 |
+- SOC_DAPM_ENUM("Route", es8328_lline_enum); |
9290 |
++ SOC_DAPM_ENUM("Route", es8328_rline_enum); |
9291 |
+ |
9292 |
+ /* Left Mixer */ |
9293 |
+ static const struct snd_kcontrol_new es8328_left_mixer_controls[] = { |
9294 |
+diff --git a/sound/soc/codecs/wm8737.c b/sound/soc/codecs/wm8737.c |
9295 |
+index f0cb1c4afe3c..c5a8d758f58b 100644 |
9296 |
+--- a/sound/soc/codecs/wm8737.c |
9297 |
++++ b/sound/soc/codecs/wm8737.c |
9298 |
+@@ -170,7 +170,7 @@ SOC_DOUBLE("Polarity Invert Switch", WM8737_ADC_CONTROL, 5, 6, 1, 0), |
9299 |
+ SOC_SINGLE("3D Switch", WM8737_3D_ENHANCE, 0, 1, 0), |
9300 |
+ SOC_SINGLE("3D Depth", WM8737_3D_ENHANCE, 1, 15, 0), |
9301 |
+ SOC_ENUM("3D Low Cut-off", low_3d), |
9302 |
+-SOC_ENUM("3D High Cut-off", low_3d), |
9303 |
++SOC_ENUM("3D High Cut-off", high_3d), |
9304 |
+ SOC_SINGLE_TLV("3D ADC Volume", WM8737_3D_ENHANCE, 7, 1, 1, adc_tlv), |
9305 |
+ |
9306 |
+ SOC_SINGLE("Noise Gate Switch", WM8737_NOISE_GATE, 0, 1, 0), |
9307 |
+diff --git a/sound/soc/davinci/davinci-mcasp.c b/sound/soc/davinci/davinci-mcasp.c |
9308 |
+index 07bac9ea65c4..e10e03800cce 100644 |
9309 |
+--- a/sound/soc/davinci/davinci-mcasp.c |
9310 |
++++ b/sound/soc/davinci/davinci-mcasp.c |
9311 |
+@@ -882,14 +882,13 @@ static int mcasp_i2s_hw_param(struct davinci_mcasp *mcasp, int stream, |
9312 |
+ active_slots = hweight32(mcasp->tdm_mask[stream]); |
9313 |
+ active_serializers = (channels + active_slots - 1) / |
9314 |
+ active_slots; |
9315 |
+- if (active_serializers == 1) { |
9316 |
++ if (active_serializers == 1) |
9317 |
+ active_slots = channels; |
9318 |
+- for (i = 0; i < total_slots; i++) { |
9319 |
+- if ((1 << i) & mcasp->tdm_mask[stream]) { |
9320 |
+- mask |= (1 << i); |
9321 |
+- if (--active_slots <= 0) |
9322 |
+- break; |
9323 |
+- } |
9324 |
++ for (i = 0; i < total_slots; i++) { |
9325 |
++ if ((1 << i) & mcasp->tdm_mask[stream]) { |
9326 |
++ mask |= (1 << i); |
9327 |
++ if (--active_slots <= 0) |
9328 |
++ break; |
9329 |
+ } |
9330 |
+ } |
9331 |
+ } else { |
9332 |
+diff --git a/sound/soc/fsl/imx-sgtl5000.c b/sound/soc/fsl/imx-sgtl5000.c |
9333 |
+index 8e525f7ac08d..3d99a8579c99 100644 |
9334 |
+--- a/sound/soc/fsl/imx-sgtl5000.c |
9335 |
++++ b/sound/soc/fsl/imx-sgtl5000.c |
9336 |
+@@ -119,7 +119,8 @@ static int imx_sgtl5000_probe(struct platform_device *pdev) |
9337 |
+ codec_dev = of_find_i2c_device_by_node(codec_np); |
9338 |
+ if (!codec_dev) { |
9339 |
+ dev_err(&pdev->dev, "failed to find codec platform device\n"); |
9340 |
+- return -EPROBE_DEFER; |
9341 |
++ ret = -EPROBE_DEFER; |
9342 |
++ goto fail; |
9343 |
+ } |
9344 |
+ |
9345 |
+ data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); |
9346 |
+diff --git a/sound/soc/qcom/apq8016_sbc.c b/sound/soc/qcom/apq8016_sbc.c |
9347 |
+index d49adc822a11..8e6b88d68ca6 100644 |
9348 |
+--- a/sound/soc/qcom/apq8016_sbc.c |
9349 |
++++ b/sound/soc/qcom/apq8016_sbc.c |
9350 |
+@@ -163,41 +163,52 @@ static struct apq8016_sbc_data *apq8016_sbc_parse_of(struct snd_soc_card *card) |
9351 |
+ |
9352 |
+ if (!cpu || !codec) { |
9353 |
+ dev_err(dev, "Can't find cpu/codec DT node\n"); |
9354 |
+- return ERR_PTR(-EINVAL); |
9355 |
++ ret = -EINVAL; |
9356 |
++ goto error; |
9357 |
+ } |
9358 |
+ |
9359 |
+ link->cpu_of_node = of_parse_phandle(cpu, "sound-dai", 0); |
9360 |
+ if (!link->cpu_of_node) { |
9361 |
+ dev_err(card->dev, "error getting cpu phandle\n"); |
9362 |
+- return ERR_PTR(-EINVAL); |
9363 |
++ ret = -EINVAL; |
9364 |
++ goto error; |
9365 |
+ } |
9366 |
+ |
9367 |
+ ret = snd_soc_of_get_dai_name(cpu, &link->cpu_dai_name); |
9368 |
+ if (ret) { |
9369 |
+ dev_err(card->dev, "error getting cpu dai name\n"); |
9370 |
+- return ERR_PTR(ret); |
9371 |
++ goto error; |
9372 |
+ } |
9373 |
+ |
9374 |
+ ret = snd_soc_of_get_dai_link_codecs(dev, codec, link); |
9375 |
+ |
9376 |
+ if (ret < 0) { |
9377 |
+ dev_err(card->dev, "error getting codec dai name\n"); |
9378 |
+- return ERR_PTR(ret); |
9379 |
++ goto error; |
9380 |
+ } |
9381 |
+ |
9382 |
+ link->platform_of_node = link->cpu_of_node; |
9383 |
+ ret = of_property_read_string(np, "link-name", &link->name); |
9384 |
+ if (ret) { |
9385 |
+ dev_err(card->dev, "error getting codec dai_link name\n"); |
9386 |
+- return ERR_PTR(ret); |
9387 |
++ goto error; |
9388 |
+ } |
9389 |
+ |
9390 |
+ link->stream_name = link->name; |
9391 |
+ link->init = apq8016_sbc_dai_init; |
9392 |
+ link++; |
9393 |
++ |
9394 |
++ of_node_put(cpu); |
9395 |
++ of_node_put(codec); |
9396 |
+ } |
9397 |
+ |
9398 |
+ return data; |
9399 |
++ |
9400 |
++ error: |
9401 |
++ of_node_put(np); |
9402 |
++ of_node_put(cpu); |
9403 |
++ of_node_put(codec); |
9404 |
++ return ERR_PTR(ret); |
9405 |
+ } |
9406 |
+ |
9407 |
+ static const struct snd_soc_dapm_widget apq8016_sbc_dapm_widgets[] = { |
9408 |
+diff --git a/sound/soc/soc-pcm.c b/sound/soc/soc-pcm.c |
9409 |
+index 24047375c2fb..70e1a60a2e98 100644 |
9410 |
+--- a/sound/soc/soc-pcm.c |
9411 |
++++ b/sound/soc/soc-pcm.c |
9412 |
+@@ -48,8 +48,8 @@ static bool snd_soc_dai_stream_valid(struct snd_soc_dai *dai, int stream) |
9413 |
+ else |
9414 |
+ codec_stream = &dai->driver->capture; |
9415 |
+ |
9416 |
+- /* If the codec specifies any rate at all, it supports the stream. */ |
9417 |
+- return codec_stream->rates; |
9418 |
++ /* If the codec specifies any channels at all, it supports the stream */ |
9419 |
++ return codec_stream->channels_min; |
9420 |
+ } |
9421 |
+ |
9422 |
+ /** |
9423 |
+diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c |
9424 |
+index da0a2083e12a..d2802fd8c1dd 100644 |
9425 |
+--- a/sound/soc/sunxi/sun4i-i2s.c |
9426 |
++++ b/sound/soc/sunxi/sun4i-i2s.c |
9427 |
+@@ -80,8 +80,8 @@ |
9428 |
+ #define SUN4I_I2S_CLK_DIV_MCLK_MASK GENMASK(3, 0) |
9429 |
+ #define SUN4I_I2S_CLK_DIV_MCLK(mclk) ((mclk) << 0) |
9430 |
+ |
9431 |
+-#define SUN4I_I2S_RX_CNT_REG 0x28 |
9432 |
+-#define SUN4I_I2S_TX_CNT_REG 0x2c |
9433 |
++#define SUN4I_I2S_TX_CNT_REG 0x28 |
9434 |
++#define SUN4I_I2S_RX_CNT_REG 0x2c |
9435 |
+ |
9436 |
+ #define SUN4I_I2S_TX_CHAN_SEL_REG 0x30 |
9437 |
+ #define SUN4I_I2S_CHAN_SEL(num_chan) (((num_chan) - 1) << 0) |
9438 |
+diff --git a/sound/usb/mixer.c b/sound/usb/mixer.c |
9439 |
+index 044193b2364d..e6e4c3b9d9d3 100644 |
9440 |
+--- a/sound/usb/mixer.c |
9441 |
++++ b/sound/usb/mixer.c |
9442 |
+@@ -2632,7 +2632,9 @@ int snd_usb_create_mixer(struct snd_usb_audio *chip, int ctrlif, |
9443 |
+ (err = snd_usb_mixer_status_create(mixer)) < 0) |
9444 |
+ goto _error; |
9445 |
+ |
9446 |
+- snd_usb_mixer_apply_create_quirk(mixer); |
9447 |
++ err = snd_usb_mixer_apply_create_quirk(mixer); |
9448 |
++ if (err < 0) |
9449 |
++ goto _error; |
9450 |
+ |
9451 |
+ err = snd_device_new(chip->card, SNDRV_DEV_CODEC, mixer, &dev_ops); |
9452 |
+ if (err < 0) |
9453 |
+diff --git a/sound/usb/quirks-table.h b/sound/usb/quirks-table.h |
9454 |
+index d32727c74a16..c892b4d1e733 100644 |
9455 |
+--- a/sound/usb/quirks-table.h |
9456 |
++++ b/sound/usb/quirks-table.h |
9457 |
+@@ -3293,19 +3293,14 @@ AU0828_DEVICE(0x2040, 0x7270, "Hauppauge", "HVR-950Q"), |
9458 |
+ .ifnum = 0, |
9459 |
+ .type = QUIRK_AUDIO_STANDARD_MIXER, |
9460 |
+ }, |
9461 |
+- /* Capture */ |
9462 |
+- { |
9463 |
+- .ifnum = 1, |
9464 |
+- .type = QUIRK_IGNORE_INTERFACE, |
9465 |
+- }, |
9466 |
+ /* Playback */ |
9467 |
+ { |
9468 |
+- .ifnum = 2, |
9469 |
++ .ifnum = 1, |
9470 |
+ .type = QUIRK_AUDIO_FIXED_ENDPOINT, |
9471 |
+ .data = &(const struct audioformat) { |
9472 |
+ .formats = SNDRV_PCM_FMTBIT_S16_LE, |
9473 |
+ .channels = 2, |
9474 |
+- .iface = 2, |
9475 |
++ .iface = 1, |
9476 |
+ .altsetting = 1, |
9477 |
+ .altset_idx = 1, |
9478 |
+ .attributes = UAC_EP_CS_ATTR_FILL_MAX | |
9479 |
+diff --git a/tools/testing/selftests/ipc/msgque.c b/tools/testing/selftests/ipc/msgque.c |
9480 |
+index ee9382bdfadc..c5587844fbb8 100644 |
9481 |
+--- a/tools/testing/selftests/ipc/msgque.c |
9482 |
++++ b/tools/testing/selftests/ipc/msgque.c |
9483 |
+@@ -1,9 +1,10 @@ |
9484 |
+ // SPDX-License-Identifier: GPL-2.0 |
9485 |
++#define _GNU_SOURCE |
9486 |
+ #include <stdlib.h> |
9487 |
+ #include <stdio.h> |
9488 |
+ #include <string.h> |
9489 |
+ #include <errno.h> |
9490 |
+-#include <linux/msg.h> |
9491 |
++#include <sys/msg.h> |
9492 |
+ #include <fcntl.h> |
9493 |
+ |
9494 |
+ #include "../kselftest.h" |
9495 |
+@@ -73,7 +74,7 @@ int restore_queue(struct msgque_data *msgque) |
9496 |
+ return 0; |
9497 |
+ |
9498 |
+ destroy: |
9499 |
+- if (msgctl(id, IPC_RMID, 0)) |
9500 |
++ if (msgctl(id, IPC_RMID, NULL)) |
9501 |
+ printf("Failed to destroy queue: %d\n", -errno); |
9502 |
+ return ret; |
9503 |
+ } |
9504 |
+@@ -120,7 +121,7 @@ int check_and_destroy_queue(struct msgque_data *msgque) |
9505 |
+ |
9506 |
+ ret = 0; |
9507 |
+ err: |
9508 |
+- if (msgctl(msgque->msq_id, IPC_RMID, 0)) { |
9509 |
++ if (msgctl(msgque->msq_id, IPC_RMID, NULL)) { |
9510 |
+ printf("Failed to destroy queue: %d\n", -errno); |
9511 |
+ return -errno; |
9512 |
+ } |
9513 |
+@@ -129,7 +130,7 @@ err: |
9514 |
+ |
9515 |
+ int dump_queue(struct msgque_data *msgque) |
9516 |
+ { |
9517 |
+- struct msqid64_ds ds; |
9518 |
++ struct msqid_ds ds; |
9519 |
+ int kern_id; |
9520 |
+ int i, ret; |
9521 |
+ |
9522 |
+@@ -246,7 +247,7 @@ int main(int argc, char **argv) |
9523 |
+ return ksft_exit_pass(); |
9524 |
+ |
9525 |
+ err_destroy: |
9526 |
+- if (msgctl(msgque.msq_id, IPC_RMID, 0)) { |
9527 |
++ if (msgctl(msgque.msq_id, IPC_RMID, NULL)) { |
9528 |
+ printf("Failed to destroy queue: %d\n", -errno); |
9529 |
+ return ksft_exit_fail(); |
9530 |
+ } |