Gentoo Archives: gentoo-dev

From: fedora.dm0@×××××.com
To: gentoo-dev@l.g.o
Cc: floppym@g.o
Subject: [gentoo-dev] [PATCH] meson.eclass: include riscv bitness in cpu_family
Date: Mon, 03 May 2021 12:56:26
Message-Id: 87tunkc6x8.fsf@gmail.com
1 This makes cpu_family identify RISC-V systems as either "riscv64"
2 or "riscv32" to match the given tuple, or it will leave it as
3 "riscv" when the tuple has an unknown cpu field.
4
5 This fixes the expected values of cpu_family in meson projects:
6 https://mesonbuild.com/Reference-tables.html#cpu-families
7
8 Signed-off-by: David Michael <fedora.dm0@×××××.com>
9 ---
10 eclass/meson.eclass | 5 +++++
11 1 file changed, 5 insertions(+)
12
13 diff --git a/eclass/meson.eclass b/eclass/meson.eclass
14 index d0ce5adb355..e9c651fdeda 100644
15 --- a/eclass/meson.eclass
16 +++ b/eclass/meson.eclass
17 @@ -142,6 +142,11 @@ _meson_get_machine_info() {
18 case ${cpu_family} in
19 amd64) cpu_family=x86_64 ;;
20 arm64) cpu_family=aarch64 ;;
21 + riscv)
22 + case ${tuple} in
23 + riscv32*) cpu_family=riscv32 ;;
24 + riscv64*) cpu_family=riscv64 ;;
25 + esac ;;
26 esac
27
28 # This may require adjustment based on CFLAGS
29 --
30 2.26.3