Gentoo Archives: gentoo-dev

From: Alexis Ballier <aballier@g.o>
To: gentoo-dev@l.g.o
Subject: Re: [gentoo-dev] Announcing RISC-V
Date: Mon, 20 May 2019 09:44:31
Message-Id: 20190520114418.04551eb5@gentoo.org
In Reply to: Re: [gentoo-dev] Announcing RISC-V by "Michał Górny"
1 On Sat, 18 May 2019 20:47:28 +0200
2 Michał Górny <mgorny@g.o> wrote:
3
4 > On Fri, 2019-05-03 at 23:34 +0200, Andreas K. Huettel wrote:
5 > > * We will initially add two profiles to profile.desc:
6 > > default/linux/riscv/17.0/rv64gc/lp64d (non-multilib, 64bit
7 > > hardfloat) default/linux/riscv/17.0/rv64gc (multilib lp64d/lp64,
8 > > i.e. hard/softfloat)
9 >
10 > I still don't understand the purpose of this multilib. If you have
11 > a hardfloat CPU, why would you ever build some of the software
12 > softfloat?
13
14
15 One reason I could imagine is that the hardfloat isn't IEEE 754
16 compliant. Searching through the RISC-V spec, it does not seem to be
17 the case here (ie: it is required to be compliant) so I'm also
18 wondering what is the point here.
19
20
21 Note that hard vs soft float will be the least of our concerns
22 here: Based on wikipedia, I count 4 base ISA (2 stable, 2 dev) and 13
23 optional extensions (6 stable, 7 dev) so we potentially have an
24 exponential number of ABIs here...