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On Sun, 18 Jan 2015 21:44:05 +0100 |
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Michał Górny <mgorny@g.o> wrote: |
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|
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> Hello, |
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> |
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> I would like to commit the following flags as cpu_flags_x86_desc. |
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> The list combines global USE flags with some local USE flags I've been |
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> able to find. |
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> |
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> |
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> 3dnow - Use the 3DNow! instruction set |
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> 3dnowext - Use the Enhanced 3DNow! instruction set |
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> aes-ni - Enable support for Intel's AES instruction set (aes in |
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> cpuinfo) avx - Adds support for Advanced Vector Extensions |
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> instructions avx2 - Adds support for Advanced Vector Extensions 2 |
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> instructions fma - Use the Fused Multiply Add instruction set |
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> mmx - Use the MMX instruction set |
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> mmxext - Use the Extended MMX instruction set (intersection of |
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> Enhanced 3DNow! and SSE instruction sets) (3dnowext or sse in |
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> cpuinfo) padlock - Use VIA padlock instructions popcnt - Enable |
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> popcnt instruction support sse - Use the SSE instruction set |
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> sse2 - Use the SSE2 instruction set |
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> sse3 - Use the SSE3 instruction set (pni in cpuinfo) |
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> sse4 - Enable SSE4 instruction support |
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> sse4_1 - Enable SSE4.1 instruction support |
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> sse4_2 - Enable SSE4.2 instruction support |
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> sse4a - Enable SSE4a instruction support |
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> ssse3 - Use the SSSE3 instruction set |
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> |
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|
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ewwww... are you aware that these descriptions are close to useless ? |
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'foo - enable foo' -> thanks for the information I couldn't have |
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guessed... |
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|
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|
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you already have more useful ones available: |
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|
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<flag name="fma3">Enables FMA3 optimizations: AMD processors starting |
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with Piledriver architecture and Intel Haswell based processors or |
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later.</flag> |
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<flag name="fma4">Enables FMA4 optimizations: AMD processors starting |
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with Bulldozer architecture.</flag> |
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<flag name="sse4_2">Enables SSE4.2 optimizations: Nehalem-based Intel |
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Core i7 or later.</flag> |
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<flag name="ssse3">Faster floating point optimization for SSSE3 capable |
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chips (Intel Core 2 and later chips)</flag> |
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|
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and so on... |
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|
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|
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Alexis. |