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On 05/05/2014 08:19 PM, Anthony G. Basile wrote: |
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> On 05/05/2014 10:06 AM, Markos Chandras wrote: |
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>> Hi all, |
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>> |
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>> Right now the number of stages for each endianness is 8: |
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>> |
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>> - mips1 |
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>> - mips32 |
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>> - mips32r2 |
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>> - mips3 |
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>> - mips4 |
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>> - mips4_r10 |
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>> - mips64 |
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>> - mips64r2 |
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>> |
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>> ==> 16 stages in total. |
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>> |
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>> This takes quite a bit of time for all stages to be built (by the time |
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>> everything is built, we are one month passed the time the snapshot was |
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>> taken). How about stop building stages for mips1, mips3 and mips4? We |
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>> keep the existing stages on the mirrors but we will no longer update |
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>> them (or maybe we do on per user or per case basis). I understand |
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>> there is hardware for these ISAs but how often do people actually use |
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>> the new stages? |
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>> |
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>> Just to be clear, I am not suggesting for the team to stop supporting |
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>> these ISAs but to stop building new stages and let the users of such |
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>> ISAs, grab an old stage3 and do the update themselves if needed. |
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>> |
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>> This will free up some hardware resources for building different |
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>> stages for the newer ISAs (maybe more non-multilib n32 and n64 |
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>> variants etc) |
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>> |
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>> What does everyone think? |
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>> |
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>> (CC'ing releng just to keep them in the loop) |
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>> |
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> |
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> FYI, for uclibc I'm only doing big endian mips32r2 and little endian |
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> mips3 (aka mipsel3). Those are in use (atheros ar71xx boards and |
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> lemote, respectively). |
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> |
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> Since you can build a lower level ISA on a board capable of a higher |
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> level ISA, maybe you want to choose along those lines, eg you can build |
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> mips1 using catalyst on an ar71xx board running mips32r2. |
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> |
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|
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Yes there are a lot of options. Sadly we have no metrics on how many |
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people use the old ISA stages or how many of them build their own thing. |
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I don't want to decide anything by myself, I want to know what others |
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think and make a decision as a team and community (if we are going to |
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decide anything at all) :) |
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|
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-- |
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Regards, |
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Markos Chandras |