[gentoo-mips] Re: Reducing the number of the MIPS supported stages

[Anthony G. Basile]

On 05/05/2014 10:06 AM, Markos Chandras wrote:
> Hi all,
>
> Right now the number of stages for each endianness is 8:
>
> - mips1
> - mips32
> - mips32r2
> - mips3
> - mips4
> - mips4_r10
> - mips64
> - mips64r2
>
> ==> 16 stages in total.
>
> This takes quite a bit of time for all stages to be built (by the time
> everything is built, we are one month passed the time the snapshot was
> taken). How about stop building stages for mips1, mips3 and mips4? We
> keep the existing stages on the mirrors but we will no longer update
> them (or maybe we do on per user or per case basis). I understand
> there is hardware for these ISAs but how often do people actually use
> the new stages?
>
> Just to be clear, I am not suggesting for the team to stop supporting
> these ISAs but to stop building new stages and let the users of such
> ISAs, grab an old stage3 and do the update themselves if needed.
>
> This will free up some hardware resources for building different
> stages for the newer ISAs (maybe more non-multilib n32 and n64
> variants etc)
>
> What does everyone think?
>
> (CC'ing releng just to keep them in the loop)
>

FYI, for uclibc I'm only doing big endian mips32r2 and little endian 
mips3 (aka mipsel3).  Those are in use (atheros ar71xx boards and 
lemote, respectively).

Since you can build a lower level ISA on a board capable of a higher 
level ISA, maybe you want to choose along those lines, eg you can build 
mips1 using catalyst on an ar71xx board running mips32r2.

-- 
Anthony G. Basile, Ph.D.
Gentoo Linux Developer [Hardened]
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