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On Sat, Apr 22, 2017 at 2:41 PM, Poison BL. <poisonbl@×××××.com> wrote: |
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> On Sat, Apr 22, 2017 at 5:24 PM, Jorge Almeida <jjalmeida@×××××.com> wrote: |
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> |
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> While I don't have anything that new handy, the 6MB cache checks out against |
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> intel's specs for the i5-7600. The broadwell i5-5675 lists off at a 4MB |
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> cache (not including the eDRAM). GCC seems to like going with a slightly |
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> more tried & true feature set when faced with a fancy, new, chip, in my |
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> experience. Especially if the version of GCC in use isn't the absolute |
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> bleeding edge latest and greatest. |
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> |
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Thanks. I suppose it's just a gcc thing, then. I just emerged |
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gcc-5.4.0 and the output is the same, though. |
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Jorge |